1 /* SPDX-License-Identifier: GPL-2.0 */ 2 /* 3 * Copyright 2014-2016 Freescale Semiconductor Inc. 4 * Copyright 2017-2021 NXP 5 * 6 */ 7 8 #ifndef __FSL_DPSW_CMD_H 9 #define __FSL_DPSW_CMD_H 10 11 #include "dpsw.h" 12 13 /* DPSW Version */ 14 #define DPSW_VER_MAJOR 8 15 #define DPSW_VER_MINOR 9 16 17 #define DPSW_CMD_BASE_VERSION 1 18 #define DPSW_CMD_VERSION_2 2 19 #define DPSW_CMD_ID_OFFSET 4 20 21 #define DPSW_CMD_ID(id) (((id) << DPSW_CMD_ID_OFFSET) | DPSW_CMD_BASE_VERSION) 22 #define DPSW_CMD_V2(id) (((id) << DPSW_CMD_ID_OFFSET) | DPSW_CMD_VERSION_2) 23 24 /* Command IDs */ 25 #define DPSW_CMDID_CLOSE DPSW_CMD_ID(0x800) 26 #define DPSW_CMDID_OPEN DPSW_CMD_ID(0x802) 27 28 #define DPSW_CMDID_GET_API_VERSION DPSW_CMD_ID(0xa02) 29 30 #define DPSW_CMDID_ENABLE DPSW_CMD_ID(0x002) 31 #define DPSW_CMDID_DISABLE DPSW_CMD_ID(0x003) 32 #define DPSW_CMDID_GET_ATTR DPSW_CMD_V2(0x004) 33 #define DPSW_CMDID_RESET DPSW_CMD_ID(0x005) 34 35 #define DPSW_CMDID_SET_IRQ_ENABLE DPSW_CMD_ID(0x012) 36 37 #define DPSW_CMDID_SET_IRQ_MASK DPSW_CMD_ID(0x014) 38 39 #define DPSW_CMDID_GET_IRQ_STATUS DPSW_CMD_ID(0x016) 40 #define DPSW_CMDID_CLEAR_IRQ_STATUS DPSW_CMD_ID(0x017) 41 42 #define DPSW_CMDID_SET_REFLECTION_IF DPSW_CMD_ID(0x022) 43 44 #define DPSW_CMDID_IF_SET_TCI DPSW_CMD_ID(0x030) 45 #define DPSW_CMDID_IF_SET_STP DPSW_CMD_ID(0x031) 46 47 #define DPSW_CMDID_IF_GET_COUNTER DPSW_CMD_V2(0x034) 48 49 #define DPSW_CMDID_IF_ADD_REFLECTION DPSW_CMD_ID(0x037) 50 #define DPSW_CMDID_IF_REMOVE_REFLECTION DPSW_CMD_ID(0x038) 51 52 #define DPSW_CMDID_IF_ENABLE DPSW_CMD_ID(0x03D) 53 #define DPSW_CMDID_IF_DISABLE DPSW_CMD_ID(0x03E) 54 55 #define DPSW_CMDID_IF_GET_ATTR DPSW_CMD_ID(0x042) 56 57 #define DPSW_CMDID_IF_SET_MAX_FRAME_LENGTH DPSW_CMD_ID(0x044) 58 59 #define DPSW_CMDID_IF_GET_LINK_STATE DPSW_CMD_ID(0x046) 60 61 #define DPSW_CMDID_IF_GET_TCI DPSW_CMD_ID(0x04A) 62 63 #define DPSW_CMDID_IF_SET_LINK_CFG DPSW_CMD_ID(0x04C) 64 65 #define DPSW_CMDID_VLAN_ADD DPSW_CMD_ID(0x060) 66 #define DPSW_CMDID_VLAN_ADD_IF DPSW_CMD_V2(0x061) 67 #define DPSW_CMDID_VLAN_ADD_IF_UNTAGGED DPSW_CMD_ID(0x062) 68 69 #define DPSW_CMDID_VLAN_REMOVE_IF DPSW_CMD_ID(0x064) 70 #define DPSW_CMDID_VLAN_REMOVE_IF_UNTAGGED DPSW_CMD_ID(0x065) 71 #define DPSW_CMDID_VLAN_REMOVE_IF_FLOODING DPSW_CMD_ID(0x066) 72 #define DPSW_CMDID_VLAN_REMOVE DPSW_CMD_ID(0x067) 73 74 #define DPSW_CMDID_FDB_ADD DPSW_CMD_ID(0x082) 75 #define DPSW_CMDID_FDB_REMOVE DPSW_CMD_ID(0x083) 76 #define DPSW_CMDID_FDB_ADD_UNICAST DPSW_CMD_ID(0x084) 77 #define DPSW_CMDID_FDB_REMOVE_UNICAST DPSW_CMD_ID(0x085) 78 #define DPSW_CMDID_FDB_ADD_MULTICAST DPSW_CMD_ID(0x086) 79 #define DPSW_CMDID_FDB_REMOVE_MULTICAST DPSW_CMD_ID(0x087) 80 #define DPSW_CMDID_FDB_DUMP DPSW_CMD_ID(0x08A) 81 82 #define DPSW_CMDID_ACL_ADD DPSW_CMD_ID(0x090) 83 #define DPSW_CMDID_ACL_REMOVE DPSW_CMD_ID(0x091) 84 #define DPSW_CMDID_ACL_ADD_ENTRY DPSW_CMD_ID(0x092) 85 #define DPSW_CMDID_ACL_REMOVE_ENTRY DPSW_CMD_ID(0x093) 86 #define DPSW_CMDID_ACL_ADD_IF DPSW_CMD_ID(0x094) 87 #define DPSW_CMDID_ACL_REMOVE_IF DPSW_CMD_ID(0x095) 88 89 #define DPSW_CMDID_IF_GET_PORT_MAC_ADDR DPSW_CMD_ID(0x0A7) 90 91 #define DPSW_CMDID_CTRL_IF_GET_ATTR DPSW_CMD_ID(0x0A0) 92 #define DPSW_CMDID_CTRL_IF_SET_POOLS DPSW_CMD_ID(0x0A1) 93 #define DPSW_CMDID_CTRL_IF_ENABLE DPSW_CMD_ID(0x0A2) 94 #define DPSW_CMDID_CTRL_IF_DISABLE DPSW_CMD_ID(0x0A3) 95 #define DPSW_CMDID_CTRL_IF_SET_QUEUE DPSW_CMD_ID(0x0A6) 96 97 #define DPSW_CMDID_SET_EGRESS_FLOOD DPSW_CMD_ID(0x0AC) 98 #define DPSW_CMDID_IF_SET_LEARNING_MODE DPSW_CMD_ID(0x0AD) 99 100 /* Macros for accessing command fields smaller than 1byte */ 101 #define DPSW_MASK(field) \ 102 GENMASK(DPSW_##field##_SHIFT + DPSW_##field##_SIZE - 1, \ 103 DPSW_##field##_SHIFT) 104 #define dpsw_set_field(var, field, val) \ 105 ((var) |= (((val) << DPSW_##field##_SHIFT) & DPSW_MASK(field))) 106 #define dpsw_get_field(var, field) \ 107 (((var) & DPSW_MASK(field)) >> DPSW_##field##_SHIFT) 108 #define dpsw_get_bit(var, bit) \ 109 (((var) >> (bit)) & GENMASK(0, 0)) 110 111 #pragma pack(push, 1) 112 struct dpsw_cmd_open { 113 __le32 dpsw_id; 114 }; 115 116 #define DPSW_COMPONENT_TYPE_SHIFT 0 117 #define DPSW_COMPONENT_TYPE_SIZE 4 118 119 struct dpsw_cmd_create { 120 /* cmd word 0 */ 121 __le16 num_ifs; 122 u8 max_fdbs; 123 u8 max_meters_per_if; 124 /* from LSB: only the first 4 bits */ 125 u8 component_type; 126 u8 pad[3]; 127 /* cmd word 1 */ 128 __le16 max_vlans; 129 __le16 max_fdb_entries; 130 __le16 fdb_aging_time; 131 __le16 max_fdb_mc_groups; 132 /* cmd word 2 */ 133 __le64 options; 134 }; 135 136 struct dpsw_cmd_destroy { 137 __le32 dpsw_id; 138 }; 139 140 #define DPSW_ENABLE_SHIFT 0 141 #define DPSW_ENABLE_SIZE 1 142 143 struct dpsw_rsp_is_enabled { 144 /* from LSB: enable:1 */ 145 u8 enabled; 146 }; 147 148 struct dpsw_cmd_set_irq_enable { 149 u8 enable_state; 150 u8 pad[3]; 151 u8 irq_index; 152 }; 153 154 struct dpsw_cmd_get_irq_enable { 155 __le32 pad; 156 u8 irq_index; 157 }; 158 159 struct dpsw_rsp_get_irq_enable { 160 u8 enable_state; 161 }; 162 163 struct dpsw_cmd_set_irq_mask { 164 __le32 mask; 165 u8 irq_index; 166 }; 167 168 struct dpsw_cmd_get_irq_mask { 169 __le32 pad; 170 u8 irq_index; 171 }; 172 173 struct dpsw_rsp_get_irq_mask { 174 __le32 mask; 175 }; 176 177 struct dpsw_cmd_get_irq_status { 178 __le32 status; 179 u8 irq_index; 180 }; 181 182 struct dpsw_rsp_get_irq_status { 183 __le32 status; 184 }; 185 186 struct dpsw_cmd_clear_irq_status { 187 __le32 status; 188 u8 irq_index; 189 }; 190 191 #define DPSW_COMPONENT_TYPE_SHIFT 0 192 #define DPSW_COMPONENT_TYPE_SIZE 4 193 194 #define DPSW_FLOODING_CFG_SHIFT 0 195 #define DPSW_FLOODING_CFG_SIZE 4 196 197 #define DPSW_BROADCAST_CFG_SHIFT 4 198 #define DPSW_BROADCAST_CFG_SIZE 4 199 200 struct dpsw_rsp_get_attr { 201 /* cmd word 0 */ 202 __le16 num_ifs; 203 u8 max_fdbs; 204 u8 num_fdbs; 205 __le16 max_vlans; 206 __le16 num_vlans; 207 /* cmd word 1 */ 208 __le16 max_fdb_entries; 209 __le16 fdb_aging_time; 210 __le32 dpsw_id; 211 /* cmd word 2 */ 212 __le16 mem_size; 213 __le16 max_fdb_mc_groups; 214 u8 max_meters_per_if; 215 /* from LSB only the first 4 bits */ 216 u8 component_type; 217 /* [0:3] - flooding configuration 218 * [4:7] - broadcast configuration 219 */ 220 u8 repl_cfg; 221 u8 pad; 222 /* cmd word 3 */ 223 __le64 options; 224 }; 225 226 #define DPSW_VLAN_ID_SHIFT 0 227 #define DPSW_VLAN_ID_SIZE 12 228 #define DPSW_DEI_SHIFT 12 229 #define DPSW_DEI_SIZE 1 230 #define DPSW_PCP_SHIFT 13 231 #define DPSW_PCP_SIZE 3 232 233 struct dpsw_cmd_if_set_tci { 234 __le16 if_id; 235 /* from LSB: VLAN_ID:12 DEI:1 PCP:3 */ 236 __le16 conf; 237 }; 238 239 struct dpsw_cmd_if_get_tci { 240 __le16 if_id; 241 }; 242 243 struct dpsw_rsp_if_get_tci { 244 __le16 pad; 245 __le16 vlan_id; 246 u8 dei; 247 u8 pcp; 248 }; 249 250 #define DPSW_STATE_SHIFT 0 251 #define DPSW_STATE_SIZE 4 252 253 struct dpsw_cmd_if_set_stp { 254 __le16 if_id; 255 __le16 vlan_id; 256 /* only the first LSB 4 bits */ 257 u8 state; 258 }; 259 260 #define DPSW_COUNTER_TYPE_SHIFT 0 261 #define DPSW_COUNTER_TYPE_SIZE 5 262 263 struct dpsw_cmd_if_get_counter { 264 __le16 if_id; 265 /* from LSB: type:5 */ 266 u8 type; 267 }; 268 269 struct dpsw_rsp_if_get_counter { 270 __le64 pad; 271 __le64 counter; 272 }; 273 274 struct dpsw_cmd_if { 275 __le16 if_id; 276 }; 277 278 #define DPSW_ADMIT_UNTAGGED_SHIFT 0 279 #define DPSW_ADMIT_UNTAGGED_SIZE 4 280 #define DPSW_ENABLED_SHIFT 5 281 #define DPSW_ENABLED_SIZE 1 282 #define DPSW_ACCEPT_ALL_VLAN_SHIFT 6 283 #define DPSW_ACCEPT_ALL_VLAN_SIZE 1 284 285 struct dpsw_rsp_if_get_attr { 286 /* cmd word 0 */ 287 /* from LSB: admit_untagged:4 enabled:1 accept_all_vlan:1 */ 288 u8 conf; 289 u8 pad1; 290 u8 num_tcs; 291 u8 pad2; 292 __le16 qdid; 293 /* cmd word 1 */ 294 __le32 options; 295 __le32 pad3; 296 /* cmd word 2 */ 297 __le32 rate; 298 }; 299 300 struct dpsw_cmd_if_set_max_frame_length { 301 __le16 if_id; 302 __le16 frame_length; 303 }; 304 305 struct dpsw_cmd_if_set_link_cfg { 306 /* cmd word 0 */ 307 __le16 if_id; 308 u8 pad[6]; 309 /* cmd word 1 */ 310 __le32 rate; 311 __le32 pad1; 312 /* cmd word 2 */ 313 __le64 options; 314 }; 315 316 struct dpsw_cmd_if_get_link_state { 317 __le16 if_id; 318 }; 319 320 #define DPSW_UP_SHIFT 0 321 #define DPSW_UP_SIZE 1 322 323 struct dpsw_rsp_if_get_link_state { 324 /* cmd word 0 */ 325 __le32 pad0; 326 u8 up; 327 u8 pad1[3]; 328 /* cmd word 1 */ 329 __le32 rate; 330 __le32 pad2; 331 /* cmd word 2 */ 332 __le64 options; 333 }; 334 335 struct dpsw_vlan_add { 336 __le16 fdb_id; 337 __le16 vlan_id; 338 }; 339 340 struct dpsw_cmd_vlan_add_if { 341 /* cmd word 0 */ 342 __le16 options; 343 __le16 vlan_id; 344 __le16 fdb_id; 345 __le16 pad0; 346 /* cmd word 1-4 */ 347 __le64 if_id; 348 }; 349 350 struct dpsw_cmd_vlan_manage_if { 351 /* cmd word 0 */ 352 __le16 pad0; 353 __le16 vlan_id; 354 __le32 pad1; 355 /* cmd word 1-4 */ 356 __le64 if_id; 357 }; 358 359 struct dpsw_cmd_vlan_remove { 360 __le16 pad; 361 __le16 vlan_id; 362 }; 363 364 struct dpsw_cmd_fdb_add { 365 __le32 pad; 366 __le16 fdb_ageing_time; 367 __le16 num_fdb_entries; 368 }; 369 370 struct dpsw_rsp_fdb_add { 371 __le16 fdb_id; 372 }; 373 374 struct dpsw_cmd_fdb_remove { 375 __le16 fdb_id; 376 }; 377 378 #define DPSW_ENTRY_TYPE_SHIFT 0 379 #define DPSW_ENTRY_TYPE_SIZE 4 380 381 struct dpsw_cmd_fdb_unicast_op { 382 /* cmd word 0 */ 383 __le16 fdb_id; 384 u8 mac_addr[6]; 385 /* cmd word 1 */ 386 __le16 if_egress; 387 /* only the first 4 bits from LSB */ 388 u8 type; 389 }; 390 391 struct dpsw_cmd_fdb_multicast_op { 392 /* cmd word 0 */ 393 __le16 fdb_id; 394 __le16 num_ifs; 395 /* only the first 4 bits from LSB */ 396 u8 type; 397 u8 pad[3]; 398 /* cmd word 1 */ 399 u8 mac_addr[6]; 400 __le16 pad2; 401 /* cmd word 2-5 */ 402 __le64 if_id; 403 }; 404 405 struct dpsw_cmd_fdb_dump { 406 __le16 fdb_id; 407 __le16 pad0; 408 __le32 pad1; 409 __le64 iova_addr; 410 __le32 iova_size; 411 }; 412 413 struct dpsw_rsp_fdb_dump { 414 __le16 num_entries; 415 }; 416 417 struct dpsw_rsp_ctrl_if_get_attr { 418 __le64 pad; 419 __le32 rx_fqid; 420 __le32 rx_err_fqid; 421 __le32 tx_err_conf_fqid; 422 }; 423 424 #define DPSW_BACKUP_POOL(val, order) (((val) & 0x1) << (order)) 425 struct dpsw_cmd_ctrl_if_set_pools { 426 u8 num_dpbp; 427 u8 backup_pool_mask; 428 __le16 pad; 429 __le32 dpbp_id[DPSW_MAX_DPBP]; 430 __le16 buffer_size[DPSW_MAX_DPBP]; 431 }; 432 433 #define DPSW_DEST_TYPE_SHIFT 0 434 #define DPSW_DEST_TYPE_SIZE 4 435 436 struct dpsw_cmd_ctrl_if_set_queue { 437 __le32 dest_id; 438 u8 dest_priority; 439 u8 pad; 440 /* from LSB: dest_type:4 */ 441 u8 dest_type; 442 u8 qtype; 443 __le64 user_ctx; 444 __le32 options; 445 }; 446 447 struct dpsw_rsp_get_api_version { 448 __le16 version_major; 449 __le16 version_minor; 450 }; 451 452 struct dpsw_rsp_if_get_mac_addr { 453 __le16 pad; 454 u8 mac_addr[6]; 455 }; 456 457 struct dpsw_cmd_set_egress_flood { 458 __le16 fdb_id; 459 u8 flood_type; 460 u8 pad[5]; 461 __le64 if_id; 462 }; 463 464 #define DPSW_LEARNING_MODE_SHIFT 0 465 #define DPSW_LEARNING_MODE_SIZE 4 466 467 struct dpsw_cmd_if_set_learning_mode { 468 __le16 if_id; 469 /* only the first 4 bits from LSB */ 470 u8 mode; 471 }; 472 473 struct dpsw_cmd_acl_add { 474 __le16 pad; 475 __le16 max_entries; 476 }; 477 478 struct dpsw_rsp_acl_add { 479 __le16 acl_id; 480 }; 481 482 struct dpsw_cmd_acl_remove { 483 __le16 acl_id; 484 }; 485 486 struct dpsw_cmd_acl_if { 487 __le16 acl_id; 488 __le16 num_ifs; 489 __le32 pad; 490 __le64 if_id; 491 }; 492 493 struct dpsw_prep_acl_entry { 494 u8 match_l2_dest_mac[6]; 495 __le16 match_l2_tpid; 496 497 u8 match_l2_source_mac[6]; 498 __le16 match_l2_vlan_id; 499 500 __le32 match_l3_dest_ip; 501 __le32 match_l3_source_ip; 502 503 __le16 match_l4_dest_port; 504 __le16 match_l4_source_port; 505 __le16 match_l2_ether_type; 506 u8 match_l2_pcp_dei; 507 u8 match_l3_dscp; 508 509 u8 mask_l2_dest_mac[6]; 510 __le16 mask_l2_tpid; 511 512 u8 mask_l2_source_mac[6]; 513 __le16 mask_l2_vlan_id; 514 515 __le32 mask_l3_dest_ip; 516 __le32 mask_l3_source_ip; 517 518 __le16 mask_l4_dest_port; 519 __le16 mask_l4_source_port; 520 __le16 mask_l2_ether_type; 521 u8 mask_l2_pcp_dei; 522 u8 mask_l3_dscp; 523 524 u8 match_l3_protocol; 525 u8 mask_l3_protocol; 526 }; 527 528 #define DPSW_RESULT_ACTION_SHIFT 0 529 #define DPSW_RESULT_ACTION_SIZE 4 530 531 struct dpsw_cmd_acl_entry { 532 __le16 acl_id; 533 __le16 result_if_id; 534 __le32 precedence; 535 /* from LSB only the first 4 bits */ 536 u8 result_action; 537 u8 pad[7]; 538 __le64 pad2[4]; 539 __le64 key_iova; 540 }; 541 542 struct dpsw_cmd_set_reflection_if { 543 __le16 if_id; 544 }; 545 546 #define DPSW_FILTER_SHIFT 0 547 #define DPSW_FILTER_SIZE 2 548 549 struct dpsw_cmd_if_reflection { 550 __le16 if_id; 551 __le16 vlan_id; 552 /* only 2 bits from the LSB */ 553 u8 filter; 554 }; 555 #pragma pack(pop) 556 #endif /* __FSL_DPSW_CMD_H */ 557