1 // SPDX-License-Identifier: GPL-2.0 2 /* 3 * DPAA2 Ethernet Switch driver 4 * 5 * Copyright 2014-2016 Freescale Semiconductor Inc. 6 * Copyright 2017-2021 NXP 7 * 8 */ 9 10 #include <linux/module.h> 11 12 #include <linux/interrupt.h> 13 #include <linux/kthread.h> 14 #include <linux/workqueue.h> 15 #include <linux/iommu.h> 16 #include <net/pkt_cls.h> 17 18 #include <linux/fsl/mc.h> 19 20 #include "dpaa2-switch.h" 21 22 /* Minimal supported DPSW version */ 23 #define DPSW_MIN_VER_MAJOR 8 24 #define DPSW_MIN_VER_MINOR 9 25 26 #define DEFAULT_VLAN_ID 1 27 28 static struct notifier_block dpaa2_switch_port_switchdev_nb; 29 static struct notifier_block dpaa2_switch_port_switchdev_blocking_nb; 30 31 static u16 dpaa2_switch_port_get_fdb_id(struct ethsw_port_priv *port_priv) 32 { 33 return port_priv->fdb->fdb_id; 34 } 35 36 static struct dpaa2_switch_fdb *dpaa2_switch_fdb_get_unused(struct ethsw_core *ethsw) 37 { 38 int i; 39 40 for (i = 0; i < ethsw->sw_attr.num_ifs; i++) 41 if (!ethsw->fdbs[i].in_use) 42 return ðsw->fdbs[i]; 43 return NULL; 44 } 45 46 static struct dpaa2_switch_filter_block * 47 dpaa2_switch_filter_block_get_unused(struct ethsw_core *ethsw) 48 { 49 int i; 50 51 for (i = 0; i < ethsw->sw_attr.num_ifs; i++) 52 if (!ethsw->filter_blocks[i].in_use) 53 return ðsw->filter_blocks[i]; 54 return NULL; 55 } 56 57 static struct dpaa2_switch_lag * 58 dpaa2_switch_lag_get_unused(struct ethsw_core *ethsw) 59 { 60 int i; 61 62 for (i = 0; i < ethsw->sw_attr.num_ifs; i++) 63 if (!ethsw->lags[i].in_use) 64 return ðsw->lags[i]; 65 return NULL; 66 } 67 68 static bool dpaa2_switch_fdb_in_use_by_others(struct ethsw_core *ethsw, 69 struct dpaa2_switch_fdb *fdb, 70 struct ethsw_port_priv *except) 71 { 72 int i; 73 74 for (i = 0; i < ethsw->sw_attr.num_ifs; i++) { 75 if (!ethsw->ports[i] || ethsw->ports[i] == except) 76 continue; 77 if (ethsw->ports[i]->fdb == fdb) 78 return true; 79 } 80 81 return false; 82 } 83 84 static struct dpaa2_switch_fdb * 85 dpaa2_switch_fdb_for_join(struct ethsw_port_priv *port_priv, 86 struct net_device *upper_dev) 87 { 88 struct ethsw_port_priv *other_port_priv = NULL; 89 struct net_device *other_dev, *other_dev2; 90 struct list_head *iter, *iter2; 91 92 /* The below call to netdev_for_each_lower_dev() demands the RTNL lock 93 * being held. Assert on it so that it's easier to catch new code 94 * paths that reach this point without the RTNL lock. 95 */ 96 ASSERT_RTNL(); 97 98 /* If part of a bridge, use the FDB of the first dpaa2 switch interface 99 * to be present in that bridge. The search descends one level through 100 * a bridged bond's lowers as well. 101 */ 102 netdev_for_each_lower_dev(upper_dev, other_dev, iter) { 103 if (netif_is_lag_master(other_dev)) { 104 netdev_for_each_lower_dev(other_dev, other_dev2, iter2) { 105 if (!dpaa2_switch_port_dev_check(other_dev2)) 106 continue; 107 108 if (other_dev2 == port_priv->netdev) 109 continue; 110 111 other_port_priv = netdev_priv(other_dev2); 112 break; 113 } 114 } else { 115 if (!dpaa2_switch_port_dev_check(other_dev)) 116 continue; 117 118 if (other_dev == port_priv->netdev) 119 continue; 120 121 other_port_priv = netdev_priv(other_dev); 122 } 123 if (other_port_priv) 124 return other_port_priv->fdb; 125 } 126 127 return port_priv->fdb; 128 } 129 130 static struct dpaa2_switch_fdb * 131 dpaa2_switch_fdb_for_leave(struct ethsw_port_priv *port_priv) 132 { 133 struct ethsw_core *ethsw = port_priv->ethsw_data; 134 135 /* If this is the last user of the FDB, just keep using it. */ 136 if (!dpaa2_switch_fdb_in_use_by_others(ethsw, port_priv->fdb, 137 port_priv)) { 138 return port_priv->fdb; 139 } 140 141 /* Since we are not the last port which leaves a bridge, 142 * acquire a new FDB and use it. 143 */ 144 return dpaa2_switch_fdb_get_unused(ethsw); 145 } 146 147 static void dpaa2_switch_port_set_fdb(struct ethsw_port_priv *port_priv, 148 struct net_device *upper_dev, 149 bool linking) 150 { 151 struct dpaa2_switch_fdb *old_fdb = port_priv->fdb; 152 struct ethsw_core *ethsw = port_priv->ethsw_data; 153 struct dpaa2_switch_fdb *new_fdb; 154 155 new_fdb = linking ? dpaa2_switch_fdb_for_join(port_priv, upper_dev) : 156 dpaa2_switch_fdb_for_leave(port_priv); 157 /* The number of FDBs is sized to accommodate all switch ports as 158 * standalone, each with its private FDB, which means that FDB must be 159 * valid here even on the leave path. WARN if not. 160 */ 161 if (WARN_ON(!new_fdb)) 162 return; 163 164 if (old_fdb != new_fdb) { 165 /* The previous FDB is about to become unused, release 166 * it if we are the last user. 167 */ 168 if (!dpaa2_switch_fdb_in_use_by_others(ethsw, port_priv->fdb, 169 port_priv)) { 170 old_fdb->in_use = false; 171 old_fdb->bridge_dev = NULL; 172 } 173 174 new_fdb->in_use = true; 175 port_priv->fdb = new_fdb; 176 } 177 178 /* Keep track of the new upper bridge device */ 179 port_priv->fdb->bridge_dev = linking ? upper_dev : NULL; 180 } 181 182 static void dpaa2_switch_fdb_get_flood_cfg(struct ethsw_core *ethsw, u16 fdb_id, 183 enum dpsw_flood_type type, 184 struct dpsw_egress_flood_cfg *cfg) 185 { 186 int i = 0, j; 187 188 memset(cfg, 0, sizeof(*cfg)); 189 190 /* Add all the DPAA2 switch ports found in the same bridging domain to 191 * the egress flooding domain 192 */ 193 for (j = 0; j < ethsw->sw_attr.num_ifs; j++) { 194 if (!ethsw->ports[j]) 195 continue; 196 if (ethsw->ports[j]->fdb->fdb_id != fdb_id) 197 continue; 198 199 if (type == DPSW_BROADCAST && ethsw->ports[j]->bcast_flood) 200 cfg->if_id[i++] = ethsw->ports[j]->idx; 201 else if (type == DPSW_FLOODING && ethsw->ports[j]->ucast_flood) 202 cfg->if_id[i++] = ethsw->ports[j]->idx; 203 } 204 205 /* Add the CTRL interface to the egress flooding domain */ 206 cfg->if_id[i++] = ethsw->sw_attr.num_ifs; 207 208 cfg->fdb_id = fdb_id; 209 cfg->flood_type = type; 210 cfg->num_ifs = i; 211 } 212 213 static int dpaa2_switch_fdb_set_egress_flood(struct ethsw_core *ethsw, u16 fdb_id) 214 { 215 struct dpsw_egress_flood_cfg flood_cfg; 216 int err; 217 218 /* Setup broadcast flooding domain */ 219 dpaa2_switch_fdb_get_flood_cfg(ethsw, fdb_id, DPSW_BROADCAST, &flood_cfg); 220 err = dpsw_set_egress_flood(ethsw->mc_io, 0, ethsw->dpsw_handle, 221 &flood_cfg); 222 if (err) { 223 dev_err(ethsw->dev, "dpsw_set_egress_flood() = %d\n", err); 224 return err; 225 } 226 227 /* Setup unknown flooding domain */ 228 dpaa2_switch_fdb_get_flood_cfg(ethsw, fdb_id, DPSW_FLOODING, &flood_cfg); 229 err = dpsw_set_egress_flood(ethsw->mc_io, 0, ethsw->dpsw_handle, 230 &flood_cfg); 231 if (err) { 232 dev_err(ethsw->dev, "dpsw_set_egress_flood() = %d\n", err); 233 return err; 234 } 235 236 return 0; 237 } 238 239 static void *dpaa2_iova_to_virt(struct iommu_domain *domain, 240 dma_addr_t iova_addr) 241 { 242 phys_addr_t phys_addr; 243 244 phys_addr = domain ? iommu_iova_to_phys(domain, iova_addr) : iova_addr; 245 246 return phys_to_virt(phys_addr); 247 } 248 249 static int dpaa2_switch_add_vlan(struct ethsw_port_priv *port_priv, u16 vid) 250 { 251 struct ethsw_core *ethsw = port_priv->ethsw_data; 252 struct dpsw_vlan_cfg vcfg = {0}; 253 int err; 254 255 vcfg.fdb_id = dpaa2_switch_port_get_fdb_id(port_priv); 256 err = dpsw_vlan_add(ethsw->mc_io, 0, 257 ethsw->dpsw_handle, vid, &vcfg); 258 if (err) { 259 dev_err(ethsw->dev, "dpsw_vlan_add err %d\n", err); 260 return err; 261 } 262 ethsw->vlans[vid] = ETHSW_VLAN_MEMBER; 263 264 return 0; 265 } 266 267 static bool dpaa2_switch_port_is_up(struct ethsw_port_priv *port_priv) 268 { 269 struct net_device *netdev = port_priv->netdev; 270 struct dpsw_link_state state; 271 int err; 272 273 err = dpsw_if_get_link_state(port_priv->ethsw_data->mc_io, 0, 274 port_priv->ethsw_data->dpsw_handle, 275 port_priv->idx, &state); 276 if (err) { 277 netdev_err(netdev, "dpsw_if_get_link_state() err %d\n", err); 278 return true; 279 } 280 281 WARN_ONCE(state.up > 1, "Garbage read into link_state"); 282 283 return state.up ? true : false; 284 } 285 286 static int dpaa2_switch_port_set_pvid(struct ethsw_port_priv *port_priv, u16 pvid) 287 { 288 struct ethsw_core *ethsw = port_priv->ethsw_data; 289 struct net_device *netdev = port_priv->netdev; 290 struct dpsw_tci_cfg tci_cfg = { 0 }; 291 bool up; 292 int err, ret; 293 294 err = dpsw_if_get_tci(ethsw->mc_io, 0, ethsw->dpsw_handle, 295 port_priv->idx, &tci_cfg); 296 if (err) { 297 netdev_err(netdev, "dpsw_if_get_tci err %d\n", err); 298 return err; 299 } 300 301 tci_cfg.vlan_id = pvid; 302 303 /* Interface needs to be down to change PVID */ 304 up = dpaa2_switch_port_is_up(port_priv); 305 if (up) { 306 err = dpsw_if_disable(ethsw->mc_io, 0, 307 ethsw->dpsw_handle, 308 port_priv->idx); 309 if (err) { 310 netdev_err(netdev, "dpsw_if_disable err %d\n", err); 311 return err; 312 } 313 } 314 315 err = dpsw_if_set_tci(ethsw->mc_io, 0, ethsw->dpsw_handle, 316 port_priv->idx, &tci_cfg); 317 if (err) { 318 netdev_err(netdev, "dpsw_if_set_tci err %d\n", err); 319 goto set_tci_error; 320 } 321 322 /* Delete previous PVID info and mark the new one */ 323 port_priv->vlans[port_priv->pvid] &= ~ETHSW_VLAN_PVID; 324 port_priv->vlans[pvid] |= ETHSW_VLAN_PVID; 325 port_priv->pvid = pvid; 326 327 set_tci_error: 328 if (up) { 329 ret = dpsw_if_enable(ethsw->mc_io, 0, 330 ethsw->dpsw_handle, 331 port_priv->idx); 332 if (ret) { 333 netdev_err(netdev, "dpsw_if_enable err %d\n", ret); 334 return ret; 335 } 336 } 337 338 return err; 339 } 340 341 static int dpaa2_switch_port_add_vlan(struct ethsw_port_priv *port_priv, 342 u16 vid, u16 flags, bool changed) 343 { 344 struct ethsw_core *ethsw = port_priv->ethsw_data; 345 struct net_device *netdev = port_priv->netdev; 346 struct dpsw_vlan_if_cfg vcfg = {0}; 347 int err; 348 349 if (!port_priv->vlans[vid]) { 350 /* If hit, this VLAN rule will lead the packet into the FDB 351 * table specified in the vlan configuration below 352 */ 353 vcfg.num_ifs = 1; 354 vcfg.if_id[0] = port_priv->idx; 355 vcfg.fdb_id = dpaa2_switch_port_get_fdb_id(port_priv); 356 vcfg.options |= DPSW_VLAN_ADD_IF_OPT_FDB_ID; 357 err = dpsw_vlan_add_if(ethsw->mc_io, 0, ethsw->dpsw_handle, 358 vid, &vcfg); 359 if (err) { 360 netdev_err(netdev, "dpsw_vlan_add_if err %d\n", err); 361 return err; 362 } 363 364 port_priv->vlans[vid] = ETHSW_VLAN_MEMBER; 365 } 366 367 memset(&vcfg, 0, sizeof(vcfg)); 368 vcfg.num_ifs = 1; 369 vcfg.if_id[0] = port_priv->idx; 370 371 if (flags & BRIDGE_VLAN_INFO_UNTAGGED) { 372 if (!(port_priv->vlans[vid] & ETHSW_VLAN_UNTAGGED)) { 373 err = dpsw_vlan_add_if_untagged(ethsw->mc_io, 0, 374 ethsw->dpsw_handle, 375 vid, &vcfg); 376 if (err) { 377 netdev_err(netdev, 378 "dpsw_vlan_add_if_untagged err %d\n", 379 err); 380 return err; 381 } 382 port_priv->vlans[vid] |= ETHSW_VLAN_UNTAGGED; 383 } 384 } else if (changed && (port_priv->vlans[vid] & ETHSW_VLAN_UNTAGGED)) { 385 err = dpsw_vlan_remove_if_untagged(ethsw->mc_io, 0, 386 ethsw->dpsw_handle, 387 vid, &vcfg); 388 if (err) { 389 netdev_err(netdev, 390 "dpsw_vlan_remove_if_untagged err %d\n", 391 err); 392 } 393 port_priv->vlans[vid] &= ~ETHSW_VLAN_UNTAGGED; 394 } 395 396 if (flags & BRIDGE_VLAN_INFO_PVID) { 397 err = dpaa2_switch_port_set_pvid(port_priv, vid); 398 if (err) 399 return err; 400 } else if (changed && port_priv->vlans[vid] & ETHSW_VLAN_PVID) { 401 err = dpaa2_switch_port_set_pvid(port_priv, 4095); 402 if (err) 403 return err; 404 } 405 406 return 0; 407 } 408 409 static enum dpsw_stp_state br_stp_state_to_dpsw(u8 state) 410 { 411 switch (state) { 412 case BR_STATE_DISABLED: 413 return DPSW_STP_STATE_DISABLED; 414 case BR_STATE_LISTENING: 415 return DPSW_STP_STATE_LISTENING; 416 case BR_STATE_LEARNING: 417 return DPSW_STP_STATE_LEARNING; 418 case BR_STATE_FORWARDING: 419 return DPSW_STP_STATE_FORWARDING; 420 case BR_STATE_BLOCKING: 421 return DPSW_STP_STATE_BLOCKING; 422 default: 423 return DPSW_STP_STATE_DISABLED; 424 } 425 } 426 427 static int dpaa2_switch_port_set_stp_state(struct ethsw_port_priv *port_priv, u8 state) 428 { 429 struct dpsw_stp_cfg stp_cfg = {0}; 430 int err; 431 u16 vid; 432 433 if (!netif_running(port_priv->netdev) || state == port_priv->stp_state) 434 return 0; /* Nothing to do */ 435 436 stp_cfg.state = br_stp_state_to_dpsw(state); 437 for (vid = 0; vid <= VLAN_VID_MASK; vid++) { 438 if (port_priv->vlans[vid] & ETHSW_VLAN_MEMBER) { 439 stp_cfg.vlan_id = vid; 440 err = dpsw_if_set_stp(port_priv->ethsw_data->mc_io, 0, 441 port_priv->ethsw_data->dpsw_handle, 442 port_priv->idx, &stp_cfg); 443 if (err) { 444 netdev_err(port_priv->netdev, 445 "dpsw_if_set_stp err %d\n", err); 446 return err; 447 } 448 } 449 } 450 451 port_priv->stp_state = state; 452 453 return 0; 454 } 455 456 static int dpaa2_switch_dellink(struct ethsw_core *ethsw, u16 vid) 457 { 458 struct ethsw_port_priv *ppriv_local = NULL; 459 int i, err; 460 461 if (!ethsw->vlans[vid]) 462 return -ENOENT; 463 464 err = dpsw_vlan_remove(ethsw->mc_io, 0, ethsw->dpsw_handle, vid); 465 if (err) { 466 dev_err(ethsw->dev, "dpsw_vlan_remove err %d\n", err); 467 return err; 468 } 469 ethsw->vlans[vid] = 0; 470 471 for (i = 0; i < ethsw->sw_attr.num_ifs; i++) { 472 ppriv_local = ethsw->ports[i]; 473 if (ppriv_local) 474 ppriv_local->vlans[vid] = 0; 475 } 476 477 return 0; 478 } 479 480 static int dpaa2_switch_port_fdb_add_uc(struct ethsw_port_priv *port_priv, 481 const unsigned char *addr) 482 { 483 struct dpsw_fdb_unicast_cfg entry = {0}; 484 u16 fdb_id; 485 int err; 486 487 entry.if_egress = port_priv->idx; 488 entry.type = DPSW_FDB_ENTRY_STATIC; 489 ether_addr_copy(entry.mac_addr, addr); 490 491 fdb_id = dpaa2_switch_port_get_fdb_id(port_priv); 492 err = dpsw_fdb_add_unicast(port_priv->ethsw_data->mc_io, 0, 493 port_priv->ethsw_data->dpsw_handle, 494 fdb_id, &entry); 495 if (err) 496 netdev_err(port_priv->netdev, 497 "dpsw_fdb_add_unicast err %d\n", err); 498 return err; 499 } 500 501 static int dpaa2_switch_port_fdb_del_uc(struct ethsw_port_priv *port_priv, 502 const unsigned char *addr) 503 { 504 struct dpsw_fdb_unicast_cfg entry = {0}; 505 u16 fdb_id; 506 int err; 507 508 entry.if_egress = port_priv->idx; 509 entry.type = DPSW_FDB_ENTRY_STATIC; 510 ether_addr_copy(entry.mac_addr, addr); 511 512 fdb_id = dpaa2_switch_port_get_fdb_id(port_priv); 513 err = dpsw_fdb_remove_unicast(port_priv->ethsw_data->mc_io, 0, 514 port_priv->ethsw_data->dpsw_handle, 515 fdb_id, &entry); 516 /* Silently discard error for calling multiple times the del command */ 517 if (err && err != -ENXIO) 518 netdev_err(port_priv->netdev, 519 "dpsw_fdb_remove_unicast err %d\n", err); 520 return err; 521 } 522 523 static int dpaa2_switch_port_fdb_add_mc(struct ethsw_port_priv *port_priv, 524 const unsigned char *addr) 525 { 526 struct dpsw_fdb_multicast_cfg entry = {0}; 527 u16 fdb_id; 528 int err; 529 530 ether_addr_copy(entry.mac_addr, addr); 531 entry.type = DPSW_FDB_ENTRY_STATIC; 532 entry.num_ifs = 1; 533 entry.if_id[0] = port_priv->idx; 534 535 fdb_id = dpaa2_switch_port_get_fdb_id(port_priv); 536 err = dpsw_fdb_add_multicast(port_priv->ethsw_data->mc_io, 0, 537 port_priv->ethsw_data->dpsw_handle, 538 fdb_id, &entry); 539 /* Silently discard error for calling multiple times the add command */ 540 if (err && err != -ENXIO) 541 netdev_err(port_priv->netdev, "dpsw_fdb_add_multicast err %d\n", 542 err); 543 return err; 544 } 545 546 static int dpaa2_switch_port_fdb_del_mc(struct ethsw_port_priv *port_priv, 547 const unsigned char *addr) 548 { 549 struct dpsw_fdb_multicast_cfg entry = {0}; 550 u16 fdb_id; 551 int err; 552 553 ether_addr_copy(entry.mac_addr, addr); 554 entry.type = DPSW_FDB_ENTRY_STATIC; 555 entry.num_ifs = 1; 556 entry.if_id[0] = port_priv->idx; 557 558 fdb_id = dpaa2_switch_port_get_fdb_id(port_priv); 559 err = dpsw_fdb_remove_multicast(port_priv->ethsw_data->mc_io, 0, 560 port_priv->ethsw_data->dpsw_handle, 561 fdb_id, &entry); 562 /* Silently discard error for calling multiple times the del command */ 563 if (err && err != -ENAVAIL) 564 netdev_err(port_priv->netdev, 565 "dpsw_fdb_remove_multicast err %d\n", err); 566 return err; 567 } 568 569 static int dpaa2_switch_port_fdb_add(struct ethsw_port_priv *port_priv, 570 const unsigned char *addr) 571 { 572 int err; 573 574 if (is_unicast_ether_addr(addr)) 575 err = dpaa2_switch_port_fdb_add_uc(port_priv, addr); 576 else 577 err = dpaa2_switch_port_fdb_add_mc(port_priv, addr); 578 579 return err; 580 } 581 582 static int dpaa2_switch_port_fdb_del(struct ethsw_port_priv *port_priv, 583 const unsigned char *addr) 584 { 585 if (is_unicast_ether_addr(addr)) 586 return dpaa2_switch_port_fdb_del_uc(port_priv, addr); 587 else 588 return dpaa2_switch_port_fdb_del_mc(port_priv, addr); 589 } 590 591 static struct dpaa2_mac_addr * 592 dpaa2_switch_mac_addr_find(struct list_head *addr_list, 593 const unsigned char *addr, u16 vid) 594 { 595 struct dpaa2_mac_addr *a; 596 597 list_for_each_entry(a, addr_list, list) 598 if (ether_addr_equal(a->addr, addr) && a->vid == vid) 599 return a; 600 601 return NULL; 602 } 603 604 static int dpaa2_switch_lag_fdb_add(struct dpaa2_switch_lag *lag, 605 const unsigned char *addr, u16 vid) 606 { 607 struct ethsw_port_priv *port_priv = lag->primary; 608 struct dpaa2_mac_addr *a; 609 int err = 0; 610 611 mutex_lock(&lag->fdb_lock); 612 613 a = dpaa2_switch_mac_addr_find(&lag->fdbs, addr, vid); 614 if (a) { 615 refcount_inc(&a->refcount); 616 goto out; 617 } 618 619 a = kzalloc(sizeof(*a), GFP_KERNEL); 620 if (!a) { 621 err = -ENOMEM; 622 goto out; 623 } 624 625 err = dpaa2_switch_port_fdb_add(port_priv, addr); 626 if (err) { 627 kfree(a); 628 goto out; 629 } 630 631 ether_addr_copy(a->addr, addr); 632 a->vid = vid; 633 refcount_set(&a->refcount, 1); 634 list_add_tail(&a->list, &lag->fdbs); 635 636 out: 637 mutex_unlock(&lag->fdb_lock); 638 639 return err; 640 } 641 642 static void dpaa2_switch_lag_fdb_del(struct dpaa2_switch_lag *lag, 643 const unsigned char *addr, u16 vid) 644 { 645 struct ethsw_port_priv *port_priv = lag->primary; 646 struct dpaa2_mac_addr *a; 647 648 mutex_lock(&lag->fdb_lock); 649 650 a = dpaa2_switch_mac_addr_find(&lag->fdbs, addr, vid); 651 if (!a) 652 goto out; 653 654 if (!refcount_dec_and_test(&a->refcount)) 655 goto out; 656 657 list_del(&a->list); 658 kfree(a); 659 660 dpaa2_switch_port_fdb_del(port_priv, addr); 661 662 out: 663 mutex_unlock(&lag->fdb_lock); 664 } 665 666 static void dpaa2_switch_port_get_stats(struct net_device *netdev, 667 struct rtnl_link_stats64 *stats) 668 { 669 struct ethsw_port_priv *port_priv = netdev_priv(netdev); 670 u64 tmp; 671 int err; 672 673 err = dpsw_if_get_counter(port_priv->ethsw_data->mc_io, 0, 674 port_priv->ethsw_data->dpsw_handle, 675 port_priv->idx, 676 DPSW_CNT_ING_FRAME, &stats->rx_packets); 677 if (err) 678 goto error; 679 680 err = dpsw_if_get_counter(port_priv->ethsw_data->mc_io, 0, 681 port_priv->ethsw_data->dpsw_handle, 682 port_priv->idx, 683 DPSW_CNT_EGR_FRAME, &stats->tx_packets); 684 if (err) 685 goto error; 686 687 err = dpsw_if_get_counter(port_priv->ethsw_data->mc_io, 0, 688 port_priv->ethsw_data->dpsw_handle, 689 port_priv->idx, 690 DPSW_CNT_ING_BYTE, &stats->rx_bytes); 691 if (err) 692 goto error; 693 694 err = dpsw_if_get_counter(port_priv->ethsw_data->mc_io, 0, 695 port_priv->ethsw_data->dpsw_handle, 696 port_priv->idx, 697 DPSW_CNT_EGR_BYTE, &stats->tx_bytes); 698 if (err) 699 goto error; 700 701 err = dpsw_if_get_counter(port_priv->ethsw_data->mc_io, 0, 702 port_priv->ethsw_data->dpsw_handle, 703 port_priv->idx, 704 DPSW_CNT_ING_FRAME_DISCARD, 705 &stats->rx_dropped); 706 if (err) 707 goto error; 708 709 err = dpsw_if_get_counter(port_priv->ethsw_data->mc_io, 0, 710 port_priv->ethsw_data->dpsw_handle, 711 port_priv->idx, 712 DPSW_CNT_ING_FLTR_FRAME, 713 &tmp); 714 if (err) 715 goto error; 716 stats->rx_dropped += tmp; 717 718 err = dpsw_if_get_counter(port_priv->ethsw_data->mc_io, 0, 719 port_priv->ethsw_data->dpsw_handle, 720 port_priv->idx, 721 DPSW_CNT_EGR_FRAME_DISCARD, 722 &stats->tx_dropped); 723 if (err) 724 goto error; 725 726 return; 727 728 error: 729 netdev_err(netdev, "dpsw_if_get_counter err %d\n", err); 730 } 731 732 static bool dpaa2_switch_port_has_offload_stats(const struct net_device *netdev, 733 int attr_id) 734 { 735 return (attr_id == IFLA_OFFLOAD_XSTATS_CPU_HIT); 736 } 737 738 static int dpaa2_switch_port_get_offload_stats(int attr_id, 739 const struct net_device *netdev, 740 void *sp) 741 { 742 switch (attr_id) { 743 case IFLA_OFFLOAD_XSTATS_CPU_HIT: 744 dpaa2_switch_port_get_stats((struct net_device *)netdev, sp); 745 return 0; 746 } 747 748 return -EINVAL; 749 } 750 751 static int dpaa2_switch_port_change_mtu(struct net_device *netdev, int mtu) 752 { 753 struct ethsw_port_priv *port_priv = netdev_priv(netdev); 754 int err; 755 756 err = dpsw_if_set_max_frame_length(port_priv->ethsw_data->mc_io, 757 0, 758 port_priv->ethsw_data->dpsw_handle, 759 port_priv->idx, 760 (u16)ETHSW_L2_MAX_FRM(mtu)); 761 if (err) { 762 netdev_err(netdev, 763 "dpsw_if_set_max_frame_length() err %d\n", err); 764 return err; 765 } 766 767 WRITE_ONCE(netdev->mtu, mtu); 768 return 0; 769 } 770 771 static int dpaa2_switch_port_link_state_update(struct net_device *netdev) 772 { 773 struct ethsw_port_priv *port_priv = netdev_priv(netdev); 774 struct dpsw_link_state state; 775 int err; 776 777 /* When we manage the MAC/PHY using phylink there is no need 778 * to manually update the netif_carrier. 779 * We can avoid locking because we are called from the "link changed" 780 * IRQ handler, which is the same as the "endpoint changed" IRQ handler 781 * (the writer to port_priv->mac), so we cannot race with it. 782 */ 783 if (dpaa2_mac_is_type_phy(port_priv->mac)) 784 return 0; 785 786 /* Interrupts are received even though no one issued an 'ifconfig up' 787 * on the switch interface. Ignore these link state update interrupts 788 */ 789 if (!netif_running(netdev)) 790 return 0; 791 792 err = dpsw_if_get_link_state(port_priv->ethsw_data->mc_io, 0, 793 port_priv->ethsw_data->dpsw_handle, 794 port_priv->idx, &state); 795 if (err) { 796 netdev_err(netdev, "dpsw_if_get_link_state() err %d\n", err); 797 return err; 798 } 799 800 WARN_ONCE(state.up > 1, "Garbage read into link_state"); 801 802 if (state.up != port_priv->link_state) { 803 if (state.up) { 804 netif_carrier_on(netdev); 805 netif_tx_start_all_queues(netdev); 806 } else { 807 netif_carrier_off(netdev); 808 netif_tx_stop_all_queues(netdev); 809 } 810 port_priv->link_state = state.up; 811 } 812 813 return 0; 814 } 815 816 /* Manage all NAPI instances for the control interface. 817 * 818 * We only have one RX queue and one Tx Conf queue for all 819 * switch ports. Therefore, we only need to enable the NAPI instance once, the 820 * first time one of the switch ports runs .dev_open(). 821 */ 822 823 static void dpaa2_switch_enable_ctrl_if_napi(struct ethsw_core *ethsw) 824 { 825 int i; 826 827 /* Access to the ethsw->napi_users relies on the RTNL lock */ 828 ASSERT_RTNL(); 829 830 /* a new interface is using the NAPI instance */ 831 ethsw->napi_users++; 832 833 /* if there is already a user of the instance, return */ 834 if (ethsw->napi_users > 1) 835 return; 836 837 for (i = 0; i < DPAA2_SWITCH_RX_NUM_FQS; i++) 838 napi_enable(ðsw->fq[i].napi); 839 } 840 841 static void dpaa2_switch_disable_ctrl_if_napi(struct ethsw_core *ethsw) 842 { 843 int i; 844 845 /* Access to the ethsw->napi_users relies on the RTNL lock */ 846 ASSERT_RTNL(); 847 848 /* If we are not the last interface using the NAPI, return */ 849 ethsw->napi_users--; 850 if (ethsw->napi_users) 851 return; 852 853 for (i = 0; i < DPAA2_SWITCH_RX_NUM_FQS; i++) 854 napi_disable(ðsw->fq[i].napi); 855 } 856 857 static int dpaa2_switch_port_open(struct net_device *netdev) 858 { 859 struct ethsw_port_priv *port_priv = netdev_priv(netdev); 860 struct ethsw_core *ethsw = port_priv->ethsw_data; 861 int err; 862 863 mutex_lock(&port_priv->mac_lock); 864 865 if (!dpaa2_switch_port_is_type_phy(port_priv)) { 866 /* Explicitly set carrier off, otherwise 867 * netif_carrier_ok() will return true and cause 'ip link show' 868 * to report the LOWER_UP flag, even though the link 869 * notification wasn't even received. 870 */ 871 netif_carrier_off(netdev); 872 } 873 874 err = dpsw_if_enable(port_priv->ethsw_data->mc_io, 0, 875 port_priv->ethsw_data->dpsw_handle, 876 port_priv->idx); 877 if (err) { 878 mutex_unlock(&port_priv->mac_lock); 879 netdev_err(netdev, "dpsw_if_enable err %d\n", err); 880 return err; 881 } 882 883 dpaa2_switch_enable_ctrl_if_napi(ethsw); 884 885 if (dpaa2_switch_port_is_type_phy(port_priv)) 886 dpaa2_mac_start(port_priv->mac); 887 888 mutex_unlock(&port_priv->mac_lock); 889 890 return 0; 891 } 892 893 static int dpaa2_switch_port_stop(struct net_device *netdev) 894 { 895 struct ethsw_port_priv *port_priv = netdev_priv(netdev); 896 struct ethsw_core *ethsw = port_priv->ethsw_data; 897 int err; 898 899 mutex_lock(&port_priv->mac_lock); 900 901 if (dpaa2_switch_port_is_type_phy(port_priv)) { 902 dpaa2_mac_stop(port_priv->mac); 903 } else { 904 netif_tx_stop_all_queues(netdev); 905 netif_carrier_off(netdev); 906 } 907 908 mutex_unlock(&port_priv->mac_lock); 909 910 err = dpsw_if_disable(port_priv->ethsw_data->mc_io, 0, 911 port_priv->ethsw_data->dpsw_handle, 912 port_priv->idx); 913 if (err) { 914 netdev_err(netdev, "dpsw_if_disable err %d\n", err); 915 return err; 916 } 917 918 dpaa2_switch_disable_ctrl_if_napi(ethsw); 919 920 return 0; 921 } 922 923 static int dpaa2_switch_port_parent_id(struct net_device *dev, 924 struct netdev_phys_item_id *ppid) 925 { 926 struct ethsw_port_priv *port_priv = netdev_priv(dev); 927 928 ppid->id_len = 1; 929 ppid->id[0] = port_priv->ethsw_data->dev_id; 930 931 return 0; 932 } 933 934 static int dpaa2_switch_port_get_phys_name(struct net_device *netdev, char *name, 935 size_t len) 936 { 937 struct ethsw_port_priv *port_priv = netdev_priv(netdev); 938 int err; 939 940 err = snprintf(name, len, "p%d", port_priv->idx); 941 if (err >= len) 942 return -EINVAL; 943 944 return 0; 945 } 946 947 struct ethsw_dump_ctx { 948 struct net_device *dev; 949 struct sk_buff *skb; 950 struct netlink_callback *cb; 951 int idx; 952 }; 953 954 static int dpaa2_switch_fdb_dump_nl(struct fdb_dump_entry *entry, 955 struct ethsw_dump_ctx *dump) 956 { 957 struct ndo_fdb_dump_context *ctx = (void *)dump->cb->ctx; 958 int is_dynamic = entry->type & DPSW_FDB_ENTRY_DINAMIC; 959 u32 portid = NETLINK_CB(dump->cb->skb).portid; 960 u32 seq = dump->cb->nlh->nlmsg_seq; 961 struct nlmsghdr *nlh; 962 struct ndmsg *ndm; 963 964 if (dump->idx < ctx->fdb_idx) 965 goto skip; 966 967 nlh = nlmsg_put(dump->skb, portid, seq, RTM_NEWNEIGH, 968 sizeof(*ndm), NLM_F_MULTI); 969 if (!nlh) 970 return -EMSGSIZE; 971 972 ndm = nlmsg_data(nlh); 973 ndm->ndm_family = AF_BRIDGE; 974 ndm->ndm_pad1 = 0; 975 ndm->ndm_pad2 = 0; 976 ndm->ndm_flags = NTF_SELF; 977 ndm->ndm_type = 0; 978 ndm->ndm_ifindex = dump->dev->ifindex; 979 ndm->ndm_state = is_dynamic ? NUD_REACHABLE : NUD_NOARP; 980 981 if (nla_put(dump->skb, NDA_LLADDR, ETH_ALEN, entry->mac_addr)) 982 goto nla_put_failure; 983 984 nlmsg_end(dump->skb, nlh); 985 986 skip: 987 dump->idx++; 988 return 0; 989 990 nla_put_failure: 991 nlmsg_cancel(dump->skb, nlh); 992 return -EMSGSIZE; 993 } 994 995 static int dpaa2_switch_port_fdb_valid_entry(struct fdb_dump_entry *entry, 996 struct ethsw_port_priv *port_priv) 997 { 998 int idx = port_priv->idx; 999 int valid; 1000 1001 if (entry->type & DPSW_FDB_ENTRY_TYPE_UNICAST) 1002 valid = entry->if_info == port_priv->idx; 1003 else 1004 valid = entry->if_mask[idx / 8] & BIT(idx % 8); 1005 1006 return valid; 1007 } 1008 1009 static int dpaa2_switch_fdb_iterate(struct ethsw_port_priv *port_priv, 1010 dpaa2_switch_fdb_cb_t cb, void *data) 1011 { 1012 struct net_device *net_dev = port_priv->netdev; 1013 struct ethsw_core *ethsw = port_priv->ethsw_data; 1014 struct device *dev = net_dev->dev.parent; 1015 struct fdb_dump_entry *fdb_entries; 1016 struct fdb_dump_entry fdb_entry; 1017 dma_addr_t fdb_dump_iova; 1018 u16 num_fdb_entries; 1019 u32 fdb_dump_size; 1020 int err = 0, i; 1021 u8 *dma_mem; 1022 u16 fdb_id; 1023 1024 fdb_dump_size = ethsw->sw_attr.max_fdb_entries * sizeof(fdb_entry); 1025 dma_mem = kzalloc(fdb_dump_size, GFP_KERNEL); 1026 if (!dma_mem) 1027 return -ENOMEM; 1028 1029 fdb_dump_iova = dma_map_single(dev, dma_mem, fdb_dump_size, 1030 DMA_FROM_DEVICE); 1031 if (dma_mapping_error(dev, fdb_dump_iova)) { 1032 netdev_err(net_dev, "dma_map_single() failed\n"); 1033 err = -ENOMEM; 1034 goto err_map; 1035 } 1036 1037 fdb_id = dpaa2_switch_port_get_fdb_id(port_priv); 1038 err = dpsw_fdb_dump(ethsw->mc_io, 0, ethsw->dpsw_handle, fdb_id, 1039 fdb_dump_iova, fdb_dump_size, &num_fdb_entries); 1040 if (err) { 1041 netdev_err(net_dev, "dpsw_fdb_dump() = %d\n", err); 1042 goto err_dump; 1043 } 1044 1045 dma_unmap_single(dev, fdb_dump_iova, fdb_dump_size, DMA_FROM_DEVICE); 1046 1047 fdb_entries = (struct fdb_dump_entry *)dma_mem; 1048 for (i = 0; i < num_fdb_entries; i++) { 1049 fdb_entry = fdb_entries[i]; 1050 1051 err = cb(port_priv, &fdb_entry, data); 1052 if (err) 1053 goto end; 1054 } 1055 1056 end: 1057 kfree(dma_mem); 1058 1059 return 0; 1060 1061 err_dump: 1062 dma_unmap_single(dev, fdb_dump_iova, fdb_dump_size, DMA_TO_DEVICE); 1063 err_map: 1064 kfree(dma_mem); 1065 return err; 1066 } 1067 1068 static int dpaa2_switch_fdb_entry_dump(struct ethsw_port_priv *port_priv, 1069 struct fdb_dump_entry *fdb_entry, 1070 void *data) 1071 { 1072 if (!dpaa2_switch_port_fdb_valid_entry(fdb_entry, port_priv)) 1073 return 0; 1074 1075 return dpaa2_switch_fdb_dump_nl(fdb_entry, data); 1076 } 1077 1078 static int dpaa2_switch_port_fdb_dump(struct sk_buff *skb, struct netlink_callback *cb, 1079 struct net_device *net_dev, 1080 struct net_device *filter_dev, int *idx) 1081 { 1082 struct ethsw_port_priv *port_priv = netdev_priv(net_dev); 1083 struct ethsw_dump_ctx dump = { 1084 .dev = net_dev, 1085 .skb = skb, 1086 .cb = cb, 1087 .idx = *idx, 1088 }; 1089 int err; 1090 1091 err = dpaa2_switch_fdb_iterate(port_priv, dpaa2_switch_fdb_entry_dump, &dump); 1092 *idx = dump.idx; 1093 1094 return err; 1095 } 1096 1097 static int dpaa2_switch_fdb_entry_fast_age(struct ethsw_port_priv *port_priv, 1098 struct fdb_dump_entry *fdb_entry, 1099 void *data __always_unused) 1100 { 1101 if (!dpaa2_switch_port_fdb_valid_entry(fdb_entry, port_priv)) 1102 return 0; 1103 1104 if (!(fdb_entry->type & DPSW_FDB_ENTRY_TYPE_DYNAMIC)) 1105 return 0; 1106 1107 if (fdb_entry->type & DPSW_FDB_ENTRY_TYPE_UNICAST) 1108 dpaa2_switch_port_fdb_del_uc(port_priv, fdb_entry->mac_addr); 1109 else 1110 dpaa2_switch_port_fdb_del_mc(port_priv, fdb_entry->mac_addr); 1111 1112 return 0; 1113 } 1114 1115 static void dpaa2_switch_port_fast_age(struct ethsw_port_priv *port_priv) 1116 { 1117 dpaa2_switch_fdb_iterate(port_priv, 1118 dpaa2_switch_fdb_entry_fast_age, NULL); 1119 } 1120 1121 static int dpaa2_switch_port_vlan_add(struct net_device *netdev, __be16 proto, 1122 u16 vid) 1123 { 1124 struct switchdev_obj_port_vlan vlan = { 1125 .obj.id = SWITCHDEV_OBJ_ID_PORT_VLAN, 1126 .vid = vid, 1127 .obj.orig_dev = netdev, 1128 /* This API only allows programming tagged, non-PVID VIDs */ 1129 .flags = 0, 1130 .changed = false, 1131 }; 1132 1133 return dpaa2_switch_port_vlans_add(netdev, &vlan); 1134 } 1135 1136 static int dpaa2_switch_port_vlan_kill(struct net_device *netdev, __be16 proto, 1137 u16 vid) 1138 { 1139 struct switchdev_obj_port_vlan vlan = { 1140 .obj.id = SWITCHDEV_OBJ_ID_PORT_VLAN, 1141 .vid = vid, 1142 .obj.orig_dev = netdev, 1143 /* This API only allows programming tagged, non-PVID VIDs */ 1144 .flags = 0, 1145 }; 1146 1147 return dpaa2_switch_port_vlans_del(netdev, &vlan); 1148 } 1149 1150 static int dpaa2_switch_port_set_mac_addr(struct ethsw_port_priv *port_priv) 1151 { 1152 struct ethsw_core *ethsw = port_priv->ethsw_data; 1153 struct net_device *net_dev = port_priv->netdev; 1154 struct device *dev = net_dev->dev.parent; 1155 u8 mac_addr[ETH_ALEN]; 1156 int err; 1157 1158 if (!(ethsw->features & ETHSW_FEATURE_MAC_ADDR)) 1159 return 0; 1160 1161 /* Get firmware address, if any */ 1162 err = dpsw_if_get_port_mac_addr(ethsw->mc_io, 0, ethsw->dpsw_handle, 1163 port_priv->idx, mac_addr); 1164 if (err) { 1165 dev_err(dev, "dpsw_if_get_port_mac_addr() failed\n"); 1166 return err; 1167 } 1168 1169 /* First check if firmware has any address configured by bootloader */ 1170 if (!is_zero_ether_addr(mac_addr)) { 1171 eth_hw_addr_set(net_dev, mac_addr); 1172 } else { 1173 /* No MAC address configured, fill in net_dev->dev_addr 1174 * with a random one 1175 */ 1176 eth_hw_addr_random(net_dev); 1177 dev_dbg_once(dev, "device(s) have all-zero hwaddr, replaced with random\n"); 1178 1179 /* Override NET_ADDR_RANDOM set by eth_hw_addr_random(); for all 1180 * practical purposes, this will be our "permanent" mac address, 1181 * at least until the next reboot. This move will also permit 1182 * register_netdevice() to properly fill up net_dev->perm_addr. 1183 */ 1184 net_dev->addr_assign_type = NET_ADDR_PERM; 1185 } 1186 1187 return 0; 1188 } 1189 1190 static void dpaa2_switch_free_fd(const struct ethsw_core *ethsw, 1191 const struct dpaa2_fd *fd) 1192 { 1193 struct device *dev = ethsw->dev; 1194 unsigned char *buffer_start; 1195 struct sk_buff **skbh, *skb; 1196 dma_addr_t fd_addr; 1197 1198 fd_addr = dpaa2_fd_get_addr(fd); 1199 skbh = dpaa2_iova_to_virt(ethsw->iommu_domain, fd_addr); 1200 1201 skb = *skbh; 1202 buffer_start = (unsigned char *)skbh; 1203 1204 dma_unmap_single(dev, fd_addr, 1205 skb_tail_pointer(skb) - buffer_start, 1206 DMA_TO_DEVICE); 1207 1208 /* Move on with skb release */ 1209 dev_kfree_skb(skb); 1210 } 1211 1212 static int dpaa2_switch_build_single_fd(struct ethsw_core *ethsw, 1213 struct sk_buff *skb, 1214 struct dpaa2_fd *fd) 1215 { 1216 struct device *dev = ethsw->dev; 1217 struct sk_buff **skbh; 1218 dma_addr_t addr; 1219 u8 *buff_start; 1220 void *hwa; 1221 1222 buff_start = PTR_ALIGN(skb->data - DPAA2_SWITCH_TX_DATA_OFFSET - 1223 DPAA2_SWITCH_TX_BUF_ALIGN, 1224 DPAA2_SWITCH_TX_BUF_ALIGN); 1225 1226 /* Clear FAS to have consistent values for TX confirmation. It is 1227 * located in the first 8 bytes of the buffer's hardware annotation 1228 * area 1229 */ 1230 hwa = buff_start + DPAA2_SWITCH_SWA_SIZE; 1231 memset(hwa, 0, 8); 1232 1233 /* Store a backpointer to the skb at the beginning of the buffer 1234 * (in the private data area) such that we can release it 1235 * on Tx confirm 1236 */ 1237 skbh = (struct sk_buff **)buff_start; 1238 *skbh = skb; 1239 1240 addr = dma_map_single(dev, buff_start, 1241 skb_tail_pointer(skb) - buff_start, 1242 DMA_TO_DEVICE); 1243 if (unlikely(dma_mapping_error(dev, addr))) 1244 return -ENOMEM; 1245 1246 /* Setup the FD fields */ 1247 memset(fd, 0, sizeof(*fd)); 1248 1249 dpaa2_fd_set_addr(fd, addr); 1250 dpaa2_fd_set_offset(fd, (u16)(skb->data - buff_start)); 1251 dpaa2_fd_set_len(fd, skb->len); 1252 dpaa2_fd_set_format(fd, dpaa2_fd_single); 1253 1254 return 0; 1255 } 1256 1257 static netdev_tx_t dpaa2_switch_port_tx(struct sk_buff *skb, 1258 struct net_device *net_dev) 1259 { 1260 struct ethsw_port_priv *port_priv = netdev_priv(net_dev); 1261 struct ethsw_core *ethsw = port_priv->ethsw_data; 1262 int retries = DPAA2_SWITCH_SWP_BUSY_RETRIES; 1263 struct dpaa2_fd fd; 1264 int err; 1265 1266 if (unlikely(skb_headroom(skb) < DPAA2_SWITCH_NEEDED_HEADROOM)) { 1267 struct sk_buff *ns; 1268 1269 ns = skb_realloc_headroom(skb, DPAA2_SWITCH_NEEDED_HEADROOM); 1270 if (unlikely(!ns)) { 1271 net_err_ratelimited("%s: Error reallocating skb headroom\n", net_dev->name); 1272 goto err_free_skb; 1273 } 1274 dev_consume_skb_any(skb); 1275 skb = ns; 1276 } 1277 1278 /* We'll be holding a back-reference to the skb until Tx confirmation */ 1279 skb = skb_unshare(skb, GFP_ATOMIC); 1280 if (unlikely(!skb)) { 1281 /* skb_unshare() has already freed the skb */ 1282 net_err_ratelimited("%s: Error copying the socket buffer\n", net_dev->name); 1283 goto err_exit; 1284 } 1285 1286 /* At this stage, we do not support non-linear skbs so just try to 1287 * linearize the skb and if that's not working, just drop the packet. 1288 */ 1289 err = skb_linearize(skb); 1290 if (err) { 1291 net_err_ratelimited("%s: skb_linearize error (%d)!\n", net_dev->name, err); 1292 goto err_free_skb; 1293 } 1294 1295 err = dpaa2_switch_build_single_fd(ethsw, skb, &fd); 1296 if (unlikely(err)) { 1297 net_err_ratelimited("%s: ethsw_build_*_fd() %d\n", net_dev->name, err); 1298 goto err_free_skb; 1299 } 1300 1301 do { 1302 err = dpaa2_io_service_enqueue_qd(NULL, 1303 port_priv->tx_qdid, 1304 8, 0, &fd); 1305 retries--; 1306 } while (err == -EBUSY && retries); 1307 1308 if (unlikely(err < 0)) { 1309 dpaa2_switch_free_fd(ethsw, &fd); 1310 goto err_exit; 1311 } 1312 1313 return NETDEV_TX_OK; 1314 1315 err_free_skb: 1316 dev_kfree_skb(skb); 1317 err_exit: 1318 return NETDEV_TX_OK; 1319 } 1320 1321 static int 1322 dpaa2_switch_setup_tc_cls_flower(struct dpaa2_switch_filter_block *filter_block, 1323 struct flow_cls_offload *f) 1324 { 1325 switch (f->command) { 1326 case FLOW_CLS_REPLACE: 1327 return dpaa2_switch_cls_flower_replace(filter_block, f); 1328 case FLOW_CLS_DESTROY: 1329 return dpaa2_switch_cls_flower_destroy(filter_block, f); 1330 default: 1331 return -EOPNOTSUPP; 1332 } 1333 } 1334 1335 static int 1336 dpaa2_switch_setup_tc_cls_matchall(struct dpaa2_switch_filter_block *block, 1337 struct tc_cls_matchall_offload *f) 1338 { 1339 switch (f->command) { 1340 case TC_CLSMATCHALL_REPLACE: 1341 return dpaa2_switch_cls_matchall_replace(block, f); 1342 case TC_CLSMATCHALL_DESTROY: 1343 return dpaa2_switch_cls_matchall_destroy(block, f); 1344 default: 1345 return -EOPNOTSUPP; 1346 } 1347 } 1348 1349 static int dpaa2_switch_port_setup_tc_block_cb_ig(enum tc_setup_type type, 1350 void *type_data, 1351 void *cb_priv) 1352 { 1353 switch (type) { 1354 case TC_SETUP_CLSFLOWER: 1355 return dpaa2_switch_setup_tc_cls_flower(cb_priv, type_data); 1356 case TC_SETUP_CLSMATCHALL: 1357 return dpaa2_switch_setup_tc_cls_matchall(cb_priv, type_data); 1358 default: 1359 return -EOPNOTSUPP; 1360 } 1361 } 1362 1363 static LIST_HEAD(dpaa2_switch_block_cb_list); 1364 1365 static int 1366 dpaa2_switch_port_acl_tbl_bind(struct ethsw_port_priv *port_priv, 1367 struct dpaa2_switch_filter_block *block) 1368 { 1369 struct ethsw_core *ethsw = port_priv->ethsw_data; 1370 struct net_device *netdev = port_priv->netdev; 1371 struct dpsw_acl_if_cfg acl_if_cfg; 1372 int err; 1373 1374 if (port_priv->filter_block) 1375 return -EINVAL; 1376 1377 acl_if_cfg.if_id[0] = port_priv->idx; 1378 acl_if_cfg.num_ifs = 1; 1379 err = dpsw_acl_add_if(ethsw->mc_io, 0, ethsw->dpsw_handle, 1380 block->acl_id, &acl_if_cfg); 1381 if (err) { 1382 netdev_err(netdev, "dpsw_acl_add_if err %d\n", err); 1383 return err; 1384 } 1385 1386 block->ports |= BIT(port_priv->idx); 1387 port_priv->filter_block = block; 1388 1389 return 0; 1390 } 1391 1392 static int 1393 dpaa2_switch_port_acl_tbl_unbind(struct ethsw_port_priv *port_priv, 1394 struct dpaa2_switch_filter_block *block) 1395 { 1396 struct ethsw_core *ethsw = port_priv->ethsw_data; 1397 struct net_device *netdev = port_priv->netdev; 1398 struct dpsw_acl_if_cfg acl_if_cfg; 1399 int err; 1400 1401 if (port_priv->filter_block != block) 1402 return -EINVAL; 1403 1404 acl_if_cfg.if_id[0] = port_priv->idx; 1405 acl_if_cfg.num_ifs = 1; 1406 err = dpsw_acl_remove_if(ethsw->mc_io, 0, ethsw->dpsw_handle, 1407 block->acl_id, &acl_if_cfg); 1408 if (err) { 1409 netdev_err(netdev, "dpsw_acl_add_if err %d\n", err); 1410 return err; 1411 } 1412 1413 block->ports &= ~BIT(port_priv->idx); 1414 port_priv->filter_block = NULL; 1415 return 0; 1416 } 1417 1418 static int dpaa2_switch_port_block_bind(struct ethsw_port_priv *port_priv, 1419 struct dpaa2_switch_filter_block *block) 1420 { 1421 struct dpaa2_switch_filter_block *old_block = port_priv->filter_block; 1422 int err; 1423 1424 /* Offload all the mirror entries found in the block on this new port 1425 * joining it. 1426 */ 1427 err = dpaa2_switch_block_offload_mirror(block, port_priv); 1428 if (err) 1429 return err; 1430 1431 /* If the port is already bound to this ACL table then do nothing. This 1432 * can happen when this port is the first one to join a tc block 1433 */ 1434 if (port_priv->filter_block == block) 1435 return 0; 1436 1437 err = dpaa2_switch_port_acl_tbl_unbind(port_priv, old_block); 1438 if (err) 1439 return err; 1440 1441 /* Mark the previous ACL table as being unused if this was the last 1442 * port that was using it. 1443 */ 1444 if (old_block->ports == 0) 1445 old_block->in_use = false; 1446 1447 return dpaa2_switch_port_acl_tbl_bind(port_priv, block); 1448 } 1449 1450 static int 1451 dpaa2_switch_port_block_unbind(struct ethsw_port_priv *port_priv, 1452 struct dpaa2_switch_filter_block *block) 1453 { 1454 struct ethsw_core *ethsw = port_priv->ethsw_data; 1455 struct dpaa2_switch_filter_block *new_block; 1456 int err; 1457 1458 /* Unoffload all the mirror entries found in the block from the 1459 * port leaving it. 1460 */ 1461 err = dpaa2_switch_block_unoffload_mirror(block, port_priv); 1462 if (err) 1463 return err; 1464 1465 /* We are the last port that leaves a block (an ACL table). 1466 * We'll continue to use this table. 1467 */ 1468 if (block->ports == BIT(port_priv->idx)) 1469 return 0; 1470 1471 err = dpaa2_switch_port_acl_tbl_unbind(port_priv, block); 1472 if (err) 1473 return err; 1474 1475 if (block->ports == 0) 1476 block->in_use = false; 1477 1478 new_block = dpaa2_switch_filter_block_get_unused(ethsw); 1479 new_block->in_use = true; 1480 return dpaa2_switch_port_acl_tbl_bind(port_priv, new_block); 1481 } 1482 1483 static int dpaa2_switch_setup_tc_block_bind(struct net_device *netdev, 1484 struct flow_block_offload *f) 1485 { 1486 struct ethsw_port_priv *port_priv = netdev_priv(netdev); 1487 struct ethsw_core *ethsw = port_priv->ethsw_data; 1488 struct dpaa2_switch_filter_block *filter_block; 1489 struct flow_block_cb *block_cb; 1490 bool register_block = false; 1491 int err; 1492 1493 block_cb = flow_block_cb_lookup(f->block, 1494 dpaa2_switch_port_setup_tc_block_cb_ig, 1495 ethsw); 1496 1497 if (!block_cb) { 1498 /* If the filter block is not already known, then this port 1499 * must be the first to join it. In this case, we can just 1500 * continue to use our private table 1501 */ 1502 filter_block = port_priv->filter_block; 1503 1504 block_cb = flow_block_cb_alloc(dpaa2_switch_port_setup_tc_block_cb_ig, 1505 ethsw, filter_block, NULL); 1506 if (IS_ERR(block_cb)) 1507 return PTR_ERR(block_cb); 1508 1509 register_block = true; 1510 } else { 1511 filter_block = flow_block_cb_priv(block_cb); 1512 } 1513 1514 flow_block_cb_incref(block_cb); 1515 err = dpaa2_switch_port_block_bind(port_priv, filter_block); 1516 if (err) 1517 goto err_block_bind; 1518 1519 if (register_block) { 1520 flow_block_cb_add(block_cb, f); 1521 list_add_tail(&block_cb->driver_list, 1522 &dpaa2_switch_block_cb_list); 1523 } 1524 1525 return 0; 1526 1527 err_block_bind: 1528 if (!flow_block_cb_decref(block_cb)) 1529 flow_block_cb_free(block_cb); 1530 return err; 1531 } 1532 1533 static void dpaa2_switch_setup_tc_block_unbind(struct net_device *netdev, 1534 struct flow_block_offload *f) 1535 { 1536 struct ethsw_port_priv *port_priv = netdev_priv(netdev); 1537 struct ethsw_core *ethsw = port_priv->ethsw_data; 1538 struct dpaa2_switch_filter_block *filter_block; 1539 struct flow_block_cb *block_cb; 1540 int err; 1541 1542 block_cb = flow_block_cb_lookup(f->block, 1543 dpaa2_switch_port_setup_tc_block_cb_ig, 1544 ethsw); 1545 if (!block_cb) 1546 return; 1547 1548 filter_block = flow_block_cb_priv(block_cb); 1549 err = dpaa2_switch_port_block_unbind(port_priv, filter_block); 1550 if (!err && !flow_block_cb_decref(block_cb)) { 1551 flow_block_cb_remove(block_cb, f); 1552 list_del(&block_cb->driver_list); 1553 } 1554 } 1555 1556 static int dpaa2_switch_setup_tc_block(struct net_device *netdev, 1557 struct flow_block_offload *f) 1558 { 1559 if (f->binder_type != FLOW_BLOCK_BINDER_TYPE_CLSACT_INGRESS) 1560 return -EOPNOTSUPP; 1561 1562 f->driver_block_list = &dpaa2_switch_block_cb_list; 1563 1564 switch (f->command) { 1565 case FLOW_BLOCK_BIND: 1566 return dpaa2_switch_setup_tc_block_bind(netdev, f); 1567 case FLOW_BLOCK_UNBIND: 1568 dpaa2_switch_setup_tc_block_unbind(netdev, f); 1569 return 0; 1570 default: 1571 return -EOPNOTSUPP; 1572 } 1573 } 1574 1575 static int dpaa2_switch_port_setup_tc(struct net_device *netdev, 1576 enum tc_setup_type type, 1577 void *type_data) 1578 { 1579 switch (type) { 1580 case TC_SETUP_BLOCK: { 1581 return dpaa2_switch_setup_tc_block(netdev, type_data); 1582 } 1583 default: 1584 return -EOPNOTSUPP; 1585 } 1586 1587 return 0; 1588 } 1589 1590 static const struct net_device_ops dpaa2_switch_port_ops = { 1591 .ndo_open = dpaa2_switch_port_open, 1592 .ndo_stop = dpaa2_switch_port_stop, 1593 1594 .ndo_set_mac_address = eth_mac_addr, 1595 .ndo_get_stats64 = dpaa2_switch_port_get_stats, 1596 .ndo_change_mtu = dpaa2_switch_port_change_mtu, 1597 .ndo_has_offload_stats = dpaa2_switch_port_has_offload_stats, 1598 .ndo_get_offload_stats = dpaa2_switch_port_get_offload_stats, 1599 .ndo_fdb_dump = dpaa2_switch_port_fdb_dump, 1600 .ndo_vlan_rx_add_vid = dpaa2_switch_port_vlan_add, 1601 .ndo_vlan_rx_kill_vid = dpaa2_switch_port_vlan_kill, 1602 1603 .ndo_start_xmit = dpaa2_switch_port_tx, 1604 .ndo_get_port_parent_id = dpaa2_switch_port_parent_id, 1605 .ndo_get_phys_port_name = dpaa2_switch_port_get_phys_name, 1606 .ndo_setup_tc = dpaa2_switch_port_setup_tc, 1607 }; 1608 1609 bool dpaa2_switch_port_dev_check(const struct net_device *netdev) 1610 { 1611 return netdev->netdev_ops == &dpaa2_switch_port_ops; 1612 } 1613 1614 static bool dpaa2_switch_foreign_dev_check(const struct net_device *dev, 1615 const struct net_device *foreign_dev) 1616 { 1617 struct ethsw_port_priv *port_priv = netdev_priv(dev); 1618 struct ethsw_core *ethsw = port_priv->ethsw_data; 1619 struct ethsw_port_priv *other_port; 1620 int i; 1621 1622 if (netif_is_bridge_master(foreign_dev)) 1623 if (port_priv->fdb->bridge_dev == foreign_dev) 1624 return false; 1625 1626 if (netif_is_bridge_port(foreign_dev)) { 1627 for (i = 0; i < ethsw->sw_attr.num_ifs; i++) { 1628 other_port = ethsw->ports[i]; 1629 1630 if (!other_port) 1631 continue; 1632 if (dpaa2_switch_port_offloads_bridge_port(other_port, 1633 foreign_dev)) 1634 return false; 1635 } 1636 } 1637 1638 return true; 1639 } 1640 1641 static int dpaa2_switch_port_connect_mac(struct ethsw_port_priv *port_priv) 1642 { 1643 struct fsl_mc_device *dpsw_port_dev, *dpmac_dev; 1644 struct dpaa2_mac *mac; 1645 int err; 1646 1647 dpsw_port_dev = to_fsl_mc_device(port_priv->netdev->dev.parent); 1648 dpmac_dev = fsl_mc_get_endpoint(dpsw_port_dev, port_priv->idx); 1649 1650 if (PTR_ERR(dpmac_dev) == -EPROBE_DEFER) 1651 return PTR_ERR(dpmac_dev); 1652 1653 if (IS_ERR(dpmac_dev)) 1654 return 0; 1655 1656 if (dpmac_dev->dev.type != &fsl_mc_bus_dpmac_type) { 1657 err = 0; 1658 goto out_put_device; 1659 } 1660 1661 mac = kzalloc_obj(*mac); 1662 if (!mac) { 1663 err = -ENOMEM; 1664 goto out_put_device; 1665 } 1666 1667 mac->mc_dev = dpmac_dev; 1668 mac->mc_io = port_priv->ethsw_data->mc_io; 1669 mac->net_dev = port_priv->netdev; 1670 1671 err = dpaa2_mac_open(mac); 1672 if (err) 1673 goto err_free_mac; 1674 1675 if (dpaa2_mac_is_type_phy(mac)) { 1676 err = dpaa2_mac_connect(mac); 1677 if (err) { 1678 netdev_err(port_priv->netdev, 1679 "Error connecting to the MAC endpoint %pe\n", 1680 ERR_PTR(err)); 1681 goto err_close_mac; 1682 } 1683 } 1684 1685 mutex_lock(&port_priv->mac_lock); 1686 port_priv->mac = mac; 1687 mutex_unlock(&port_priv->mac_lock); 1688 1689 return 0; 1690 1691 err_close_mac: 1692 dpaa2_mac_close(mac); 1693 err_free_mac: 1694 kfree(mac); 1695 out_put_device: 1696 put_device(&dpmac_dev->dev); 1697 return err; 1698 } 1699 1700 static void dpaa2_switch_port_disconnect_mac(struct ethsw_port_priv *port_priv) 1701 { 1702 struct dpaa2_mac *mac; 1703 1704 mutex_lock(&port_priv->mac_lock); 1705 mac = port_priv->mac; 1706 port_priv->mac = NULL; 1707 mutex_unlock(&port_priv->mac_lock); 1708 1709 if (!mac) 1710 return; 1711 1712 if (dpaa2_mac_is_type_phy(mac)) 1713 dpaa2_mac_disconnect(mac); 1714 1715 dpaa2_mac_close(mac); 1716 put_device(&mac->mc_dev->dev); 1717 kfree(mac); 1718 } 1719 1720 static irqreturn_t dpaa2_switch_irq0_handler_thread(int irq_num, void *arg) 1721 { 1722 struct device *dev = (struct device *)arg; 1723 struct ethsw_core *ethsw = dev_get_drvdata(dev); 1724 struct ethsw_port_priv *port_priv; 1725 int err, if_id; 1726 bool had_mac; 1727 u32 status; 1728 1729 err = dpsw_get_irq_status(ethsw->mc_io, 0, ethsw->dpsw_handle, 1730 DPSW_IRQ_INDEX_IF, &status); 1731 if (err) { 1732 dev_err(dev, "Can't get irq status (err %d)\n", err); 1733 goto out; 1734 } 1735 1736 if_id = (status & 0xFFFF0000) >> 16; 1737 if (if_id >= ethsw->sw_attr.num_ifs) { 1738 dev_err(dev, "Invalid if_id %d in IRQ status\n", if_id); 1739 goto out_clear; 1740 } 1741 port_priv = ethsw->ports[if_id]; 1742 1743 if (status & DPSW_IRQ_EVENT_LINK_CHANGED) 1744 dpaa2_switch_port_link_state_update(port_priv->netdev); 1745 1746 if (status & DPSW_IRQ_EVENT_ENDPOINT_CHANGED) { 1747 dpaa2_switch_port_set_mac_addr(port_priv); 1748 /* We can avoid locking because the "endpoint changed" IRQ 1749 * handler is the only one who changes priv->mac at runtime, 1750 * so we are not racing with anyone. 1751 */ 1752 had_mac = !!port_priv->mac; 1753 if (had_mac) 1754 dpaa2_switch_port_disconnect_mac(port_priv); 1755 else 1756 dpaa2_switch_port_connect_mac(port_priv); 1757 } 1758 1759 out_clear: 1760 err = dpsw_clear_irq_status(ethsw->mc_io, 0, ethsw->dpsw_handle, 1761 DPSW_IRQ_INDEX_IF, status); 1762 if (err) 1763 dev_err(dev, "Can't clear irq status (err %d)\n", err); 1764 1765 out: 1766 return IRQ_HANDLED; 1767 } 1768 1769 static int dpaa2_switch_setup_irqs(struct fsl_mc_device *sw_dev) 1770 { 1771 u32 mask = DPSW_IRQ_EVENT_LINK_CHANGED | DPSW_IRQ_EVENT_ENDPOINT_CHANGED; 1772 struct device *dev = &sw_dev->dev; 1773 struct ethsw_core *ethsw = dev_get_drvdata(dev); 1774 struct fsl_mc_device_irq *irq; 1775 int err; 1776 1777 err = fsl_mc_allocate_irqs(sw_dev); 1778 if (err) { 1779 dev_err(dev, "MC irqs allocation failed\n"); 1780 return err; 1781 } 1782 1783 if (WARN_ON(sw_dev->obj_desc.irq_count != DPSW_IRQ_NUM)) { 1784 err = -EINVAL; 1785 goto free_irq; 1786 } 1787 1788 err = dpsw_set_irq_enable(ethsw->mc_io, 0, ethsw->dpsw_handle, 1789 DPSW_IRQ_INDEX_IF, 0); 1790 if (err) { 1791 dev_err(dev, "dpsw_set_irq_enable err %d\n", err); 1792 goto free_irq; 1793 } 1794 1795 irq = sw_dev->irqs[DPSW_IRQ_INDEX_IF]; 1796 1797 err = devm_request_threaded_irq(dev, irq->virq, NULL, 1798 dpaa2_switch_irq0_handler_thread, 1799 IRQF_NO_SUSPEND | IRQF_ONESHOT, 1800 dev_name(dev), dev); 1801 if (err) { 1802 dev_err(dev, "devm_request_threaded_irq(): %d\n", err); 1803 goto free_irq; 1804 } 1805 1806 err = dpsw_set_irq_mask(ethsw->mc_io, 0, ethsw->dpsw_handle, 1807 DPSW_IRQ_INDEX_IF, mask); 1808 if (err) { 1809 dev_err(dev, "dpsw_set_irq_mask(): %d\n", err); 1810 goto free_devm_irq; 1811 } 1812 1813 err = dpsw_set_irq_enable(ethsw->mc_io, 0, ethsw->dpsw_handle, 1814 DPSW_IRQ_INDEX_IF, 1); 1815 if (err) { 1816 dev_err(dev, "dpsw_set_irq_enable(): %d\n", err); 1817 goto free_devm_irq; 1818 } 1819 1820 return 0; 1821 1822 free_devm_irq: 1823 devm_free_irq(dev, irq->virq, dev); 1824 free_irq: 1825 fsl_mc_free_irqs(sw_dev); 1826 return err; 1827 } 1828 1829 static void dpaa2_switch_teardown_irqs(struct fsl_mc_device *sw_dev) 1830 { 1831 struct device *dev = &sw_dev->dev; 1832 struct ethsw_core *ethsw = dev_get_drvdata(dev); 1833 int err; 1834 1835 err = dpsw_set_irq_enable(ethsw->mc_io, 0, ethsw->dpsw_handle, 1836 DPSW_IRQ_INDEX_IF, 0); 1837 if (err) 1838 dev_err(dev, "dpsw_set_irq_enable err %d\n", err); 1839 1840 fsl_mc_free_irqs(sw_dev); 1841 } 1842 1843 static int dpaa2_switch_port_set_learning(struct ethsw_port_priv *port_priv, bool enable) 1844 { 1845 struct ethsw_core *ethsw = port_priv->ethsw_data; 1846 enum dpsw_learning_mode learn_mode; 1847 int err; 1848 1849 if (enable) 1850 learn_mode = DPSW_LEARNING_MODE_HW; 1851 else 1852 learn_mode = DPSW_LEARNING_MODE_DIS; 1853 1854 err = dpsw_if_set_learning_mode(ethsw->mc_io, 0, ethsw->dpsw_handle, 1855 port_priv->idx, learn_mode); 1856 if (err) 1857 netdev_err(port_priv->netdev, "dpsw_if_set_learning_mode err %d\n", err); 1858 1859 if (!enable) 1860 dpaa2_switch_port_fast_age(port_priv); 1861 1862 return err; 1863 } 1864 1865 static int dpaa2_switch_port_attr_stp_state_set(struct net_device *netdev, 1866 u8 state) 1867 { 1868 struct ethsw_port_priv *port_priv = netdev_priv(netdev); 1869 int err; 1870 1871 err = dpaa2_switch_port_set_stp_state(port_priv, state); 1872 if (err) 1873 return err; 1874 1875 switch (state) { 1876 case BR_STATE_DISABLED: 1877 case BR_STATE_BLOCKING: 1878 case BR_STATE_LISTENING: 1879 err = dpaa2_switch_port_set_learning(port_priv, false); 1880 break; 1881 case BR_STATE_LEARNING: 1882 case BR_STATE_FORWARDING: 1883 err = dpaa2_switch_port_set_learning(port_priv, 1884 port_priv->learn_ena); 1885 break; 1886 } 1887 1888 return err; 1889 } 1890 1891 static int dpaa2_switch_port_flood(struct ethsw_port_priv *port_priv, 1892 struct switchdev_brport_flags flags) 1893 { 1894 struct ethsw_core *ethsw = port_priv->ethsw_data; 1895 1896 if (flags.mask & BR_BCAST_FLOOD) 1897 port_priv->bcast_flood = !!(flags.val & BR_BCAST_FLOOD); 1898 1899 if (flags.mask & BR_FLOOD) 1900 port_priv->ucast_flood = !!(flags.val & BR_FLOOD); 1901 1902 return dpaa2_switch_fdb_set_egress_flood(ethsw, port_priv->fdb->fdb_id); 1903 } 1904 1905 static int dpaa2_switch_port_pre_bridge_flags(struct net_device *netdev, 1906 struct switchdev_brport_flags flags, 1907 struct netlink_ext_ack *extack) 1908 { 1909 if (flags.mask & ~(BR_LEARNING | BR_BCAST_FLOOD | BR_FLOOD | 1910 BR_MCAST_FLOOD)) 1911 return -EINVAL; 1912 1913 if (flags.mask & (BR_FLOOD | BR_MCAST_FLOOD)) { 1914 bool multicast = !!(flags.val & BR_MCAST_FLOOD); 1915 bool unicast = !!(flags.val & BR_FLOOD); 1916 1917 if (unicast != multicast) { 1918 NL_SET_ERR_MSG_MOD(extack, 1919 "Cannot configure multicast flooding independently of unicast"); 1920 return -EINVAL; 1921 } 1922 } 1923 1924 return 0; 1925 } 1926 1927 static int dpaa2_switch_port_bridge_flags(struct net_device *netdev, 1928 struct switchdev_brport_flags flags, 1929 struct netlink_ext_ack *extack) 1930 { 1931 struct ethsw_port_priv *port_priv = netdev_priv(netdev); 1932 int err; 1933 1934 if (flags.mask & BR_LEARNING) { 1935 bool learn_ena = !!(flags.val & BR_LEARNING); 1936 1937 err = dpaa2_switch_port_set_learning(port_priv, learn_ena); 1938 if (err) 1939 return err; 1940 port_priv->learn_ena = learn_ena; 1941 } 1942 1943 if (flags.mask & (BR_BCAST_FLOOD | BR_FLOOD | BR_MCAST_FLOOD)) { 1944 err = dpaa2_switch_port_flood(port_priv, flags); 1945 if (err) 1946 return err; 1947 } 1948 1949 return 0; 1950 } 1951 1952 static int dpaa2_switch_port_attr_set(struct net_device *netdev, const void *ctx, 1953 const struct switchdev_attr *attr, 1954 struct netlink_ext_ack *extack) 1955 { 1956 int err = 0; 1957 1958 switch (attr->id) { 1959 case SWITCHDEV_ATTR_ID_PORT_STP_STATE: 1960 err = dpaa2_switch_port_attr_stp_state_set(netdev, 1961 attr->u.stp_state); 1962 break; 1963 case SWITCHDEV_ATTR_ID_BRIDGE_VLAN_FILTERING: 1964 if (!attr->u.vlan_filtering) { 1965 NL_SET_ERR_MSG_MOD(extack, 1966 "The DPAA2 switch does not support VLAN-unaware operation"); 1967 return -EOPNOTSUPP; 1968 } 1969 break; 1970 case SWITCHDEV_ATTR_ID_PORT_PRE_BRIDGE_FLAGS: 1971 err = dpaa2_switch_port_pre_bridge_flags(netdev, attr->u.brport_flags, extack); 1972 break; 1973 case SWITCHDEV_ATTR_ID_PORT_BRIDGE_FLAGS: 1974 err = dpaa2_switch_port_bridge_flags(netdev, attr->u.brport_flags, extack); 1975 break; 1976 default: 1977 err = -EOPNOTSUPP; 1978 break; 1979 } 1980 1981 return err; 1982 } 1983 1984 int dpaa2_switch_port_vlans_add(struct net_device *netdev, 1985 const struct switchdev_obj_port_vlan *vlan) 1986 { 1987 struct ethsw_port_priv *port_priv = netdev_priv(netdev); 1988 struct ethsw_core *ethsw = port_priv->ethsw_data; 1989 struct dpsw_attr *attr = ðsw->sw_attr; 1990 int err = 0; 1991 1992 if (!port_priv->ethsw_data->vlans[vlan->vid]) { 1993 /* Only check for space in case this is a new VLAN from the 1994 * DPSW perspective 1995 */ 1996 err = dpsw_get_attributes(ethsw->mc_io, 0, ethsw->dpsw_handle, 1997 ðsw->sw_attr); 1998 if (err) { 1999 netdev_err(netdev, "dpsw_get_attributes err %d\n", err); 2000 return err; 2001 } 2002 if (attr->max_vlans - attr->num_vlans < 1) 2003 return -ENOSPC; 2004 2005 /* this is a new VLAN */ 2006 err = dpaa2_switch_add_vlan(port_priv, vlan->vid); 2007 if (err) 2008 return err; 2009 2010 port_priv->ethsw_data->vlans[vlan->vid] |= ETHSW_VLAN_GLOBAL; 2011 } 2012 2013 return dpaa2_switch_port_add_vlan(port_priv, vlan->vid, vlan->flags, 2014 vlan->changed); 2015 } 2016 2017 static int dpaa2_switch_port_mdb_add(struct net_device *netdev, 2018 const struct switchdev_obj_port_mdb *mdb) 2019 { 2020 struct ethsw_port_priv *port_priv = netdev_priv(netdev); 2021 struct dpaa2_switch_lag *lag; 2022 2023 lag = rtnl_dereference(port_priv->lag); 2024 if (lag) 2025 return dpaa2_switch_lag_fdb_add(lag, mdb->addr, mdb->vid); 2026 else 2027 return dpaa2_switch_port_fdb_add(port_priv, mdb->addr); 2028 } 2029 2030 static int dpaa2_switch_port_obj_add(struct net_device *netdev, const void *ctx, 2031 const struct switchdev_obj *obj, 2032 struct netlink_ext_ack *extack) 2033 { 2034 struct ethsw_port_priv *port_priv = netdev_priv(netdev); 2035 int err; 2036 2037 if (ctx && ctx != port_priv) 2038 return 0; 2039 2040 if (!dpaa2_switch_port_offloads_bridge_port(port_priv, obj->orig_dev)) 2041 return -EOPNOTSUPP; 2042 2043 switch (obj->id) { 2044 case SWITCHDEV_OBJ_ID_PORT_VLAN: 2045 err = dpaa2_switch_port_vlans_add(netdev, 2046 SWITCHDEV_OBJ_PORT_VLAN(obj)); 2047 break; 2048 case SWITCHDEV_OBJ_ID_PORT_MDB: 2049 err = dpaa2_switch_port_mdb_add(netdev, 2050 SWITCHDEV_OBJ_PORT_MDB(obj)); 2051 break; 2052 default: 2053 err = -EOPNOTSUPP; 2054 break; 2055 } 2056 2057 return err; 2058 } 2059 2060 static int dpaa2_switch_port_del_vlan(struct ethsw_port_priv *port_priv, u16 vid) 2061 { 2062 struct ethsw_core *ethsw = port_priv->ethsw_data; 2063 struct net_device *netdev = port_priv->netdev; 2064 struct dpsw_vlan_if_cfg vcfg; 2065 int i, err; 2066 2067 if (!port_priv->vlans[vid]) 2068 return -ENOENT; 2069 2070 if (port_priv->vlans[vid] & ETHSW_VLAN_PVID) { 2071 /* If we are deleting the PVID of a port, use VLAN 4095 instead 2072 * as we are sure that neither the bridge nor the 8021q module 2073 * will use it 2074 */ 2075 err = dpaa2_switch_port_set_pvid(port_priv, 4095); 2076 if (err) 2077 return err; 2078 } 2079 2080 vcfg.num_ifs = 1; 2081 vcfg.if_id[0] = port_priv->idx; 2082 if (port_priv->vlans[vid] & ETHSW_VLAN_UNTAGGED) { 2083 err = dpsw_vlan_remove_if_untagged(ethsw->mc_io, 0, 2084 ethsw->dpsw_handle, 2085 vid, &vcfg); 2086 if (err) { 2087 netdev_err(netdev, 2088 "dpsw_vlan_remove_if_untagged err %d\n", 2089 err); 2090 } 2091 port_priv->vlans[vid] &= ~ETHSW_VLAN_UNTAGGED; 2092 } 2093 2094 if (port_priv->vlans[vid] & ETHSW_VLAN_MEMBER) { 2095 err = dpsw_vlan_remove_if(ethsw->mc_io, 0, ethsw->dpsw_handle, 2096 vid, &vcfg); 2097 if (err) { 2098 netdev_err(netdev, 2099 "dpsw_vlan_remove_if err %d\n", err); 2100 return err; 2101 } 2102 port_priv->vlans[vid] &= ~ETHSW_VLAN_MEMBER; 2103 2104 /* Delete VLAN from switch if it is no longer configured on 2105 * any port 2106 */ 2107 for (i = 0; i < ethsw->sw_attr.num_ifs; i++) { 2108 if (ethsw->ports[i] && 2109 ethsw->ports[i]->vlans[vid] & ETHSW_VLAN_MEMBER) 2110 return 0; /* Found a port member in VID */ 2111 } 2112 2113 ethsw->vlans[vid] &= ~ETHSW_VLAN_GLOBAL; 2114 2115 err = dpaa2_switch_dellink(ethsw, vid); 2116 if (err) 2117 return err; 2118 } 2119 2120 return 0; 2121 } 2122 2123 int dpaa2_switch_port_vlans_del(struct net_device *netdev, 2124 const struct switchdev_obj_port_vlan *vlan) 2125 { 2126 struct ethsw_port_priv *port_priv = netdev_priv(netdev); 2127 2128 if (netif_is_bridge_master(vlan->obj.orig_dev)) 2129 return -EOPNOTSUPP; 2130 2131 return dpaa2_switch_port_del_vlan(port_priv, vlan->vid); 2132 } 2133 2134 static int dpaa2_switch_port_mdb_del(struct net_device *netdev, 2135 const struct switchdev_obj_port_mdb *mdb) 2136 { 2137 struct ethsw_port_priv *port_priv = netdev_priv(netdev); 2138 struct dpaa2_switch_lag *lag; 2139 2140 lag = rtnl_dereference(port_priv->lag); 2141 if (lag) 2142 dpaa2_switch_lag_fdb_del(lag, mdb->addr, mdb->vid); 2143 else 2144 dpaa2_switch_port_fdb_del(port_priv, mdb->addr); 2145 2146 return 0; 2147 } 2148 2149 static int dpaa2_switch_port_obj_del(struct net_device *netdev, const void *ctx, 2150 const struct switchdev_obj *obj) 2151 { 2152 struct ethsw_port_priv *port_priv = netdev_priv(netdev); 2153 int err; 2154 2155 if (ctx && ctx != port_priv) 2156 return 0; 2157 2158 if (!dpaa2_switch_port_offloads_bridge_port(port_priv, obj->orig_dev)) 2159 return -EOPNOTSUPP; 2160 2161 switch (obj->id) { 2162 case SWITCHDEV_OBJ_ID_PORT_VLAN: 2163 err = dpaa2_switch_port_vlans_del(netdev, SWITCHDEV_OBJ_PORT_VLAN(obj)); 2164 break; 2165 case SWITCHDEV_OBJ_ID_PORT_MDB: 2166 err = dpaa2_switch_port_mdb_del(netdev, SWITCHDEV_OBJ_PORT_MDB(obj)); 2167 break; 2168 default: 2169 err = -EOPNOTSUPP; 2170 break; 2171 } 2172 return err; 2173 } 2174 2175 static int dpaa2_switch_port_attr_set_event(struct net_device *netdev, 2176 struct switchdev_notifier_port_attr_info *ptr) 2177 { 2178 int err; 2179 2180 err = switchdev_handle_port_attr_set(netdev, ptr, 2181 dpaa2_switch_port_dev_check, 2182 dpaa2_switch_port_attr_set); 2183 return notifier_from_errno(err); 2184 } 2185 2186 static struct net_device * 2187 dpaa2_switch_port_to_bridge_port(struct ethsw_port_priv *port_priv) 2188 { 2189 struct dpaa2_switch_lag *lag; 2190 2191 if (!port_priv->fdb->bridge_dev) 2192 return NULL; 2193 2194 lag = rtnl_dereference(port_priv->lag); 2195 if (lag) 2196 return lag->bond_dev; 2197 2198 return port_priv->netdev; 2199 } 2200 2201 static int dpaa2_switch_port_bridge_join(struct net_device *netdev, 2202 struct net_device *upper_dev, 2203 struct netlink_ext_ack *extack) 2204 { 2205 struct ethsw_port_priv *port_priv = netdev_priv(netdev); 2206 struct dpaa2_switch_fdb *old_fdb = port_priv->fdb; 2207 struct ethsw_core *ethsw = port_priv->ethsw_data; 2208 struct net_device *brport_dev; 2209 bool learn_ena; 2210 int err; 2211 2212 /* Delete the previously manually installed VLAN 1 */ 2213 err = dpaa2_switch_port_del_vlan(port_priv, 1); 2214 if (err) 2215 return err; 2216 2217 dpaa2_switch_port_set_fdb(port_priv, upper_dev, true); 2218 2219 /* Inherit the initial bridge port learning state */ 2220 brport_dev = dpaa2_switch_port_to_bridge_port(port_priv); 2221 learn_ena = br_port_flag_is_set(brport_dev, BR_LEARNING); 2222 err = dpaa2_switch_port_set_learning(port_priv, learn_ena); 2223 port_priv->learn_ena = learn_ena; 2224 2225 /* Setup the egress flood policy (broadcast, unknown unicast) */ 2226 err = dpaa2_switch_fdb_set_egress_flood(ethsw, port_priv->fdb->fdb_id); 2227 if (err) 2228 goto err_egress_flood; 2229 2230 /* Recreate the egress flood domain of the FDB that we just left. */ 2231 err = dpaa2_switch_fdb_set_egress_flood(ethsw, old_fdb->fdb_id); 2232 if (err) 2233 goto err_egress_flood; 2234 2235 brport_dev = dpaa2_switch_port_to_bridge_port(port_priv); 2236 err = switchdev_bridge_port_offload(brport_dev, netdev, port_priv, 2237 &dpaa2_switch_port_switchdev_nb, 2238 &dpaa2_switch_port_switchdev_blocking_nb, 2239 false, extack); 2240 if (err) 2241 goto err_switchdev_offload; 2242 2243 return 0; 2244 2245 err_switchdev_offload: 2246 err_egress_flood: 2247 dpaa2_switch_port_set_fdb(port_priv, upper_dev, false); 2248 return err; 2249 } 2250 2251 static int dpaa2_switch_port_clear_rxvlan(struct net_device *vdev, int vid, void *arg) 2252 { 2253 __be16 vlan_proto = htons(ETH_P_8021Q); 2254 2255 if (vdev) 2256 vlan_proto = vlan_dev_vlan_proto(vdev); 2257 2258 return dpaa2_switch_port_vlan_kill(arg, vlan_proto, vid); 2259 } 2260 2261 static int dpaa2_switch_port_restore_rxvlan(struct net_device *vdev, int vid, void *arg) 2262 { 2263 __be16 vlan_proto = htons(ETH_P_8021Q); 2264 2265 if (vdev) 2266 vlan_proto = vlan_dev_vlan_proto(vdev); 2267 2268 return dpaa2_switch_port_vlan_add(arg, vlan_proto, vid); 2269 } 2270 2271 static void dpaa2_switch_port_pre_bridge_leave(struct net_device *netdev) 2272 { 2273 struct ethsw_port_priv *port_priv = netdev_priv(netdev); 2274 struct ethsw_core *ethsw = port_priv->ethsw_data; 2275 struct net_device *brport_dev; 2276 2277 brport_dev = dpaa2_switch_port_to_bridge_port(port_priv); 2278 if (!brport_dev) 2279 return; 2280 2281 switchdev_bridge_port_unoffload(brport_dev, port_priv, 2282 &dpaa2_switch_port_switchdev_nb, 2283 &dpaa2_switch_port_switchdev_blocking_nb); 2284 2285 /* Make sure that any FDB add/del operations are completed before the 2286 * bridge layout changes 2287 */ 2288 flush_workqueue(ethsw->workqueue); 2289 } 2290 2291 static int dpaa2_switch_port_bridge_leave(struct net_device *netdev) 2292 { 2293 struct ethsw_port_priv *port_priv = netdev_priv(netdev); 2294 struct dpaa2_switch_fdb *old_fdb = port_priv->fdb; 2295 struct ethsw_core *ethsw = port_priv->ethsw_data; 2296 int err; 2297 2298 /* First of all, fast age any learn FDB addresses on this switch port */ 2299 dpaa2_switch_port_fast_age(port_priv); 2300 2301 /* Clear all RX VLANs installed through vlan_vid_add() either as VLAN 2302 * upper devices or otherwise from the FDB table that we are about to 2303 * leave 2304 */ 2305 err = vlan_for_each(netdev, dpaa2_switch_port_clear_rxvlan, netdev); 2306 if (err) 2307 netdev_err(netdev, "Unable to clear RX VLANs from old FDB table, err (%d)\n", err); 2308 2309 dpaa2_switch_port_set_fdb(port_priv, port_priv->fdb->bridge_dev, false); 2310 2311 /* Restore all RX VLANs into the new FDB table that we just joined */ 2312 err = vlan_for_each(netdev, dpaa2_switch_port_restore_rxvlan, netdev); 2313 if (err) 2314 netdev_err(netdev, "Unable to restore RX VLANs to the new FDB, err (%d)\n", err); 2315 2316 /* Reset the flooding state to denote that this port can send any 2317 * packet in standalone mode. With this, we are also ensuring that any 2318 * later bridge join will have the flooding flag on. 2319 */ 2320 port_priv->bcast_flood = true; 2321 port_priv->ucast_flood = true; 2322 2323 /* Setup the egress flood policy (broadcast, unknown unicast). 2324 * When the port is not under a bridge, only the CTRL interface is part 2325 * of the flooding domain besides the actual port 2326 */ 2327 err = dpaa2_switch_fdb_set_egress_flood(ethsw, port_priv->fdb->fdb_id); 2328 if (err) 2329 return err; 2330 2331 /* Recreate the egress flood domain of the FDB that we just left */ 2332 err = dpaa2_switch_fdb_set_egress_flood(ethsw, old_fdb->fdb_id); 2333 if (err) 2334 return err; 2335 2336 /* No HW learning when not under a bridge */ 2337 err = dpaa2_switch_port_set_learning(port_priv, false); 2338 if (err) 2339 return err; 2340 port_priv->learn_ena = false; 2341 2342 /* Add the VLAN 1 as PVID when not under a bridge. We need this since 2343 * the dpaa2 switch interfaces are not capable to be VLAN unaware 2344 */ 2345 return dpaa2_switch_port_add_vlan(port_priv, DEFAULT_VLAN_ID, 2346 BRIDGE_VLAN_INFO_UNTAGGED | BRIDGE_VLAN_INFO_PVID, 2347 false); 2348 } 2349 2350 static int 2351 dpaa2_switch_have_vlan_upper(struct net_device *upper_dev, 2352 __always_unused struct netdev_nested_priv *priv) 2353 { 2354 return is_vlan_dev(upper_dev); 2355 } 2356 2357 static int dpaa2_switch_prevent_bridging_with_8021q_upper(struct net_device *netdev) 2358 { 2359 struct netdev_nested_priv priv = {}; 2360 2361 /* RCU read lock not necessary because we have write-side protection 2362 * (rtnl_mutex), however a non-rcu iterator does not exist. Walk the 2363 * entire upper chain so that a VLAN device stacked on a intermediate 2364 * bond is caught too. 2365 */ 2366 if (netdev_walk_all_upper_dev_rcu(netdev, dpaa2_switch_have_vlan_upper, 2367 &priv)) 2368 return -EOPNOTSUPP; 2369 2370 return 0; 2371 } 2372 2373 static int dpaa2_switch_check_dpsw_instance(struct net_device *dev, 2374 struct netdev_nested_priv *priv) 2375 { 2376 struct ethsw_port_priv *port_priv = (struct ethsw_port_priv *)priv->data; 2377 struct ethsw_port_priv *other_priv = netdev_priv(dev); 2378 2379 if (!dpaa2_switch_port_dev_check(dev)) 2380 return 0; 2381 2382 if (other_priv->ethsw_data == port_priv->ethsw_data) 2383 return 0; 2384 2385 return 1; 2386 } 2387 2388 static int 2389 dpaa2_switch_prechangeupper_sanity_checks(struct net_device *netdev, 2390 struct net_device *upper_dev, 2391 struct netlink_ext_ack *extack) 2392 { 2393 struct ethsw_port_priv *port_priv = netdev_priv(netdev); 2394 struct netdev_nested_priv data = { 2395 .data = (void *)port_priv, 2396 }; 2397 int err; 2398 2399 if (!br_vlan_enabled(upper_dev)) { 2400 NL_SET_ERR_MSG_MOD(extack, "Cannot join a VLAN-unaware bridge"); 2401 return -EOPNOTSUPP; 2402 } 2403 2404 err = dpaa2_switch_prevent_bridging_with_8021q_upper(netdev); 2405 if (err) { 2406 NL_SET_ERR_MSG_MOD(extack, 2407 "Cannot join a bridge while VLAN uppers are present"); 2408 return err; 2409 } 2410 2411 err = netdev_walk_all_lower_dev(upper_dev, 2412 dpaa2_switch_check_dpsw_instance, 2413 &data); 2414 if (err) { 2415 NL_SET_ERR_MSG_MOD(extack, 2416 "Interface from a different DPSW is in the bridge already"); 2417 return -EINVAL; 2418 } 2419 2420 return 0; 2421 } 2422 2423 static int dpaa2_switch_pre_lag_join(struct net_device *netdev, 2424 struct net_device *upper_dev, 2425 struct netdev_lag_upper_info *info, 2426 struct netlink_ext_ack *extack) 2427 { 2428 struct ethsw_port_priv *port_priv = netdev_priv(netdev); 2429 struct ethsw_core *ethsw = port_priv->ethsw_data; 2430 struct ethsw_port_priv *other_port_priv; 2431 struct dpaa2_switch_lag *lag = NULL; 2432 struct dpsw_lag_cfg cfg = {0}; 2433 struct net_device *other_dev; 2434 int i, num_ifs = 0, err; 2435 struct list_head *iter; 2436 2437 if (!(ethsw->features & ETHSW_FEATURE_LAG_OFFLOAD)) { 2438 NL_SET_ERR_MSG_MOD(extack, 2439 "LAG offload is supported only for DPSW >= v8.13"); 2440 return -EOPNOTSUPP; 2441 } 2442 2443 if (info->tx_type != NETDEV_LAG_TX_TYPE_HASH) { 2444 NL_SET_ERR_MSG_MOD(extack, 2445 "Can only offload LAG using hash TX type"); 2446 return -EOPNOTSUPP; 2447 } 2448 2449 if (info->hash_type != NETDEV_LAG_HASH_L23) { 2450 NL_SET_ERR_MSG_MOD(extack, "Can only offload L2+L3 Tx hash"); 2451 return -EOPNOTSUPP; 2452 } 2453 2454 if (!dpaa2_switch_port_has_mac(port_priv)) { 2455 NL_SET_ERR_MSG_MOD(extack, 2456 "Only switch interfaces connected to MACs can be under a LAG"); 2457 return -EINVAL; 2458 } 2459 2460 if (vlan_uses_dev(upper_dev)) { 2461 NL_SET_ERR_MSG_MOD(extack, 2462 "Cannot join a LAG upper that has a VLAN"); 2463 return -EOPNOTSUPP; 2464 } 2465 2466 for (i = 0; i < ethsw->sw_attr.num_ifs; i++) { 2467 if (!ethsw->lags[i].in_use) 2468 continue; 2469 if (ethsw->lags[i].bond_dev != upper_dev) 2470 continue; 2471 lag = ðsw->lags[i]; 2472 break; 2473 } 2474 2475 netdev_for_each_lower_dev(upper_dev, other_dev, iter) { 2476 if (!dpaa2_switch_port_dev_check(other_dev)) 2477 continue; 2478 2479 other_port_priv = netdev_priv(other_dev); 2480 if (other_port_priv->ethsw_data != port_priv->ethsw_data) { 2481 NL_SET_ERR_MSG_MOD(extack, 2482 "Interface from a different DPSW is in the bond already"); 2483 return -EINVAL; 2484 } 2485 2486 cfg.if_id[num_ifs++] = other_port_priv->idx; 2487 2488 if (num_ifs >= DPSW_MAX_LAG_IFS) { 2489 NL_SET_ERR_MSG_MOD(extack, 2490 "Cannot add more than 8 DPAA2 switch ports under the same bond"); 2491 return -EINVAL; 2492 } 2493 } 2494 2495 if (lag) { 2496 cfg.group_id = lag->id; 2497 cfg.if_id[num_ifs++] = port_priv->idx; 2498 cfg.num_ifs = num_ifs; 2499 cfg.phase = DPSW_LAG_SET_PHASE_CHECK; 2500 2501 err = dpsw_lag_set(ethsw->mc_io, 0, ethsw->dpsw_handle, &cfg); 2502 if (err) { 2503 NL_SET_ERR_MSG_MOD(extack, 2504 "Cannot offload LAG configuration"); 2505 return -EOPNOTSUPP; 2506 } 2507 } 2508 2509 return 0; 2510 } 2511 2512 static void dpaa2_switch_port_set_lag_group(struct ethsw_port_priv *port_priv, 2513 struct net_device *bond_dev) 2514 { 2515 struct ethsw_core *ethsw = port_priv->ethsw_data; 2516 struct ethsw_port_priv *other_port_priv = NULL; 2517 struct dpaa2_switch_lag *lag = NULL; 2518 struct dpaa2_switch_lag *other_lag; 2519 struct net_device *other_dev; 2520 struct list_head *iter; 2521 2522 netdev_for_each_lower_dev(bond_dev, other_dev, iter) { 2523 if (!dpaa2_switch_port_dev_check(other_dev)) 2524 continue; 2525 2526 other_port_priv = netdev_priv(other_dev); 2527 other_lag = rtnl_dereference(other_port_priv->lag); 2528 if (!other_lag) 2529 continue; 2530 2531 if (other_lag->bond_dev == bond_dev) { 2532 rcu_assign_pointer(port_priv->lag, other_lag); 2533 return; 2534 } 2535 } 2536 2537 /* This is the first interface to be added under a bond device. Find an 2538 * unused LAG group. No need to check for NULL since there are the same 2539 * amount of DPSW ports as LAG groups, meaning that each port can have 2540 * its own LAG group. 2541 */ 2542 lag = dpaa2_switch_lag_get_unused(ethsw); 2543 lag->in_use = true; 2544 lag->bond_dev = bond_dev; 2545 lag->primary = port_priv; 2546 rcu_assign_pointer(port_priv->lag, lag); 2547 } 2548 2549 static bool dpaa2_switch_port_in_lag(struct ethsw_port_priv *port_priv, 2550 struct net_device *bond_dev) 2551 { 2552 struct dpaa2_switch_lag *lag; 2553 2554 if (!port_priv) 2555 return false; 2556 2557 lag = rtnl_dereference(port_priv->lag); 2558 return lag && lag->bond_dev == bond_dev; 2559 } 2560 2561 static int dpaa2_switch_set_lag_cfg(struct net_device *bond_dev, u8 lag_id, 2562 struct ethsw_core *ethsw) 2563 { 2564 struct dpaa2_switch_lag *lag = ðsw->lags[lag_id - 1]; 2565 struct ethsw_port_priv *primary, *port_priv; 2566 struct ethsw_port_priv *new_primary = NULL; 2567 struct dpsw_lag_cfg cfg = {0}; 2568 struct dpaa2_mac_addr *a; 2569 u8 num_ifs = 0; 2570 int err, i; 2571 2572 cfg.group_id = lag_id; 2573 2574 /* Determine the primary port. The caller clears ->lag on the port that 2575 * is leaving, so a NULL ->lag on the current primary means it is the 2576 * one leaving: elect the first remaining member as the new primary. 2577 * Otherwise keep the current primary. 2578 */ 2579 if (rtnl_dereference(lag->primary->lag)) { 2580 primary = lag->primary; 2581 } else { 2582 primary = NULL; 2583 for (i = 0; i < ethsw->sw_attr.num_ifs; i++) { 2584 if (dpaa2_switch_port_in_lag(ethsw->ports[i], bond_dev)) { 2585 new_primary = ethsw->ports[i]; 2586 primary = new_primary; 2587 break; 2588 } 2589 } 2590 } 2591 2592 /* Build the interface list, always placing the primary first */ 2593 if (primary) 2594 cfg.if_id[num_ifs++] = primary->idx; 2595 for (i = 0; i < ethsw->sw_attr.num_ifs; i++) { 2596 port_priv = ethsw->ports[i]; 2597 if (port_priv == primary) 2598 continue; 2599 if (!dpaa2_switch_port_in_lag(port_priv, bond_dev)) 2600 continue; 2601 2602 cfg.if_id[num_ifs++] = port_priv->idx; 2603 } 2604 cfg.num_ifs = num_ifs; 2605 2606 /* No more interfaces under this LAG group, mark it as not in use. Wait 2607 * for a grace period so that any readers of the lag structure finished. 2608 */ 2609 if (!num_ifs) { 2610 synchronize_net(); 2611 2612 lag->bond_dev = NULL; 2613 lag->primary = NULL; 2614 lag->in_use = false; 2615 } 2616 2617 /* When the primary changes, migrate the FDB entries from the old 2618 * primary to the new one: remove them before reconfiguring the LAG in 2619 * hardware and re-add them on the new primary afterwards. We do not 2620 * touch any refcounting since the intention is to change the HW entry, 2621 * not the parallel software tracking. 2622 */ 2623 if (new_primary) { 2624 mutex_lock(&lag->fdb_lock); 2625 list_for_each_entry(a, &lag->fdbs, list) 2626 dpaa2_switch_port_fdb_del(lag->primary, a->addr); 2627 mutex_unlock(&lag->fdb_lock); 2628 } 2629 2630 err = dpsw_lag_set(ethsw->mc_io, 0, ethsw->dpsw_handle, &cfg); 2631 if (err) 2632 return err; 2633 2634 if (new_primary) { 2635 mutex_lock(&lag->fdb_lock); 2636 list_for_each_entry(a, &lag->fdbs, list) { 2637 err = dpaa2_switch_port_fdb_add(new_primary, a->addr); 2638 if (err) 2639 netdev_err(new_primary->netdev, "Unable to migrate FDB\n"); 2640 } 2641 mutex_unlock(&lag->fdb_lock); 2642 2643 synchronize_net(); 2644 lag->primary = new_primary; 2645 } 2646 2647 return 0; 2648 } 2649 2650 static int dpaa2_switch_port_bond_join(struct net_device *netdev, 2651 struct net_device *bond_dev, 2652 struct netdev_lag_upper_info *info, 2653 struct netlink_ext_ack *extack) 2654 { 2655 struct ethsw_port_priv *port_priv = netdev_priv(netdev); 2656 struct ethsw_core *ethsw = port_priv->ethsw_data; 2657 struct net_device *bridge_dev; 2658 struct dpaa2_switch_lag *lag; 2659 int err = 0; 2660 u8 lag_id; 2661 2662 /* Setup the port_priv->lag pointer for this switch port */ 2663 dpaa2_switch_port_set_lag_group(port_priv, bond_dev); 2664 2665 /* Create the LAG configuration and apply it in MC */ 2666 lag = rtnl_dereference(port_priv->lag); 2667 lag_id = lag->id; 2668 err = dpaa2_switch_set_lag_cfg(bond_dev, lag_id, ethsw); 2669 if (err) 2670 goto err_lag_cfg; 2671 2672 /* If the bond device is a switch port, join the bridge as well */ 2673 bridge_dev = netdev_master_upper_dev_get(bond_dev); 2674 if (!bridge_dev || !netif_is_bridge_master(bridge_dev)) 2675 return 0; 2676 2677 err = dpaa2_switch_port_bridge_join(netdev, bridge_dev, extack); 2678 if (err) 2679 goto err_lag_cfg; 2680 2681 return err; 2682 2683 err_lag_cfg: 2684 rcu_assign_pointer(port_priv->lag, NULL); 2685 dpaa2_switch_set_lag_cfg(bond_dev, lag_id, ethsw); 2686 2687 return err; 2688 } 2689 2690 static int dpaa2_switch_port_bond_leave(struct net_device *netdev, 2691 struct net_device *bond_dev) 2692 { 2693 struct net_device *bridge_dev = netdev_master_upper_dev_get(bond_dev); 2694 struct ethsw_port_priv *port_priv = netdev_priv(netdev); 2695 struct dpaa2_switch_lag *lag = rtnl_dereference(port_priv->lag); 2696 struct ethsw_core *ethsw = port_priv->ethsw_data; 2697 struct net_device *brpdev; 2698 bool learn_ena; 2699 int err; 2700 2701 if (!lag) 2702 return 0; 2703 2704 /* Recreate the LAG configuration for the LAG group that we left. */ 2705 rcu_assign_pointer(port_priv->lag, NULL); 2706 dpaa2_switch_set_lag_cfg(bond_dev, lag->id, ethsw); 2707 2708 if (bridge_dev && netif_is_bridge_master(bridge_dev)) { 2709 /* Make sure that the new primary inherits the learning state */ 2710 if (lag->primary) { 2711 brpdev = dpaa2_switch_port_to_bridge_port(lag->primary); 2712 learn_ena = br_port_flag_is_set(brpdev, BR_LEARNING); 2713 err = dpaa2_switch_port_set_learning(lag->primary, 2714 learn_ena); 2715 if (err) 2716 return err; 2717 lag->primary->learn_ena = learn_ena; 2718 } 2719 2720 /* In case the bond is a bridge port, leave the upper bridge as 2721 * well. 2722 */ 2723 return dpaa2_switch_port_bridge_leave(netdev); 2724 } 2725 2726 return 0; 2727 } 2728 2729 static int dpaa2_switch_port_prechangeupper(struct net_device *netdev, 2730 struct netdev_notifier_changeupper_info *info) 2731 { 2732 struct ethsw_port_priv *port_priv; 2733 struct net_device *upper_dev, *br; 2734 struct netlink_ext_ack *extack; 2735 int err; 2736 2737 if (!dpaa2_switch_port_dev_check(netdev)) 2738 return 0; 2739 2740 extack = netdev_notifier_info_to_extack(&info->info); 2741 upper_dev = info->upper_dev; 2742 if (netif_is_bridge_master(upper_dev)) { 2743 err = dpaa2_switch_prechangeupper_sanity_checks(netdev, 2744 upper_dev, 2745 extack); 2746 if (err) 2747 return err; 2748 2749 if (!info->linking) 2750 dpaa2_switch_port_pre_bridge_leave(netdev); 2751 } else if (netif_is_lag_master(upper_dev)) { 2752 if (!info->linking) { 2753 if (netif_is_bridge_port(upper_dev)) 2754 dpaa2_switch_port_pre_bridge_leave(netdev); 2755 return 0; 2756 } 2757 2758 if (netif_is_bridge_port(upper_dev)) { 2759 br = netdev_master_upper_dev_get(upper_dev); 2760 err = dpaa2_switch_prechangeupper_sanity_checks(netdev, 2761 br, 2762 extack); 2763 if (err) 2764 return err; 2765 } 2766 2767 return dpaa2_switch_pre_lag_join(netdev, upper_dev, 2768 info->upper_info, extack); 2769 } else if (is_vlan_dev(upper_dev)) { 2770 port_priv = netdev_priv(netdev); 2771 if (port_priv->fdb->bridge_dev) { 2772 NL_SET_ERR_MSG_MOD(extack, 2773 "Cannot accept VLAN uppers while bridged"); 2774 return -EOPNOTSUPP; 2775 } 2776 } 2777 2778 return 0; 2779 } 2780 2781 static int dpaa2_switch_port_changeupper(struct net_device *netdev, 2782 struct netdev_notifier_changeupper_info *info) 2783 { 2784 struct netlink_ext_ack *extack; 2785 struct net_device *upper_dev; 2786 2787 if (!dpaa2_switch_port_dev_check(netdev)) 2788 return 0; 2789 2790 extack = netdev_notifier_info_to_extack(&info->info); 2791 2792 upper_dev = info->upper_dev; 2793 if (netif_is_bridge_master(upper_dev)) { 2794 if (info->linking) 2795 return dpaa2_switch_port_bridge_join(netdev, 2796 upper_dev, 2797 extack); 2798 else 2799 return dpaa2_switch_port_bridge_leave(netdev); 2800 } else if (netif_is_lag_master(upper_dev)) { 2801 if (info->linking) 2802 return dpaa2_switch_port_bond_join(netdev, upper_dev, 2803 info->upper_info, 2804 extack); 2805 else 2806 return dpaa2_switch_port_bond_leave(netdev, upper_dev); 2807 } 2808 2809 return 0; 2810 } 2811 2812 static int 2813 dpaa2_switch_lag_prechangeupper(struct net_device *netdev, 2814 struct netdev_notifier_changeupper_info *info) 2815 { 2816 struct net_device *lower; 2817 struct list_head *iter; 2818 int err = 0; 2819 2820 if (!netif_is_lag_master(netdev)) 2821 return 0; 2822 2823 netdev_for_each_lower_dev(netdev, lower, iter) { 2824 if (!dpaa2_switch_port_dev_check(lower)) 2825 continue; 2826 2827 err = dpaa2_switch_port_prechangeupper(lower, info); 2828 if (err) 2829 return err; 2830 } 2831 2832 return err; 2833 } 2834 2835 static int 2836 dpaa2_switch_lag_changeupper(struct net_device *netdev, 2837 struct netdev_notifier_changeupper_info *info) 2838 { 2839 struct net_device *lower; 2840 struct list_head *iter; 2841 int err = 0; 2842 2843 if (!netif_is_lag_master(netdev)) 2844 return 0; 2845 2846 netdev_for_each_lower_dev(netdev, lower, iter) { 2847 if (!dpaa2_switch_port_dev_check(lower)) 2848 continue; 2849 2850 err = dpaa2_switch_port_changeupper(lower, info); 2851 if (err) 2852 return err; 2853 } 2854 2855 return 0; 2856 } 2857 2858 static int 2859 dpaa2_switch_port_changelowerstate(struct net_device *netdev, 2860 struct netdev_lag_lower_state_info *linfo) 2861 { 2862 struct ethsw_port_priv *port_priv = netdev_priv(netdev); 2863 struct ethsw_core *ethsw = port_priv->ethsw_data; 2864 int err; 2865 2866 if (!rtnl_dereference(port_priv->lag)) 2867 return 0; 2868 2869 err = dpsw_if_set_lag_state(ethsw->mc_io, 0, ethsw->dpsw_handle, 2870 port_priv->idx, linfo->tx_enabled ? 1 : 0); 2871 if (err) { 2872 netdev_err(netdev, "dpsw_if_set_lag_state() = %d\n", err); 2873 return err; 2874 } 2875 2876 return 0; 2877 } 2878 2879 static int dpaa2_switch_port_netdevice_event(struct notifier_block *nb, 2880 unsigned long event, void *ptr) 2881 { 2882 struct net_device *netdev = netdev_notifier_info_to_dev(ptr); 2883 struct netdev_notifier_changelowerstate_info *info; 2884 int err = 0; 2885 2886 switch (event) { 2887 case NETDEV_PRECHANGEUPPER: 2888 err = dpaa2_switch_port_prechangeupper(netdev, ptr); 2889 if (err) 2890 return notifier_from_errno(err); 2891 2892 err = dpaa2_switch_lag_prechangeupper(netdev, ptr); 2893 if (err) 2894 return notifier_from_errno(err); 2895 2896 break; 2897 case NETDEV_CHANGEUPPER: 2898 err = dpaa2_switch_port_changeupper(netdev, ptr); 2899 if (err) 2900 return notifier_from_errno(err); 2901 2902 err = dpaa2_switch_lag_changeupper(netdev, ptr); 2903 if (err) 2904 return notifier_from_errno(err); 2905 2906 break; 2907 case NETDEV_CHANGELOWERSTATE: 2908 info = ptr; 2909 if (!dpaa2_switch_port_dev_check(netdev)) 2910 break; 2911 2912 err = dpaa2_switch_port_changelowerstate(netdev, 2913 info->lower_state_info); 2914 return notifier_from_errno(err); 2915 } 2916 2917 return NOTIFY_DONE; 2918 } 2919 2920 struct ethsw_switchdev_event_work { 2921 struct work_struct work; 2922 struct switchdev_notifier_fdb_info fdb_info; 2923 struct net_device *dev; 2924 struct net_device *orig_dev; 2925 unsigned long event; 2926 u16 vid; 2927 }; 2928 2929 static void dpaa2_switch_event_work(struct work_struct *work) 2930 { 2931 struct ethsw_switchdev_event_work *switchdev_work = 2932 container_of(work, struct ethsw_switchdev_event_work, work); 2933 struct net_device *orig_dev = switchdev_work->orig_dev; 2934 struct net_device *dev = switchdev_work->dev; 2935 struct ethsw_port_priv *port_priv = netdev_priv(dev); 2936 struct switchdev_notifier_fdb_info *fdb_info; 2937 struct dpaa2_switch_lag *lag; 2938 int err; 2939 2940 fdb_info = &switchdev_work->fdb_info; 2941 2942 /* The lag structures are freed only from dpaa2_switch_remove(), which 2943 * first flushes this workqueue, so the pointer stays valid for the 2944 * lifetime of the work item. Only the dereference needs the RCU 2945 * read-side lock; the FDB helpers below can sleep and must run outside 2946 * of it. 2947 */ 2948 rcu_read_lock(); 2949 lag = rcu_dereference(port_priv->lag); 2950 rcu_read_unlock(); 2951 2952 switch (switchdev_work->event) { 2953 case SWITCHDEV_FDB_ADD_TO_DEVICE: 2954 if (lag) 2955 err = dpaa2_switch_lag_fdb_add(lag, fdb_info->addr, 2956 switchdev_work->vid); 2957 else 2958 err = dpaa2_switch_port_fdb_add(port_priv, 2959 fdb_info->addr); 2960 if (err) 2961 break; 2962 fdb_info->offloaded = true; 2963 call_switchdev_notifiers(SWITCHDEV_FDB_OFFLOADED, orig_dev, 2964 &fdb_info->info, NULL); 2965 break; 2966 case SWITCHDEV_FDB_DEL_TO_DEVICE: 2967 if (lag) 2968 dpaa2_switch_lag_fdb_del(lag, fdb_info->addr, 2969 switchdev_work->vid); 2970 else 2971 dpaa2_switch_port_fdb_del(port_priv, fdb_info->addr); 2972 break; 2973 } 2974 2975 kfree(switchdev_work->fdb_info.addr); 2976 kfree(switchdev_work); 2977 dev_put(dev); 2978 dev_put(orig_dev); 2979 } 2980 2981 static int 2982 dpaa2_switch_port_fdb_event(struct net_device *dev, 2983 struct net_device *orig_dev, 2984 unsigned long event, const void *ctx, 2985 const struct switchdev_notifier_fdb_info *fdb_info) 2986 { 2987 struct ethsw_port_priv *port_priv = netdev_priv(dev); 2988 struct ethsw_switchdev_event_work *switchdev_work; 2989 struct ethsw_core *ethsw = port_priv->ethsw_data; 2990 2991 if (ctx && ctx != port_priv) 2992 return 0; 2993 2994 /* For the moment, do nothing with entries towards foreign devices */ 2995 if (dpaa2_switch_foreign_dev_check(dev, orig_dev)) 2996 return 0; 2997 2998 if (!fdb_info->added_by_user || fdb_info->is_local) 2999 return 0; 3000 3001 switchdev_work = kzalloc_obj(*switchdev_work, GFP_ATOMIC); 3002 if (!switchdev_work) 3003 return -ENOMEM; 3004 3005 INIT_WORK(&switchdev_work->work, dpaa2_switch_event_work); 3006 switchdev_work->dev = dev; 3007 switchdev_work->event = event; 3008 switchdev_work->orig_dev = orig_dev; 3009 switchdev_work->vid = fdb_info->vid; 3010 3011 switch (event) { 3012 case SWITCHDEV_FDB_ADD_TO_DEVICE: 3013 case SWITCHDEV_FDB_DEL_TO_DEVICE: 3014 memcpy(&switchdev_work->fdb_info, fdb_info, 3015 sizeof(switchdev_work->fdb_info)); 3016 switchdev_work->fdb_info.addr = kzalloc(ETH_ALEN, GFP_ATOMIC); 3017 if (!switchdev_work->fdb_info.addr) 3018 goto err_addr_alloc; 3019 3020 ether_addr_copy((u8 *)switchdev_work->fdb_info.addr, 3021 fdb_info->addr); 3022 3023 /* Take a reference on the device to avoid being freed. */ 3024 dev_hold(dev); 3025 dev_hold(orig_dev); 3026 break; 3027 default: 3028 kfree(switchdev_work); 3029 return 0; 3030 } 3031 3032 queue_work(ethsw->workqueue, &switchdev_work->work); 3033 3034 return 0; 3035 3036 err_addr_alloc: 3037 kfree(switchdev_work); 3038 return -ENOMEM; 3039 } 3040 3041 /* Called under rcu_read_lock() */ 3042 static int dpaa2_switch_port_event(struct notifier_block *nb, 3043 unsigned long event, void *ptr) 3044 { 3045 struct net_device *dev = switchdev_notifier_info_to_dev(ptr); 3046 int err; 3047 3048 switch (event) { 3049 case SWITCHDEV_PORT_ATTR_SET: 3050 return dpaa2_switch_port_attr_set_event(dev, ptr); 3051 case SWITCHDEV_FDB_ADD_TO_DEVICE: 3052 case SWITCHDEV_FDB_DEL_TO_DEVICE: 3053 err = switchdev_handle_fdb_event_to_device(dev, event, ptr, 3054 dpaa2_switch_port_dev_check, 3055 dpaa2_switch_foreign_dev_check, 3056 dpaa2_switch_port_fdb_event); 3057 return notifier_from_errno(err); 3058 default: 3059 return NOTIFY_DONE; 3060 } 3061 } 3062 3063 static int dpaa2_switch_port_blocking_event(struct notifier_block *nb, 3064 unsigned long event, void *ptr) 3065 { 3066 struct net_device *dev = switchdev_notifier_info_to_dev(ptr); 3067 int err; 3068 3069 switch (event) { 3070 case SWITCHDEV_PORT_OBJ_ADD: 3071 err = switchdev_handle_port_obj_add(dev, ptr, 3072 dpaa2_switch_port_dev_check, 3073 dpaa2_switch_port_obj_add); 3074 return notifier_from_errno(err); 3075 case SWITCHDEV_PORT_OBJ_DEL: 3076 err = switchdev_handle_port_obj_del(dev, ptr, 3077 dpaa2_switch_port_dev_check, 3078 dpaa2_switch_port_obj_del); 3079 return notifier_from_errno(err); 3080 case SWITCHDEV_PORT_ATTR_SET: 3081 return dpaa2_switch_port_attr_set_event(dev, ptr); 3082 } 3083 3084 return NOTIFY_DONE; 3085 } 3086 3087 /* Build a linear skb based on a single-buffer frame descriptor */ 3088 static struct sk_buff *dpaa2_switch_build_linear_skb(struct ethsw_core *ethsw, 3089 const struct dpaa2_fd *fd, 3090 void *fd_vaddr) 3091 { 3092 u16 fd_offset = dpaa2_fd_get_offset(fd); 3093 u32 fd_length = dpaa2_fd_get_len(fd); 3094 struct device *dev = ethsw->dev; 3095 struct sk_buff *skb = NULL; 3096 3097 skb = build_skb(fd_vaddr, DPAA2_SWITCH_RX_BUF_SIZE + 3098 SKB_DATA_ALIGN(sizeof(struct skb_shared_info))); 3099 if (unlikely(!skb)) { 3100 dev_err(dev, "build_skb() failed\n"); 3101 return NULL; 3102 } 3103 3104 skb_reserve(skb, fd_offset); 3105 skb_put(skb, fd_length); 3106 3107 ethsw->buf_count--; 3108 3109 return skb; 3110 } 3111 3112 static void dpaa2_switch_tx_conf(struct dpaa2_switch_fq *fq, 3113 const struct dpaa2_fd *fd) 3114 { 3115 dpaa2_switch_free_fd(fq->ethsw, fd); 3116 } 3117 3118 static void dpaa2_switch_rx(struct dpaa2_switch_fq *fq, 3119 const struct dpaa2_fd *fd) 3120 { 3121 dma_addr_t addr = dpaa2_fd_get_addr(fd); 3122 struct ethsw_core *ethsw = fq->ethsw; 3123 struct ethsw_port_priv *port_priv; 3124 struct dpaa2_switch_lag *lag; 3125 struct net_device *netdev; 3126 struct vlan_ethhdr *hdr; 3127 struct sk_buff *skb; 3128 u16 vlan_tci, vid; 3129 int if_id, err; 3130 void *vaddr; 3131 u64 flc; 3132 3133 vaddr = dpaa2_iova_to_virt(ethsw->iommu_domain, addr); 3134 dma_unmap_page(ethsw->dev, addr, DPAA2_SWITCH_RX_BUF_SIZE, 3135 DMA_FROM_DEVICE); 3136 3137 /* get switch ingress interface ID */ 3138 flc = dpaa2_fd_get_flc(fd); 3139 if_id = DPAA2_ETHSW_FLC_IF_ID(flc); 3140 if (if_id >= ethsw->sw_attr.num_ifs) { 3141 dev_err(ethsw->dev, "Frame received from unknown interface!\n"); 3142 goto err_free_fd; 3143 } 3144 port_priv = ethsw->ports[if_id]; 3145 netdev = port_priv->netdev; 3146 3147 /* build the SKB based on the FD received */ 3148 if (dpaa2_fd_get_format(fd) != dpaa2_fd_single) { 3149 if (net_ratelimit()) { 3150 netdev_err(netdev, "Received invalid frame format\n"); 3151 goto err_free_fd; 3152 } 3153 } 3154 3155 skb = dpaa2_switch_build_linear_skb(ethsw, fd, vaddr); 3156 if (unlikely(!skb)) 3157 goto err_free_fd; 3158 3159 skb_reset_mac_header(skb); 3160 3161 /* Remove the VLAN header if the packet that we just received has a vid 3162 * equal to the port PVIDs. Since the dpaa2-switch can operate only in 3163 * VLAN-aware mode and no alterations are made on the packet when it's 3164 * redirected/mirrored to the control interface, we are sure that there 3165 * will always be a VLAN header present. 3166 */ 3167 hdr = vlan_eth_hdr(skb); 3168 vid = ntohs(hdr->h_vlan_TCI) & VLAN_VID_MASK; 3169 if (vid == port_priv->pvid) { 3170 err = __skb_vlan_pop(skb, &vlan_tci); 3171 if (err) { 3172 dev_info(ethsw->dev, "__skb_vlan_pop() returned %d", err); 3173 kfree_skb(skb); 3174 return; 3175 } 3176 } 3177 3178 rcu_read_lock(); 3179 3180 lag = rcu_dereference(port_priv->lag); 3181 if (DPAA2_ETHSW_FLC_IMPRECISE_IF_ID(flc) && lag) 3182 skb->dev = lag->bond_dev; 3183 else 3184 skb->dev = netdev; 3185 skb->protocol = eth_type_trans(skb, skb->dev); 3186 3187 /* Setup the offload_fwd_mark only if the port is under a bridge */ 3188 skb->offload_fwd_mark = !!(port_priv->fdb->bridge_dev); 3189 3190 rcu_read_unlock(); 3191 3192 netif_receive_skb(skb); 3193 3194 return; 3195 3196 err_free_fd: 3197 free_pages((unsigned long)vaddr, 0); 3198 } 3199 3200 static void dpaa2_switch_detect_features(struct ethsw_core *ethsw) 3201 { 3202 ethsw->features = 0; 3203 3204 if (ethsw->major > 8 || (ethsw->major == 8 && ethsw->minor >= 6)) 3205 ethsw->features |= ETHSW_FEATURE_MAC_ADDR; 3206 3207 if (ethsw->major > 8 || (ethsw->major == 8 && ethsw->minor >= 13)) 3208 ethsw->features |= ETHSW_FEATURE_LAG_OFFLOAD; 3209 } 3210 3211 static int dpaa2_switch_setup_fqs(struct ethsw_core *ethsw) 3212 { 3213 struct dpsw_ctrl_if_attr ctrl_if_attr; 3214 struct device *dev = ethsw->dev; 3215 int i = 0; 3216 int err; 3217 3218 err = dpsw_ctrl_if_get_attributes(ethsw->mc_io, 0, ethsw->dpsw_handle, 3219 &ctrl_if_attr); 3220 if (err) { 3221 dev_err(dev, "dpsw_ctrl_if_get_attributes() = %d\n", err); 3222 return err; 3223 } 3224 3225 ethsw->fq[i].fqid = ctrl_if_attr.rx_fqid; 3226 ethsw->fq[i].ethsw = ethsw; 3227 ethsw->fq[i++].type = DPSW_QUEUE_RX; 3228 3229 ethsw->fq[i].fqid = ctrl_if_attr.tx_err_conf_fqid; 3230 ethsw->fq[i].ethsw = ethsw; 3231 ethsw->fq[i++].type = DPSW_QUEUE_TX_ERR_CONF; 3232 3233 return 0; 3234 } 3235 3236 /* Free buffers acquired from the buffer pool or which were meant to 3237 * be released in the pool 3238 */ 3239 static void dpaa2_switch_free_bufs(struct ethsw_core *ethsw, u64 *buf_array, int count) 3240 { 3241 struct device *dev = ethsw->dev; 3242 void *vaddr; 3243 int i; 3244 3245 for (i = 0; i < count; i++) { 3246 vaddr = dpaa2_iova_to_virt(ethsw->iommu_domain, buf_array[i]); 3247 dma_unmap_page(dev, buf_array[i], DPAA2_SWITCH_RX_BUF_SIZE, 3248 DMA_FROM_DEVICE); 3249 free_pages((unsigned long)vaddr, 0); 3250 } 3251 } 3252 3253 /* Perform a single release command to add buffers 3254 * to the specified buffer pool 3255 */ 3256 static int dpaa2_switch_add_bufs(struct ethsw_core *ethsw, u16 bpid) 3257 { 3258 struct device *dev = ethsw->dev; 3259 u64 buf_array[BUFS_PER_CMD]; 3260 struct page *page; 3261 int retries = 0; 3262 dma_addr_t addr; 3263 int err; 3264 int i; 3265 3266 for (i = 0; i < BUFS_PER_CMD; i++) { 3267 /* Allocate one page for each Rx buffer. WRIOP sees 3268 * the entire page except for a tailroom reserved for 3269 * skb shared info 3270 */ 3271 page = dev_alloc_pages(0); 3272 if (!page) { 3273 dev_err(dev, "buffer allocation failed\n"); 3274 goto err_alloc; 3275 } 3276 3277 addr = dma_map_page(dev, page, 0, DPAA2_SWITCH_RX_BUF_SIZE, 3278 DMA_FROM_DEVICE); 3279 if (dma_mapping_error(dev, addr)) { 3280 dev_err(dev, "dma_map_single() failed\n"); 3281 goto err_map; 3282 } 3283 buf_array[i] = addr; 3284 } 3285 3286 release_bufs: 3287 /* In case the portal is busy, retry until successful or 3288 * max retries hit. 3289 */ 3290 while ((err = dpaa2_io_service_release(NULL, bpid, 3291 buf_array, i)) == -EBUSY) { 3292 if (retries++ >= DPAA2_SWITCH_SWP_BUSY_RETRIES) 3293 break; 3294 3295 cpu_relax(); 3296 } 3297 3298 /* If release command failed, clean up and bail out. */ 3299 if (err) { 3300 dpaa2_switch_free_bufs(ethsw, buf_array, i); 3301 return 0; 3302 } 3303 3304 return i; 3305 3306 err_map: 3307 __free_pages(page, 0); 3308 err_alloc: 3309 /* If we managed to allocate at least some buffers, 3310 * release them to hardware 3311 */ 3312 if (i) 3313 goto release_bufs; 3314 3315 return 0; 3316 } 3317 3318 static int dpaa2_switch_refill_bp(struct ethsw_core *ethsw) 3319 { 3320 int *count = ðsw->buf_count; 3321 int new_count; 3322 int err = 0; 3323 3324 if (unlikely(*count < DPAA2_ETHSW_REFILL_THRESH)) { 3325 do { 3326 new_count = dpaa2_switch_add_bufs(ethsw, ethsw->bpid); 3327 if (unlikely(!new_count)) { 3328 /* Out of memory; abort for now, we'll 3329 * try later on 3330 */ 3331 break; 3332 } 3333 *count += new_count; 3334 } while (*count < DPAA2_ETHSW_NUM_BUFS); 3335 3336 if (unlikely(*count < DPAA2_ETHSW_NUM_BUFS)) 3337 err = -ENOMEM; 3338 } 3339 3340 return err; 3341 } 3342 3343 static int dpaa2_switch_seed_bp(struct ethsw_core *ethsw) 3344 { 3345 int *count, ret, i; 3346 3347 for (i = 0; i < DPAA2_ETHSW_NUM_BUFS; i += BUFS_PER_CMD) { 3348 ret = dpaa2_switch_add_bufs(ethsw, ethsw->bpid); 3349 count = ðsw->buf_count; 3350 *count += ret; 3351 3352 if (unlikely(ret < BUFS_PER_CMD)) 3353 return -ENOMEM; 3354 } 3355 3356 return 0; 3357 } 3358 3359 static void dpaa2_switch_drain_bp(struct ethsw_core *ethsw) 3360 { 3361 u64 buf_array[BUFS_PER_CMD]; 3362 int ret; 3363 3364 do { 3365 ret = dpaa2_io_service_acquire(NULL, ethsw->bpid, 3366 buf_array, BUFS_PER_CMD); 3367 if (ret < 0) { 3368 dev_err(ethsw->dev, 3369 "dpaa2_io_service_acquire() = %d\n", ret); 3370 return; 3371 } 3372 dpaa2_switch_free_bufs(ethsw, buf_array, ret); 3373 3374 } while (ret); 3375 } 3376 3377 static int dpaa2_switch_setup_dpbp(struct ethsw_core *ethsw) 3378 { 3379 struct dpsw_ctrl_if_pools_cfg dpsw_ctrl_if_pools_cfg = { 0 }; 3380 struct device *dev = ethsw->dev; 3381 struct fsl_mc_device *dpbp_dev; 3382 struct dpbp_attr dpbp_attrs; 3383 int err; 3384 3385 err = fsl_mc_object_allocate(to_fsl_mc_device(dev), FSL_MC_POOL_DPBP, 3386 &dpbp_dev); 3387 if (err) { 3388 if (err == -ENXIO) 3389 err = -EPROBE_DEFER; 3390 else 3391 dev_err(dev, "DPBP device allocation failed\n"); 3392 return err; 3393 } 3394 ethsw->dpbp_dev = dpbp_dev; 3395 3396 err = dpbp_open(ethsw->mc_io, 0, dpbp_dev->obj_desc.id, 3397 &dpbp_dev->mc_handle); 3398 if (err) { 3399 dev_err(dev, "dpbp_open() failed\n"); 3400 goto err_open; 3401 } 3402 3403 err = dpbp_reset(ethsw->mc_io, 0, dpbp_dev->mc_handle); 3404 if (err) { 3405 dev_err(dev, "dpbp_reset() failed\n"); 3406 goto err_reset; 3407 } 3408 3409 err = dpbp_enable(ethsw->mc_io, 0, dpbp_dev->mc_handle); 3410 if (err) { 3411 dev_err(dev, "dpbp_enable() failed\n"); 3412 goto err_enable; 3413 } 3414 3415 err = dpbp_get_attributes(ethsw->mc_io, 0, dpbp_dev->mc_handle, 3416 &dpbp_attrs); 3417 if (err) { 3418 dev_err(dev, "dpbp_get_attributes() failed\n"); 3419 goto err_get_attr; 3420 } 3421 3422 dpsw_ctrl_if_pools_cfg.num_dpbp = 1; 3423 dpsw_ctrl_if_pools_cfg.pools[0].dpbp_id = dpbp_attrs.id; 3424 dpsw_ctrl_if_pools_cfg.pools[0].buffer_size = DPAA2_SWITCH_RX_BUF_SIZE; 3425 dpsw_ctrl_if_pools_cfg.pools[0].backup_pool = 0; 3426 3427 err = dpsw_ctrl_if_set_pools(ethsw->mc_io, 0, ethsw->dpsw_handle, 3428 &dpsw_ctrl_if_pools_cfg); 3429 if (err) { 3430 dev_err(dev, "dpsw_ctrl_if_set_pools() failed\n"); 3431 goto err_get_attr; 3432 } 3433 ethsw->bpid = dpbp_attrs.bpid; 3434 3435 return 0; 3436 3437 err_get_attr: 3438 dpbp_disable(ethsw->mc_io, 0, dpbp_dev->mc_handle); 3439 err_enable: 3440 err_reset: 3441 dpbp_close(ethsw->mc_io, 0, dpbp_dev->mc_handle); 3442 err_open: 3443 fsl_mc_object_free(dpbp_dev); 3444 return err; 3445 } 3446 3447 static void dpaa2_switch_free_dpbp(struct ethsw_core *ethsw) 3448 { 3449 dpbp_disable(ethsw->mc_io, 0, ethsw->dpbp_dev->mc_handle); 3450 dpbp_close(ethsw->mc_io, 0, ethsw->dpbp_dev->mc_handle); 3451 fsl_mc_object_free(ethsw->dpbp_dev); 3452 } 3453 3454 static int dpaa2_switch_alloc_rings(struct ethsw_core *ethsw) 3455 { 3456 int i; 3457 3458 for (i = 0; i < DPAA2_SWITCH_RX_NUM_FQS; i++) { 3459 ethsw->fq[i].store = 3460 dpaa2_io_store_create(DPAA2_SWITCH_STORE_SIZE, 3461 ethsw->dev); 3462 if (!ethsw->fq[i].store) { 3463 dev_err(ethsw->dev, "dpaa2_io_store_create failed\n"); 3464 while (--i >= 0) 3465 dpaa2_io_store_destroy(ethsw->fq[i].store); 3466 return -ENOMEM; 3467 } 3468 } 3469 3470 return 0; 3471 } 3472 3473 static void dpaa2_switch_destroy_rings(struct ethsw_core *ethsw) 3474 { 3475 int i; 3476 3477 for (i = 0; i < DPAA2_SWITCH_RX_NUM_FQS; i++) 3478 dpaa2_io_store_destroy(ethsw->fq[i].store); 3479 } 3480 3481 static int dpaa2_switch_pull_fq(struct dpaa2_switch_fq *fq) 3482 { 3483 int err, retries = 0; 3484 3485 /* Try to pull from the FQ while the portal is busy and we didn't hit 3486 * the maximum number fo retries 3487 */ 3488 do { 3489 err = dpaa2_io_service_pull_fq(NULL, fq->fqid, fq->store); 3490 cpu_relax(); 3491 } while (err == -EBUSY && retries++ < DPAA2_SWITCH_SWP_BUSY_RETRIES); 3492 3493 if (unlikely(err)) 3494 dev_err(fq->ethsw->dev, "dpaa2_io_service_pull err %d", err); 3495 3496 return err; 3497 } 3498 3499 /* Consume all frames pull-dequeued into the store */ 3500 static int dpaa2_switch_store_consume(struct dpaa2_switch_fq *fq) 3501 { 3502 struct ethsw_core *ethsw = fq->ethsw; 3503 int cleaned = 0, is_last; 3504 struct dpaa2_dq *dq; 3505 int retries = 0; 3506 3507 do { 3508 /* Get the next available FD from the store */ 3509 dq = dpaa2_io_store_next(fq->store, &is_last); 3510 if (unlikely(!dq)) { 3511 if (retries++ >= DPAA2_SWITCH_SWP_BUSY_RETRIES) { 3512 dev_err_once(ethsw->dev, 3513 "No valid dequeue response\n"); 3514 return -ETIMEDOUT; 3515 } 3516 continue; 3517 } 3518 3519 if (fq->type == DPSW_QUEUE_RX) 3520 dpaa2_switch_rx(fq, dpaa2_dq_fd(dq)); 3521 else 3522 dpaa2_switch_tx_conf(fq, dpaa2_dq_fd(dq)); 3523 cleaned++; 3524 3525 } while (!is_last); 3526 3527 return cleaned; 3528 } 3529 3530 /* NAPI poll routine */ 3531 static int dpaa2_switch_poll(struct napi_struct *napi, int budget) 3532 { 3533 int err, cleaned = 0, store_cleaned, work_done; 3534 struct dpaa2_switch_fq *fq; 3535 int retries = 0; 3536 3537 fq = container_of(napi, struct dpaa2_switch_fq, napi); 3538 3539 do { 3540 err = dpaa2_switch_pull_fq(fq); 3541 if (unlikely(err)) 3542 break; 3543 3544 /* Refill pool if appropriate */ 3545 dpaa2_switch_refill_bp(fq->ethsw); 3546 3547 store_cleaned = dpaa2_switch_store_consume(fq); 3548 cleaned += store_cleaned; 3549 3550 if (cleaned >= budget) { 3551 work_done = budget; 3552 goto out; 3553 } 3554 3555 } while (store_cleaned); 3556 3557 /* We didn't consume the entire budget, so finish napi and re-enable 3558 * data availability notifications 3559 */ 3560 napi_complete_done(napi, cleaned); 3561 do { 3562 err = dpaa2_io_service_rearm(NULL, &fq->nctx); 3563 cpu_relax(); 3564 } while (err == -EBUSY && retries++ < DPAA2_SWITCH_SWP_BUSY_RETRIES); 3565 3566 work_done = max(cleaned, 1); 3567 out: 3568 3569 return work_done; 3570 } 3571 3572 static void dpaa2_switch_fqdan_cb(struct dpaa2_io_notification_ctx *nctx) 3573 { 3574 struct dpaa2_switch_fq *fq; 3575 3576 fq = container_of(nctx, struct dpaa2_switch_fq, nctx); 3577 3578 napi_schedule(&fq->napi); 3579 } 3580 3581 static int dpaa2_switch_setup_dpio(struct ethsw_core *ethsw) 3582 { 3583 struct dpsw_ctrl_if_queue_cfg queue_cfg; 3584 struct dpaa2_io_notification_ctx *nctx; 3585 int err, i, j; 3586 3587 for (i = 0; i < DPAA2_SWITCH_RX_NUM_FQS; i++) { 3588 nctx = ðsw->fq[i].nctx; 3589 3590 /* Register a new software context for the FQID. 3591 * By using NULL as the first parameter, we specify that we do 3592 * not care on which cpu are interrupts received for this queue 3593 */ 3594 nctx->is_cdan = 0; 3595 nctx->id = ethsw->fq[i].fqid; 3596 nctx->desired_cpu = DPAA2_IO_ANY_CPU; 3597 nctx->cb = dpaa2_switch_fqdan_cb; 3598 err = dpaa2_io_service_register(NULL, nctx, ethsw->dev); 3599 if (err) { 3600 err = -EPROBE_DEFER; 3601 goto err_register; 3602 } 3603 3604 queue_cfg.options = DPSW_CTRL_IF_QUEUE_OPT_DEST | 3605 DPSW_CTRL_IF_QUEUE_OPT_USER_CTX; 3606 queue_cfg.dest_cfg.dest_type = DPSW_CTRL_IF_DEST_DPIO; 3607 queue_cfg.dest_cfg.dest_id = nctx->dpio_id; 3608 queue_cfg.dest_cfg.priority = 0; 3609 queue_cfg.user_ctx = nctx->qman64; 3610 3611 err = dpsw_ctrl_if_set_queue(ethsw->mc_io, 0, 3612 ethsw->dpsw_handle, 3613 ethsw->fq[i].type, 3614 &queue_cfg); 3615 if (err) 3616 goto err_set_queue; 3617 } 3618 3619 return 0; 3620 3621 err_set_queue: 3622 dpaa2_io_service_deregister(NULL, nctx, ethsw->dev); 3623 err_register: 3624 for (j = 0; j < i; j++) 3625 dpaa2_io_service_deregister(NULL, ðsw->fq[j].nctx, 3626 ethsw->dev); 3627 3628 return err; 3629 } 3630 3631 static void dpaa2_switch_free_dpio(struct ethsw_core *ethsw) 3632 { 3633 int i; 3634 3635 for (i = 0; i < DPAA2_SWITCH_RX_NUM_FQS; i++) 3636 dpaa2_io_service_deregister(NULL, ðsw->fq[i].nctx, 3637 ethsw->dev); 3638 } 3639 3640 static int dpaa2_switch_ctrl_if_setup(struct ethsw_core *ethsw) 3641 { 3642 int err; 3643 3644 /* setup FQs for Rx and Tx Conf */ 3645 err = dpaa2_switch_setup_fqs(ethsw); 3646 if (err) 3647 return err; 3648 3649 /* setup the buffer pool needed on the Rx path */ 3650 err = dpaa2_switch_setup_dpbp(ethsw); 3651 if (err) 3652 return err; 3653 3654 err = dpaa2_switch_alloc_rings(ethsw); 3655 if (err) 3656 goto err_free_dpbp; 3657 3658 err = dpaa2_switch_setup_dpio(ethsw); 3659 if (err) 3660 goto err_destroy_rings; 3661 3662 err = dpaa2_switch_seed_bp(ethsw); 3663 if (err) 3664 goto err_deregister_dpio; 3665 3666 err = dpsw_ctrl_if_enable(ethsw->mc_io, 0, ethsw->dpsw_handle); 3667 if (err) { 3668 dev_err(ethsw->dev, "dpsw_ctrl_if_enable err %d\n", err); 3669 goto err_drain_dpbp; 3670 } 3671 3672 return 0; 3673 3674 err_drain_dpbp: 3675 dpaa2_switch_drain_bp(ethsw); 3676 err_deregister_dpio: 3677 dpaa2_switch_free_dpio(ethsw); 3678 err_destroy_rings: 3679 dpaa2_switch_destroy_rings(ethsw); 3680 err_free_dpbp: 3681 dpaa2_switch_free_dpbp(ethsw); 3682 3683 return err; 3684 } 3685 3686 static void dpaa2_switch_remove_port(struct ethsw_core *ethsw, 3687 u16 port_idx) 3688 { 3689 struct ethsw_port_priv *port_priv = ethsw->ports[port_idx]; 3690 3691 dpaa2_switch_port_disconnect_mac(port_priv); 3692 free_netdev(port_priv->netdev); 3693 ethsw->ports[port_idx] = NULL; 3694 } 3695 3696 static int dpaa2_switch_init(struct fsl_mc_device *sw_dev) 3697 { 3698 struct device *dev = &sw_dev->dev; 3699 struct ethsw_core *ethsw = dev_get_drvdata(dev); 3700 struct dpsw_vlan_if_cfg vcfg = {0}; 3701 struct dpsw_tci_cfg tci_cfg = {0}; 3702 struct dpsw_stp_cfg stp_cfg; 3703 int err; 3704 u16 i; 3705 3706 ethsw->dev_id = sw_dev->obj_desc.id; 3707 3708 err = dpsw_open(ethsw->mc_io, 0, ethsw->dev_id, ðsw->dpsw_handle); 3709 if (err) { 3710 dev_err(dev, "dpsw_open err %d\n", err); 3711 return err; 3712 } 3713 3714 err = dpsw_get_attributes(ethsw->mc_io, 0, ethsw->dpsw_handle, 3715 ðsw->sw_attr); 3716 if (err) { 3717 dev_err(dev, "dpsw_get_attributes err %d\n", err); 3718 goto err_close; 3719 } 3720 3721 if (!ethsw->sw_attr.num_ifs) { 3722 dev_err(dev, "DPSW device has no interfaces\n"); 3723 err = -ENODEV; 3724 goto err_close; 3725 } 3726 3727 if (ethsw->sw_attr.num_ifs >= DPSW_MAX_IF) { 3728 dev_err(dev, "DPSW num_ifs %u exceeds max %u\n", 3729 ethsw->sw_attr.num_ifs, DPSW_MAX_IF); 3730 err = -EINVAL; 3731 goto err_close; 3732 } 3733 3734 err = dpsw_get_api_version(ethsw->mc_io, 0, 3735 ðsw->major, 3736 ðsw->minor); 3737 if (err) { 3738 dev_err(dev, "dpsw_get_api_version err %d\n", err); 3739 goto err_close; 3740 } 3741 3742 /* Minimum supported DPSW version check */ 3743 if (ethsw->major < DPSW_MIN_VER_MAJOR || 3744 (ethsw->major == DPSW_MIN_VER_MAJOR && 3745 ethsw->minor < DPSW_MIN_VER_MINOR)) { 3746 dev_err(dev, "DPSW version %d:%d not supported. Use firmware 10.28.0 or greater.\n", 3747 ethsw->major, ethsw->minor); 3748 err = -EOPNOTSUPP; 3749 goto err_close; 3750 } 3751 3752 if (!dpaa2_switch_supports_cpu_traffic(ethsw)) { 3753 err = -EOPNOTSUPP; 3754 goto err_close; 3755 } 3756 3757 dpaa2_switch_detect_features(ethsw); 3758 3759 err = dpsw_reset(ethsw->mc_io, 0, ethsw->dpsw_handle); 3760 if (err) { 3761 dev_err(dev, "dpsw_reset err %d\n", err); 3762 goto err_close; 3763 } 3764 3765 stp_cfg.vlan_id = DEFAULT_VLAN_ID; 3766 stp_cfg.state = DPSW_STP_STATE_FORWARDING; 3767 3768 for (i = 0; i < ethsw->sw_attr.num_ifs; i++) { 3769 err = dpsw_if_disable(ethsw->mc_io, 0, ethsw->dpsw_handle, i); 3770 if (err) { 3771 dev_err(dev, "dpsw_if_disable err %d\n", err); 3772 goto err_close; 3773 } 3774 3775 err = dpsw_if_set_stp(ethsw->mc_io, 0, ethsw->dpsw_handle, i, 3776 &stp_cfg); 3777 if (err) { 3778 dev_err(dev, "dpsw_if_set_stp err %d for port %d\n", 3779 err, i); 3780 goto err_close; 3781 } 3782 3783 /* Switch starts with all ports configured to VLAN 1. Need to 3784 * remove this setting to allow configuration at bridge join 3785 */ 3786 vcfg.num_ifs = 1; 3787 vcfg.if_id[0] = i; 3788 err = dpsw_vlan_remove_if_untagged(ethsw->mc_io, 0, ethsw->dpsw_handle, 3789 DEFAULT_VLAN_ID, &vcfg); 3790 if (err) { 3791 dev_err(dev, "dpsw_vlan_remove_if_untagged err %d\n", 3792 err); 3793 goto err_close; 3794 } 3795 3796 tci_cfg.vlan_id = 4095; 3797 err = dpsw_if_set_tci(ethsw->mc_io, 0, ethsw->dpsw_handle, i, &tci_cfg); 3798 if (err) { 3799 dev_err(dev, "dpsw_if_set_tci err %d\n", err); 3800 goto err_close; 3801 } 3802 3803 err = dpsw_vlan_remove_if(ethsw->mc_io, 0, ethsw->dpsw_handle, 3804 DEFAULT_VLAN_ID, &vcfg); 3805 if (err) { 3806 dev_err(dev, "dpsw_vlan_remove_if err %d\n", err); 3807 goto err_close; 3808 } 3809 } 3810 3811 err = dpsw_vlan_remove(ethsw->mc_io, 0, ethsw->dpsw_handle, DEFAULT_VLAN_ID); 3812 if (err) { 3813 dev_err(dev, "dpsw_vlan_remove err %d\n", err); 3814 goto err_close; 3815 } 3816 3817 ethsw->workqueue = alloc_ordered_workqueue("%s_%d_ordered", 3818 WQ_MEM_RECLAIM, "ethsw", 3819 ethsw->sw_attr.id); 3820 if (!ethsw->workqueue) { 3821 err = -ENOMEM; 3822 goto err_close; 3823 } 3824 3825 err = dpsw_fdb_remove(ethsw->mc_io, 0, ethsw->dpsw_handle, 0); 3826 if (err) 3827 goto err_destroy_ordered_workqueue; 3828 3829 err = dpaa2_switch_ctrl_if_setup(ethsw); 3830 if (err) 3831 goto err_destroy_ordered_workqueue; 3832 3833 return 0; 3834 3835 err_destroy_ordered_workqueue: 3836 destroy_workqueue(ethsw->workqueue); 3837 3838 err_close: 3839 dpsw_close(ethsw->mc_io, 0, ethsw->dpsw_handle); 3840 return err; 3841 } 3842 3843 /* Add an ACL to redirect frames to control interface based on the dst MAC */ 3844 static int dpaa2_switch_port_trap_mac_addr(struct ethsw_port_priv *port_priv, 3845 const u8 *mac, const u8 *mask) 3846 { 3847 struct dpaa2_switch_acl_entry acl_entry = {0}; 3848 3849 /* Match on the destination MAC address */ 3850 ether_addr_copy(acl_entry.key.match.l2_dest_mac, mac); 3851 ether_addr_copy(acl_entry.key.mask.l2_dest_mac, mask); 3852 3853 /* Trap to CPU */ 3854 acl_entry.cfg.precedence = 0; 3855 acl_entry.cfg.result.action = DPSW_ACL_ACTION_REDIRECT_TO_CTRL_IF; 3856 3857 return dpaa2_switch_acl_entry_add(port_priv->filter_block, &acl_entry); 3858 } 3859 3860 static int dpaa2_switch_port_init(struct ethsw_port_priv *port_priv, u16 port) 3861 { 3862 const u8 ll_mac[ETH_ALEN] = {0x01, 0x80, 0xc2, 0x00, 0x00, 0x00}; 3863 const u8 ll_mask[ETH_ALEN] = {0xff, 0xff, 0xff, 0xff, 0xff, 0xf0}; 3864 struct switchdev_obj_port_vlan vlan = { 3865 .obj.id = SWITCHDEV_OBJ_ID_PORT_VLAN, 3866 .vid = DEFAULT_VLAN_ID, 3867 .flags = BRIDGE_VLAN_INFO_UNTAGGED | BRIDGE_VLAN_INFO_PVID, 3868 }; 3869 struct net_device *netdev = port_priv->netdev; 3870 struct ethsw_core *ethsw = port_priv->ethsw_data; 3871 struct dpaa2_switch_filter_block *filter_block; 3872 struct dpsw_fdb_cfg fdb_cfg = {0}; 3873 struct dpsw_if_attr dpsw_if_attr; 3874 struct dpaa2_switch_fdb *fdb; 3875 struct dpsw_acl_cfg acl_cfg; 3876 u16 fdb_id, acl_tbl_id; 3877 int err; 3878 3879 /* Get the Tx queue for this specific port */ 3880 err = dpsw_if_get_attributes(ethsw->mc_io, 0, ethsw->dpsw_handle, 3881 port_priv->idx, &dpsw_if_attr); 3882 if (err) { 3883 netdev_err(netdev, "dpsw_if_get_attributes err %d\n", err); 3884 return err; 3885 } 3886 port_priv->tx_qdid = dpsw_if_attr.qdid; 3887 3888 /* Create a FDB table for this particular switch port */ 3889 fdb_cfg.num_fdb_entries = ethsw->sw_attr.max_fdb_entries / ethsw->sw_attr.num_ifs; 3890 err = dpsw_fdb_add(ethsw->mc_io, 0, ethsw->dpsw_handle, 3891 &fdb_id, &fdb_cfg); 3892 if (err) { 3893 netdev_err(netdev, "dpsw_fdb_add err %d\n", err); 3894 return err; 3895 } 3896 3897 /* Find an unused dpaa2_switch_fdb structure and use it */ 3898 fdb = dpaa2_switch_fdb_get_unused(ethsw); 3899 fdb->fdb_id = fdb_id; 3900 fdb->in_use = true; 3901 fdb->bridge_dev = NULL; 3902 port_priv->fdb = fdb; 3903 3904 /* We need to add VLAN 1 as the PVID on this port until it is under a 3905 * bridge since the DPAA2 switch is not able to handle the traffic in a 3906 * VLAN unaware fashion 3907 */ 3908 err = dpaa2_switch_port_vlans_add(netdev, &vlan); 3909 if (err) 3910 return err; 3911 3912 /* Setup the egress flooding domains (broadcast, unknown unicast */ 3913 err = dpaa2_switch_fdb_set_egress_flood(ethsw, port_priv->fdb->fdb_id); 3914 if (err) 3915 return err; 3916 3917 /* Create an ACL table to be used by this switch port */ 3918 acl_cfg.max_entries = DPAA2_ETHSW_PORT_MAX_ACL_ENTRIES; 3919 err = dpsw_acl_add(ethsw->mc_io, 0, ethsw->dpsw_handle, 3920 &acl_tbl_id, &acl_cfg); 3921 if (err) { 3922 netdev_err(netdev, "dpsw_acl_add err %d\n", err); 3923 return err; 3924 } 3925 3926 filter_block = dpaa2_switch_filter_block_get_unused(ethsw); 3927 filter_block->ethsw = ethsw; 3928 filter_block->acl_id = acl_tbl_id; 3929 filter_block->in_use = true; 3930 filter_block->num_acl_rules = 0; 3931 INIT_LIST_HEAD(&filter_block->acl_entries); 3932 INIT_LIST_HEAD(&filter_block->mirror_entries); 3933 3934 err = dpaa2_switch_port_acl_tbl_bind(port_priv, filter_block); 3935 if (err) 3936 return err; 3937 3938 return dpaa2_switch_port_trap_mac_addr(port_priv, ll_mac, ll_mask); 3939 } 3940 3941 static void dpaa2_switch_ctrl_if_teardown(struct ethsw_core *ethsw) 3942 { 3943 dpsw_ctrl_if_disable(ethsw->mc_io, 0, ethsw->dpsw_handle); 3944 dpaa2_switch_free_dpio(ethsw); 3945 dpaa2_switch_destroy_rings(ethsw); 3946 dpaa2_switch_drain_bp(ethsw); 3947 dpaa2_switch_free_dpbp(ethsw); 3948 } 3949 3950 static void dpaa2_switch_teardown(struct fsl_mc_device *sw_dev) 3951 { 3952 struct device *dev = &sw_dev->dev; 3953 struct ethsw_core *ethsw = dev_get_drvdata(dev); 3954 int err; 3955 3956 dpaa2_switch_ctrl_if_teardown(ethsw); 3957 3958 destroy_workqueue(ethsw->workqueue); 3959 3960 err = dpsw_close(ethsw->mc_io, 0, ethsw->dpsw_handle); 3961 if (err) 3962 dev_warn(dev, "dpsw_close err %d\n", err); 3963 } 3964 3965 static void dpaa2_switch_remove(struct fsl_mc_device *sw_dev) 3966 { 3967 struct ethsw_core *ethsw; 3968 struct device *dev; 3969 int i; 3970 3971 dev = &sw_dev->dev; 3972 ethsw = dev_get_drvdata(dev); 3973 3974 /* Make sure that all events were handled before we kfree anything */ 3975 flush_workqueue(ethsw->workqueue); 3976 3977 dpaa2_switch_teardown_irqs(sw_dev); 3978 3979 dpsw_disable(ethsw->mc_io, 0, ethsw->dpsw_handle); 3980 3981 /* Unregister all the netdevs so that they are brought down and the 3982 * shared NAPI instances gets disabled. 3983 */ 3984 for (i = 0; i < ethsw->sw_attr.num_ifs; i++) 3985 unregister_netdev(ethsw->ports[i]->netdev); 3986 3987 for (i = 0; i < DPAA2_SWITCH_RX_NUM_FQS; i++) 3988 netif_napi_del(ðsw->fq[i].napi); 3989 3990 for (i = 0; i < ethsw->sw_attr.num_ifs; i++) { 3991 dpaa2_switch_remove_port(ethsw, i); 3992 mutex_destroy(ðsw->lags[i].fdb_lock); 3993 } 3994 3995 kfree(ethsw->fdbs); 3996 kfree(ethsw->filter_blocks); 3997 kfree(ethsw->ports); 3998 kfree(ethsw->lags); 3999 4000 dpaa2_switch_teardown(sw_dev); 4001 4002 fsl_mc_portal_free(ethsw->mc_io); 4003 4004 kfree(ethsw); 4005 4006 dev_set_drvdata(dev, NULL); 4007 } 4008 4009 static int dpaa2_switch_probe_port(struct ethsw_core *ethsw, 4010 u16 port_idx) 4011 { 4012 struct ethsw_port_priv *port_priv; 4013 struct device *dev = ethsw->dev; 4014 struct net_device *port_netdev; 4015 int err; 4016 4017 port_netdev = alloc_etherdev(sizeof(struct ethsw_port_priv)); 4018 if (!port_netdev) { 4019 dev_err(dev, "alloc_etherdev error\n"); 4020 return -ENOMEM; 4021 } 4022 4023 port_priv = netdev_priv(port_netdev); 4024 port_priv->netdev = port_netdev; 4025 port_priv->ethsw_data = ethsw; 4026 rcu_assign_pointer(port_priv->lag, NULL); 4027 4028 mutex_init(&port_priv->mac_lock); 4029 4030 port_priv->idx = port_idx; 4031 port_priv->stp_state = BR_STATE_FORWARDING; 4032 4033 SET_NETDEV_DEV(port_netdev, dev); 4034 port_netdev->netdev_ops = &dpaa2_switch_port_ops; 4035 port_netdev->ethtool_ops = &dpaa2_switch_port_ethtool_ops; 4036 4037 port_netdev->needed_headroom = DPAA2_SWITCH_NEEDED_HEADROOM; 4038 4039 port_priv->bcast_flood = true; 4040 port_priv->ucast_flood = true; 4041 4042 /* Set MTU limits */ 4043 port_netdev->min_mtu = ETH_MIN_MTU; 4044 port_netdev->max_mtu = ETHSW_MAX_FRAME_LENGTH; 4045 4046 /* Populate the private port structure so that later calls to 4047 * dpaa2_switch_port_init() can use it. 4048 */ 4049 ethsw->ports[port_idx] = port_priv; 4050 4051 /* The DPAA2 switch's ingress path depends on the VLAN table, 4052 * thus we are not able to disable VLAN filtering. 4053 */ 4054 port_netdev->features = NETIF_F_HW_VLAN_CTAG_FILTER | 4055 NETIF_F_HW_VLAN_STAG_FILTER | 4056 NETIF_F_HW_TC; 4057 port_netdev->priv_flags |= IFF_LIVE_ADDR_CHANGE; 4058 4059 err = dpaa2_switch_port_init(port_priv, port_idx); 4060 if (err) 4061 goto err_port_probe; 4062 4063 err = dpaa2_switch_port_set_mac_addr(port_priv); 4064 if (err) 4065 goto err_port_probe; 4066 4067 err = dpaa2_switch_port_set_learning(port_priv, false); 4068 if (err) 4069 goto err_port_probe; 4070 port_priv->learn_ena = false; 4071 4072 err = dpaa2_switch_port_connect_mac(port_priv); 4073 if (err) 4074 goto err_port_probe; 4075 4076 return 0; 4077 4078 err_port_probe: 4079 free_netdev(port_netdev); 4080 ethsw->ports[port_idx] = NULL; 4081 4082 return err; 4083 } 4084 4085 static int dpaa2_switch_probe(struct fsl_mc_device *sw_dev) 4086 { 4087 struct device *dev = &sw_dev->dev; 4088 struct ethsw_core *ethsw; 4089 int i, err; 4090 4091 /* Allocate switch core*/ 4092 ethsw = kzalloc_obj(*ethsw); 4093 4094 if (!ethsw) 4095 return -ENOMEM; 4096 4097 ethsw->dev = dev; 4098 ethsw->iommu_domain = iommu_get_domain_for_dev(dev); 4099 dev_set_drvdata(dev, ethsw); 4100 4101 err = fsl_mc_portal_allocate(sw_dev, FSL_MC_IO_ATOMIC_CONTEXT_PORTAL, 4102 ðsw->mc_io); 4103 if (err) { 4104 if (err == -ENXIO) 4105 err = -EPROBE_DEFER; 4106 else 4107 dev_err(dev, "fsl_mc_portal_allocate err %d\n", err); 4108 goto err_free_drvdata; 4109 } 4110 4111 err = dpaa2_switch_init(sw_dev); 4112 if (err) 4113 goto err_free_cmdport; 4114 4115 ethsw->ports = kzalloc_objs(*ethsw->ports, ethsw->sw_attr.num_ifs); 4116 if (!(ethsw->ports)) { 4117 err = -ENOMEM; 4118 goto err_teardown; 4119 } 4120 4121 ethsw->fdbs = kzalloc_objs(*ethsw->fdbs, ethsw->sw_attr.num_ifs); 4122 if (!ethsw->fdbs) { 4123 err = -ENOMEM; 4124 goto err_free_ports; 4125 } 4126 4127 ethsw->filter_blocks = kzalloc_objs(*ethsw->filter_blocks, 4128 ethsw->sw_attr.num_ifs); 4129 if (!ethsw->filter_blocks) { 4130 err = -ENOMEM; 4131 goto err_free_fdbs; 4132 } 4133 4134 ethsw->lags = kcalloc(ethsw->sw_attr.num_ifs, sizeof(*ethsw->lags), 4135 GFP_KERNEL); 4136 if (!ethsw->lags) { 4137 err = -ENOMEM; 4138 goto err_free_filter; 4139 } 4140 for (i = 0; i < ethsw->sw_attr.num_ifs; i++) { 4141 ethsw->lags[i].bond_dev = NULL; 4142 ethsw->lags[i].ethsw = ethsw; 4143 ethsw->lags[i].id = i + 1; 4144 ethsw->lags[i].in_use = 0; 4145 mutex_init(ðsw->lags[i].fdb_lock); 4146 INIT_LIST_HEAD(ðsw->lags[i].fdbs); 4147 } 4148 4149 for (i = 0; i < ethsw->sw_attr.num_ifs; i++) { 4150 err = dpaa2_switch_probe_port(ethsw, i); 4151 if (err) 4152 goto err_free_netdev; 4153 } 4154 4155 /* Add a NAPI instance for each of the Rx queues. The first port's 4156 * net_device will be associated with the instances since we do not have 4157 * different queues for each switch ports. 4158 */ 4159 for (i = 0; i < DPAA2_SWITCH_RX_NUM_FQS; i++) 4160 netif_napi_add(ethsw->ports[0]->netdev, ðsw->fq[i].napi, 4161 dpaa2_switch_poll); 4162 4163 /* Setup IRQs */ 4164 err = dpaa2_switch_setup_irqs(sw_dev); 4165 if (err) 4166 goto err_stop; 4167 4168 /* By convention, if the mirror port is equal to the number of switch 4169 * interfaces, then mirroring of any kind is disabled. 4170 */ 4171 ethsw->mirror_port = ethsw->sw_attr.num_ifs; 4172 4173 /* Register the netdev only when the entire setup is done and the 4174 * switch port interfaces are ready to receive traffic 4175 */ 4176 for (i = 0; i < ethsw->sw_attr.num_ifs; i++) { 4177 err = register_netdev(ethsw->ports[i]->netdev); 4178 if (err < 0) { 4179 dev_err(dev, "register_netdev error %d\n", err); 4180 goto err_unregister_ports; 4181 } 4182 } 4183 4184 return 0; 4185 4186 err_unregister_ports: 4187 for (i--; i >= 0; i--) 4188 unregister_netdev(ethsw->ports[i]->netdev); 4189 dpaa2_switch_teardown_irqs(sw_dev); 4190 err_stop: 4191 dpsw_disable(ethsw->mc_io, 0, ethsw->dpsw_handle); 4192 err_free_netdev: 4193 for (i--; i >= 0; i--) 4194 dpaa2_switch_remove_port(ethsw, i); 4195 for (i = 0; i < ethsw->sw_attr.num_ifs; i++) 4196 mutex_destroy(ðsw->lags[i].fdb_lock); 4197 kfree(ethsw->lags); 4198 err_free_filter: 4199 kfree(ethsw->filter_blocks); 4200 err_free_fdbs: 4201 kfree(ethsw->fdbs); 4202 err_free_ports: 4203 kfree(ethsw->ports); 4204 4205 err_teardown: 4206 dpaa2_switch_teardown(sw_dev); 4207 4208 err_free_cmdport: 4209 fsl_mc_portal_free(ethsw->mc_io); 4210 4211 err_free_drvdata: 4212 kfree(ethsw); 4213 dev_set_drvdata(dev, NULL); 4214 4215 return err; 4216 } 4217 4218 static const struct fsl_mc_device_id dpaa2_switch_match_id_table[] = { 4219 { 4220 .vendor = FSL_MC_VENDOR_FREESCALE, 4221 .obj_type = "dpsw", 4222 }, 4223 { .vendor = 0x0 } 4224 }; 4225 MODULE_DEVICE_TABLE(fslmc, dpaa2_switch_match_id_table); 4226 4227 static struct fsl_mc_driver dpaa2_switch_drv = { 4228 .driver = { 4229 .name = KBUILD_MODNAME, 4230 }, 4231 .probe = dpaa2_switch_probe, 4232 .remove = dpaa2_switch_remove, 4233 .match_id_table = dpaa2_switch_match_id_table 4234 }; 4235 4236 static struct notifier_block dpaa2_switch_port_nb __read_mostly = { 4237 .notifier_call = dpaa2_switch_port_netdevice_event, 4238 }; 4239 4240 static struct notifier_block dpaa2_switch_port_switchdev_nb = { 4241 .notifier_call = dpaa2_switch_port_event, 4242 }; 4243 4244 static struct notifier_block dpaa2_switch_port_switchdev_blocking_nb = { 4245 .notifier_call = dpaa2_switch_port_blocking_event, 4246 }; 4247 4248 static int dpaa2_switch_register_notifiers(void) 4249 { 4250 int err; 4251 4252 err = register_netdevice_notifier(&dpaa2_switch_port_nb); 4253 if (err) { 4254 pr_err("dpaa2-switch: failed to register net_device notifier (%d)\n", err); 4255 return err; 4256 } 4257 4258 err = register_switchdev_notifier(&dpaa2_switch_port_switchdev_nb); 4259 if (err) { 4260 pr_err("dpaa2-switch: failed to register switchdev notifier (%d)\n", err); 4261 goto err_switchdev_nb; 4262 } 4263 4264 err = register_switchdev_blocking_notifier(&dpaa2_switch_port_switchdev_blocking_nb); 4265 if (err) { 4266 pr_err("dpaa2-switch: failed to register switchdev blocking notifier (%d)\n", err); 4267 goto err_switchdev_blocking_nb; 4268 } 4269 4270 return 0; 4271 4272 err_switchdev_blocking_nb: 4273 unregister_switchdev_notifier(&dpaa2_switch_port_switchdev_nb); 4274 err_switchdev_nb: 4275 unregister_netdevice_notifier(&dpaa2_switch_port_nb); 4276 4277 return err; 4278 } 4279 4280 static void dpaa2_switch_unregister_notifiers(void) 4281 { 4282 int err; 4283 4284 err = unregister_switchdev_blocking_notifier(&dpaa2_switch_port_switchdev_blocking_nb); 4285 if (err) 4286 pr_err("dpaa2-switch: failed to unregister switchdev blocking notifier (%d)\n", 4287 err); 4288 4289 err = unregister_switchdev_notifier(&dpaa2_switch_port_switchdev_nb); 4290 if (err) 4291 pr_err("dpaa2-switch: failed to unregister switchdev notifier (%d)\n", err); 4292 4293 err = unregister_netdevice_notifier(&dpaa2_switch_port_nb); 4294 if (err) 4295 pr_err("dpaa2-switch: failed to unregister net_device notifier (%d)\n", err); 4296 } 4297 4298 static int __init dpaa2_switch_driver_init(void) 4299 { 4300 int err; 4301 4302 err = fsl_mc_driver_register(&dpaa2_switch_drv); 4303 if (err) 4304 return err; 4305 4306 err = dpaa2_switch_register_notifiers(); 4307 if (err) { 4308 fsl_mc_driver_unregister(&dpaa2_switch_drv); 4309 return err; 4310 } 4311 4312 return 0; 4313 } 4314 4315 static void __exit dpaa2_switch_driver_exit(void) 4316 { 4317 dpaa2_switch_unregister_notifiers(); 4318 fsl_mc_driver_unregister(&dpaa2_switch_drv); 4319 } 4320 4321 module_init(dpaa2_switch_driver_init); 4322 module_exit(dpaa2_switch_driver_exit); 4323 4324 MODULE_LICENSE("GPL v2"); 4325 MODULE_DESCRIPTION("DPAA2 Ethernet Switch Driver"); 4326