xref: /linux/drivers/net/ethernet/emulex/benet/be.h (revision b43ab901d671e3e3cad425ea5e9a3c74e266dcdd)
1 /*
2  * Copyright (C) 2005 - 2011 Emulex
3  * All rights reserved.
4  *
5  * This program is free software; you can redistribute it and/or
6  * modify it under the terms of the GNU General Public License version 2
7  * as published by the Free Software Foundation.  The full GNU General
8  * Public License is included in this distribution in the file called COPYING.
9  *
10  * Contact Information:
11  * linux-drivers@emulex.com
12  *
13  * Emulex
14  * 3333 Susan Street
15  * Costa Mesa, CA 92626
16  */
17 
18 #ifndef BE_H
19 #define BE_H
20 
21 #include <linux/pci.h>
22 #include <linux/etherdevice.h>
23 #include <linux/delay.h>
24 #include <net/tcp.h>
25 #include <net/ip.h>
26 #include <net/ipv6.h>
27 #include <linux/if_vlan.h>
28 #include <linux/workqueue.h>
29 #include <linux/interrupt.h>
30 #include <linux/firmware.h>
31 #include <linux/slab.h>
32 #include <linux/u64_stats_sync.h>
33 
34 #include "be_hw.h"
35 
36 #define DRV_VER			"4.0.100u"
37 #define DRV_NAME		"be2net"
38 #define BE_NAME			"ServerEngines BladeEngine2 10Gbps NIC"
39 #define BE3_NAME		"ServerEngines BladeEngine3 10Gbps NIC"
40 #define OC_NAME			"Emulex OneConnect 10Gbps NIC"
41 #define OC_NAME_BE		OC_NAME	"(be3)"
42 #define OC_NAME_LANCER		OC_NAME "(Lancer)"
43 #define OC_NAME_SH		OC_NAME "(Skyhawk)"
44 #define DRV_DESC		"ServerEngines BladeEngine 10Gbps NIC Driver"
45 
46 #define BE_VENDOR_ID 		0x19a2
47 #define EMULEX_VENDOR_ID	0x10df
48 #define BE_DEVICE_ID1		0x211
49 #define BE_DEVICE_ID2		0x221
50 #define OC_DEVICE_ID1		0x700	/* Device Id for BE2 cards */
51 #define OC_DEVICE_ID2		0x710	/* Device Id for BE3 cards */
52 #define OC_DEVICE_ID3		0xe220	/* Device id for Lancer cards */
53 #define OC_DEVICE_ID4           0xe228   /* Device id for VF in Lancer */
54 #define OC_DEVICE_ID5		0x720	/* Device Id for Skyhawk cards */
55 
56 static inline char *nic_name(struct pci_dev *pdev)
57 {
58 	switch (pdev->device) {
59 	case OC_DEVICE_ID1:
60 		return OC_NAME;
61 	case OC_DEVICE_ID2:
62 		return OC_NAME_BE;
63 	case OC_DEVICE_ID3:
64 	case OC_DEVICE_ID4:
65 		return OC_NAME_LANCER;
66 	case BE_DEVICE_ID2:
67 		return BE3_NAME;
68 	case OC_DEVICE_ID5:
69 		return OC_NAME_SH;
70 	default:
71 		return BE_NAME;
72 	}
73 }
74 
75 /* Number of bytes of an RX frame that are copied to skb->data */
76 #define BE_HDR_LEN		((u16) 64)
77 #define BE_MAX_JUMBO_FRAME_SIZE	9018
78 #define BE_MIN_MTU		256
79 
80 #define BE_NUM_VLANS_SUPPORTED	64
81 #define BE_MAX_EQD		96
82 #define	BE_MAX_TX_FRAG_COUNT	30
83 
84 #define EVNT_Q_LEN		1024
85 #define TX_Q_LEN		2048
86 #define TX_CQ_LEN		1024
87 #define RX_Q_LEN		1024	/* Does not support any other value */
88 #define RX_CQ_LEN		1024
89 #define MCC_Q_LEN		128	/* total size not to exceed 8 pages */
90 #define MCC_CQ_LEN		256
91 
92 #define MAX_RSS_QS		4	/* BE limit is 4 queues/port */
93 #define MAX_RX_QS		(MAX_RSS_QS + 1) /* RSS qs + 1 def Rx */
94 #define MAX_TX_QS		8
95 #define BE_MAX_MSIX_VECTORS	(MAX_RX_QS + 1)/* RX + TX */
96 #define BE_NAPI_WEIGHT		64
97 #define MAX_RX_POST 		BE_NAPI_WEIGHT /* Frags posted at a time */
98 #define RX_FRAGS_REFILL_WM	(RX_Q_LEN - MAX_RX_POST)
99 
100 #define FW_VER_LEN		32
101 
102 struct be_dma_mem {
103 	void *va;
104 	dma_addr_t dma;
105 	u32 size;
106 };
107 
108 struct be_queue_info {
109 	struct be_dma_mem dma_mem;
110 	u16 len;
111 	u16 entry_size;	/* Size of an element in the queue */
112 	u16 id;
113 	u16 tail, head;
114 	bool created;
115 	atomic_t used;	/* Number of valid elements in the queue */
116 };
117 
118 static inline u32 MODULO(u16 val, u16 limit)
119 {
120 	BUG_ON(limit & (limit - 1));
121 	return val & (limit - 1);
122 }
123 
124 static inline void index_adv(u16 *index, u16 val, u16 limit)
125 {
126 	*index = MODULO((*index + val), limit);
127 }
128 
129 static inline void index_inc(u16 *index, u16 limit)
130 {
131 	*index = MODULO((*index + 1), limit);
132 }
133 
134 static inline void *queue_head_node(struct be_queue_info *q)
135 {
136 	return q->dma_mem.va + q->head * q->entry_size;
137 }
138 
139 static inline void *queue_tail_node(struct be_queue_info *q)
140 {
141 	return q->dma_mem.va + q->tail * q->entry_size;
142 }
143 
144 static inline void *queue_index_node(struct be_queue_info *q, u16 index)
145 {
146 	return q->dma_mem.va + index * q->entry_size;
147 }
148 
149 static inline void queue_head_inc(struct be_queue_info *q)
150 {
151 	index_inc(&q->head, q->len);
152 }
153 
154 static inline void queue_tail_inc(struct be_queue_info *q)
155 {
156 	index_inc(&q->tail, q->len);
157 }
158 
159 struct be_eq_obj {
160 	struct be_queue_info q;
161 	char desc[32];
162 
163 	/* Adaptive interrupt coalescing (AIC) info */
164 	bool enable_aic;
165 	u16 min_eqd;		/* in usecs */
166 	u16 max_eqd;		/* in usecs */
167 	u16 cur_eqd;		/* in usecs */
168 	u8  eq_idx;
169 
170 	struct napi_struct napi;
171 };
172 
173 struct be_mcc_obj {
174 	struct be_queue_info q;
175 	struct be_queue_info cq;
176 	bool rearm_cq;
177 };
178 
179 struct be_tx_stats {
180 	u64 tx_bytes;
181 	u64 tx_pkts;
182 	u64 tx_reqs;
183 	u64 tx_wrbs;
184 	u64 tx_compl;
185 	ulong tx_jiffies;
186 	u32 tx_stops;
187 	struct u64_stats_sync sync;
188 	struct u64_stats_sync sync_compl;
189 };
190 
191 struct be_tx_obj {
192 	struct be_queue_info q;
193 	struct be_queue_info cq;
194 	/* Remember the skbs that were transmitted */
195 	struct sk_buff *sent_skb_list[TX_Q_LEN];
196 	struct be_tx_stats stats;
197 };
198 
199 /* Struct to remember the pages posted for rx frags */
200 struct be_rx_page_info {
201 	struct page *page;
202 	DEFINE_DMA_UNMAP_ADDR(bus);
203 	u16 page_offset;
204 	bool last_page_user;
205 };
206 
207 struct be_rx_stats {
208 	u64 rx_bytes;
209 	u64 rx_pkts;
210 	u64 rx_pkts_prev;
211 	ulong rx_jiffies;
212 	u32 rx_drops_no_skbs;	/* skb allocation errors */
213 	u32 rx_drops_no_frags;	/* HW has no fetched frags */
214 	u32 rx_post_fail;	/* page post alloc failures */
215 	u32 rx_polls;		/* NAPI calls */
216 	u32 rx_events;
217 	u32 rx_compl;
218 	u32 rx_mcast_pkts;
219 	u32 rx_compl_err;	/* completions with err set */
220 	u32 rx_pps;		/* pkts per second */
221 	struct u64_stats_sync sync;
222 };
223 
224 struct be_rx_compl_info {
225 	u32 rss_hash;
226 	u16 vlan_tag;
227 	u16 pkt_size;
228 	u16 rxq_idx;
229 	u16 port;
230 	u8 vlanf;
231 	u8 num_rcvd;
232 	u8 err;
233 	u8 ipf;
234 	u8 tcpf;
235 	u8 udpf;
236 	u8 ip_csum;
237 	u8 l4_csum;
238 	u8 ipv6;
239 	u8 vtm;
240 	u8 pkt_type;
241 };
242 
243 struct be_rx_obj {
244 	struct be_adapter *adapter;
245 	struct be_queue_info q;
246 	struct be_queue_info cq;
247 	struct be_rx_compl_info rxcp;
248 	struct be_rx_page_info page_info_tbl[RX_Q_LEN];
249 	struct be_eq_obj rx_eq;
250 	struct be_rx_stats stats;
251 	u8 rss_id;
252 	bool rx_post_starved;	/* Zero rx frags have been posted to BE */
253 	u32 cache_line_barrier[16];
254 };
255 
256 struct be_drv_stats {
257 	u32 be_on_die_temperature;
258 	u32 tx_events;
259 	u32 eth_red_drops;
260 	u32 rx_drops_no_pbuf;
261 	u32 rx_drops_no_txpb;
262 	u32 rx_drops_no_erx_descr;
263 	u32 rx_drops_no_tpre_descr;
264 	u32 rx_drops_too_many_frags;
265 	u32 rx_drops_invalid_ring;
266 	u32 forwarded_packets;
267 	u32 rx_drops_mtu;
268 	u32 rx_crc_errors;
269 	u32 rx_alignment_symbol_errors;
270 	u32 rx_pause_frames;
271 	u32 rx_priority_pause_frames;
272 	u32 rx_control_frames;
273 	u32 rx_in_range_errors;
274 	u32 rx_out_range_errors;
275 	u32 rx_frame_too_long;
276 	u32 rx_address_match_errors;
277 	u32 rx_dropped_too_small;
278 	u32 rx_dropped_too_short;
279 	u32 rx_dropped_header_too_small;
280 	u32 rx_dropped_tcp_length;
281 	u32 rx_dropped_runt;
282 	u32 rx_ip_checksum_errs;
283 	u32 rx_tcp_checksum_errs;
284 	u32 rx_udp_checksum_errs;
285 	u32 tx_pauseframes;
286 	u32 tx_priority_pauseframes;
287 	u32 tx_controlframes;
288 	u32 rxpp_fifo_overflow_drop;
289 	u32 rx_input_fifo_overflow_drop;
290 	u32 pmem_fifo_overflow_drop;
291 	u32 jabber_events;
292 };
293 
294 struct be_vf_cfg {
295 	unsigned char mac_addr[ETH_ALEN];
296 	int if_handle;
297 	int pmac_id;
298 	u16 vlan_tag;
299 	u32 tx_rate;
300 };
301 
302 #define BE_FLAGS_LINK_STATUS_INIT		1
303 
304 struct be_adapter {
305 	struct pci_dev *pdev;
306 	struct net_device *netdev;
307 
308 	u8 __iomem *csr;
309 	u8 __iomem *db;		/* Door Bell */
310 
311 	struct mutex mbox_lock; /* For serializing mbox cmds to BE card */
312 	struct be_dma_mem mbox_mem;
313 	/* Mbox mem is adjusted to align to 16 bytes. The allocated addr
314 	 * is stored for freeing purpose */
315 	struct be_dma_mem mbox_mem_alloced;
316 
317 	struct be_mcc_obj mcc_obj;
318 	spinlock_t mcc_lock;	/* For serializing mcc cmds to BE card */
319 	spinlock_t mcc_cq_lock;
320 
321 	struct msix_entry msix_entries[BE_MAX_MSIX_VECTORS];
322 	u32 num_msix_vec;
323 	bool isr_registered;
324 
325 	/* TX Rings */
326 	struct be_eq_obj tx_eq;
327 	struct be_tx_obj tx_obj[MAX_TX_QS];
328 	u8 num_tx_qs;
329 
330 	u32 cache_line_break[8];
331 
332 	/* Rx rings */
333 	struct be_rx_obj rx_obj[MAX_RX_QS];
334 	u32 num_rx_qs;
335 	u32 big_page_size;	/* Compounded page size shared by rx wrbs */
336 
337 	u8 eq_next_idx;
338 	struct be_drv_stats drv_stats;
339 
340 	u16 vlans_added;
341 	u16 max_vlans;	/* Number of vlans supported */
342 	u8 vlan_tag[VLAN_N_VID];
343 	u8 vlan_prio_bmap;	/* Available Priority BitMap */
344 	u16 recommended_prio;	/* Recommended Priority */
345 	struct be_dma_mem rx_filter; /* Cmd DMA mem for rx-filter */
346 
347 	struct be_dma_mem stats_cmd;
348 	/* Work queue used to perform periodic tasks like getting statistics */
349 	struct delayed_work work;
350 	u16 work_counter;
351 
352 	u32 flags;
353 	/* Ethtool knobs and info */
354 	char fw_ver[FW_VER_LEN];
355 	int if_handle;		/* Used to configure filtering */
356 	u32 pmac_id;		/* MAC addr handle used by BE card */
357 	u32 beacon_state;	/* for set_phys_id */
358 
359 	bool eeh_err;
360 	bool ue_detected;
361 	bool fw_timeout;
362 	u32 port_num;
363 	bool promiscuous;
364 	bool wol;
365 	u32 function_mode;
366 	u32 function_caps;
367 	u32 rx_fc;		/* Rx flow control */
368 	u32 tx_fc;		/* Tx flow control */
369 	bool stats_cmd_sent;
370 	int link_speed;
371 	u8 port_type;
372 	u8 transceiver;
373 	u8 autoneg;
374 	u8 generation;		/* BladeEngine ASIC generation */
375 	u32 flash_status;
376 	struct completion flash_compl;
377 
378 	u32 num_vfs;
379 	u8 is_virtfn;
380 	struct be_vf_cfg *vf_cfg;
381 	bool be3_native;
382 	u32 sli_family;
383 	u8 hba_port_num;
384 	u16 pvid;
385 };
386 
387 #define be_physfn(adapter) (!adapter->is_virtfn)
388 #define	sriov_enabled(adapter)		(adapter->num_vfs > 0)
389 #define for_all_vfs(adapter, vf_cfg, i)					\
390 	for (i = 0, vf_cfg = &adapter->vf_cfg[i]; i < adapter->num_vfs;	\
391 		i++, vf_cfg++)
392 
393 /* BladeEngine Generation numbers */
394 #define BE_GEN2 2
395 #define BE_GEN3 3
396 
397 #define ON				1
398 #define OFF				0
399 #define lancer_chip(adapter)	((adapter->pdev->device == OC_DEVICE_ID3) || \
400 				 (adapter->pdev->device == OC_DEVICE_ID4))
401 
402 extern const struct ethtool_ops be_ethtool_ops;
403 
404 #define msix_enabled(adapter)		(adapter->num_msix_vec > 0)
405 #define tx_stats(txo)			(&txo->stats)
406 #define rx_stats(rxo)			(&rxo->stats)
407 
408 #define BE_SET_NETDEV_OPS(netdev, ops)	(netdev->netdev_ops = ops)
409 
410 #define for_all_rx_queues(adapter, rxo, i)				\
411 	for (i = 0, rxo = &adapter->rx_obj[i]; i < adapter->num_rx_qs;	\
412 		i++, rxo++)
413 
414 /* Just skip the first default non-rss queue */
415 #define for_all_rss_queues(adapter, rxo, i)				\
416 	for (i = 0, rxo = &adapter->rx_obj[i+1]; i < (adapter->num_rx_qs - 1);\
417 		i++, rxo++)
418 
419 #define for_all_tx_queues(adapter, txo, i)				\
420 	for (i = 0, txo = &adapter->tx_obj[i]; i < adapter->num_tx_qs;	\
421 		i++, txo++)
422 
423 #define PAGE_SHIFT_4K		12
424 #define PAGE_SIZE_4K		(1 << PAGE_SHIFT_4K)
425 
426 /* Returns number of pages spanned by the data starting at the given addr */
427 #define PAGES_4K_SPANNED(_address, size) 				\
428 		((u32)((((size_t)(_address) & (PAGE_SIZE_4K - 1)) + 	\
429 			(size) + (PAGE_SIZE_4K - 1)) >> PAGE_SHIFT_4K))
430 
431 /* Byte offset into the page corresponding to given address */
432 #define OFFSET_IN_PAGE(addr)						\
433 		 ((size_t)(addr) & (PAGE_SIZE_4K-1))
434 
435 /* Returns bit offset within a DWORD of a bitfield */
436 #define AMAP_BIT_OFFSET(_struct, field)  				\
437 		(((size_t)&(((_struct *)0)->field))%32)
438 
439 /* Returns the bit mask of the field that is NOT shifted into location. */
440 static inline u32 amap_mask(u32 bitsize)
441 {
442 	return (bitsize == 32 ? 0xFFFFFFFF : (1 << bitsize) - 1);
443 }
444 
445 static inline void
446 amap_set(void *ptr, u32 dw_offset, u32 mask, u32 offset, u32 value)
447 {
448 	u32 *dw = (u32 *) ptr + dw_offset;
449 	*dw &= ~(mask << offset);
450 	*dw |= (mask & value) << offset;
451 }
452 
453 #define AMAP_SET_BITS(_struct, field, ptr, val)				\
454 		amap_set(ptr,						\
455 			offsetof(_struct, field)/32,			\
456 			amap_mask(sizeof(((_struct *)0)->field)),	\
457 			AMAP_BIT_OFFSET(_struct, field),		\
458 			val)
459 
460 static inline u32 amap_get(void *ptr, u32 dw_offset, u32 mask, u32 offset)
461 {
462 	u32 *dw = (u32 *) ptr;
463 	return mask & (*(dw + dw_offset) >> offset);
464 }
465 
466 #define AMAP_GET_BITS(_struct, field, ptr)				\
467 		amap_get(ptr,						\
468 			offsetof(_struct, field)/32,			\
469 			amap_mask(sizeof(((_struct *)0)->field)),	\
470 			AMAP_BIT_OFFSET(_struct, field))
471 
472 #define be_dws_cpu_to_le(wrb, len)	swap_dws(wrb, len)
473 #define be_dws_le_to_cpu(wrb, len)	swap_dws(wrb, len)
474 static inline void swap_dws(void *wrb, int len)
475 {
476 #ifdef __BIG_ENDIAN
477 	u32 *dw = wrb;
478 	BUG_ON(len % 4);
479 	do {
480 		*dw = cpu_to_le32(*dw);
481 		dw++;
482 		len -= 4;
483 	} while (len);
484 #endif				/* __BIG_ENDIAN */
485 }
486 
487 static inline u8 is_tcp_pkt(struct sk_buff *skb)
488 {
489 	u8 val = 0;
490 
491 	if (ip_hdr(skb)->version == 4)
492 		val = (ip_hdr(skb)->protocol == IPPROTO_TCP);
493 	else if (ip_hdr(skb)->version == 6)
494 		val = (ipv6_hdr(skb)->nexthdr == NEXTHDR_TCP);
495 
496 	return val;
497 }
498 
499 static inline u8 is_udp_pkt(struct sk_buff *skb)
500 {
501 	u8 val = 0;
502 
503 	if (ip_hdr(skb)->version == 4)
504 		val = (ip_hdr(skb)->protocol == IPPROTO_UDP);
505 	else if (ip_hdr(skb)->version == 6)
506 		val = (ipv6_hdr(skb)->nexthdr == NEXTHDR_UDP);
507 
508 	return val;
509 }
510 
511 static inline void be_check_sriov_fn_type(struct be_adapter *adapter)
512 {
513 	u32 sli_intf;
514 
515 	pci_read_config_dword(adapter->pdev, SLI_INTF_REG_OFFSET, &sli_intf);
516 	adapter->is_virtfn = (sli_intf & SLI_INTF_FT_MASK) ? 1 : 0;
517 }
518 
519 static inline void be_vf_eth_addr_generate(struct be_adapter *adapter, u8 *mac)
520 {
521 	u32 addr;
522 
523 	addr = jhash(adapter->netdev->dev_addr, ETH_ALEN, 0);
524 
525 	mac[5] = (u8)(addr & 0xFF);
526 	mac[4] = (u8)((addr >> 8) & 0xFF);
527 	mac[3] = (u8)((addr >> 16) & 0xFF);
528 	/* Use the OUI from the current MAC address */
529 	memcpy(mac, adapter->netdev->dev_addr, 3);
530 }
531 
532 static inline bool be_multi_rxq(const struct be_adapter *adapter)
533 {
534 	return adapter->num_rx_qs > 1;
535 }
536 
537 static inline bool be_error(struct be_adapter *adapter)
538 {
539 	return adapter->eeh_err || adapter->ue_detected || adapter->fw_timeout;
540 }
541 
542 extern void be_cq_notify(struct be_adapter *adapter, u16 qid, bool arm,
543 		u16 num_popped);
544 extern void be_link_status_update(struct be_adapter *adapter, u8 link_status);
545 extern void be_parse_stats(struct be_adapter *adapter);
546 extern int be_load_fw(struct be_adapter *adapter, u8 *func);
547 #endif				/* BE_H */
548