1 /* 2 * Copyright (C) 2005 - 2014 Emulex 3 * All rights reserved. 4 * 5 * This program is free software; you can redistribute it and/or 6 * modify it under the terms of the GNU General Public License version 2 7 * as published by the Free Software Foundation. The full GNU General 8 * Public License is included in this distribution in the file called COPYING. 9 * 10 * Contact Information: 11 * linux-drivers@emulex.com 12 * 13 * Emulex 14 * 3333 Susan Street 15 * Costa Mesa, CA 92626 16 */ 17 18 #ifndef BE_H 19 #define BE_H 20 21 #include <linux/pci.h> 22 #include <linux/etherdevice.h> 23 #include <linux/delay.h> 24 #include <net/tcp.h> 25 #include <net/ip.h> 26 #include <net/ipv6.h> 27 #include <linux/if_vlan.h> 28 #include <linux/workqueue.h> 29 #include <linux/interrupt.h> 30 #include <linux/firmware.h> 31 #include <linux/slab.h> 32 #include <linux/u64_stats_sync.h> 33 34 #include "be_hw.h" 35 #include "be_roce.h" 36 37 #define DRV_VER "10.2u" 38 #define DRV_NAME "be2net" 39 #define BE_NAME "Emulex BladeEngine2" 40 #define BE3_NAME "Emulex BladeEngine3" 41 #define OC_NAME "Emulex OneConnect" 42 #define OC_NAME_BE OC_NAME "(be3)" 43 #define OC_NAME_LANCER OC_NAME "(Lancer)" 44 #define OC_NAME_SH OC_NAME "(Skyhawk)" 45 #define DRV_DESC "Emulex OneConnect NIC Driver" 46 47 #define BE_VENDOR_ID 0x19a2 48 #define EMULEX_VENDOR_ID 0x10df 49 #define BE_DEVICE_ID1 0x211 50 #define BE_DEVICE_ID2 0x221 51 #define OC_DEVICE_ID1 0x700 /* Device Id for BE2 cards */ 52 #define OC_DEVICE_ID2 0x710 /* Device Id for BE3 cards */ 53 #define OC_DEVICE_ID3 0xe220 /* Device id for Lancer cards */ 54 #define OC_DEVICE_ID4 0xe228 /* Device id for VF in Lancer */ 55 #define OC_DEVICE_ID5 0x720 /* Device Id for Skyhawk cards */ 56 #define OC_DEVICE_ID6 0x728 /* Device id for VF in SkyHawk */ 57 #define OC_SUBSYS_DEVICE_ID1 0xE602 58 #define OC_SUBSYS_DEVICE_ID2 0xE642 59 #define OC_SUBSYS_DEVICE_ID3 0xE612 60 #define OC_SUBSYS_DEVICE_ID4 0xE652 61 62 static inline char *nic_name(struct pci_dev *pdev) 63 { 64 switch (pdev->device) { 65 case OC_DEVICE_ID1: 66 return OC_NAME; 67 case OC_DEVICE_ID2: 68 return OC_NAME_BE; 69 case OC_DEVICE_ID3: 70 case OC_DEVICE_ID4: 71 return OC_NAME_LANCER; 72 case BE_DEVICE_ID2: 73 return BE3_NAME; 74 case OC_DEVICE_ID5: 75 case OC_DEVICE_ID6: 76 return OC_NAME_SH; 77 default: 78 return BE_NAME; 79 } 80 } 81 82 /* Number of bytes of an RX frame that are copied to skb->data */ 83 #define BE_HDR_LEN ((u16) 64) 84 /* allocate extra space to allow tunneling decapsulation without head reallocation */ 85 #define BE_RX_SKB_ALLOC_SIZE (BE_HDR_LEN + 64) 86 87 #define BE_MAX_JUMBO_FRAME_SIZE 9018 88 #define BE_MIN_MTU 256 89 90 #define BE_NUM_VLANS_SUPPORTED 64 91 #define BE_MAX_EQD 128u 92 #define BE_MAX_TX_FRAG_COUNT 30 93 94 #define EVNT_Q_LEN 1024 95 #define TX_Q_LEN 2048 96 #define TX_CQ_LEN 1024 97 #define RX_Q_LEN 1024 /* Does not support any other value */ 98 #define RX_CQ_LEN 1024 99 #define MCC_Q_LEN 128 /* total size not to exceed 8 pages */ 100 #define MCC_CQ_LEN 256 101 102 #define BE2_MAX_RSS_QS 4 103 #define BE3_MAX_RSS_QS 16 104 #define BE3_MAX_TX_QS 16 105 #define BE3_MAX_EVT_QS 16 106 #define BE3_SRIOV_MAX_EVT_QS 8 107 108 #define MAX_RX_QS 32 109 #define MAX_EVT_QS 32 110 #define MAX_TX_QS 32 111 112 #define MAX_ROCE_EQS 5 113 #define MAX_MSIX_VECTORS 32 114 #define MIN_MSIX_VECTORS 1 115 #define BE_TX_BUDGET 256 116 #define BE_NAPI_WEIGHT 64 117 #define MAX_RX_POST BE_NAPI_WEIGHT /* Frags posted at a time */ 118 #define RX_FRAGS_REFILL_WM (RX_Q_LEN - MAX_RX_POST) 119 120 #define MAX_VFS 30 /* Max VFs supported by BE3 FW */ 121 #define FW_VER_LEN 32 122 123 #define RSS_INDIR_TABLE_LEN 128 124 #define RSS_HASH_KEY_LEN 40 125 126 struct be_dma_mem { 127 void *va; 128 dma_addr_t dma; 129 u32 size; 130 }; 131 132 struct be_queue_info { 133 struct be_dma_mem dma_mem; 134 u16 len; 135 u16 entry_size; /* Size of an element in the queue */ 136 u16 id; 137 u16 tail, head; 138 bool created; 139 atomic_t used; /* Number of valid elements in the queue */ 140 }; 141 142 static inline u32 MODULO(u16 val, u16 limit) 143 { 144 BUG_ON(limit & (limit - 1)); 145 return val & (limit - 1); 146 } 147 148 static inline void index_adv(u16 *index, u16 val, u16 limit) 149 { 150 *index = MODULO((*index + val), limit); 151 } 152 153 static inline void index_inc(u16 *index, u16 limit) 154 { 155 *index = MODULO((*index + 1), limit); 156 } 157 158 static inline void *queue_head_node(struct be_queue_info *q) 159 { 160 return q->dma_mem.va + q->head * q->entry_size; 161 } 162 163 static inline void *queue_tail_node(struct be_queue_info *q) 164 { 165 return q->dma_mem.va + q->tail * q->entry_size; 166 } 167 168 static inline void *queue_index_node(struct be_queue_info *q, u16 index) 169 { 170 return q->dma_mem.va + index * q->entry_size; 171 } 172 173 static inline void queue_head_inc(struct be_queue_info *q) 174 { 175 index_inc(&q->head, q->len); 176 } 177 178 static inline void index_dec(u16 *index, u16 limit) 179 { 180 *index = MODULO((*index - 1), limit); 181 } 182 183 static inline void queue_tail_inc(struct be_queue_info *q) 184 { 185 index_inc(&q->tail, q->len); 186 } 187 188 struct be_eq_obj { 189 struct be_queue_info q; 190 char desc[32]; 191 192 /* Adaptive interrupt coalescing (AIC) info */ 193 bool enable_aic; 194 u32 min_eqd; /* in usecs */ 195 u32 max_eqd; /* in usecs */ 196 u32 eqd; /* configured val when aic is off */ 197 u32 cur_eqd; /* in usecs */ 198 199 u8 idx; /* array index */ 200 u8 msix_idx; 201 u16 tx_budget; 202 u16 spurious_intr; 203 struct napi_struct napi; 204 struct be_adapter *adapter; 205 206 #ifdef CONFIG_NET_RX_BUSY_POLL 207 #define BE_EQ_IDLE 0 208 #define BE_EQ_NAPI 1 /* napi owns this EQ */ 209 #define BE_EQ_POLL 2 /* poll owns this EQ */ 210 #define BE_EQ_LOCKED (BE_EQ_NAPI | BE_EQ_POLL) 211 #define BE_EQ_NAPI_YIELD 4 /* napi yielded this EQ */ 212 #define BE_EQ_POLL_YIELD 8 /* poll yielded this EQ */ 213 #define BE_EQ_YIELD (BE_EQ_NAPI_YIELD | BE_EQ_POLL_YIELD) 214 #define BE_EQ_USER_PEND (BE_EQ_POLL | BE_EQ_POLL_YIELD) 215 unsigned int state; 216 spinlock_t lock; /* lock to serialize napi and busy-poll */ 217 #endif /* CONFIG_NET_RX_BUSY_POLL */ 218 } ____cacheline_aligned_in_smp; 219 220 struct be_aic_obj { /* Adaptive interrupt coalescing (AIC) info */ 221 bool enable; 222 u32 min_eqd; /* in usecs */ 223 u32 max_eqd; /* in usecs */ 224 u32 prev_eqd; /* in usecs */ 225 u32 et_eqd; /* configured val when aic is off */ 226 ulong jiffies; 227 u64 rx_pkts_prev; /* Used to calculate RX pps */ 228 u64 tx_reqs_prev; /* Used to calculate TX pps */ 229 }; 230 231 enum { 232 NAPI_POLLING, 233 BUSY_POLLING 234 }; 235 236 struct be_mcc_obj { 237 struct be_queue_info q; 238 struct be_queue_info cq; 239 bool rearm_cq; 240 }; 241 242 struct be_tx_stats { 243 u64 tx_bytes; 244 u64 tx_pkts; 245 u64 tx_reqs; 246 u64 tx_wrbs; 247 u64 tx_compl; 248 ulong tx_jiffies; 249 u32 tx_stops; 250 u32 tx_drv_drops; /* pkts dropped by driver */ 251 struct u64_stats_sync sync; 252 struct u64_stats_sync sync_compl; 253 }; 254 255 struct be_tx_obj { 256 u32 db_offset; 257 struct be_queue_info q; 258 struct be_queue_info cq; 259 /* Remember the skbs that were transmitted */ 260 struct sk_buff *sent_skb_list[TX_Q_LEN]; 261 struct be_tx_stats stats; 262 } ____cacheline_aligned_in_smp; 263 264 /* Struct to remember the pages posted for rx frags */ 265 struct be_rx_page_info { 266 struct page *page; 267 /* set to page-addr for last frag of the page & frag-addr otherwise */ 268 DEFINE_DMA_UNMAP_ADDR(bus); 269 u16 page_offset; 270 bool last_frag; /* last frag of the page */ 271 }; 272 273 struct be_rx_stats { 274 u64 rx_bytes; 275 u64 rx_pkts; 276 u32 rx_drops_no_skbs; /* skb allocation errors */ 277 u32 rx_drops_no_frags; /* HW has no fetched frags */ 278 u32 rx_post_fail; /* page post alloc failures */ 279 u32 rx_compl; 280 u32 rx_mcast_pkts; 281 u32 rx_compl_err; /* completions with err set */ 282 struct u64_stats_sync sync; 283 }; 284 285 struct be_rx_compl_info { 286 u32 rss_hash; 287 u16 vlan_tag; 288 u16 pkt_size; 289 u16 port; 290 u8 vlanf; 291 u8 num_rcvd; 292 u8 err; 293 u8 ipf; 294 u8 tcpf; 295 u8 udpf; 296 u8 ip_csum; 297 u8 l4_csum; 298 u8 ipv6; 299 u8 qnq; 300 u8 pkt_type; 301 u8 ip_frag; 302 u8 tunneled; 303 }; 304 305 struct be_rx_obj { 306 struct be_adapter *adapter; 307 struct be_queue_info q; 308 struct be_queue_info cq; 309 struct be_rx_compl_info rxcp; 310 struct be_rx_page_info page_info_tbl[RX_Q_LEN]; 311 struct be_rx_stats stats; 312 u8 rss_id; 313 bool rx_post_starved; /* Zero rx frags have been posted to BE */ 314 } ____cacheline_aligned_in_smp; 315 316 struct be_drv_stats { 317 u32 be_on_die_temperature; 318 u32 eth_red_drops; 319 u32 rx_drops_no_pbuf; 320 u32 rx_drops_no_txpb; 321 u32 rx_drops_no_erx_descr; 322 u32 rx_drops_no_tpre_descr; 323 u32 rx_drops_too_many_frags; 324 u32 forwarded_packets; 325 u32 rx_drops_mtu; 326 u32 rx_crc_errors; 327 u32 rx_alignment_symbol_errors; 328 u32 rx_pause_frames; 329 u32 rx_priority_pause_frames; 330 u32 rx_control_frames; 331 u32 rx_in_range_errors; 332 u32 rx_out_range_errors; 333 u32 rx_frame_too_long; 334 u32 rx_address_filtered; 335 u32 rx_dropped_too_small; 336 u32 rx_dropped_too_short; 337 u32 rx_dropped_header_too_small; 338 u32 rx_dropped_tcp_length; 339 u32 rx_dropped_runt; 340 u32 rx_ip_checksum_errs; 341 u32 rx_tcp_checksum_errs; 342 u32 rx_udp_checksum_errs; 343 u32 tx_pauseframes; 344 u32 tx_priority_pauseframes; 345 u32 tx_controlframes; 346 u32 rxpp_fifo_overflow_drop; 347 u32 rx_input_fifo_overflow_drop; 348 u32 pmem_fifo_overflow_drop; 349 u32 jabber_events; 350 u32 rx_roce_bytes_lsd; 351 u32 rx_roce_bytes_msd; 352 u32 rx_roce_frames; 353 u32 roce_drops_payload_len; 354 u32 roce_drops_crc; 355 }; 356 357 /* A vlan-id of 0xFFFF must be used to clear transparent vlan-tagging */ 358 #define BE_RESET_VLAN_TAG_ID 0xFFFF 359 360 struct be_vf_cfg { 361 unsigned char mac_addr[ETH_ALEN]; 362 int if_handle; 363 int pmac_id; 364 u16 vlan_tag; 365 u32 tx_rate; 366 u32 plink_tracking; 367 }; 368 369 enum vf_state { 370 ENABLED = 0, 371 ASSIGNED = 1 372 }; 373 374 #define BE_FLAGS_LINK_STATUS_INIT 1 375 #define BE_FLAGS_WORKER_SCHEDULED (1 << 3) 376 #define BE_FLAGS_VLAN_PROMISC (1 << 4) 377 #define BE_FLAGS_MCAST_PROMISC (1 << 5) 378 #define BE_FLAGS_NAPI_ENABLED (1 << 9) 379 #define BE_FLAGS_QNQ_ASYNC_EVT_RCVD (1 << 11) 380 #define BE_FLAGS_VXLAN_OFFLOADS (1 << 12) 381 #define BE_FLAGS_SETUP_DONE (1 << 13) 382 383 #define BE_UC_PMAC_COUNT 30 384 #define BE_VF_UC_PMAC_COUNT 2 385 /* Ethtool set_dump flags */ 386 #define LANCER_INITIATE_FW_DUMP 0x1 387 388 struct phy_info { 389 u8 transceiver; 390 u8 autoneg; 391 u8 fc_autoneg; 392 u8 port_type; 393 u16 phy_type; 394 u16 interface_type; 395 u32 misc_params; 396 u16 auto_speeds_supported; 397 u16 fixed_speeds_supported; 398 int link_speed; 399 u32 dac_cable_len; 400 u32 advertising; 401 u32 supported; 402 }; 403 404 struct be_resources { 405 u16 max_vfs; /* Total VFs "really" supported by FW/HW */ 406 u16 max_mcast_mac; 407 u16 max_tx_qs; 408 u16 max_rss_qs; 409 u16 max_rx_qs; 410 u16 max_uc_mac; /* Max UC MACs programmable */ 411 u16 max_vlans; /* Number of vlans supported */ 412 u16 max_evt_qs; 413 u32 if_cap_flags; 414 }; 415 416 struct rss_info { 417 u64 rss_flags; 418 u8 rsstable[RSS_INDIR_TABLE_LEN]; 419 u8 rss_queue[RSS_INDIR_TABLE_LEN]; 420 u8 rss_hkey[RSS_HASH_KEY_LEN]; 421 }; 422 423 struct be_adapter { 424 struct pci_dev *pdev; 425 struct net_device *netdev; 426 427 u8 __iomem *csr; /* CSR BAR used only for BE2/3 */ 428 u8 __iomem *db; /* Door Bell */ 429 430 struct mutex mbox_lock; /* For serializing mbox cmds to BE card */ 431 struct be_dma_mem mbox_mem; 432 /* Mbox mem is adjusted to align to 16 bytes. The allocated addr 433 * is stored for freeing purpose */ 434 struct be_dma_mem mbox_mem_alloced; 435 436 struct be_mcc_obj mcc_obj; 437 spinlock_t mcc_lock; /* For serializing mcc cmds to BE card */ 438 spinlock_t mcc_cq_lock; 439 440 u16 cfg_num_qs; /* configured via set-channels */ 441 u16 num_evt_qs; 442 u16 num_msix_vec; 443 struct be_eq_obj eq_obj[MAX_EVT_QS]; 444 struct msix_entry msix_entries[MAX_MSIX_VECTORS]; 445 bool isr_registered; 446 447 /* TX Rings */ 448 u16 num_tx_qs; 449 struct be_tx_obj tx_obj[MAX_TX_QS]; 450 451 /* Rx rings */ 452 u16 num_rx_qs; 453 struct be_rx_obj rx_obj[MAX_RX_QS]; 454 u32 big_page_size; /* Compounded page size shared by rx wrbs */ 455 456 struct be_drv_stats drv_stats; 457 struct be_aic_obj aic_obj[MAX_EVT_QS]; 458 u16 vlans_added; 459 unsigned long vids[BITS_TO_LONGS(VLAN_N_VID)]; 460 u8 vlan_prio_bmap; /* Available Priority BitMap */ 461 u16 recommended_prio; /* Recommended Priority */ 462 struct be_dma_mem rx_filter; /* Cmd DMA mem for rx-filter */ 463 464 struct be_dma_mem stats_cmd; 465 /* Work queue used to perform periodic tasks like getting statistics */ 466 struct delayed_work work; 467 u16 work_counter; 468 469 struct delayed_work func_recovery_work; 470 u32 flags; 471 u32 cmd_privileges; 472 /* Ethtool knobs and info */ 473 char fw_ver[FW_VER_LEN]; 474 char fw_on_flash[FW_VER_LEN]; 475 int if_handle; /* Used to configure filtering */ 476 u32 *pmac_id; /* MAC addr handle used by BE card */ 477 u32 beacon_state; /* for set_phys_id */ 478 479 bool eeh_error; 480 bool fw_timeout; 481 bool hw_error; 482 483 u32 port_num; 484 bool promiscuous; 485 u8 mc_type; 486 u32 function_mode; 487 u32 function_caps; 488 u32 rx_fc; /* Rx flow control */ 489 u32 tx_fc; /* Tx flow control */ 490 bool stats_cmd_sent; 491 struct { 492 u32 size; 493 u32 total_size; 494 u64 io_addr; 495 } roce_db; 496 u32 num_msix_roce_vec; 497 struct ocrdma_dev *ocrdma_dev; 498 struct list_head entry; 499 500 u32 flash_status; 501 struct completion et_cmd_compl; 502 503 struct be_resources res; /* resources available for the func */ 504 u16 num_vfs; /* Number of VFs provisioned by PF */ 505 u8 virtfn; 506 struct be_vf_cfg *vf_cfg; 507 bool be3_native; 508 u32 sli_family; 509 u8 hba_port_num; 510 u16 pvid; 511 __be16 vxlan_port; 512 struct phy_info phy; 513 u8 wol_cap; 514 bool wol_en; 515 u32 uc_macs; /* Count of secondary UC MAC programmed */ 516 u16 asic_rev; 517 u16 qnq_vid; 518 u32 msg_enable; 519 int be_get_temp_freq; 520 u8 pf_number; 521 struct rss_info rss_info; 522 }; 523 524 #define be_physfn(adapter) (!adapter->virtfn) 525 #define be_virtfn(adapter) (adapter->virtfn) 526 #define sriov_enabled(adapter) (adapter->num_vfs > 0) 527 #define sriov_want(adapter) (be_physfn(adapter) && \ 528 (num_vfs || pci_num_vf(adapter->pdev))) 529 #define for_all_vfs(adapter, vf_cfg, i) \ 530 for (i = 0, vf_cfg = &adapter->vf_cfg[i]; i < adapter->num_vfs; \ 531 i++, vf_cfg++) 532 533 #define ON 1 534 #define OFF 0 535 536 #define be_max_vlans(adapter) (adapter->res.max_vlans) 537 #define be_max_uc(adapter) (adapter->res.max_uc_mac) 538 #define be_max_mc(adapter) (adapter->res.max_mcast_mac) 539 #define be_max_vfs(adapter) (adapter->res.max_vfs) 540 #define be_max_rss(adapter) (adapter->res.max_rss_qs) 541 #define be_max_txqs(adapter) (adapter->res.max_tx_qs) 542 #define be_max_prio_txqs(adapter) (adapter->res.max_prio_tx_qs) 543 #define be_max_rxqs(adapter) (adapter->res.max_rx_qs) 544 #define be_max_eqs(adapter) (adapter->res.max_evt_qs) 545 #define be_if_cap_flags(adapter) (adapter->res.if_cap_flags) 546 547 static inline u16 be_max_qs(struct be_adapter *adapter) 548 { 549 /* If no RSS, need atleast the one def RXQ */ 550 u16 num = max_t(u16, be_max_rss(adapter), 1); 551 552 num = min(num, be_max_eqs(adapter)); 553 return min_t(u16, num, num_online_cpus()); 554 } 555 556 /* Is BE in pvid_tagging mode */ 557 #define be_pvid_tagging_enabled(adapter) (adapter->pvid) 558 559 /* Is BE in QNQ multi-channel mode */ 560 #define be_is_qnq_mode(adapter) (adapter->mc_type == FLEX10 || \ 561 adapter->mc_type == vNIC1 || \ 562 adapter->mc_type == UFP) 563 564 #define lancer_chip(adapter) (adapter->pdev->device == OC_DEVICE_ID3 || \ 565 adapter->pdev->device == OC_DEVICE_ID4) 566 567 #define skyhawk_chip(adapter) (adapter->pdev->device == OC_DEVICE_ID5 || \ 568 adapter->pdev->device == OC_DEVICE_ID6) 569 570 #define BE3_chip(adapter) (adapter->pdev->device == BE_DEVICE_ID2 || \ 571 adapter->pdev->device == OC_DEVICE_ID2) 572 573 #define BE2_chip(adapter) (adapter->pdev->device == BE_DEVICE_ID1 || \ 574 adapter->pdev->device == OC_DEVICE_ID1) 575 576 #define BEx_chip(adapter) (BE3_chip(adapter) || BE2_chip(adapter)) 577 578 #define be_roce_supported(adapter) (skyhawk_chip(adapter) && \ 579 (adapter->function_mode & RDMA_ENABLED)) 580 581 extern const struct ethtool_ops be_ethtool_ops; 582 583 #define msix_enabled(adapter) (adapter->num_msix_vec > 0) 584 #define num_irqs(adapter) (msix_enabled(adapter) ? \ 585 adapter->num_msix_vec : 1) 586 #define tx_stats(txo) (&(txo)->stats) 587 #define rx_stats(rxo) (&(rxo)->stats) 588 589 /* The default RXQ is the last RXQ */ 590 #define default_rxo(adpt) (&adpt->rx_obj[adpt->num_rx_qs - 1]) 591 592 #define for_all_rx_queues(adapter, rxo, i) \ 593 for (i = 0, rxo = &adapter->rx_obj[i]; i < adapter->num_rx_qs; \ 594 i++, rxo++) 595 596 /* Skip the default non-rss queue (last one)*/ 597 #define for_all_rss_queues(adapter, rxo, i) \ 598 for (i = 0, rxo = &adapter->rx_obj[i]; i < (adapter->num_rx_qs - 1);\ 599 i++, rxo++) 600 601 #define for_all_tx_queues(adapter, txo, i) \ 602 for (i = 0, txo = &adapter->tx_obj[i]; i < adapter->num_tx_qs; \ 603 i++, txo++) 604 605 #define for_all_evt_queues(adapter, eqo, i) \ 606 for (i = 0, eqo = &adapter->eq_obj[i]; i < adapter->num_evt_qs; \ 607 i++, eqo++) 608 609 #define for_all_rx_queues_on_eq(adapter, eqo, rxo, i) \ 610 for (i = eqo->idx, rxo = &adapter->rx_obj[i]; i < adapter->num_rx_qs;\ 611 i += adapter->num_evt_qs, rxo += adapter->num_evt_qs) 612 613 #define is_mcc_eqo(eqo) (eqo->idx == 0) 614 #define mcc_eqo(adapter) (&adapter->eq_obj[0]) 615 616 #define PAGE_SHIFT_4K 12 617 #define PAGE_SIZE_4K (1 << PAGE_SHIFT_4K) 618 619 /* Returns number of pages spanned by the data starting at the given addr */ 620 #define PAGES_4K_SPANNED(_address, size) \ 621 ((u32)((((size_t)(_address) & (PAGE_SIZE_4K - 1)) + \ 622 (size) + (PAGE_SIZE_4K - 1)) >> PAGE_SHIFT_4K)) 623 624 /* Returns bit offset within a DWORD of a bitfield */ 625 #define AMAP_BIT_OFFSET(_struct, field) \ 626 (((size_t)&(((_struct *)0)->field))%32) 627 628 /* Returns the bit mask of the field that is NOT shifted into location. */ 629 static inline u32 amap_mask(u32 bitsize) 630 { 631 return (bitsize == 32 ? 0xFFFFFFFF : (1 << bitsize) - 1); 632 } 633 634 static inline void 635 amap_set(void *ptr, u32 dw_offset, u32 mask, u32 offset, u32 value) 636 { 637 u32 *dw = (u32 *) ptr + dw_offset; 638 *dw &= ~(mask << offset); 639 *dw |= (mask & value) << offset; 640 } 641 642 #define AMAP_SET_BITS(_struct, field, ptr, val) \ 643 amap_set(ptr, \ 644 offsetof(_struct, field)/32, \ 645 amap_mask(sizeof(((_struct *)0)->field)), \ 646 AMAP_BIT_OFFSET(_struct, field), \ 647 val) 648 649 static inline u32 amap_get(void *ptr, u32 dw_offset, u32 mask, u32 offset) 650 { 651 u32 *dw = (u32 *) ptr; 652 return mask & (*(dw + dw_offset) >> offset); 653 } 654 655 #define AMAP_GET_BITS(_struct, field, ptr) \ 656 amap_get(ptr, \ 657 offsetof(_struct, field)/32, \ 658 amap_mask(sizeof(((_struct *)0)->field)), \ 659 AMAP_BIT_OFFSET(_struct, field)) 660 661 #define be_dws_cpu_to_le(wrb, len) swap_dws(wrb, len) 662 #define be_dws_le_to_cpu(wrb, len) swap_dws(wrb, len) 663 static inline void swap_dws(void *wrb, int len) 664 { 665 #ifdef __BIG_ENDIAN 666 u32 *dw = wrb; 667 BUG_ON(len % 4); 668 do { 669 *dw = cpu_to_le32(*dw); 670 dw++; 671 len -= 4; 672 } while (len); 673 #endif /* __BIG_ENDIAN */ 674 } 675 676 static inline u8 is_tcp_pkt(struct sk_buff *skb) 677 { 678 u8 val = 0; 679 680 if (ip_hdr(skb)->version == 4) 681 val = (ip_hdr(skb)->protocol == IPPROTO_TCP); 682 else if (ip_hdr(skb)->version == 6) 683 val = (ipv6_hdr(skb)->nexthdr == NEXTHDR_TCP); 684 685 return val; 686 } 687 688 static inline u8 is_udp_pkt(struct sk_buff *skb) 689 { 690 u8 val = 0; 691 692 if (ip_hdr(skb)->version == 4) 693 val = (ip_hdr(skb)->protocol == IPPROTO_UDP); 694 else if (ip_hdr(skb)->version == 6) 695 val = (ipv6_hdr(skb)->nexthdr == NEXTHDR_UDP); 696 697 return val; 698 } 699 700 static inline bool is_ipv4_pkt(struct sk_buff *skb) 701 { 702 return skb->protocol == htons(ETH_P_IP) && ip_hdr(skb)->version == 4; 703 } 704 705 static inline void be_vf_eth_addr_generate(struct be_adapter *adapter, u8 *mac) 706 { 707 u32 addr; 708 709 addr = jhash(adapter->netdev->dev_addr, ETH_ALEN, 0); 710 711 mac[5] = (u8)(addr & 0xFF); 712 mac[4] = (u8)((addr >> 8) & 0xFF); 713 mac[3] = (u8)((addr >> 16) & 0xFF); 714 /* Use the OUI from the current MAC address */ 715 memcpy(mac, adapter->netdev->dev_addr, 3); 716 } 717 718 static inline bool be_multi_rxq(const struct be_adapter *adapter) 719 { 720 return adapter->num_rx_qs > 1; 721 } 722 723 static inline bool be_error(struct be_adapter *adapter) 724 { 725 return adapter->eeh_error || adapter->hw_error || adapter->fw_timeout; 726 } 727 728 static inline bool be_hw_error(struct be_adapter *adapter) 729 { 730 return adapter->eeh_error || adapter->hw_error; 731 } 732 733 static inline void be_clear_all_error(struct be_adapter *adapter) 734 { 735 adapter->eeh_error = false; 736 adapter->hw_error = false; 737 adapter->fw_timeout = false; 738 } 739 740 static inline bool be_is_wol_excluded(struct be_adapter *adapter) 741 { 742 struct pci_dev *pdev = adapter->pdev; 743 744 if (!be_physfn(adapter)) 745 return true; 746 747 switch (pdev->subsystem_device) { 748 case OC_SUBSYS_DEVICE_ID1: 749 case OC_SUBSYS_DEVICE_ID2: 750 case OC_SUBSYS_DEVICE_ID3: 751 case OC_SUBSYS_DEVICE_ID4: 752 return true; 753 default: 754 return false; 755 } 756 } 757 758 static inline int qnq_async_evt_rcvd(struct be_adapter *adapter) 759 { 760 return adapter->flags & BE_FLAGS_QNQ_ASYNC_EVT_RCVD; 761 } 762 763 #ifdef CONFIG_NET_RX_BUSY_POLL 764 static inline bool be_lock_napi(struct be_eq_obj *eqo) 765 { 766 bool status = true; 767 768 spin_lock(&eqo->lock); /* BH is already disabled */ 769 if (eqo->state & BE_EQ_LOCKED) { 770 WARN_ON(eqo->state & BE_EQ_NAPI); 771 eqo->state |= BE_EQ_NAPI_YIELD; 772 status = false; 773 } else { 774 eqo->state = BE_EQ_NAPI; 775 } 776 spin_unlock(&eqo->lock); 777 return status; 778 } 779 780 static inline void be_unlock_napi(struct be_eq_obj *eqo) 781 { 782 spin_lock(&eqo->lock); /* BH is already disabled */ 783 784 WARN_ON(eqo->state & (BE_EQ_POLL | BE_EQ_NAPI_YIELD)); 785 eqo->state = BE_EQ_IDLE; 786 787 spin_unlock(&eqo->lock); 788 } 789 790 static inline bool be_lock_busy_poll(struct be_eq_obj *eqo) 791 { 792 bool status = true; 793 794 spin_lock_bh(&eqo->lock); 795 if (eqo->state & BE_EQ_LOCKED) { 796 eqo->state |= BE_EQ_POLL_YIELD; 797 status = false; 798 } else { 799 eqo->state |= BE_EQ_POLL; 800 } 801 spin_unlock_bh(&eqo->lock); 802 return status; 803 } 804 805 static inline void be_unlock_busy_poll(struct be_eq_obj *eqo) 806 { 807 spin_lock_bh(&eqo->lock); 808 809 WARN_ON(eqo->state & (BE_EQ_NAPI)); 810 eqo->state = BE_EQ_IDLE; 811 812 spin_unlock_bh(&eqo->lock); 813 } 814 815 static inline void be_enable_busy_poll(struct be_eq_obj *eqo) 816 { 817 spin_lock_init(&eqo->lock); 818 eqo->state = BE_EQ_IDLE; 819 } 820 821 static inline void be_disable_busy_poll(struct be_eq_obj *eqo) 822 { 823 local_bh_disable(); 824 825 /* It's enough to just acquire napi lock on the eqo to stop 826 * be_busy_poll() from processing any queueus. 827 */ 828 while (!be_lock_napi(eqo)) 829 mdelay(1); 830 831 local_bh_enable(); 832 } 833 834 #else /* CONFIG_NET_RX_BUSY_POLL */ 835 836 static inline bool be_lock_napi(struct be_eq_obj *eqo) 837 { 838 return true; 839 } 840 841 static inline void be_unlock_napi(struct be_eq_obj *eqo) 842 { 843 } 844 845 static inline bool be_lock_busy_poll(struct be_eq_obj *eqo) 846 { 847 return false; 848 } 849 850 static inline void be_unlock_busy_poll(struct be_eq_obj *eqo) 851 { 852 } 853 854 static inline void be_enable_busy_poll(struct be_eq_obj *eqo) 855 { 856 } 857 858 static inline void be_disable_busy_poll(struct be_eq_obj *eqo) 859 { 860 } 861 #endif /* CONFIG_NET_RX_BUSY_POLL */ 862 863 void be_cq_notify(struct be_adapter *adapter, u16 qid, bool arm, 864 u16 num_popped); 865 void be_link_status_update(struct be_adapter *adapter, u8 link_status); 866 void be_parse_stats(struct be_adapter *adapter); 867 int be_load_fw(struct be_adapter *adapter, u8 *func); 868 bool be_is_wol_supported(struct be_adapter *adapter); 869 bool be_pause_supported(struct be_adapter *adapter); 870 u32 be_get_fw_log_level(struct be_adapter *adapter); 871 872 static inline int fw_major_num(const char *fw_ver) 873 { 874 int fw_major = 0; 875 876 sscanf(fw_ver, "%d.", &fw_major); 877 878 return fw_major; 879 } 880 881 int be_update_queues(struct be_adapter *adapter); 882 int be_poll(struct napi_struct *napi, int budget); 883 884 /* 885 * internal function to initialize-cleanup roce device. 886 */ 887 void be_roce_dev_add(struct be_adapter *); 888 void be_roce_dev_remove(struct be_adapter *); 889 890 /* 891 * internal function to open-close roce device during ifup-ifdown. 892 */ 893 void be_roce_dev_open(struct be_adapter *); 894 void be_roce_dev_close(struct be_adapter *); 895 896 #endif /* BE_H */ 897