1 /* 2 * Copyright (C) 2005 - 2014 Emulex 3 * All rights reserved. 4 * 5 * This program is free software; you can redistribute it and/or 6 * modify it under the terms of the GNU General Public License version 2 7 * as published by the Free Software Foundation. The full GNU General 8 * Public License is included in this distribution in the file called COPYING. 9 * 10 * Contact Information: 11 * linux-drivers@emulex.com 12 * 13 * Emulex 14 * 3333 Susan Street 15 * Costa Mesa, CA 92626 16 */ 17 18 #ifndef BE_H 19 #define BE_H 20 21 #include <linux/pci.h> 22 #include <linux/etherdevice.h> 23 #include <linux/delay.h> 24 #include <net/tcp.h> 25 #include <net/ip.h> 26 #include <net/ipv6.h> 27 #include <linux/if_vlan.h> 28 #include <linux/workqueue.h> 29 #include <linux/interrupt.h> 30 #include <linux/firmware.h> 31 #include <linux/slab.h> 32 #include <linux/u64_stats_sync.h> 33 34 #include "be_hw.h" 35 #include "be_roce.h" 36 37 #define DRV_VER "10.4u" 38 #define DRV_NAME "be2net" 39 #define BE_NAME "Emulex BladeEngine2" 40 #define BE3_NAME "Emulex BladeEngine3" 41 #define OC_NAME "Emulex OneConnect" 42 #define OC_NAME_BE OC_NAME "(be3)" 43 #define OC_NAME_LANCER OC_NAME "(Lancer)" 44 #define OC_NAME_SH OC_NAME "(Skyhawk)" 45 #define DRV_DESC "Emulex OneConnect NIC Driver" 46 47 #define BE_VENDOR_ID 0x19a2 48 #define EMULEX_VENDOR_ID 0x10df 49 #define BE_DEVICE_ID1 0x211 50 #define BE_DEVICE_ID2 0x221 51 #define OC_DEVICE_ID1 0x700 /* Device Id for BE2 cards */ 52 #define OC_DEVICE_ID2 0x710 /* Device Id for BE3 cards */ 53 #define OC_DEVICE_ID3 0xe220 /* Device id for Lancer cards */ 54 #define OC_DEVICE_ID4 0xe228 /* Device id for VF in Lancer */ 55 #define OC_DEVICE_ID5 0x720 /* Device Id for Skyhawk cards */ 56 #define OC_DEVICE_ID6 0x728 /* Device id for VF in SkyHawk */ 57 #define OC_SUBSYS_DEVICE_ID1 0xE602 58 #define OC_SUBSYS_DEVICE_ID2 0xE642 59 #define OC_SUBSYS_DEVICE_ID3 0xE612 60 #define OC_SUBSYS_DEVICE_ID4 0xE652 61 62 static inline char *nic_name(struct pci_dev *pdev) 63 { 64 switch (pdev->device) { 65 case OC_DEVICE_ID1: 66 return OC_NAME; 67 case OC_DEVICE_ID2: 68 return OC_NAME_BE; 69 case OC_DEVICE_ID3: 70 case OC_DEVICE_ID4: 71 return OC_NAME_LANCER; 72 case BE_DEVICE_ID2: 73 return BE3_NAME; 74 case OC_DEVICE_ID5: 75 case OC_DEVICE_ID6: 76 return OC_NAME_SH; 77 default: 78 return BE_NAME; 79 } 80 } 81 82 /* Number of bytes of an RX frame that are copied to skb->data */ 83 #define BE_HDR_LEN ((u16) 64) 84 /* allocate extra space to allow tunneling decapsulation without head reallocation */ 85 #define BE_RX_SKB_ALLOC_SIZE (BE_HDR_LEN + 64) 86 87 #define BE_MAX_JUMBO_FRAME_SIZE 9018 88 #define BE_MIN_MTU 256 89 #define BE_MAX_MTU (BE_MAX_JUMBO_FRAME_SIZE - \ 90 (ETH_HLEN + ETH_FCS_LEN)) 91 92 #define BE_NUM_VLANS_SUPPORTED 64 93 #define BE_MAX_EQD 128u 94 #define BE_MAX_TX_FRAG_COUNT 30 95 96 #define EVNT_Q_LEN 1024 97 #define TX_Q_LEN 2048 98 #define TX_CQ_LEN 1024 99 #define RX_Q_LEN 1024 /* Does not support any other value */ 100 #define RX_CQ_LEN 1024 101 #define MCC_Q_LEN 128 /* total size not to exceed 8 pages */ 102 #define MCC_CQ_LEN 256 103 104 #define BE2_MAX_RSS_QS 4 105 #define BE3_MAX_RSS_QS 16 106 #define BE3_MAX_TX_QS 16 107 #define BE3_MAX_EVT_QS 16 108 #define BE3_SRIOV_MAX_EVT_QS 8 109 110 #define MAX_RX_QS 32 111 #define MAX_EVT_QS 32 112 #define MAX_TX_QS 32 113 114 #define MAX_ROCE_EQS 5 115 #define MAX_MSIX_VECTORS 32 116 #define MIN_MSIX_VECTORS 1 117 #define BE_NAPI_WEIGHT 64 118 #define MAX_RX_POST BE_NAPI_WEIGHT /* Frags posted at a time */ 119 #define RX_FRAGS_REFILL_WM (RX_Q_LEN - MAX_RX_POST) 120 121 #define MAX_VFS 30 /* Max VFs supported by BE3 FW */ 122 #define FW_VER_LEN 32 123 124 #define RSS_INDIR_TABLE_LEN 128 125 #define RSS_HASH_KEY_LEN 40 126 127 struct be_dma_mem { 128 void *va; 129 dma_addr_t dma; 130 u32 size; 131 }; 132 133 struct be_queue_info { 134 struct be_dma_mem dma_mem; 135 u16 len; 136 u16 entry_size; /* Size of an element in the queue */ 137 u16 id; 138 u16 tail, head; 139 bool created; 140 atomic_t used; /* Number of valid elements in the queue */ 141 }; 142 143 static inline u32 MODULO(u16 val, u16 limit) 144 { 145 BUG_ON(limit & (limit - 1)); 146 return val & (limit - 1); 147 } 148 149 static inline void index_adv(u16 *index, u16 val, u16 limit) 150 { 151 *index = MODULO((*index + val), limit); 152 } 153 154 static inline void index_inc(u16 *index, u16 limit) 155 { 156 *index = MODULO((*index + 1), limit); 157 } 158 159 static inline void *queue_head_node(struct be_queue_info *q) 160 { 161 return q->dma_mem.va + q->head * q->entry_size; 162 } 163 164 static inline void *queue_tail_node(struct be_queue_info *q) 165 { 166 return q->dma_mem.va + q->tail * q->entry_size; 167 } 168 169 static inline void *queue_index_node(struct be_queue_info *q, u16 index) 170 { 171 return q->dma_mem.va + index * q->entry_size; 172 } 173 174 static inline void queue_head_inc(struct be_queue_info *q) 175 { 176 index_inc(&q->head, q->len); 177 } 178 179 static inline void index_dec(u16 *index, u16 limit) 180 { 181 *index = MODULO((*index - 1), limit); 182 } 183 184 static inline void queue_tail_inc(struct be_queue_info *q) 185 { 186 index_inc(&q->tail, q->len); 187 } 188 189 struct be_eq_obj { 190 struct be_queue_info q; 191 char desc[32]; 192 193 /* Adaptive interrupt coalescing (AIC) info */ 194 bool enable_aic; 195 u32 min_eqd; /* in usecs */ 196 u32 max_eqd; /* in usecs */ 197 u32 eqd; /* configured val when aic is off */ 198 u32 cur_eqd; /* in usecs */ 199 200 u8 idx; /* array index */ 201 u8 msix_idx; 202 u16 spurious_intr; 203 struct napi_struct napi; 204 struct be_adapter *adapter; 205 206 #ifdef CONFIG_NET_RX_BUSY_POLL 207 #define BE_EQ_IDLE 0 208 #define BE_EQ_NAPI 1 /* napi owns this EQ */ 209 #define BE_EQ_POLL 2 /* poll owns this EQ */ 210 #define BE_EQ_LOCKED (BE_EQ_NAPI | BE_EQ_POLL) 211 #define BE_EQ_NAPI_YIELD 4 /* napi yielded this EQ */ 212 #define BE_EQ_POLL_YIELD 8 /* poll yielded this EQ */ 213 #define BE_EQ_YIELD (BE_EQ_NAPI_YIELD | BE_EQ_POLL_YIELD) 214 #define BE_EQ_USER_PEND (BE_EQ_POLL | BE_EQ_POLL_YIELD) 215 unsigned int state; 216 spinlock_t lock; /* lock to serialize napi and busy-poll */ 217 #endif /* CONFIG_NET_RX_BUSY_POLL */ 218 } ____cacheline_aligned_in_smp; 219 220 struct be_aic_obj { /* Adaptive interrupt coalescing (AIC) info */ 221 bool enable; 222 u32 min_eqd; /* in usecs */ 223 u32 max_eqd; /* in usecs */ 224 u32 prev_eqd; /* in usecs */ 225 u32 et_eqd; /* configured val when aic is off */ 226 ulong jiffies; 227 u64 rx_pkts_prev; /* Used to calculate RX pps */ 228 u64 tx_reqs_prev; /* Used to calculate TX pps */ 229 }; 230 231 enum { 232 NAPI_POLLING, 233 BUSY_POLLING 234 }; 235 236 struct be_mcc_obj { 237 struct be_queue_info q; 238 struct be_queue_info cq; 239 bool rearm_cq; 240 }; 241 242 struct be_tx_stats { 243 u64 tx_bytes; 244 u64 tx_pkts; 245 u64 tx_reqs; 246 u64 tx_wrbs; 247 u64 tx_compl; 248 ulong tx_jiffies; 249 u32 tx_stops; 250 u32 tx_drv_drops; /* pkts dropped by driver */ 251 /* the error counters are described in be_ethtool.c */ 252 u32 tx_hdr_parse_err; 253 u32 tx_dma_err; 254 u32 tx_tso_err; 255 u32 tx_spoof_check_err; 256 u32 tx_qinq_err; 257 u32 tx_internal_parity_err; 258 struct u64_stats_sync sync; 259 struct u64_stats_sync sync_compl; 260 }; 261 262 struct be_tx_obj { 263 u32 db_offset; 264 struct be_queue_info q; 265 struct be_queue_info cq; 266 /* Remember the skbs that were transmitted */ 267 struct sk_buff *sent_skb_list[TX_Q_LEN]; 268 struct be_tx_stats stats; 269 } ____cacheline_aligned_in_smp; 270 271 /* Struct to remember the pages posted for rx frags */ 272 struct be_rx_page_info { 273 struct page *page; 274 /* set to page-addr for last frag of the page & frag-addr otherwise */ 275 DEFINE_DMA_UNMAP_ADDR(bus); 276 u16 page_offset; 277 bool last_frag; /* last frag of the page */ 278 }; 279 280 struct be_rx_stats { 281 u64 rx_bytes; 282 u64 rx_pkts; 283 u32 rx_drops_no_skbs; /* skb allocation errors */ 284 u32 rx_drops_no_frags; /* HW has no fetched frags */ 285 u32 rx_post_fail; /* page post alloc failures */ 286 u32 rx_compl; 287 u32 rx_mcast_pkts; 288 u32 rx_compl_err; /* completions with err set */ 289 struct u64_stats_sync sync; 290 }; 291 292 struct be_rx_compl_info { 293 u32 rss_hash; 294 u16 vlan_tag; 295 u16 pkt_size; 296 u16 port; 297 u8 vlanf; 298 u8 num_rcvd; 299 u8 err; 300 u8 ipf; 301 u8 tcpf; 302 u8 udpf; 303 u8 ip_csum; 304 u8 l4_csum; 305 u8 ipv6; 306 u8 qnq; 307 u8 pkt_type; 308 u8 ip_frag; 309 u8 tunneled; 310 }; 311 312 struct be_rx_obj { 313 struct be_adapter *adapter; 314 struct be_queue_info q; 315 struct be_queue_info cq; 316 struct be_rx_compl_info rxcp; 317 struct be_rx_page_info page_info_tbl[RX_Q_LEN]; 318 struct be_rx_stats stats; 319 u8 rss_id; 320 bool rx_post_starved; /* Zero rx frags have been posted to BE */ 321 } ____cacheline_aligned_in_smp; 322 323 struct be_drv_stats { 324 u32 be_on_die_temperature; 325 u32 eth_red_drops; 326 u32 dma_map_errors; 327 u32 rx_drops_no_pbuf; 328 u32 rx_drops_no_txpb; 329 u32 rx_drops_no_erx_descr; 330 u32 rx_drops_no_tpre_descr; 331 u32 rx_drops_too_many_frags; 332 u32 forwarded_packets; 333 u32 rx_drops_mtu; 334 u32 rx_crc_errors; 335 u32 rx_alignment_symbol_errors; 336 u32 rx_pause_frames; 337 u32 rx_priority_pause_frames; 338 u32 rx_control_frames; 339 u32 rx_in_range_errors; 340 u32 rx_out_range_errors; 341 u32 rx_frame_too_long; 342 u32 rx_address_filtered; 343 u32 rx_dropped_too_small; 344 u32 rx_dropped_too_short; 345 u32 rx_dropped_header_too_small; 346 u32 rx_dropped_tcp_length; 347 u32 rx_dropped_runt; 348 u32 rx_ip_checksum_errs; 349 u32 rx_tcp_checksum_errs; 350 u32 rx_udp_checksum_errs; 351 u32 tx_pauseframes; 352 u32 tx_priority_pauseframes; 353 u32 tx_controlframes; 354 u32 rxpp_fifo_overflow_drop; 355 u32 rx_input_fifo_overflow_drop; 356 u32 pmem_fifo_overflow_drop; 357 u32 jabber_events; 358 u32 rx_roce_bytes_lsd; 359 u32 rx_roce_bytes_msd; 360 u32 rx_roce_frames; 361 u32 roce_drops_payload_len; 362 u32 roce_drops_crc; 363 }; 364 365 /* A vlan-id of 0xFFFF must be used to clear transparent vlan-tagging */ 366 #define BE_RESET_VLAN_TAG_ID 0xFFFF 367 368 struct be_vf_cfg { 369 unsigned char mac_addr[ETH_ALEN]; 370 int if_handle; 371 int pmac_id; 372 u16 vlan_tag; 373 u32 tx_rate; 374 u32 plink_tracking; 375 }; 376 377 enum vf_state { 378 ENABLED = 0, 379 ASSIGNED = 1 380 }; 381 382 #define BE_FLAGS_LINK_STATUS_INIT 1 383 #define BE_FLAGS_SRIOV_ENABLED (1 << 2) 384 #define BE_FLAGS_WORKER_SCHEDULED (1 << 3) 385 #define BE_FLAGS_VLAN_PROMISC (1 << 4) 386 #define BE_FLAGS_MCAST_PROMISC (1 << 5) 387 #define BE_FLAGS_NAPI_ENABLED (1 << 9) 388 #define BE_FLAGS_QNQ_ASYNC_EVT_RCVD (1 << 11) 389 #define BE_FLAGS_VXLAN_OFFLOADS (1 << 12) 390 #define BE_FLAGS_SETUP_DONE (1 << 13) 391 392 #define BE_UC_PMAC_COUNT 30 393 #define BE_VF_UC_PMAC_COUNT 2 394 395 /* Ethtool set_dump flags */ 396 #define LANCER_INITIATE_FW_DUMP 0x1 397 #define LANCER_DELETE_FW_DUMP 0x2 398 399 struct phy_info { 400 u8 transceiver; 401 u8 autoneg; 402 u8 fc_autoneg; 403 u8 port_type; 404 u16 phy_type; 405 u16 interface_type; 406 u32 misc_params; 407 u16 auto_speeds_supported; 408 u16 fixed_speeds_supported; 409 int link_speed; 410 u32 advertising; 411 u32 supported; 412 u8 cable_type; 413 }; 414 415 struct be_resources { 416 u16 max_vfs; /* Total VFs "really" supported by FW/HW */ 417 u16 max_mcast_mac; 418 u16 max_tx_qs; 419 u16 max_rss_qs; 420 u16 max_rx_qs; 421 u16 max_uc_mac; /* Max UC MACs programmable */ 422 u16 max_vlans; /* Number of vlans supported */ 423 u16 max_evt_qs; 424 u32 if_cap_flags; 425 u32 vf_if_cap_flags; /* VF if capability flags */ 426 }; 427 428 struct rss_info { 429 u64 rss_flags; 430 u8 rsstable[RSS_INDIR_TABLE_LEN]; 431 u8 rss_queue[RSS_INDIR_TABLE_LEN]; 432 u8 rss_hkey[RSS_HASH_KEY_LEN]; 433 }; 434 435 struct be_adapter { 436 struct pci_dev *pdev; 437 struct net_device *netdev; 438 439 u8 __iomem *csr; /* CSR BAR used only for BE2/3 */ 440 u8 __iomem *db; /* Door Bell */ 441 442 struct mutex mbox_lock; /* For serializing mbox cmds to BE card */ 443 struct be_dma_mem mbox_mem; 444 /* Mbox mem is adjusted to align to 16 bytes. The allocated addr 445 * is stored for freeing purpose */ 446 struct be_dma_mem mbox_mem_alloced; 447 448 struct be_mcc_obj mcc_obj; 449 spinlock_t mcc_lock; /* For serializing mcc cmds to BE card */ 450 spinlock_t mcc_cq_lock; 451 452 u16 cfg_num_qs; /* configured via set-channels */ 453 u16 num_evt_qs; 454 u16 num_msix_vec; 455 struct be_eq_obj eq_obj[MAX_EVT_QS]; 456 struct msix_entry msix_entries[MAX_MSIX_VECTORS]; 457 bool isr_registered; 458 459 /* TX Rings */ 460 u16 num_tx_qs; 461 struct be_tx_obj tx_obj[MAX_TX_QS]; 462 463 /* Rx rings */ 464 u16 num_rx_qs; 465 struct be_rx_obj rx_obj[MAX_RX_QS]; 466 u32 big_page_size; /* Compounded page size shared by rx wrbs */ 467 468 struct be_drv_stats drv_stats; 469 struct be_aic_obj aic_obj[MAX_EVT_QS]; 470 u16 vlans_added; 471 unsigned long vids[BITS_TO_LONGS(VLAN_N_VID)]; 472 u8 vlan_prio_bmap; /* Available Priority BitMap */ 473 u16 recommended_prio; /* Recommended Priority */ 474 struct be_dma_mem rx_filter; /* Cmd DMA mem for rx-filter */ 475 476 struct be_dma_mem stats_cmd; 477 /* Work queue used to perform periodic tasks like getting statistics */ 478 struct delayed_work work; 479 u16 work_counter; 480 481 struct delayed_work func_recovery_work; 482 u32 flags; 483 u32 cmd_privileges; 484 /* Ethtool knobs and info */ 485 char fw_ver[FW_VER_LEN]; 486 char fw_on_flash[FW_VER_LEN]; 487 int if_handle; /* Used to configure filtering */ 488 u32 *pmac_id; /* MAC addr handle used by BE card */ 489 u32 beacon_state; /* for set_phys_id */ 490 491 bool eeh_error; 492 bool fw_timeout; 493 bool hw_error; 494 495 u32 port_num; 496 bool promiscuous; 497 u8 mc_type; 498 u32 function_mode; 499 u32 function_caps; 500 u32 rx_fc; /* Rx flow control */ 501 u32 tx_fc; /* Tx flow control */ 502 bool stats_cmd_sent; 503 struct { 504 u32 size; 505 u32 total_size; 506 u64 io_addr; 507 } roce_db; 508 u32 num_msix_roce_vec; 509 struct ocrdma_dev *ocrdma_dev; 510 struct list_head entry; 511 512 u32 flash_status; 513 struct completion et_cmd_compl; 514 515 struct be_resources pool_res; /* resources available for the port */ 516 struct be_resources res; /* resources available for the func */ 517 u16 num_vfs; /* Number of VFs provisioned by PF */ 518 u8 virtfn; 519 struct be_vf_cfg *vf_cfg; 520 bool be3_native; 521 u32 sli_family; 522 u8 hba_port_num; 523 u16 pvid; 524 __be16 vxlan_port; 525 int vxlan_port_count; 526 struct phy_info phy; 527 u8 wol_cap; 528 bool wol_en; 529 u32 uc_macs; /* Count of secondary UC MAC programmed */ 530 u16 asic_rev; 531 u16 qnq_vid; 532 u32 msg_enable; 533 int be_get_temp_freq; 534 u8 pf_number; 535 struct rss_info rss_info; 536 }; 537 538 #define be_physfn(adapter) (!adapter->virtfn) 539 #define be_virtfn(adapter) (adapter->virtfn) 540 #define sriov_enabled(adapter) (adapter->flags & \ 541 BE_FLAGS_SRIOV_ENABLED) 542 543 #define for_all_vfs(adapter, vf_cfg, i) \ 544 for (i = 0, vf_cfg = &adapter->vf_cfg[i]; i < adapter->num_vfs; \ 545 i++, vf_cfg++) 546 547 #define ON 1 548 #define OFF 0 549 550 #define be_max_vlans(adapter) (adapter->res.max_vlans) 551 #define be_max_uc(adapter) (adapter->res.max_uc_mac) 552 #define be_max_mc(adapter) (adapter->res.max_mcast_mac) 553 #define be_max_vfs(adapter) (adapter->pool_res.max_vfs) 554 #define be_max_rss(adapter) (adapter->res.max_rss_qs) 555 #define be_max_txqs(adapter) (adapter->res.max_tx_qs) 556 #define be_max_prio_txqs(adapter) (adapter->res.max_prio_tx_qs) 557 #define be_max_rxqs(adapter) (adapter->res.max_rx_qs) 558 #define be_max_eqs(adapter) (adapter->res.max_evt_qs) 559 #define be_if_cap_flags(adapter) (adapter->res.if_cap_flags) 560 561 static inline u16 be_max_qs(struct be_adapter *adapter) 562 { 563 /* If no RSS, need atleast the one def RXQ */ 564 u16 num = max_t(u16, be_max_rss(adapter), 1); 565 566 num = min(num, be_max_eqs(adapter)); 567 return min_t(u16, num, num_online_cpus()); 568 } 569 570 /* Is BE in pvid_tagging mode */ 571 #define be_pvid_tagging_enabled(adapter) (adapter->pvid) 572 573 /* Is BE in QNQ multi-channel mode */ 574 #define be_is_qnq_mode(adapter) (adapter->function_mode & QNQ_MODE) 575 576 #define lancer_chip(adapter) (adapter->pdev->device == OC_DEVICE_ID3 || \ 577 adapter->pdev->device == OC_DEVICE_ID4) 578 579 #define skyhawk_chip(adapter) (adapter->pdev->device == OC_DEVICE_ID5 || \ 580 adapter->pdev->device == OC_DEVICE_ID6) 581 582 #define BE3_chip(adapter) (adapter->pdev->device == BE_DEVICE_ID2 || \ 583 adapter->pdev->device == OC_DEVICE_ID2) 584 585 #define BE2_chip(adapter) (adapter->pdev->device == BE_DEVICE_ID1 || \ 586 adapter->pdev->device == OC_DEVICE_ID1) 587 588 #define BEx_chip(adapter) (BE3_chip(adapter) || BE2_chip(adapter)) 589 590 #define be_roce_supported(adapter) (skyhawk_chip(adapter) && \ 591 (adapter->function_mode & RDMA_ENABLED)) 592 593 extern const struct ethtool_ops be_ethtool_ops; 594 595 #define msix_enabled(adapter) (adapter->num_msix_vec > 0) 596 #define num_irqs(adapter) (msix_enabled(adapter) ? \ 597 adapter->num_msix_vec : 1) 598 #define tx_stats(txo) (&(txo)->stats) 599 #define rx_stats(rxo) (&(rxo)->stats) 600 601 /* The default RXQ is the last RXQ */ 602 #define default_rxo(adpt) (&adpt->rx_obj[adpt->num_rx_qs - 1]) 603 604 #define for_all_rx_queues(adapter, rxo, i) \ 605 for (i = 0, rxo = &adapter->rx_obj[i]; i < adapter->num_rx_qs; \ 606 i++, rxo++) 607 608 /* Skip the default non-rss queue (last one)*/ 609 #define for_all_rss_queues(adapter, rxo, i) \ 610 for (i = 0, rxo = &adapter->rx_obj[i]; i < (adapter->num_rx_qs - 1);\ 611 i++, rxo++) 612 613 #define for_all_tx_queues(adapter, txo, i) \ 614 for (i = 0, txo = &adapter->tx_obj[i]; i < adapter->num_tx_qs; \ 615 i++, txo++) 616 617 #define for_all_evt_queues(adapter, eqo, i) \ 618 for (i = 0, eqo = &adapter->eq_obj[i]; i < adapter->num_evt_qs; \ 619 i++, eqo++) 620 621 #define for_all_rx_queues_on_eq(adapter, eqo, rxo, i) \ 622 for (i = eqo->idx, rxo = &adapter->rx_obj[i]; i < adapter->num_rx_qs;\ 623 i += adapter->num_evt_qs, rxo += adapter->num_evt_qs) 624 625 #define for_all_tx_queues_on_eq(adapter, eqo, txo, i) \ 626 for (i = eqo->idx, txo = &adapter->tx_obj[i]; i < adapter->num_tx_qs;\ 627 i += adapter->num_evt_qs, txo += adapter->num_evt_qs) 628 629 #define is_mcc_eqo(eqo) (eqo->idx == 0) 630 #define mcc_eqo(adapter) (&adapter->eq_obj[0]) 631 632 #define PAGE_SHIFT_4K 12 633 #define PAGE_SIZE_4K (1 << PAGE_SHIFT_4K) 634 635 /* Returns number of pages spanned by the data starting at the given addr */ 636 #define PAGES_4K_SPANNED(_address, size) \ 637 ((u32)((((size_t)(_address) & (PAGE_SIZE_4K - 1)) + \ 638 (size) + (PAGE_SIZE_4K - 1)) >> PAGE_SHIFT_4K)) 639 640 /* Returns bit offset within a DWORD of a bitfield */ 641 #define AMAP_BIT_OFFSET(_struct, field) \ 642 (((size_t)&(((_struct *)0)->field))%32) 643 644 /* Returns the bit mask of the field that is NOT shifted into location. */ 645 static inline u32 amap_mask(u32 bitsize) 646 { 647 return (bitsize == 32 ? 0xFFFFFFFF : (1 << bitsize) - 1); 648 } 649 650 static inline void 651 amap_set(void *ptr, u32 dw_offset, u32 mask, u32 offset, u32 value) 652 { 653 u32 *dw = (u32 *) ptr + dw_offset; 654 *dw &= ~(mask << offset); 655 *dw |= (mask & value) << offset; 656 } 657 658 #define AMAP_SET_BITS(_struct, field, ptr, val) \ 659 amap_set(ptr, \ 660 offsetof(_struct, field)/32, \ 661 amap_mask(sizeof(((_struct *)0)->field)), \ 662 AMAP_BIT_OFFSET(_struct, field), \ 663 val) 664 665 static inline u32 amap_get(void *ptr, u32 dw_offset, u32 mask, u32 offset) 666 { 667 u32 *dw = (u32 *) ptr; 668 return mask & (*(dw + dw_offset) >> offset); 669 } 670 671 #define AMAP_GET_BITS(_struct, field, ptr) \ 672 amap_get(ptr, \ 673 offsetof(_struct, field)/32, \ 674 amap_mask(sizeof(((_struct *)0)->field)), \ 675 AMAP_BIT_OFFSET(_struct, field)) 676 677 #define GET_RX_COMPL_V0_BITS(field, ptr) \ 678 AMAP_GET_BITS(struct amap_eth_rx_compl_v0, field, ptr) 679 680 #define GET_RX_COMPL_V1_BITS(field, ptr) \ 681 AMAP_GET_BITS(struct amap_eth_rx_compl_v1, field, ptr) 682 683 #define GET_TX_COMPL_BITS(field, ptr) \ 684 AMAP_GET_BITS(struct amap_eth_tx_compl, field, ptr) 685 686 #define SET_TX_WRB_HDR_BITS(field, ptr, val) \ 687 AMAP_SET_BITS(struct amap_eth_hdr_wrb, field, ptr, val) 688 689 #define be_dws_cpu_to_le(wrb, len) swap_dws(wrb, len) 690 #define be_dws_le_to_cpu(wrb, len) swap_dws(wrb, len) 691 static inline void swap_dws(void *wrb, int len) 692 { 693 #ifdef __BIG_ENDIAN 694 u32 *dw = wrb; 695 BUG_ON(len % 4); 696 do { 697 *dw = cpu_to_le32(*dw); 698 dw++; 699 len -= 4; 700 } while (len); 701 #endif /* __BIG_ENDIAN */ 702 } 703 704 #define be_cmd_status(status) (status > 0 ? -EIO : status) 705 706 static inline u8 is_tcp_pkt(struct sk_buff *skb) 707 { 708 u8 val = 0; 709 710 if (ip_hdr(skb)->version == 4) 711 val = (ip_hdr(skb)->protocol == IPPROTO_TCP); 712 else if (ip_hdr(skb)->version == 6) 713 val = (ipv6_hdr(skb)->nexthdr == NEXTHDR_TCP); 714 715 return val; 716 } 717 718 static inline u8 is_udp_pkt(struct sk_buff *skb) 719 { 720 u8 val = 0; 721 722 if (ip_hdr(skb)->version == 4) 723 val = (ip_hdr(skb)->protocol == IPPROTO_UDP); 724 else if (ip_hdr(skb)->version == 6) 725 val = (ipv6_hdr(skb)->nexthdr == NEXTHDR_UDP); 726 727 return val; 728 } 729 730 static inline bool is_ipv4_pkt(struct sk_buff *skb) 731 { 732 return skb->protocol == htons(ETH_P_IP) && ip_hdr(skb)->version == 4; 733 } 734 735 static inline void be_vf_eth_addr_generate(struct be_adapter *adapter, u8 *mac) 736 { 737 u32 addr; 738 739 addr = jhash(adapter->netdev->dev_addr, ETH_ALEN, 0); 740 741 mac[5] = (u8)(addr & 0xFF); 742 mac[4] = (u8)((addr >> 8) & 0xFF); 743 mac[3] = (u8)((addr >> 16) & 0xFF); 744 /* Use the OUI from the current MAC address */ 745 memcpy(mac, adapter->netdev->dev_addr, 3); 746 } 747 748 static inline bool be_multi_rxq(const struct be_adapter *adapter) 749 { 750 return adapter->num_rx_qs > 1; 751 } 752 753 static inline bool be_error(struct be_adapter *adapter) 754 { 755 return adapter->eeh_error || adapter->hw_error || adapter->fw_timeout; 756 } 757 758 static inline bool be_hw_error(struct be_adapter *adapter) 759 { 760 return adapter->eeh_error || adapter->hw_error; 761 } 762 763 static inline void be_clear_all_error(struct be_adapter *adapter) 764 { 765 adapter->eeh_error = false; 766 adapter->hw_error = false; 767 adapter->fw_timeout = false; 768 } 769 770 static inline bool be_is_wol_excluded(struct be_adapter *adapter) 771 { 772 struct pci_dev *pdev = adapter->pdev; 773 774 if (!be_physfn(adapter)) 775 return true; 776 777 switch (pdev->subsystem_device) { 778 case OC_SUBSYS_DEVICE_ID1: 779 case OC_SUBSYS_DEVICE_ID2: 780 case OC_SUBSYS_DEVICE_ID3: 781 case OC_SUBSYS_DEVICE_ID4: 782 return true; 783 default: 784 return false; 785 } 786 } 787 788 static inline int qnq_async_evt_rcvd(struct be_adapter *adapter) 789 { 790 return adapter->flags & BE_FLAGS_QNQ_ASYNC_EVT_RCVD; 791 } 792 793 #ifdef CONFIG_NET_RX_BUSY_POLL 794 static inline bool be_lock_napi(struct be_eq_obj *eqo) 795 { 796 bool status = true; 797 798 spin_lock(&eqo->lock); /* BH is already disabled */ 799 if (eqo->state & BE_EQ_LOCKED) { 800 WARN_ON(eqo->state & BE_EQ_NAPI); 801 eqo->state |= BE_EQ_NAPI_YIELD; 802 status = false; 803 } else { 804 eqo->state = BE_EQ_NAPI; 805 } 806 spin_unlock(&eqo->lock); 807 return status; 808 } 809 810 static inline void be_unlock_napi(struct be_eq_obj *eqo) 811 { 812 spin_lock(&eqo->lock); /* BH is already disabled */ 813 814 WARN_ON(eqo->state & (BE_EQ_POLL | BE_EQ_NAPI_YIELD)); 815 eqo->state = BE_EQ_IDLE; 816 817 spin_unlock(&eqo->lock); 818 } 819 820 static inline bool be_lock_busy_poll(struct be_eq_obj *eqo) 821 { 822 bool status = true; 823 824 spin_lock_bh(&eqo->lock); 825 if (eqo->state & BE_EQ_LOCKED) { 826 eqo->state |= BE_EQ_POLL_YIELD; 827 status = false; 828 } else { 829 eqo->state |= BE_EQ_POLL; 830 } 831 spin_unlock_bh(&eqo->lock); 832 return status; 833 } 834 835 static inline void be_unlock_busy_poll(struct be_eq_obj *eqo) 836 { 837 spin_lock_bh(&eqo->lock); 838 839 WARN_ON(eqo->state & (BE_EQ_NAPI)); 840 eqo->state = BE_EQ_IDLE; 841 842 spin_unlock_bh(&eqo->lock); 843 } 844 845 static inline void be_enable_busy_poll(struct be_eq_obj *eqo) 846 { 847 spin_lock_init(&eqo->lock); 848 eqo->state = BE_EQ_IDLE; 849 } 850 851 static inline void be_disable_busy_poll(struct be_eq_obj *eqo) 852 { 853 local_bh_disable(); 854 855 /* It's enough to just acquire napi lock on the eqo to stop 856 * be_busy_poll() from processing any queueus. 857 */ 858 while (!be_lock_napi(eqo)) 859 mdelay(1); 860 861 local_bh_enable(); 862 } 863 864 #else /* CONFIG_NET_RX_BUSY_POLL */ 865 866 static inline bool be_lock_napi(struct be_eq_obj *eqo) 867 { 868 return true; 869 } 870 871 static inline void be_unlock_napi(struct be_eq_obj *eqo) 872 { 873 } 874 875 static inline bool be_lock_busy_poll(struct be_eq_obj *eqo) 876 { 877 return false; 878 } 879 880 static inline void be_unlock_busy_poll(struct be_eq_obj *eqo) 881 { 882 } 883 884 static inline void be_enable_busy_poll(struct be_eq_obj *eqo) 885 { 886 } 887 888 static inline void be_disable_busy_poll(struct be_eq_obj *eqo) 889 { 890 } 891 #endif /* CONFIG_NET_RX_BUSY_POLL */ 892 893 void be_cq_notify(struct be_adapter *adapter, u16 qid, bool arm, 894 u16 num_popped); 895 void be_link_status_update(struct be_adapter *adapter, u8 link_status); 896 void be_parse_stats(struct be_adapter *adapter); 897 int be_load_fw(struct be_adapter *adapter, u8 *func); 898 bool be_is_wol_supported(struct be_adapter *adapter); 899 bool be_pause_supported(struct be_adapter *adapter); 900 u32 be_get_fw_log_level(struct be_adapter *adapter); 901 902 static inline int fw_major_num(const char *fw_ver) 903 { 904 int fw_major = 0; 905 906 sscanf(fw_ver, "%d.", &fw_major); 907 908 return fw_major; 909 } 910 911 int be_update_queues(struct be_adapter *adapter); 912 int be_poll(struct napi_struct *napi, int budget); 913 914 /* 915 * internal function to initialize-cleanup roce device. 916 */ 917 void be_roce_dev_add(struct be_adapter *); 918 void be_roce_dev_remove(struct be_adapter *); 919 920 /* 921 * internal function to open-close roce device during ifup-ifdown. 922 */ 923 void be_roce_dev_open(struct be_adapter *); 924 void be_roce_dev_close(struct be_adapter *); 925 void be_roce_dev_shutdown(struct be_adapter *); 926 927 #endif /* BE_H */ 928