1 /* 2 * Copyright (C) 2005 - 2015 Emulex 3 * All rights reserved. 4 * 5 * This program is free software; you can redistribute it and/or 6 * modify it under the terms of the GNU General Public License version 2 7 * as published by the Free Software Foundation. The full GNU General 8 * Public License is included in this distribution in the file called COPYING. 9 * 10 * Contact Information: 11 * linux-drivers@emulex.com 12 * 13 * Emulex 14 * 3333 Susan Street 15 * Costa Mesa, CA 92626 16 */ 17 18 #ifndef BE_H 19 #define BE_H 20 21 #include <linux/pci.h> 22 #include <linux/etherdevice.h> 23 #include <linux/delay.h> 24 #include <net/tcp.h> 25 #include <net/ip.h> 26 #include <net/ipv6.h> 27 #include <linux/if_vlan.h> 28 #include <linux/workqueue.h> 29 #include <linux/interrupt.h> 30 #include <linux/firmware.h> 31 #include <linux/slab.h> 32 #include <linux/u64_stats_sync.h> 33 #include <linux/cpumask.h> 34 #include <linux/hwmon.h> 35 #include <linux/hwmon-sysfs.h> 36 37 #include "be_hw.h" 38 #include "be_roce.h" 39 40 #define DRV_VER "11.0.0.0" 41 #define DRV_NAME "be2net" 42 #define BE_NAME "Emulex BladeEngine2" 43 #define BE3_NAME "Emulex BladeEngine3" 44 #define OC_NAME "Emulex OneConnect" 45 #define OC_NAME_BE OC_NAME "(be3)" 46 #define OC_NAME_LANCER OC_NAME "(Lancer)" 47 #define OC_NAME_SH OC_NAME "(Skyhawk)" 48 #define DRV_DESC "Emulex OneConnect NIC Driver" 49 50 #define BE_VENDOR_ID 0x19a2 51 #define EMULEX_VENDOR_ID 0x10df 52 #define BE_DEVICE_ID1 0x211 53 #define BE_DEVICE_ID2 0x221 54 #define OC_DEVICE_ID1 0x700 /* Device Id for BE2 cards */ 55 #define OC_DEVICE_ID2 0x710 /* Device Id for BE3 cards */ 56 #define OC_DEVICE_ID3 0xe220 /* Device id for Lancer cards */ 57 #define OC_DEVICE_ID4 0xe228 /* Device id for VF in Lancer */ 58 #define OC_DEVICE_ID5 0x720 /* Device Id for Skyhawk cards */ 59 #define OC_DEVICE_ID6 0x728 /* Device id for VF in SkyHawk */ 60 #define OC_SUBSYS_DEVICE_ID1 0xE602 61 #define OC_SUBSYS_DEVICE_ID2 0xE642 62 #define OC_SUBSYS_DEVICE_ID3 0xE612 63 #define OC_SUBSYS_DEVICE_ID4 0xE652 64 65 /* Number of bytes of an RX frame that are copied to skb->data */ 66 #define BE_HDR_LEN ((u16) 64) 67 /* allocate extra space to allow tunneling decapsulation without head reallocation */ 68 #define BE_RX_SKB_ALLOC_SIZE (BE_HDR_LEN + 64) 69 70 #define BE_MAX_JUMBO_FRAME_SIZE 9018 71 #define BE_MIN_MTU 256 72 #define BE_MAX_MTU (BE_MAX_JUMBO_FRAME_SIZE - \ 73 (ETH_HLEN + ETH_FCS_LEN)) 74 75 /* Accommodate for QnQ configurations where VLAN insertion is enabled in HW */ 76 #define BE_MAX_GSO_SIZE (65535 - 2 * VLAN_HLEN) 77 78 #define BE_NUM_VLANS_SUPPORTED 64 79 #define BE_MAX_EQD 128u 80 #define BE_MAX_TX_FRAG_COUNT 30 81 82 #define EVNT_Q_LEN 1024 83 #define TX_Q_LEN 2048 84 #define TX_CQ_LEN 1024 85 #define RX_Q_LEN 1024 /* Does not support any other value */ 86 #define RX_CQ_LEN 1024 87 #define MCC_Q_LEN 128 /* total size not to exceed 8 pages */ 88 #define MCC_CQ_LEN 256 89 90 #define BE2_MAX_RSS_QS 4 91 #define BE3_MAX_RSS_QS 16 92 #define BE3_MAX_TX_QS 16 93 #define BE3_MAX_EVT_QS 16 94 #define BE3_SRIOV_MAX_EVT_QS 8 95 #define SH_VF_MAX_NIC_EQS 3 /* Skyhawk VFs can have a max of 4 EQs 96 * and at least 1 is granted to either 97 * SURF/DPDK 98 */ 99 100 #define MAX_RSS_IFACES 15 101 #define MAX_RX_QS 32 102 #define MAX_EVT_QS 32 103 #define MAX_TX_QS 32 104 105 #define MAX_ROCE_EQS 5 106 #define MAX_MSIX_VECTORS 32 107 #define MIN_MSIX_VECTORS 1 108 #define BE_NAPI_WEIGHT 64 109 #define MAX_RX_POST BE_NAPI_WEIGHT /* Frags posted at a time */ 110 #define RX_FRAGS_REFILL_WM (RX_Q_LEN - MAX_RX_POST) 111 #define MAX_NUM_POST_ERX_DB 255u 112 113 #define MAX_VFS 30 /* Max VFs supported by BE3 FW */ 114 #define FW_VER_LEN 32 115 #define CNTL_SERIAL_NUM_WORDS 8 /* Controller serial number words */ 116 #define CNTL_SERIAL_NUM_WORD_SZ (sizeof(u16)) /* Byte-sz of serial num word */ 117 118 #define RSS_INDIR_TABLE_LEN 128 119 #define RSS_HASH_KEY_LEN 40 120 121 #define BE_UNKNOWN_PHY_STATE 0xFF 122 123 struct be_dma_mem { 124 void *va; 125 dma_addr_t dma; 126 u32 size; 127 }; 128 129 struct be_queue_info { 130 u32 len; 131 u32 entry_size; /* Size of an element in the queue */ 132 u32 tail, head; 133 atomic_t used; /* Number of valid elements in the queue */ 134 u32 id; 135 struct be_dma_mem dma_mem; 136 bool created; 137 }; 138 139 static inline u32 MODULO(u32 val, u32 limit) 140 { 141 BUG_ON(limit & (limit - 1)); 142 return val & (limit - 1); 143 } 144 145 static inline void index_adv(u32 *index, u32 val, u32 limit) 146 { 147 *index = MODULO((*index + val), limit); 148 } 149 150 static inline void index_inc(u32 *index, u32 limit) 151 { 152 *index = MODULO((*index + 1), limit); 153 } 154 155 static inline void *queue_head_node(struct be_queue_info *q) 156 { 157 return q->dma_mem.va + q->head * q->entry_size; 158 } 159 160 static inline void *queue_tail_node(struct be_queue_info *q) 161 { 162 return q->dma_mem.va + q->tail * q->entry_size; 163 } 164 165 static inline void *queue_index_node(struct be_queue_info *q, u16 index) 166 { 167 return q->dma_mem.va + index * q->entry_size; 168 } 169 170 static inline void queue_head_inc(struct be_queue_info *q) 171 { 172 index_inc(&q->head, q->len); 173 } 174 175 static inline void index_dec(u32 *index, u32 limit) 176 { 177 *index = MODULO((*index - 1), limit); 178 } 179 180 static inline void queue_tail_inc(struct be_queue_info *q) 181 { 182 index_inc(&q->tail, q->len); 183 } 184 185 struct be_eq_obj { 186 struct be_queue_info q; 187 char desc[32]; 188 189 /* Adaptive interrupt coalescing (AIC) info */ 190 bool enable_aic; 191 u32 min_eqd; /* in usecs */ 192 u32 max_eqd; /* in usecs */ 193 u32 eqd; /* configured val when aic is off */ 194 u32 cur_eqd; /* in usecs */ 195 196 u8 idx; /* array index */ 197 u8 msix_idx; 198 u16 spurious_intr; 199 struct napi_struct napi; 200 struct be_adapter *adapter; 201 cpumask_var_t affinity_mask; 202 203 #ifdef CONFIG_NET_RX_BUSY_POLL 204 #define BE_EQ_IDLE 0 205 #define BE_EQ_NAPI 1 /* napi owns this EQ */ 206 #define BE_EQ_POLL 2 /* poll owns this EQ */ 207 #define BE_EQ_LOCKED (BE_EQ_NAPI | BE_EQ_POLL) 208 #define BE_EQ_NAPI_YIELD 4 /* napi yielded this EQ */ 209 #define BE_EQ_POLL_YIELD 8 /* poll yielded this EQ */ 210 #define BE_EQ_YIELD (BE_EQ_NAPI_YIELD | BE_EQ_POLL_YIELD) 211 #define BE_EQ_USER_PEND (BE_EQ_POLL | BE_EQ_POLL_YIELD) 212 unsigned int state; 213 spinlock_t lock; /* lock to serialize napi and busy-poll */ 214 #endif /* CONFIG_NET_RX_BUSY_POLL */ 215 } ____cacheline_aligned_in_smp; 216 217 struct be_aic_obj { /* Adaptive interrupt coalescing (AIC) info */ 218 bool enable; 219 u32 min_eqd; /* in usecs */ 220 u32 max_eqd; /* in usecs */ 221 u32 prev_eqd; /* in usecs */ 222 u32 et_eqd; /* configured val when aic is off */ 223 ulong jiffies; 224 u64 rx_pkts_prev; /* Used to calculate RX pps */ 225 u64 tx_reqs_prev; /* Used to calculate TX pps */ 226 }; 227 228 enum { 229 NAPI_POLLING, 230 BUSY_POLLING 231 }; 232 233 struct be_mcc_obj { 234 struct be_queue_info q; 235 struct be_queue_info cq; 236 bool rearm_cq; 237 }; 238 239 struct be_tx_stats { 240 u64 tx_bytes; 241 u64 tx_pkts; 242 u64 tx_vxlan_offload_pkts; 243 u64 tx_reqs; 244 u64 tx_compl; 245 ulong tx_jiffies; 246 u32 tx_stops; 247 u32 tx_drv_drops; /* pkts dropped by driver */ 248 /* the error counters are described in be_ethtool.c */ 249 u32 tx_hdr_parse_err; 250 u32 tx_dma_err; 251 u32 tx_tso_err; 252 u32 tx_spoof_check_err; 253 u32 tx_qinq_err; 254 u32 tx_internal_parity_err; 255 struct u64_stats_sync sync; 256 struct u64_stats_sync sync_compl; 257 }; 258 259 /* Structure to hold some data of interest obtained from a TX CQE */ 260 struct be_tx_compl_info { 261 u8 status; /* Completion status */ 262 u16 end_index; /* Completed TXQ Index */ 263 }; 264 265 struct be_tx_obj { 266 u32 db_offset; 267 struct be_queue_info q; 268 struct be_queue_info cq; 269 struct be_tx_compl_info txcp; 270 /* Remember the skbs that were transmitted */ 271 struct sk_buff *sent_skb_list[TX_Q_LEN]; 272 struct be_tx_stats stats; 273 u16 pend_wrb_cnt; /* Number of WRBs yet to be given to HW */ 274 u16 last_req_wrb_cnt; /* wrb cnt of the last req in the Q */ 275 u16 last_req_hdr; /* index of the last req's hdr-wrb */ 276 } ____cacheline_aligned_in_smp; 277 278 /* Struct to remember the pages posted for rx frags */ 279 struct be_rx_page_info { 280 struct page *page; 281 /* set to page-addr for last frag of the page & frag-addr otherwise */ 282 DEFINE_DMA_UNMAP_ADDR(bus); 283 u16 page_offset; 284 bool last_frag; /* last frag of the page */ 285 }; 286 287 struct be_rx_stats { 288 u64 rx_bytes; 289 u64 rx_pkts; 290 u64 rx_vxlan_offload_pkts; 291 u32 rx_drops_no_skbs; /* skb allocation errors */ 292 u32 rx_drops_no_frags; /* HW has no fetched frags */ 293 u32 rx_post_fail; /* page post alloc failures */ 294 u32 rx_compl; 295 u32 rx_mcast_pkts; 296 u32 rx_compl_err; /* completions with err set */ 297 struct u64_stats_sync sync; 298 }; 299 300 struct be_rx_compl_info { 301 u32 rss_hash; 302 u16 vlan_tag; 303 u16 pkt_size; 304 u16 port; 305 u8 vlanf; 306 u8 num_rcvd; 307 u8 err; 308 u8 ipf; 309 u8 tcpf; 310 u8 udpf; 311 u8 ip_csum; 312 u8 l4_csum; 313 u8 ipv6; 314 u8 qnq; 315 u8 pkt_type; 316 u8 ip_frag; 317 u8 tunneled; 318 }; 319 320 struct be_rx_obj { 321 struct be_adapter *adapter; 322 struct be_queue_info q; 323 struct be_queue_info cq; 324 struct be_rx_compl_info rxcp; 325 struct be_rx_page_info page_info_tbl[RX_Q_LEN]; 326 struct be_rx_stats stats; 327 u8 rss_id; 328 bool rx_post_starved; /* Zero rx frags have been posted to BE */ 329 } ____cacheline_aligned_in_smp; 330 331 struct be_drv_stats { 332 u32 eth_red_drops; 333 u32 dma_map_errors; 334 u32 rx_drops_no_pbuf; 335 u32 rx_drops_no_txpb; 336 u32 rx_drops_no_erx_descr; 337 u32 rx_drops_no_tpre_descr; 338 u32 rx_drops_too_many_frags; 339 u32 forwarded_packets; 340 u32 rx_drops_mtu; 341 u32 rx_crc_errors; 342 u32 rx_alignment_symbol_errors; 343 u32 rx_pause_frames; 344 u32 rx_priority_pause_frames; 345 u32 rx_control_frames; 346 u32 rx_in_range_errors; 347 u32 rx_out_range_errors; 348 u32 rx_frame_too_long; 349 u32 rx_address_filtered; 350 u32 rx_dropped_too_small; 351 u32 rx_dropped_too_short; 352 u32 rx_dropped_header_too_small; 353 u32 rx_dropped_tcp_length; 354 u32 rx_dropped_runt; 355 u32 rx_ip_checksum_errs; 356 u32 rx_tcp_checksum_errs; 357 u32 rx_udp_checksum_errs; 358 u32 tx_pauseframes; 359 u32 tx_priority_pauseframes; 360 u32 tx_controlframes; 361 u32 rxpp_fifo_overflow_drop; 362 u32 rx_input_fifo_overflow_drop; 363 u32 pmem_fifo_overflow_drop; 364 u32 jabber_events; 365 u32 rx_roce_bytes_lsd; 366 u32 rx_roce_bytes_msd; 367 u32 rx_roce_frames; 368 u32 roce_drops_payload_len; 369 u32 roce_drops_crc; 370 }; 371 372 /* A vlan-id of 0xFFFF must be used to clear transparent vlan-tagging */ 373 #define BE_RESET_VLAN_TAG_ID 0xFFFF 374 375 struct be_vf_cfg { 376 unsigned char mac_addr[ETH_ALEN]; 377 int if_handle; 378 int pmac_id; 379 u16 vlan_tag; 380 u32 tx_rate; 381 u32 plink_tracking; 382 u32 privileges; 383 bool spoofchk; 384 }; 385 386 enum vf_state { 387 ENABLED = 0, 388 ASSIGNED = 1 389 }; 390 391 #define BE_FLAGS_LINK_STATUS_INIT BIT(1) 392 #define BE_FLAGS_SRIOV_ENABLED BIT(2) 393 #define BE_FLAGS_WORKER_SCHEDULED BIT(3) 394 #define BE_FLAGS_NAPI_ENABLED BIT(6) 395 #define BE_FLAGS_QNQ_ASYNC_EVT_RCVD BIT(7) 396 #define BE_FLAGS_VXLAN_OFFLOADS BIT(8) 397 #define BE_FLAGS_SETUP_DONE BIT(9) 398 #define BE_FLAGS_PHY_MISCONFIGURED BIT(10) 399 #define BE_FLAGS_ERR_DETECTION_SCHEDULED BIT(11) 400 #define BE_FLAGS_OS2BMC BIT(12) 401 402 #define BE_UC_PMAC_COUNT 30 403 #define BE_VF_UC_PMAC_COUNT 2 404 405 #define MAX_ERR_RECOVERY_RETRY_COUNT 3 406 #define ERR_DETECTION_DELAY 1000 407 #define ERR_RECOVERY_RETRY_DELAY 30000 408 409 /* Ethtool set_dump flags */ 410 #define LANCER_INITIATE_FW_DUMP 0x1 411 #define LANCER_DELETE_FW_DUMP 0x2 412 413 struct phy_info { 414 /* From SFF-8472 spec */ 415 #define SFP_VENDOR_NAME_LEN 17 416 u8 transceiver; 417 u8 autoneg; 418 u8 fc_autoneg; 419 u8 port_type; 420 u16 phy_type; 421 u16 interface_type; 422 u32 misc_params; 423 u16 auto_speeds_supported; 424 u16 fixed_speeds_supported; 425 int link_speed; 426 u32 advertising; 427 u32 supported; 428 u8 cable_type; 429 u8 vendor_name[SFP_VENDOR_NAME_LEN]; 430 u8 vendor_pn[SFP_VENDOR_NAME_LEN]; 431 }; 432 433 struct be_resources { 434 u16 max_vfs; /* Total VFs "really" supported by FW/HW */ 435 u16 max_mcast_mac; 436 u16 max_tx_qs; 437 u16 max_rss_qs; 438 u16 max_rx_qs; 439 u16 max_cq_count; 440 u16 max_uc_mac; /* Max UC MACs programmable */ 441 u16 max_vlans; /* Number of vlans supported */ 442 u16 max_iface_count; 443 u16 max_mcc_count; 444 u16 max_evt_qs; 445 u32 if_cap_flags; 446 u32 vf_if_cap_flags; /* VF if capability flags */ 447 }; 448 449 #define be_is_os2bmc_enabled(adapter) (adapter->flags & BE_FLAGS_OS2BMC) 450 451 struct rss_info { 452 u64 rss_flags; 453 u8 rsstable[RSS_INDIR_TABLE_LEN]; 454 u8 rss_queue[RSS_INDIR_TABLE_LEN]; 455 u8 rss_hkey[RSS_HASH_KEY_LEN]; 456 }; 457 458 #define BE_INVALID_DIE_TEMP 0xFF 459 struct be_hwmon { 460 struct device *hwmon_dev; 461 u8 be_on_die_temp; /* Unit: millidegree Celsius */ 462 }; 463 464 /* Macros to read/write the 'features' word of be_wrb_params structure. 465 */ 466 #define BE_WRB_F_BIT(name) BE_WRB_F_##name##_BIT 467 #define BE_WRB_F_MASK(name) BIT_MASK(BE_WRB_F_##name##_BIT) 468 469 #define BE_WRB_F_GET(word, name) \ 470 (((word) & (BE_WRB_F_MASK(name))) >> BE_WRB_F_BIT(name)) 471 472 #define BE_WRB_F_SET(word, name, val) \ 473 ((word) |= (((val) << BE_WRB_F_BIT(name)) & BE_WRB_F_MASK(name))) 474 475 /* Feature/offload bits */ 476 enum { 477 BE_WRB_F_CRC_BIT, /* Ethernet CRC */ 478 BE_WRB_F_IPCS_BIT, /* IP csum */ 479 BE_WRB_F_TCPCS_BIT, /* TCP csum */ 480 BE_WRB_F_UDPCS_BIT, /* UDP csum */ 481 BE_WRB_F_LSO_BIT, /* LSO */ 482 BE_WRB_F_LSO6_BIT, /* LSO6 */ 483 BE_WRB_F_VLAN_BIT, /* VLAN */ 484 BE_WRB_F_VLAN_SKIP_HW_BIT, /* Skip VLAN tag (workaround) */ 485 BE_WRB_F_OS2BMC_BIT /* Send packet to the management ring */ 486 }; 487 488 /* The structure below provides a HW-agnostic abstraction of WRB params 489 * retrieved from a TX skb. This is in turn passed to chip specific routines 490 * during transmit, to set the corresponding params in the WRB. 491 */ 492 struct be_wrb_params { 493 u32 features; /* Feature bits */ 494 u16 vlan_tag; /* VLAN tag */ 495 u16 lso_mss; /* MSS for LSO */ 496 }; 497 498 struct be_adapter { 499 struct pci_dev *pdev; 500 struct net_device *netdev; 501 502 u8 __iomem *csr; /* CSR BAR used only for BE2/3 */ 503 u8 __iomem *db; /* Door Bell */ 504 u8 __iomem *pcicfg; /* On SH,BEx only. Shadow of PCI config space */ 505 506 struct mutex mbox_lock; /* For serializing mbox cmds to BE card */ 507 struct be_dma_mem mbox_mem; 508 /* Mbox mem is adjusted to align to 16 bytes. The allocated addr 509 * is stored for freeing purpose */ 510 struct be_dma_mem mbox_mem_alloced; 511 512 struct be_mcc_obj mcc_obj; 513 spinlock_t mcc_lock; /* For serializing mcc cmds to BE card */ 514 spinlock_t mcc_cq_lock; 515 516 u16 cfg_num_qs; /* configured via set-channels */ 517 u16 num_evt_qs; 518 u16 num_msix_vec; 519 struct be_eq_obj eq_obj[MAX_EVT_QS]; 520 struct msix_entry msix_entries[MAX_MSIX_VECTORS]; 521 bool isr_registered; 522 523 /* TX Rings */ 524 u16 num_tx_qs; 525 struct be_tx_obj tx_obj[MAX_TX_QS]; 526 527 /* Rx rings */ 528 u16 num_rx_qs; 529 u16 num_rss_qs; 530 u16 need_def_rxq; 531 struct be_rx_obj rx_obj[MAX_RX_QS]; 532 u32 big_page_size; /* Compounded page size shared by rx wrbs */ 533 534 struct be_drv_stats drv_stats; 535 struct be_aic_obj aic_obj[MAX_EVT_QS]; 536 u8 vlan_prio_bmap; /* Available Priority BitMap */ 537 u16 recommended_prio_bits;/* Recommended Priority bits in vlan tag */ 538 struct be_dma_mem rx_filter; /* Cmd DMA mem for rx-filter */ 539 540 struct be_dma_mem stats_cmd; 541 /* Work queue used to perform periodic tasks like getting statistics */ 542 struct delayed_work work; 543 u16 work_counter; 544 545 struct delayed_work be_err_detection_work; 546 u8 recovery_retries; 547 u8 err_flags; 548 bool pcicfg_mapped; /* pcicfg obtained via pci_iomap() */ 549 u32 flags; 550 u32 cmd_privileges; 551 /* Ethtool knobs and info */ 552 char fw_ver[FW_VER_LEN]; 553 char fw_on_flash[FW_VER_LEN]; 554 555 /* IFACE filtering fields */ 556 int if_handle; /* Used to configure filtering */ 557 u32 if_flags; /* Interface filtering flags */ 558 u32 *pmac_id; /* MAC addr handle used by BE card */ 559 u32 uc_macs; /* Count of secondary UC MAC programmed */ 560 unsigned long vids[BITS_TO_LONGS(VLAN_N_VID)]; 561 u16 vlans_added; 562 563 u32 beacon_state; /* for set_phys_id */ 564 565 u32 port_num; 566 char port_name; 567 u8 mc_type; 568 u32 function_mode; 569 u32 function_caps; 570 u32 rx_fc; /* Rx flow control */ 571 u32 tx_fc; /* Tx flow control */ 572 bool stats_cmd_sent; 573 struct { 574 u32 size; 575 u32 total_size; 576 u64 io_addr; 577 } roce_db; 578 u32 num_msix_roce_vec; 579 struct ocrdma_dev *ocrdma_dev; 580 struct list_head entry; 581 582 u32 flash_status; 583 struct completion et_cmd_compl; 584 585 struct be_resources pool_res; /* resources available for the port */ 586 struct be_resources res; /* resources available for the func */ 587 u16 num_vfs; /* Number of VFs provisioned by PF */ 588 u8 pf_num; /* Numbering used by FW, starts at 0 */ 589 u8 vf_num; /* Numbering used by FW, starts at 1 */ 590 u8 virtfn; 591 struct be_vf_cfg *vf_cfg; 592 bool be3_native; 593 u32 sli_family; 594 u8 hba_port_num; 595 u16 pvid; 596 __be16 vxlan_port; 597 int vxlan_port_count; 598 int vxlan_port_aliases; 599 struct phy_info phy; 600 u8 wol_cap; 601 bool wol_en; 602 u16 asic_rev; 603 u16 qnq_vid; 604 u32 msg_enable; 605 int be_get_temp_freq; 606 struct be_hwmon hwmon_info; 607 struct rss_info rss_info; 608 /* Filters for packets that need to be sent to BMC */ 609 u32 bmc_filt_mask; 610 u32 fat_dump_len; 611 u16 serial_num[CNTL_SERIAL_NUM_WORDS]; 612 u8 phy_state; /* state of sfp optics (functional, faulted, etc.,) */ 613 }; 614 615 #define be_physfn(adapter) (!adapter->virtfn) 616 #define be_virtfn(adapter) (adapter->virtfn) 617 #define sriov_enabled(adapter) (adapter->flags & \ 618 BE_FLAGS_SRIOV_ENABLED) 619 620 #define for_all_vfs(adapter, vf_cfg, i) \ 621 for (i = 0, vf_cfg = &adapter->vf_cfg[i]; i < adapter->num_vfs; \ 622 i++, vf_cfg++) 623 624 #define ON 1 625 #define OFF 0 626 627 #define be_max_vlans(adapter) (adapter->res.max_vlans) 628 #define be_max_uc(adapter) (adapter->res.max_uc_mac) 629 #define be_max_mc(adapter) (adapter->res.max_mcast_mac) 630 #define be_max_vfs(adapter) (adapter->pool_res.max_vfs) 631 #define be_max_rss(adapter) (adapter->res.max_rss_qs) 632 #define be_max_txqs(adapter) (adapter->res.max_tx_qs) 633 #define be_max_prio_txqs(adapter) (adapter->res.max_prio_tx_qs) 634 #define be_max_rxqs(adapter) (adapter->res.max_rx_qs) 635 #define be_max_eqs(adapter) (adapter->res.max_evt_qs) 636 #define be_if_cap_flags(adapter) (adapter->res.if_cap_flags) 637 638 static inline u16 be_max_qs(struct be_adapter *adapter) 639 { 640 /* If no RSS, need atleast the one def RXQ */ 641 u16 num = max_t(u16, be_max_rss(adapter), 1); 642 643 num = min(num, be_max_eqs(adapter)); 644 return min_t(u16, num, num_online_cpus()); 645 } 646 647 /* Is BE in pvid_tagging mode */ 648 #define be_pvid_tagging_enabled(adapter) (adapter->pvid) 649 650 /* Is BE in QNQ multi-channel mode */ 651 #define be_is_qnq_mode(adapter) (adapter->function_mode & QNQ_MODE) 652 653 #define lancer_chip(adapter) (adapter->pdev->device == OC_DEVICE_ID3 || \ 654 adapter->pdev->device == OC_DEVICE_ID4) 655 656 #define skyhawk_chip(adapter) (adapter->pdev->device == OC_DEVICE_ID5 || \ 657 adapter->pdev->device == OC_DEVICE_ID6) 658 659 #define BE3_chip(adapter) (adapter->pdev->device == BE_DEVICE_ID2 || \ 660 adapter->pdev->device == OC_DEVICE_ID2) 661 662 #define BE2_chip(adapter) (adapter->pdev->device == BE_DEVICE_ID1 || \ 663 adapter->pdev->device == OC_DEVICE_ID1) 664 665 #define BEx_chip(adapter) (BE3_chip(adapter) || BE2_chip(adapter)) 666 667 #define be_roce_supported(adapter) (skyhawk_chip(adapter) && \ 668 (adapter->function_mode & RDMA_ENABLED)) 669 670 extern const struct ethtool_ops be_ethtool_ops; 671 672 #define msix_enabled(adapter) (adapter->num_msix_vec > 0) 673 #define num_irqs(adapter) (msix_enabled(adapter) ? \ 674 adapter->num_msix_vec : 1) 675 #define tx_stats(txo) (&(txo)->stats) 676 #define rx_stats(rxo) (&(rxo)->stats) 677 678 /* The default RXQ is the last RXQ */ 679 #define default_rxo(adpt) (&adpt->rx_obj[adpt->num_rx_qs - 1]) 680 681 #define for_all_rx_queues(adapter, rxo, i) \ 682 for (i = 0, rxo = &adapter->rx_obj[i]; i < adapter->num_rx_qs; \ 683 i++, rxo++) 684 685 #define for_all_rss_queues(adapter, rxo, i) \ 686 for (i = 0, rxo = &adapter->rx_obj[i]; i < adapter->num_rss_qs; \ 687 i++, rxo++) 688 689 #define for_all_tx_queues(adapter, txo, i) \ 690 for (i = 0, txo = &adapter->tx_obj[i]; i < adapter->num_tx_qs; \ 691 i++, txo++) 692 693 #define for_all_evt_queues(adapter, eqo, i) \ 694 for (i = 0, eqo = &adapter->eq_obj[i]; i < adapter->num_evt_qs; \ 695 i++, eqo++) 696 697 #define for_all_rx_queues_on_eq(adapter, eqo, rxo, i) \ 698 for (i = eqo->idx, rxo = &adapter->rx_obj[i]; i < adapter->num_rx_qs;\ 699 i += adapter->num_evt_qs, rxo += adapter->num_evt_qs) 700 701 #define for_all_tx_queues_on_eq(adapter, eqo, txo, i) \ 702 for (i = eqo->idx, txo = &adapter->tx_obj[i]; i < adapter->num_tx_qs;\ 703 i += adapter->num_evt_qs, txo += adapter->num_evt_qs) 704 705 #define is_mcc_eqo(eqo) (eqo->idx == 0) 706 #define mcc_eqo(adapter) (&adapter->eq_obj[0]) 707 708 #define PAGE_SHIFT_4K 12 709 #define PAGE_SIZE_4K (1 << PAGE_SHIFT_4K) 710 711 /* Returns number of pages spanned by the data starting at the given addr */ 712 #define PAGES_4K_SPANNED(_address, size) \ 713 ((u32)((((size_t)(_address) & (PAGE_SIZE_4K - 1)) + \ 714 (size) + (PAGE_SIZE_4K - 1)) >> PAGE_SHIFT_4K)) 715 716 /* Returns bit offset within a DWORD of a bitfield */ 717 #define AMAP_BIT_OFFSET(_struct, field) \ 718 (((size_t)&(((_struct *)0)->field))%32) 719 720 /* Returns the bit mask of the field that is NOT shifted into location. */ 721 static inline u32 amap_mask(u32 bitsize) 722 { 723 return (bitsize == 32 ? 0xFFFFFFFF : (1 << bitsize) - 1); 724 } 725 726 static inline void 727 amap_set(void *ptr, u32 dw_offset, u32 mask, u32 offset, u32 value) 728 { 729 u32 *dw = (u32 *) ptr + dw_offset; 730 *dw &= ~(mask << offset); 731 *dw |= (mask & value) << offset; 732 } 733 734 #define AMAP_SET_BITS(_struct, field, ptr, val) \ 735 amap_set(ptr, \ 736 offsetof(_struct, field)/32, \ 737 amap_mask(sizeof(((_struct *)0)->field)), \ 738 AMAP_BIT_OFFSET(_struct, field), \ 739 val) 740 741 static inline u32 amap_get(void *ptr, u32 dw_offset, u32 mask, u32 offset) 742 { 743 u32 *dw = (u32 *) ptr; 744 return mask & (*(dw + dw_offset) >> offset); 745 } 746 747 #define AMAP_GET_BITS(_struct, field, ptr) \ 748 amap_get(ptr, \ 749 offsetof(_struct, field)/32, \ 750 amap_mask(sizeof(((_struct *)0)->field)), \ 751 AMAP_BIT_OFFSET(_struct, field)) 752 753 #define GET_RX_COMPL_V0_BITS(field, ptr) \ 754 AMAP_GET_BITS(struct amap_eth_rx_compl_v0, field, ptr) 755 756 #define GET_RX_COMPL_V1_BITS(field, ptr) \ 757 AMAP_GET_BITS(struct amap_eth_rx_compl_v1, field, ptr) 758 759 #define GET_TX_COMPL_BITS(field, ptr) \ 760 AMAP_GET_BITS(struct amap_eth_tx_compl, field, ptr) 761 762 #define SET_TX_WRB_HDR_BITS(field, ptr, val) \ 763 AMAP_SET_BITS(struct amap_eth_hdr_wrb, field, ptr, val) 764 765 #define be_dws_cpu_to_le(wrb, len) swap_dws(wrb, len) 766 #define be_dws_le_to_cpu(wrb, len) swap_dws(wrb, len) 767 static inline void swap_dws(void *wrb, int len) 768 { 769 #ifdef __BIG_ENDIAN 770 u32 *dw = wrb; 771 BUG_ON(len % 4); 772 do { 773 *dw = cpu_to_le32(*dw); 774 dw++; 775 len -= 4; 776 } while (len); 777 #endif /* __BIG_ENDIAN */ 778 } 779 780 #define be_cmd_status(status) (status > 0 ? -EIO : status) 781 782 static inline u8 is_tcp_pkt(struct sk_buff *skb) 783 { 784 u8 val = 0; 785 786 if (ip_hdr(skb)->version == 4) 787 val = (ip_hdr(skb)->protocol == IPPROTO_TCP); 788 else if (ip_hdr(skb)->version == 6) 789 val = (ipv6_hdr(skb)->nexthdr == NEXTHDR_TCP); 790 791 return val; 792 } 793 794 static inline u8 is_udp_pkt(struct sk_buff *skb) 795 { 796 u8 val = 0; 797 798 if (ip_hdr(skb)->version == 4) 799 val = (ip_hdr(skb)->protocol == IPPROTO_UDP); 800 else if (ip_hdr(skb)->version == 6) 801 val = (ipv6_hdr(skb)->nexthdr == NEXTHDR_UDP); 802 803 return val; 804 } 805 806 static inline bool is_ipv4_pkt(struct sk_buff *skb) 807 { 808 return skb->protocol == htons(ETH_P_IP) && ip_hdr(skb)->version == 4; 809 } 810 811 #define BE_ERROR_EEH 1 812 #define BE_ERROR_UE BIT(1) 813 #define BE_ERROR_FW BIT(2) 814 #define BE_ERROR_HW (BE_ERROR_EEH | BE_ERROR_UE) 815 #define BE_ERROR_ANY (BE_ERROR_EEH | BE_ERROR_UE | BE_ERROR_FW) 816 #define BE_CLEAR_ALL 0xFF 817 818 static inline u8 be_check_error(struct be_adapter *adapter, u32 err_type) 819 { 820 return (adapter->err_flags & err_type); 821 } 822 823 static inline void be_set_error(struct be_adapter *adapter, int err_type) 824 { 825 struct net_device *netdev = adapter->netdev; 826 827 adapter->err_flags |= err_type; 828 netif_carrier_off(netdev); 829 830 dev_info(&adapter->pdev->dev, "%s: Link down\n", netdev->name); 831 } 832 833 static inline void be_clear_error(struct be_adapter *adapter, int err_type) 834 { 835 adapter->err_flags &= ~err_type; 836 } 837 838 static inline bool be_multi_rxq(const struct be_adapter *adapter) 839 { 840 return adapter->num_rx_qs > 1; 841 } 842 843 void be_cq_notify(struct be_adapter *adapter, u16 qid, bool arm, 844 u16 num_popped); 845 void be_link_status_update(struct be_adapter *adapter, u8 link_status); 846 void be_parse_stats(struct be_adapter *adapter); 847 int be_load_fw(struct be_adapter *adapter, u8 *func); 848 bool be_is_wol_supported(struct be_adapter *adapter); 849 bool be_pause_supported(struct be_adapter *adapter); 850 u32 be_get_fw_log_level(struct be_adapter *adapter); 851 int be_update_queues(struct be_adapter *adapter); 852 int be_poll(struct napi_struct *napi, int budget); 853 void be_eqd_update(struct be_adapter *adapter, bool force_update); 854 855 /* 856 * internal function to initialize-cleanup roce device. 857 */ 858 void be_roce_dev_add(struct be_adapter *); 859 void be_roce_dev_remove(struct be_adapter *); 860 861 /* 862 * internal function to open-close roce device during ifup-ifdown. 863 */ 864 void be_roce_dev_shutdown(struct be_adapter *); 865 866 #endif /* BE_H */ 867