1 // SPDX-License-Identifier: GPL-2.0-or-later 2 /* D-Link DL2000-based Gigabit Ethernet Adapter Linux driver */ 3 /* 4 Copyright (c) 2001, 2002 by D-Link Corporation 5 Written by Edward Peng.<edward_peng@dlink.com.tw> 6 Created 03-May-2001, base on Linux' sundance.c. 7 8 */ 9 10 #include "dl2k.h" 11 #include <linux/dma-mapping.h> 12 13 #define dw32(reg, val) iowrite32(val, ioaddr + (reg)) 14 #define dw16(reg, val) iowrite16(val, ioaddr + (reg)) 15 #define dw8(reg, val) iowrite8(val, ioaddr + (reg)) 16 #define dr32(reg) ioread32(ioaddr + (reg)) 17 #define dr16(reg) ioread16(ioaddr + (reg)) 18 #define dr8(reg) ioread8(ioaddr + (reg)) 19 20 #define MAX_UNITS 8 21 static int mtu[MAX_UNITS]; 22 static int vlan[MAX_UNITS]; 23 static int jumbo[MAX_UNITS]; 24 static char *media[MAX_UNITS]; 25 static int tx_flow=-1; 26 static int rx_flow=-1; 27 static int copy_thresh; 28 static int rx_coalesce=10; /* Rx frame count each interrupt */ 29 static int rx_timeout=200; /* Rx DMA wait time in 640ns increments */ 30 static int tx_coalesce=16; /* HW xmit count each TxDMAComplete */ 31 32 33 MODULE_AUTHOR ("Edward Peng"); 34 MODULE_DESCRIPTION ("D-Link DL2000-based Gigabit Ethernet Adapter"); 35 MODULE_LICENSE("GPL"); 36 module_param_array(mtu, int, NULL, 0); 37 module_param_array(media, charp, NULL, 0); 38 module_param_array(vlan, int, NULL, 0); 39 module_param_array(jumbo, int, NULL, 0); 40 module_param(tx_flow, int, 0); 41 module_param(rx_flow, int, 0); 42 module_param(copy_thresh, int, 0); 43 module_param(rx_coalesce, int, 0); /* Rx frame count each interrupt */ 44 module_param(rx_timeout, int, 0); /* Rx DMA wait time in 640ns increments */ 45 module_param(tx_coalesce, int, 0); /* HW xmit count each TxDMAComplete */ 46 47 48 /* Enable the default interrupts */ 49 #define DEFAULT_INTR (RxDMAComplete | HostError | IntRequested | TxDMAComplete| \ 50 UpdateStats | LinkEvent) 51 52 static void dl2k_enable_int(struct netdev_private *np) 53 { 54 void __iomem *ioaddr = np->ioaddr; 55 56 dw16(IntEnable, DEFAULT_INTR); 57 } 58 59 static const int max_intrloop = 50; 60 static const int multicast_filter_limit = 0x40; 61 62 static int rio_open (struct net_device *dev); 63 static void rio_timer (struct timer_list *t); 64 static void rio_tx_timeout (struct net_device *dev, unsigned int txqueue); 65 static netdev_tx_t start_xmit (struct sk_buff *skb, struct net_device *dev); 66 static irqreturn_t rio_interrupt (int irq, void *dev_instance); 67 static void rio_free_tx (struct net_device *dev, int irq); 68 static void tx_error (struct net_device *dev, int tx_status); 69 static int receive_packet (struct net_device *dev); 70 static void rio_error (struct net_device *dev, int int_status); 71 static void set_multicast (struct net_device *dev); 72 static struct net_device_stats *get_stats (struct net_device *dev); 73 static int clear_stats (struct net_device *dev); 74 static int rio_ioctl (struct net_device *dev, struct ifreq *rq, int cmd); 75 static int rio_close (struct net_device *dev); 76 static int find_miiphy (struct net_device *dev); 77 static int parse_eeprom (struct net_device *dev); 78 static int read_eeprom (struct netdev_private *, int eep_addr); 79 static int mii_wait_link (struct net_device *dev, int wait); 80 static int mii_set_media (struct net_device *dev); 81 static int mii_get_media (struct net_device *dev); 82 static int mii_set_media_pcs (struct net_device *dev); 83 static int mii_get_media_pcs (struct net_device *dev); 84 static int mii_read (struct net_device *dev, int phy_addr, int reg_num); 85 static int mii_write (struct net_device *dev, int phy_addr, int reg_num, 86 u16 data); 87 88 static const struct ethtool_ops ethtool_ops; 89 90 static const struct net_device_ops netdev_ops = { 91 .ndo_open = rio_open, 92 .ndo_start_xmit = start_xmit, 93 .ndo_stop = rio_close, 94 .ndo_get_stats = get_stats, 95 .ndo_validate_addr = eth_validate_addr, 96 .ndo_set_mac_address = eth_mac_addr, 97 .ndo_set_rx_mode = set_multicast, 98 .ndo_eth_ioctl = rio_ioctl, 99 .ndo_tx_timeout = rio_tx_timeout, 100 }; 101 102 static bool is_support_rmon_mmio(struct pci_dev *pdev) 103 { 104 return pdev->vendor == PCI_VENDOR_ID_DLINK && 105 pdev->device == 0x4000 && 106 pdev->revision == 0x0c; 107 } 108 109 static int 110 rio_probe1 (struct pci_dev *pdev, const struct pci_device_id *ent) 111 { 112 struct net_device *dev; 113 struct netdev_private *np; 114 static int card_idx; 115 int chip_idx = ent->driver_data; 116 int err, irq; 117 void __iomem *ioaddr; 118 void *ring_space; 119 dma_addr_t ring_dma; 120 121 err = pci_enable_device (pdev); 122 if (err) 123 return err; 124 125 irq = pdev->irq; 126 err = pci_request_regions (pdev, "dl2k"); 127 if (err) 128 goto err_out_disable; 129 130 pci_set_master (pdev); 131 132 err = -ENOMEM; 133 134 dev = alloc_etherdev (sizeof (*np)); 135 if (!dev) 136 goto err_out_res; 137 SET_NETDEV_DEV(dev, &pdev->dev); 138 139 np = netdev_priv(dev); 140 141 if (is_support_rmon_mmio(pdev)) 142 np->rmon_enable = true; 143 144 /* IO registers range. */ 145 ioaddr = pci_iomap(pdev, 0, 0); 146 if (!ioaddr) 147 goto err_out_dev; 148 np->eeprom_addr = ioaddr; 149 150 if (np->rmon_enable) { 151 /* MM registers range. */ 152 ioaddr = pci_iomap(pdev, 1, 0); 153 if (!ioaddr) 154 goto err_out_iounmap; 155 } 156 157 np->ioaddr = ioaddr; 158 np->chip_id = chip_idx; 159 np->pdev = pdev; 160 161 spin_lock_init(&np->stats_lock); 162 spin_lock_init (&np->tx_lock); 163 spin_lock_init (&np->rx_lock); 164 165 /* Parse manual configuration */ 166 np->an_enable = 1; 167 np->tx_coalesce = 1; 168 if (card_idx < MAX_UNITS) { 169 if (media[card_idx] != NULL) { 170 np->an_enable = 0; 171 if (strcmp (media[card_idx], "auto") == 0 || 172 strcmp (media[card_idx], "autosense") == 0 || 173 strcmp (media[card_idx], "0") == 0 ) { 174 np->an_enable = 2; 175 } else if (strcmp (media[card_idx], "100mbps_fd") == 0 || 176 strcmp (media[card_idx], "4") == 0) { 177 np->speed = 100; 178 np->full_duplex = 1; 179 } else if (strcmp (media[card_idx], "100mbps_hd") == 0 || 180 strcmp (media[card_idx], "3") == 0) { 181 np->speed = 100; 182 np->full_duplex = 0; 183 } else if (strcmp (media[card_idx], "10mbps_fd") == 0 || 184 strcmp (media[card_idx], "2") == 0) { 185 np->speed = 10; 186 np->full_duplex = 1; 187 } else if (strcmp (media[card_idx], "10mbps_hd") == 0 || 188 strcmp (media[card_idx], "1") == 0) { 189 np->speed = 10; 190 np->full_duplex = 0; 191 } else if (strcmp (media[card_idx], "1000mbps_fd") == 0 || 192 strcmp (media[card_idx], "6") == 0) { 193 np->speed=1000; 194 np->full_duplex=1; 195 } else if (strcmp (media[card_idx], "1000mbps_hd") == 0 || 196 strcmp (media[card_idx], "5") == 0) { 197 np->speed = 1000; 198 np->full_duplex = 0; 199 } else { 200 np->an_enable = 1; 201 } 202 } 203 if (jumbo[card_idx] != 0) { 204 np->jumbo = 1; 205 dev->mtu = MAX_JUMBO; 206 } else { 207 np->jumbo = 0; 208 if (mtu[card_idx] > 0 && mtu[card_idx] < PACKET_SIZE) 209 dev->mtu = mtu[card_idx]; 210 } 211 np->vlan = (vlan[card_idx] > 0 && vlan[card_idx] < 4096) ? 212 vlan[card_idx] : 0; 213 if (rx_coalesce > 0 && rx_timeout > 0) { 214 np->rx_coalesce = rx_coalesce; 215 np->rx_timeout = rx_timeout; 216 np->coalesce = 1; 217 } 218 np->tx_flow = (tx_flow == 0) ? 0 : 1; 219 np->rx_flow = (rx_flow == 0) ? 0 : 1; 220 221 if (tx_coalesce < 1) 222 tx_coalesce = 1; 223 else if (tx_coalesce > TX_RING_SIZE-1) 224 tx_coalesce = TX_RING_SIZE - 1; 225 } 226 dev->netdev_ops = &netdev_ops; 227 dev->watchdog_timeo = TX_TIMEOUT; 228 dev->ethtool_ops = ðtool_ops; 229 #if 0 230 dev->features = NETIF_F_IP_CSUM; 231 #endif 232 /* MTU range: 68 - 1536 or 8000 */ 233 dev->min_mtu = ETH_MIN_MTU; 234 dev->max_mtu = np->jumbo ? MAX_JUMBO : PACKET_SIZE; 235 236 pci_set_drvdata (pdev, dev); 237 238 ring_space = dma_alloc_coherent(&pdev->dev, TX_TOTAL_SIZE, &ring_dma, 239 GFP_KERNEL); 240 if (!ring_space) 241 goto err_out_iounmap; 242 np->tx_ring = ring_space; 243 np->tx_ring_dma = ring_dma; 244 245 ring_space = dma_alloc_coherent(&pdev->dev, RX_TOTAL_SIZE, &ring_dma, 246 GFP_KERNEL); 247 if (!ring_space) 248 goto err_out_unmap_tx; 249 np->rx_ring = ring_space; 250 np->rx_ring_dma = ring_dma; 251 252 /* Parse eeprom data */ 253 parse_eeprom (dev); 254 255 /* Find PHY address */ 256 err = find_miiphy (dev); 257 if (err) 258 goto err_out_unmap_rx; 259 260 /* Fiber device? */ 261 np->phy_media = (dr16(ASICCtrl) & PhyMedia) ? 1 : 0; 262 np->link_status = 0; 263 /* Set media and reset PHY */ 264 if (np->phy_media) { 265 /* default Auto-Negotiation for fiber devices */ 266 if (np->an_enable == 2) { 267 np->an_enable = 1; 268 } 269 } else { 270 /* Auto-Negotiation is mandatory for 1000BASE-T, 271 IEEE 802.3ab Annex 28D page 14 */ 272 if (np->speed == 1000) 273 np->an_enable = 1; 274 } 275 276 err = register_netdev (dev); 277 if (err) 278 goto err_out_unmap_rx; 279 280 card_idx++; 281 282 netdev_info(dev, "%s, %pM, IRQ %d", np->name, dev->dev_addr, irq); 283 if (tx_coalesce > 1) 284 netdev_dbg(dev, "tx_coalesce:\t%d packets", tx_coalesce); 285 if (np->coalesce) { 286 netdev_dbg(dev, "rx_coalesce:\t%d packets", np->rx_coalesce); 287 netdev_dbg(dev, "rx_timeout: \t%d ns", np->rx_timeout * 640); 288 } 289 if (np->vlan) 290 netdev_dbg(dev, "vlan(id):\t%d", np->vlan); 291 return 0; 292 293 err_out_unmap_rx: 294 dma_free_coherent(&pdev->dev, RX_TOTAL_SIZE, np->rx_ring, 295 np->rx_ring_dma); 296 err_out_unmap_tx: 297 dma_free_coherent(&pdev->dev, TX_TOTAL_SIZE, np->tx_ring, 298 np->tx_ring_dma); 299 err_out_iounmap: 300 if (np->rmon_enable) 301 pci_iounmap(pdev, np->ioaddr); 302 pci_iounmap(pdev, np->eeprom_addr); 303 err_out_dev: 304 free_netdev (dev); 305 err_out_res: 306 pci_release_regions (pdev); 307 err_out_disable: 308 pci_disable_device (pdev); 309 return err; 310 } 311 312 static int 313 find_miiphy (struct net_device *dev) 314 { 315 struct netdev_private *np = netdev_priv(dev); 316 int i, phy_found = 0; 317 318 np->phy_addr = 1; 319 320 for (i = 31; i >= 0; i--) { 321 int mii_status = mii_read (dev, i, 1); 322 if (mii_status != 0xffff && mii_status != 0x0000) { 323 np->phy_addr = i; 324 phy_found++; 325 } 326 } 327 if (!phy_found) { 328 printk (KERN_ERR "%s: No MII PHY found!\n", dev->name); 329 return -ENODEV; 330 } 331 return 0; 332 } 333 334 static int 335 parse_eeprom (struct net_device *dev) 336 { 337 struct netdev_private *np = netdev_priv(dev); 338 void __iomem *ioaddr = np->ioaddr; 339 int i, j; 340 u8 sromdata[256]; 341 u8 *psib; 342 u32 crc; 343 PSROM_t psrom = (PSROM_t) sromdata; 344 345 int cid, next; 346 347 for (i = 0; i < 128; i++) 348 ((__le16 *) sromdata)[i] = cpu_to_le16(read_eeprom(np, i)); 349 350 if (np->pdev->vendor == PCI_VENDOR_ID_DLINK) { /* D-Link Only */ 351 /* Check CRC */ 352 crc = ~ether_crc_le (256 - 4, sromdata); 353 if (psrom->crc != cpu_to_le32(crc)) { 354 printk (KERN_ERR "%s: EEPROM data CRC error.\n", 355 dev->name); 356 return -1; 357 } 358 } 359 360 /* Set MAC address */ 361 eth_hw_addr_set(dev, psrom->mac_addr); 362 363 if (np->chip_id == CHIP_IP1000A) { 364 np->led_mode = le16_to_cpu(psrom->led_mode); 365 return 0; 366 } 367 368 if (np->pdev->vendor != PCI_VENDOR_ID_DLINK) { 369 return 0; 370 } 371 372 /* Parse Software Information Block */ 373 i = 0x30; 374 psib = (u8 *) sromdata; 375 do { 376 cid = psib[i++]; 377 next = psib[i++]; 378 if ((cid == 0 && next == 0) || (cid == 0xff && next == 0xff)) { 379 printk (KERN_ERR "Cell data error\n"); 380 return -1; 381 } 382 switch (cid) { 383 case 0: /* Format version */ 384 break; 385 case 1: /* End of cell */ 386 return 0; 387 case 2: /* Duplex Polarity */ 388 np->duplex_polarity = psib[i]; 389 dw8(PhyCtrl, dr8(PhyCtrl) | psib[i]); 390 break; 391 case 3: /* Wake Polarity */ 392 np->wake_polarity = psib[i]; 393 break; 394 case 9: /* Adapter description */ 395 j = (next - i > 255) ? 255 : next - i; 396 memcpy (np->name, &(psib[i]), j); 397 break; 398 case 4: 399 case 5: 400 case 6: 401 case 7: 402 case 8: /* Reversed */ 403 break; 404 default: /* Unknown cell */ 405 return -1; 406 } 407 i = next; 408 } while (1); 409 410 return 0; 411 } 412 413 static void rio_set_led_mode(struct net_device *dev) 414 { 415 struct netdev_private *np = netdev_priv(dev); 416 void __iomem *ioaddr = np->ioaddr; 417 u32 mode; 418 419 if (np->chip_id != CHIP_IP1000A) 420 return; 421 422 mode = dr32(ASICCtrl); 423 mode &= ~(IPG_AC_LED_MODE_BIT_1 | IPG_AC_LED_MODE | IPG_AC_LED_SPEED); 424 425 if (np->led_mode & 0x01) 426 mode |= IPG_AC_LED_MODE; 427 if (np->led_mode & 0x02) 428 mode |= IPG_AC_LED_MODE_BIT_1; 429 if (np->led_mode & 0x08) 430 mode |= IPG_AC_LED_SPEED; 431 432 dw32(ASICCtrl, mode); 433 } 434 435 static inline dma_addr_t desc_to_dma(struct netdev_desc *desc) 436 { 437 return le64_to_cpu(desc->fraginfo) & DMA_BIT_MASK(48); 438 } 439 440 static void free_list(struct net_device *dev) 441 { 442 struct netdev_private *np = netdev_priv(dev); 443 struct sk_buff *skb; 444 int i; 445 446 /* Free all the skbuffs in the queue. */ 447 for (i = 0; i < RX_RING_SIZE; i++) { 448 skb = np->rx_skbuff[i]; 449 if (skb) { 450 dma_unmap_single(&np->pdev->dev, 451 desc_to_dma(&np->rx_ring[i]), 452 skb->len, DMA_FROM_DEVICE); 453 dev_kfree_skb(skb); 454 np->rx_skbuff[i] = NULL; 455 } 456 np->rx_ring[i].status = 0; 457 np->rx_ring[i].fraginfo = 0; 458 } 459 for (i = 0; i < TX_RING_SIZE; i++) { 460 skb = np->tx_skbuff[i]; 461 if (skb) { 462 dma_unmap_single(&np->pdev->dev, 463 desc_to_dma(&np->tx_ring[i]), 464 skb->len, DMA_TO_DEVICE); 465 dev_kfree_skb(skb); 466 np->tx_skbuff[i] = NULL; 467 } 468 } 469 } 470 471 static void rio_reset_ring(struct netdev_private *np) 472 { 473 int i; 474 475 np->cur_rx = 0; 476 np->cur_tx = 0; 477 np->old_rx = 0; 478 np->old_tx = 0; 479 480 for (i = 0; i < TX_RING_SIZE; i++) 481 np->tx_ring[i].status = cpu_to_le64(TFDDone); 482 483 for (i = 0; i < RX_RING_SIZE; i++) 484 np->rx_ring[i].status = 0; 485 } 486 487 /* allocate and initialize Tx and Rx descriptors */ 488 static int alloc_list(struct net_device *dev) 489 { 490 struct netdev_private *np = netdev_priv(dev); 491 int i; 492 493 rio_reset_ring(np); 494 np->rx_buf_sz = (dev->mtu <= 1500 ? PACKET_SIZE : dev->mtu + 32); 495 496 /* Initialize Tx descriptors, TFDListPtr leaves in start_xmit(). */ 497 for (i = 0; i < TX_RING_SIZE; i++) { 498 np->tx_skbuff[i] = NULL; 499 np->tx_ring[i].next_desc = cpu_to_le64(np->tx_ring_dma + 500 ((i + 1) % TX_RING_SIZE) * 501 sizeof(struct netdev_desc)); 502 } 503 504 /* Initialize Rx descriptors & allocate buffers */ 505 for (i = 0; i < RX_RING_SIZE; i++) { 506 /* Allocated fixed size of skbuff */ 507 struct sk_buff *skb; 508 dma_addr_t addr; 509 510 skb = netdev_alloc_skb_ip_align(dev, np->rx_buf_sz); 511 np->rx_skbuff[i] = skb; 512 if (!skb) 513 goto err_free_list; 514 515 addr = dma_map_single(&np->pdev->dev, skb->data, 516 np->rx_buf_sz, DMA_FROM_DEVICE); 517 if (dma_mapping_error(&np->pdev->dev, addr)) 518 goto err_kfree_skb; 519 520 np->rx_ring[i].next_desc = cpu_to_le64(np->rx_ring_dma + 521 ((i + 1) % RX_RING_SIZE) * 522 sizeof(struct netdev_desc)); 523 /* Rubicon now supports 40 bits of addressing space. */ 524 np->rx_ring[i].fraginfo = cpu_to_le64(addr); 525 np->rx_ring[i].fraginfo |= cpu_to_le64((u64)np->rx_buf_sz << 48); 526 } 527 528 return 0; 529 530 err_kfree_skb: 531 dev_kfree_skb(np->rx_skbuff[i]); 532 np->rx_skbuff[i] = NULL; 533 err_free_list: 534 free_list(dev); 535 return -ENOMEM; 536 } 537 538 static void rio_hw_init(struct net_device *dev) 539 { 540 struct netdev_private *np = netdev_priv(dev); 541 void __iomem *ioaddr = np->ioaddr; 542 int i; 543 u16 macctrl; 544 545 /* Reset all logic functions */ 546 dw16(ASICCtrl + 2, 547 GlobalReset | DMAReset | FIFOReset | NetworkReset | HostReset); 548 mdelay(10); 549 550 rio_set_led_mode(dev); 551 552 /* DebugCtrl bit 4, 5, 9 must set */ 553 dw32(DebugCtrl, dr32(DebugCtrl) | 0x0230); 554 555 if (np->chip_id == CHIP_IP1000A && 556 (np->pdev->revision == 0x40 || np->pdev->revision == 0x41)) { 557 /* PHY magic taken from ipg driver, undocumented registers */ 558 mii_write(dev, np->phy_addr, 31, 0x0001); 559 mii_write(dev, np->phy_addr, 27, 0x01e0); 560 mii_write(dev, np->phy_addr, 31, 0x0002); 561 mii_write(dev, np->phy_addr, 27, 0xeb8e); 562 mii_write(dev, np->phy_addr, 31, 0x0000); 563 mii_write(dev, np->phy_addr, 30, 0x005e); 564 /* advertise 1000BASE-T half & full duplex, prefer MASTER */ 565 mii_write(dev, np->phy_addr, MII_CTRL1000, 0x0700); 566 } 567 568 if (np->phy_media) 569 mii_set_media_pcs(dev); 570 else 571 mii_set_media(dev); 572 573 /* Jumbo frame */ 574 if (np->jumbo != 0) 575 dw16(MaxFrameSize, MAX_JUMBO+14); 576 577 /* Set RFDListPtr */ 578 dw32(RFDListPtr0, np->rx_ring_dma); 579 dw32(RFDListPtr1, 0); 580 581 /* Set station address */ 582 /* 16 or 32-bit access is required by TC9020 datasheet but 8-bit works 583 * too. However, it doesn't work on IP1000A so we use 16-bit access. 584 */ 585 for (i = 0; i < 3; i++) 586 dw16(StationAddr0 + 2 * i, get_unaligned_le16(&dev->dev_addr[2 * i])); 587 588 set_multicast (dev); 589 if (np->coalesce) { 590 dw32(RxDMAIntCtrl, np->rx_coalesce | np->rx_timeout << 16); 591 } 592 /* Set RIO to poll every N*320nsec. */ 593 dw8(RxDMAPollPeriod, 0x20); 594 dw8(TxDMAPollPeriod, 0xff); 595 dw8(RxDMABurstThresh, 0x30); 596 dw8(RxDMAUrgentThresh, 0x30); 597 if (!np->rmon_enable) 598 dw32(RmonStatMask, 0x0007ffff); 599 /* clear statistics */ 600 clear_stats (dev); 601 602 /* VLAN supported */ 603 if (np->vlan) { 604 /* priority field in RxDMAIntCtrl */ 605 dw32(RxDMAIntCtrl, dr32(RxDMAIntCtrl) | 0x7 << 10); 606 /* VLANId */ 607 dw16(VLANId, np->vlan); 608 /* Length/Type should be 0x8100 */ 609 dw32(VLANTag, 0x8100 << 16 | np->vlan); 610 /* Enable AutoVLANuntagging, but disable AutoVLANtagging. 611 VLAN information tagged by TFC' VID, CFI fields. */ 612 dw32(MACCtrl, dr32(MACCtrl) | AutoVLANuntagging); 613 } 614 615 /* Start Tx/Rx */ 616 dw32(MACCtrl, dr32(MACCtrl) | StatsEnable | RxEnable | TxEnable); 617 618 macctrl = 0; 619 macctrl |= (np->vlan) ? AutoVLANuntagging : 0; 620 macctrl |= (np->full_duplex) ? DuplexSelect : 0; 621 macctrl |= (np->tx_flow) ? TxFlowControlEnable : 0; 622 macctrl |= (np->rx_flow) ? RxFlowControlEnable : 0; 623 dw16(MACCtrl, macctrl); 624 } 625 626 static void rio_hw_stop(struct net_device *dev) 627 { 628 struct netdev_private *np = netdev_priv(dev); 629 void __iomem *ioaddr = np->ioaddr; 630 631 /* Disable interrupts */ 632 dw16(IntEnable, 0); 633 634 /* Stop Tx and Rx logics */ 635 dw32(MACCtrl, TxDisable | RxDisable | StatsDisable); 636 } 637 638 static int rio_open(struct net_device *dev) 639 { 640 struct netdev_private *np = netdev_priv(dev); 641 const int irq = np->pdev->irq; 642 int i; 643 644 i = alloc_list(dev); 645 if (i) 646 return i; 647 648 rio_hw_init(dev); 649 650 i = request_irq(irq, rio_interrupt, IRQF_SHARED, dev->name, dev); 651 if (i) { 652 rio_hw_stop(dev); 653 free_list(dev); 654 return i; 655 } 656 657 timer_setup(&np->timer, rio_timer, 0); 658 np->timer.expires = jiffies + 1 * HZ; 659 add_timer(&np->timer); 660 661 netif_start_queue (dev); 662 663 dl2k_enable_int(np); 664 return 0; 665 } 666 667 static void 668 rio_timer (struct timer_list *t) 669 { 670 struct netdev_private *np = timer_container_of(np, t, timer); 671 struct net_device *dev = pci_get_drvdata(np->pdev); 672 unsigned int entry; 673 int next_tick = 1*HZ; 674 unsigned long flags; 675 676 spin_lock_irqsave(&np->rx_lock, flags); 677 /* Recover rx ring exhausted error */ 678 if (np->cur_rx - np->old_rx >= RX_RING_SIZE) { 679 printk(KERN_INFO "Try to recover rx ring exhausted...\n"); 680 /* Re-allocate skbuffs to fill the descriptor ring */ 681 for (; np->cur_rx - np->old_rx > 0; np->old_rx++) { 682 struct sk_buff *skb; 683 entry = np->old_rx % RX_RING_SIZE; 684 /* Dropped packets don't need to re-allocate */ 685 if (np->rx_skbuff[entry] == NULL) { 686 skb = netdev_alloc_skb_ip_align(dev, 687 np->rx_buf_sz); 688 if (skb == NULL) { 689 np->rx_ring[entry].fraginfo = 0; 690 printk (KERN_INFO 691 "%s: Still unable to re-allocate Rx skbuff.#%d\n", 692 dev->name, entry); 693 break; 694 } 695 np->rx_skbuff[entry] = skb; 696 np->rx_ring[entry].fraginfo = 697 cpu_to_le64 (dma_map_single(&np->pdev->dev, skb->data, 698 np->rx_buf_sz, DMA_FROM_DEVICE)); 699 } 700 np->rx_ring[entry].fraginfo |= 701 cpu_to_le64((u64)np->rx_buf_sz << 48); 702 np->rx_ring[entry].status = 0; 703 } /* end for */ 704 } /* end if */ 705 spin_unlock_irqrestore (&np->rx_lock, flags); 706 np->timer.expires = jiffies + next_tick; 707 add_timer(&np->timer); 708 } 709 710 static void 711 rio_tx_timeout (struct net_device *dev, unsigned int txqueue) 712 { 713 struct netdev_private *np = netdev_priv(dev); 714 void __iomem *ioaddr = np->ioaddr; 715 716 printk (KERN_INFO "%s: Tx timed out (%4.4x), is buffer full?\n", 717 dev->name, dr32(TxStatus)); 718 rio_free_tx(dev, 0); 719 dev->if_port = 0; 720 netif_trans_update(dev); /* prevent tx timeout */ 721 } 722 723 static netdev_tx_t 724 start_xmit (struct sk_buff *skb, struct net_device *dev) 725 { 726 struct netdev_private *np = netdev_priv(dev); 727 void __iomem *ioaddr = np->ioaddr; 728 struct netdev_desc *txdesc; 729 unsigned entry; 730 u64 tfc_vlan_tag = 0; 731 732 if (np->link_status == 0) { /* Link Down */ 733 dev_kfree_skb_any(skb); 734 return NETDEV_TX_OK; 735 } 736 entry = np->cur_tx % TX_RING_SIZE; 737 np->tx_skbuff[entry] = skb; 738 txdesc = &np->tx_ring[entry]; 739 740 #if 0 741 if (skb->ip_summed == CHECKSUM_PARTIAL) { 742 txdesc->status |= 743 cpu_to_le64 (TCPChecksumEnable | UDPChecksumEnable | 744 IPChecksumEnable); 745 } 746 #endif 747 if (np->vlan) { 748 tfc_vlan_tag = VLANTagInsert | 749 ((u64)np->vlan << 32) | 750 ((u64)skb->priority << 45); 751 } 752 txdesc->fraginfo = cpu_to_le64 (dma_map_single(&np->pdev->dev, skb->data, 753 skb->len, DMA_TO_DEVICE)); 754 txdesc->fraginfo |= cpu_to_le64((u64)skb->len << 48); 755 756 /* DL2K bug: DMA fails to get next descriptor ptr in 10Mbps mode 757 * Work around: Always use 1 descriptor in 10Mbps mode */ 758 if (entry % np->tx_coalesce == 0 || np->speed == 10) 759 txdesc->status = cpu_to_le64 (entry | tfc_vlan_tag | 760 WordAlignDisable | 761 TxDMAIndicate | 762 (1 << FragCountShift)); 763 else 764 txdesc->status = cpu_to_le64 (entry | tfc_vlan_tag | 765 WordAlignDisable | 766 (1 << FragCountShift)); 767 768 /* TxDMAPollNow */ 769 dw32(DMACtrl, dr32(DMACtrl) | 0x00001000); 770 /* Schedule ISR */ 771 dw32(CountDown, 10000); 772 np->cur_tx = (np->cur_tx + 1) % TX_RING_SIZE; 773 if ((np->cur_tx - np->old_tx + TX_RING_SIZE) % TX_RING_SIZE 774 < TX_QUEUE_LEN - 1 && np->speed != 10) { 775 /* do nothing */ 776 } else if (!netif_queue_stopped(dev)) { 777 netif_stop_queue (dev); 778 } 779 780 /* The first TFDListPtr */ 781 if (!dr32(TFDListPtr0)) { 782 dw32(TFDListPtr0, np->tx_ring_dma + 783 entry * sizeof (struct netdev_desc)); 784 dw32(TFDListPtr1, 0); 785 } 786 787 return NETDEV_TX_OK; 788 } 789 790 static irqreturn_t 791 rio_interrupt (int irq, void *dev_instance) 792 { 793 struct net_device *dev = dev_instance; 794 struct netdev_private *np = netdev_priv(dev); 795 void __iomem *ioaddr = np->ioaddr; 796 unsigned int_status; 797 int cnt = max_intrloop; 798 int handled = 0; 799 800 while (1) { 801 int_status = dr16(IntStatus); 802 dw16(IntStatus, int_status); 803 int_status &= DEFAULT_INTR; 804 if (int_status == 0 || --cnt < 0) 805 break; 806 handled = 1; 807 /* Processing received packets */ 808 if (int_status & RxDMAComplete) 809 receive_packet (dev); 810 /* TxDMAComplete interrupt */ 811 if ((int_status & (TxDMAComplete|IntRequested))) { 812 int tx_status; 813 tx_status = dr32(TxStatus); 814 if (tx_status & 0x01) 815 tx_error (dev, tx_status); 816 /* Free used tx skbuffs */ 817 rio_free_tx (dev, 1); 818 } 819 820 /* Handle uncommon events */ 821 if (int_status & 822 (HostError | LinkEvent | UpdateStats)) 823 rio_error (dev, int_status); 824 } 825 if (np->cur_tx != np->old_tx) 826 dw32(CountDown, 100); 827 return IRQ_RETVAL(handled); 828 } 829 830 static void 831 rio_free_tx (struct net_device *dev, int irq) 832 { 833 struct netdev_private *np = netdev_priv(dev); 834 int entry = np->old_tx % TX_RING_SIZE; 835 unsigned long flag = 0; 836 837 if (irq) 838 spin_lock(&np->tx_lock); 839 else 840 spin_lock_irqsave(&np->tx_lock, flag); 841 842 /* Free used tx skbuffs */ 843 while (entry != np->cur_tx) { 844 struct sk_buff *skb; 845 846 if (!(np->tx_ring[entry].status & cpu_to_le64(TFDDone))) 847 break; 848 skb = np->tx_skbuff[entry]; 849 dma_unmap_single(&np->pdev->dev, 850 desc_to_dma(&np->tx_ring[entry]), skb->len, 851 DMA_TO_DEVICE); 852 if (irq) 853 dev_consume_skb_irq(skb); 854 else 855 dev_kfree_skb(skb); 856 857 np->tx_skbuff[entry] = NULL; 858 entry = (entry + 1) % TX_RING_SIZE; 859 } 860 if (irq) 861 spin_unlock(&np->tx_lock); 862 else 863 spin_unlock_irqrestore(&np->tx_lock, flag); 864 np->old_tx = entry; 865 866 /* If the ring is no longer full, clear tx_full and 867 call netif_wake_queue() */ 868 869 if (netif_queue_stopped(dev) && 870 ((np->cur_tx - np->old_tx + TX_RING_SIZE) % TX_RING_SIZE 871 < TX_QUEUE_LEN - 1 || np->speed == 10)) { 872 netif_wake_queue (dev); 873 } 874 } 875 876 static void 877 tx_error (struct net_device *dev, int tx_status) 878 { 879 struct netdev_private *np = netdev_priv(dev); 880 void __iomem *ioaddr = np->ioaddr; 881 int frame_id; 882 int i; 883 884 frame_id = (tx_status & 0xffff0000); 885 printk (KERN_ERR "%s: Transmit error, TxStatus %4.4x, FrameId %d.\n", 886 dev->name, tx_status, frame_id); 887 /* Transmit Underrun */ 888 if (tx_status & 0x10) { 889 dev->stats.tx_fifo_errors++; 890 dw16(TxStartThresh, dr16(TxStartThresh) + 0x10); 891 /* Transmit Underrun need to set TxReset, DMARest, FIFOReset */ 892 dw16(ASICCtrl + 2, 893 TxReset | DMAReset | FIFOReset | NetworkReset); 894 /* Wait for ResetBusy bit clear */ 895 for (i = 50; i > 0; i--) { 896 if (!(dr16(ASICCtrl + 2) & ResetBusy)) 897 break; 898 mdelay (1); 899 } 900 rio_set_led_mode(dev); 901 rio_free_tx (dev, 1); 902 /* Reset TFDListPtr */ 903 dw32(TFDListPtr0, np->tx_ring_dma + 904 np->old_tx * sizeof (struct netdev_desc)); 905 dw32(TFDListPtr1, 0); 906 907 /* Let TxStartThresh stay default value */ 908 } 909 /* Late Collision */ 910 if (tx_status & 0x04) { 911 dev->stats.tx_fifo_errors++; 912 /* TxReset and clear FIFO */ 913 dw16(ASICCtrl + 2, TxReset | FIFOReset); 914 /* Wait reset done */ 915 for (i = 50; i > 0; i--) { 916 if (!(dr16(ASICCtrl + 2) & ResetBusy)) 917 break; 918 mdelay (1); 919 } 920 rio_set_led_mode(dev); 921 /* Let TxStartThresh stay default value */ 922 } 923 924 spin_lock(&np->stats_lock); 925 /* Maximum Collisions */ 926 if (tx_status & 0x08) 927 dev->stats.collisions++; 928 929 dev->stats.tx_errors++; 930 spin_unlock(&np->stats_lock); 931 932 /* Restart the Tx */ 933 dw32(MACCtrl, dr16(MACCtrl) | TxEnable); 934 } 935 936 static int 937 receive_packet (struct net_device *dev) 938 { 939 struct netdev_private *np = netdev_priv(dev); 940 int entry = np->cur_rx % RX_RING_SIZE; 941 int cnt = 30; 942 943 /* If RFDDone, FrameStart and FrameEnd set, there is a new packet in. */ 944 while (1) { 945 struct netdev_desc *desc = &np->rx_ring[entry]; 946 int pkt_len; 947 u64 frame_status; 948 949 if (!(desc->status & cpu_to_le64(RFDDone)) || 950 !(desc->status & cpu_to_le64(FrameStart)) || 951 !(desc->status & cpu_to_le64(FrameEnd))) 952 break; 953 954 /* Chip omits the CRC. */ 955 frame_status = le64_to_cpu(desc->status); 956 pkt_len = frame_status & 0xffff; 957 if (--cnt < 0) 958 break; 959 /* Update rx error statistics, drop packet. */ 960 if (frame_status & RFS_Errors) { 961 dev->stats.rx_errors++; 962 if (frame_status & (RxRuntFrame | RxLengthError)) 963 dev->stats.rx_length_errors++; 964 if (frame_status & RxFCSError) 965 dev->stats.rx_crc_errors++; 966 if (frame_status & RxAlignmentError && np->speed != 1000) 967 dev->stats.rx_frame_errors++; 968 if (frame_status & RxFIFOOverrun) 969 dev->stats.rx_fifo_errors++; 970 } else { 971 struct sk_buff *skb; 972 973 skb = NULL; 974 /* Small skbuffs for short packets */ 975 if (pkt_len <= copy_thresh) 976 skb = netdev_alloc_skb_ip_align(dev, pkt_len); 977 if (!skb) { 978 dma_unmap_single(&np->pdev->dev, 979 desc_to_dma(desc), 980 np->rx_buf_sz, 981 DMA_FROM_DEVICE); 982 skb_put (skb = np->rx_skbuff[entry], pkt_len); 983 np->rx_skbuff[entry] = NULL; 984 } else { 985 dma_sync_single_for_cpu(&np->pdev->dev, 986 desc_to_dma(desc), 987 np->rx_buf_sz, 988 DMA_FROM_DEVICE); 989 skb_copy_to_linear_data (skb, 990 np->rx_skbuff[entry]->data, 991 pkt_len); 992 skb_put (skb, pkt_len); 993 dma_sync_single_for_device(&np->pdev->dev, 994 desc_to_dma(desc), 995 np->rx_buf_sz, 996 DMA_FROM_DEVICE); 997 } 998 skb->protocol = eth_type_trans (skb, dev); 999 #if 0 1000 /* Checksum done by hw, but csum value unavailable. */ 1001 if (np->pdev->pci_rev_id >= 0x0c && 1002 !(frame_status & (TCPError | UDPError | IPError))) { 1003 skb->ip_summed = CHECKSUM_UNNECESSARY; 1004 } 1005 #endif 1006 netif_rx (skb); 1007 } 1008 entry = (entry + 1) % RX_RING_SIZE; 1009 } 1010 spin_lock(&np->rx_lock); 1011 np->cur_rx = entry; 1012 /* Re-allocate skbuffs to fill the descriptor ring */ 1013 entry = np->old_rx; 1014 while (entry != np->cur_rx) { 1015 struct sk_buff *skb; 1016 /* Dropped packets don't need to re-allocate */ 1017 if (np->rx_skbuff[entry] == NULL) { 1018 skb = netdev_alloc_skb_ip_align(dev, np->rx_buf_sz); 1019 if (skb == NULL) { 1020 np->rx_ring[entry].fraginfo = 0; 1021 printk (KERN_INFO 1022 "%s: receive_packet: " 1023 "Unable to re-allocate Rx skbuff.#%d\n", 1024 dev->name, entry); 1025 break; 1026 } 1027 np->rx_skbuff[entry] = skb; 1028 np->rx_ring[entry].fraginfo = 1029 cpu_to_le64(dma_map_single(&np->pdev->dev, skb->data, 1030 np->rx_buf_sz, DMA_FROM_DEVICE)); 1031 } 1032 np->rx_ring[entry].fraginfo |= 1033 cpu_to_le64((u64)np->rx_buf_sz << 48); 1034 np->rx_ring[entry].status = 0; 1035 entry = (entry + 1) % RX_RING_SIZE; 1036 } 1037 np->old_rx = entry; 1038 spin_unlock(&np->rx_lock); 1039 return 0; 1040 } 1041 1042 static void 1043 rio_error (struct net_device *dev, int int_status) 1044 { 1045 struct netdev_private *np = netdev_priv(dev); 1046 void __iomem *ioaddr = np->ioaddr; 1047 u16 macctrl; 1048 1049 /* Link change event */ 1050 if (int_status & LinkEvent) { 1051 if (mii_wait_link (dev, 10) == 0) { 1052 printk (KERN_INFO "%s: Link up\n", dev->name); 1053 if (np->phy_media) 1054 mii_get_media_pcs (dev); 1055 else 1056 mii_get_media (dev); 1057 if (np->speed == 1000) 1058 np->tx_coalesce = tx_coalesce; 1059 else 1060 np->tx_coalesce = 1; 1061 macctrl = 0; 1062 macctrl |= (np->vlan) ? AutoVLANuntagging : 0; 1063 macctrl |= (np->full_duplex) ? DuplexSelect : 0; 1064 macctrl |= (np->tx_flow) ? 1065 TxFlowControlEnable : 0; 1066 macctrl |= (np->rx_flow) ? 1067 RxFlowControlEnable : 0; 1068 dw16(MACCtrl, macctrl); 1069 np->link_status = 1; 1070 netif_carrier_on(dev); 1071 } else { 1072 printk (KERN_INFO "%s: Link off\n", dev->name); 1073 np->link_status = 0; 1074 netif_carrier_off(dev); 1075 } 1076 } 1077 1078 /* UpdateStats statistics registers */ 1079 if (int_status & UpdateStats) { 1080 get_stats (dev); 1081 } 1082 1083 /* PCI Error, a catastrophic error related to the bus interface 1084 occurs, set GlobalReset and HostReset to reset. */ 1085 if (int_status & HostError) { 1086 printk (KERN_ERR "%s: HostError! IntStatus %4.4x.\n", 1087 dev->name, int_status); 1088 dw16(ASICCtrl + 2, GlobalReset | HostReset); 1089 mdelay (500); 1090 rio_set_led_mode(dev); 1091 } 1092 } 1093 1094 static struct net_device_stats * 1095 get_stats (struct net_device *dev) 1096 { 1097 struct netdev_private *np = netdev_priv(dev); 1098 void __iomem *ioaddr = np->ioaddr; 1099 unsigned int stat_reg; 1100 unsigned long flags; 1101 1102 spin_lock_irqsave(&np->stats_lock, flags); 1103 /* All statistics registers need to be acknowledged, 1104 else statistic overflow could cause problems */ 1105 1106 dev->stats.rx_packets += dr32(FramesRcvOk); 1107 dev->stats.tx_packets += dr32(FramesXmtOk); 1108 dev->stats.rx_bytes += dr32(OctetRcvOk); 1109 dev->stats.tx_bytes += dr32(OctetXmtOk); 1110 1111 dev->stats.multicast += dr32(McstFramesRcvdOk); 1112 dev->stats.collisions += dr32(SingleColFrames) 1113 + dr32(MultiColFrames); 1114 1115 /* detailed tx errors */ 1116 stat_reg = dr16(FramesAbortXSColls); 1117 dev->stats.tx_aborted_errors += stat_reg; 1118 dev->stats.tx_errors += stat_reg; 1119 1120 stat_reg = dr16(CarrierSenseErrors); 1121 dev->stats.tx_carrier_errors += stat_reg; 1122 dev->stats.tx_errors += stat_reg; 1123 1124 /* Clear all other statistic register. */ 1125 dr32(McstOctetXmtOk); 1126 dr16(BcstFramesXmtdOk); 1127 dr32(McstFramesXmtdOk); 1128 dr16(BcstFramesRcvdOk); 1129 dr16(MacControlFramesRcvd); 1130 dr16(FrameTooLongErrors); 1131 dr16(InRangeLengthErrors); 1132 dr16(FramesCheckSeqErrors); 1133 dr16(FramesLostRxErrors); 1134 dr32(McstOctetXmtOk); 1135 dr32(BcstOctetXmtOk); 1136 dr32(McstFramesXmtdOk); 1137 dr32(FramesWDeferredXmt); 1138 dr32(LateCollisions); 1139 dr16(BcstFramesXmtdOk); 1140 dr16(MacControlFramesXmtd); 1141 dr16(FramesWEXDeferal); 1142 1143 if (np->rmon_enable) 1144 for (int i = 0x100; i <= 0x150; i += 4) 1145 dr32(i); 1146 1147 dr16(TxJumboFrames); 1148 dr16(RxJumboFrames); 1149 dr16(TCPCheckSumErrors); 1150 dr16(UDPCheckSumErrors); 1151 dr16(IPCheckSumErrors); 1152 1153 spin_unlock_irqrestore(&np->stats_lock, flags); 1154 1155 return &dev->stats; 1156 } 1157 1158 static int 1159 clear_stats (struct net_device *dev) 1160 { 1161 struct netdev_private *np = netdev_priv(dev); 1162 void __iomem *ioaddr = np->ioaddr; 1163 1164 /* All statistics registers need to be acknowledged, 1165 else statistic overflow could cause problems */ 1166 dr32(FramesRcvOk); 1167 dr32(FramesXmtOk); 1168 dr32(OctetRcvOk); 1169 dr32(OctetXmtOk); 1170 1171 dr32(McstFramesRcvdOk); 1172 dr32(SingleColFrames); 1173 dr32(MultiColFrames); 1174 dr32(LateCollisions); 1175 /* detailed rx errors */ 1176 dr16(FrameTooLongErrors); 1177 dr16(InRangeLengthErrors); 1178 dr16(FramesCheckSeqErrors); 1179 dr16(FramesLostRxErrors); 1180 1181 /* detailed tx errors */ 1182 dr16(FramesAbortXSColls); 1183 dr16(CarrierSenseErrors); 1184 1185 /* Clear all other statistic register. */ 1186 dr32(McstOctetXmtOk); 1187 dr16(BcstFramesXmtdOk); 1188 dr32(McstFramesXmtdOk); 1189 dr16(BcstFramesRcvdOk); 1190 dr16(MacControlFramesRcvd); 1191 dr32(McstOctetXmtOk); 1192 dr32(BcstOctetXmtOk); 1193 dr32(McstFramesXmtdOk); 1194 dr32(FramesWDeferredXmt); 1195 dr16(BcstFramesXmtdOk); 1196 dr16(MacControlFramesXmtd); 1197 dr16(FramesWEXDeferal); 1198 if (np->rmon_enable) 1199 for (int i = 0x100; i <= 0x150; i += 4) 1200 dr32(i); 1201 dr16(TxJumboFrames); 1202 dr16(RxJumboFrames); 1203 dr16(TCPCheckSumErrors); 1204 dr16(UDPCheckSumErrors); 1205 dr16(IPCheckSumErrors); 1206 return 0; 1207 } 1208 1209 static void 1210 set_multicast (struct net_device *dev) 1211 { 1212 struct netdev_private *np = netdev_priv(dev); 1213 void __iomem *ioaddr = np->ioaddr; 1214 u32 hash_table[2]; 1215 u16 rx_mode = 0; 1216 1217 hash_table[0] = hash_table[1] = 0; 1218 /* RxFlowcontrol DA: 01-80-C2-00-00-01. Hash index=0x39 */ 1219 hash_table[1] |= 0x02000000; 1220 if (dev->flags & IFF_PROMISC) { 1221 /* Receive all frames promiscuously. */ 1222 rx_mode = ReceiveAllFrames; 1223 } else if ((dev->flags & IFF_ALLMULTI) || 1224 (netdev_mc_count(dev) > multicast_filter_limit)) { 1225 /* Receive broadcast and multicast frames */ 1226 rx_mode = ReceiveBroadcast | ReceiveMulticast | ReceiveUnicast; 1227 } else if (!netdev_mc_empty(dev)) { 1228 struct netdev_hw_addr *ha; 1229 /* Receive broadcast frames and multicast frames filtering 1230 by Hashtable */ 1231 rx_mode = 1232 ReceiveBroadcast | ReceiveMulticastHash | ReceiveUnicast; 1233 netdev_for_each_mc_addr(ha, dev) { 1234 int bit, index = 0; 1235 int crc = ether_crc_le(ETH_ALEN, ha->addr); 1236 /* The inverted high significant 6 bits of CRC are 1237 used as an index to hashtable */ 1238 for (bit = 0; bit < 6; bit++) 1239 if (crc & (1 << (31 - bit))) 1240 index |= (1 << bit); 1241 hash_table[index / 32] |= (1 << (index % 32)); 1242 } 1243 } else { 1244 rx_mode = ReceiveBroadcast | ReceiveUnicast; 1245 } 1246 if (np->vlan) { 1247 /* ReceiveVLANMatch field in ReceiveMode */ 1248 rx_mode |= ReceiveVLANMatch; 1249 } 1250 1251 dw32(HashTable0, hash_table[0]); 1252 dw32(HashTable1, hash_table[1]); 1253 dw16(ReceiveMode, rx_mode); 1254 } 1255 1256 static void rio_get_drvinfo(struct net_device *dev, struct ethtool_drvinfo *info) 1257 { 1258 struct netdev_private *np = netdev_priv(dev); 1259 1260 strscpy(info->driver, "dl2k", sizeof(info->driver)); 1261 strscpy(info->bus_info, pci_name(np->pdev), sizeof(info->bus_info)); 1262 } 1263 1264 static int rio_get_link_ksettings(struct net_device *dev, 1265 struct ethtool_link_ksettings *cmd) 1266 { 1267 struct netdev_private *np = netdev_priv(dev); 1268 u32 supported, advertising; 1269 1270 if (np->phy_media) { 1271 /* fiber device */ 1272 supported = SUPPORTED_Autoneg | SUPPORTED_FIBRE; 1273 advertising = ADVERTISED_Autoneg | ADVERTISED_FIBRE; 1274 cmd->base.port = PORT_FIBRE; 1275 } else { 1276 /* copper device */ 1277 supported = SUPPORTED_10baseT_Half | 1278 SUPPORTED_10baseT_Full | SUPPORTED_100baseT_Half 1279 | SUPPORTED_100baseT_Full | SUPPORTED_1000baseT_Full | 1280 SUPPORTED_Autoneg | SUPPORTED_MII; 1281 advertising = ADVERTISED_10baseT_Half | 1282 ADVERTISED_10baseT_Full | ADVERTISED_100baseT_Half | 1283 ADVERTISED_100baseT_Full | ADVERTISED_1000baseT_Full | 1284 ADVERTISED_Autoneg | ADVERTISED_MII; 1285 cmd->base.port = PORT_MII; 1286 } 1287 if (np->link_status) { 1288 cmd->base.speed = np->speed; 1289 cmd->base.duplex = np->full_duplex ? DUPLEX_FULL : DUPLEX_HALF; 1290 } else { 1291 cmd->base.speed = SPEED_UNKNOWN; 1292 cmd->base.duplex = DUPLEX_UNKNOWN; 1293 } 1294 if (np->an_enable) 1295 cmd->base.autoneg = AUTONEG_ENABLE; 1296 else 1297 cmd->base.autoneg = AUTONEG_DISABLE; 1298 1299 cmd->base.phy_address = np->phy_addr; 1300 1301 ethtool_convert_legacy_u32_to_link_mode(cmd->link_modes.supported, 1302 supported); 1303 ethtool_convert_legacy_u32_to_link_mode(cmd->link_modes.advertising, 1304 advertising); 1305 1306 return 0; 1307 } 1308 1309 static int rio_set_link_ksettings(struct net_device *dev, 1310 const struct ethtool_link_ksettings *cmd) 1311 { 1312 struct netdev_private *np = netdev_priv(dev); 1313 u32 speed = cmd->base.speed; 1314 u8 duplex = cmd->base.duplex; 1315 1316 netif_carrier_off(dev); 1317 if (cmd->base.autoneg == AUTONEG_ENABLE) { 1318 if (np->an_enable) { 1319 return 0; 1320 } else { 1321 np->an_enable = 1; 1322 mii_set_media(dev); 1323 return 0; 1324 } 1325 } else { 1326 np->an_enable = 0; 1327 if (np->speed == 1000) { 1328 speed = SPEED_100; 1329 duplex = DUPLEX_FULL; 1330 printk("Warning!! Can't disable Auto negotiation in 1000Mbps, change to Manual 100Mbps, Full duplex.\n"); 1331 } 1332 switch (speed) { 1333 case SPEED_10: 1334 np->speed = 10; 1335 np->full_duplex = (duplex == DUPLEX_FULL); 1336 break; 1337 case SPEED_100: 1338 np->speed = 100; 1339 np->full_duplex = (duplex == DUPLEX_FULL); 1340 break; 1341 case SPEED_1000: /* not supported */ 1342 default: 1343 return -EINVAL; 1344 } 1345 mii_set_media(dev); 1346 } 1347 return 0; 1348 } 1349 1350 static u32 rio_get_link(struct net_device *dev) 1351 { 1352 struct netdev_private *np = netdev_priv(dev); 1353 return np->link_status; 1354 } 1355 1356 static const struct ethtool_ops ethtool_ops = { 1357 .get_drvinfo = rio_get_drvinfo, 1358 .get_link = rio_get_link, 1359 .get_link_ksettings = rio_get_link_ksettings, 1360 .set_link_ksettings = rio_set_link_ksettings, 1361 }; 1362 1363 static int 1364 rio_ioctl (struct net_device *dev, struct ifreq *rq, int cmd) 1365 { 1366 int phy_addr; 1367 struct netdev_private *np = netdev_priv(dev); 1368 struct mii_ioctl_data *miidata = if_mii(rq); 1369 1370 phy_addr = np->phy_addr; 1371 switch (cmd) { 1372 case SIOCGMIIPHY: 1373 miidata->phy_id = phy_addr; 1374 break; 1375 case SIOCGMIIREG: 1376 miidata->val_out = mii_read (dev, phy_addr, miidata->reg_num); 1377 break; 1378 case SIOCSMIIREG: 1379 if (!capable(CAP_NET_ADMIN)) 1380 return -EPERM; 1381 mii_write (dev, phy_addr, miidata->reg_num, miidata->val_in); 1382 break; 1383 default: 1384 return -EOPNOTSUPP; 1385 } 1386 return 0; 1387 } 1388 1389 #define EEP_READ 0x0200 1390 #define EEP_BUSY 0x8000 1391 /* Read the EEPROM word */ 1392 /* We use I/O instruction to read/write eeprom to avoid fail on some machines */ 1393 static int read_eeprom(struct netdev_private *np, int eep_addr) 1394 { 1395 void __iomem *ioaddr = np->eeprom_addr; 1396 int i = 1000; 1397 1398 dw16(EepromCtrl, EEP_READ | (eep_addr & 0xff)); 1399 while (i-- > 0) { 1400 if (!(dr16(EepromCtrl) & EEP_BUSY)) 1401 return dr16(EepromData); 1402 } 1403 return 0; 1404 } 1405 1406 enum phy_ctrl_bits { 1407 MII_READ = 0x00, MII_CLK = 0x01, MII_DATA1 = 0x02, MII_WRITE = 0x04, 1408 MII_DUPLEX = 0x08, 1409 }; 1410 1411 #define mii_delay() dr8(PhyCtrl) 1412 static void 1413 mii_sendbit (struct net_device *dev, u32 data) 1414 { 1415 struct netdev_private *np = netdev_priv(dev); 1416 void __iomem *ioaddr = np->ioaddr; 1417 1418 data = ((data) ? MII_DATA1 : 0) | (dr8(PhyCtrl) & 0xf8) | MII_WRITE; 1419 dw8(PhyCtrl, data); 1420 mii_delay (); 1421 dw8(PhyCtrl, data | MII_CLK); 1422 mii_delay (); 1423 } 1424 1425 static int 1426 mii_getbit (struct net_device *dev) 1427 { 1428 struct netdev_private *np = netdev_priv(dev); 1429 void __iomem *ioaddr = np->ioaddr; 1430 u8 data; 1431 1432 data = (dr8(PhyCtrl) & 0xf8) | MII_READ; 1433 dw8(PhyCtrl, data); 1434 mii_delay (); 1435 dw8(PhyCtrl, data | MII_CLK); 1436 mii_delay (); 1437 return (dr8(PhyCtrl) >> 1) & 1; 1438 } 1439 1440 static void 1441 mii_send_bits (struct net_device *dev, u32 data, int len) 1442 { 1443 int i; 1444 1445 for (i = len - 1; i >= 0; i--) { 1446 mii_sendbit (dev, data & (1 << i)); 1447 } 1448 } 1449 1450 static int 1451 mii_read (struct net_device *dev, int phy_addr, int reg_num) 1452 { 1453 u32 cmd; 1454 int i; 1455 u32 retval = 0; 1456 1457 /* Preamble */ 1458 mii_send_bits (dev, 0xffffffff, 32); 1459 /* ST(2), OP(2), ADDR(5), REG#(5), TA(2), Data(16) total 32 bits */ 1460 /* ST,OP = 0110'b for read operation */ 1461 cmd = (0x06 << 10 | phy_addr << 5 | reg_num); 1462 mii_send_bits (dev, cmd, 14); 1463 /* Turnaround */ 1464 if (mii_getbit (dev)) 1465 goto err_out; 1466 /* Read data */ 1467 for (i = 0; i < 16; i++) { 1468 retval |= mii_getbit (dev); 1469 retval <<= 1; 1470 } 1471 /* End cycle */ 1472 mii_getbit (dev); 1473 return (retval >> 1) & 0xffff; 1474 1475 err_out: 1476 return 0; 1477 } 1478 static int 1479 mii_write (struct net_device *dev, int phy_addr, int reg_num, u16 data) 1480 { 1481 u32 cmd; 1482 1483 /* Preamble */ 1484 mii_send_bits (dev, 0xffffffff, 32); 1485 /* ST(2), OP(2), ADDR(5), REG#(5), TA(2), Data(16) total 32 bits */ 1486 /* ST,OP,AAAAA,RRRRR,TA = 0101xxxxxxxxxx10'b = 0x5002 for write */ 1487 cmd = (0x5002 << 16) | (phy_addr << 23) | (reg_num << 18) | data; 1488 mii_send_bits (dev, cmd, 32); 1489 /* End cycle */ 1490 mii_getbit (dev); 1491 return 0; 1492 } 1493 static int 1494 mii_wait_link (struct net_device *dev, int wait) 1495 { 1496 __u16 bmsr; 1497 int phy_addr; 1498 struct netdev_private *np; 1499 1500 np = netdev_priv(dev); 1501 phy_addr = np->phy_addr; 1502 1503 do { 1504 bmsr = mii_read (dev, phy_addr, MII_BMSR); 1505 if (bmsr & BMSR_LSTATUS) 1506 return 0; 1507 mdelay (1); 1508 } while (--wait > 0); 1509 return -1; 1510 } 1511 static int 1512 mii_get_media (struct net_device *dev) 1513 { 1514 __u16 negotiate; 1515 __u16 bmsr; 1516 __u16 mscr; 1517 __u16 mssr; 1518 int phy_addr; 1519 struct netdev_private *np; 1520 1521 np = netdev_priv(dev); 1522 phy_addr = np->phy_addr; 1523 1524 bmsr = mii_read (dev, phy_addr, MII_BMSR); 1525 if (np->an_enable) { 1526 if (!(bmsr & BMSR_ANEGCOMPLETE)) { 1527 /* Auto-Negotiation not completed */ 1528 return -1; 1529 } 1530 negotiate = mii_read (dev, phy_addr, MII_ADVERTISE) & 1531 mii_read (dev, phy_addr, MII_LPA); 1532 mscr = mii_read (dev, phy_addr, MII_CTRL1000); 1533 mssr = mii_read (dev, phy_addr, MII_STAT1000); 1534 if (mscr & ADVERTISE_1000FULL && mssr & LPA_1000FULL) { 1535 np->speed = 1000; 1536 np->full_duplex = 1; 1537 printk (KERN_INFO "Auto 1000 Mbps, Full duplex\n"); 1538 } else if (mscr & ADVERTISE_1000HALF && mssr & LPA_1000HALF) { 1539 np->speed = 1000; 1540 np->full_duplex = 0; 1541 printk (KERN_INFO "Auto 1000 Mbps, Half duplex\n"); 1542 } else if (negotiate & ADVERTISE_100FULL) { 1543 np->speed = 100; 1544 np->full_duplex = 1; 1545 printk (KERN_INFO "Auto 100 Mbps, Full duplex\n"); 1546 } else if (negotiate & ADVERTISE_100HALF) { 1547 np->speed = 100; 1548 np->full_duplex = 0; 1549 printk (KERN_INFO "Auto 100 Mbps, Half duplex\n"); 1550 } else if (negotiate & ADVERTISE_10FULL) { 1551 np->speed = 10; 1552 np->full_duplex = 1; 1553 printk (KERN_INFO "Auto 10 Mbps, Full duplex\n"); 1554 } else if (negotiate & ADVERTISE_10HALF) { 1555 np->speed = 10; 1556 np->full_duplex = 0; 1557 printk (KERN_INFO "Auto 10 Mbps, Half duplex\n"); 1558 } 1559 if (negotiate & ADVERTISE_PAUSE_CAP) { 1560 np->tx_flow &= 1; 1561 np->rx_flow &= 1; 1562 } else if (negotiate & ADVERTISE_PAUSE_ASYM) { 1563 np->tx_flow = 0; 1564 np->rx_flow &= 1; 1565 } 1566 /* else tx_flow, rx_flow = user select */ 1567 } else { 1568 __u16 bmcr = mii_read (dev, phy_addr, MII_BMCR); 1569 switch (bmcr & (BMCR_SPEED100 | BMCR_SPEED1000)) { 1570 case BMCR_SPEED1000: 1571 printk (KERN_INFO "Operating at 1000 Mbps, "); 1572 break; 1573 case BMCR_SPEED100: 1574 printk (KERN_INFO "Operating at 100 Mbps, "); 1575 break; 1576 case 0: 1577 printk (KERN_INFO "Operating at 10 Mbps, "); 1578 } 1579 if (bmcr & BMCR_FULLDPLX) { 1580 printk (KERN_CONT "Full duplex\n"); 1581 } else { 1582 printk (KERN_CONT "Half duplex\n"); 1583 } 1584 } 1585 if (np->tx_flow) 1586 printk(KERN_INFO "Enable Tx Flow Control\n"); 1587 else 1588 printk(KERN_INFO "Disable Tx Flow Control\n"); 1589 if (np->rx_flow) 1590 printk(KERN_INFO "Enable Rx Flow Control\n"); 1591 else 1592 printk(KERN_INFO "Disable Rx Flow Control\n"); 1593 1594 return 0; 1595 } 1596 1597 static int 1598 mii_set_media (struct net_device *dev) 1599 { 1600 __u16 pscr; 1601 __u16 bmcr; 1602 __u16 bmsr; 1603 __u16 anar; 1604 int phy_addr; 1605 struct netdev_private *np; 1606 np = netdev_priv(dev); 1607 phy_addr = np->phy_addr; 1608 1609 /* Does user set speed? */ 1610 if (np->an_enable) { 1611 /* Advertise capabilities */ 1612 bmsr = mii_read (dev, phy_addr, MII_BMSR); 1613 anar = mii_read (dev, phy_addr, MII_ADVERTISE) & 1614 ~(ADVERTISE_100FULL | ADVERTISE_10FULL | 1615 ADVERTISE_100HALF | ADVERTISE_10HALF | 1616 ADVERTISE_100BASE4); 1617 if (bmsr & BMSR_100FULL) 1618 anar |= ADVERTISE_100FULL; 1619 if (bmsr & BMSR_100HALF) 1620 anar |= ADVERTISE_100HALF; 1621 if (bmsr & BMSR_100BASE4) 1622 anar |= ADVERTISE_100BASE4; 1623 if (bmsr & BMSR_10FULL) 1624 anar |= ADVERTISE_10FULL; 1625 if (bmsr & BMSR_10HALF) 1626 anar |= ADVERTISE_10HALF; 1627 anar |= ADVERTISE_PAUSE_CAP | ADVERTISE_PAUSE_ASYM; 1628 mii_write (dev, phy_addr, MII_ADVERTISE, anar); 1629 1630 /* Enable Auto crossover */ 1631 pscr = mii_read (dev, phy_addr, MII_PHY_SCR); 1632 pscr |= 3 << 5; /* 11'b */ 1633 mii_write (dev, phy_addr, MII_PHY_SCR, pscr); 1634 1635 /* Soft reset PHY */ 1636 mii_write (dev, phy_addr, MII_BMCR, BMCR_RESET); 1637 bmcr = BMCR_ANENABLE | BMCR_ANRESTART | BMCR_RESET; 1638 mii_write (dev, phy_addr, MII_BMCR, bmcr); 1639 mdelay(1); 1640 } else { 1641 /* Force speed setting */ 1642 /* 1) Disable Auto crossover */ 1643 pscr = mii_read (dev, phy_addr, MII_PHY_SCR); 1644 pscr &= ~(3 << 5); 1645 mii_write (dev, phy_addr, MII_PHY_SCR, pscr); 1646 1647 /* 2) PHY Reset */ 1648 bmcr = mii_read (dev, phy_addr, MII_BMCR); 1649 bmcr |= BMCR_RESET; 1650 mii_write (dev, phy_addr, MII_BMCR, bmcr); 1651 1652 /* 3) Power Down */ 1653 bmcr = 0x1940; /* must be 0x1940 */ 1654 mii_write (dev, phy_addr, MII_BMCR, bmcr); 1655 mdelay (100); /* wait a certain time */ 1656 1657 /* 4) Advertise nothing */ 1658 mii_write (dev, phy_addr, MII_ADVERTISE, 0); 1659 1660 /* 5) Set media and Power Up */ 1661 bmcr = BMCR_PDOWN; 1662 if (np->speed == 100) { 1663 bmcr |= BMCR_SPEED100; 1664 printk (KERN_INFO "Manual 100 Mbps, "); 1665 } else if (np->speed == 10) { 1666 printk (KERN_INFO "Manual 10 Mbps, "); 1667 } 1668 if (np->full_duplex) { 1669 bmcr |= BMCR_FULLDPLX; 1670 printk (KERN_CONT "Full duplex\n"); 1671 } else { 1672 printk (KERN_CONT "Half duplex\n"); 1673 } 1674 #if 0 1675 /* Set 1000BaseT Master/Slave setting */ 1676 mscr = mii_read (dev, phy_addr, MII_CTRL1000); 1677 mscr |= MII_MSCR_CFG_ENABLE; 1678 mscr &= ~MII_MSCR_CFG_VALUE = 0; 1679 #endif 1680 mii_write (dev, phy_addr, MII_BMCR, bmcr); 1681 mdelay(10); 1682 } 1683 return 0; 1684 } 1685 1686 static int 1687 mii_get_media_pcs (struct net_device *dev) 1688 { 1689 __u16 negotiate; 1690 __u16 bmsr; 1691 int phy_addr; 1692 struct netdev_private *np; 1693 1694 np = netdev_priv(dev); 1695 phy_addr = np->phy_addr; 1696 1697 bmsr = mii_read (dev, phy_addr, PCS_BMSR); 1698 if (np->an_enable) { 1699 if (!(bmsr & BMSR_ANEGCOMPLETE)) { 1700 /* Auto-Negotiation not completed */ 1701 return -1; 1702 } 1703 negotiate = mii_read (dev, phy_addr, PCS_ANAR) & 1704 mii_read (dev, phy_addr, PCS_ANLPAR); 1705 np->speed = 1000; 1706 if (negotiate & PCS_ANAR_FULL_DUPLEX) { 1707 printk (KERN_INFO "Auto 1000 Mbps, Full duplex\n"); 1708 np->full_duplex = 1; 1709 } else { 1710 printk (KERN_INFO "Auto 1000 Mbps, half duplex\n"); 1711 np->full_duplex = 0; 1712 } 1713 if (negotiate & PCS_ANAR_PAUSE) { 1714 np->tx_flow &= 1; 1715 np->rx_flow &= 1; 1716 } else if (negotiate & PCS_ANAR_ASYMMETRIC) { 1717 np->tx_flow = 0; 1718 np->rx_flow &= 1; 1719 } 1720 /* else tx_flow, rx_flow = user select */ 1721 } else { 1722 __u16 bmcr = mii_read (dev, phy_addr, PCS_BMCR); 1723 printk (KERN_INFO "Operating at 1000 Mbps, "); 1724 if (bmcr & BMCR_FULLDPLX) { 1725 printk (KERN_CONT "Full duplex\n"); 1726 } else { 1727 printk (KERN_CONT "Half duplex\n"); 1728 } 1729 } 1730 if (np->tx_flow) 1731 printk(KERN_INFO "Enable Tx Flow Control\n"); 1732 else 1733 printk(KERN_INFO "Disable Tx Flow Control\n"); 1734 if (np->rx_flow) 1735 printk(KERN_INFO "Enable Rx Flow Control\n"); 1736 else 1737 printk(KERN_INFO "Disable Rx Flow Control\n"); 1738 1739 return 0; 1740 } 1741 1742 static int 1743 mii_set_media_pcs (struct net_device *dev) 1744 { 1745 __u16 bmcr; 1746 __u16 esr; 1747 __u16 anar; 1748 int phy_addr; 1749 struct netdev_private *np; 1750 np = netdev_priv(dev); 1751 phy_addr = np->phy_addr; 1752 1753 /* Auto-Negotiation? */ 1754 if (np->an_enable) { 1755 /* Advertise capabilities */ 1756 esr = mii_read (dev, phy_addr, PCS_ESR); 1757 anar = mii_read (dev, phy_addr, MII_ADVERTISE) & 1758 ~PCS_ANAR_HALF_DUPLEX & 1759 ~PCS_ANAR_FULL_DUPLEX; 1760 if (esr & (MII_ESR_1000BT_HD | MII_ESR_1000BX_HD)) 1761 anar |= PCS_ANAR_HALF_DUPLEX; 1762 if (esr & (MII_ESR_1000BT_FD | MII_ESR_1000BX_FD)) 1763 anar |= PCS_ANAR_FULL_DUPLEX; 1764 anar |= PCS_ANAR_PAUSE | PCS_ANAR_ASYMMETRIC; 1765 mii_write (dev, phy_addr, MII_ADVERTISE, anar); 1766 1767 /* Soft reset PHY */ 1768 mii_write (dev, phy_addr, MII_BMCR, BMCR_RESET); 1769 bmcr = BMCR_ANENABLE | BMCR_ANRESTART | BMCR_RESET; 1770 mii_write (dev, phy_addr, MII_BMCR, bmcr); 1771 mdelay(1); 1772 } else { 1773 /* Force speed setting */ 1774 /* PHY Reset */ 1775 bmcr = BMCR_RESET; 1776 mii_write (dev, phy_addr, MII_BMCR, bmcr); 1777 mdelay(10); 1778 if (np->full_duplex) { 1779 bmcr = BMCR_FULLDPLX; 1780 printk (KERN_INFO "Manual full duplex\n"); 1781 } else { 1782 bmcr = 0; 1783 printk (KERN_INFO "Manual half duplex\n"); 1784 } 1785 mii_write (dev, phy_addr, MII_BMCR, bmcr); 1786 mdelay(10); 1787 1788 /* Advertise nothing */ 1789 mii_write (dev, phy_addr, MII_ADVERTISE, 0); 1790 } 1791 return 0; 1792 } 1793 1794 1795 static int 1796 rio_close (struct net_device *dev) 1797 { 1798 struct netdev_private *np = netdev_priv(dev); 1799 struct pci_dev *pdev = np->pdev; 1800 1801 netif_stop_queue (dev); 1802 1803 rio_hw_stop(dev); 1804 1805 free_irq(pdev->irq, dev); 1806 timer_delete_sync(&np->timer); 1807 1808 free_list(dev); 1809 1810 return 0; 1811 } 1812 1813 static void 1814 rio_remove1 (struct pci_dev *pdev) 1815 { 1816 struct net_device *dev = pci_get_drvdata (pdev); 1817 1818 if (dev) { 1819 struct netdev_private *np = netdev_priv(dev); 1820 1821 unregister_netdev (dev); 1822 dma_free_coherent(&pdev->dev, RX_TOTAL_SIZE, np->rx_ring, 1823 np->rx_ring_dma); 1824 dma_free_coherent(&pdev->dev, TX_TOTAL_SIZE, np->tx_ring, 1825 np->tx_ring_dma); 1826 if (np->rmon_enable) 1827 pci_iounmap(pdev, np->ioaddr); 1828 pci_iounmap(pdev, np->eeprom_addr); 1829 free_netdev (dev); 1830 pci_release_regions (pdev); 1831 pci_disable_device (pdev); 1832 } 1833 } 1834 1835 #ifdef CONFIG_PM_SLEEP 1836 static int rio_suspend(struct device *device) 1837 { 1838 struct net_device *dev = dev_get_drvdata(device); 1839 struct netdev_private *np = netdev_priv(dev); 1840 1841 if (!netif_running(dev)) 1842 return 0; 1843 1844 netif_device_detach(dev); 1845 timer_delete_sync(&np->timer); 1846 rio_hw_stop(dev); 1847 1848 return 0; 1849 } 1850 1851 static int rio_resume(struct device *device) 1852 { 1853 struct net_device *dev = dev_get_drvdata(device); 1854 struct netdev_private *np = netdev_priv(dev); 1855 1856 if (!netif_running(dev)) 1857 return 0; 1858 1859 rio_reset_ring(np); 1860 rio_hw_init(dev); 1861 np->timer.expires = jiffies + 1 * HZ; 1862 add_timer(&np->timer); 1863 netif_device_attach(dev); 1864 dl2k_enable_int(np); 1865 1866 return 0; 1867 } 1868 1869 static DEFINE_SIMPLE_DEV_PM_OPS(rio_pm_ops, rio_suspend, rio_resume); 1870 #define RIO_PM_OPS (&rio_pm_ops) 1871 1872 #else 1873 1874 #define RIO_PM_OPS NULL 1875 1876 #endif /* CONFIG_PM_SLEEP */ 1877 1878 static struct pci_driver rio_driver = { 1879 .name = "dl2k", 1880 .id_table = rio_pci_tbl, 1881 .probe = rio_probe1, 1882 .remove = rio_remove1, 1883 .driver.pm = RIO_PM_OPS, 1884 }; 1885 1886 module_pci_driver(rio_driver); 1887 1888 /* Read Documentation/networking/device_drivers/ethernet/dlink/dl2k.rst. */ 1889