1 // SPDX-License-Identifier: GPL-2.0-or-later 2 /* D-Link DL2000-based Gigabit Ethernet Adapter Linux driver */ 3 /* 4 Copyright (c) 2001, 2002 by D-Link Corporation 5 Written by Edward Peng.<edward_peng@dlink.com.tw> 6 Created 03-May-2001, base on Linux' sundance.c. 7 8 */ 9 10 #include "dl2k.h" 11 #include <linux/dma-mapping.h> 12 13 #define dw32(reg, val) iowrite32(val, ioaddr + (reg)) 14 #define dw16(reg, val) iowrite16(val, ioaddr + (reg)) 15 #define dw8(reg, val) iowrite8(val, ioaddr + (reg)) 16 #define dr32(reg) ioread32(ioaddr + (reg)) 17 #define dr16(reg) ioread16(ioaddr + (reg)) 18 #define dr8(reg) ioread8(ioaddr + (reg)) 19 20 #define MAX_UNITS 8 21 static int mtu[MAX_UNITS]; 22 static int vlan[MAX_UNITS]; 23 static int jumbo[MAX_UNITS]; 24 static char *media[MAX_UNITS]; 25 static int tx_flow=-1; 26 static int rx_flow=-1; 27 static int copy_thresh; 28 static int rx_coalesce=10; /* Rx frame count each interrupt */ 29 static int rx_timeout=200; /* Rx DMA wait time in 640ns increments */ 30 static int tx_coalesce=16; /* HW xmit count each TxDMAComplete */ 31 32 33 MODULE_AUTHOR ("Edward Peng"); 34 MODULE_DESCRIPTION ("D-Link DL2000-based Gigabit Ethernet Adapter"); 35 MODULE_LICENSE("GPL"); 36 module_param_array(mtu, int, NULL, 0); 37 module_param_array(media, charp, NULL, 0); 38 module_param_array(vlan, int, NULL, 0); 39 module_param_array(jumbo, int, NULL, 0); 40 module_param(tx_flow, int, 0); 41 module_param(rx_flow, int, 0); 42 module_param(copy_thresh, int, 0); 43 module_param(rx_coalesce, int, 0); /* Rx frame count each interrupt */ 44 module_param(rx_timeout, int, 0); /* Rx DMA wait time in 64ns increments */ 45 module_param(tx_coalesce, int, 0); /* HW xmit count each TxDMAComplete */ 46 47 48 /* Enable the default interrupts */ 49 #define DEFAULT_INTR (RxDMAComplete | HostError | IntRequested | TxDMAComplete| \ 50 UpdateStats | LinkEvent) 51 52 static void dl2k_enable_int(struct netdev_private *np) 53 { 54 void __iomem *ioaddr = np->ioaddr; 55 56 dw16(IntEnable, DEFAULT_INTR); 57 } 58 59 static const int max_intrloop = 50; 60 static const int multicast_filter_limit = 0x40; 61 62 static int rio_open (struct net_device *dev); 63 static void rio_timer (struct timer_list *t); 64 static void rio_tx_timeout (struct net_device *dev, unsigned int txqueue); 65 static netdev_tx_t start_xmit (struct sk_buff *skb, struct net_device *dev); 66 static irqreturn_t rio_interrupt (int irq, void *dev_instance); 67 static void rio_free_tx (struct net_device *dev, int irq); 68 static void tx_error (struct net_device *dev, int tx_status); 69 static int receive_packet (struct net_device *dev); 70 static void rio_error (struct net_device *dev, int int_status); 71 static void set_multicast (struct net_device *dev); 72 static struct net_device_stats *get_stats (struct net_device *dev); 73 static int clear_stats (struct net_device *dev); 74 static int rio_ioctl (struct net_device *dev, struct ifreq *rq, int cmd); 75 static int rio_close (struct net_device *dev); 76 static int find_miiphy (struct net_device *dev); 77 static int parse_eeprom (struct net_device *dev); 78 static int read_eeprom (struct netdev_private *, int eep_addr); 79 static int mii_wait_link (struct net_device *dev, int wait); 80 static int mii_set_media (struct net_device *dev); 81 static int mii_get_media (struct net_device *dev); 82 static int mii_set_media_pcs (struct net_device *dev); 83 static int mii_get_media_pcs (struct net_device *dev); 84 static int mii_read (struct net_device *dev, int phy_addr, int reg_num); 85 static int mii_write (struct net_device *dev, int phy_addr, int reg_num, 86 u16 data); 87 88 static const struct ethtool_ops ethtool_ops; 89 90 static const struct net_device_ops netdev_ops = { 91 .ndo_open = rio_open, 92 .ndo_start_xmit = start_xmit, 93 .ndo_stop = rio_close, 94 .ndo_get_stats = get_stats, 95 .ndo_validate_addr = eth_validate_addr, 96 .ndo_set_mac_address = eth_mac_addr, 97 .ndo_set_rx_mode = set_multicast, 98 .ndo_eth_ioctl = rio_ioctl, 99 .ndo_tx_timeout = rio_tx_timeout, 100 }; 101 102 static bool is_support_rmon_mmio(struct pci_dev *pdev) 103 { 104 return pdev->vendor == PCI_VENDOR_ID_DLINK && 105 pdev->device == 0x4000 && 106 pdev->revision == 0x0c; 107 } 108 109 static int 110 rio_probe1 (struct pci_dev *pdev, const struct pci_device_id *ent) 111 { 112 struct net_device *dev; 113 struct netdev_private *np; 114 static int card_idx; 115 int chip_idx = ent->driver_data; 116 int err, irq; 117 void __iomem *ioaddr; 118 void *ring_space; 119 dma_addr_t ring_dma; 120 121 err = pci_enable_device (pdev); 122 if (err) 123 return err; 124 125 irq = pdev->irq; 126 err = pci_request_regions (pdev, "dl2k"); 127 if (err) 128 goto err_out_disable; 129 130 pci_set_master (pdev); 131 132 err = -ENOMEM; 133 134 dev = alloc_etherdev (sizeof (*np)); 135 if (!dev) 136 goto err_out_res; 137 SET_NETDEV_DEV(dev, &pdev->dev); 138 139 np = netdev_priv(dev); 140 141 if (is_support_rmon_mmio(pdev)) 142 np->rmon_enable = true; 143 144 /* IO registers range. */ 145 ioaddr = pci_iomap(pdev, 0, 0); 146 if (!ioaddr) 147 goto err_out_dev; 148 np->eeprom_addr = ioaddr; 149 150 if (np->rmon_enable) { 151 /* MM registers range. */ 152 ioaddr = pci_iomap(pdev, 1, 0); 153 if (!ioaddr) 154 goto err_out_iounmap; 155 } 156 157 np->ioaddr = ioaddr; 158 np->chip_id = chip_idx; 159 np->pdev = pdev; 160 161 spin_lock_init(&np->stats_lock); 162 spin_lock_init (&np->tx_lock); 163 spin_lock_init (&np->rx_lock); 164 165 /* Parse manual configuration */ 166 np->an_enable = 1; 167 np->tx_coalesce = 1; 168 if (card_idx < MAX_UNITS) { 169 if (media[card_idx] != NULL) { 170 np->an_enable = 0; 171 if (strcmp (media[card_idx], "auto") == 0 || 172 strcmp (media[card_idx], "autosense") == 0 || 173 strcmp (media[card_idx], "0") == 0 ) { 174 np->an_enable = 2; 175 } else if (strcmp (media[card_idx], "100mbps_fd") == 0 || 176 strcmp (media[card_idx], "4") == 0) { 177 np->speed = 100; 178 np->full_duplex = 1; 179 } else if (strcmp (media[card_idx], "100mbps_hd") == 0 || 180 strcmp (media[card_idx], "3") == 0) { 181 np->speed = 100; 182 np->full_duplex = 0; 183 } else if (strcmp (media[card_idx], "10mbps_fd") == 0 || 184 strcmp (media[card_idx], "2") == 0) { 185 np->speed = 10; 186 np->full_duplex = 1; 187 } else if (strcmp (media[card_idx], "10mbps_hd") == 0 || 188 strcmp (media[card_idx], "1") == 0) { 189 np->speed = 10; 190 np->full_duplex = 0; 191 } else if (strcmp (media[card_idx], "1000mbps_fd") == 0 || 192 strcmp (media[card_idx], "6") == 0) { 193 np->speed=1000; 194 np->full_duplex=1; 195 } else if (strcmp (media[card_idx], "1000mbps_hd") == 0 || 196 strcmp (media[card_idx], "5") == 0) { 197 np->speed = 1000; 198 np->full_duplex = 0; 199 } else { 200 np->an_enable = 1; 201 } 202 } 203 if (jumbo[card_idx] != 0) { 204 np->jumbo = 1; 205 dev->mtu = MAX_JUMBO; 206 } else { 207 np->jumbo = 0; 208 if (mtu[card_idx] > 0 && mtu[card_idx] < PACKET_SIZE) 209 dev->mtu = mtu[card_idx]; 210 } 211 np->vlan = (vlan[card_idx] > 0 && vlan[card_idx] < 4096) ? 212 vlan[card_idx] : 0; 213 if (rx_coalesce > 0 && rx_timeout > 0) { 214 np->rx_coalesce = rx_coalesce; 215 np->rx_timeout = rx_timeout; 216 np->coalesce = 1; 217 } 218 np->tx_flow = (tx_flow == 0) ? 0 : 1; 219 np->rx_flow = (rx_flow == 0) ? 0 : 1; 220 221 if (tx_coalesce < 1) 222 tx_coalesce = 1; 223 else if (tx_coalesce > TX_RING_SIZE-1) 224 tx_coalesce = TX_RING_SIZE - 1; 225 } 226 dev->netdev_ops = &netdev_ops; 227 dev->watchdog_timeo = TX_TIMEOUT; 228 dev->ethtool_ops = ðtool_ops; 229 #if 0 230 dev->features = NETIF_F_IP_CSUM; 231 #endif 232 /* MTU range: 68 - 1536 or 8000 */ 233 dev->min_mtu = ETH_MIN_MTU; 234 dev->max_mtu = np->jumbo ? MAX_JUMBO : PACKET_SIZE; 235 236 pci_set_drvdata (pdev, dev); 237 238 ring_space = dma_alloc_coherent(&pdev->dev, TX_TOTAL_SIZE, &ring_dma, 239 GFP_KERNEL); 240 if (!ring_space) 241 goto err_out_iounmap; 242 np->tx_ring = ring_space; 243 np->tx_ring_dma = ring_dma; 244 245 ring_space = dma_alloc_coherent(&pdev->dev, RX_TOTAL_SIZE, &ring_dma, 246 GFP_KERNEL); 247 if (!ring_space) 248 goto err_out_unmap_tx; 249 np->rx_ring = ring_space; 250 np->rx_ring_dma = ring_dma; 251 252 /* Parse eeprom data */ 253 parse_eeprom (dev); 254 255 /* Find PHY address */ 256 err = find_miiphy (dev); 257 if (err) 258 goto err_out_unmap_rx; 259 260 /* Fiber device? */ 261 np->phy_media = (dr16(ASICCtrl) & PhyMedia) ? 1 : 0; 262 np->link_status = 0; 263 /* Set media and reset PHY */ 264 if (np->phy_media) { 265 /* default Auto-Negotiation for fiber deivices */ 266 if (np->an_enable == 2) { 267 np->an_enable = 1; 268 } 269 } else { 270 /* Auto-Negotiation is mandatory for 1000BASE-T, 271 IEEE 802.3ab Annex 28D page 14 */ 272 if (np->speed == 1000) 273 np->an_enable = 1; 274 } 275 276 err = register_netdev (dev); 277 if (err) 278 goto err_out_unmap_rx; 279 280 card_idx++; 281 282 printk (KERN_INFO "%s: %s, %pM, IRQ %d\n", 283 dev->name, np->name, dev->dev_addr, irq); 284 if (tx_coalesce > 1) 285 printk(KERN_INFO "tx_coalesce:\t%d packets\n", 286 tx_coalesce); 287 if (np->coalesce) 288 printk(KERN_INFO 289 "rx_coalesce:\t%d packets\n" 290 "rx_timeout: \t%d ns\n", 291 np->rx_coalesce, np->rx_timeout*640); 292 if (np->vlan) 293 printk(KERN_INFO "vlan(id):\t%d\n", np->vlan); 294 return 0; 295 296 err_out_unmap_rx: 297 dma_free_coherent(&pdev->dev, RX_TOTAL_SIZE, np->rx_ring, 298 np->rx_ring_dma); 299 err_out_unmap_tx: 300 dma_free_coherent(&pdev->dev, TX_TOTAL_SIZE, np->tx_ring, 301 np->tx_ring_dma); 302 err_out_iounmap: 303 if (np->rmon_enable) 304 pci_iounmap(pdev, np->ioaddr); 305 pci_iounmap(pdev, np->eeprom_addr); 306 err_out_dev: 307 free_netdev (dev); 308 err_out_res: 309 pci_release_regions (pdev); 310 err_out_disable: 311 pci_disable_device (pdev); 312 return err; 313 } 314 315 static int 316 find_miiphy (struct net_device *dev) 317 { 318 struct netdev_private *np = netdev_priv(dev); 319 int i, phy_found = 0; 320 321 np->phy_addr = 1; 322 323 for (i = 31; i >= 0; i--) { 324 int mii_status = mii_read (dev, i, 1); 325 if (mii_status != 0xffff && mii_status != 0x0000) { 326 np->phy_addr = i; 327 phy_found++; 328 } 329 } 330 if (!phy_found) { 331 printk (KERN_ERR "%s: No MII PHY found!\n", dev->name); 332 return -ENODEV; 333 } 334 return 0; 335 } 336 337 static int 338 parse_eeprom (struct net_device *dev) 339 { 340 struct netdev_private *np = netdev_priv(dev); 341 void __iomem *ioaddr = np->ioaddr; 342 int i, j; 343 u8 sromdata[256]; 344 u8 *psib; 345 u32 crc; 346 PSROM_t psrom = (PSROM_t) sromdata; 347 348 int cid, next; 349 350 for (i = 0; i < 128; i++) 351 ((__le16 *) sromdata)[i] = cpu_to_le16(read_eeprom(np, i)); 352 353 if (np->pdev->vendor == PCI_VENDOR_ID_DLINK) { /* D-Link Only */ 354 /* Check CRC */ 355 crc = ~ether_crc_le (256 - 4, sromdata); 356 if (psrom->crc != cpu_to_le32(crc)) { 357 printk (KERN_ERR "%s: EEPROM data CRC error.\n", 358 dev->name); 359 return -1; 360 } 361 } 362 363 /* Set MAC address */ 364 eth_hw_addr_set(dev, psrom->mac_addr); 365 366 if (np->chip_id == CHIP_IP1000A) { 367 np->led_mode = le16_to_cpu(psrom->led_mode); 368 return 0; 369 } 370 371 if (np->pdev->vendor != PCI_VENDOR_ID_DLINK) { 372 return 0; 373 } 374 375 /* Parse Software Information Block */ 376 i = 0x30; 377 psib = (u8 *) sromdata; 378 do { 379 cid = psib[i++]; 380 next = psib[i++]; 381 if ((cid == 0 && next == 0) || (cid == 0xff && next == 0xff)) { 382 printk (KERN_ERR "Cell data error\n"); 383 return -1; 384 } 385 switch (cid) { 386 case 0: /* Format version */ 387 break; 388 case 1: /* End of cell */ 389 return 0; 390 case 2: /* Duplex Polarity */ 391 np->duplex_polarity = psib[i]; 392 dw8(PhyCtrl, dr8(PhyCtrl) | psib[i]); 393 break; 394 case 3: /* Wake Polarity */ 395 np->wake_polarity = psib[i]; 396 break; 397 case 9: /* Adapter description */ 398 j = (next - i > 255) ? 255 : next - i; 399 memcpy (np->name, &(psib[i]), j); 400 break; 401 case 4: 402 case 5: 403 case 6: 404 case 7: 405 case 8: /* Reversed */ 406 break; 407 default: /* Unknown cell */ 408 return -1; 409 } 410 i = next; 411 } while (1); 412 413 return 0; 414 } 415 416 static void rio_set_led_mode(struct net_device *dev) 417 { 418 struct netdev_private *np = netdev_priv(dev); 419 void __iomem *ioaddr = np->ioaddr; 420 u32 mode; 421 422 if (np->chip_id != CHIP_IP1000A) 423 return; 424 425 mode = dr32(ASICCtrl); 426 mode &= ~(IPG_AC_LED_MODE_BIT_1 | IPG_AC_LED_MODE | IPG_AC_LED_SPEED); 427 428 if (np->led_mode & 0x01) 429 mode |= IPG_AC_LED_MODE; 430 if (np->led_mode & 0x02) 431 mode |= IPG_AC_LED_MODE_BIT_1; 432 if (np->led_mode & 0x08) 433 mode |= IPG_AC_LED_SPEED; 434 435 dw32(ASICCtrl, mode); 436 } 437 438 static inline dma_addr_t desc_to_dma(struct netdev_desc *desc) 439 { 440 return le64_to_cpu(desc->fraginfo) & DMA_BIT_MASK(48); 441 } 442 443 static void free_list(struct net_device *dev) 444 { 445 struct netdev_private *np = netdev_priv(dev); 446 struct sk_buff *skb; 447 int i; 448 449 /* Free all the skbuffs in the queue. */ 450 for (i = 0; i < RX_RING_SIZE; i++) { 451 skb = np->rx_skbuff[i]; 452 if (skb) { 453 dma_unmap_single(&np->pdev->dev, 454 desc_to_dma(&np->rx_ring[i]), 455 skb->len, DMA_FROM_DEVICE); 456 dev_kfree_skb(skb); 457 np->rx_skbuff[i] = NULL; 458 } 459 np->rx_ring[i].status = 0; 460 np->rx_ring[i].fraginfo = 0; 461 } 462 for (i = 0; i < TX_RING_SIZE; i++) { 463 skb = np->tx_skbuff[i]; 464 if (skb) { 465 dma_unmap_single(&np->pdev->dev, 466 desc_to_dma(&np->tx_ring[i]), 467 skb->len, DMA_TO_DEVICE); 468 dev_kfree_skb(skb); 469 np->tx_skbuff[i] = NULL; 470 } 471 } 472 } 473 474 static void rio_reset_ring(struct netdev_private *np) 475 { 476 int i; 477 478 np->cur_rx = 0; 479 np->cur_tx = 0; 480 np->old_rx = 0; 481 np->old_tx = 0; 482 483 for (i = 0; i < TX_RING_SIZE; i++) 484 np->tx_ring[i].status = cpu_to_le64(TFDDone); 485 486 for (i = 0; i < RX_RING_SIZE; i++) 487 np->rx_ring[i].status = 0; 488 } 489 490 /* allocate and initialize Tx and Rx descriptors */ 491 static int alloc_list(struct net_device *dev) 492 { 493 struct netdev_private *np = netdev_priv(dev); 494 int i; 495 496 rio_reset_ring(np); 497 np->rx_buf_sz = (dev->mtu <= 1500 ? PACKET_SIZE : dev->mtu + 32); 498 499 /* Initialize Tx descriptors, TFDListPtr leaves in start_xmit(). */ 500 for (i = 0; i < TX_RING_SIZE; i++) { 501 np->tx_skbuff[i] = NULL; 502 np->tx_ring[i].next_desc = cpu_to_le64(np->tx_ring_dma + 503 ((i + 1) % TX_RING_SIZE) * 504 sizeof(struct netdev_desc)); 505 } 506 507 /* Initialize Rx descriptors & allocate buffers */ 508 for (i = 0; i < RX_RING_SIZE; i++) { 509 /* Allocated fixed size of skbuff */ 510 struct sk_buff *skb; 511 512 skb = netdev_alloc_skb_ip_align(dev, np->rx_buf_sz); 513 np->rx_skbuff[i] = skb; 514 if (!skb) { 515 free_list(dev); 516 return -ENOMEM; 517 } 518 519 np->rx_ring[i].next_desc = cpu_to_le64(np->rx_ring_dma + 520 ((i + 1) % RX_RING_SIZE) * 521 sizeof(struct netdev_desc)); 522 /* Rubicon now supports 40 bits of addressing space. */ 523 np->rx_ring[i].fraginfo = 524 cpu_to_le64(dma_map_single(&np->pdev->dev, skb->data, 525 np->rx_buf_sz, DMA_FROM_DEVICE)); 526 np->rx_ring[i].fraginfo |= cpu_to_le64((u64)np->rx_buf_sz << 48); 527 } 528 529 return 0; 530 } 531 532 static void rio_hw_init(struct net_device *dev) 533 { 534 struct netdev_private *np = netdev_priv(dev); 535 void __iomem *ioaddr = np->ioaddr; 536 int i; 537 u16 macctrl; 538 539 /* Reset all logic functions */ 540 dw16(ASICCtrl + 2, 541 GlobalReset | DMAReset | FIFOReset | NetworkReset | HostReset); 542 mdelay(10); 543 544 rio_set_led_mode(dev); 545 546 /* DebugCtrl bit 4, 5, 9 must set */ 547 dw32(DebugCtrl, dr32(DebugCtrl) | 0x0230); 548 549 if (np->chip_id == CHIP_IP1000A && 550 (np->pdev->revision == 0x40 || np->pdev->revision == 0x41)) { 551 /* PHY magic taken from ipg driver, undocumented registers */ 552 mii_write(dev, np->phy_addr, 31, 0x0001); 553 mii_write(dev, np->phy_addr, 27, 0x01e0); 554 mii_write(dev, np->phy_addr, 31, 0x0002); 555 mii_write(dev, np->phy_addr, 27, 0xeb8e); 556 mii_write(dev, np->phy_addr, 31, 0x0000); 557 mii_write(dev, np->phy_addr, 30, 0x005e); 558 /* advertise 1000BASE-T half & full duplex, prefer MASTER */ 559 mii_write(dev, np->phy_addr, MII_CTRL1000, 0x0700); 560 } 561 562 if (np->phy_media) 563 mii_set_media_pcs(dev); 564 else 565 mii_set_media(dev); 566 567 /* Jumbo frame */ 568 if (np->jumbo != 0) 569 dw16(MaxFrameSize, MAX_JUMBO+14); 570 571 /* Set RFDListPtr */ 572 dw32(RFDListPtr0, np->rx_ring_dma); 573 dw32(RFDListPtr1, 0); 574 575 /* Set station address */ 576 /* 16 or 32-bit access is required by TC9020 datasheet but 8-bit works 577 * too. However, it doesn't work on IP1000A so we use 16-bit access. 578 */ 579 for (i = 0; i < 3; i++) 580 dw16(StationAddr0 + 2 * i, get_unaligned_le16(&dev->dev_addr[2 * i])); 581 582 set_multicast (dev); 583 if (np->coalesce) { 584 dw32(RxDMAIntCtrl, np->rx_coalesce | np->rx_timeout << 16); 585 } 586 /* Set RIO to poll every N*320nsec. */ 587 dw8(RxDMAPollPeriod, 0x20); 588 dw8(TxDMAPollPeriod, 0xff); 589 dw8(RxDMABurstThresh, 0x30); 590 dw8(RxDMAUrgentThresh, 0x30); 591 if (!np->rmon_enable) 592 dw32(RmonStatMask, 0x0007ffff); 593 /* clear statistics */ 594 clear_stats (dev); 595 596 /* VLAN supported */ 597 if (np->vlan) { 598 /* priority field in RxDMAIntCtrl */ 599 dw32(RxDMAIntCtrl, dr32(RxDMAIntCtrl) | 0x7 << 10); 600 /* VLANId */ 601 dw16(VLANId, np->vlan); 602 /* Length/Type should be 0x8100 */ 603 dw32(VLANTag, 0x8100 << 16 | np->vlan); 604 /* Enable AutoVLANuntagging, but disable AutoVLANtagging. 605 VLAN information tagged by TFC' VID, CFI fields. */ 606 dw32(MACCtrl, dr32(MACCtrl) | AutoVLANuntagging); 607 } 608 609 /* Start Tx/Rx */ 610 dw32(MACCtrl, dr32(MACCtrl) | StatsEnable | RxEnable | TxEnable); 611 612 macctrl = 0; 613 macctrl |= (np->vlan) ? AutoVLANuntagging : 0; 614 macctrl |= (np->full_duplex) ? DuplexSelect : 0; 615 macctrl |= (np->tx_flow) ? TxFlowControlEnable : 0; 616 macctrl |= (np->rx_flow) ? RxFlowControlEnable : 0; 617 dw16(MACCtrl, macctrl); 618 } 619 620 static void rio_hw_stop(struct net_device *dev) 621 { 622 struct netdev_private *np = netdev_priv(dev); 623 void __iomem *ioaddr = np->ioaddr; 624 625 /* Disable interrupts */ 626 dw16(IntEnable, 0); 627 628 /* Stop Tx and Rx logics */ 629 dw32(MACCtrl, TxDisable | RxDisable | StatsDisable); 630 } 631 632 static int rio_open(struct net_device *dev) 633 { 634 struct netdev_private *np = netdev_priv(dev); 635 const int irq = np->pdev->irq; 636 int i; 637 638 i = alloc_list(dev); 639 if (i) 640 return i; 641 642 rio_hw_init(dev); 643 644 i = request_irq(irq, rio_interrupt, IRQF_SHARED, dev->name, dev); 645 if (i) { 646 rio_hw_stop(dev); 647 free_list(dev); 648 return i; 649 } 650 651 timer_setup(&np->timer, rio_timer, 0); 652 np->timer.expires = jiffies + 1 * HZ; 653 add_timer(&np->timer); 654 655 netif_start_queue (dev); 656 657 dl2k_enable_int(np); 658 return 0; 659 } 660 661 static void 662 rio_timer (struct timer_list *t) 663 { 664 struct netdev_private *np = timer_container_of(np, t, timer); 665 struct net_device *dev = pci_get_drvdata(np->pdev); 666 unsigned int entry; 667 int next_tick = 1*HZ; 668 unsigned long flags; 669 670 spin_lock_irqsave(&np->rx_lock, flags); 671 /* Recover rx ring exhausted error */ 672 if (np->cur_rx - np->old_rx >= RX_RING_SIZE) { 673 printk(KERN_INFO "Try to recover rx ring exhausted...\n"); 674 /* Re-allocate skbuffs to fill the descriptor ring */ 675 for (; np->cur_rx - np->old_rx > 0; np->old_rx++) { 676 struct sk_buff *skb; 677 entry = np->old_rx % RX_RING_SIZE; 678 /* Dropped packets don't need to re-allocate */ 679 if (np->rx_skbuff[entry] == NULL) { 680 skb = netdev_alloc_skb_ip_align(dev, 681 np->rx_buf_sz); 682 if (skb == NULL) { 683 np->rx_ring[entry].fraginfo = 0; 684 printk (KERN_INFO 685 "%s: Still unable to re-allocate Rx skbuff.#%d\n", 686 dev->name, entry); 687 break; 688 } 689 np->rx_skbuff[entry] = skb; 690 np->rx_ring[entry].fraginfo = 691 cpu_to_le64 (dma_map_single(&np->pdev->dev, skb->data, 692 np->rx_buf_sz, DMA_FROM_DEVICE)); 693 } 694 np->rx_ring[entry].fraginfo |= 695 cpu_to_le64((u64)np->rx_buf_sz << 48); 696 np->rx_ring[entry].status = 0; 697 } /* end for */ 698 } /* end if */ 699 spin_unlock_irqrestore (&np->rx_lock, flags); 700 np->timer.expires = jiffies + next_tick; 701 add_timer(&np->timer); 702 } 703 704 static void 705 rio_tx_timeout (struct net_device *dev, unsigned int txqueue) 706 { 707 struct netdev_private *np = netdev_priv(dev); 708 void __iomem *ioaddr = np->ioaddr; 709 710 printk (KERN_INFO "%s: Tx timed out (%4.4x), is buffer full?\n", 711 dev->name, dr32(TxStatus)); 712 rio_free_tx(dev, 0); 713 dev->if_port = 0; 714 netif_trans_update(dev); /* prevent tx timeout */ 715 } 716 717 static netdev_tx_t 718 start_xmit (struct sk_buff *skb, struct net_device *dev) 719 { 720 struct netdev_private *np = netdev_priv(dev); 721 void __iomem *ioaddr = np->ioaddr; 722 struct netdev_desc *txdesc; 723 unsigned entry; 724 u64 tfc_vlan_tag = 0; 725 726 if (np->link_status == 0) { /* Link Down */ 727 dev_kfree_skb(skb); 728 return NETDEV_TX_OK; 729 } 730 entry = np->cur_tx % TX_RING_SIZE; 731 np->tx_skbuff[entry] = skb; 732 txdesc = &np->tx_ring[entry]; 733 734 #if 0 735 if (skb->ip_summed == CHECKSUM_PARTIAL) { 736 txdesc->status |= 737 cpu_to_le64 (TCPChecksumEnable | UDPChecksumEnable | 738 IPChecksumEnable); 739 } 740 #endif 741 if (np->vlan) { 742 tfc_vlan_tag = VLANTagInsert | 743 ((u64)np->vlan << 32) | 744 ((u64)skb->priority << 45); 745 } 746 txdesc->fraginfo = cpu_to_le64 (dma_map_single(&np->pdev->dev, skb->data, 747 skb->len, DMA_TO_DEVICE)); 748 txdesc->fraginfo |= cpu_to_le64((u64)skb->len << 48); 749 750 /* DL2K bug: DMA fails to get next descriptor ptr in 10Mbps mode 751 * Work around: Always use 1 descriptor in 10Mbps mode */ 752 if (entry % np->tx_coalesce == 0 || np->speed == 10) 753 txdesc->status = cpu_to_le64 (entry | tfc_vlan_tag | 754 WordAlignDisable | 755 TxDMAIndicate | 756 (1 << FragCountShift)); 757 else 758 txdesc->status = cpu_to_le64 (entry | tfc_vlan_tag | 759 WordAlignDisable | 760 (1 << FragCountShift)); 761 762 /* TxDMAPollNow */ 763 dw32(DMACtrl, dr32(DMACtrl) | 0x00001000); 764 /* Schedule ISR */ 765 dw32(CountDown, 10000); 766 np->cur_tx = (np->cur_tx + 1) % TX_RING_SIZE; 767 if ((np->cur_tx - np->old_tx + TX_RING_SIZE) % TX_RING_SIZE 768 < TX_QUEUE_LEN - 1 && np->speed != 10) { 769 /* do nothing */ 770 } else if (!netif_queue_stopped(dev)) { 771 netif_stop_queue (dev); 772 } 773 774 /* The first TFDListPtr */ 775 if (!dr32(TFDListPtr0)) { 776 dw32(TFDListPtr0, np->tx_ring_dma + 777 entry * sizeof (struct netdev_desc)); 778 dw32(TFDListPtr1, 0); 779 } 780 781 return NETDEV_TX_OK; 782 } 783 784 static irqreturn_t 785 rio_interrupt (int irq, void *dev_instance) 786 { 787 struct net_device *dev = dev_instance; 788 struct netdev_private *np = netdev_priv(dev); 789 void __iomem *ioaddr = np->ioaddr; 790 unsigned int_status; 791 int cnt = max_intrloop; 792 int handled = 0; 793 794 while (1) { 795 int_status = dr16(IntStatus); 796 dw16(IntStatus, int_status); 797 int_status &= DEFAULT_INTR; 798 if (int_status == 0 || --cnt < 0) 799 break; 800 handled = 1; 801 /* Processing received packets */ 802 if (int_status & RxDMAComplete) 803 receive_packet (dev); 804 /* TxDMAComplete interrupt */ 805 if ((int_status & (TxDMAComplete|IntRequested))) { 806 int tx_status; 807 tx_status = dr32(TxStatus); 808 if (tx_status & 0x01) 809 tx_error (dev, tx_status); 810 /* Free used tx skbuffs */ 811 rio_free_tx (dev, 1); 812 } 813 814 /* Handle uncommon events */ 815 if (int_status & 816 (HostError | LinkEvent | UpdateStats)) 817 rio_error (dev, int_status); 818 } 819 if (np->cur_tx != np->old_tx) 820 dw32(CountDown, 100); 821 return IRQ_RETVAL(handled); 822 } 823 824 static void 825 rio_free_tx (struct net_device *dev, int irq) 826 { 827 struct netdev_private *np = netdev_priv(dev); 828 int entry = np->old_tx % TX_RING_SIZE; 829 unsigned long flag = 0; 830 831 if (irq) 832 spin_lock(&np->tx_lock); 833 else 834 spin_lock_irqsave(&np->tx_lock, flag); 835 836 /* Free used tx skbuffs */ 837 while (entry != np->cur_tx) { 838 struct sk_buff *skb; 839 840 if (!(np->tx_ring[entry].status & cpu_to_le64(TFDDone))) 841 break; 842 skb = np->tx_skbuff[entry]; 843 dma_unmap_single(&np->pdev->dev, 844 desc_to_dma(&np->tx_ring[entry]), skb->len, 845 DMA_TO_DEVICE); 846 if (irq) 847 dev_consume_skb_irq(skb); 848 else 849 dev_kfree_skb(skb); 850 851 np->tx_skbuff[entry] = NULL; 852 entry = (entry + 1) % TX_RING_SIZE; 853 } 854 if (irq) 855 spin_unlock(&np->tx_lock); 856 else 857 spin_unlock_irqrestore(&np->tx_lock, flag); 858 np->old_tx = entry; 859 860 /* If the ring is no longer full, clear tx_full and 861 call netif_wake_queue() */ 862 863 if (netif_queue_stopped(dev) && 864 ((np->cur_tx - np->old_tx + TX_RING_SIZE) % TX_RING_SIZE 865 < TX_QUEUE_LEN - 1 || np->speed == 10)) { 866 netif_wake_queue (dev); 867 } 868 } 869 870 static void 871 tx_error (struct net_device *dev, int tx_status) 872 { 873 struct netdev_private *np = netdev_priv(dev); 874 void __iomem *ioaddr = np->ioaddr; 875 int frame_id; 876 int i; 877 878 frame_id = (tx_status & 0xffff0000); 879 printk (KERN_ERR "%s: Transmit error, TxStatus %4.4x, FrameId %d.\n", 880 dev->name, tx_status, frame_id); 881 /* Ttransmit Underrun */ 882 if (tx_status & 0x10) { 883 dev->stats.tx_fifo_errors++; 884 dw16(TxStartThresh, dr16(TxStartThresh) + 0x10); 885 /* Transmit Underrun need to set TxReset, DMARest, FIFOReset */ 886 dw16(ASICCtrl + 2, 887 TxReset | DMAReset | FIFOReset | NetworkReset); 888 /* Wait for ResetBusy bit clear */ 889 for (i = 50; i > 0; i--) { 890 if (!(dr16(ASICCtrl + 2) & ResetBusy)) 891 break; 892 mdelay (1); 893 } 894 rio_set_led_mode(dev); 895 rio_free_tx (dev, 1); 896 /* Reset TFDListPtr */ 897 dw32(TFDListPtr0, np->tx_ring_dma + 898 np->old_tx * sizeof (struct netdev_desc)); 899 dw32(TFDListPtr1, 0); 900 901 /* Let TxStartThresh stay default value */ 902 } 903 /* Late Collision */ 904 if (tx_status & 0x04) { 905 dev->stats.tx_fifo_errors++; 906 /* TxReset and clear FIFO */ 907 dw16(ASICCtrl + 2, TxReset | FIFOReset); 908 /* Wait reset done */ 909 for (i = 50; i > 0; i--) { 910 if (!(dr16(ASICCtrl + 2) & ResetBusy)) 911 break; 912 mdelay (1); 913 } 914 rio_set_led_mode(dev); 915 /* Let TxStartThresh stay default value */ 916 } 917 918 spin_lock(&np->stats_lock); 919 /* Maximum Collisions */ 920 if (tx_status & 0x08) 921 dev->stats.collisions++; 922 923 dev->stats.tx_errors++; 924 spin_unlock(&np->stats_lock); 925 926 /* Restart the Tx */ 927 dw32(MACCtrl, dr16(MACCtrl) | TxEnable); 928 } 929 930 static int 931 receive_packet (struct net_device *dev) 932 { 933 struct netdev_private *np = netdev_priv(dev); 934 int entry = np->cur_rx % RX_RING_SIZE; 935 int cnt = 30; 936 937 /* If RFDDone, FrameStart and FrameEnd set, there is a new packet in. */ 938 while (1) { 939 struct netdev_desc *desc = &np->rx_ring[entry]; 940 int pkt_len; 941 u64 frame_status; 942 943 if (!(desc->status & cpu_to_le64(RFDDone)) || 944 !(desc->status & cpu_to_le64(FrameStart)) || 945 !(desc->status & cpu_to_le64(FrameEnd))) 946 break; 947 948 /* Chip omits the CRC. */ 949 frame_status = le64_to_cpu(desc->status); 950 pkt_len = frame_status & 0xffff; 951 if (--cnt < 0) 952 break; 953 /* Update rx error statistics, drop packet. */ 954 if (frame_status & RFS_Errors) { 955 dev->stats.rx_errors++; 956 if (frame_status & (RxRuntFrame | RxLengthError)) 957 dev->stats.rx_length_errors++; 958 if (frame_status & RxFCSError) 959 dev->stats.rx_crc_errors++; 960 if (frame_status & RxAlignmentError && np->speed != 1000) 961 dev->stats.rx_frame_errors++; 962 if (frame_status & RxFIFOOverrun) 963 dev->stats.rx_fifo_errors++; 964 } else { 965 struct sk_buff *skb; 966 967 /* Small skbuffs for short packets */ 968 if (pkt_len > copy_thresh) { 969 dma_unmap_single(&np->pdev->dev, 970 desc_to_dma(desc), 971 np->rx_buf_sz, 972 DMA_FROM_DEVICE); 973 skb_put (skb = np->rx_skbuff[entry], pkt_len); 974 np->rx_skbuff[entry] = NULL; 975 } else if ((skb = netdev_alloc_skb_ip_align(dev, pkt_len))) { 976 dma_sync_single_for_cpu(&np->pdev->dev, 977 desc_to_dma(desc), 978 np->rx_buf_sz, 979 DMA_FROM_DEVICE); 980 skb_copy_to_linear_data (skb, 981 np->rx_skbuff[entry]->data, 982 pkt_len); 983 skb_put (skb, pkt_len); 984 dma_sync_single_for_device(&np->pdev->dev, 985 desc_to_dma(desc), 986 np->rx_buf_sz, 987 DMA_FROM_DEVICE); 988 } 989 skb->protocol = eth_type_trans (skb, dev); 990 #if 0 991 /* Checksum done by hw, but csum value unavailable. */ 992 if (np->pdev->pci_rev_id >= 0x0c && 993 !(frame_status & (TCPError | UDPError | IPError))) { 994 skb->ip_summed = CHECKSUM_UNNECESSARY; 995 } 996 #endif 997 netif_rx (skb); 998 } 999 entry = (entry + 1) % RX_RING_SIZE; 1000 } 1001 spin_lock(&np->rx_lock); 1002 np->cur_rx = entry; 1003 /* Re-allocate skbuffs to fill the descriptor ring */ 1004 entry = np->old_rx; 1005 while (entry != np->cur_rx) { 1006 struct sk_buff *skb; 1007 /* Dropped packets don't need to re-allocate */ 1008 if (np->rx_skbuff[entry] == NULL) { 1009 skb = netdev_alloc_skb_ip_align(dev, np->rx_buf_sz); 1010 if (skb == NULL) { 1011 np->rx_ring[entry].fraginfo = 0; 1012 printk (KERN_INFO 1013 "%s: receive_packet: " 1014 "Unable to re-allocate Rx skbuff.#%d\n", 1015 dev->name, entry); 1016 break; 1017 } 1018 np->rx_skbuff[entry] = skb; 1019 np->rx_ring[entry].fraginfo = 1020 cpu_to_le64(dma_map_single(&np->pdev->dev, skb->data, 1021 np->rx_buf_sz, DMA_FROM_DEVICE)); 1022 } 1023 np->rx_ring[entry].fraginfo |= 1024 cpu_to_le64((u64)np->rx_buf_sz << 48); 1025 np->rx_ring[entry].status = 0; 1026 entry = (entry + 1) % RX_RING_SIZE; 1027 } 1028 np->old_rx = entry; 1029 spin_unlock(&np->rx_lock); 1030 return 0; 1031 } 1032 1033 static void 1034 rio_error (struct net_device *dev, int int_status) 1035 { 1036 struct netdev_private *np = netdev_priv(dev); 1037 void __iomem *ioaddr = np->ioaddr; 1038 u16 macctrl; 1039 1040 /* Link change event */ 1041 if (int_status & LinkEvent) { 1042 if (mii_wait_link (dev, 10) == 0) { 1043 printk (KERN_INFO "%s: Link up\n", dev->name); 1044 if (np->phy_media) 1045 mii_get_media_pcs (dev); 1046 else 1047 mii_get_media (dev); 1048 if (np->speed == 1000) 1049 np->tx_coalesce = tx_coalesce; 1050 else 1051 np->tx_coalesce = 1; 1052 macctrl = 0; 1053 macctrl |= (np->vlan) ? AutoVLANuntagging : 0; 1054 macctrl |= (np->full_duplex) ? DuplexSelect : 0; 1055 macctrl |= (np->tx_flow) ? 1056 TxFlowControlEnable : 0; 1057 macctrl |= (np->rx_flow) ? 1058 RxFlowControlEnable : 0; 1059 dw16(MACCtrl, macctrl); 1060 np->link_status = 1; 1061 netif_carrier_on(dev); 1062 } else { 1063 printk (KERN_INFO "%s: Link off\n", dev->name); 1064 np->link_status = 0; 1065 netif_carrier_off(dev); 1066 } 1067 } 1068 1069 /* UpdateStats statistics registers */ 1070 if (int_status & UpdateStats) { 1071 get_stats (dev); 1072 } 1073 1074 /* PCI Error, a catastronphic error related to the bus interface 1075 occurs, set GlobalReset and HostReset to reset. */ 1076 if (int_status & HostError) { 1077 printk (KERN_ERR "%s: HostError! IntStatus %4.4x.\n", 1078 dev->name, int_status); 1079 dw16(ASICCtrl + 2, GlobalReset | HostReset); 1080 mdelay (500); 1081 rio_set_led_mode(dev); 1082 } 1083 } 1084 1085 static struct net_device_stats * 1086 get_stats (struct net_device *dev) 1087 { 1088 struct netdev_private *np = netdev_priv(dev); 1089 void __iomem *ioaddr = np->ioaddr; 1090 unsigned int stat_reg; 1091 unsigned long flags; 1092 1093 spin_lock_irqsave(&np->stats_lock, flags); 1094 /* All statistics registers need to be acknowledged, 1095 else statistic overflow could cause problems */ 1096 1097 dev->stats.rx_packets += dr32(FramesRcvOk); 1098 dev->stats.tx_packets += dr32(FramesXmtOk); 1099 dev->stats.rx_bytes += dr32(OctetRcvOk); 1100 dev->stats.tx_bytes += dr32(OctetXmtOk); 1101 1102 dev->stats.multicast += dr32(McstFramesRcvdOk); 1103 dev->stats.collisions += dr32(SingleColFrames) 1104 + dr32(MultiColFrames); 1105 1106 /* detailed tx errors */ 1107 stat_reg = dr16(FramesAbortXSColls); 1108 dev->stats.tx_aborted_errors += stat_reg; 1109 dev->stats.tx_errors += stat_reg; 1110 1111 stat_reg = dr16(CarrierSenseErrors); 1112 dev->stats.tx_carrier_errors += stat_reg; 1113 dev->stats.tx_errors += stat_reg; 1114 1115 /* Clear all other statistic register. */ 1116 dr32(McstOctetXmtOk); 1117 dr16(BcstFramesXmtdOk); 1118 dr32(McstFramesXmtdOk); 1119 dr16(BcstFramesRcvdOk); 1120 dr16(MacControlFramesRcvd); 1121 dr16(FrameTooLongErrors); 1122 dr16(InRangeLengthErrors); 1123 dr16(FramesCheckSeqErrors); 1124 dr16(FramesLostRxErrors); 1125 dr32(McstOctetXmtOk); 1126 dr32(BcstOctetXmtOk); 1127 dr32(McstFramesXmtdOk); 1128 dr32(FramesWDeferredXmt); 1129 dr32(LateCollisions); 1130 dr16(BcstFramesXmtdOk); 1131 dr16(MacControlFramesXmtd); 1132 dr16(FramesWEXDeferal); 1133 1134 if (np->rmon_enable) 1135 for (int i = 0x100; i <= 0x150; i += 4) 1136 dr32(i); 1137 1138 dr16(TxJumboFrames); 1139 dr16(RxJumboFrames); 1140 dr16(TCPCheckSumErrors); 1141 dr16(UDPCheckSumErrors); 1142 dr16(IPCheckSumErrors); 1143 1144 spin_unlock_irqrestore(&np->stats_lock, flags); 1145 1146 return &dev->stats; 1147 } 1148 1149 static int 1150 clear_stats (struct net_device *dev) 1151 { 1152 struct netdev_private *np = netdev_priv(dev); 1153 void __iomem *ioaddr = np->ioaddr; 1154 1155 /* All statistics registers need to be acknowledged, 1156 else statistic overflow could cause problems */ 1157 dr32(FramesRcvOk); 1158 dr32(FramesXmtOk); 1159 dr32(OctetRcvOk); 1160 dr32(OctetXmtOk); 1161 1162 dr32(McstFramesRcvdOk); 1163 dr32(SingleColFrames); 1164 dr32(MultiColFrames); 1165 dr32(LateCollisions); 1166 /* detailed rx errors */ 1167 dr16(FrameTooLongErrors); 1168 dr16(InRangeLengthErrors); 1169 dr16(FramesCheckSeqErrors); 1170 dr16(FramesLostRxErrors); 1171 1172 /* detailed tx errors */ 1173 dr16(FramesAbortXSColls); 1174 dr16(CarrierSenseErrors); 1175 1176 /* Clear all other statistic register. */ 1177 dr32(McstOctetXmtOk); 1178 dr16(BcstFramesXmtdOk); 1179 dr32(McstFramesXmtdOk); 1180 dr16(BcstFramesRcvdOk); 1181 dr16(MacControlFramesRcvd); 1182 dr32(McstOctetXmtOk); 1183 dr32(BcstOctetXmtOk); 1184 dr32(McstFramesXmtdOk); 1185 dr32(FramesWDeferredXmt); 1186 dr16(BcstFramesXmtdOk); 1187 dr16(MacControlFramesXmtd); 1188 dr16(FramesWEXDeferal); 1189 if (np->rmon_enable) 1190 for (int i = 0x100; i <= 0x150; i += 4) 1191 dr32(i); 1192 dr16(TxJumboFrames); 1193 dr16(RxJumboFrames); 1194 dr16(TCPCheckSumErrors); 1195 dr16(UDPCheckSumErrors); 1196 dr16(IPCheckSumErrors); 1197 return 0; 1198 } 1199 1200 static void 1201 set_multicast (struct net_device *dev) 1202 { 1203 struct netdev_private *np = netdev_priv(dev); 1204 void __iomem *ioaddr = np->ioaddr; 1205 u32 hash_table[2]; 1206 u16 rx_mode = 0; 1207 1208 hash_table[0] = hash_table[1] = 0; 1209 /* RxFlowcontrol DA: 01-80-C2-00-00-01. Hash index=0x39 */ 1210 hash_table[1] |= 0x02000000; 1211 if (dev->flags & IFF_PROMISC) { 1212 /* Receive all frames promiscuously. */ 1213 rx_mode = ReceiveAllFrames; 1214 } else if ((dev->flags & IFF_ALLMULTI) || 1215 (netdev_mc_count(dev) > multicast_filter_limit)) { 1216 /* Receive broadcast and multicast frames */ 1217 rx_mode = ReceiveBroadcast | ReceiveMulticast | ReceiveUnicast; 1218 } else if (!netdev_mc_empty(dev)) { 1219 struct netdev_hw_addr *ha; 1220 /* Receive broadcast frames and multicast frames filtering 1221 by Hashtable */ 1222 rx_mode = 1223 ReceiveBroadcast | ReceiveMulticastHash | ReceiveUnicast; 1224 netdev_for_each_mc_addr(ha, dev) { 1225 int bit, index = 0; 1226 int crc = ether_crc_le(ETH_ALEN, ha->addr); 1227 /* The inverted high significant 6 bits of CRC are 1228 used as an index to hashtable */ 1229 for (bit = 0; bit < 6; bit++) 1230 if (crc & (1 << (31 - bit))) 1231 index |= (1 << bit); 1232 hash_table[index / 32] |= (1 << (index % 32)); 1233 } 1234 } else { 1235 rx_mode = ReceiveBroadcast | ReceiveUnicast; 1236 } 1237 if (np->vlan) { 1238 /* ReceiveVLANMatch field in ReceiveMode */ 1239 rx_mode |= ReceiveVLANMatch; 1240 } 1241 1242 dw32(HashTable0, hash_table[0]); 1243 dw32(HashTable1, hash_table[1]); 1244 dw16(ReceiveMode, rx_mode); 1245 } 1246 1247 static void rio_get_drvinfo(struct net_device *dev, struct ethtool_drvinfo *info) 1248 { 1249 struct netdev_private *np = netdev_priv(dev); 1250 1251 strscpy(info->driver, "dl2k", sizeof(info->driver)); 1252 strscpy(info->bus_info, pci_name(np->pdev), sizeof(info->bus_info)); 1253 } 1254 1255 static int rio_get_link_ksettings(struct net_device *dev, 1256 struct ethtool_link_ksettings *cmd) 1257 { 1258 struct netdev_private *np = netdev_priv(dev); 1259 u32 supported, advertising; 1260 1261 if (np->phy_media) { 1262 /* fiber device */ 1263 supported = SUPPORTED_Autoneg | SUPPORTED_FIBRE; 1264 advertising = ADVERTISED_Autoneg | ADVERTISED_FIBRE; 1265 cmd->base.port = PORT_FIBRE; 1266 } else { 1267 /* copper device */ 1268 supported = SUPPORTED_10baseT_Half | 1269 SUPPORTED_10baseT_Full | SUPPORTED_100baseT_Half 1270 | SUPPORTED_100baseT_Full | SUPPORTED_1000baseT_Full | 1271 SUPPORTED_Autoneg | SUPPORTED_MII; 1272 advertising = ADVERTISED_10baseT_Half | 1273 ADVERTISED_10baseT_Full | ADVERTISED_100baseT_Half | 1274 ADVERTISED_100baseT_Full | ADVERTISED_1000baseT_Full | 1275 ADVERTISED_Autoneg | ADVERTISED_MII; 1276 cmd->base.port = PORT_MII; 1277 } 1278 if (np->link_status) { 1279 cmd->base.speed = np->speed; 1280 cmd->base.duplex = np->full_duplex ? DUPLEX_FULL : DUPLEX_HALF; 1281 } else { 1282 cmd->base.speed = SPEED_UNKNOWN; 1283 cmd->base.duplex = DUPLEX_UNKNOWN; 1284 } 1285 if (np->an_enable) 1286 cmd->base.autoneg = AUTONEG_ENABLE; 1287 else 1288 cmd->base.autoneg = AUTONEG_DISABLE; 1289 1290 cmd->base.phy_address = np->phy_addr; 1291 1292 ethtool_convert_legacy_u32_to_link_mode(cmd->link_modes.supported, 1293 supported); 1294 ethtool_convert_legacy_u32_to_link_mode(cmd->link_modes.advertising, 1295 advertising); 1296 1297 return 0; 1298 } 1299 1300 static int rio_set_link_ksettings(struct net_device *dev, 1301 const struct ethtool_link_ksettings *cmd) 1302 { 1303 struct netdev_private *np = netdev_priv(dev); 1304 u32 speed = cmd->base.speed; 1305 u8 duplex = cmd->base.duplex; 1306 1307 netif_carrier_off(dev); 1308 if (cmd->base.autoneg == AUTONEG_ENABLE) { 1309 if (np->an_enable) { 1310 return 0; 1311 } else { 1312 np->an_enable = 1; 1313 mii_set_media(dev); 1314 return 0; 1315 } 1316 } else { 1317 np->an_enable = 0; 1318 if (np->speed == 1000) { 1319 speed = SPEED_100; 1320 duplex = DUPLEX_FULL; 1321 printk("Warning!! Can't disable Auto negotiation in 1000Mbps, change to Manual 100Mbps, Full duplex.\n"); 1322 } 1323 switch (speed) { 1324 case SPEED_10: 1325 np->speed = 10; 1326 np->full_duplex = (duplex == DUPLEX_FULL); 1327 break; 1328 case SPEED_100: 1329 np->speed = 100; 1330 np->full_duplex = (duplex == DUPLEX_FULL); 1331 break; 1332 case SPEED_1000: /* not supported */ 1333 default: 1334 return -EINVAL; 1335 } 1336 mii_set_media(dev); 1337 } 1338 return 0; 1339 } 1340 1341 static u32 rio_get_link(struct net_device *dev) 1342 { 1343 struct netdev_private *np = netdev_priv(dev); 1344 return np->link_status; 1345 } 1346 1347 static const struct ethtool_ops ethtool_ops = { 1348 .get_drvinfo = rio_get_drvinfo, 1349 .get_link = rio_get_link, 1350 .get_link_ksettings = rio_get_link_ksettings, 1351 .set_link_ksettings = rio_set_link_ksettings, 1352 }; 1353 1354 static int 1355 rio_ioctl (struct net_device *dev, struct ifreq *rq, int cmd) 1356 { 1357 int phy_addr; 1358 struct netdev_private *np = netdev_priv(dev); 1359 struct mii_ioctl_data *miidata = if_mii(rq); 1360 1361 phy_addr = np->phy_addr; 1362 switch (cmd) { 1363 case SIOCGMIIPHY: 1364 miidata->phy_id = phy_addr; 1365 break; 1366 case SIOCGMIIREG: 1367 miidata->val_out = mii_read (dev, phy_addr, miidata->reg_num); 1368 break; 1369 case SIOCSMIIREG: 1370 if (!capable(CAP_NET_ADMIN)) 1371 return -EPERM; 1372 mii_write (dev, phy_addr, miidata->reg_num, miidata->val_in); 1373 break; 1374 default: 1375 return -EOPNOTSUPP; 1376 } 1377 return 0; 1378 } 1379 1380 #define EEP_READ 0x0200 1381 #define EEP_BUSY 0x8000 1382 /* Read the EEPROM word */ 1383 /* We use I/O instruction to read/write eeprom to avoid fail on some machines */ 1384 static int read_eeprom(struct netdev_private *np, int eep_addr) 1385 { 1386 void __iomem *ioaddr = np->eeprom_addr; 1387 int i = 1000; 1388 1389 dw16(EepromCtrl, EEP_READ | (eep_addr & 0xff)); 1390 while (i-- > 0) { 1391 if (!(dr16(EepromCtrl) & EEP_BUSY)) 1392 return dr16(EepromData); 1393 } 1394 return 0; 1395 } 1396 1397 enum phy_ctrl_bits { 1398 MII_READ = 0x00, MII_CLK = 0x01, MII_DATA1 = 0x02, MII_WRITE = 0x04, 1399 MII_DUPLEX = 0x08, 1400 }; 1401 1402 #define mii_delay() dr8(PhyCtrl) 1403 static void 1404 mii_sendbit (struct net_device *dev, u32 data) 1405 { 1406 struct netdev_private *np = netdev_priv(dev); 1407 void __iomem *ioaddr = np->ioaddr; 1408 1409 data = ((data) ? MII_DATA1 : 0) | (dr8(PhyCtrl) & 0xf8) | MII_WRITE; 1410 dw8(PhyCtrl, data); 1411 mii_delay (); 1412 dw8(PhyCtrl, data | MII_CLK); 1413 mii_delay (); 1414 } 1415 1416 static int 1417 mii_getbit (struct net_device *dev) 1418 { 1419 struct netdev_private *np = netdev_priv(dev); 1420 void __iomem *ioaddr = np->ioaddr; 1421 u8 data; 1422 1423 data = (dr8(PhyCtrl) & 0xf8) | MII_READ; 1424 dw8(PhyCtrl, data); 1425 mii_delay (); 1426 dw8(PhyCtrl, data | MII_CLK); 1427 mii_delay (); 1428 return (dr8(PhyCtrl) >> 1) & 1; 1429 } 1430 1431 static void 1432 mii_send_bits (struct net_device *dev, u32 data, int len) 1433 { 1434 int i; 1435 1436 for (i = len - 1; i >= 0; i--) { 1437 mii_sendbit (dev, data & (1 << i)); 1438 } 1439 } 1440 1441 static int 1442 mii_read (struct net_device *dev, int phy_addr, int reg_num) 1443 { 1444 u32 cmd; 1445 int i; 1446 u32 retval = 0; 1447 1448 /* Preamble */ 1449 mii_send_bits (dev, 0xffffffff, 32); 1450 /* ST(2), OP(2), ADDR(5), REG#(5), TA(2), Data(16) total 32 bits */ 1451 /* ST,OP = 0110'b for read operation */ 1452 cmd = (0x06 << 10 | phy_addr << 5 | reg_num); 1453 mii_send_bits (dev, cmd, 14); 1454 /* Turnaround */ 1455 if (mii_getbit (dev)) 1456 goto err_out; 1457 /* Read data */ 1458 for (i = 0; i < 16; i++) { 1459 retval |= mii_getbit (dev); 1460 retval <<= 1; 1461 } 1462 /* End cycle */ 1463 mii_getbit (dev); 1464 return (retval >> 1) & 0xffff; 1465 1466 err_out: 1467 return 0; 1468 } 1469 static int 1470 mii_write (struct net_device *dev, int phy_addr, int reg_num, u16 data) 1471 { 1472 u32 cmd; 1473 1474 /* Preamble */ 1475 mii_send_bits (dev, 0xffffffff, 32); 1476 /* ST(2), OP(2), ADDR(5), REG#(5), TA(2), Data(16) total 32 bits */ 1477 /* ST,OP,AAAAA,RRRRR,TA = 0101xxxxxxxxxx10'b = 0x5002 for write */ 1478 cmd = (0x5002 << 16) | (phy_addr << 23) | (reg_num << 18) | data; 1479 mii_send_bits (dev, cmd, 32); 1480 /* End cycle */ 1481 mii_getbit (dev); 1482 return 0; 1483 } 1484 static int 1485 mii_wait_link (struct net_device *dev, int wait) 1486 { 1487 __u16 bmsr; 1488 int phy_addr; 1489 struct netdev_private *np; 1490 1491 np = netdev_priv(dev); 1492 phy_addr = np->phy_addr; 1493 1494 do { 1495 bmsr = mii_read (dev, phy_addr, MII_BMSR); 1496 if (bmsr & BMSR_LSTATUS) 1497 return 0; 1498 mdelay (1); 1499 } while (--wait > 0); 1500 return -1; 1501 } 1502 static int 1503 mii_get_media (struct net_device *dev) 1504 { 1505 __u16 negotiate; 1506 __u16 bmsr; 1507 __u16 mscr; 1508 __u16 mssr; 1509 int phy_addr; 1510 struct netdev_private *np; 1511 1512 np = netdev_priv(dev); 1513 phy_addr = np->phy_addr; 1514 1515 bmsr = mii_read (dev, phy_addr, MII_BMSR); 1516 if (np->an_enable) { 1517 if (!(bmsr & BMSR_ANEGCOMPLETE)) { 1518 /* Auto-Negotiation not completed */ 1519 return -1; 1520 } 1521 negotiate = mii_read (dev, phy_addr, MII_ADVERTISE) & 1522 mii_read (dev, phy_addr, MII_LPA); 1523 mscr = mii_read (dev, phy_addr, MII_CTRL1000); 1524 mssr = mii_read (dev, phy_addr, MII_STAT1000); 1525 if (mscr & ADVERTISE_1000FULL && mssr & LPA_1000FULL) { 1526 np->speed = 1000; 1527 np->full_duplex = 1; 1528 printk (KERN_INFO "Auto 1000 Mbps, Full duplex\n"); 1529 } else if (mscr & ADVERTISE_1000HALF && mssr & LPA_1000HALF) { 1530 np->speed = 1000; 1531 np->full_duplex = 0; 1532 printk (KERN_INFO "Auto 1000 Mbps, Half duplex\n"); 1533 } else if (negotiate & ADVERTISE_100FULL) { 1534 np->speed = 100; 1535 np->full_duplex = 1; 1536 printk (KERN_INFO "Auto 100 Mbps, Full duplex\n"); 1537 } else if (negotiate & ADVERTISE_100HALF) { 1538 np->speed = 100; 1539 np->full_duplex = 0; 1540 printk (KERN_INFO "Auto 100 Mbps, Half duplex\n"); 1541 } else if (negotiate & ADVERTISE_10FULL) { 1542 np->speed = 10; 1543 np->full_duplex = 1; 1544 printk (KERN_INFO "Auto 10 Mbps, Full duplex\n"); 1545 } else if (negotiate & ADVERTISE_10HALF) { 1546 np->speed = 10; 1547 np->full_duplex = 0; 1548 printk (KERN_INFO "Auto 10 Mbps, Half duplex\n"); 1549 } 1550 if (negotiate & ADVERTISE_PAUSE_CAP) { 1551 np->tx_flow &= 1; 1552 np->rx_flow &= 1; 1553 } else if (negotiate & ADVERTISE_PAUSE_ASYM) { 1554 np->tx_flow = 0; 1555 np->rx_flow &= 1; 1556 } 1557 /* else tx_flow, rx_flow = user select */ 1558 } else { 1559 __u16 bmcr = mii_read (dev, phy_addr, MII_BMCR); 1560 switch (bmcr & (BMCR_SPEED100 | BMCR_SPEED1000)) { 1561 case BMCR_SPEED1000: 1562 printk (KERN_INFO "Operating at 1000 Mbps, "); 1563 break; 1564 case BMCR_SPEED100: 1565 printk (KERN_INFO "Operating at 100 Mbps, "); 1566 break; 1567 case 0: 1568 printk (KERN_INFO "Operating at 10 Mbps, "); 1569 } 1570 if (bmcr & BMCR_FULLDPLX) { 1571 printk (KERN_CONT "Full duplex\n"); 1572 } else { 1573 printk (KERN_CONT "Half duplex\n"); 1574 } 1575 } 1576 if (np->tx_flow) 1577 printk(KERN_INFO "Enable Tx Flow Control\n"); 1578 else 1579 printk(KERN_INFO "Disable Tx Flow Control\n"); 1580 if (np->rx_flow) 1581 printk(KERN_INFO "Enable Rx Flow Control\n"); 1582 else 1583 printk(KERN_INFO "Disable Rx Flow Control\n"); 1584 1585 return 0; 1586 } 1587 1588 static int 1589 mii_set_media (struct net_device *dev) 1590 { 1591 __u16 pscr; 1592 __u16 bmcr; 1593 __u16 bmsr; 1594 __u16 anar; 1595 int phy_addr; 1596 struct netdev_private *np; 1597 np = netdev_priv(dev); 1598 phy_addr = np->phy_addr; 1599 1600 /* Does user set speed? */ 1601 if (np->an_enable) { 1602 /* Advertise capabilities */ 1603 bmsr = mii_read (dev, phy_addr, MII_BMSR); 1604 anar = mii_read (dev, phy_addr, MII_ADVERTISE) & 1605 ~(ADVERTISE_100FULL | ADVERTISE_10FULL | 1606 ADVERTISE_100HALF | ADVERTISE_10HALF | 1607 ADVERTISE_100BASE4); 1608 if (bmsr & BMSR_100FULL) 1609 anar |= ADVERTISE_100FULL; 1610 if (bmsr & BMSR_100HALF) 1611 anar |= ADVERTISE_100HALF; 1612 if (bmsr & BMSR_100BASE4) 1613 anar |= ADVERTISE_100BASE4; 1614 if (bmsr & BMSR_10FULL) 1615 anar |= ADVERTISE_10FULL; 1616 if (bmsr & BMSR_10HALF) 1617 anar |= ADVERTISE_10HALF; 1618 anar |= ADVERTISE_PAUSE_CAP | ADVERTISE_PAUSE_ASYM; 1619 mii_write (dev, phy_addr, MII_ADVERTISE, anar); 1620 1621 /* Enable Auto crossover */ 1622 pscr = mii_read (dev, phy_addr, MII_PHY_SCR); 1623 pscr |= 3 << 5; /* 11'b */ 1624 mii_write (dev, phy_addr, MII_PHY_SCR, pscr); 1625 1626 /* Soft reset PHY */ 1627 mii_write (dev, phy_addr, MII_BMCR, BMCR_RESET); 1628 bmcr = BMCR_ANENABLE | BMCR_ANRESTART | BMCR_RESET; 1629 mii_write (dev, phy_addr, MII_BMCR, bmcr); 1630 mdelay(1); 1631 } else { 1632 /* Force speed setting */ 1633 /* 1) Disable Auto crossover */ 1634 pscr = mii_read (dev, phy_addr, MII_PHY_SCR); 1635 pscr &= ~(3 << 5); 1636 mii_write (dev, phy_addr, MII_PHY_SCR, pscr); 1637 1638 /* 2) PHY Reset */ 1639 bmcr = mii_read (dev, phy_addr, MII_BMCR); 1640 bmcr |= BMCR_RESET; 1641 mii_write (dev, phy_addr, MII_BMCR, bmcr); 1642 1643 /* 3) Power Down */ 1644 bmcr = 0x1940; /* must be 0x1940 */ 1645 mii_write (dev, phy_addr, MII_BMCR, bmcr); 1646 mdelay (100); /* wait a certain time */ 1647 1648 /* 4) Advertise nothing */ 1649 mii_write (dev, phy_addr, MII_ADVERTISE, 0); 1650 1651 /* 5) Set media and Power Up */ 1652 bmcr = BMCR_PDOWN; 1653 if (np->speed == 100) { 1654 bmcr |= BMCR_SPEED100; 1655 printk (KERN_INFO "Manual 100 Mbps, "); 1656 } else if (np->speed == 10) { 1657 printk (KERN_INFO "Manual 10 Mbps, "); 1658 } 1659 if (np->full_duplex) { 1660 bmcr |= BMCR_FULLDPLX; 1661 printk (KERN_CONT "Full duplex\n"); 1662 } else { 1663 printk (KERN_CONT "Half duplex\n"); 1664 } 1665 #if 0 1666 /* Set 1000BaseT Master/Slave setting */ 1667 mscr = mii_read (dev, phy_addr, MII_CTRL1000); 1668 mscr |= MII_MSCR_CFG_ENABLE; 1669 mscr &= ~MII_MSCR_CFG_VALUE = 0; 1670 #endif 1671 mii_write (dev, phy_addr, MII_BMCR, bmcr); 1672 mdelay(10); 1673 } 1674 return 0; 1675 } 1676 1677 static int 1678 mii_get_media_pcs (struct net_device *dev) 1679 { 1680 __u16 negotiate; 1681 __u16 bmsr; 1682 int phy_addr; 1683 struct netdev_private *np; 1684 1685 np = netdev_priv(dev); 1686 phy_addr = np->phy_addr; 1687 1688 bmsr = mii_read (dev, phy_addr, PCS_BMSR); 1689 if (np->an_enable) { 1690 if (!(bmsr & BMSR_ANEGCOMPLETE)) { 1691 /* Auto-Negotiation not completed */ 1692 return -1; 1693 } 1694 negotiate = mii_read (dev, phy_addr, PCS_ANAR) & 1695 mii_read (dev, phy_addr, PCS_ANLPAR); 1696 np->speed = 1000; 1697 if (negotiate & PCS_ANAR_FULL_DUPLEX) { 1698 printk (KERN_INFO "Auto 1000 Mbps, Full duplex\n"); 1699 np->full_duplex = 1; 1700 } else { 1701 printk (KERN_INFO "Auto 1000 Mbps, half duplex\n"); 1702 np->full_duplex = 0; 1703 } 1704 if (negotiate & PCS_ANAR_PAUSE) { 1705 np->tx_flow &= 1; 1706 np->rx_flow &= 1; 1707 } else if (negotiate & PCS_ANAR_ASYMMETRIC) { 1708 np->tx_flow = 0; 1709 np->rx_flow &= 1; 1710 } 1711 /* else tx_flow, rx_flow = user select */ 1712 } else { 1713 __u16 bmcr = mii_read (dev, phy_addr, PCS_BMCR); 1714 printk (KERN_INFO "Operating at 1000 Mbps, "); 1715 if (bmcr & BMCR_FULLDPLX) { 1716 printk (KERN_CONT "Full duplex\n"); 1717 } else { 1718 printk (KERN_CONT "Half duplex\n"); 1719 } 1720 } 1721 if (np->tx_flow) 1722 printk(KERN_INFO "Enable Tx Flow Control\n"); 1723 else 1724 printk(KERN_INFO "Disable Tx Flow Control\n"); 1725 if (np->rx_flow) 1726 printk(KERN_INFO "Enable Rx Flow Control\n"); 1727 else 1728 printk(KERN_INFO "Disable Rx Flow Control\n"); 1729 1730 return 0; 1731 } 1732 1733 static int 1734 mii_set_media_pcs (struct net_device *dev) 1735 { 1736 __u16 bmcr; 1737 __u16 esr; 1738 __u16 anar; 1739 int phy_addr; 1740 struct netdev_private *np; 1741 np = netdev_priv(dev); 1742 phy_addr = np->phy_addr; 1743 1744 /* Auto-Negotiation? */ 1745 if (np->an_enable) { 1746 /* Advertise capabilities */ 1747 esr = mii_read (dev, phy_addr, PCS_ESR); 1748 anar = mii_read (dev, phy_addr, MII_ADVERTISE) & 1749 ~PCS_ANAR_HALF_DUPLEX & 1750 ~PCS_ANAR_FULL_DUPLEX; 1751 if (esr & (MII_ESR_1000BT_HD | MII_ESR_1000BX_HD)) 1752 anar |= PCS_ANAR_HALF_DUPLEX; 1753 if (esr & (MII_ESR_1000BT_FD | MII_ESR_1000BX_FD)) 1754 anar |= PCS_ANAR_FULL_DUPLEX; 1755 anar |= PCS_ANAR_PAUSE | PCS_ANAR_ASYMMETRIC; 1756 mii_write (dev, phy_addr, MII_ADVERTISE, anar); 1757 1758 /* Soft reset PHY */ 1759 mii_write (dev, phy_addr, MII_BMCR, BMCR_RESET); 1760 bmcr = BMCR_ANENABLE | BMCR_ANRESTART | BMCR_RESET; 1761 mii_write (dev, phy_addr, MII_BMCR, bmcr); 1762 mdelay(1); 1763 } else { 1764 /* Force speed setting */ 1765 /* PHY Reset */ 1766 bmcr = BMCR_RESET; 1767 mii_write (dev, phy_addr, MII_BMCR, bmcr); 1768 mdelay(10); 1769 if (np->full_duplex) { 1770 bmcr = BMCR_FULLDPLX; 1771 printk (KERN_INFO "Manual full duplex\n"); 1772 } else { 1773 bmcr = 0; 1774 printk (KERN_INFO "Manual half duplex\n"); 1775 } 1776 mii_write (dev, phy_addr, MII_BMCR, bmcr); 1777 mdelay(10); 1778 1779 /* Advertise nothing */ 1780 mii_write (dev, phy_addr, MII_ADVERTISE, 0); 1781 } 1782 return 0; 1783 } 1784 1785 1786 static int 1787 rio_close (struct net_device *dev) 1788 { 1789 struct netdev_private *np = netdev_priv(dev); 1790 struct pci_dev *pdev = np->pdev; 1791 1792 netif_stop_queue (dev); 1793 1794 rio_hw_stop(dev); 1795 1796 free_irq(pdev->irq, dev); 1797 timer_delete_sync(&np->timer); 1798 1799 free_list(dev); 1800 1801 return 0; 1802 } 1803 1804 static void 1805 rio_remove1 (struct pci_dev *pdev) 1806 { 1807 struct net_device *dev = pci_get_drvdata (pdev); 1808 1809 if (dev) { 1810 struct netdev_private *np = netdev_priv(dev); 1811 1812 unregister_netdev (dev); 1813 dma_free_coherent(&pdev->dev, RX_TOTAL_SIZE, np->rx_ring, 1814 np->rx_ring_dma); 1815 dma_free_coherent(&pdev->dev, TX_TOTAL_SIZE, np->tx_ring, 1816 np->tx_ring_dma); 1817 if (np->rmon_enable) 1818 pci_iounmap(pdev, np->ioaddr); 1819 pci_iounmap(pdev, np->eeprom_addr); 1820 free_netdev (dev); 1821 pci_release_regions (pdev); 1822 pci_disable_device (pdev); 1823 } 1824 } 1825 1826 #ifdef CONFIG_PM_SLEEP 1827 static int rio_suspend(struct device *device) 1828 { 1829 struct net_device *dev = dev_get_drvdata(device); 1830 struct netdev_private *np = netdev_priv(dev); 1831 1832 if (!netif_running(dev)) 1833 return 0; 1834 1835 netif_device_detach(dev); 1836 timer_delete_sync(&np->timer); 1837 rio_hw_stop(dev); 1838 1839 return 0; 1840 } 1841 1842 static int rio_resume(struct device *device) 1843 { 1844 struct net_device *dev = dev_get_drvdata(device); 1845 struct netdev_private *np = netdev_priv(dev); 1846 1847 if (!netif_running(dev)) 1848 return 0; 1849 1850 rio_reset_ring(np); 1851 rio_hw_init(dev); 1852 np->timer.expires = jiffies + 1 * HZ; 1853 add_timer(&np->timer); 1854 netif_device_attach(dev); 1855 dl2k_enable_int(np); 1856 1857 return 0; 1858 } 1859 1860 static DEFINE_SIMPLE_DEV_PM_OPS(rio_pm_ops, rio_suspend, rio_resume); 1861 #define RIO_PM_OPS (&rio_pm_ops) 1862 1863 #else 1864 1865 #define RIO_PM_OPS NULL 1866 1867 #endif /* CONFIG_PM_SLEEP */ 1868 1869 static struct pci_driver rio_driver = { 1870 .name = "dl2k", 1871 .id_table = rio_pci_tbl, 1872 .probe = rio_probe1, 1873 .remove = rio_remove1, 1874 .driver.pm = RIO_PM_OPS, 1875 }; 1876 1877 module_pci_driver(rio_driver); 1878 1879 /* Read Documentation/networking/device_drivers/ethernet/dlink/dl2k.rst. */ 1880