1 // SPDX-License-Identifier: GPL-2.0-or-later 2 /* D-Link DL2000-based Gigabit Ethernet Adapter Linux driver */ 3 /* 4 Copyright (c) 2001, 2002 by D-Link Corporation 5 Written by Edward Peng.<edward_peng@dlink.com.tw> 6 Created 03-May-2001, base on Linux' sundance.c. 7 8 */ 9 10 #include "dl2k.h" 11 #include <linux/dma-mapping.h> 12 13 #define dw32(reg, val) iowrite32(val, ioaddr + (reg)) 14 #define dw16(reg, val) iowrite16(val, ioaddr + (reg)) 15 #define dw8(reg, val) iowrite8(val, ioaddr + (reg)) 16 #define dr32(reg) ioread32(ioaddr + (reg)) 17 #define dr16(reg) ioread16(ioaddr + (reg)) 18 #define dr8(reg) ioread8(ioaddr + (reg)) 19 20 #define MAX_UNITS 8 21 static int mtu[MAX_UNITS]; 22 static int vlan[MAX_UNITS]; 23 static int jumbo[MAX_UNITS]; 24 static char *media[MAX_UNITS]; 25 static int tx_flow=-1; 26 static int rx_flow=-1; 27 static int copy_thresh; 28 static int rx_coalesce=10; /* Rx frame count each interrupt */ 29 static int rx_timeout=200; /* Rx DMA wait time in 640ns increments */ 30 static int tx_coalesce=16; /* HW xmit count each TxDMAComplete */ 31 32 33 MODULE_AUTHOR ("Edward Peng"); 34 MODULE_DESCRIPTION ("D-Link DL2000-based Gigabit Ethernet Adapter"); 35 MODULE_LICENSE("GPL"); 36 module_param_array(mtu, int, NULL, 0); 37 module_param_array(media, charp, NULL, 0); 38 module_param_array(vlan, int, NULL, 0); 39 module_param_array(jumbo, int, NULL, 0); 40 module_param(tx_flow, int, 0); 41 module_param(rx_flow, int, 0); 42 module_param(copy_thresh, int, 0); 43 module_param(rx_coalesce, int, 0); /* Rx frame count each interrupt */ 44 module_param(rx_timeout, int, 0); /* Rx DMA wait time in 64ns increments */ 45 module_param(tx_coalesce, int, 0); /* HW xmit count each TxDMAComplete */ 46 47 48 /* Enable the default interrupts */ 49 #define DEFAULT_INTR (RxDMAComplete | HostError | IntRequested | TxDMAComplete| \ 50 UpdateStats | LinkEvent) 51 52 static void dl2k_enable_int(struct netdev_private *np) 53 { 54 void __iomem *ioaddr = np->ioaddr; 55 56 dw16(IntEnable, DEFAULT_INTR); 57 } 58 59 static const int max_intrloop = 50; 60 static const int multicast_filter_limit = 0x40; 61 62 static int rio_open (struct net_device *dev); 63 static void rio_timer (struct timer_list *t); 64 static void rio_tx_timeout (struct net_device *dev, unsigned int txqueue); 65 static netdev_tx_t start_xmit (struct sk_buff *skb, struct net_device *dev); 66 static irqreturn_t rio_interrupt (int irq, void *dev_instance); 67 static void rio_free_tx (struct net_device *dev, int irq); 68 static void tx_error (struct net_device *dev, int tx_status); 69 static int receive_packet (struct net_device *dev); 70 static void rio_error (struct net_device *dev, int int_status); 71 static void set_multicast (struct net_device *dev); 72 static struct net_device_stats *get_stats (struct net_device *dev); 73 static int clear_stats (struct net_device *dev); 74 static int rio_ioctl (struct net_device *dev, struct ifreq *rq, int cmd); 75 static int rio_close (struct net_device *dev); 76 static int find_miiphy (struct net_device *dev); 77 static int parse_eeprom (struct net_device *dev); 78 static int read_eeprom (struct netdev_private *, int eep_addr); 79 static int mii_wait_link (struct net_device *dev, int wait); 80 static int mii_set_media (struct net_device *dev); 81 static int mii_get_media (struct net_device *dev); 82 static int mii_set_media_pcs (struct net_device *dev); 83 static int mii_get_media_pcs (struct net_device *dev); 84 static int mii_read (struct net_device *dev, int phy_addr, int reg_num); 85 static int mii_write (struct net_device *dev, int phy_addr, int reg_num, 86 u16 data); 87 88 static const struct ethtool_ops ethtool_ops; 89 90 static const struct net_device_ops netdev_ops = { 91 .ndo_open = rio_open, 92 .ndo_start_xmit = start_xmit, 93 .ndo_stop = rio_close, 94 .ndo_get_stats = get_stats, 95 .ndo_validate_addr = eth_validate_addr, 96 .ndo_set_mac_address = eth_mac_addr, 97 .ndo_set_rx_mode = set_multicast, 98 .ndo_eth_ioctl = rio_ioctl, 99 .ndo_tx_timeout = rio_tx_timeout, 100 }; 101 102 static bool is_support_rmon_mmio(struct pci_dev *pdev) 103 { 104 return pdev->vendor == PCI_VENDOR_ID_DLINK && 105 pdev->device == 0x4000 && 106 pdev->revision == 0x0c; 107 } 108 109 static int 110 rio_probe1 (struct pci_dev *pdev, const struct pci_device_id *ent) 111 { 112 struct net_device *dev; 113 struct netdev_private *np; 114 static int card_idx; 115 int chip_idx = ent->driver_data; 116 int err, irq; 117 void __iomem *ioaddr; 118 void *ring_space; 119 dma_addr_t ring_dma; 120 121 err = pci_enable_device (pdev); 122 if (err) 123 return err; 124 125 irq = pdev->irq; 126 err = pci_request_regions (pdev, "dl2k"); 127 if (err) 128 goto err_out_disable; 129 130 pci_set_master (pdev); 131 132 err = -ENOMEM; 133 134 dev = alloc_etherdev (sizeof (*np)); 135 if (!dev) 136 goto err_out_res; 137 SET_NETDEV_DEV(dev, &pdev->dev); 138 139 np = netdev_priv(dev); 140 141 if (is_support_rmon_mmio(pdev)) 142 np->rmon_enable = true; 143 144 /* IO registers range. */ 145 ioaddr = pci_iomap(pdev, 0, 0); 146 if (!ioaddr) 147 goto err_out_dev; 148 np->eeprom_addr = ioaddr; 149 150 if (np->rmon_enable) { 151 /* MM registers range. */ 152 ioaddr = pci_iomap(pdev, 1, 0); 153 if (!ioaddr) 154 goto err_out_iounmap; 155 } 156 157 np->ioaddr = ioaddr; 158 np->chip_id = chip_idx; 159 np->pdev = pdev; 160 161 spin_lock_init(&np->stats_lock); 162 spin_lock_init (&np->tx_lock); 163 spin_lock_init (&np->rx_lock); 164 165 /* Parse manual configuration */ 166 np->an_enable = 1; 167 np->tx_coalesce = 1; 168 if (card_idx < MAX_UNITS) { 169 if (media[card_idx] != NULL) { 170 np->an_enable = 0; 171 if (strcmp (media[card_idx], "auto") == 0 || 172 strcmp (media[card_idx], "autosense") == 0 || 173 strcmp (media[card_idx], "0") == 0 ) { 174 np->an_enable = 2; 175 } else if (strcmp (media[card_idx], "100mbps_fd") == 0 || 176 strcmp (media[card_idx], "4") == 0) { 177 np->speed = 100; 178 np->full_duplex = 1; 179 } else if (strcmp (media[card_idx], "100mbps_hd") == 0 || 180 strcmp (media[card_idx], "3") == 0) { 181 np->speed = 100; 182 np->full_duplex = 0; 183 } else if (strcmp (media[card_idx], "10mbps_fd") == 0 || 184 strcmp (media[card_idx], "2") == 0) { 185 np->speed = 10; 186 np->full_duplex = 1; 187 } else if (strcmp (media[card_idx], "10mbps_hd") == 0 || 188 strcmp (media[card_idx], "1") == 0) { 189 np->speed = 10; 190 np->full_duplex = 0; 191 } else if (strcmp (media[card_idx], "1000mbps_fd") == 0 || 192 strcmp (media[card_idx], "6") == 0) { 193 np->speed=1000; 194 np->full_duplex=1; 195 } else if (strcmp (media[card_idx], "1000mbps_hd") == 0 || 196 strcmp (media[card_idx], "5") == 0) { 197 np->speed = 1000; 198 np->full_duplex = 0; 199 } else { 200 np->an_enable = 1; 201 } 202 } 203 if (jumbo[card_idx] != 0) { 204 np->jumbo = 1; 205 dev->mtu = MAX_JUMBO; 206 } else { 207 np->jumbo = 0; 208 if (mtu[card_idx] > 0 && mtu[card_idx] < PACKET_SIZE) 209 dev->mtu = mtu[card_idx]; 210 } 211 np->vlan = (vlan[card_idx] > 0 && vlan[card_idx] < 4096) ? 212 vlan[card_idx] : 0; 213 if (rx_coalesce > 0 && rx_timeout > 0) { 214 np->rx_coalesce = rx_coalesce; 215 np->rx_timeout = rx_timeout; 216 np->coalesce = 1; 217 } 218 np->tx_flow = (tx_flow == 0) ? 0 : 1; 219 np->rx_flow = (rx_flow == 0) ? 0 : 1; 220 221 if (tx_coalesce < 1) 222 tx_coalesce = 1; 223 else if (tx_coalesce > TX_RING_SIZE-1) 224 tx_coalesce = TX_RING_SIZE - 1; 225 } 226 dev->netdev_ops = &netdev_ops; 227 dev->watchdog_timeo = TX_TIMEOUT; 228 dev->ethtool_ops = ðtool_ops; 229 #if 0 230 dev->features = NETIF_F_IP_CSUM; 231 #endif 232 /* MTU range: 68 - 1536 or 8000 */ 233 dev->min_mtu = ETH_MIN_MTU; 234 dev->max_mtu = np->jumbo ? MAX_JUMBO : PACKET_SIZE; 235 236 pci_set_drvdata (pdev, dev); 237 238 ring_space = dma_alloc_coherent(&pdev->dev, TX_TOTAL_SIZE, &ring_dma, 239 GFP_KERNEL); 240 if (!ring_space) 241 goto err_out_iounmap; 242 np->tx_ring = ring_space; 243 np->tx_ring_dma = ring_dma; 244 245 ring_space = dma_alloc_coherent(&pdev->dev, RX_TOTAL_SIZE, &ring_dma, 246 GFP_KERNEL); 247 if (!ring_space) 248 goto err_out_unmap_tx; 249 np->rx_ring = ring_space; 250 np->rx_ring_dma = ring_dma; 251 252 /* Parse eeprom data */ 253 parse_eeprom (dev); 254 255 /* Find PHY address */ 256 err = find_miiphy (dev); 257 if (err) 258 goto err_out_unmap_rx; 259 260 /* Fiber device? */ 261 np->phy_media = (dr16(ASICCtrl) & PhyMedia) ? 1 : 0; 262 np->link_status = 0; 263 /* Set media and reset PHY */ 264 if (np->phy_media) { 265 /* default Auto-Negotiation for fiber deivices */ 266 if (np->an_enable == 2) { 267 np->an_enable = 1; 268 } 269 } else { 270 /* Auto-Negotiation is mandatory for 1000BASE-T, 271 IEEE 802.3ab Annex 28D page 14 */ 272 if (np->speed == 1000) 273 np->an_enable = 1; 274 } 275 276 err = register_netdev (dev); 277 if (err) 278 goto err_out_unmap_rx; 279 280 card_idx++; 281 282 printk (KERN_INFO "%s: %s, %pM, IRQ %d\n", 283 dev->name, np->name, dev->dev_addr, irq); 284 if (tx_coalesce > 1) 285 printk(KERN_INFO "tx_coalesce:\t%d packets\n", 286 tx_coalesce); 287 if (np->coalesce) 288 printk(KERN_INFO 289 "rx_coalesce:\t%d packets\n" 290 "rx_timeout: \t%d ns\n", 291 np->rx_coalesce, np->rx_timeout*640); 292 if (np->vlan) 293 printk(KERN_INFO "vlan(id):\t%d\n", np->vlan); 294 return 0; 295 296 err_out_unmap_rx: 297 dma_free_coherent(&pdev->dev, RX_TOTAL_SIZE, np->rx_ring, 298 np->rx_ring_dma); 299 err_out_unmap_tx: 300 dma_free_coherent(&pdev->dev, TX_TOTAL_SIZE, np->tx_ring, 301 np->tx_ring_dma); 302 err_out_iounmap: 303 if (np->rmon_enable) 304 pci_iounmap(pdev, np->ioaddr); 305 pci_iounmap(pdev, np->eeprom_addr); 306 err_out_dev: 307 free_netdev (dev); 308 err_out_res: 309 pci_release_regions (pdev); 310 err_out_disable: 311 pci_disable_device (pdev); 312 return err; 313 } 314 315 static int 316 find_miiphy (struct net_device *dev) 317 { 318 struct netdev_private *np = netdev_priv(dev); 319 int i, phy_found = 0; 320 321 np->phy_addr = 1; 322 323 for (i = 31; i >= 0; i--) { 324 int mii_status = mii_read (dev, i, 1); 325 if (mii_status != 0xffff && mii_status != 0x0000) { 326 np->phy_addr = i; 327 phy_found++; 328 } 329 } 330 if (!phy_found) { 331 printk (KERN_ERR "%s: No MII PHY found!\n", dev->name); 332 return -ENODEV; 333 } 334 return 0; 335 } 336 337 static int 338 parse_eeprom (struct net_device *dev) 339 { 340 struct netdev_private *np = netdev_priv(dev); 341 void __iomem *ioaddr = np->ioaddr; 342 int i, j; 343 u8 sromdata[256]; 344 u8 *psib; 345 u32 crc; 346 PSROM_t psrom = (PSROM_t) sromdata; 347 348 int cid, next; 349 350 for (i = 0; i < 128; i++) 351 ((__le16 *) sromdata)[i] = cpu_to_le16(read_eeprom(np, i)); 352 353 if (np->pdev->vendor == PCI_VENDOR_ID_DLINK) { /* D-Link Only */ 354 /* Check CRC */ 355 crc = ~ether_crc_le (256 - 4, sromdata); 356 if (psrom->crc != cpu_to_le32(crc)) { 357 printk (KERN_ERR "%s: EEPROM data CRC error.\n", 358 dev->name); 359 return -1; 360 } 361 } 362 363 /* Set MAC address */ 364 eth_hw_addr_set(dev, psrom->mac_addr); 365 366 if (np->chip_id == CHIP_IP1000A) { 367 np->led_mode = le16_to_cpu(psrom->led_mode); 368 return 0; 369 } 370 371 if (np->pdev->vendor != PCI_VENDOR_ID_DLINK) { 372 return 0; 373 } 374 375 /* Parse Software Information Block */ 376 i = 0x30; 377 psib = (u8 *) sromdata; 378 do { 379 cid = psib[i++]; 380 next = psib[i++]; 381 if ((cid == 0 && next == 0) || (cid == 0xff && next == 0xff)) { 382 printk (KERN_ERR "Cell data error\n"); 383 return -1; 384 } 385 switch (cid) { 386 case 0: /* Format version */ 387 break; 388 case 1: /* End of cell */ 389 return 0; 390 case 2: /* Duplex Polarity */ 391 np->duplex_polarity = psib[i]; 392 dw8(PhyCtrl, dr8(PhyCtrl) | psib[i]); 393 break; 394 case 3: /* Wake Polarity */ 395 np->wake_polarity = psib[i]; 396 break; 397 case 9: /* Adapter description */ 398 j = (next - i > 255) ? 255 : next - i; 399 memcpy (np->name, &(psib[i]), j); 400 break; 401 case 4: 402 case 5: 403 case 6: 404 case 7: 405 case 8: /* Reversed */ 406 break; 407 default: /* Unknown cell */ 408 return -1; 409 } 410 i = next; 411 } while (1); 412 413 return 0; 414 } 415 416 static void rio_set_led_mode(struct net_device *dev) 417 { 418 struct netdev_private *np = netdev_priv(dev); 419 void __iomem *ioaddr = np->ioaddr; 420 u32 mode; 421 422 if (np->chip_id != CHIP_IP1000A) 423 return; 424 425 mode = dr32(ASICCtrl); 426 mode &= ~(IPG_AC_LED_MODE_BIT_1 | IPG_AC_LED_MODE | IPG_AC_LED_SPEED); 427 428 if (np->led_mode & 0x01) 429 mode |= IPG_AC_LED_MODE; 430 if (np->led_mode & 0x02) 431 mode |= IPG_AC_LED_MODE_BIT_1; 432 if (np->led_mode & 0x08) 433 mode |= IPG_AC_LED_SPEED; 434 435 dw32(ASICCtrl, mode); 436 } 437 438 static inline dma_addr_t desc_to_dma(struct netdev_desc *desc) 439 { 440 return le64_to_cpu(desc->fraginfo) & DMA_BIT_MASK(48); 441 } 442 443 static void free_list(struct net_device *dev) 444 { 445 struct netdev_private *np = netdev_priv(dev); 446 struct sk_buff *skb; 447 int i; 448 449 /* Free all the skbuffs in the queue. */ 450 for (i = 0; i < RX_RING_SIZE; i++) { 451 skb = np->rx_skbuff[i]; 452 if (skb) { 453 dma_unmap_single(&np->pdev->dev, 454 desc_to_dma(&np->rx_ring[i]), 455 skb->len, DMA_FROM_DEVICE); 456 dev_kfree_skb(skb); 457 np->rx_skbuff[i] = NULL; 458 } 459 np->rx_ring[i].status = 0; 460 np->rx_ring[i].fraginfo = 0; 461 } 462 for (i = 0; i < TX_RING_SIZE; i++) { 463 skb = np->tx_skbuff[i]; 464 if (skb) { 465 dma_unmap_single(&np->pdev->dev, 466 desc_to_dma(&np->tx_ring[i]), 467 skb->len, DMA_TO_DEVICE); 468 dev_kfree_skb(skb); 469 np->tx_skbuff[i] = NULL; 470 } 471 } 472 } 473 474 static void rio_reset_ring(struct netdev_private *np) 475 { 476 int i; 477 478 np->cur_rx = 0; 479 np->cur_tx = 0; 480 np->old_rx = 0; 481 np->old_tx = 0; 482 483 for (i = 0; i < TX_RING_SIZE; i++) 484 np->tx_ring[i].status = cpu_to_le64(TFDDone); 485 486 for (i = 0; i < RX_RING_SIZE; i++) 487 np->rx_ring[i].status = 0; 488 } 489 490 /* allocate and initialize Tx and Rx descriptors */ 491 static int alloc_list(struct net_device *dev) 492 { 493 struct netdev_private *np = netdev_priv(dev); 494 int i; 495 496 rio_reset_ring(np); 497 np->rx_buf_sz = (dev->mtu <= 1500 ? PACKET_SIZE : dev->mtu + 32); 498 499 /* Initialize Tx descriptors, TFDListPtr leaves in start_xmit(). */ 500 for (i = 0; i < TX_RING_SIZE; i++) { 501 np->tx_skbuff[i] = NULL; 502 np->tx_ring[i].next_desc = cpu_to_le64(np->tx_ring_dma + 503 ((i + 1) % TX_RING_SIZE) * 504 sizeof(struct netdev_desc)); 505 } 506 507 /* Initialize Rx descriptors & allocate buffers */ 508 for (i = 0; i < RX_RING_SIZE; i++) { 509 /* Allocated fixed size of skbuff */ 510 struct sk_buff *skb; 511 dma_addr_t addr; 512 513 skb = netdev_alloc_skb_ip_align(dev, np->rx_buf_sz); 514 np->rx_skbuff[i] = skb; 515 if (!skb) 516 goto err_free_list; 517 518 addr = dma_map_single(&np->pdev->dev, skb->data, 519 np->rx_buf_sz, DMA_FROM_DEVICE); 520 if (dma_mapping_error(&np->pdev->dev, addr)) 521 goto err_kfree_skb; 522 523 np->rx_ring[i].next_desc = cpu_to_le64(np->rx_ring_dma + 524 ((i + 1) % RX_RING_SIZE) * 525 sizeof(struct netdev_desc)); 526 /* Rubicon now supports 40 bits of addressing space. */ 527 np->rx_ring[i].fraginfo = cpu_to_le64(addr); 528 np->rx_ring[i].fraginfo |= cpu_to_le64((u64)np->rx_buf_sz << 48); 529 } 530 531 return 0; 532 533 err_kfree_skb: 534 dev_kfree_skb(np->rx_skbuff[i]); 535 np->rx_skbuff[i] = NULL; 536 err_free_list: 537 free_list(dev); 538 return -ENOMEM; 539 } 540 541 static void rio_hw_init(struct net_device *dev) 542 { 543 struct netdev_private *np = netdev_priv(dev); 544 void __iomem *ioaddr = np->ioaddr; 545 int i; 546 u16 macctrl; 547 548 /* Reset all logic functions */ 549 dw16(ASICCtrl + 2, 550 GlobalReset | DMAReset | FIFOReset | NetworkReset | HostReset); 551 mdelay(10); 552 553 rio_set_led_mode(dev); 554 555 /* DebugCtrl bit 4, 5, 9 must set */ 556 dw32(DebugCtrl, dr32(DebugCtrl) | 0x0230); 557 558 if (np->chip_id == CHIP_IP1000A && 559 (np->pdev->revision == 0x40 || np->pdev->revision == 0x41)) { 560 /* PHY magic taken from ipg driver, undocumented registers */ 561 mii_write(dev, np->phy_addr, 31, 0x0001); 562 mii_write(dev, np->phy_addr, 27, 0x01e0); 563 mii_write(dev, np->phy_addr, 31, 0x0002); 564 mii_write(dev, np->phy_addr, 27, 0xeb8e); 565 mii_write(dev, np->phy_addr, 31, 0x0000); 566 mii_write(dev, np->phy_addr, 30, 0x005e); 567 /* advertise 1000BASE-T half & full duplex, prefer MASTER */ 568 mii_write(dev, np->phy_addr, MII_CTRL1000, 0x0700); 569 } 570 571 if (np->phy_media) 572 mii_set_media_pcs(dev); 573 else 574 mii_set_media(dev); 575 576 /* Jumbo frame */ 577 if (np->jumbo != 0) 578 dw16(MaxFrameSize, MAX_JUMBO+14); 579 580 /* Set RFDListPtr */ 581 dw32(RFDListPtr0, np->rx_ring_dma); 582 dw32(RFDListPtr1, 0); 583 584 /* Set station address */ 585 /* 16 or 32-bit access is required by TC9020 datasheet but 8-bit works 586 * too. However, it doesn't work on IP1000A so we use 16-bit access. 587 */ 588 for (i = 0; i < 3; i++) 589 dw16(StationAddr0 + 2 * i, get_unaligned_le16(&dev->dev_addr[2 * i])); 590 591 set_multicast (dev); 592 if (np->coalesce) { 593 dw32(RxDMAIntCtrl, np->rx_coalesce | np->rx_timeout << 16); 594 } 595 /* Set RIO to poll every N*320nsec. */ 596 dw8(RxDMAPollPeriod, 0x20); 597 dw8(TxDMAPollPeriod, 0xff); 598 dw8(RxDMABurstThresh, 0x30); 599 dw8(RxDMAUrgentThresh, 0x30); 600 if (!np->rmon_enable) 601 dw32(RmonStatMask, 0x0007ffff); 602 /* clear statistics */ 603 clear_stats (dev); 604 605 /* VLAN supported */ 606 if (np->vlan) { 607 /* priority field in RxDMAIntCtrl */ 608 dw32(RxDMAIntCtrl, dr32(RxDMAIntCtrl) | 0x7 << 10); 609 /* VLANId */ 610 dw16(VLANId, np->vlan); 611 /* Length/Type should be 0x8100 */ 612 dw32(VLANTag, 0x8100 << 16 | np->vlan); 613 /* Enable AutoVLANuntagging, but disable AutoVLANtagging. 614 VLAN information tagged by TFC' VID, CFI fields. */ 615 dw32(MACCtrl, dr32(MACCtrl) | AutoVLANuntagging); 616 } 617 618 /* Start Tx/Rx */ 619 dw32(MACCtrl, dr32(MACCtrl) | StatsEnable | RxEnable | TxEnable); 620 621 macctrl = 0; 622 macctrl |= (np->vlan) ? AutoVLANuntagging : 0; 623 macctrl |= (np->full_duplex) ? DuplexSelect : 0; 624 macctrl |= (np->tx_flow) ? TxFlowControlEnable : 0; 625 macctrl |= (np->rx_flow) ? RxFlowControlEnable : 0; 626 dw16(MACCtrl, macctrl); 627 } 628 629 static void rio_hw_stop(struct net_device *dev) 630 { 631 struct netdev_private *np = netdev_priv(dev); 632 void __iomem *ioaddr = np->ioaddr; 633 634 /* Disable interrupts */ 635 dw16(IntEnable, 0); 636 637 /* Stop Tx and Rx logics */ 638 dw32(MACCtrl, TxDisable | RxDisable | StatsDisable); 639 } 640 641 static int rio_open(struct net_device *dev) 642 { 643 struct netdev_private *np = netdev_priv(dev); 644 const int irq = np->pdev->irq; 645 int i; 646 647 i = alloc_list(dev); 648 if (i) 649 return i; 650 651 rio_hw_init(dev); 652 653 i = request_irq(irq, rio_interrupt, IRQF_SHARED, dev->name, dev); 654 if (i) { 655 rio_hw_stop(dev); 656 free_list(dev); 657 return i; 658 } 659 660 timer_setup(&np->timer, rio_timer, 0); 661 np->timer.expires = jiffies + 1 * HZ; 662 add_timer(&np->timer); 663 664 netif_start_queue (dev); 665 666 dl2k_enable_int(np); 667 return 0; 668 } 669 670 static void 671 rio_timer (struct timer_list *t) 672 { 673 struct netdev_private *np = timer_container_of(np, t, timer); 674 struct net_device *dev = pci_get_drvdata(np->pdev); 675 unsigned int entry; 676 int next_tick = 1*HZ; 677 unsigned long flags; 678 679 spin_lock_irqsave(&np->rx_lock, flags); 680 /* Recover rx ring exhausted error */ 681 if (np->cur_rx - np->old_rx >= RX_RING_SIZE) { 682 printk(KERN_INFO "Try to recover rx ring exhausted...\n"); 683 /* Re-allocate skbuffs to fill the descriptor ring */ 684 for (; np->cur_rx - np->old_rx > 0; np->old_rx++) { 685 struct sk_buff *skb; 686 entry = np->old_rx % RX_RING_SIZE; 687 /* Dropped packets don't need to re-allocate */ 688 if (np->rx_skbuff[entry] == NULL) { 689 skb = netdev_alloc_skb_ip_align(dev, 690 np->rx_buf_sz); 691 if (skb == NULL) { 692 np->rx_ring[entry].fraginfo = 0; 693 printk (KERN_INFO 694 "%s: Still unable to re-allocate Rx skbuff.#%d\n", 695 dev->name, entry); 696 break; 697 } 698 np->rx_skbuff[entry] = skb; 699 np->rx_ring[entry].fraginfo = 700 cpu_to_le64 (dma_map_single(&np->pdev->dev, skb->data, 701 np->rx_buf_sz, DMA_FROM_DEVICE)); 702 } 703 np->rx_ring[entry].fraginfo |= 704 cpu_to_le64((u64)np->rx_buf_sz << 48); 705 np->rx_ring[entry].status = 0; 706 } /* end for */ 707 } /* end if */ 708 spin_unlock_irqrestore (&np->rx_lock, flags); 709 np->timer.expires = jiffies + next_tick; 710 add_timer(&np->timer); 711 } 712 713 static void 714 rio_tx_timeout (struct net_device *dev, unsigned int txqueue) 715 { 716 struct netdev_private *np = netdev_priv(dev); 717 void __iomem *ioaddr = np->ioaddr; 718 719 printk (KERN_INFO "%s: Tx timed out (%4.4x), is buffer full?\n", 720 dev->name, dr32(TxStatus)); 721 rio_free_tx(dev, 0); 722 dev->if_port = 0; 723 netif_trans_update(dev); /* prevent tx timeout */ 724 } 725 726 static netdev_tx_t 727 start_xmit (struct sk_buff *skb, struct net_device *dev) 728 { 729 struct netdev_private *np = netdev_priv(dev); 730 void __iomem *ioaddr = np->ioaddr; 731 struct netdev_desc *txdesc; 732 unsigned entry; 733 u64 tfc_vlan_tag = 0; 734 735 if (np->link_status == 0) { /* Link Down */ 736 dev_kfree_skb(skb); 737 return NETDEV_TX_OK; 738 } 739 entry = np->cur_tx % TX_RING_SIZE; 740 np->tx_skbuff[entry] = skb; 741 txdesc = &np->tx_ring[entry]; 742 743 #if 0 744 if (skb->ip_summed == CHECKSUM_PARTIAL) { 745 txdesc->status |= 746 cpu_to_le64 (TCPChecksumEnable | UDPChecksumEnable | 747 IPChecksumEnable); 748 } 749 #endif 750 if (np->vlan) { 751 tfc_vlan_tag = VLANTagInsert | 752 ((u64)np->vlan << 32) | 753 ((u64)skb->priority << 45); 754 } 755 txdesc->fraginfo = cpu_to_le64 (dma_map_single(&np->pdev->dev, skb->data, 756 skb->len, DMA_TO_DEVICE)); 757 txdesc->fraginfo |= cpu_to_le64((u64)skb->len << 48); 758 759 /* DL2K bug: DMA fails to get next descriptor ptr in 10Mbps mode 760 * Work around: Always use 1 descriptor in 10Mbps mode */ 761 if (entry % np->tx_coalesce == 0 || np->speed == 10) 762 txdesc->status = cpu_to_le64 (entry | tfc_vlan_tag | 763 WordAlignDisable | 764 TxDMAIndicate | 765 (1 << FragCountShift)); 766 else 767 txdesc->status = cpu_to_le64 (entry | tfc_vlan_tag | 768 WordAlignDisable | 769 (1 << FragCountShift)); 770 771 /* TxDMAPollNow */ 772 dw32(DMACtrl, dr32(DMACtrl) | 0x00001000); 773 /* Schedule ISR */ 774 dw32(CountDown, 10000); 775 np->cur_tx = (np->cur_tx + 1) % TX_RING_SIZE; 776 if ((np->cur_tx - np->old_tx + TX_RING_SIZE) % TX_RING_SIZE 777 < TX_QUEUE_LEN - 1 && np->speed != 10) { 778 /* do nothing */ 779 } else if (!netif_queue_stopped(dev)) { 780 netif_stop_queue (dev); 781 } 782 783 /* The first TFDListPtr */ 784 if (!dr32(TFDListPtr0)) { 785 dw32(TFDListPtr0, np->tx_ring_dma + 786 entry * sizeof (struct netdev_desc)); 787 dw32(TFDListPtr1, 0); 788 } 789 790 return NETDEV_TX_OK; 791 } 792 793 static irqreturn_t 794 rio_interrupt (int irq, void *dev_instance) 795 { 796 struct net_device *dev = dev_instance; 797 struct netdev_private *np = netdev_priv(dev); 798 void __iomem *ioaddr = np->ioaddr; 799 unsigned int_status; 800 int cnt = max_intrloop; 801 int handled = 0; 802 803 while (1) { 804 int_status = dr16(IntStatus); 805 dw16(IntStatus, int_status); 806 int_status &= DEFAULT_INTR; 807 if (int_status == 0 || --cnt < 0) 808 break; 809 handled = 1; 810 /* Processing received packets */ 811 if (int_status & RxDMAComplete) 812 receive_packet (dev); 813 /* TxDMAComplete interrupt */ 814 if ((int_status & (TxDMAComplete|IntRequested))) { 815 int tx_status; 816 tx_status = dr32(TxStatus); 817 if (tx_status & 0x01) 818 tx_error (dev, tx_status); 819 /* Free used tx skbuffs */ 820 rio_free_tx (dev, 1); 821 } 822 823 /* Handle uncommon events */ 824 if (int_status & 825 (HostError | LinkEvent | UpdateStats)) 826 rio_error (dev, int_status); 827 } 828 if (np->cur_tx != np->old_tx) 829 dw32(CountDown, 100); 830 return IRQ_RETVAL(handled); 831 } 832 833 static void 834 rio_free_tx (struct net_device *dev, int irq) 835 { 836 struct netdev_private *np = netdev_priv(dev); 837 int entry = np->old_tx % TX_RING_SIZE; 838 unsigned long flag = 0; 839 840 if (irq) 841 spin_lock(&np->tx_lock); 842 else 843 spin_lock_irqsave(&np->tx_lock, flag); 844 845 /* Free used tx skbuffs */ 846 while (entry != np->cur_tx) { 847 struct sk_buff *skb; 848 849 if (!(np->tx_ring[entry].status & cpu_to_le64(TFDDone))) 850 break; 851 skb = np->tx_skbuff[entry]; 852 dma_unmap_single(&np->pdev->dev, 853 desc_to_dma(&np->tx_ring[entry]), skb->len, 854 DMA_TO_DEVICE); 855 if (irq) 856 dev_consume_skb_irq(skb); 857 else 858 dev_kfree_skb(skb); 859 860 np->tx_skbuff[entry] = NULL; 861 entry = (entry + 1) % TX_RING_SIZE; 862 } 863 if (irq) 864 spin_unlock(&np->tx_lock); 865 else 866 spin_unlock_irqrestore(&np->tx_lock, flag); 867 np->old_tx = entry; 868 869 /* If the ring is no longer full, clear tx_full and 870 call netif_wake_queue() */ 871 872 if (netif_queue_stopped(dev) && 873 ((np->cur_tx - np->old_tx + TX_RING_SIZE) % TX_RING_SIZE 874 < TX_QUEUE_LEN - 1 || np->speed == 10)) { 875 netif_wake_queue (dev); 876 } 877 } 878 879 static void 880 tx_error (struct net_device *dev, int tx_status) 881 { 882 struct netdev_private *np = netdev_priv(dev); 883 void __iomem *ioaddr = np->ioaddr; 884 int frame_id; 885 int i; 886 887 frame_id = (tx_status & 0xffff0000); 888 printk (KERN_ERR "%s: Transmit error, TxStatus %4.4x, FrameId %d.\n", 889 dev->name, tx_status, frame_id); 890 /* Ttransmit Underrun */ 891 if (tx_status & 0x10) { 892 dev->stats.tx_fifo_errors++; 893 dw16(TxStartThresh, dr16(TxStartThresh) + 0x10); 894 /* Transmit Underrun need to set TxReset, DMARest, FIFOReset */ 895 dw16(ASICCtrl + 2, 896 TxReset | DMAReset | FIFOReset | NetworkReset); 897 /* Wait for ResetBusy bit clear */ 898 for (i = 50; i > 0; i--) { 899 if (!(dr16(ASICCtrl + 2) & ResetBusy)) 900 break; 901 mdelay (1); 902 } 903 rio_set_led_mode(dev); 904 rio_free_tx (dev, 1); 905 /* Reset TFDListPtr */ 906 dw32(TFDListPtr0, np->tx_ring_dma + 907 np->old_tx * sizeof (struct netdev_desc)); 908 dw32(TFDListPtr1, 0); 909 910 /* Let TxStartThresh stay default value */ 911 } 912 /* Late Collision */ 913 if (tx_status & 0x04) { 914 dev->stats.tx_fifo_errors++; 915 /* TxReset and clear FIFO */ 916 dw16(ASICCtrl + 2, TxReset | FIFOReset); 917 /* Wait reset done */ 918 for (i = 50; i > 0; i--) { 919 if (!(dr16(ASICCtrl + 2) & ResetBusy)) 920 break; 921 mdelay (1); 922 } 923 rio_set_led_mode(dev); 924 /* Let TxStartThresh stay default value */ 925 } 926 927 spin_lock(&np->stats_lock); 928 /* Maximum Collisions */ 929 if (tx_status & 0x08) 930 dev->stats.collisions++; 931 932 dev->stats.tx_errors++; 933 spin_unlock(&np->stats_lock); 934 935 /* Restart the Tx */ 936 dw32(MACCtrl, dr16(MACCtrl) | TxEnable); 937 } 938 939 static int 940 receive_packet (struct net_device *dev) 941 { 942 struct netdev_private *np = netdev_priv(dev); 943 int entry = np->cur_rx % RX_RING_SIZE; 944 int cnt = 30; 945 946 /* If RFDDone, FrameStart and FrameEnd set, there is a new packet in. */ 947 while (1) { 948 struct netdev_desc *desc = &np->rx_ring[entry]; 949 int pkt_len; 950 u64 frame_status; 951 952 if (!(desc->status & cpu_to_le64(RFDDone)) || 953 !(desc->status & cpu_to_le64(FrameStart)) || 954 !(desc->status & cpu_to_le64(FrameEnd))) 955 break; 956 957 /* Chip omits the CRC. */ 958 frame_status = le64_to_cpu(desc->status); 959 pkt_len = frame_status & 0xffff; 960 if (--cnt < 0) 961 break; 962 /* Update rx error statistics, drop packet. */ 963 if (frame_status & RFS_Errors) { 964 dev->stats.rx_errors++; 965 if (frame_status & (RxRuntFrame | RxLengthError)) 966 dev->stats.rx_length_errors++; 967 if (frame_status & RxFCSError) 968 dev->stats.rx_crc_errors++; 969 if (frame_status & RxAlignmentError && np->speed != 1000) 970 dev->stats.rx_frame_errors++; 971 if (frame_status & RxFIFOOverrun) 972 dev->stats.rx_fifo_errors++; 973 } else { 974 struct sk_buff *skb; 975 976 skb = NULL; 977 /* Small skbuffs for short packets */ 978 if (pkt_len <= copy_thresh) 979 skb = netdev_alloc_skb_ip_align(dev, pkt_len); 980 if (!skb) { 981 dma_unmap_single(&np->pdev->dev, 982 desc_to_dma(desc), 983 np->rx_buf_sz, 984 DMA_FROM_DEVICE); 985 skb_put (skb = np->rx_skbuff[entry], pkt_len); 986 np->rx_skbuff[entry] = NULL; 987 } else { 988 dma_sync_single_for_cpu(&np->pdev->dev, 989 desc_to_dma(desc), 990 np->rx_buf_sz, 991 DMA_FROM_DEVICE); 992 skb_copy_to_linear_data (skb, 993 np->rx_skbuff[entry]->data, 994 pkt_len); 995 skb_put (skb, pkt_len); 996 dma_sync_single_for_device(&np->pdev->dev, 997 desc_to_dma(desc), 998 np->rx_buf_sz, 999 DMA_FROM_DEVICE); 1000 } 1001 skb->protocol = eth_type_trans (skb, dev); 1002 #if 0 1003 /* Checksum done by hw, but csum value unavailable. */ 1004 if (np->pdev->pci_rev_id >= 0x0c && 1005 !(frame_status & (TCPError | UDPError | IPError))) { 1006 skb->ip_summed = CHECKSUM_UNNECESSARY; 1007 } 1008 #endif 1009 netif_rx (skb); 1010 } 1011 entry = (entry + 1) % RX_RING_SIZE; 1012 } 1013 spin_lock(&np->rx_lock); 1014 np->cur_rx = entry; 1015 /* Re-allocate skbuffs to fill the descriptor ring */ 1016 entry = np->old_rx; 1017 while (entry != np->cur_rx) { 1018 struct sk_buff *skb; 1019 /* Dropped packets don't need to re-allocate */ 1020 if (np->rx_skbuff[entry] == NULL) { 1021 skb = netdev_alloc_skb_ip_align(dev, np->rx_buf_sz); 1022 if (skb == NULL) { 1023 np->rx_ring[entry].fraginfo = 0; 1024 printk (KERN_INFO 1025 "%s: receive_packet: " 1026 "Unable to re-allocate Rx skbuff.#%d\n", 1027 dev->name, entry); 1028 break; 1029 } 1030 np->rx_skbuff[entry] = skb; 1031 np->rx_ring[entry].fraginfo = 1032 cpu_to_le64(dma_map_single(&np->pdev->dev, skb->data, 1033 np->rx_buf_sz, DMA_FROM_DEVICE)); 1034 } 1035 np->rx_ring[entry].fraginfo |= 1036 cpu_to_le64((u64)np->rx_buf_sz << 48); 1037 np->rx_ring[entry].status = 0; 1038 entry = (entry + 1) % RX_RING_SIZE; 1039 } 1040 np->old_rx = entry; 1041 spin_unlock(&np->rx_lock); 1042 return 0; 1043 } 1044 1045 static void 1046 rio_error (struct net_device *dev, int int_status) 1047 { 1048 struct netdev_private *np = netdev_priv(dev); 1049 void __iomem *ioaddr = np->ioaddr; 1050 u16 macctrl; 1051 1052 /* Link change event */ 1053 if (int_status & LinkEvent) { 1054 if (mii_wait_link (dev, 10) == 0) { 1055 printk (KERN_INFO "%s: Link up\n", dev->name); 1056 if (np->phy_media) 1057 mii_get_media_pcs (dev); 1058 else 1059 mii_get_media (dev); 1060 if (np->speed == 1000) 1061 np->tx_coalesce = tx_coalesce; 1062 else 1063 np->tx_coalesce = 1; 1064 macctrl = 0; 1065 macctrl |= (np->vlan) ? AutoVLANuntagging : 0; 1066 macctrl |= (np->full_duplex) ? DuplexSelect : 0; 1067 macctrl |= (np->tx_flow) ? 1068 TxFlowControlEnable : 0; 1069 macctrl |= (np->rx_flow) ? 1070 RxFlowControlEnable : 0; 1071 dw16(MACCtrl, macctrl); 1072 np->link_status = 1; 1073 netif_carrier_on(dev); 1074 } else { 1075 printk (KERN_INFO "%s: Link off\n", dev->name); 1076 np->link_status = 0; 1077 netif_carrier_off(dev); 1078 } 1079 } 1080 1081 /* UpdateStats statistics registers */ 1082 if (int_status & UpdateStats) { 1083 get_stats (dev); 1084 } 1085 1086 /* PCI Error, a catastronphic error related to the bus interface 1087 occurs, set GlobalReset and HostReset to reset. */ 1088 if (int_status & HostError) { 1089 printk (KERN_ERR "%s: HostError! IntStatus %4.4x.\n", 1090 dev->name, int_status); 1091 dw16(ASICCtrl + 2, GlobalReset | HostReset); 1092 mdelay (500); 1093 rio_set_led_mode(dev); 1094 } 1095 } 1096 1097 static struct net_device_stats * 1098 get_stats (struct net_device *dev) 1099 { 1100 struct netdev_private *np = netdev_priv(dev); 1101 void __iomem *ioaddr = np->ioaddr; 1102 unsigned int stat_reg; 1103 unsigned long flags; 1104 1105 spin_lock_irqsave(&np->stats_lock, flags); 1106 /* All statistics registers need to be acknowledged, 1107 else statistic overflow could cause problems */ 1108 1109 dev->stats.rx_packets += dr32(FramesRcvOk); 1110 dev->stats.tx_packets += dr32(FramesXmtOk); 1111 dev->stats.rx_bytes += dr32(OctetRcvOk); 1112 dev->stats.tx_bytes += dr32(OctetXmtOk); 1113 1114 dev->stats.multicast += dr32(McstFramesRcvdOk); 1115 dev->stats.collisions += dr32(SingleColFrames) 1116 + dr32(MultiColFrames); 1117 1118 /* detailed tx errors */ 1119 stat_reg = dr16(FramesAbortXSColls); 1120 dev->stats.tx_aborted_errors += stat_reg; 1121 dev->stats.tx_errors += stat_reg; 1122 1123 stat_reg = dr16(CarrierSenseErrors); 1124 dev->stats.tx_carrier_errors += stat_reg; 1125 dev->stats.tx_errors += stat_reg; 1126 1127 /* Clear all other statistic register. */ 1128 dr32(McstOctetXmtOk); 1129 dr16(BcstFramesXmtdOk); 1130 dr32(McstFramesXmtdOk); 1131 dr16(BcstFramesRcvdOk); 1132 dr16(MacControlFramesRcvd); 1133 dr16(FrameTooLongErrors); 1134 dr16(InRangeLengthErrors); 1135 dr16(FramesCheckSeqErrors); 1136 dr16(FramesLostRxErrors); 1137 dr32(McstOctetXmtOk); 1138 dr32(BcstOctetXmtOk); 1139 dr32(McstFramesXmtdOk); 1140 dr32(FramesWDeferredXmt); 1141 dr32(LateCollisions); 1142 dr16(BcstFramesXmtdOk); 1143 dr16(MacControlFramesXmtd); 1144 dr16(FramesWEXDeferal); 1145 1146 if (np->rmon_enable) 1147 for (int i = 0x100; i <= 0x150; i += 4) 1148 dr32(i); 1149 1150 dr16(TxJumboFrames); 1151 dr16(RxJumboFrames); 1152 dr16(TCPCheckSumErrors); 1153 dr16(UDPCheckSumErrors); 1154 dr16(IPCheckSumErrors); 1155 1156 spin_unlock_irqrestore(&np->stats_lock, flags); 1157 1158 return &dev->stats; 1159 } 1160 1161 static int 1162 clear_stats (struct net_device *dev) 1163 { 1164 struct netdev_private *np = netdev_priv(dev); 1165 void __iomem *ioaddr = np->ioaddr; 1166 1167 /* All statistics registers need to be acknowledged, 1168 else statistic overflow could cause problems */ 1169 dr32(FramesRcvOk); 1170 dr32(FramesXmtOk); 1171 dr32(OctetRcvOk); 1172 dr32(OctetXmtOk); 1173 1174 dr32(McstFramesRcvdOk); 1175 dr32(SingleColFrames); 1176 dr32(MultiColFrames); 1177 dr32(LateCollisions); 1178 /* detailed rx errors */ 1179 dr16(FrameTooLongErrors); 1180 dr16(InRangeLengthErrors); 1181 dr16(FramesCheckSeqErrors); 1182 dr16(FramesLostRxErrors); 1183 1184 /* detailed tx errors */ 1185 dr16(FramesAbortXSColls); 1186 dr16(CarrierSenseErrors); 1187 1188 /* Clear all other statistic register. */ 1189 dr32(McstOctetXmtOk); 1190 dr16(BcstFramesXmtdOk); 1191 dr32(McstFramesXmtdOk); 1192 dr16(BcstFramesRcvdOk); 1193 dr16(MacControlFramesRcvd); 1194 dr32(McstOctetXmtOk); 1195 dr32(BcstOctetXmtOk); 1196 dr32(McstFramesXmtdOk); 1197 dr32(FramesWDeferredXmt); 1198 dr16(BcstFramesXmtdOk); 1199 dr16(MacControlFramesXmtd); 1200 dr16(FramesWEXDeferal); 1201 if (np->rmon_enable) 1202 for (int i = 0x100; i <= 0x150; i += 4) 1203 dr32(i); 1204 dr16(TxJumboFrames); 1205 dr16(RxJumboFrames); 1206 dr16(TCPCheckSumErrors); 1207 dr16(UDPCheckSumErrors); 1208 dr16(IPCheckSumErrors); 1209 return 0; 1210 } 1211 1212 static void 1213 set_multicast (struct net_device *dev) 1214 { 1215 struct netdev_private *np = netdev_priv(dev); 1216 void __iomem *ioaddr = np->ioaddr; 1217 u32 hash_table[2]; 1218 u16 rx_mode = 0; 1219 1220 hash_table[0] = hash_table[1] = 0; 1221 /* RxFlowcontrol DA: 01-80-C2-00-00-01. Hash index=0x39 */ 1222 hash_table[1] |= 0x02000000; 1223 if (dev->flags & IFF_PROMISC) { 1224 /* Receive all frames promiscuously. */ 1225 rx_mode = ReceiveAllFrames; 1226 } else if ((dev->flags & IFF_ALLMULTI) || 1227 (netdev_mc_count(dev) > multicast_filter_limit)) { 1228 /* Receive broadcast and multicast frames */ 1229 rx_mode = ReceiveBroadcast | ReceiveMulticast | ReceiveUnicast; 1230 } else if (!netdev_mc_empty(dev)) { 1231 struct netdev_hw_addr *ha; 1232 /* Receive broadcast frames and multicast frames filtering 1233 by Hashtable */ 1234 rx_mode = 1235 ReceiveBroadcast | ReceiveMulticastHash | ReceiveUnicast; 1236 netdev_for_each_mc_addr(ha, dev) { 1237 int bit, index = 0; 1238 int crc = ether_crc_le(ETH_ALEN, ha->addr); 1239 /* The inverted high significant 6 bits of CRC are 1240 used as an index to hashtable */ 1241 for (bit = 0; bit < 6; bit++) 1242 if (crc & (1 << (31 - bit))) 1243 index |= (1 << bit); 1244 hash_table[index / 32] |= (1 << (index % 32)); 1245 } 1246 } else { 1247 rx_mode = ReceiveBroadcast | ReceiveUnicast; 1248 } 1249 if (np->vlan) { 1250 /* ReceiveVLANMatch field in ReceiveMode */ 1251 rx_mode |= ReceiveVLANMatch; 1252 } 1253 1254 dw32(HashTable0, hash_table[0]); 1255 dw32(HashTable1, hash_table[1]); 1256 dw16(ReceiveMode, rx_mode); 1257 } 1258 1259 static void rio_get_drvinfo(struct net_device *dev, struct ethtool_drvinfo *info) 1260 { 1261 struct netdev_private *np = netdev_priv(dev); 1262 1263 strscpy(info->driver, "dl2k", sizeof(info->driver)); 1264 strscpy(info->bus_info, pci_name(np->pdev), sizeof(info->bus_info)); 1265 } 1266 1267 static int rio_get_link_ksettings(struct net_device *dev, 1268 struct ethtool_link_ksettings *cmd) 1269 { 1270 struct netdev_private *np = netdev_priv(dev); 1271 u32 supported, advertising; 1272 1273 if (np->phy_media) { 1274 /* fiber device */ 1275 supported = SUPPORTED_Autoneg | SUPPORTED_FIBRE; 1276 advertising = ADVERTISED_Autoneg | ADVERTISED_FIBRE; 1277 cmd->base.port = PORT_FIBRE; 1278 } else { 1279 /* copper device */ 1280 supported = SUPPORTED_10baseT_Half | 1281 SUPPORTED_10baseT_Full | SUPPORTED_100baseT_Half 1282 | SUPPORTED_100baseT_Full | SUPPORTED_1000baseT_Full | 1283 SUPPORTED_Autoneg | SUPPORTED_MII; 1284 advertising = ADVERTISED_10baseT_Half | 1285 ADVERTISED_10baseT_Full | ADVERTISED_100baseT_Half | 1286 ADVERTISED_100baseT_Full | ADVERTISED_1000baseT_Full | 1287 ADVERTISED_Autoneg | ADVERTISED_MII; 1288 cmd->base.port = PORT_MII; 1289 } 1290 if (np->link_status) { 1291 cmd->base.speed = np->speed; 1292 cmd->base.duplex = np->full_duplex ? DUPLEX_FULL : DUPLEX_HALF; 1293 } else { 1294 cmd->base.speed = SPEED_UNKNOWN; 1295 cmd->base.duplex = DUPLEX_UNKNOWN; 1296 } 1297 if (np->an_enable) 1298 cmd->base.autoneg = AUTONEG_ENABLE; 1299 else 1300 cmd->base.autoneg = AUTONEG_DISABLE; 1301 1302 cmd->base.phy_address = np->phy_addr; 1303 1304 ethtool_convert_legacy_u32_to_link_mode(cmd->link_modes.supported, 1305 supported); 1306 ethtool_convert_legacy_u32_to_link_mode(cmd->link_modes.advertising, 1307 advertising); 1308 1309 return 0; 1310 } 1311 1312 static int rio_set_link_ksettings(struct net_device *dev, 1313 const struct ethtool_link_ksettings *cmd) 1314 { 1315 struct netdev_private *np = netdev_priv(dev); 1316 u32 speed = cmd->base.speed; 1317 u8 duplex = cmd->base.duplex; 1318 1319 netif_carrier_off(dev); 1320 if (cmd->base.autoneg == AUTONEG_ENABLE) { 1321 if (np->an_enable) { 1322 return 0; 1323 } else { 1324 np->an_enable = 1; 1325 mii_set_media(dev); 1326 return 0; 1327 } 1328 } else { 1329 np->an_enable = 0; 1330 if (np->speed == 1000) { 1331 speed = SPEED_100; 1332 duplex = DUPLEX_FULL; 1333 printk("Warning!! Can't disable Auto negotiation in 1000Mbps, change to Manual 100Mbps, Full duplex.\n"); 1334 } 1335 switch (speed) { 1336 case SPEED_10: 1337 np->speed = 10; 1338 np->full_duplex = (duplex == DUPLEX_FULL); 1339 break; 1340 case SPEED_100: 1341 np->speed = 100; 1342 np->full_duplex = (duplex == DUPLEX_FULL); 1343 break; 1344 case SPEED_1000: /* not supported */ 1345 default: 1346 return -EINVAL; 1347 } 1348 mii_set_media(dev); 1349 } 1350 return 0; 1351 } 1352 1353 static u32 rio_get_link(struct net_device *dev) 1354 { 1355 struct netdev_private *np = netdev_priv(dev); 1356 return np->link_status; 1357 } 1358 1359 static const struct ethtool_ops ethtool_ops = { 1360 .get_drvinfo = rio_get_drvinfo, 1361 .get_link = rio_get_link, 1362 .get_link_ksettings = rio_get_link_ksettings, 1363 .set_link_ksettings = rio_set_link_ksettings, 1364 }; 1365 1366 static int 1367 rio_ioctl (struct net_device *dev, struct ifreq *rq, int cmd) 1368 { 1369 int phy_addr; 1370 struct netdev_private *np = netdev_priv(dev); 1371 struct mii_ioctl_data *miidata = if_mii(rq); 1372 1373 phy_addr = np->phy_addr; 1374 switch (cmd) { 1375 case SIOCGMIIPHY: 1376 miidata->phy_id = phy_addr; 1377 break; 1378 case SIOCGMIIREG: 1379 miidata->val_out = mii_read (dev, phy_addr, miidata->reg_num); 1380 break; 1381 case SIOCSMIIREG: 1382 if (!capable(CAP_NET_ADMIN)) 1383 return -EPERM; 1384 mii_write (dev, phy_addr, miidata->reg_num, miidata->val_in); 1385 break; 1386 default: 1387 return -EOPNOTSUPP; 1388 } 1389 return 0; 1390 } 1391 1392 #define EEP_READ 0x0200 1393 #define EEP_BUSY 0x8000 1394 /* Read the EEPROM word */ 1395 /* We use I/O instruction to read/write eeprom to avoid fail on some machines */ 1396 static int read_eeprom(struct netdev_private *np, int eep_addr) 1397 { 1398 void __iomem *ioaddr = np->eeprom_addr; 1399 int i = 1000; 1400 1401 dw16(EepromCtrl, EEP_READ | (eep_addr & 0xff)); 1402 while (i-- > 0) { 1403 if (!(dr16(EepromCtrl) & EEP_BUSY)) 1404 return dr16(EepromData); 1405 } 1406 return 0; 1407 } 1408 1409 enum phy_ctrl_bits { 1410 MII_READ = 0x00, MII_CLK = 0x01, MII_DATA1 = 0x02, MII_WRITE = 0x04, 1411 MII_DUPLEX = 0x08, 1412 }; 1413 1414 #define mii_delay() dr8(PhyCtrl) 1415 static void 1416 mii_sendbit (struct net_device *dev, u32 data) 1417 { 1418 struct netdev_private *np = netdev_priv(dev); 1419 void __iomem *ioaddr = np->ioaddr; 1420 1421 data = ((data) ? MII_DATA1 : 0) | (dr8(PhyCtrl) & 0xf8) | MII_WRITE; 1422 dw8(PhyCtrl, data); 1423 mii_delay (); 1424 dw8(PhyCtrl, data | MII_CLK); 1425 mii_delay (); 1426 } 1427 1428 static int 1429 mii_getbit (struct net_device *dev) 1430 { 1431 struct netdev_private *np = netdev_priv(dev); 1432 void __iomem *ioaddr = np->ioaddr; 1433 u8 data; 1434 1435 data = (dr8(PhyCtrl) & 0xf8) | MII_READ; 1436 dw8(PhyCtrl, data); 1437 mii_delay (); 1438 dw8(PhyCtrl, data | MII_CLK); 1439 mii_delay (); 1440 return (dr8(PhyCtrl) >> 1) & 1; 1441 } 1442 1443 static void 1444 mii_send_bits (struct net_device *dev, u32 data, int len) 1445 { 1446 int i; 1447 1448 for (i = len - 1; i >= 0; i--) { 1449 mii_sendbit (dev, data & (1 << i)); 1450 } 1451 } 1452 1453 static int 1454 mii_read (struct net_device *dev, int phy_addr, int reg_num) 1455 { 1456 u32 cmd; 1457 int i; 1458 u32 retval = 0; 1459 1460 /* Preamble */ 1461 mii_send_bits (dev, 0xffffffff, 32); 1462 /* ST(2), OP(2), ADDR(5), REG#(5), TA(2), Data(16) total 32 bits */ 1463 /* ST,OP = 0110'b for read operation */ 1464 cmd = (0x06 << 10 | phy_addr << 5 | reg_num); 1465 mii_send_bits (dev, cmd, 14); 1466 /* Turnaround */ 1467 if (mii_getbit (dev)) 1468 goto err_out; 1469 /* Read data */ 1470 for (i = 0; i < 16; i++) { 1471 retval |= mii_getbit (dev); 1472 retval <<= 1; 1473 } 1474 /* End cycle */ 1475 mii_getbit (dev); 1476 return (retval >> 1) & 0xffff; 1477 1478 err_out: 1479 return 0; 1480 } 1481 static int 1482 mii_write (struct net_device *dev, int phy_addr, int reg_num, u16 data) 1483 { 1484 u32 cmd; 1485 1486 /* Preamble */ 1487 mii_send_bits (dev, 0xffffffff, 32); 1488 /* ST(2), OP(2), ADDR(5), REG#(5), TA(2), Data(16) total 32 bits */ 1489 /* ST,OP,AAAAA,RRRRR,TA = 0101xxxxxxxxxx10'b = 0x5002 for write */ 1490 cmd = (0x5002 << 16) | (phy_addr << 23) | (reg_num << 18) | data; 1491 mii_send_bits (dev, cmd, 32); 1492 /* End cycle */ 1493 mii_getbit (dev); 1494 return 0; 1495 } 1496 static int 1497 mii_wait_link (struct net_device *dev, int wait) 1498 { 1499 __u16 bmsr; 1500 int phy_addr; 1501 struct netdev_private *np; 1502 1503 np = netdev_priv(dev); 1504 phy_addr = np->phy_addr; 1505 1506 do { 1507 bmsr = mii_read (dev, phy_addr, MII_BMSR); 1508 if (bmsr & BMSR_LSTATUS) 1509 return 0; 1510 mdelay (1); 1511 } while (--wait > 0); 1512 return -1; 1513 } 1514 static int 1515 mii_get_media (struct net_device *dev) 1516 { 1517 __u16 negotiate; 1518 __u16 bmsr; 1519 __u16 mscr; 1520 __u16 mssr; 1521 int phy_addr; 1522 struct netdev_private *np; 1523 1524 np = netdev_priv(dev); 1525 phy_addr = np->phy_addr; 1526 1527 bmsr = mii_read (dev, phy_addr, MII_BMSR); 1528 if (np->an_enable) { 1529 if (!(bmsr & BMSR_ANEGCOMPLETE)) { 1530 /* Auto-Negotiation not completed */ 1531 return -1; 1532 } 1533 negotiate = mii_read (dev, phy_addr, MII_ADVERTISE) & 1534 mii_read (dev, phy_addr, MII_LPA); 1535 mscr = mii_read (dev, phy_addr, MII_CTRL1000); 1536 mssr = mii_read (dev, phy_addr, MII_STAT1000); 1537 if (mscr & ADVERTISE_1000FULL && mssr & LPA_1000FULL) { 1538 np->speed = 1000; 1539 np->full_duplex = 1; 1540 printk (KERN_INFO "Auto 1000 Mbps, Full duplex\n"); 1541 } else if (mscr & ADVERTISE_1000HALF && mssr & LPA_1000HALF) { 1542 np->speed = 1000; 1543 np->full_duplex = 0; 1544 printk (KERN_INFO "Auto 1000 Mbps, Half duplex\n"); 1545 } else if (negotiate & ADVERTISE_100FULL) { 1546 np->speed = 100; 1547 np->full_duplex = 1; 1548 printk (KERN_INFO "Auto 100 Mbps, Full duplex\n"); 1549 } else if (negotiate & ADVERTISE_100HALF) { 1550 np->speed = 100; 1551 np->full_duplex = 0; 1552 printk (KERN_INFO "Auto 100 Mbps, Half duplex\n"); 1553 } else if (negotiate & ADVERTISE_10FULL) { 1554 np->speed = 10; 1555 np->full_duplex = 1; 1556 printk (KERN_INFO "Auto 10 Mbps, Full duplex\n"); 1557 } else if (negotiate & ADVERTISE_10HALF) { 1558 np->speed = 10; 1559 np->full_duplex = 0; 1560 printk (KERN_INFO "Auto 10 Mbps, Half duplex\n"); 1561 } 1562 if (negotiate & ADVERTISE_PAUSE_CAP) { 1563 np->tx_flow &= 1; 1564 np->rx_flow &= 1; 1565 } else if (negotiate & ADVERTISE_PAUSE_ASYM) { 1566 np->tx_flow = 0; 1567 np->rx_flow &= 1; 1568 } 1569 /* else tx_flow, rx_flow = user select */ 1570 } else { 1571 __u16 bmcr = mii_read (dev, phy_addr, MII_BMCR); 1572 switch (bmcr & (BMCR_SPEED100 | BMCR_SPEED1000)) { 1573 case BMCR_SPEED1000: 1574 printk (KERN_INFO "Operating at 1000 Mbps, "); 1575 break; 1576 case BMCR_SPEED100: 1577 printk (KERN_INFO "Operating at 100 Mbps, "); 1578 break; 1579 case 0: 1580 printk (KERN_INFO "Operating at 10 Mbps, "); 1581 } 1582 if (bmcr & BMCR_FULLDPLX) { 1583 printk (KERN_CONT "Full duplex\n"); 1584 } else { 1585 printk (KERN_CONT "Half duplex\n"); 1586 } 1587 } 1588 if (np->tx_flow) 1589 printk(KERN_INFO "Enable Tx Flow Control\n"); 1590 else 1591 printk(KERN_INFO "Disable Tx Flow Control\n"); 1592 if (np->rx_flow) 1593 printk(KERN_INFO "Enable Rx Flow Control\n"); 1594 else 1595 printk(KERN_INFO "Disable Rx Flow Control\n"); 1596 1597 return 0; 1598 } 1599 1600 static int 1601 mii_set_media (struct net_device *dev) 1602 { 1603 __u16 pscr; 1604 __u16 bmcr; 1605 __u16 bmsr; 1606 __u16 anar; 1607 int phy_addr; 1608 struct netdev_private *np; 1609 np = netdev_priv(dev); 1610 phy_addr = np->phy_addr; 1611 1612 /* Does user set speed? */ 1613 if (np->an_enable) { 1614 /* Advertise capabilities */ 1615 bmsr = mii_read (dev, phy_addr, MII_BMSR); 1616 anar = mii_read (dev, phy_addr, MII_ADVERTISE) & 1617 ~(ADVERTISE_100FULL | ADVERTISE_10FULL | 1618 ADVERTISE_100HALF | ADVERTISE_10HALF | 1619 ADVERTISE_100BASE4); 1620 if (bmsr & BMSR_100FULL) 1621 anar |= ADVERTISE_100FULL; 1622 if (bmsr & BMSR_100HALF) 1623 anar |= ADVERTISE_100HALF; 1624 if (bmsr & BMSR_100BASE4) 1625 anar |= ADVERTISE_100BASE4; 1626 if (bmsr & BMSR_10FULL) 1627 anar |= ADVERTISE_10FULL; 1628 if (bmsr & BMSR_10HALF) 1629 anar |= ADVERTISE_10HALF; 1630 anar |= ADVERTISE_PAUSE_CAP | ADVERTISE_PAUSE_ASYM; 1631 mii_write (dev, phy_addr, MII_ADVERTISE, anar); 1632 1633 /* Enable Auto crossover */ 1634 pscr = mii_read (dev, phy_addr, MII_PHY_SCR); 1635 pscr |= 3 << 5; /* 11'b */ 1636 mii_write (dev, phy_addr, MII_PHY_SCR, pscr); 1637 1638 /* Soft reset PHY */ 1639 mii_write (dev, phy_addr, MII_BMCR, BMCR_RESET); 1640 bmcr = BMCR_ANENABLE | BMCR_ANRESTART | BMCR_RESET; 1641 mii_write (dev, phy_addr, MII_BMCR, bmcr); 1642 mdelay(1); 1643 } else { 1644 /* Force speed setting */ 1645 /* 1) Disable Auto crossover */ 1646 pscr = mii_read (dev, phy_addr, MII_PHY_SCR); 1647 pscr &= ~(3 << 5); 1648 mii_write (dev, phy_addr, MII_PHY_SCR, pscr); 1649 1650 /* 2) PHY Reset */ 1651 bmcr = mii_read (dev, phy_addr, MII_BMCR); 1652 bmcr |= BMCR_RESET; 1653 mii_write (dev, phy_addr, MII_BMCR, bmcr); 1654 1655 /* 3) Power Down */ 1656 bmcr = 0x1940; /* must be 0x1940 */ 1657 mii_write (dev, phy_addr, MII_BMCR, bmcr); 1658 mdelay (100); /* wait a certain time */ 1659 1660 /* 4) Advertise nothing */ 1661 mii_write (dev, phy_addr, MII_ADVERTISE, 0); 1662 1663 /* 5) Set media and Power Up */ 1664 bmcr = BMCR_PDOWN; 1665 if (np->speed == 100) { 1666 bmcr |= BMCR_SPEED100; 1667 printk (KERN_INFO "Manual 100 Mbps, "); 1668 } else if (np->speed == 10) { 1669 printk (KERN_INFO "Manual 10 Mbps, "); 1670 } 1671 if (np->full_duplex) { 1672 bmcr |= BMCR_FULLDPLX; 1673 printk (KERN_CONT "Full duplex\n"); 1674 } else { 1675 printk (KERN_CONT "Half duplex\n"); 1676 } 1677 #if 0 1678 /* Set 1000BaseT Master/Slave setting */ 1679 mscr = mii_read (dev, phy_addr, MII_CTRL1000); 1680 mscr |= MII_MSCR_CFG_ENABLE; 1681 mscr &= ~MII_MSCR_CFG_VALUE = 0; 1682 #endif 1683 mii_write (dev, phy_addr, MII_BMCR, bmcr); 1684 mdelay(10); 1685 } 1686 return 0; 1687 } 1688 1689 static int 1690 mii_get_media_pcs (struct net_device *dev) 1691 { 1692 __u16 negotiate; 1693 __u16 bmsr; 1694 int phy_addr; 1695 struct netdev_private *np; 1696 1697 np = netdev_priv(dev); 1698 phy_addr = np->phy_addr; 1699 1700 bmsr = mii_read (dev, phy_addr, PCS_BMSR); 1701 if (np->an_enable) { 1702 if (!(bmsr & BMSR_ANEGCOMPLETE)) { 1703 /* Auto-Negotiation not completed */ 1704 return -1; 1705 } 1706 negotiate = mii_read (dev, phy_addr, PCS_ANAR) & 1707 mii_read (dev, phy_addr, PCS_ANLPAR); 1708 np->speed = 1000; 1709 if (negotiate & PCS_ANAR_FULL_DUPLEX) { 1710 printk (KERN_INFO "Auto 1000 Mbps, Full duplex\n"); 1711 np->full_duplex = 1; 1712 } else { 1713 printk (KERN_INFO "Auto 1000 Mbps, half duplex\n"); 1714 np->full_duplex = 0; 1715 } 1716 if (negotiate & PCS_ANAR_PAUSE) { 1717 np->tx_flow &= 1; 1718 np->rx_flow &= 1; 1719 } else if (negotiate & PCS_ANAR_ASYMMETRIC) { 1720 np->tx_flow = 0; 1721 np->rx_flow &= 1; 1722 } 1723 /* else tx_flow, rx_flow = user select */ 1724 } else { 1725 __u16 bmcr = mii_read (dev, phy_addr, PCS_BMCR); 1726 printk (KERN_INFO "Operating at 1000 Mbps, "); 1727 if (bmcr & BMCR_FULLDPLX) { 1728 printk (KERN_CONT "Full duplex\n"); 1729 } else { 1730 printk (KERN_CONT "Half duplex\n"); 1731 } 1732 } 1733 if (np->tx_flow) 1734 printk(KERN_INFO "Enable Tx Flow Control\n"); 1735 else 1736 printk(KERN_INFO "Disable Tx Flow Control\n"); 1737 if (np->rx_flow) 1738 printk(KERN_INFO "Enable Rx Flow Control\n"); 1739 else 1740 printk(KERN_INFO "Disable Rx Flow Control\n"); 1741 1742 return 0; 1743 } 1744 1745 static int 1746 mii_set_media_pcs (struct net_device *dev) 1747 { 1748 __u16 bmcr; 1749 __u16 esr; 1750 __u16 anar; 1751 int phy_addr; 1752 struct netdev_private *np; 1753 np = netdev_priv(dev); 1754 phy_addr = np->phy_addr; 1755 1756 /* Auto-Negotiation? */ 1757 if (np->an_enable) { 1758 /* Advertise capabilities */ 1759 esr = mii_read (dev, phy_addr, PCS_ESR); 1760 anar = mii_read (dev, phy_addr, MII_ADVERTISE) & 1761 ~PCS_ANAR_HALF_DUPLEX & 1762 ~PCS_ANAR_FULL_DUPLEX; 1763 if (esr & (MII_ESR_1000BT_HD | MII_ESR_1000BX_HD)) 1764 anar |= PCS_ANAR_HALF_DUPLEX; 1765 if (esr & (MII_ESR_1000BT_FD | MII_ESR_1000BX_FD)) 1766 anar |= PCS_ANAR_FULL_DUPLEX; 1767 anar |= PCS_ANAR_PAUSE | PCS_ANAR_ASYMMETRIC; 1768 mii_write (dev, phy_addr, MII_ADVERTISE, anar); 1769 1770 /* Soft reset PHY */ 1771 mii_write (dev, phy_addr, MII_BMCR, BMCR_RESET); 1772 bmcr = BMCR_ANENABLE | BMCR_ANRESTART | BMCR_RESET; 1773 mii_write (dev, phy_addr, MII_BMCR, bmcr); 1774 mdelay(1); 1775 } else { 1776 /* Force speed setting */ 1777 /* PHY Reset */ 1778 bmcr = BMCR_RESET; 1779 mii_write (dev, phy_addr, MII_BMCR, bmcr); 1780 mdelay(10); 1781 if (np->full_duplex) { 1782 bmcr = BMCR_FULLDPLX; 1783 printk (KERN_INFO "Manual full duplex\n"); 1784 } else { 1785 bmcr = 0; 1786 printk (KERN_INFO "Manual half duplex\n"); 1787 } 1788 mii_write (dev, phy_addr, MII_BMCR, bmcr); 1789 mdelay(10); 1790 1791 /* Advertise nothing */ 1792 mii_write (dev, phy_addr, MII_ADVERTISE, 0); 1793 } 1794 return 0; 1795 } 1796 1797 1798 static int 1799 rio_close (struct net_device *dev) 1800 { 1801 struct netdev_private *np = netdev_priv(dev); 1802 struct pci_dev *pdev = np->pdev; 1803 1804 netif_stop_queue (dev); 1805 1806 rio_hw_stop(dev); 1807 1808 free_irq(pdev->irq, dev); 1809 timer_delete_sync(&np->timer); 1810 1811 free_list(dev); 1812 1813 return 0; 1814 } 1815 1816 static void 1817 rio_remove1 (struct pci_dev *pdev) 1818 { 1819 struct net_device *dev = pci_get_drvdata (pdev); 1820 1821 if (dev) { 1822 struct netdev_private *np = netdev_priv(dev); 1823 1824 unregister_netdev (dev); 1825 dma_free_coherent(&pdev->dev, RX_TOTAL_SIZE, np->rx_ring, 1826 np->rx_ring_dma); 1827 dma_free_coherent(&pdev->dev, TX_TOTAL_SIZE, np->tx_ring, 1828 np->tx_ring_dma); 1829 if (np->rmon_enable) 1830 pci_iounmap(pdev, np->ioaddr); 1831 pci_iounmap(pdev, np->eeprom_addr); 1832 free_netdev (dev); 1833 pci_release_regions (pdev); 1834 pci_disable_device (pdev); 1835 } 1836 } 1837 1838 #ifdef CONFIG_PM_SLEEP 1839 static int rio_suspend(struct device *device) 1840 { 1841 struct net_device *dev = dev_get_drvdata(device); 1842 struct netdev_private *np = netdev_priv(dev); 1843 1844 if (!netif_running(dev)) 1845 return 0; 1846 1847 netif_device_detach(dev); 1848 timer_delete_sync(&np->timer); 1849 rio_hw_stop(dev); 1850 1851 return 0; 1852 } 1853 1854 static int rio_resume(struct device *device) 1855 { 1856 struct net_device *dev = dev_get_drvdata(device); 1857 struct netdev_private *np = netdev_priv(dev); 1858 1859 if (!netif_running(dev)) 1860 return 0; 1861 1862 rio_reset_ring(np); 1863 rio_hw_init(dev); 1864 np->timer.expires = jiffies + 1 * HZ; 1865 add_timer(&np->timer); 1866 netif_device_attach(dev); 1867 dl2k_enable_int(np); 1868 1869 return 0; 1870 } 1871 1872 static DEFINE_SIMPLE_DEV_PM_OPS(rio_pm_ops, rio_suspend, rio_resume); 1873 #define RIO_PM_OPS (&rio_pm_ops) 1874 1875 #else 1876 1877 #define RIO_PM_OPS NULL 1878 1879 #endif /* CONFIG_PM_SLEEP */ 1880 1881 static struct pci_driver rio_driver = { 1882 .name = "dl2k", 1883 .id_table = rio_pci_tbl, 1884 .probe = rio_probe1, 1885 .remove = rio_remove1, 1886 .driver.pm = RIO_PM_OPS, 1887 }; 1888 1889 module_pci_driver(rio_driver); 1890 1891 /* Read Documentation/networking/device_drivers/ethernet/dlink/dl2k.rst. */ 1892