1 // SPDX-License-Identifier: GPL-2.0 2 /* Ethernet device driver for Cortina Systems Gemini SoC 3 * Also known as the StorLink SL3512 and SL3516 (SL351x) or Lepus 4 * Net Engine and Gigabit Ethernet MAC (GMAC) 5 * This hardware contains a TCP Offload Engine (TOE) but currently the 6 * driver does not make use of it. 7 * 8 * Authors: 9 * Linus Walleij <linus.walleij@linaro.org> 10 * Tobias Waldvogel <tobias.waldvogel@gmail.com> (OpenWRT) 11 * Michał Mirosław <mirq-linux@rere.qmqm.pl> 12 * Paulius Zaleckas <paulius.zaleckas@gmail.com> 13 * Giuseppe De Robertis <Giuseppe.DeRobertis@ba.infn.it> 14 * Gary Chen & Ch Hsu Storlink Semiconductor 15 */ 16 #include <linux/kernel.h> 17 #include <linux/init.h> 18 #include <linux/module.h> 19 #include <linux/platform_device.h> 20 #include <linux/spinlock.h> 21 #include <linux/slab.h> 22 #include <linux/dma-mapping.h> 23 #include <linux/cache.h> 24 #include <linux/interrupt.h> 25 #include <linux/reset.h> 26 #include <linux/clk.h> 27 #include <linux/of.h> 28 #include <linux/of_mdio.h> 29 #include <linux/of_net.h> 30 #include <linux/of_platform.h> 31 #include <linux/etherdevice.h> 32 #include <linux/if_vlan.h> 33 #include <linux/skbuff.h> 34 #include <linux/phy.h> 35 #include <linux/crc32.h> 36 #include <linux/ethtool.h> 37 #include <linux/tcp.h> 38 #include <linux/u64_stats_sync.h> 39 40 #include <linux/in.h> 41 #include <linux/ip.h> 42 #include <linux/ipv6.h> 43 44 #include "gemini.h" 45 46 #define DRV_NAME "gmac-gemini" 47 48 #define DEFAULT_MSG_ENABLE (NETIF_MSG_DRV | NETIF_MSG_PROBE | NETIF_MSG_LINK) 49 static int debug = -1; 50 module_param(debug, int, 0); 51 MODULE_PARM_DESC(debug, "Debug level (0=none,...,16=all)"); 52 53 #define HSIZE_8 0x00 54 #define HSIZE_16 0x01 55 #define HSIZE_32 0x02 56 57 #define HBURST_SINGLE 0x00 58 #define HBURST_INCR 0x01 59 #define HBURST_INCR4 0x02 60 #define HBURST_INCR8 0x03 61 62 #define HPROT_DATA_CACHE BIT(0) 63 #define HPROT_PRIVILIGED BIT(1) 64 #define HPROT_BUFFERABLE BIT(2) 65 #define HPROT_CACHABLE BIT(3) 66 67 #define DEFAULT_RX_COALESCE_NSECS 0 68 #define DEFAULT_GMAC_RXQ_ORDER 9 69 #define DEFAULT_GMAC_TXQ_ORDER 8 70 #define DEFAULT_RX_BUF_ORDER 11 71 #define DEFAULT_NAPI_WEIGHT 64 72 #define TX_MAX_FRAGS 16 73 #define TX_QUEUE_NUM 1 /* max: 6 */ 74 #define RX_MAX_ALLOC_ORDER 2 75 76 #define GMAC0_IRQ0_2 (GMAC0_TXDERR_INT_BIT | GMAC0_TXPERR_INT_BIT | \ 77 GMAC0_RXDERR_INT_BIT | GMAC0_RXPERR_INT_BIT) 78 #define GMAC0_IRQ0_TXQ0_INTS (GMAC0_SWTQ00_EOF_INT_BIT | \ 79 GMAC0_SWTQ00_FIN_INT_BIT) 80 #define GMAC0_IRQ4_8 (GMAC0_MIB_INT_BIT | GMAC0_RX_OVERRUN_INT_BIT) 81 82 #define GMAC_OFFLOAD_FEATURES (NETIF_F_SG | NETIF_F_IP_CSUM | \ 83 NETIF_F_IPV6_CSUM | NETIF_F_RXCSUM | \ 84 NETIF_F_TSO | NETIF_F_TSO_ECN | NETIF_F_TSO6) 85 86 /** 87 * struct gmac_queue_page - page buffer per-page info 88 * @page: the page struct 89 * @mapping: the dma address handle 90 */ 91 struct gmac_queue_page { 92 struct page *page; 93 dma_addr_t mapping; 94 }; 95 96 struct gmac_txq { 97 struct gmac_txdesc *ring; 98 struct sk_buff **skb; 99 unsigned int cptr; 100 unsigned int noirq_packets; 101 }; 102 103 struct gemini_ethernet; 104 105 struct gemini_ethernet_port { 106 u8 id; /* 0 or 1 */ 107 108 struct gemini_ethernet *geth; 109 struct net_device *netdev; 110 struct device *dev; 111 void __iomem *dma_base; 112 void __iomem *gmac_base; 113 struct clk *pclk; 114 struct reset_control *reset; 115 int irq; 116 __le32 mac_addr[3]; 117 118 void __iomem *rxq_rwptr; 119 struct gmac_rxdesc *rxq_ring; 120 unsigned int rxq_order; 121 122 struct napi_struct napi; 123 struct hrtimer rx_coalesce_timer; 124 unsigned int rx_coalesce_nsecs; 125 unsigned int freeq_refill; 126 struct gmac_txq txq[TX_QUEUE_NUM]; 127 unsigned int txq_order; 128 unsigned int irq_every_tx_packets; 129 130 dma_addr_t rxq_dma_base; 131 dma_addr_t txq_dma_base; 132 133 unsigned int msg_enable; 134 spinlock_t config_lock; /* Locks config register */ 135 136 struct u64_stats_sync tx_stats_syncp; 137 struct u64_stats_sync rx_stats_syncp; 138 struct u64_stats_sync ir_stats_syncp; 139 140 struct rtnl_link_stats64 stats; 141 u64 hw_stats[RX_STATS_NUM]; 142 u64 rx_stats[RX_STATUS_NUM]; 143 u64 rx_csum_stats[RX_CHKSUM_NUM]; 144 u64 rx_napi_exits; 145 u64 tx_frag_stats[TX_MAX_FRAGS]; 146 u64 tx_frags_linearized; 147 u64 tx_hw_csummed; 148 }; 149 150 struct gemini_ethernet { 151 struct device *dev; 152 void __iomem *base; 153 struct gemini_ethernet_port *port0; 154 struct gemini_ethernet_port *port1; 155 bool initialized; 156 157 spinlock_t irq_lock; /* Locks IRQ-related registers */ 158 unsigned int freeq_order; 159 unsigned int freeq_frag_order; 160 struct gmac_rxdesc *freeq_ring; 161 dma_addr_t freeq_dma_base; 162 struct gmac_queue_page *freeq_pages; 163 unsigned int num_freeq_pages; 164 spinlock_t freeq_lock; /* Locks queue from reentrance */ 165 }; 166 167 #define GMAC_STATS_NUM ( \ 168 RX_STATS_NUM + RX_STATUS_NUM + RX_CHKSUM_NUM + 1 + \ 169 TX_MAX_FRAGS + 2) 170 171 static const char gmac_stats_strings[GMAC_STATS_NUM][ETH_GSTRING_LEN] = { 172 "GMAC_IN_DISCARDS", 173 "GMAC_IN_ERRORS", 174 "GMAC_IN_MCAST", 175 "GMAC_IN_BCAST", 176 "GMAC_IN_MAC1", 177 "GMAC_IN_MAC2", 178 "RX_STATUS_GOOD_FRAME", 179 "RX_STATUS_TOO_LONG_GOOD_CRC", 180 "RX_STATUS_RUNT_FRAME", 181 "RX_STATUS_SFD_NOT_FOUND", 182 "RX_STATUS_CRC_ERROR", 183 "RX_STATUS_TOO_LONG_BAD_CRC", 184 "RX_STATUS_ALIGNMENT_ERROR", 185 "RX_STATUS_TOO_LONG_BAD_ALIGN", 186 "RX_STATUS_RX_ERR", 187 "RX_STATUS_DA_FILTERED", 188 "RX_STATUS_BUFFER_FULL", 189 "RX_STATUS_11", 190 "RX_STATUS_12", 191 "RX_STATUS_13", 192 "RX_STATUS_14", 193 "RX_STATUS_15", 194 "RX_CHKSUM_IP_UDP_TCP_OK", 195 "RX_CHKSUM_IP_OK_ONLY", 196 "RX_CHKSUM_NONE", 197 "RX_CHKSUM_3", 198 "RX_CHKSUM_IP_ERR_UNKNOWN", 199 "RX_CHKSUM_IP_ERR", 200 "RX_CHKSUM_TCP_UDP_ERR", 201 "RX_CHKSUM_7", 202 "RX_NAPI_EXITS", 203 "TX_FRAGS[1]", 204 "TX_FRAGS[2]", 205 "TX_FRAGS[3]", 206 "TX_FRAGS[4]", 207 "TX_FRAGS[5]", 208 "TX_FRAGS[6]", 209 "TX_FRAGS[7]", 210 "TX_FRAGS[8]", 211 "TX_FRAGS[9]", 212 "TX_FRAGS[10]", 213 "TX_FRAGS[11]", 214 "TX_FRAGS[12]", 215 "TX_FRAGS[13]", 216 "TX_FRAGS[14]", 217 "TX_FRAGS[15]", 218 "TX_FRAGS[16+]", 219 "TX_FRAGS_LINEARIZED", 220 "TX_HW_CSUMMED", 221 }; 222 223 static void gmac_dump_dma_state(struct net_device *netdev); 224 225 static void gmac_update_config0_reg(struct net_device *netdev, 226 u32 val, u32 vmask) 227 { 228 struct gemini_ethernet_port *port = netdev_priv(netdev); 229 unsigned long flags; 230 u32 reg; 231 232 spin_lock_irqsave(&port->config_lock, flags); 233 234 reg = readl(port->gmac_base + GMAC_CONFIG0); 235 reg = (reg & ~vmask) | val; 236 writel(reg, port->gmac_base + GMAC_CONFIG0); 237 238 spin_unlock_irqrestore(&port->config_lock, flags); 239 } 240 241 static void gmac_enable_tx_rx(struct net_device *netdev) 242 { 243 struct gemini_ethernet_port *port = netdev_priv(netdev); 244 unsigned long flags; 245 u32 reg; 246 247 spin_lock_irqsave(&port->config_lock, flags); 248 249 reg = readl(port->gmac_base + GMAC_CONFIG0); 250 reg &= ~CONFIG0_TX_RX_DISABLE; 251 writel(reg, port->gmac_base + GMAC_CONFIG0); 252 253 spin_unlock_irqrestore(&port->config_lock, flags); 254 } 255 256 static void gmac_disable_tx_rx(struct net_device *netdev) 257 { 258 struct gemini_ethernet_port *port = netdev_priv(netdev); 259 unsigned long flags; 260 u32 val; 261 262 spin_lock_irqsave(&port->config_lock, flags); 263 264 val = readl(port->gmac_base + GMAC_CONFIG0); 265 val |= CONFIG0_TX_RX_DISABLE; 266 writel(val, port->gmac_base + GMAC_CONFIG0); 267 268 spin_unlock_irqrestore(&port->config_lock, flags); 269 270 mdelay(10); /* let GMAC consume packet */ 271 } 272 273 static void gmac_set_flow_control(struct net_device *netdev, bool tx, bool rx) 274 { 275 struct gemini_ethernet_port *port = netdev_priv(netdev); 276 unsigned long flags; 277 u32 val; 278 279 spin_lock_irqsave(&port->config_lock, flags); 280 281 val = readl(port->gmac_base + GMAC_CONFIG0); 282 val &= ~CONFIG0_FLOW_CTL; 283 if (tx) 284 val |= CONFIG0_FLOW_TX; 285 if (rx) 286 val |= CONFIG0_FLOW_RX; 287 writel(val, port->gmac_base + GMAC_CONFIG0); 288 289 spin_unlock_irqrestore(&port->config_lock, flags); 290 } 291 292 static void gmac_speed_set(struct net_device *netdev) 293 { 294 struct gemini_ethernet_port *port = netdev_priv(netdev); 295 struct phy_device *phydev = netdev->phydev; 296 union gmac_status status, old_status; 297 int pause_tx = 0; 298 int pause_rx = 0; 299 300 status.bits32 = readl(port->gmac_base + GMAC_STATUS); 301 old_status.bits32 = status.bits32; 302 status.bits.link = phydev->link; 303 status.bits.duplex = phydev->duplex; 304 305 switch (phydev->speed) { 306 case 1000: 307 status.bits.speed = GMAC_SPEED_1000; 308 if (phy_interface_mode_is_rgmii(phydev->interface)) 309 status.bits.mii_rmii = GMAC_PHY_RGMII_1000; 310 netdev_dbg(netdev, "connect %s to RGMII @ 1Gbit\n", 311 phydev_name(phydev)); 312 break; 313 case 100: 314 status.bits.speed = GMAC_SPEED_100; 315 if (phy_interface_mode_is_rgmii(phydev->interface)) 316 status.bits.mii_rmii = GMAC_PHY_RGMII_100_10; 317 netdev_dbg(netdev, "connect %s to RGMII @ 100 Mbit\n", 318 phydev_name(phydev)); 319 break; 320 case 10: 321 status.bits.speed = GMAC_SPEED_10; 322 if (phy_interface_mode_is_rgmii(phydev->interface)) 323 status.bits.mii_rmii = GMAC_PHY_RGMII_100_10; 324 netdev_dbg(netdev, "connect %s to RGMII @ 10 Mbit\n", 325 phydev_name(phydev)); 326 break; 327 default: 328 netdev_warn(netdev, "Unsupported PHY speed (%d) on %s\n", 329 phydev->speed, phydev_name(phydev)); 330 } 331 332 if (phydev->duplex == DUPLEX_FULL) { 333 u16 lcladv = phy_read(phydev, MII_ADVERTISE); 334 u16 rmtadv = phy_read(phydev, MII_LPA); 335 u8 cap = mii_resolve_flowctrl_fdx(lcladv, rmtadv); 336 337 if (cap & FLOW_CTRL_RX) 338 pause_rx = 1; 339 if (cap & FLOW_CTRL_TX) 340 pause_tx = 1; 341 } 342 343 gmac_set_flow_control(netdev, pause_tx, pause_rx); 344 345 if (old_status.bits32 == status.bits32) 346 return; 347 348 if (netif_msg_link(port)) { 349 phy_print_status(phydev); 350 netdev_info(netdev, "link flow control: %s\n", 351 phydev->pause 352 ? (phydev->asym_pause ? "tx" : "both") 353 : (phydev->asym_pause ? "rx" : "none") 354 ); 355 } 356 357 gmac_disable_tx_rx(netdev); 358 writel(status.bits32, port->gmac_base + GMAC_STATUS); 359 gmac_enable_tx_rx(netdev); 360 } 361 362 static int gmac_setup_phy(struct net_device *netdev) 363 { 364 struct gemini_ethernet_port *port = netdev_priv(netdev); 365 union gmac_status status = { .bits32 = 0 }; 366 struct device *dev = port->dev; 367 struct phy_device *phy; 368 369 phy = of_phy_get_and_connect(netdev, 370 dev->of_node, 371 gmac_speed_set); 372 if (!phy) 373 return -ENODEV; 374 netdev->phydev = phy; 375 376 phy_set_max_speed(phy, SPEED_1000); 377 phy_support_asym_pause(phy); 378 379 /* set PHY interface type */ 380 switch (phy->interface) { 381 case PHY_INTERFACE_MODE_MII: 382 netdev_dbg(netdev, 383 "MII: set GMAC0 to GMII mode, GMAC1 disabled\n"); 384 status.bits.mii_rmii = GMAC_PHY_MII; 385 break; 386 case PHY_INTERFACE_MODE_GMII: 387 netdev_dbg(netdev, 388 "GMII: set GMAC0 to GMII mode, GMAC1 disabled\n"); 389 status.bits.mii_rmii = GMAC_PHY_GMII; 390 break; 391 case PHY_INTERFACE_MODE_RGMII: 392 case PHY_INTERFACE_MODE_RGMII_ID: 393 case PHY_INTERFACE_MODE_RGMII_TXID: 394 case PHY_INTERFACE_MODE_RGMII_RXID: 395 netdev_dbg(netdev, 396 "RGMII: set GMAC0 and GMAC1 to MII/RGMII mode\n"); 397 status.bits.mii_rmii = GMAC_PHY_RGMII_100_10; 398 break; 399 default: 400 netdev_err(netdev, "Unsupported MII interface\n"); 401 phy_disconnect(phy); 402 netdev->phydev = NULL; 403 return -EINVAL; 404 } 405 writel(status.bits32, port->gmac_base + GMAC_STATUS); 406 407 if (netif_msg_link(port)) 408 phy_attached_info(phy); 409 410 return 0; 411 } 412 413 /* The maximum frame length is not logically enumerated in the 414 * hardware, so we do a table lookup to find the applicable max 415 * frame length. 416 */ 417 struct gmac_max_framelen { 418 unsigned int max_l3_len; 419 u8 val; 420 }; 421 422 static const struct gmac_max_framelen gmac_maxlens[] = { 423 { 424 .max_l3_len = 1518, 425 .val = CONFIG0_MAXLEN_1518, 426 }, 427 { 428 .max_l3_len = 1522, 429 .val = CONFIG0_MAXLEN_1522, 430 }, 431 { 432 .max_l3_len = 1536, 433 .val = CONFIG0_MAXLEN_1536, 434 }, 435 { 436 .max_l3_len = 1542, 437 .val = CONFIG0_MAXLEN_1542, 438 }, 439 { 440 .max_l3_len = 9212, 441 .val = CONFIG0_MAXLEN_9k, 442 }, 443 { 444 .max_l3_len = 10236, 445 .val = CONFIG0_MAXLEN_10k, 446 }, 447 }; 448 449 static int gmac_pick_rx_max_len(unsigned int max_l3_len) 450 { 451 const struct gmac_max_framelen *maxlen; 452 int maxtot; 453 int i; 454 455 maxtot = max_l3_len + ETH_HLEN + VLAN_HLEN; 456 457 for (i = 0; i < ARRAY_SIZE(gmac_maxlens); i++) { 458 maxlen = &gmac_maxlens[i]; 459 if (maxtot <= maxlen->max_l3_len) 460 return maxlen->val; 461 } 462 463 return -1; 464 } 465 466 static int gmac_init(struct net_device *netdev) 467 { 468 struct gemini_ethernet_port *port = netdev_priv(netdev); 469 union gmac_config0 config0 = { .bits = { 470 .dis_tx = 1, 471 .dis_rx = 1, 472 .ipv4_rx_chksum = 1, 473 .ipv6_rx_chksum = 1, 474 .rx_err_detect = 1, 475 .rgmm_edge = 1, 476 .port0_chk_hwq = 1, 477 .port1_chk_hwq = 1, 478 .port0_chk_toeq = 1, 479 .port1_chk_toeq = 1, 480 .port0_chk_classq = 1, 481 .port1_chk_classq = 1, 482 } }; 483 union gmac_ahb_weight ahb_weight = { .bits = { 484 .rx_weight = 1, 485 .tx_weight = 1, 486 .hash_weight = 1, 487 .pre_req = 0x1f, 488 .tq_dv_threshold = 0, 489 } }; 490 union gmac_tx_wcr0 hw_weigh = { .bits = { 491 .hw_tq3 = 1, 492 .hw_tq2 = 1, 493 .hw_tq1 = 1, 494 .hw_tq0 = 1, 495 } }; 496 union gmac_tx_wcr1 sw_weigh = { .bits = { 497 .sw_tq5 = 1, 498 .sw_tq4 = 1, 499 .sw_tq3 = 1, 500 .sw_tq2 = 1, 501 .sw_tq1 = 1, 502 .sw_tq0 = 1, 503 } }; 504 union gmac_config1 config1 = { .bits = { 505 .set_threshold = 16, 506 .rel_threshold = 24, 507 } }; 508 union gmac_config2 config2 = { .bits = { 509 .set_threshold = 16, 510 .rel_threshold = 32, 511 } }; 512 union gmac_config3 config3 = { .bits = { 513 .set_threshold = 0, 514 .rel_threshold = 0, 515 } }; 516 union gmac_config0 tmp; 517 518 config0.bits.max_len = gmac_pick_rx_max_len(netdev->mtu); 519 tmp.bits32 = readl(port->gmac_base + GMAC_CONFIG0); 520 config0.bits.reserved = tmp.bits.reserved; 521 writel(config0.bits32, port->gmac_base + GMAC_CONFIG0); 522 writel(config1.bits32, port->gmac_base + GMAC_CONFIG1); 523 writel(config2.bits32, port->gmac_base + GMAC_CONFIG2); 524 writel(config3.bits32, port->gmac_base + GMAC_CONFIG3); 525 526 readl(port->dma_base + GMAC_AHB_WEIGHT_REG); 527 writel(ahb_weight.bits32, port->dma_base + GMAC_AHB_WEIGHT_REG); 528 529 writel(hw_weigh.bits32, 530 port->dma_base + GMAC_TX_WEIGHTING_CTRL_0_REG); 531 writel(sw_weigh.bits32, 532 port->dma_base + GMAC_TX_WEIGHTING_CTRL_1_REG); 533 534 port->rxq_order = DEFAULT_GMAC_RXQ_ORDER; 535 port->txq_order = DEFAULT_GMAC_TXQ_ORDER; 536 port->rx_coalesce_nsecs = DEFAULT_RX_COALESCE_NSECS; 537 538 /* Mark every quarter of the queue a packet for interrupt 539 * in order to be able to wake up the queue if it was stopped 540 */ 541 port->irq_every_tx_packets = 1 << (port->txq_order - 2); 542 543 return 0; 544 } 545 546 static int gmac_setup_txqs(struct net_device *netdev) 547 { 548 struct gemini_ethernet_port *port = netdev_priv(netdev); 549 unsigned int n_txq = netdev->num_tx_queues; 550 struct gemini_ethernet *geth = port->geth; 551 size_t entries = 1 << port->txq_order; 552 struct gmac_txq *txq = port->txq; 553 struct gmac_txdesc *desc_ring; 554 size_t len = n_txq * entries; 555 struct sk_buff **skb_tab; 556 void __iomem *rwptr_reg; 557 unsigned int r; 558 int i; 559 560 rwptr_reg = port->dma_base + GMAC_SW_TX_QUEUE0_PTR_REG; 561 562 skb_tab = kcalloc(len, sizeof(*skb_tab), GFP_KERNEL); 563 if (!skb_tab) 564 return -ENOMEM; 565 566 desc_ring = dma_alloc_coherent(geth->dev, len * sizeof(*desc_ring), 567 &port->txq_dma_base, GFP_KERNEL); 568 569 if (!desc_ring) { 570 kfree(skb_tab); 571 return -ENOMEM; 572 } 573 574 if (port->txq_dma_base & ~DMA_Q_BASE_MASK) { 575 dev_warn(geth->dev, "TX queue base is not aligned\n"); 576 dma_free_coherent(geth->dev, len * sizeof(*desc_ring), 577 desc_ring, port->txq_dma_base); 578 kfree(skb_tab); 579 return -ENOMEM; 580 } 581 582 writel(port->txq_dma_base | port->txq_order, 583 port->dma_base + GMAC_SW_TX_QUEUE_BASE_REG); 584 585 for (i = 0; i < n_txq; i++) { 586 txq->ring = desc_ring; 587 txq->skb = skb_tab; 588 txq->noirq_packets = 0; 589 590 r = readw(rwptr_reg); 591 rwptr_reg += 2; 592 writew(r, rwptr_reg); 593 rwptr_reg += 2; 594 txq->cptr = r; 595 596 txq++; 597 desc_ring += entries; 598 skb_tab += entries; 599 } 600 601 return 0; 602 } 603 604 static void gmac_clean_txq(struct net_device *netdev, struct gmac_txq *txq, 605 unsigned int r) 606 { 607 struct gemini_ethernet_port *port = netdev_priv(netdev); 608 unsigned int m = (1 << port->txq_order) - 1; 609 struct gemini_ethernet *geth = port->geth; 610 unsigned int c = txq->cptr; 611 union gmac_txdesc_0 word0; 612 union gmac_txdesc_1 word1; 613 unsigned int hwchksum = 0; 614 unsigned long bytes = 0; 615 struct gmac_txdesc *txd; 616 unsigned short nfrags; 617 unsigned int errs = 0; 618 unsigned int pkts = 0; 619 unsigned int word3; 620 dma_addr_t mapping; 621 622 if (c == r) 623 return; 624 625 while (c != r) { 626 txd = txq->ring + c; 627 word0 = txd->word0; 628 word1 = txd->word1; 629 mapping = txd->word2.buf_adr; 630 word3 = txd->word3.bits32; 631 632 dma_unmap_single(geth->dev, mapping, 633 word0.bits.buffer_size, DMA_TO_DEVICE); 634 635 if (word3 & EOF_BIT) 636 dev_kfree_skb(txq->skb[c]); 637 638 c++; 639 c &= m; 640 641 if (!(word3 & SOF_BIT)) 642 continue; 643 644 if (!word0.bits.status_tx_ok) { 645 errs++; 646 continue; 647 } 648 649 pkts++; 650 bytes += txd->word1.bits.byte_count; 651 652 if (word1.bits32 & TSS_CHECKUM_ENABLE) 653 hwchksum++; 654 655 nfrags = word0.bits.desc_count - 1; 656 if (nfrags) { 657 if (nfrags >= TX_MAX_FRAGS) 658 nfrags = TX_MAX_FRAGS - 1; 659 660 u64_stats_update_begin(&port->tx_stats_syncp); 661 port->tx_frag_stats[nfrags]++; 662 u64_stats_update_end(&port->tx_stats_syncp); 663 } 664 } 665 666 u64_stats_update_begin(&port->ir_stats_syncp); 667 port->stats.tx_errors += errs; 668 port->stats.tx_packets += pkts; 669 port->stats.tx_bytes += bytes; 670 port->tx_hw_csummed += hwchksum; 671 u64_stats_update_end(&port->ir_stats_syncp); 672 673 txq->cptr = c; 674 } 675 676 static void gmac_cleanup_txqs(struct net_device *netdev) 677 { 678 struct gemini_ethernet_port *port = netdev_priv(netdev); 679 unsigned int n_txq = netdev->num_tx_queues; 680 struct gemini_ethernet *geth = port->geth; 681 void __iomem *rwptr_reg; 682 unsigned int r, i; 683 684 rwptr_reg = port->dma_base + GMAC_SW_TX_QUEUE0_PTR_REG; 685 686 for (i = 0; i < n_txq; i++) { 687 r = readw(rwptr_reg); 688 rwptr_reg += 2; 689 writew(r, rwptr_reg); 690 rwptr_reg += 2; 691 692 gmac_clean_txq(netdev, port->txq + i, r); 693 } 694 writel(0, port->dma_base + GMAC_SW_TX_QUEUE_BASE_REG); 695 696 kfree(port->txq->skb); 697 dma_free_coherent(geth->dev, 698 n_txq * sizeof(*port->txq->ring) << port->txq_order, 699 port->txq->ring, port->txq_dma_base); 700 } 701 702 static int gmac_setup_rxq(struct net_device *netdev) 703 { 704 struct gemini_ethernet_port *port = netdev_priv(netdev); 705 struct gemini_ethernet *geth = port->geth; 706 struct nontoe_qhdr __iomem *qhdr; 707 708 qhdr = geth->base + TOE_DEFAULT_Q_HDR_BASE(netdev->dev_id); 709 port->rxq_rwptr = &qhdr->word1; 710 711 /* Remap a slew of memory to use for the RX queue */ 712 port->rxq_ring = dma_alloc_coherent(geth->dev, 713 sizeof(*port->rxq_ring) << port->rxq_order, 714 &port->rxq_dma_base, GFP_KERNEL); 715 if (!port->rxq_ring) 716 return -ENOMEM; 717 if (port->rxq_dma_base & ~NONTOE_QHDR0_BASE_MASK) { 718 dev_warn(geth->dev, "RX queue base is not aligned\n"); 719 return -ENOMEM; 720 } 721 722 writel(port->rxq_dma_base | port->rxq_order, &qhdr->word0); 723 writel(0, port->rxq_rwptr); 724 return 0; 725 } 726 727 static struct gmac_queue_page * 728 gmac_get_queue_page(struct gemini_ethernet *geth, 729 struct gemini_ethernet_port *port, 730 dma_addr_t addr) 731 { 732 struct gmac_queue_page *gpage; 733 dma_addr_t mapping; 734 int i; 735 736 /* Only look for even pages */ 737 mapping = addr & PAGE_MASK; 738 739 if (!geth->freeq_pages) { 740 dev_err(geth->dev, "try to get page with no page list\n"); 741 return NULL; 742 } 743 744 /* Look up a ring buffer page from virtual mapping */ 745 for (i = 0; i < geth->num_freeq_pages; i++) { 746 gpage = &geth->freeq_pages[i]; 747 if (gpage->mapping == mapping) 748 return gpage; 749 } 750 751 return NULL; 752 } 753 754 static void gmac_cleanup_rxq(struct net_device *netdev) 755 { 756 struct gemini_ethernet_port *port = netdev_priv(netdev); 757 struct gemini_ethernet *geth = port->geth; 758 struct gmac_rxdesc *rxd = port->rxq_ring; 759 static struct gmac_queue_page *gpage; 760 struct nontoe_qhdr __iomem *qhdr; 761 void __iomem *dma_reg; 762 void __iomem *ptr_reg; 763 dma_addr_t mapping; 764 union dma_rwptr rw; 765 unsigned int r, w; 766 767 qhdr = geth->base + 768 TOE_DEFAULT_Q_HDR_BASE(netdev->dev_id); 769 dma_reg = &qhdr->word0; 770 ptr_reg = &qhdr->word1; 771 772 rw.bits32 = readl(ptr_reg); 773 r = rw.bits.rptr; 774 w = rw.bits.wptr; 775 writew(r, ptr_reg + 2); 776 777 writel(0, dma_reg); 778 779 /* Loop from read pointer to write pointer of the RX queue 780 * and free up all pages by the queue. 781 */ 782 while (r != w) { 783 mapping = rxd[r].word2.buf_adr; 784 r++; 785 r &= ((1 << port->rxq_order) - 1); 786 787 if (!mapping) 788 continue; 789 790 /* Freeq pointers are one page off */ 791 gpage = gmac_get_queue_page(geth, port, mapping + PAGE_SIZE); 792 if (!gpage) { 793 dev_err(geth->dev, "could not find page\n"); 794 continue; 795 } 796 /* Release the RX queue reference to the page */ 797 put_page(gpage->page); 798 } 799 800 dma_free_coherent(geth->dev, sizeof(*port->rxq_ring) << port->rxq_order, 801 port->rxq_ring, port->rxq_dma_base); 802 } 803 804 static struct page *geth_freeq_alloc_map_page(struct gemini_ethernet *geth, 805 int pn) 806 { 807 struct gmac_rxdesc *freeq_entry; 808 struct gmac_queue_page *gpage; 809 unsigned int fpp_order; 810 unsigned int frag_len; 811 dma_addr_t mapping; 812 struct page *page; 813 int i; 814 815 /* First allocate and DMA map a single page */ 816 page = alloc_page(GFP_ATOMIC); 817 if (!page) 818 return NULL; 819 820 mapping = dma_map_single(geth->dev, page_address(page), 821 PAGE_SIZE, DMA_FROM_DEVICE); 822 if (dma_mapping_error(geth->dev, mapping)) { 823 put_page(page); 824 return NULL; 825 } 826 827 /* The assign the page mapping (physical address) to the buffer address 828 * in the hardware queue. PAGE_SHIFT on ARM is 12 (1 page is 4096 bytes, 829 * 4k), and the default RX frag order is 11 (fragments are up 20 2048 830 * bytes, 2k) so fpp_order (fragments per page order) is default 1. Thus 831 * each page normally needs two entries in the queue. 832 */ 833 frag_len = 1 << geth->freeq_frag_order; /* Usually 2048 */ 834 fpp_order = PAGE_SHIFT - geth->freeq_frag_order; 835 freeq_entry = geth->freeq_ring + (pn << fpp_order); 836 dev_dbg(geth->dev, "allocate page %d fragment length %d fragments per page %d, freeq entry %p\n", 837 pn, frag_len, (1 << fpp_order), freeq_entry); 838 for (i = (1 << fpp_order); i > 0; i--) { 839 freeq_entry->word2.buf_adr = mapping; 840 freeq_entry++; 841 mapping += frag_len; 842 } 843 844 /* If the freeq entry already has a page mapped, then unmap it. */ 845 gpage = &geth->freeq_pages[pn]; 846 if (gpage->page) { 847 mapping = geth->freeq_ring[pn << fpp_order].word2.buf_adr; 848 dma_unmap_single(geth->dev, mapping, frag_len, DMA_FROM_DEVICE); 849 /* This should be the last reference to the page so it gets 850 * released 851 */ 852 put_page(gpage->page); 853 } 854 855 /* Then put our new mapping into the page table */ 856 dev_dbg(geth->dev, "page %d, DMA addr: %08x, page %p\n", 857 pn, (unsigned int)mapping, page); 858 gpage->mapping = mapping; 859 gpage->page = page; 860 861 return page; 862 } 863 864 /** 865 * geth_fill_freeq() - Fill the freeq with empty fragments to use 866 * @geth: the ethernet adapter 867 * @refill: whether to reset the queue by filling in all freeq entries or 868 * just refill it, usually the interrupt to refill the queue happens when 869 * the queue is half empty. 870 */ 871 static unsigned int geth_fill_freeq(struct gemini_ethernet *geth, bool refill) 872 { 873 unsigned int fpp_order = PAGE_SHIFT - geth->freeq_frag_order; 874 unsigned int count = 0; 875 unsigned int pn, epn; 876 unsigned long flags; 877 union dma_rwptr rw; 878 unsigned int m_pn; 879 880 /* Mask for page */ 881 m_pn = (1 << (geth->freeq_order - fpp_order)) - 1; 882 883 spin_lock_irqsave(&geth->freeq_lock, flags); 884 885 rw.bits32 = readl(geth->base + GLOBAL_SWFQ_RWPTR_REG); 886 pn = (refill ? rw.bits.wptr : rw.bits.rptr) >> fpp_order; 887 epn = (rw.bits.rptr >> fpp_order) - 1; 888 epn &= m_pn; 889 890 /* Loop over the freeq ring buffer entries */ 891 while (pn != epn) { 892 struct gmac_queue_page *gpage; 893 struct page *page; 894 895 gpage = &geth->freeq_pages[pn]; 896 page = gpage->page; 897 898 dev_dbg(geth->dev, "fill entry %d page ref count %d add %d refs\n", 899 pn, page_ref_count(page), 1 << fpp_order); 900 901 if (page_ref_count(page) > 1) { 902 unsigned int fl = (pn - epn) & m_pn; 903 904 if (fl > 64 >> fpp_order) 905 break; 906 907 page = geth_freeq_alloc_map_page(geth, pn); 908 if (!page) 909 break; 910 } 911 912 /* Add one reference per fragment in the page */ 913 page_ref_add(page, 1 << fpp_order); 914 count += 1 << fpp_order; 915 pn++; 916 pn &= m_pn; 917 } 918 919 writew(pn << fpp_order, geth->base + GLOBAL_SWFQ_RWPTR_REG + 2); 920 921 spin_unlock_irqrestore(&geth->freeq_lock, flags); 922 923 return count; 924 } 925 926 static int geth_setup_freeq(struct gemini_ethernet *geth) 927 { 928 unsigned int fpp_order = PAGE_SHIFT - geth->freeq_frag_order; 929 unsigned int frag_len = 1 << geth->freeq_frag_order; 930 unsigned int len = 1 << geth->freeq_order; 931 unsigned int pages = len >> fpp_order; 932 union queue_threshold qt; 933 union dma_skb_size skbsz; 934 unsigned int filled; 935 unsigned int pn; 936 937 geth->freeq_ring = dma_alloc_coherent(geth->dev, 938 sizeof(*geth->freeq_ring) << geth->freeq_order, 939 &geth->freeq_dma_base, GFP_KERNEL); 940 if (!geth->freeq_ring) 941 return -ENOMEM; 942 if (geth->freeq_dma_base & ~DMA_Q_BASE_MASK) { 943 dev_warn(geth->dev, "queue ring base is not aligned\n"); 944 goto err_freeq; 945 } 946 947 /* Allocate a mapping to page look-up index */ 948 geth->freeq_pages = kcalloc(pages, sizeof(*geth->freeq_pages), 949 GFP_KERNEL); 950 if (!geth->freeq_pages) 951 goto err_freeq; 952 geth->num_freeq_pages = pages; 953 954 dev_info(geth->dev, "allocate %d pages for queue\n", pages); 955 for (pn = 0; pn < pages; pn++) 956 if (!geth_freeq_alloc_map_page(geth, pn)) 957 goto err_freeq_alloc; 958 959 filled = geth_fill_freeq(geth, false); 960 if (!filled) 961 goto err_freeq_alloc; 962 963 qt.bits32 = readl(geth->base + GLOBAL_QUEUE_THRESHOLD_REG); 964 qt.bits.swfq_empty = 32; 965 writel(qt.bits32, geth->base + GLOBAL_QUEUE_THRESHOLD_REG); 966 967 skbsz.bits.sw_skb_size = 1 << geth->freeq_frag_order; 968 writel(skbsz.bits32, geth->base + GLOBAL_DMA_SKB_SIZE_REG); 969 writel(geth->freeq_dma_base | geth->freeq_order, 970 geth->base + GLOBAL_SW_FREEQ_BASE_SIZE_REG); 971 972 return 0; 973 974 err_freeq_alloc: 975 while (pn > 0) { 976 struct gmac_queue_page *gpage; 977 dma_addr_t mapping; 978 979 --pn; 980 mapping = geth->freeq_ring[pn << fpp_order].word2.buf_adr; 981 dma_unmap_single(geth->dev, mapping, frag_len, DMA_FROM_DEVICE); 982 gpage = &geth->freeq_pages[pn]; 983 put_page(gpage->page); 984 } 985 986 kfree(geth->freeq_pages); 987 err_freeq: 988 dma_free_coherent(geth->dev, 989 sizeof(*geth->freeq_ring) << geth->freeq_order, 990 geth->freeq_ring, geth->freeq_dma_base); 991 geth->freeq_ring = NULL; 992 return -ENOMEM; 993 } 994 995 /** 996 * geth_cleanup_freeq() - cleanup the DMA mappings and free the queue 997 * @geth: the Gemini global ethernet state 998 */ 999 static void geth_cleanup_freeq(struct gemini_ethernet *geth) 1000 { 1001 unsigned int fpp_order = PAGE_SHIFT - geth->freeq_frag_order; 1002 unsigned int frag_len = 1 << geth->freeq_frag_order; 1003 unsigned int len = 1 << geth->freeq_order; 1004 unsigned int pages = len >> fpp_order; 1005 unsigned int pn; 1006 1007 writew(readw(geth->base + GLOBAL_SWFQ_RWPTR_REG), 1008 geth->base + GLOBAL_SWFQ_RWPTR_REG + 2); 1009 writel(0, geth->base + GLOBAL_SW_FREEQ_BASE_SIZE_REG); 1010 1011 for (pn = 0; pn < pages; pn++) { 1012 struct gmac_queue_page *gpage; 1013 dma_addr_t mapping; 1014 1015 mapping = geth->freeq_ring[pn << fpp_order].word2.buf_adr; 1016 dma_unmap_single(geth->dev, mapping, frag_len, DMA_FROM_DEVICE); 1017 1018 gpage = &geth->freeq_pages[pn]; 1019 while (page_ref_count(gpage->page) > 0) 1020 put_page(gpage->page); 1021 } 1022 1023 kfree(geth->freeq_pages); 1024 1025 dma_free_coherent(geth->dev, 1026 sizeof(*geth->freeq_ring) << geth->freeq_order, 1027 geth->freeq_ring, geth->freeq_dma_base); 1028 } 1029 1030 /** 1031 * geth_resize_freeq() - resize the software queue depth 1032 * @port: the port requesting the change 1033 * 1034 * This gets called at least once during probe() so the device queue gets 1035 * "resized" from the hardware defaults. Since both ports/net devices share 1036 * the same hardware queue, some synchronization between the ports is 1037 * needed. 1038 */ 1039 static int geth_resize_freeq(struct gemini_ethernet_port *port) 1040 { 1041 struct gemini_ethernet *geth = port->geth; 1042 struct net_device *netdev = port->netdev; 1043 struct gemini_ethernet_port *other_port; 1044 struct net_device *other_netdev; 1045 unsigned int new_size = 0; 1046 unsigned int new_order; 1047 unsigned long flags; 1048 u32 en; 1049 int ret; 1050 1051 if (netdev->dev_id == 0) 1052 other_netdev = geth->port1->netdev; 1053 else 1054 other_netdev = geth->port0->netdev; 1055 1056 if (other_netdev && netif_running(other_netdev)) 1057 return -EBUSY; 1058 1059 new_size = 1 << (port->rxq_order + 1); 1060 netdev_dbg(netdev, "port %d size: %d order %d\n", 1061 netdev->dev_id, 1062 new_size, 1063 port->rxq_order); 1064 if (other_netdev) { 1065 other_port = netdev_priv(other_netdev); 1066 new_size += 1 << (other_port->rxq_order + 1); 1067 netdev_dbg(other_netdev, "port %d size: %d order %d\n", 1068 other_netdev->dev_id, 1069 (1 << (other_port->rxq_order + 1)), 1070 other_port->rxq_order); 1071 } 1072 1073 new_order = min(15, ilog2(new_size - 1) + 1); 1074 dev_dbg(geth->dev, "set shared queue to size %d order %d\n", 1075 new_size, new_order); 1076 if (geth->freeq_order == new_order) 1077 return 0; 1078 1079 spin_lock_irqsave(&geth->irq_lock, flags); 1080 1081 /* Disable the software queue IRQs */ 1082 en = readl(geth->base + GLOBAL_INTERRUPT_ENABLE_4_REG); 1083 en &= ~SWFQ_EMPTY_INT_BIT; 1084 writel(en, geth->base + GLOBAL_INTERRUPT_ENABLE_4_REG); 1085 spin_unlock_irqrestore(&geth->irq_lock, flags); 1086 1087 /* Drop the old queue */ 1088 if (geth->freeq_ring) 1089 geth_cleanup_freeq(geth); 1090 1091 /* Allocate a new queue with the desired order */ 1092 geth->freeq_order = new_order; 1093 ret = geth_setup_freeq(geth); 1094 1095 /* Restart the interrupts - NOTE if this is the first resize 1096 * after probe(), this is where the interrupts get turned on 1097 * in the first place. 1098 */ 1099 spin_lock_irqsave(&geth->irq_lock, flags); 1100 en |= SWFQ_EMPTY_INT_BIT; 1101 writel(en, geth->base + GLOBAL_INTERRUPT_ENABLE_4_REG); 1102 spin_unlock_irqrestore(&geth->irq_lock, flags); 1103 1104 return ret; 1105 } 1106 1107 static void gmac_tx_irq_enable(struct net_device *netdev, 1108 unsigned int txq, int en) 1109 { 1110 struct gemini_ethernet_port *port = netdev_priv(netdev); 1111 struct gemini_ethernet *geth = port->geth; 1112 u32 val, mask; 1113 1114 netdev_dbg(netdev, "%s device %d\n", __func__, netdev->dev_id); 1115 1116 mask = GMAC0_IRQ0_TXQ0_INTS << (6 * netdev->dev_id + txq); 1117 1118 if (en) 1119 writel(mask, geth->base + GLOBAL_INTERRUPT_STATUS_0_REG); 1120 1121 val = readl(geth->base + GLOBAL_INTERRUPT_ENABLE_0_REG); 1122 val = en ? val | mask : val & ~mask; 1123 writel(val, geth->base + GLOBAL_INTERRUPT_ENABLE_0_REG); 1124 } 1125 1126 static void gmac_tx_irq(struct net_device *netdev, unsigned int txq_num) 1127 { 1128 struct netdev_queue *ntxq = netdev_get_tx_queue(netdev, txq_num); 1129 1130 gmac_tx_irq_enable(netdev, txq_num, 0); 1131 netif_tx_wake_queue(ntxq); 1132 } 1133 1134 static int gmac_map_tx_bufs(struct net_device *netdev, struct sk_buff *skb, 1135 struct gmac_txq *txq, unsigned short *desc) 1136 { 1137 struct gemini_ethernet_port *port = netdev_priv(netdev); 1138 struct skb_shared_info *skb_si = skb_shinfo(skb); 1139 unsigned short m = (1 << port->txq_order) - 1; 1140 short frag, last_frag = skb_si->nr_frags - 1; 1141 struct gemini_ethernet *geth = port->geth; 1142 unsigned int word1, word3, buflen; 1143 unsigned short w = *desc; 1144 struct gmac_txdesc *txd; 1145 skb_frag_t *skb_frag; 1146 dma_addr_t mapping; 1147 unsigned short mtu; 1148 void *buffer; 1149 1150 mtu = ETH_HLEN; 1151 mtu += netdev->mtu; 1152 if (skb->protocol == htons(ETH_P_8021Q)) 1153 mtu += VLAN_HLEN; 1154 1155 word1 = skb->len; 1156 word3 = SOF_BIT; 1157 1158 if (word1 > mtu) { 1159 word1 |= TSS_MTU_ENABLE_BIT; 1160 word3 |= mtu; 1161 } 1162 1163 if (skb->ip_summed != CHECKSUM_NONE) { 1164 int tcp = 0; 1165 1166 if (skb->protocol == htons(ETH_P_IP)) { 1167 word1 |= TSS_IP_CHKSUM_BIT; 1168 tcp = ip_hdr(skb)->protocol == IPPROTO_TCP; 1169 } else { /* IPv6 */ 1170 word1 |= TSS_IPV6_ENABLE_BIT; 1171 tcp = ipv6_hdr(skb)->nexthdr == IPPROTO_TCP; 1172 } 1173 1174 word1 |= tcp ? TSS_TCP_CHKSUM_BIT : TSS_UDP_CHKSUM_BIT; 1175 } 1176 1177 frag = -1; 1178 while (frag <= last_frag) { 1179 if (frag == -1) { 1180 buffer = skb->data; 1181 buflen = skb_headlen(skb); 1182 } else { 1183 skb_frag = skb_si->frags + frag; 1184 buffer = skb_frag_address(skb_frag); 1185 buflen = skb_frag_size(skb_frag); 1186 } 1187 1188 if (frag == last_frag) { 1189 word3 |= EOF_BIT; 1190 txq->skb[w] = skb; 1191 } 1192 1193 mapping = dma_map_single(geth->dev, buffer, buflen, 1194 DMA_TO_DEVICE); 1195 if (dma_mapping_error(geth->dev, mapping)) 1196 goto map_error; 1197 1198 txd = txq->ring + w; 1199 txd->word0.bits32 = buflen; 1200 txd->word1.bits32 = word1; 1201 txd->word2.buf_adr = mapping; 1202 txd->word3.bits32 = word3; 1203 1204 word3 &= MTU_SIZE_BIT_MASK; 1205 w++; 1206 w &= m; 1207 frag++; 1208 } 1209 1210 *desc = w; 1211 return 0; 1212 1213 map_error: 1214 while (w != *desc) { 1215 w--; 1216 w &= m; 1217 1218 dma_unmap_page(geth->dev, txq->ring[w].word2.buf_adr, 1219 txq->ring[w].word0.bits.buffer_size, 1220 DMA_TO_DEVICE); 1221 } 1222 return -ENOMEM; 1223 } 1224 1225 static netdev_tx_t gmac_start_xmit(struct sk_buff *skb, 1226 struct net_device *netdev) 1227 { 1228 struct gemini_ethernet_port *port = netdev_priv(netdev); 1229 unsigned short m = (1 << port->txq_order) - 1; 1230 struct netdev_queue *ntxq; 1231 unsigned short r, w, d; 1232 void __iomem *ptr_reg; 1233 struct gmac_txq *txq; 1234 int txq_num, nfrags; 1235 union dma_rwptr rw; 1236 1237 if (skb->len >= 0x10000) 1238 goto out_drop_free; 1239 1240 txq_num = skb_get_queue_mapping(skb); 1241 ptr_reg = port->dma_base + GMAC_SW_TX_QUEUE_PTR_REG(txq_num); 1242 txq = &port->txq[txq_num]; 1243 ntxq = netdev_get_tx_queue(netdev, txq_num); 1244 nfrags = skb_shinfo(skb)->nr_frags; 1245 1246 rw.bits32 = readl(ptr_reg); 1247 r = rw.bits.rptr; 1248 w = rw.bits.wptr; 1249 1250 d = txq->cptr - w - 1; 1251 d &= m; 1252 1253 if (d < nfrags + 2) { 1254 gmac_clean_txq(netdev, txq, r); 1255 d = txq->cptr - w - 1; 1256 d &= m; 1257 1258 if (d < nfrags + 2) { 1259 netif_tx_stop_queue(ntxq); 1260 1261 d = txq->cptr + nfrags + 16; 1262 d &= m; 1263 txq->ring[d].word3.bits.eofie = 1; 1264 gmac_tx_irq_enable(netdev, txq_num, 1); 1265 1266 u64_stats_update_begin(&port->tx_stats_syncp); 1267 netdev->stats.tx_fifo_errors++; 1268 u64_stats_update_end(&port->tx_stats_syncp); 1269 return NETDEV_TX_BUSY; 1270 } 1271 } 1272 1273 if (gmac_map_tx_bufs(netdev, skb, txq, &w)) { 1274 if (skb_linearize(skb)) 1275 goto out_drop; 1276 1277 u64_stats_update_begin(&port->tx_stats_syncp); 1278 port->tx_frags_linearized++; 1279 u64_stats_update_end(&port->tx_stats_syncp); 1280 1281 if (gmac_map_tx_bufs(netdev, skb, txq, &w)) 1282 goto out_drop_free; 1283 } 1284 1285 writew(w, ptr_reg + 2); 1286 1287 gmac_clean_txq(netdev, txq, r); 1288 return NETDEV_TX_OK; 1289 1290 out_drop_free: 1291 dev_kfree_skb(skb); 1292 out_drop: 1293 u64_stats_update_begin(&port->tx_stats_syncp); 1294 port->stats.tx_dropped++; 1295 u64_stats_update_end(&port->tx_stats_syncp); 1296 return NETDEV_TX_OK; 1297 } 1298 1299 static void gmac_tx_timeout(struct net_device *netdev, unsigned int txqueue) 1300 { 1301 netdev_err(netdev, "Tx timeout\n"); 1302 gmac_dump_dma_state(netdev); 1303 } 1304 1305 static void gmac_enable_irq(struct net_device *netdev, int enable) 1306 { 1307 struct gemini_ethernet_port *port = netdev_priv(netdev); 1308 struct gemini_ethernet *geth = port->geth; 1309 unsigned long flags; 1310 u32 val, mask; 1311 1312 netdev_dbg(netdev, "%s device %d %s\n", __func__, 1313 netdev->dev_id, enable ? "enable" : "disable"); 1314 spin_lock_irqsave(&geth->irq_lock, flags); 1315 1316 mask = GMAC0_IRQ0_2 << (netdev->dev_id * 2); 1317 val = readl(geth->base + GLOBAL_INTERRUPT_ENABLE_0_REG); 1318 val = enable ? (val | mask) : (val & ~mask); 1319 writel(val, geth->base + GLOBAL_INTERRUPT_ENABLE_0_REG); 1320 1321 mask = DEFAULT_Q0_INT_BIT << netdev->dev_id; 1322 val = readl(geth->base + GLOBAL_INTERRUPT_ENABLE_1_REG); 1323 val = enable ? (val | mask) : (val & ~mask); 1324 writel(val, geth->base + GLOBAL_INTERRUPT_ENABLE_1_REG); 1325 1326 mask = GMAC0_IRQ4_8 << (netdev->dev_id * 8); 1327 val = readl(geth->base + GLOBAL_INTERRUPT_ENABLE_4_REG); 1328 val = enable ? (val | mask) : (val & ~mask); 1329 writel(val, geth->base + GLOBAL_INTERRUPT_ENABLE_4_REG); 1330 1331 spin_unlock_irqrestore(&geth->irq_lock, flags); 1332 } 1333 1334 static void gmac_enable_rx_irq(struct net_device *netdev, int enable) 1335 { 1336 struct gemini_ethernet_port *port = netdev_priv(netdev); 1337 struct gemini_ethernet *geth = port->geth; 1338 unsigned long flags; 1339 u32 val, mask; 1340 1341 netdev_dbg(netdev, "%s device %d %s\n", __func__, netdev->dev_id, 1342 enable ? "enable" : "disable"); 1343 spin_lock_irqsave(&geth->irq_lock, flags); 1344 mask = DEFAULT_Q0_INT_BIT << netdev->dev_id; 1345 1346 val = readl(geth->base + GLOBAL_INTERRUPT_ENABLE_1_REG); 1347 val = enable ? (val | mask) : (val & ~mask); 1348 writel(val, geth->base + GLOBAL_INTERRUPT_ENABLE_1_REG); 1349 1350 spin_unlock_irqrestore(&geth->irq_lock, flags); 1351 } 1352 1353 static struct sk_buff *gmac_skb_if_good_frame(struct gemini_ethernet_port *port, 1354 union gmac_rxdesc_0 word0, 1355 unsigned int frame_len) 1356 { 1357 unsigned int rx_csum = word0.bits.chksum_status; 1358 unsigned int rx_status = word0.bits.status; 1359 struct sk_buff *skb = NULL; 1360 1361 port->rx_stats[rx_status]++; 1362 port->rx_csum_stats[rx_csum]++; 1363 1364 if (word0.bits.derr || word0.bits.perr || 1365 rx_status || frame_len < ETH_ZLEN || 1366 rx_csum >= RX_CHKSUM_IP_ERR_UNKNOWN) { 1367 port->stats.rx_errors++; 1368 1369 if (frame_len < ETH_ZLEN || RX_ERROR_LENGTH(rx_status)) 1370 port->stats.rx_length_errors++; 1371 if (RX_ERROR_OVER(rx_status)) 1372 port->stats.rx_over_errors++; 1373 if (RX_ERROR_CRC(rx_status)) 1374 port->stats.rx_crc_errors++; 1375 if (RX_ERROR_FRAME(rx_status)) 1376 port->stats.rx_frame_errors++; 1377 return NULL; 1378 } 1379 1380 skb = napi_get_frags(&port->napi); 1381 if (!skb) 1382 goto update_exit; 1383 1384 if (rx_csum == RX_CHKSUM_IP_UDP_TCP_OK) 1385 skb->ip_summed = CHECKSUM_UNNECESSARY; 1386 1387 update_exit: 1388 port->stats.rx_bytes += frame_len; 1389 port->stats.rx_packets++; 1390 return skb; 1391 } 1392 1393 static unsigned int gmac_rx(struct net_device *netdev, unsigned int budget) 1394 { 1395 struct gemini_ethernet_port *port = netdev_priv(netdev); 1396 unsigned short m = (1 << port->rxq_order) - 1; 1397 struct gemini_ethernet *geth = port->geth; 1398 void __iomem *ptr_reg = port->rxq_rwptr; 1399 unsigned int frame_len, frag_len; 1400 struct gmac_rxdesc *rx = NULL; 1401 struct gmac_queue_page *gpage; 1402 static struct sk_buff *skb; 1403 union gmac_rxdesc_0 word0; 1404 union gmac_rxdesc_1 word1; 1405 union gmac_rxdesc_3 word3; 1406 struct page *page = NULL; 1407 unsigned int page_offs; 1408 unsigned short r, w; 1409 union dma_rwptr rw; 1410 dma_addr_t mapping; 1411 int frag_nr = 0; 1412 1413 rw.bits32 = readl(ptr_reg); 1414 /* Reset interrupt as all packages until here are taken into account */ 1415 writel(DEFAULT_Q0_INT_BIT << netdev->dev_id, 1416 geth->base + GLOBAL_INTERRUPT_STATUS_1_REG); 1417 r = rw.bits.rptr; 1418 w = rw.bits.wptr; 1419 1420 while (budget && w != r) { 1421 rx = port->rxq_ring + r; 1422 word0 = rx->word0; 1423 word1 = rx->word1; 1424 mapping = rx->word2.buf_adr; 1425 word3 = rx->word3; 1426 1427 r++; 1428 r &= m; 1429 1430 frag_len = word0.bits.buffer_size; 1431 frame_len = word1.bits.byte_count; 1432 page_offs = mapping & ~PAGE_MASK; 1433 1434 if (!mapping) { 1435 netdev_err(netdev, 1436 "rxq[%u]: HW BUG: zero DMA desc\n", r); 1437 goto err_drop; 1438 } 1439 1440 /* Freeq pointers are one page off */ 1441 gpage = gmac_get_queue_page(geth, port, mapping + PAGE_SIZE); 1442 if (!gpage) { 1443 dev_err(geth->dev, "could not find mapping\n"); 1444 continue; 1445 } 1446 page = gpage->page; 1447 1448 if (word3.bits32 & SOF_BIT) { 1449 if (skb) { 1450 napi_free_frags(&port->napi); 1451 port->stats.rx_dropped++; 1452 } 1453 1454 skb = gmac_skb_if_good_frame(port, word0, frame_len); 1455 if (!skb) 1456 goto err_drop; 1457 1458 page_offs += NET_IP_ALIGN; 1459 frag_len -= NET_IP_ALIGN; 1460 frag_nr = 0; 1461 1462 } else if (!skb) { 1463 put_page(page); 1464 continue; 1465 } 1466 1467 if (word3.bits32 & EOF_BIT) 1468 frag_len = frame_len - skb->len; 1469 1470 /* append page frag to skb */ 1471 if (frag_nr == MAX_SKB_FRAGS) 1472 goto err_drop; 1473 1474 if (frag_len == 0) 1475 netdev_err(netdev, "Received fragment with len = 0\n"); 1476 1477 skb_fill_page_desc(skb, frag_nr, page, page_offs, frag_len); 1478 skb->len += frag_len; 1479 skb->data_len += frag_len; 1480 skb->truesize += frag_len; 1481 frag_nr++; 1482 1483 if (word3.bits32 & EOF_BIT) { 1484 napi_gro_frags(&port->napi); 1485 skb = NULL; 1486 --budget; 1487 } 1488 continue; 1489 1490 err_drop: 1491 if (skb) { 1492 napi_free_frags(&port->napi); 1493 skb = NULL; 1494 } 1495 1496 if (mapping) 1497 put_page(page); 1498 1499 port->stats.rx_dropped++; 1500 } 1501 1502 writew(r, ptr_reg); 1503 return budget; 1504 } 1505 1506 static int gmac_napi_poll(struct napi_struct *napi, int budget) 1507 { 1508 struct gemini_ethernet_port *port = netdev_priv(napi->dev); 1509 struct gemini_ethernet *geth = port->geth; 1510 unsigned int freeq_threshold; 1511 unsigned int received; 1512 1513 freeq_threshold = 1 << (geth->freeq_order - 1); 1514 u64_stats_update_begin(&port->rx_stats_syncp); 1515 1516 received = gmac_rx(napi->dev, budget); 1517 if (received < budget) { 1518 napi_gro_flush(napi, false); 1519 napi_complete_done(napi, received); 1520 gmac_enable_rx_irq(napi->dev, 1); 1521 ++port->rx_napi_exits; 1522 } 1523 1524 port->freeq_refill += (budget - received); 1525 if (port->freeq_refill > freeq_threshold) { 1526 port->freeq_refill -= freeq_threshold; 1527 geth_fill_freeq(geth, true); 1528 } 1529 1530 u64_stats_update_end(&port->rx_stats_syncp); 1531 return received; 1532 } 1533 1534 static void gmac_dump_dma_state(struct net_device *netdev) 1535 { 1536 struct gemini_ethernet_port *port = netdev_priv(netdev); 1537 struct gemini_ethernet *geth = port->geth; 1538 void __iomem *ptr_reg; 1539 u32 reg[5]; 1540 1541 /* Interrupt status */ 1542 reg[0] = readl(geth->base + GLOBAL_INTERRUPT_STATUS_0_REG); 1543 reg[1] = readl(geth->base + GLOBAL_INTERRUPT_STATUS_1_REG); 1544 reg[2] = readl(geth->base + GLOBAL_INTERRUPT_STATUS_2_REG); 1545 reg[3] = readl(geth->base + GLOBAL_INTERRUPT_STATUS_3_REG); 1546 reg[4] = readl(geth->base + GLOBAL_INTERRUPT_STATUS_4_REG); 1547 netdev_err(netdev, "IRQ status: 0x%08x 0x%08x 0x%08x 0x%08x 0x%08x\n", 1548 reg[0], reg[1], reg[2], reg[3], reg[4]); 1549 1550 /* Interrupt enable */ 1551 reg[0] = readl(geth->base + GLOBAL_INTERRUPT_ENABLE_0_REG); 1552 reg[1] = readl(geth->base + GLOBAL_INTERRUPT_ENABLE_1_REG); 1553 reg[2] = readl(geth->base + GLOBAL_INTERRUPT_ENABLE_2_REG); 1554 reg[3] = readl(geth->base + GLOBAL_INTERRUPT_ENABLE_3_REG); 1555 reg[4] = readl(geth->base + GLOBAL_INTERRUPT_ENABLE_4_REG); 1556 netdev_err(netdev, "IRQ enable: 0x%08x 0x%08x 0x%08x 0x%08x 0x%08x\n", 1557 reg[0], reg[1], reg[2], reg[3], reg[4]); 1558 1559 /* RX DMA status */ 1560 reg[0] = readl(port->dma_base + GMAC_DMA_RX_FIRST_DESC_REG); 1561 reg[1] = readl(port->dma_base + GMAC_DMA_RX_CURR_DESC_REG); 1562 reg[2] = GET_RPTR(port->rxq_rwptr); 1563 reg[3] = GET_WPTR(port->rxq_rwptr); 1564 netdev_err(netdev, "RX DMA regs: 0x%08x 0x%08x, ptr: %u %u\n", 1565 reg[0], reg[1], reg[2], reg[3]); 1566 1567 reg[0] = readl(port->dma_base + GMAC_DMA_RX_DESC_WORD0_REG); 1568 reg[1] = readl(port->dma_base + GMAC_DMA_RX_DESC_WORD1_REG); 1569 reg[2] = readl(port->dma_base + GMAC_DMA_RX_DESC_WORD2_REG); 1570 reg[3] = readl(port->dma_base + GMAC_DMA_RX_DESC_WORD3_REG); 1571 netdev_err(netdev, "RX DMA descriptor: 0x%08x 0x%08x 0x%08x 0x%08x\n", 1572 reg[0], reg[1], reg[2], reg[3]); 1573 1574 /* TX DMA status */ 1575 ptr_reg = port->dma_base + GMAC_SW_TX_QUEUE0_PTR_REG; 1576 1577 reg[0] = readl(port->dma_base + GMAC_DMA_TX_FIRST_DESC_REG); 1578 reg[1] = readl(port->dma_base + GMAC_DMA_TX_CURR_DESC_REG); 1579 reg[2] = GET_RPTR(ptr_reg); 1580 reg[3] = GET_WPTR(ptr_reg); 1581 netdev_err(netdev, "TX DMA regs: 0x%08x 0x%08x, ptr: %u %u\n", 1582 reg[0], reg[1], reg[2], reg[3]); 1583 1584 reg[0] = readl(port->dma_base + GMAC_DMA_TX_DESC_WORD0_REG); 1585 reg[1] = readl(port->dma_base + GMAC_DMA_TX_DESC_WORD1_REG); 1586 reg[2] = readl(port->dma_base + GMAC_DMA_TX_DESC_WORD2_REG); 1587 reg[3] = readl(port->dma_base + GMAC_DMA_TX_DESC_WORD3_REG); 1588 netdev_err(netdev, "TX DMA descriptor: 0x%08x 0x%08x 0x%08x 0x%08x\n", 1589 reg[0], reg[1], reg[2], reg[3]); 1590 1591 /* FREE queues status */ 1592 ptr_reg = geth->base + GLOBAL_SWFQ_RWPTR_REG; 1593 1594 reg[0] = GET_RPTR(ptr_reg); 1595 reg[1] = GET_WPTR(ptr_reg); 1596 1597 ptr_reg = geth->base + GLOBAL_HWFQ_RWPTR_REG; 1598 1599 reg[2] = GET_RPTR(ptr_reg); 1600 reg[3] = GET_WPTR(ptr_reg); 1601 netdev_err(netdev, "FQ SW ptr: %u %u, HW ptr: %u %u\n", 1602 reg[0], reg[1], reg[2], reg[3]); 1603 } 1604 1605 static void gmac_update_hw_stats(struct net_device *netdev) 1606 { 1607 struct gemini_ethernet_port *port = netdev_priv(netdev); 1608 unsigned int rx_discards, rx_mcast, rx_bcast; 1609 struct gemini_ethernet *geth = port->geth; 1610 unsigned long flags; 1611 1612 spin_lock_irqsave(&geth->irq_lock, flags); 1613 u64_stats_update_begin(&port->ir_stats_syncp); 1614 1615 rx_discards = readl(port->gmac_base + GMAC_IN_DISCARDS); 1616 port->hw_stats[0] += rx_discards; 1617 port->hw_stats[1] += readl(port->gmac_base + GMAC_IN_ERRORS); 1618 rx_mcast = readl(port->gmac_base + GMAC_IN_MCAST); 1619 port->hw_stats[2] += rx_mcast; 1620 rx_bcast = readl(port->gmac_base + GMAC_IN_BCAST); 1621 port->hw_stats[3] += rx_bcast; 1622 port->hw_stats[4] += readl(port->gmac_base + GMAC_IN_MAC1); 1623 port->hw_stats[5] += readl(port->gmac_base + GMAC_IN_MAC2); 1624 1625 port->stats.rx_missed_errors += rx_discards; 1626 port->stats.multicast += rx_mcast; 1627 port->stats.multicast += rx_bcast; 1628 1629 writel(GMAC0_MIB_INT_BIT << (netdev->dev_id * 8), 1630 geth->base + GLOBAL_INTERRUPT_STATUS_4_REG); 1631 1632 u64_stats_update_end(&port->ir_stats_syncp); 1633 spin_unlock_irqrestore(&geth->irq_lock, flags); 1634 } 1635 1636 /** 1637 * gmac_get_intr_flags() - get interrupt status flags for a port from 1638 * @netdev: the net device for the port to get flags from 1639 * @i: the interrupt status register 0..4 1640 */ 1641 static u32 gmac_get_intr_flags(struct net_device *netdev, int i) 1642 { 1643 struct gemini_ethernet_port *port = netdev_priv(netdev); 1644 struct gemini_ethernet *geth = port->geth; 1645 void __iomem *irqif_reg, *irqen_reg; 1646 unsigned int offs, val; 1647 1648 /* Calculate the offset using the stride of the status registers */ 1649 offs = i * (GLOBAL_INTERRUPT_STATUS_1_REG - 1650 GLOBAL_INTERRUPT_STATUS_0_REG); 1651 1652 irqif_reg = geth->base + GLOBAL_INTERRUPT_STATUS_0_REG + offs; 1653 irqen_reg = geth->base + GLOBAL_INTERRUPT_ENABLE_0_REG + offs; 1654 1655 val = readl(irqif_reg) & readl(irqen_reg); 1656 return val; 1657 } 1658 1659 static enum hrtimer_restart gmac_coalesce_delay_expired(struct hrtimer *timer) 1660 { 1661 struct gemini_ethernet_port *port = 1662 container_of(timer, struct gemini_ethernet_port, 1663 rx_coalesce_timer); 1664 1665 napi_schedule(&port->napi); 1666 return HRTIMER_NORESTART; 1667 } 1668 1669 static irqreturn_t gmac_irq(int irq, void *data) 1670 { 1671 struct gemini_ethernet_port *port; 1672 struct net_device *netdev = data; 1673 struct gemini_ethernet *geth; 1674 u32 val, orr = 0; 1675 1676 port = netdev_priv(netdev); 1677 geth = port->geth; 1678 1679 val = gmac_get_intr_flags(netdev, 0); 1680 orr |= val; 1681 1682 if (val & (GMAC0_IRQ0_2 << (netdev->dev_id * 2))) { 1683 /* Oh, crap */ 1684 netdev_err(netdev, "hw failure/sw bug\n"); 1685 gmac_dump_dma_state(netdev); 1686 1687 /* don't know how to recover, just reduce losses */ 1688 gmac_enable_irq(netdev, 0); 1689 return IRQ_HANDLED; 1690 } 1691 1692 if (val & (GMAC0_IRQ0_TXQ0_INTS << (netdev->dev_id * 6))) 1693 gmac_tx_irq(netdev, 0); 1694 1695 val = gmac_get_intr_flags(netdev, 1); 1696 orr |= val; 1697 1698 if (val & (DEFAULT_Q0_INT_BIT << netdev->dev_id)) { 1699 gmac_enable_rx_irq(netdev, 0); 1700 1701 if (!port->rx_coalesce_nsecs) { 1702 napi_schedule(&port->napi); 1703 } else { 1704 ktime_t ktime; 1705 1706 ktime = ktime_set(0, port->rx_coalesce_nsecs); 1707 hrtimer_start(&port->rx_coalesce_timer, ktime, 1708 HRTIMER_MODE_REL); 1709 } 1710 } 1711 1712 val = gmac_get_intr_flags(netdev, 4); 1713 orr |= val; 1714 1715 if (val & (GMAC0_MIB_INT_BIT << (netdev->dev_id * 8))) 1716 gmac_update_hw_stats(netdev); 1717 1718 if (val & (GMAC0_RX_OVERRUN_INT_BIT << (netdev->dev_id * 8))) { 1719 writel(GMAC0_RXDERR_INT_BIT << (netdev->dev_id * 8), 1720 geth->base + GLOBAL_INTERRUPT_STATUS_4_REG); 1721 1722 spin_lock(&geth->irq_lock); 1723 u64_stats_update_begin(&port->ir_stats_syncp); 1724 ++port->stats.rx_fifo_errors; 1725 u64_stats_update_end(&port->ir_stats_syncp); 1726 spin_unlock(&geth->irq_lock); 1727 } 1728 1729 return orr ? IRQ_HANDLED : IRQ_NONE; 1730 } 1731 1732 static void gmac_start_dma(struct gemini_ethernet_port *port) 1733 { 1734 void __iomem *dma_ctrl_reg = port->dma_base + GMAC_DMA_CTRL_REG; 1735 union gmac_dma_ctrl dma_ctrl; 1736 1737 dma_ctrl.bits32 = readl(dma_ctrl_reg); 1738 dma_ctrl.bits.rd_enable = 1; 1739 dma_ctrl.bits.td_enable = 1; 1740 dma_ctrl.bits.loopback = 0; 1741 dma_ctrl.bits.drop_small_ack = 0; 1742 dma_ctrl.bits.rd_insert_bytes = NET_IP_ALIGN; 1743 dma_ctrl.bits.rd_prot = HPROT_DATA_CACHE | HPROT_PRIVILIGED; 1744 dma_ctrl.bits.rd_burst_size = HBURST_INCR8; 1745 dma_ctrl.bits.rd_bus = HSIZE_8; 1746 dma_ctrl.bits.td_prot = HPROT_DATA_CACHE; 1747 dma_ctrl.bits.td_burst_size = HBURST_INCR8; 1748 dma_ctrl.bits.td_bus = HSIZE_8; 1749 1750 writel(dma_ctrl.bits32, dma_ctrl_reg); 1751 } 1752 1753 static void gmac_stop_dma(struct gemini_ethernet_port *port) 1754 { 1755 void __iomem *dma_ctrl_reg = port->dma_base + GMAC_DMA_CTRL_REG; 1756 union gmac_dma_ctrl dma_ctrl; 1757 1758 dma_ctrl.bits32 = readl(dma_ctrl_reg); 1759 dma_ctrl.bits.rd_enable = 0; 1760 dma_ctrl.bits.td_enable = 0; 1761 writel(dma_ctrl.bits32, dma_ctrl_reg); 1762 } 1763 1764 static int gmac_open(struct net_device *netdev) 1765 { 1766 struct gemini_ethernet_port *port = netdev_priv(netdev); 1767 int err; 1768 1769 err = request_irq(netdev->irq, gmac_irq, 1770 IRQF_SHARED, netdev->name, netdev); 1771 if (err) { 1772 netdev_err(netdev, "no IRQ\n"); 1773 return err; 1774 } 1775 1776 netif_carrier_off(netdev); 1777 phy_start(netdev->phydev); 1778 1779 err = geth_resize_freeq(port); 1780 /* It's fine if it's just busy, the other port has set up 1781 * the freeq in that case. 1782 */ 1783 if (err && (err != -EBUSY)) { 1784 netdev_err(netdev, "could not resize freeq\n"); 1785 goto err_stop_phy; 1786 } 1787 1788 err = gmac_setup_rxq(netdev); 1789 if (err) { 1790 netdev_err(netdev, "could not setup RXQ\n"); 1791 goto err_stop_phy; 1792 } 1793 1794 err = gmac_setup_txqs(netdev); 1795 if (err) { 1796 netdev_err(netdev, "could not setup TXQs\n"); 1797 gmac_cleanup_rxq(netdev); 1798 goto err_stop_phy; 1799 } 1800 1801 napi_enable(&port->napi); 1802 1803 gmac_start_dma(port); 1804 gmac_enable_irq(netdev, 1); 1805 gmac_enable_tx_rx(netdev); 1806 netif_tx_start_all_queues(netdev); 1807 1808 hrtimer_init(&port->rx_coalesce_timer, CLOCK_MONOTONIC, 1809 HRTIMER_MODE_REL); 1810 port->rx_coalesce_timer.function = &gmac_coalesce_delay_expired; 1811 1812 netdev_dbg(netdev, "opened\n"); 1813 1814 return 0; 1815 1816 err_stop_phy: 1817 phy_stop(netdev->phydev); 1818 free_irq(netdev->irq, netdev); 1819 return err; 1820 } 1821 1822 static int gmac_stop(struct net_device *netdev) 1823 { 1824 struct gemini_ethernet_port *port = netdev_priv(netdev); 1825 1826 hrtimer_cancel(&port->rx_coalesce_timer); 1827 netif_tx_stop_all_queues(netdev); 1828 gmac_disable_tx_rx(netdev); 1829 gmac_stop_dma(port); 1830 napi_disable(&port->napi); 1831 1832 gmac_enable_irq(netdev, 0); 1833 gmac_cleanup_rxq(netdev); 1834 gmac_cleanup_txqs(netdev); 1835 1836 phy_stop(netdev->phydev); 1837 free_irq(netdev->irq, netdev); 1838 1839 gmac_update_hw_stats(netdev); 1840 return 0; 1841 } 1842 1843 static void gmac_set_rx_mode(struct net_device *netdev) 1844 { 1845 struct gemini_ethernet_port *port = netdev_priv(netdev); 1846 union gmac_rx_fltr filter = { .bits = { 1847 .broadcast = 1, 1848 .multicast = 1, 1849 .unicast = 1, 1850 } }; 1851 struct netdev_hw_addr *ha; 1852 unsigned int bit_nr; 1853 u32 mc_filter[2]; 1854 1855 mc_filter[1] = 0; 1856 mc_filter[0] = 0; 1857 1858 if (netdev->flags & IFF_PROMISC) { 1859 filter.bits.error = 1; 1860 filter.bits.promiscuous = 1; 1861 mc_filter[1] = ~0; 1862 mc_filter[0] = ~0; 1863 } else if (netdev->flags & IFF_ALLMULTI) { 1864 mc_filter[1] = ~0; 1865 mc_filter[0] = ~0; 1866 } else { 1867 netdev_for_each_mc_addr(ha, netdev) { 1868 bit_nr = ~crc32_le(~0, ha->addr, ETH_ALEN) & 0x3f; 1869 mc_filter[bit_nr >> 5] |= 1 << (bit_nr & 0x1f); 1870 } 1871 } 1872 1873 writel(mc_filter[0], port->gmac_base + GMAC_MCAST_FIL0); 1874 writel(mc_filter[1], port->gmac_base + GMAC_MCAST_FIL1); 1875 writel(filter.bits32, port->gmac_base + GMAC_RX_FLTR); 1876 } 1877 1878 static void gmac_write_mac_address(struct net_device *netdev) 1879 { 1880 struct gemini_ethernet_port *port = netdev_priv(netdev); 1881 __le32 addr[3]; 1882 1883 memset(addr, 0, sizeof(addr)); 1884 memcpy(addr, netdev->dev_addr, ETH_ALEN); 1885 1886 writel(le32_to_cpu(addr[0]), port->gmac_base + GMAC_STA_ADD0); 1887 writel(le32_to_cpu(addr[1]), port->gmac_base + GMAC_STA_ADD1); 1888 writel(le32_to_cpu(addr[2]), port->gmac_base + GMAC_STA_ADD2); 1889 } 1890 1891 static int gmac_set_mac_address(struct net_device *netdev, void *addr) 1892 { 1893 struct sockaddr *sa = addr; 1894 1895 eth_hw_addr_set(netdev, sa->sa_data); 1896 gmac_write_mac_address(netdev); 1897 1898 return 0; 1899 } 1900 1901 static void gmac_clear_hw_stats(struct net_device *netdev) 1902 { 1903 struct gemini_ethernet_port *port = netdev_priv(netdev); 1904 1905 readl(port->gmac_base + GMAC_IN_DISCARDS); 1906 readl(port->gmac_base + GMAC_IN_ERRORS); 1907 readl(port->gmac_base + GMAC_IN_MCAST); 1908 readl(port->gmac_base + GMAC_IN_BCAST); 1909 readl(port->gmac_base + GMAC_IN_MAC1); 1910 readl(port->gmac_base + GMAC_IN_MAC2); 1911 } 1912 1913 static void gmac_get_stats64(struct net_device *netdev, 1914 struct rtnl_link_stats64 *stats) 1915 { 1916 struct gemini_ethernet_port *port = netdev_priv(netdev); 1917 unsigned int start; 1918 1919 gmac_update_hw_stats(netdev); 1920 1921 /* Racing with RX NAPI */ 1922 do { 1923 start = u64_stats_fetch_begin(&port->rx_stats_syncp); 1924 1925 stats->rx_packets = port->stats.rx_packets; 1926 stats->rx_bytes = port->stats.rx_bytes; 1927 stats->rx_errors = port->stats.rx_errors; 1928 stats->rx_dropped = port->stats.rx_dropped; 1929 1930 stats->rx_length_errors = port->stats.rx_length_errors; 1931 stats->rx_over_errors = port->stats.rx_over_errors; 1932 stats->rx_crc_errors = port->stats.rx_crc_errors; 1933 stats->rx_frame_errors = port->stats.rx_frame_errors; 1934 1935 } while (u64_stats_fetch_retry(&port->rx_stats_syncp, start)); 1936 1937 /* Racing with MIB and TX completion interrupts */ 1938 do { 1939 start = u64_stats_fetch_begin(&port->ir_stats_syncp); 1940 1941 stats->tx_errors = port->stats.tx_errors; 1942 stats->tx_packets = port->stats.tx_packets; 1943 stats->tx_bytes = port->stats.tx_bytes; 1944 1945 stats->multicast = port->stats.multicast; 1946 stats->rx_missed_errors = port->stats.rx_missed_errors; 1947 stats->rx_fifo_errors = port->stats.rx_fifo_errors; 1948 1949 } while (u64_stats_fetch_retry(&port->ir_stats_syncp, start)); 1950 1951 /* Racing with hard_start_xmit */ 1952 do { 1953 start = u64_stats_fetch_begin(&port->tx_stats_syncp); 1954 1955 stats->tx_dropped = port->stats.tx_dropped; 1956 1957 } while (u64_stats_fetch_retry(&port->tx_stats_syncp, start)); 1958 1959 stats->rx_dropped += stats->rx_missed_errors; 1960 } 1961 1962 static int gmac_change_mtu(struct net_device *netdev, int new_mtu) 1963 { 1964 int max_len = gmac_pick_rx_max_len(new_mtu); 1965 1966 if (max_len < 0) 1967 return -EINVAL; 1968 1969 gmac_disable_tx_rx(netdev); 1970 1971 netdev->mtu = new_mtu; 1972 gmac_update_config0_reg(netdev, max_len << CONFIG0_MAXLEN_SHIFT, 1973 CONFIG0_MAXLEN_MASK); 1974 1975 netdev_update_features(netdev); 1976 1977 gmac_enable_tx_rx(netdev); 1978 1979 return 0; 1980 } 1981 1982 static netdev_features_t gmac_fix_features(struct net_device *netdev, 1983 netdev_features_t features) 1984 { 1985 if (netdev->mtu + ETH_HLEN + VLAN_HLEN > MTU_SIZE_BIT_MASK) 1986 features &= ~GMAC_OFFLOAD_FEATURES; 1987 1988 return features; 1989 } 1990 1991 static int gmac_set_features(struct net_device *netdev, 1992 netdev_features_t features) 1993 { 1994 struct gemini_ethernet_port *port = netdev_priv(netdev); 1995 int enable = features & NETIF_F_RXCSUM; 1996 unsigned long flags; 1997 u32 reg; 1998 1999 spin_lock_irqsave(&port->config_lock, flags); 2000 2001 reg = readl(port->gmac_base + GMAC_CONFIG0); 2002 reg = enable ? reg | CONFIG0_RX_CHKSUM : reg & ~CONFIG0_RX_CHKSUM; 2003 writel(reg, port->gmac_base + GMAC_CONFIG0); 2004 2005 spin_unlock_irqrestore(&port->config_lock, flags); 2006 return 0; 2007 } 2008 2009 static int gmac_get_sset_count(struct net_device *netdev, int sset) 2010 { 2011 return sset == ETH_SS_STATS ? GMAC_STATS_NUM : 0; 2012 } 2013 2014 static void gmac_get_strings(struct net_device *netdev, u32 stringset, u8 *data) 2015 { 2016 if (stringset != ETH_SS_STATS) 2017 return; 2018 2019 memcpy(data, gmac_stats_strings, sizeof(gmac_stats_strings)); 2020 } 2021 2022 static void gmac_get_ethtool_stats(struct net_device *netdev, 2023 struct ethtool_stats *estats, u64 *values) 2024 { 2025 struct gemini_ethernet_port *port = netdev_priv(netdev); 2026 unsigned int start; 2027 u64 *p; 2028 int i; 2029 2030 gmac_update_hw_stats(netdev); 2031 2032 /* Racing with MIB interrupt */ 2033 do { 2034 p = values; 2035 start = u64_stats_fetch_begin(&port->ir_stats_syncp); 2036 2037 for (i = 0; i < RX_STATS_NUM; i++) 2038 *p++ = port->hw_stats[i]; 2039 2040 } while (u64_stats_fetch_retry(&port->ir_stats_syncp, start)); 2041 values = p; 2042 2043 /* Racing with RX NAPI */ 2044 do { 2045 p = values; 2046 start = u64_stats_fetch_begin(&port->rx_stats_syncp); 2047 2048 for (i = 0; i < RX_STATUS_NUM; i++) 2049 *p++ = port->rx_stats[i]; 2050 for (i = 0; i < RX_CHKSUM_NUM; i++) 2051 *p++ = port->rx_csum_stats[i]; 2052 *p++ = port->rx_napi_exits; 2053 2054 } while (u64_stats_fetch_retry(&port->rx_stats_syncp, start)); 2055 values = p; 2056 2057 /* Racing with TX start_xmit */ 2058 do { 2059 p = values; 2060 start = u64_stats_fetch_begin(&port->tx_stats_syncp); 2061 2062 for (i = 0; i < TX_MAX_FRAGS; i++) { 2063 *values++ = port->tx_frag_stats[i]; 2064 port->tx_frag_stats[i] = 0; 2065 } 2066 *values++ = port->tx_frags_linearized; 2067 *values++ = port->tx_hw_csummed; 2068 2069 } while (u64_stats_fetch_retry(&port->tx_stats_syncp, start)); 2070 } 2071 2072 static int gmac_get_ksettings(struct net_device *netdev, 2073 struct ethtool_link_ksettings *cmd) 2074 { 2075 if (!netdev->phydev) 2076 return -ENXIO; 2077 phy_ethtool_ksettings_get(netdev->phydev, cmd); 2078 2079 return 0; 2080 } 2081 2082 static int gmac_set_ksettings(struct net_device *netdev, 2083 const struct ethtool_link_ksettings *cmd) 2084 { 2085 if (!netdev->phydev) 2086 return -ENXIO; 2087 return phy_ethtool_ksettings_set(netdev->phydev, cmd); 2088 } 2089 2090 static int gmac_nway_reset(struct net_device *netdev) 2091 { 2092 if (!netdev->phydev) 2093 return -ENXIO; 2094 return phy_start_aneg(netdev->phydev); 2095 } 2096 2097 static void gmac_get_pauseparam(struct net_device *netdev, 2098 struct ethtool_pauseparam *pparam) 2099 { 2100 struct gemini_ethernet_port *port = netdev_priv(netdev); 2101 union gmac_config0 config0; 2102 2103 config0.bits32 = readl(port->gmac_base + GMAC_CONFIG0); 2104 2105 pparam->rx_pause = config0.bits.rx_fc_en; 2106 pparam->tx_pause = config0.bits.tx_fc_en; 2107 pparam->autoneg = true; 2108 } 2109 2110 static void gmac_get_ringparam(struct net_device *netdev, 2111 struct ethtool_ringparam *rp, 2112 struct kernel_ethtool_ringparam *kernel_rp, 2113 struct netlink_ext_ack *extack) 2114 { 2115 struct gemini_ethernet_port *port = netdev_priv(netdev); 2116 2117 readl(port->gmac_base + GMAC_CONFIG0); 2118 2119 rp->rx_max_pending = 1 << 15; 2120 rp->rx_mini_max_pending = 0; 2121 rp->rx_jumbo_max_pending = 0; 2122 rp->tx_max_pending = 1 << 15; 2123 2124 rp->rx_pending = 1 << port->rxq_order; 2125 rp->rx_mini_pending = 0; 2126 rp->rx_jumbo_pending = 0; 2127 rp->tx_pending = 1 << port->txq_order; 2128 } 2129 2130 static int gmac_set_ringparam(struct net_device *netdev, 2131 struct ethtool_ringparam *rp, 2132 struct kernel_ethtool_ringparam *kernel_rp, 2133 struct netlink_ext_ack *extack) 2134 { 2135 struct gemini_ethernet_port *port = netdev_priv(netdev); 2136 int err = 0; 2137 2138 if (netif_running(netdev)) 2139 return -EBUSY; 2140 2141 if (rp->rx_pending) { 2142 port->rxq_order = min(15, ilog2(rp->rx_pending - 1) + 1); 2143 err = geth_resize_freeq(port); 2144 } 2145 if (rp->tx_pending) { 2146 port->txq_order = min(15, ilog2(rp->tx_pending - 1) + 1); 2147 port->irq_every_tx_packets = 1 << (port->txq_order - 2); 2148 } 2149 2150 return err; 2151 } 2152 2153 static int gmac_get_coalesce(struct net_device *netdev, 2154 struct ethtool_coalesce *ecmd, 2155 struct kernel_ethtool_coalesce *kernel_coal, 2156 struct netlink_ext_ack *extack) 2157 { 2158 struct gemini_ethernet_port *port = netdev_priv(netdev); 2159 2160 ecmd->rx_max_coalesced_frames = 1; 2161 ecmd->tx_max_coalesced_frames = port->irq_every_tx_packets; 2162 ecmd->rx_coalesce_usecs = port->rx_coalesce_nsecs / 1000; 2163 2164 return 0; 2165 } 2166 2167 static int gmac_set_coalesce(struct net_device *netdev, 2168 struct ethtool_coalesce *ecmd, 2169 struct kernel_ethtool_coalesce *kernel_coal, 2170 struct netlink_ext_ack *extack) 2171 { 2172 struct gemini_ethernet_port *port = netdev_priv(netdev); 2173 2174 if (ecmd->tx_max_coalesced_frames < 1) 2175 return -EINVAL; 2176 if (ecmd->tx_max_coalesced_frames >= 1 << port->txq_order) 2177 return -EINVAL; 2178 2179 port->irq_every_tx_packets = ecmd->tx_max_coalesced_frames; 2180 port->rx_coalesce_nsecs = ecmd->rx_coalesce_usecs * 1000; 2181 2182 return 0; 2183 } 2184 2185 static u32 gmac_get_msglevel(struct net_device *netdev) 2186 { 2187 struct gemini_ethernet_port *port = netdev_priv(netdev); 2188 2189 return port->msg_enable; 2190 } 2191 2192 static void gmac_set_msglevel(struct net_device *netdev, u32 level) 2193 { 2194 struct gemini_ethernet_port *port = netdev_priv(netdev); 2195 2196 port->msg_enable = level; 2197 } 2198 2199 static void gmac_get_drvinfo(struct net_device *netdev, 2200 struct ethtool_drvinfo *info) 2201 { 2202 strcpy(info->driver, DRV_NAME); 2203 strcpy(info->bus_info, netdev->dev_id ? "1" : "0"); 2204 } 2205 2206 static const struct net_device_ops gmac_351x_ops = { 2207 .ndo_init = gmac_init, 2208 .ndo_open = gmac_open, 2209 .ndo_stop = gmac_stop, 2210 .ndo_start_xmit = gmac_start_xmit, 2211 .ndo_tx_timeout = gmac_tx_timeout, 2212 .ndo_set_rx_mode = gmac_set_rx_mode, 2213 .ndo_set_mac_address = gmac_set_mac_address, 2214 .ndo_get_stats64 = gmac_get_stats64, 2215 .ndo_change_mtu = gmac_change_mtu, 2216 .ndo_fix_features = gmac_fix_features, 2217 .ndo_set_features = gmac_set_features, 2218 }; 2219 2220 static const struct ethtool_ops gmac_351x_ethtool_ops = { 2221 .supported_coalesce_params = ETHTOOL_COALESCE_RX_USECS | 2222 ETHTOOL_COALESCE_MAX_FRAMES, 2223 .get_sset_count = gmac_get_sset_count, 2224 .get_strings = gmac_get_strings, 2225 .get_ethtool_stats = gmac_get_ethtool_stats, 2226 .get_link = ethtool_op_get_link, 2227 .get_link_ksettings = gmac_get_ksettings, 2228 .set_link_ksettings = gmac_set_ksettings, 2229 .nway_reset = gmac_nway_reset, 2230 .get_pauseparam = gmac_get_pauseparam, 2231 .get_ringparam = gmac_get_ringparam, 2232 .set_ringparam = gmac_set_ringparam, 2233 .get_coalesce = gmac_get_coalesce, 2234 .set_coalesce = gmac_set_coalesce, 2235 .get_msglevel = gmac_get_msglevel, 2236 .set_msglevel = gmac_set_msglevel, 2237 .get_drvinfo = gmac_get_drvinfo, 2238 }; 2239 2240 static irqreturn_t gemini_port_irq_thread(int irq, void *data) 2241 { 2242 unsigned long irqmask = SWFQ_EMPTY_INT_BIT; 2243 struct gemini_ethernet_port *port = data; 2244 struct gemini_ethernet *geth; 2245 unsigned long flags; 2246 2247 geth = port->geth; 2248 /* The queue is half empty so refill it */ 2249 geth_fill_freeq(geth, true); 2250 2251 spin_lock_irqsave(&geth->irq_lock, flags); 2252 /* ACK queue interrupt */ 2253 writel(irqmask, geth->base + GLOBAL_INTERRUPT_STATUS_4_REG); 2254 /* Enable queue interrupt again */ 2255 irqmask |= readl(geth->base + GLOBAL_INTERRUPT_ENABLE_4_REG); 2256 writel(irqmask, geth->base + GLOBAL_INTERRUPT_ENABLE_4_REG); 2257 spin_unlock_irqrestore(&geth->irq_lock, flags); 2258 2259 return IRQ_HANDLED; 2260 } 2261 2262 static irqreturn_t gemini_port_irq(int irq, void *data) 2263 { 2264 struct gemini_ethernet_port *port = data; 2265 struct gemini_ethernet *geth; 2266 irqreturn_t ret = IRQ_NONE; 2267 u32 val, en; 2268 2269 geth = port->geth; 2270 spin_lock(&geth->irq_lock); 2271 2272 val = readl(geth->base + GLOBAL_INTERRUPT_STATUS_4_REG); 2273 en = readl(geth->base + GLOBAL_INTERRUPT_ENABLE_4_REG); 2274 2275 if (val & en & SWFQ_EMPTY_INT_BIT) { 2276 /* Disable the queue empty interrupt while we work on 2277 * processing the queue. Also disable overrun interrupts 2278 * as there is not much we can do about it here. 2279 */ 2280 en &= ~(SWFQ_EMPTY_INT_BIT | GMAC0_RX_OVERRUN_INT_BIT 2281 | GMAC1_RX_OVERRUN_INT_BIT); 2282 writel(en, geth->base + GLOBAL_INTERRUPT_ENABLE_4_REG); 2283 ret = IRQ_WAKE_THREAD; 2284 } 2285 2286 spin_unlock(&geth->irq_lock); 2287 2288 return ret; 2289 } 2290 2291 static void gemini_port_remove(struct gemini_ethernet_port *port) 2292 { 2293 if (port->netdev) { 2294 phy_disconnect(port->netdev->phydev); 2295 unregister_netdev(port->netdev); 2296 } 2297 clk_disable_unprepare(port->pclk); 2298 geth_cleanup_freeq(port->geth); 2299 } 2300 2301 static void gemini_ethernet_init(struct gemini_ethernet *geth) 2302 { 2303 /* Only do this once both ports are online */ 2304 if (geth->initialized) 2305 return; 2306 if (geth->port0 && geth->port1) 2307 geth->initialized = true; 2308 else 2309 return; 2310 2311 writel(0, geth->base + GLOBAL_INTERRUPT_ENABLE_0_REG); 2312 writel(0, geth->base + GLOBAL_INTERRUPT_ENABLE_1_REG); 2313 writel(0, geth->base + GLOBAL_INTERRUPT_ENABLE_2_REG); 2314 writel(0, geth->base + GLOBAL_INTERRUPT_ENABLE_3_REG); 2315 writel(0, geth->base + GLOBAL_INTERRUPT_ENABLE_4_REG); 2316 2317 /* Interrupt config: 2318 * 2319 * GMAC0 intr bits ------> int0 ----> eth0 2320 * GMAC1 intr bits ------> int1 ----> eth1 2321 * TOE intr -------------> int1 ----> eth1 2322 * Classification Intr --> int0 ----> eth0 2323 * Default Q0 -----------> int0 ----> eth0 2324 * Default Q1 -----------> int1 ----> eth1 2325 * FreeQ intr -----------> int1 ----> eth1 2326 */ 2327 writel(0xCCFC0FC0, geth->base + GLOBAL_INTERRUPT_SELECT_0_REG); 2328 writel(0x00F00002, geth->base + GLOBAL_INTERRUPT_SELECT_1_REG); 2329 writel(0xFFFFFFFF, geth->base + GLOBAL_INTERRUPT_SELECT_2_REG); 2330 writel(0xFFFFFFFF, geth->base + GLOBAL_INTERRUPT_SELECT_3_REG); 2331 writel(0xFF000003, geth->base + GLOBAL_INTERRUPT_SELECT_4_REG); 2332 2333 /* edge-triggered interrupts packed to level-triggered one... */ 2334 writel(~0, geth->base + GLOBAL_INTERRUPT_STATUS_0_REG); 2335 writel(~0, geth->base + GLOBAL_INTERRUPT_STATUS_1_REG); 2336 writel(~0, geth->base + GLOBAL_INTERRUPT_STATUS_2_REG); 2337 writel(~0, geth->base + GLOBAL_INTERRUPT_STATUS_3_REG); 2338 writel(~0, geth->base + GLOBAL_INTERRUPT_STATUS_4_REG); 2339 2340 /* Set up queue */ 2341 writel(0, geth->base + GLOBAL_SW_FREEQ_BASE_SIZE_REG); 2342 writel(0, geth->base + GLOBAL_HW_FREEQ_BASE_SIZE_REG); 2343 writel(0, geth->base + GLOBAL_SWFQ_RWPTR_REG); 2344 writel(0, geth->base + GLOBAL_HWFQ_RWPTR_REG); 2345 2346 geth->freeq_frag_order = DEFAULT_RX_BUF_ORDER; 2347 /* This makes the queue resize on probe() so that we 2348 * set up and enable the queue IRQ. FIXME: fragile. 2349 */ 2350 geth->freeq_order = 1; 2351 } 2352 2353 static void gemini_port_save_mac_addr(struct gemini_ethernet_port *port) 2354 { 2355 port->mac_addr[0] = 2356 cpu_to_le32(readl(port->gmac_base + GMAC_STA_ADD0)); 2357 port->mac_addr[1] = 2358 cpu_to_le32(readl(port->gmac_base + GMAC_STA_ADD1)); 2359 port->mac_addr[2] = 2360 cpu_to_le32(readl(port->gmac_base + GMAC_STA_ADD2)); 2361 } 2362 2363 static int gemini_ethernet_port_probe(struct platform_device *pdev) 2364 { 2365 char *port_names[2] = { "ethernet0", "ethernet1" }; 2366 struct device_node *np = pdev->dev.of_node; 2367 struct gemini_ethernet_port *port; 2368 struct device *dev = &pdev->dev; 2369 struct gemini_ethernet *geth; 2370 struct net_device *netdev; 2371 struct device *parent; 2372 u8 mac[ETH_ALEN]; 2373 unsigned int id; 2374 int irq; 2375 int ret; 2376 2377 parent = dev->parent; 2378 geth = dev_get_drvdata(parent); 2379 2380 if (!strcmp(dev_name(dev), "60008000.ethernet-port")) 2381 id = 0; 2382 else if (!strcmp(dev_name(dev), "6000c000.ethernet-port")) 2383 id = 1; 2384 else 2385 return -ENODEV; 2386 2387 dev_info(dev, "probe %s ID %d\n", dev_name(dev), id); 2388 2389 netdev = devm_alloc_etherdev_mqs(dev, sizeof(*port), TX_QUEUE_NUM, TX_QUEUE_NUM); 2390 if (!netdev) { 2391 dev_err(dev, "Can't allocate ethernet device #%d\n", id); 2392 return -ENOMEM; 2393 } 2394 2395 port = netdev_priv(netdev); 2396 SET_NETDEV_DEV(netdev, dev); 2397 port->netdev = netdev; 2398 port->id = id; 2399 port->geth = geth; 2400 port->dev = dev; 2401 port->msg_enable = netif_msg_init(debug, DEFAULT_MSG_ENABLE); 2402 2403 /* DMA memory */ 2404 port->dma_base = devm_platform_get_and_ioremap_resource(pdev, 0, NULL); 2405 if (IS_ERR(port->dma_base)) { 2406 dev_err(dev, "get DMA address failed\n"); 2407 return PTR_ERR(port->dma_base); 2408 } 2409 2410 /* GMAC config memory */ 2411 port->gmac_base = devm_platform_get_and_ioremap_resource(pdev, 1, NULL); 2412 if (IS_ERR(port->gmac_base)) { 2413 dev_err(dev, "get GMAC address failed\n"); 2414 return PTR_ERR(port->gmac_base); 2415 } 2416 2417 /* Interrupt */ 2418 irq = platform_get_irq(pdev, 0); 2419 if (irq <= 0) 2420 return irq ? irq : -ENODEV; 2421 port->irq = irq; 2422 2423 /* Clock the port */ 2424 port->pclk = devm_clk_get(dev, "PCLK"); 2425 if (IS_ERR(port->pclk)) { 2426 dev_err(dev, "no PCLK\n"); 2427 return PTR_ERR(port->pclk); 2428 } 2429 ret = clk_prepare_enable(port->pclk); 2430 if (ret) 2431 return ret; 2432 2433 /* Maybe there is a nice ethernet address we should use */ 2434 gemini_port_save_mac_addr(port); 2435 2436 /* Reset the port */ 2437 port->reset = devm_reset_control_get_exclusive(dev, NULL); 2438 if (IS_ERR(port->reset)) { 2439 dev_err(dev, "no reset\n"); 2440 ret = PTR_ERR(port->reset); 2441 goto unprepare; 2442 } 2443 reset_control_reset(port->reset); 2444 usleep_range(100, 500); 2445 2446 /* Assign pointer in the main state container */ 2447 if (!id) 2448 geth->port0 = port; 2449 else 2450 geth->port1 = port; 2451 2452 /* This will just be done once both ports are up and reset */ 2453 gemini_ethernet_init(geth); 2454 2455 platform_set_drvdata(pdev, port); 2456 2457 /* Set up and register the netdev */ 2458 netdev->dev_id = port->id; 2459 netdev->irq = irq; 2460 netdev->netdev_ops = &gmac_351x_ops; 2461 netdev->ethtool_ops = &gmac_351x_ethtool_ops; 2462 2463 spin_lock_init(&port->config_lock); 2464 gmac_clear_hw_stats(netdev); 2465 2466 netdev->hw_features = GMAC_OFFLOAD_FEATURES; 2467 netdev->features |= GMAC_OFFLOAD_FEATURES | NETIF_F_GRO; 2468 /* We can handle jumbo frames up to 10236 bytes so, let's accept 2469 * payloads of 10236 bytes minus VLAN and ethernet header 2470 */ 2471 netdev->min_mtu = ETH_MIN_MTU; 2472 netdev->max_mtu = 10236 - VLAN_ETH_HLEN; 2473 2474 port->freeq_refill = 0; 2475 netif_napi_add(netdev, &port->napi, gmac_napi_poll, 2476 DEFAULT_NAPI_WEIGHT); 2477 2478 ret = of_get_mac_address(np, mac); 2479 if (!ret) { 2480 dev_info(dev, "Setting macaddr from DT %pM\n", mac); 2481 memcpy(port->mac_addr, mac, ETH_ALEN); 2482 } 2483 2484 if (is_valid_ether_addr((void *)port->mac_addr)) { 2485 eth_hw_addr_set(netdev, (u8 *)port->mac_addr); 2486 } else { 2487 dev_dbg(dev, "ethernet address 0x%08x%08x%08x invalid\n", 2488 port->mac_addr[0], port->mac_addr[1], 2489 port->mac_addr[2]); 2490 dev_info(dev, "using a random ethernet address\n"); 2491 eth_hw_addr_random(netdev); 2492 } 2493 gmac_write_mac_address(netdev); 2494 2495 ret = devm_request_threaded_irq(port->dev, 2496 port->irq, 2497 gemini_port_irq, 2498 gemini_port_irq_thread, 2499 IRQF_SHARED, 2500 port_names[port->id], 2501 port); 2502 if (ret) 2503 goto unprepare; 2504 2505 ret = gmac_setup_phy(netdev); 2506 if (ret) { 2507 netdev_err(netdev, 2508 "PHY init failed\n"); 2509 goto unprepare; 2510 } 2511 2512 ret = register_netdev(netdev); 2513 if (ret) 2514 goto unprepare; 2515 2516 return 0; 2517 2518 unprepare: 2519 clk_disable_unprepare(port->pclk); 2520 return ret; 2521 } 2522 2523 static int gemini_ethernet_port_remove(struct platform_device *pdev) 2524 { 2525 struct gemini_ethernet_port *port = platform_get_drvdata(pdev); 2526 2527 gemini_port_remove(port); 2528 2529 return 0; 2530 } 2531 2532 static const struct of_device_id gemini_ethernet_port_of_match[] = { 2533 { 2534 .compatible = "cortina,gemini-ethernet-port", 2535 }, 2536 {}, 2537 }; 2538 MODULE_DEVICE_TABLE(of, gemini_ethernet_port_of_match); 2539 2540 static struct platform_driver gemini_ethernet_port_driver = { 2541 .driver = { 2542 .name = "gemini-ethernet-port", 2543 .of_match_table = of_match_ptr(gemini_ethernet_port_of_match), 2544 }, 2545 .probe = gemini_ethernet_port_probe, 2546 .remove = gemini_ethernet_port_remove, 2547 }; 2548 2549 static int gemini_ethernet_probe(struct platform_device *pdev) 2550 { 2551 struct device *dev = &pdev->dev; 2552 struct gemini_ethernet *geth; 2553 unsigned int retry = 5; 2554 u32 val; 2555 2556 /* Global registers */ 2557 geth = devm_kzalloc(dev, sizeof(*geth), GFP_KERNEL); 2558 if (!geth) 2559 return -ENOMEM; 2560 geth->base = devm_platform_get_and_ioremap_resource(pdev, 0, NULL); 2561 if (IS_ERR(geth->base)) 2562 return PTR_ERR(geth->base); 2563 geth->dev = dev; 2564 2565 /* Wait for ports to stabilize */ 2566 do { 2567 udelay(2); 2568 val = readl(geth->base + GLOBAL_TOE_VERSION_REG); 2569 barrier(); 2570 } while (!val && --retry); 2571 if (!retry) { 2572 dev_err(dev, "failed to reset ethernet\n"); 2573 return -EIO; 2574 } 2575 dev_info(dev, "Ethernet device ID: 0x%03x, revision 0x%01x\n", 2576 (val >> 4) & 0xFFFU, val & 0xFU); 2577 2578 spin_lock_init(&geth->irq_lock); 2579 spin_lock_init(&geth->freeq_lock); 2580 2581 /* The children will use this */ 2582 platform_set_drvdata(pdev, geth); 2583 2584 /* Spawn child devices for the two ports */ 2585 return devm_of_platform_populate(dev); 2586 } 2587 2588 static int gemini_ethernet_remove(struct platform_device *pdev) 2589 { 2590 struct gemini_ethernet *geth = platform_get_drvdata(pdev); 2591 2592 geth_cleanup_freeq(geth); 2593 geth->initialized = false; 2594 2595 return 0; 2596 } 2597 2598 static const struct of_device_id gemini_ethernet_of_match[] = { 2599 { 2600 .compatible = "cortina,gemini-ethernet", 2601 }, 2602 {}, 2603 }; 2604 MODULE_DEVICE_TABLE(of, gemini_ethernet_of_match); 2605 2606 static struct platform_driver gemini_ethernet_driver = { 2607 .driver = { 2608 .name = DRV_NAME, 2609 .of_match_table = of_match_ptr(gemini_ethernet_of_match), 2610 }, 2611 .probe = gemini_ethernet_probe, 2612 .remove = gemini_ethernet_remove, 2613 }; 2614 2615 static int __init gemini_ethernet_module_init(void) 2616 { 2617 int ret; 2618 2619 ret = platform_driver_register(&gemini_ethernet_port_driver); 2620 if (ret) 2621 return ret; 2622 2623 ret = platform_driver_register(&gemini_ethernet_driver); 2624 if (ret) { 2625 platform_driver_unregister(&gemini_ethernet_port_driver); 2626 return ret; 2627 } 2628 2629 return 0; 2630 } 2631 module_init(gemini_ethernet_module_init); 2632 2633 static void __exit gemini_ethernet_module_exit(void) 2634 { 2635 platform_driver_unregister(&gemini_ethernet_driver); 2636 platform_driver_unregister(&gemini_ethernet_port_driver); 2637 } 2638 module_exit(gemini_ethernet_module_exit); 2639 2640 MODULE_AUTHOR("Linus Walleij <linus.walleij@linaro.org>"); 2641 MODULE_DESCRIPTION("StorLink SL351x (Gemini) ethernet driver"); 2642 MODULE_LICENSE("GPL"); 2643 MODULE_ALIAS("platform:" DRV_NAME); 2644