1 // SPDX-License-Identifier: GPL-2.0 2 /* Ethernet device driver for Cortina Systems Gemini SoC 3 * Also known as the StorLink SL3512 and SL3516 (SL351x) or Lepus 4 * Net Engine and Gigabit Ethernet MAC (GMAC) 5 * This hardware contains a TCP Offload Engine (TOE) but currently the 6 * driver does not make use of it. 7 * 8 * Authors: 9 * Linus Walleij <linus.walleij@linaro.org> 10 * Tobias Waldvogel <tobias.waldvogel@gmail.com> (OpenWRT) 11 * Michał Mirosław <mirq-linux@rere.qmqm.pl> 12 * Paulius Zaleckas <paulius.zaleckas@gmail.com> 13 * Giuseppe De Robertis <Giuseppe.DeRobertis@ba.infn.it> 14 * Gary Chen & Ch Hsu Storlink Semiconductor 15 */ 16 #include <linux/kernel.h> 17 #include <linux/init.h> 18 #include <linux/module.h> 19 #include <linux/platform_device.h> 20 #include <linux/spinlock.h> 21 #include <linux/slab.h> 22 #include <linux/dma-mapping.h> 23 #include <linux/cache.h> 24 #include <linux/interrupt.h> 25 #include <linux/reset.h> 26 #include <linux/clk.h> 27 #include <linux/of.h> 28 #include <linux/of_mdio.h> 29 #include <linux/of_net.h> 30 #include <linux/of_platform.h> 31 #include <linux/etherdevice.h> 32 #include <linux/if_vlan.h> 33 #include <linux/skbuff.h> 34 #include <linux/phy.h> 35 #include <linux/crc32.h> 36 #include <linux/ethtool.h> 37 #include <linux/tcp.h> 38 #include <linux/u64_stats_sync.h> 39 40 #include <linux/in.h> 41 #include <linux/ip.h> 42 #include <linux/ipv6.h> 43 44 #include "gemini.h" 45 46 #define DRV_NAME "gmac-gemini" 47 48 #define DEFAULT_MSG_ENABLE (NETIF_MSG_DRV | NETIF_MSG_PROBE | NETIF_MSG_LINK) 49 static int debug = -1; 50 module_param(debug, int, 0); 51 MODULE_PARM_DESC(debug, "Debug level (0=none,...,16=all)"); 52 53 #define HSIZE_8 0x00 54 #define HSIZE_16 0x01 55 #define HSIZE_32 0x02 56 57 #define HBURST_SINGLE 0x00 58 #define HBURST_INCR 0x01 59 #define HBURST_INCR4 0x02 60 #define HBURST_INCR8 0x03 61 62 #define HPROT_DATA_CACHE BIT(0) 63 #define HPROT_PRIVILIGED BIT(1) 64 #define HPROT_BUFFERABLE BIT(2) 65 #define HPROT_CACHABLE BIT(3) 66 67 #define DEFAULT_RX_COALESCE_NSECS 0 68 #define DEFAULT_GMAC_RXQ_ORDER 9 69 #define DEFAULT_GMAC_TXQ_ORDER 8 70 #define DEFAULT_RX_BUF_ORDER 11 71 #define DEFAULT_NAPI_WEIGHT 64 72 #define TX_MAX_FRAGS 16 73 #define TX_QUEUE_NUM 1 /* max: 6 */ 74 #define RX_MAX_ALLOC_ORDER 2 75 76 #define GMAC0_IRQ0_2 (GMAC0_TXDERR_INT_BIT | GMAC0_TXPERR_INT_BIT | \ 77 GMAC0_RXDERR_INT_BIT | GMAC0_RXPERR_INT_BIT) 78 #define GMAC0_IRQ0_TXQ0_INTS (GMAC0_SWTQ00_EOF_INT_BIT | \ 79 GMAC0_SWTQ00_FIN_INT_BIT) 80 #define GMAC0_IRQ4_8 (GMAC0_MIB_INT_BIT | GMAC0_RX_OVERRUN_INT_BIT) 81 82 #define GMAC_OFFLOAD_FEATURES (NETIF_F_SG | NETIF_F_IP_CSUM | \ 83 NETIF_F_IPV6_CSUM | NETIF_F_RXCSUM | \ 84 NETIF_F_TSO | NETIF_F_TSO_ECN | NETIF_F_TSO6) 85 86 /** 87 * struct gmac_queue_page - page buffer per-page info 88 * @page: the page struct 89 * @mapping: the dma address handle 90 */ 91 struct gmac_queue_page { 92 struct page *page; 93 dma_addr_t mapping; 94 }; 95 96 struct gmac_txq { 97 struct gmac_txdesc *ring; 98 struct sk_buff **skb; 99 unsigned int cptr; 100 unsigned int noirq_packets; 101 }; 102 103 struct gemini_ethernet; 104 105 struct gemini_ethernet_port { 106 u8 id; /* 0 or 1 */ 107 108 struct gemini_ethernet *geth; 109 struct net_device *netdev; 110 struct device *dev; 111 void __iomem *dma_base; 112 void __iomem *gmac_base; 113 struct clk *pclk; 114 struct reset_control *reset; 115 int irq; 116 __le32 mac_addr[3]; 117 118 void __iomem *rxq_rwptr; 119 struct gmac_rxdesc *rxq_ring; 120 unsigned int rxq_order; 121 122 struct napi_struct napi; 123 struct hrtimer rx_coalesce_timer; 124 unsigned int rx_coalesce_nsecs; 125 unsigned int freeq_refill; 126 struct gmac_txq txq[TX_QUEUE_NUM]; 127 unsigned int txq_order; 128 unsigned int irq_every_tx_packets; 129 130 dma_addr_t rxq_dma_base; 131 dma_addr_t txq_dma_base; 132 133 unsigned int msg_enable; 134 spinlock_t config_lock; /* Locks config register */ 135 136 struct u64_stats_sync tx_stats_syncp; 137 struct u64_stats_sync rx_stats_syncp; 138 struct u64_stats_sync ir_stats_syncp; 139 140 struct rtnl_link_stats64 stats; 141 u64 hw_stats[RX_STATS_NUM]; 142 u64 rx_stats[RX_STATUS_NUM]; 143 u64 rx_csum_stats[RX_CHKSUM_NUM]; 144 u64 rx_napi_exits; 145 u64 tx_frag_stats[TX_MAX_FRAGS]; 146 u64 tx_frags_linearized; 147 u64 tx_hw_csummed; 148 }; 149 150 struct gemini_ethernet { 151 struct device *dev; 152 void __iomem *base; 153 struct gemini_ethernet_port *port0; 154 struct gemini_ethernet_port *port1; 155 bool initialized; 156 157 spinlock_t irq_lock; /* Locks IRQ-related registers */ 158 unsigned int freeq_order; 159 unsigned int freeq_frag_order; 160 struct gmac_rxdesc *freeq_ring; 161 dma_addr_t freeq_dma_base; 162 struct gmac_queue_page *freeq_pages; 163 unsigned int num_freeq_pages; 164 spinlock_t freeq_lock; /* Locks queue from reentrance */ 165 }; 166 167 #define GMAC_STATS_NUM ( \ 168 RX_STATS_NUM + RX_STATUS_NUM + RX_CHKSUM_NUM + 1 + \ 169 TX_MAX_FRAGS + 2) 170 171 static const char gmac_stats_strings[GMAC_STATS_NUM][ETH_GSTRING_LEN] = { 172 "GMAC_IN_DISCARDS", 173 "GMAC_IN_ERRORS", 174 "GMAC_IN_MCAST", 175 "GMAC_IN_BCAST", 176 "GMAC_IN_MAC1", 177 "GMAC_IN_MAC2", 178 "RX_STATUS_GOOD_FRAME", 179 "RX_STATUS_TOO_LONG_GOOD_CRC", 180 "RX_STATUS_RUNT_FRAME", 181 "RX_STATUS_SFD_NOT_FOUND", 182 "RX_STATUS_CRC_ERROR", 183 "RX_STATUS_TOO_LONG_BAD_CRC", 184 "RX_STATUS_ALIGNMENT_ERROR", 185 "RX_STATUS_TOO_LONG_BAD_ALIGN", 186 "RX_STATUS_RX_ERR", 187 "RX_STATUS_DA_FILTERED", 188 "RX_STATUS_BUFFER_FULL", 189 "RX_STATUS_11", 190 "RX_STATUS_12", 191 "RX_STATUS_13", 192 "RX_STATUS_14", 193 "RX_STATUS_15", 194 "RX_CHKSUM_IP_UDP_TCP_OK", 195 "RX_CHKSUM_IP_OK_ONLY", 196 "RX_CHKSUM_NONE", 197 "RX_CHKSUM_3", 198 "RX_CHKSUM_IP_ERR_UNKNOWN", 199 "RX_CHKSUM_IP_ERR", 200 "RX_CHKSUM_TCP_UDP_ERR", 201 "RX_CHKSUM_7", 202 "RX_NAPI_EXITS", 203 "TX_FRAGS[1]", 204 "TX_FRAGS[2]", 205 "TX_FRAGS[3]", 206 "TX_FRAGS[4]", 207 "TX_FRAGS[5]", 208 "TX_FRAGS[6]", 209 "TX_FRAGS[7]", 210 "TX_FRAGS[8]", 211 "TX_FRAGS[9]", 212 "TX_FRAGS[10]", 213 "TX_FRAGS[11]", 214 "TX_FRAGS[12]", 215 "TX_FRAGS[13]", 216 "TX_FRAGS[14]", 217 "TX_FRAGS[15]", 218 "TX_FRAGS[16+]", 219 "TX_FRAGS_LINEARIZED", 220 "TX_HW_CSUMMED", 221 }; 222 223 static void gmac_dump_dma_state(struct net_device *netdev); 224 225 static void gmac_update_config0_reg(struct net_device *netdev, 226 u32 val, u32 vmask) 227 { 228 struct gemini_ethernet_port *port = netdev_priv(netdev); 229 unsigned long flags; 230 u32 reg; 231 232 spin_lock_irqsave(&port->config_lock, flags); 233 234 reg = readl(port->gmac_base + GMAC_CONFIG0); 235 reg = (reg & ~vmask) | val; 236 writel(reg, port->gmac_base + GMAC_CONFIG0); 237 238 spin_unlock_irqrestore(&port->config_lock, flags); 239 } 240 241 static void gmac_enable_tx_rx(struct net_device *netdev) 242 { 243 struct gemini_ethernet_port *port = netdev_priv(netdev); 244 unsigned long flags; 245 u32 reg; 246 247 spin_lock_irqsave(&port->config_lock, flags); 248 249 reg = readl(port->gmac_base + GMAC_CONFIG0); 250 reg &= ~CONFIG0_TX_RX_DISABLE; 251 writel(reg, port->gmac_base + GMAC_CONFIG0); 252 253 spin_unlock_irqrestore(&port->config_lock, flags); 254 } 255 256 static void gmac_disable_tx_rx(struct net_device *netdev) 257 { 258 struct gemini_ethernet_port *port = netdev_priv(netdev); 259 unsigned long flags; 260 u32 val; 261 262 spin_lock_irqsave(&port->config_lock, flags); 263 264 val = readl(port->gmac_base + GMAC_CONFIG0); 265 val |= CONFIG0_TX_RX_DISABLE; 266 writel(val, port->gmac_base + GMAC_CONFIG0); 267 268 spin_unlock_irqrestore(&port->config_lock, flags); 269 270 mdelay(10); /* let GMAC consume packet */ 271 } 272 273 static void gmac_set_flow_control(struct net_device *netdev, bool tx, bool rx) 274 { 275 struct gemini_ethernet_port *port = netdev_priv(netdev); 276 unsigned long flags; 277 u32 val; 278 279 spin_lock_irqsave(&port->config_lock, flags); 280 281 val = readl(port->gmac_base + GMAC_CONFIG0); 282 val &= ~CONFIG0_FLOW_CTL; 283 if (tx) 284 val |= CONFIG0_FLOW_TX; 285 if (rx) 286 val |= CONFIG0_FLOW_RX; 287 writel(val, port->gmac_base + GMAC_CONFIG0); 288 289 spin_unlock_irqrestore(&port->config_lock, flags); 290 } 291 292 static void gmac_speed_set(struct net_device *netdev) 293 { 294 struct gemini_ethernet_port *port = netdev_priv(netdev); 295 struct phy_device *phydev = netdev->phydev; 296 union gmac_status status, old_status; 297 int pause_tx = 0; 298 int pause_rx = 0; 299 300 status.bits32 = readl(port->gmac_base + GMAC_STATUS); 301 old_status.bits32 = status.bits32; 302 status.bits.link = phydev->link; 303 status.bits.duplex = phydev->duplex; 304 305 switch (phydev->speed) { 306 case 1000: 307 status.bits.speed = GMAC_SPEED_1000; 308 if (phydev->interface == PHY_INTERFACE_MODE_RGMII) 309 status.bits.mii_rmii = GMAC_PHY_RGMII_1000; 310 netdev_dbg(netdev, "connect %s to RGMII @ 1Gbit\n", 311 phydev_name(phydev)); 312 break; 313 case 100: 314 status.bits.speed = GMAC_SPEED_100; 315 if (phydev->interface == PHY_INTERFACE_MODE_RGMII) 316 status.bits.mii_rmii = GMAC_PHY_RGMII_100_10; 317 netdev_dbg(netdev, "connect %s to RGMII @ 100 Mbit\n", 318 phydev_name(phydev)); 319 break; 320 case 10: 321 status.bits.speed = GMAC_SPEED_10; 322 if (phydev->interface == PHY_INTERFACE_MODE_RGMII) 323 status.bits.mii_rmii = GMAC_PHY_RGMII_100_10; 324 netdev_dbg(netdev, "connect %s to RGMII @ 10 Mbit\n", 325 phydev_name(phydev)); 326 break; 327 default: 328 netdev_warn(netdev, "Unsupported PHY speed (%d) on %s\n", 329 phydev->speed, phydev_name(phydev)); 330 } 331 332 if (phydev->duplex == DUPLEX_FULL) { 333 u16 lcladv = phy_read(phydev, MII_ADVERTISE); 334 u16 rmtadv = phy_read(phydev, MII_LPA); 335 u8 cap = mii_resolve_flowctrl_fdx(lcladv, rmtadv); 336 337 if (cap & FLOW_CTRL_RX) 338 pause_rx = 1; 339 if (cap & FLOW_CTRL_TX) 340 pause_tx = 1; 341 } 342 343 gmac_set_flow_control(netdev, pause_tx, pause_rx); 344 345 if (old_status.bits32 == status.bits32) 346 return; 347 348 if (netif_msg_link(port)) { 349 phy_print_status(phydev); 350 netdev_info(netdev, "link flow control: %s\n", 351 phydev->pause 352 ? (phydev->asym_pause ? "tx" : "both") 353 : (phydev->asym_pause ? "rx" : "none") 354 ); 355 } 356 357 gmac_disable_tx_rx(netdev); 358 writel(status.bits32, port->gmac_base + GMAC_STATUS); 359 gmac_enable_tx_rx(netdev); 360 } 361 362 static int gmac_setup_phy(struct net_device *netdev) 363 { 364 struct gemini_ethernet_port *port = netdev_priv(netdev); 365 union gmac_status status = { .bits32 = 0 }; 366 struct device *dev = port->dev; 367 struct phy_device *phy; 368 369 phy = of_phy_get_and_connect(netdev, 370 dev->of_node, 371 gmac_speed_set); 372 if (!phy) 373 return -ENODEV; 374 netdev->phydev = phy; 375 376 phy_set_max_speed(phy, SPEED_1000); 377 phy_support_asym_pause(phy); 378 379 /* set PHY interface type */ 380 switch (phy->interface) { 381 case PHY_INTERFACE_MODE_MII: 382 netdev_dbg(netdev, 383 "MII: set GMAC0 to GMII mode, GMAC1 disabled\n"); 384 status.bits.mii_rmii = GMAC_PHY_MII; 385 break; 386 case PHY_INTERFACE_MODE_GMII: 387 netdev_dbg(netdev, 388 "GMII: set GMAC0 to GMII mode, GMAC1 disabled\n"); 389 status.bits.mii_rmii = GMAC_PHY_GMII; 390 break; 391 case PHY_INTERFACE_MODE_RGMII: 392 netdev_dbg(netdev, 393 "RGMII: set GMAC0 and GMAC1 to MII/RGMII mode\n"); 394 status.bits.mii_rmii = GMAC_PHY_RGMII_100_10; 395 break; 396 default: 397 netdev_err(netdev, "Unsupported MII interface\n"); 398 phy_disconnect(phy); 399 netdev->phydev = NULL; 400 return -EINVAL; 401 } 402 writel(status.bits32, port->gmac_base + GMAC_STATUS); 403 404 if (netif_msg_link(port)) 405 phy_attached_info(phy); 406 407 return 0; 408 } 409 410 /* The maximum frame length is not logically enumerated in the 411 * hardware, so we do a table lookup to find the applicable max 412 * frame length. 413 */ 414 struct gmac_max_framelen { 415 unsigned int max_l3_len; 416 u8 val; 417 }; 418 419 static const struct gmac_max_framelen gmac_maxlens[] = { 420 { 421 .max_l3_len = 1518, 422 .val = CONFIG0_MAXLEN_1518, 423 }, 424 { 425 .max_l3_len = 1522, 426 .val = CONFIG0_MAXLEN_1522, 427 }, 428 { 429 .max_l3_len = 1536, 430 .val = CONFIG0_MAXLEN_1536, 431 }, 432 { 433 .max_l3_len = 1542, 434 .val = CONFIG0_MAXLEN_1542, 435 }, 436 { 437 .max_l3_len = 9212, 438 .val = CONFIG0_MAXLEN_9k, 439 }, 440 { 441 .max_l3_len = 10236, 442 .val = CONFIG0_MAXLEN_10k, 443 }, 444 }; 445 446 static int gmac_pick_rx_max_len(unsigned int max_l3_len) 447 { 448 const struct gmac_max_framelen *maxlen; 449 int maxtot; 450 int i; 451 452 maxtot = max_l3_len + ETH_HLEN + VLAN_HLEN; 453 454 for (i = 0; i < ARRAY_SIZE(gmac_maxlens); i++) { 455 maxlen = &gmac_maxlens[i]; 456 if (maxtot <= maxlen->max_l3_len) 457 return maxlen->val; 458 } 459 460 return -1; 461 } 462 463 static int gmac_init(struct net_device *netdev) 464 { 465 struct gemini_ethernet_port *port = netdev_priv(netdev); 466 union gmac_config0 config0 = { .bits = { 467 .dis_tx = 1, 468 .dis_rx = 1, 469 .ipv4_rx_chksum = 1, 470 .ipv6_rx_chksum = 1, 471 .rx_err_detect = 1, 472 .rgmm_edge = 1, 473 .port0_chk_hwq = 1, 474 .port1_chk_hwq = 1, 475 .port0_chk_toeq = 1, 476 .port1_chk_toeq = 1, 477 .port0_chk_classq = 1, 478 .port1_chk_classq = 1, 479 } }; 480 union gmac_ahb_weight ahb_weight = { .bits = { 481 .rx_weight = 1, 482 .tx_weight = 1, 483 .hash_weight = 1, 484 .pre_req = 0x1f, 485 .tq_dv_threshold = 0, 486 } }; 487 union gmac_tx_wcr0 hw_weigh = { .bits = { 488 .hw_tq3 = 1, 489 .hw_tq2 = 1, 490 .hw_tq1 = 1, 491 .hw_tq0 = 1, 492 } }; 493 union gmac_tx_wcr1 sw_weigh = { .bits = { 494 .sw_tq5 = 1, 495 .sw_tq4 = 1, 496 .sw_tq3 = 1, 497 .sw_tq2 = 1, 498 .sw_tq1 = 1, 499 .sw_tq0 = 1, 500 } }; 501 union gmac_config1 config1 = { .bits = { 502 .set_threshold = 16, 503 .rel_threshold = 24, 504 } }; 505 union gmac_config2 config2 = { .bits = { 506 .set_threshold = 16, 507 .rel_threshold = 32, 508 } }; 509 union gmac_config3 config3 = { .bits = { 510 .set_threshold = 0, 511 .rel_threshold = 0, 512 } }; 513 union gmac_config0 tmp; 514 515 config0.bits.max_len = gmac_pick_rx_max_len(netdev->mtu); 516 tmp.bits32 = readl(port->gmac_base + GMAC_CONFIG0); 517 config0.bits.reserved = tmp.bits.reserved; 518 writel(config0.bits32, port->gmac_base + GMAC_CONFIG0); 519 writel(config1.bits32, port->gmac_base + GMAC_CONFIG1); 520 writel(config2.bits32, port->gmac_base + GMAC_CONFIG2); 521 writel(config3.bits32, port->gmac_base + GMAC_CONFIG3); 522 523 readl(port->dma_base + GMAC_AHB_WEIGHT_REG); 524 writel(ahb_weight.bits32, port->dma_base + GMAC_AHB_WEIGHT_REG); 525 526 writel(hw_weigh.bits32, 527 port->dma_base + GMAC_TX_WEIGHTING_CTRL_0_REG); 528 writel(sw_weigh.bits32, 529 port->dma_base + GMAC_TX_WEIGHTING_CTRL_1_REG); 530 531 port->rxq_order = DEFAULT_GMAC_RXQ_ORDER; 532 port->txq_order = DEFAULT_GMAC_TXQ_ORDER; 533 port->rx_coalesce_nsecs = DEFAULT_RX_COALESCE_NSECS; 534 535 /* Mark every quarter of the queue a packet for interrupt 536 * in order to be able to wake up the queue if it was stopped 537 */ 538 port->irq_every_tx_packets = 1 << (port->txq_order - 2); 539 540 return 0; 541 } 542 543 static int gmac_setup_txqs(struct net_device *netdev) 544 { 545 struct gemini_ethernet_port *port = netdev_priv(netdev); 546 unsigned int n_txq = netdev->num_tx_queues; 547 struct gemini_ethernet *geth = port->geth; 548 size_t entries = 1 << port->txq_order; 549 struct gmac_txq *txq = port->txq; 550 struct gmac_txdesc *desc_ring; 551 size_t len = n_txq * entries; 552 struct sk_buff **skb_tab; 553 void __iomem *rwptr_reg; 554 unsigned int r; 555 int i; 556 557 rwptr_reg = port->dma_base + GMAC_SW_TX_QUEUE0_PTR_REG; 558 559 skb_tab = kcalloc(len, sizeof(*skb_tab), GFP_KERNEL); 560 if (!skb_tab) 561 return -ENOMEM; 562 563 desc_ring = dma_alloc_coherent(geth->dev, len * sizeof(*desc_ring), 564 &port->txq_dma_base, GFP_KERNEL); 565 566 if (!desc_ring) { 567 kfree(skb_tab); 568 return -ENOMEM; 569 } 570 571 if (port->txq_dma_base & ~DMA_Q_BASE_MASK) { 572 dev_warn(geth->dev, "TX queue base is not aligned\n"); 573 dma_free_coherent(geth->dev, len * sizeof(*desc_ring), 574 desc_ring, port->txq_dma_base); 575 kfree(skb_tab); 576 return -ENOMEM; 577 } 578 579 writel(port->txq_dma_base | port->txq_order, 580 port->dma_base + GMAC_SW_TX_QUEUE_BASE_REG); 581 582 for (i = 0; i < n_txq; i++) { 583 txq->ring = desc_ring; 584 txq->skb = skb_tab; 585 txq->noirq_packets = 0; 586 587 r = readw(rwptr_reg); 588 rwptr_reg += 2; 589 writew(r, rwptr_reg); 590 rwptr_reg += 2; 591 txq->cptr = r; 592 593 txq++; 594 desc_ring += entries; 595 skb_tab += entries; 596 } 597 598 return 0; 599 } 600 601 static void gmac_clean_txq(struct net_device *netdev, struct gmac_txq *txq, 602 unsigned int r) 603 { 604 struct gemini_ethernet_port *port = netdev_priv(netdev); 605 unsigned int m = (1 << port->txq_order) - 1; 606 struct gemini_ethernet *geth = port->geth; 607 unsigned int c = txq->cptr; 608 union gmac_txdesc_0 word0; 609 union gmac_txdesc_1 word1; 610 unsigned int hwchksum = 0; 611 unsigned long bytes = 0; 612 struct gmac_txdesc *txd; 613 unsigned short nfrags; 614 unsigned int errs = 0; 615 unsigned int pkts = 0; 616 unsigned int word3; 617 dma_addr_t mapping; 618 619 if (c == r) 620 return; 621 622 while (c != r) { 623 txd = txq->ring + c; 624 word0 = txd->word0; 625 word1 = txd->word1; 626 mapping = txd->word2.buf_adr; 627 word3 = txd->word3.bits32; 628 629 dma_unmap_single(geth->dev, mapping, 630 word0.bits.buffer_size, DMA_TO_DEVICE); 631 632 if (word3 & EOF_BIT) 633 dev_kfree_skb(txq->skb[c]); 634 635 c++; 636 c &= m; 637 638 if (!(word3 & SOF_BIT)) 639 continue; 640 641 if (!word0.bits.status_tx_ok) { 642 errs++; 643 continue; 644 } 645 646 pkts++; 647 bytes += txd->word1.bits.byte_count; 648 649 if (word1.bits32 & TSS_CHECKUM_ENABLE) 650 hwchksum++; 651 652 nfrags = word0.bits.desc_count - 1; 653 if (nfrags) { 654 if (nfrags >= TX_MAX_FRAGS) 655 nfrags = TX_MAX_FRAGS - 1; 656 657 u64_stats_update_begin(&port->tx_stats_syncp); 658 port->tx_frag_stats[nfrags]++; 659 u64_stats_update_end(&port->tx_stats_syncp); 660 } 661 } 662 663 u64_stats_update_begin(&port->ir_stats_syncp); 664 port->stats.tx_errors += errs; 665 port->stats.tx_packets += pkts; 666 port->stats.tx_bytes += bytes; 667 port->tx_hw_csummed += hwchksum; 668 u64_stats_update_end(&port->ir_stats_syncp); 669 670 txq->cptr = c; 671 } 672 673 static void gmac_cleanup_txqs(struct net_device *netdev) 674 { 675 struct gemini_ethernet_port *port = netdev_priv(netdev); 676 unsigned int n_txq = netdev->num_tx_queues; 677 struct gemini_ethernet *geth = port->geth; 678 void __iomem *rwptr_reg; 679 unsigned int r, i; 680 681 rwptr_reg = port->dma_base + GMAC_SW_TX_QUEUE0_PTR_REG; 682 683 for (i = 0; i < n_txq; i++) { 684 r = readw(rwptr_reg); 685 rwptr_reg += 2; 686 writew(r, rwptr_reg); 687 rwptr_reg += 2; 688 689 gmac_clean_txq(netdev, port->txq + i, r); 690 } 691 writel(0, port->dma_base + GMAC_SW_TX_QUEUE_BASE_REG); 692 693 kfree(port->txq->skb); 694 dma_free_coherent(geth->dev, 695 n_txq * sizeof(*port->txq->ring) << port->txq_order, 696 port->txq->ring, port->txq_dma_base); 697 } 698 699 static int gmac_setup_rxq(struct net_device *netdev) 700 { 701 struct gemini_ethernet_port *port = netdev_priv(netdev); 702 struct gemini_ethernet *geth = port->geth; 703 struct nontoe_qhdr __iomem *qhdr; 704 705 qhdr = geth->base + TOE_DEFAULT_Q_HDR_BASE(netdev->dev_id); 706 port->rxq_rwptr = &qhdr->word1; 707 708 /* Remap a slew of memory to use for the RX queue */ 709 port->rxq_ring = dma_alloc_coherent(geth->dev, 710 sizeof(*port->rxq_ring) << port->rxq_order, 711 &port->rxq_dma_base, GFP_KERNEL); 712 if (!port->rxq_ring) 713 return -ENOMEM; 714 if (port->rxq_dma_base & ~NONTOE_QHDR0_BASE_MASK) { 715 dev_warn(geth->dev, "RX queue base is not aligned\n"); 716 return -ENOMEM; 717 } 718 719 writel(port->rxq_dma_base | port->rxq_order, &qhdr->word0); 720 writel(0, port->rxq_rwptr); 721 return 0; 722 } 723 724 static struct gmac_queue_page * 725 gmac_get_queue_page(struct gemini_ethernet *geth, 726 struct gemini_ethernet_port *port, 727 dma_addr_t addr) 728 { 729 struct gmac_queue_page *gpage; 730 dma_addr_t mapping; 731 int i; 732 733 /* Only look for even pages */ 734 mapping = addr & PAGE_MASK; 735 736 if (!geth->freeq_pages) { 737 dev_err(geth->dev, "try to get page with no page list\n"); 738 return NULL; 739 } 740 741 /* Look up a ring buffer page from virtual mapping */ 742 for (i = 0; i < geth->num_freeq_pages; i++) { 743 gpage = &geth->freeq_pages[i]; 744 if (gpage->mapping == mapping) 745 return gpage; 746 } 747 748 return NULL; 749 } 750 751 static void gmac_cleanup_rxq(struct net_device *netdev) 752 { 753 struct gemini_ethernet_port *port = netdev_priv(netdev); 754 struct gemini_ethernet *geth = port->geth; 755 struct gmac_rxdesc *rxd = port->rxq_ring; 756 static struct gmac_queue_page *gpage; 757 struct nontoe_qhdr __iomem *qhdr; 758 void __iomem *dma_reg; 759 void __iomem *ptr_reg; 760 dma_addr_t mapping; 761 union dma_rwptr rw; 762 unsigned int r, w; 763 764 qhdr = geth->base + 765 TOE_DEFAULT_Q_HDR_BASE(netdev->dev_id); 766 dma_reg = &qhdr->word0; 767 ptr_reg = &qhdr->word1; 768 769 rw.bits32 = readl(ptr_reg); 770 r = rw.bits.rptr; 771 w = rw.bits.wptr; 772 writew(r, ptr_reg + 2); 773 774 writel(0, dma_reg); 775 776 /* Loop from read pointer to write pointer of the RX queue 777 * and free up all pages by the queue. 778 */ 779 while (r != w) { 780 mapping = rxd[r].word2.buf_adr; 781 r++; 782 r &= ((1 << port->rxq_order) - 1); 783 784 if (!mapping) 785 continue; 786 787 /* Freeq pointers are one page off */ 788 gpage = gmac_get_queue_page(geth, port, mapping + PAGE_SIZE); 789 if (!gpage) { 790 dev_err(geth->dev, "could not find page\n"); 791 continue; 792 } 793 /* Release the RX queue reference to the page */ 794 put_page(gpage->page); 795 } 796 797 dma_free_coherent(geth->dev, sizeof(*port->rxq_ring) << port->rxq_order, 798 port->rxq_ring, port->rxq_dma_base); 799 } 800 801 static struct page *geth_freeq_alloc_map_page(struct gemini_ethernet *geth, 802 int pn) 803 { 804 struct gmac_rxdesc *freeq_entry; 805 struct gmac_queue_page *gpage; 806 unsigned int fpp_order; 807 unsigned int frag_len; 808 dma_addr_t mapping; 809 struct page *page; 810 int i; 811 812 /* First allocate and DMA map a single page */ 813 page = alloc_page(GFP_ATOMIC); 814 if (!page) 815 return NULL; 816 817 mapping = dma_map_single(geth->dev, page_address(page), 818 PAGE_SIZE, DMA_FROM_DEVICE); 819 if (dma_mapping_error(geth->dev, mapping)) { 820 put_page(page); 821 return NULL; 822 } 823 824 /* The assign the page mapping (physical address) to the buffer address 825 * in the hardware queue. PAGE_SHIFT on ARM is 12 (1 page is 4096 bytes, 826 * 4k), and the default RX frag order is 11 (fragments are up 20 2048 827 * bytes, 2k) so fpp_order (fragments per page order) is default 1. Thus 828 * each page normally needs two entries in the queue. 829 */ 830 frag_len = 1 << geth->freeq_frag_order; /* Usually 2048 */ 831 fpp_order = PAGE_SHIFT - geth->freeq_frag_order; 832 freeq_entry = geth->freeq_ring + (pn << fpp_order); 833 dev_dbg(geth->dev, "allocate page %d fragment length %d fragments per page %d, freeq entry %p\n", 834 pn, frag_len, (1 << fpp_order), freeq_entry); 835 for (i = (1 << fpp_order); i > 0; i--) { 836 freeq_entry->word2.buf_adr = mapping; 837 freeq_entry++; 838 mapping += frag_len; 839 } 840 841 /* If the freeq entry already has a page mapped, then unmap it. */ 842 gpage = &geth->freeq_pages[pn]; 843 if (gpage->page) { 844 mapping = geth->freeq_ring[pn << fpp_order].word2.buf_adr; 845 dma_unmap_single(geth->dev, mapping, frag_len, DMA_FROM_DEVICE); 846 /* This should be the last reference to the page so it gets 847 * released 848 */ 849 put_page(gpage->page); 850 } 851 852 /* Then put our new mapping into the page table */ 853 dev_dbg(geth->dev, "page %d, DMA addr: %08x, page %p\n", 854 pn, (unsigned int)mapping, page); 855 gpage->mapping = mapping; 856 gpage->page = page; 857 858 return page; 859 } 860 861 /** 862 * geth_fill_freeq() - Fill the freeq with empty fragments to use 863 * @geth: the ethernet adapter 864 * @refill: whether to reset the queue by filling in all freeq entries or 865 * just refill it, usually the interrupt to refill the queue happens when 866 * the queue is half empty. 867 */ 868 static unsigned int geth_fill_freeq(struct gemini_ethernet *geth, bool refill) 869 { 870 unsigned int fpp_order = PAGE_SHIFT - geth->freeq_frag_order; 871 unsigned int count = 0; 872 unsigned int pn, epn; 873 unsigned long flags; 874 union dma_rwptr rw; 875 unsigned int m_pn; 876 877 /* Mask for page */ 878 m_pn = (1 << (geth->freeq_order - fpp_order)) - 1; 879 880 spin_lock_irqsave(&geth->freeq_lock, flags); 881 882 rw.bits32 = readl(geth->base + GLOBAL_SWFQ_RWPTR_REG); 883 pn = (refill ? rw.bits.wptr : rw.bits.rptr) >> fpp_order; 884 epn = (rw.bits.rptr >> fpp_order) - 1; 885 epn &= m_pn; 886 887 /* Loop over the freeq ring buffer entries */ 888 while (pn != epn) { 889 struct gmac_queue_page *gpage; 890 struct page *page; 891 892 gpage = &geth->freeq_pages[pn]; 893 page = gpage->page; 894 895 dev_dbg(geth->dev, "fill entry %d page ref count %d add %d refs\n", 896 pn, page_ref_count(page), 1 << fpp_order); 897 898 if (page_ref_count(page) > 1) { 899 unsigned int fl = (pn - epn) & m_pn; 900 901 if (fl > 64 >> fpp_order) 902 break; 903 904 page = geth_freeq_alloc_map_page(geth, pn); 905 if (!page) 906 break; 907 } 908 909 /* Add one reference per fragment in the page */ 910 page_ref_add(page, 1 << fpp_order); 911 count += 1 << fpp_order; 912 pn++; 913 pn &= m_pn; 914 } 915 916 writew(pn << fpp_order, geth->base + GLOBAL_SWFQ_RWPTR_REG + 2); 917 918 spin_unlock_irqrestore(&geth->freeq_lock, flags); 919 920 return count; 921 } 922 923 static int geth_setup_freeq(struct gemini_ethernet *geth) 924 { 925 unsigned int fpp_order = PAGE_SHIFT - geth->freeq_frag_order; 926 unsigned int frag_len = 1 << geth->freeq_frag_order; 927 unsigned int len = 1 << geth->freeq_order; 928 unsigned int pages = len >> fpp_order; 929 union queue_threshold qt; 930 union dma_skb_size skbsz; 931 unsigned int filled; 932 unsigned int pn; 933 934 geth->freeq_ring = dma_alloc_coherent(geth->dev, 935 sizeof(*geth->freeq_ring) << geth->freeq_order, 936 &geth->freeq_dma_base, GFP_KERNEL); 937 if (!geth->freeq_ring) 938 return -ENOMEM; 939 if (geth->freeq_dma_base & ~DMA_Q_BASE_MASK) { 940 dev_warn(geth->dev, "queue ring base is not aligned\n"); 941 goto err_freeq; 942 } 943 944 /* Allocate a mapping to page look-up index */ 945 geth->freeq_pages = kcalloc(pages, sizeof(*geth->freeq_pages), 946 GFP_KERNEL); 947 if (!geth->freeq_pages) 948 goto err_freeq; 949 geth->num_freeq_pages = pages; 950 951 dev_info(geth->dev, "allocate %d pages for queue\n", pages); 952 for (pn = 0; pn < pages; pn++) 953 if (!geth_freeq_alloc_map_page(geth, pn)) 954 goto err_freeq_alloc; 955 956 filled = geth_fill_freeq(geth, false); 957 if (!filled) 958 goto err_freeq_alloc; 959 960 qt.bits32 = readl(geth->base + GLOBAL_QUEUE_THRESHOLD_REG); 961 qt.bits.swfq_empty = 32; 962 writel(qt.bits32, geth->base + GLOBAL_QUEUE_THRESHOLD_REG); 963 964 skbsz.bits.sw_skb_size = 1 << geth->freeq_frag_order; 965 writel(skbsz.bits32, geth->base + GLOBAL_DMA_SKB_SIZE_REG); 966 writel(geth->freeq_dma_base | geth->freeq_order, 967 geth->base + GLOBAL_SW_FREEQ_BASE_SIZE_REG); 968 969 return 0; 970 971 err_freeq_alloc: 972 while (pn > 0) { 973 struct gmac_queue_page *gpage; 974 dma_addr_t mapping; 975 976 --pn; 977 mapping = geth->freeq_ring[pn << fpp_order].word2.buf_adr; 978 dma_unmap_single(geth->dev, mapping, frag_len, DMA_FROM_DEVICE); 979 gpage = &geth->freeq_pages[pn]; 980 put_page(gpage->page); 981 } 982 983 kfree(geth->freeq_pages); 984 err_freeq: 985 dma_free_coherent(geth->dev, 986 sizeof(*geth->freeq_ring) << geth->freeq_order, 987 geth->freeq_ring, geth->freeq_dma_base); 988 geth->freeq_ring = NULL; 989 return -ENOMEM; 990 } 991 992 /** 993 * geth_cleanup_freeq() - cleanup the DMA mappings and free the queue 994 * @geth: the Gemini global ethernet state 995 */ 996 static void geth_cleanup_freeq(struct gemini_ethernet *geth) 997 { 998 unsigned int fpp_order = PAGE_SHIFT - geth->freeq_frag_order; 999 unsigned int frag_len = 1 << geth->freeq_frag_order; 1000 unsigned int len = 1 << geth->freeq_order; 1001 unsigned int pages = len >> fpp_order; 1002 unsigned int pn; 1003 1004 writew(readw(geth->base + GLOBAL_SWFQ_RWPTR_REG), 1005 geth->base + GLOBAL_SWFQ_RWPTR_REG + 2); 1006 writel(0, geth->base + GLOBAL_SW_FREEQ_BASE_SIZE_REG); 1007 1008 for (pn = 0; pn < pages; pn++) { 1009 struct gmac_queue_page *gpage; 1010 dma_addr_t mapping; 1011 1012 mapping = geth->freeq_ring[pn << fpp_order].word2.buf_adr; 1013 dma_unmap_single(geth->dev, mapping, frag_len, DMA_FROM_DEVICE); 1014 1015 gpage = &geth->freeq_pages[pn]; 1016 while (page_ref_count(gpage->page) > 0) 1017 put_page(gpage->page); 1018 } 1019 1020 kfree(geth->freeq_pages); 1021 1022 dma_free_coherent(geth->dev, 1023 sizeof(*geth->freeq_ring) << geth->freeq_order, 1024 geth->freeq_ring, geth->freeq_dma_base); 1025 } 1026 1027 /** 1028 * geth_resize_freeq() - resize the software queue depth 1029 * @port: the port requesting the change 1030 * 1031 * This gets called at least once during probe() so the device queue gets 1032 * "resized" from the hardware defaults. Since both ports/net devices share 1033 * the same hardware queue, some synchronization between the ports is 1034 * needed. 1035 */ 1036 static int geth_resize_freeq(struct gemini_ethernet_port *port) 1037 { 1038 struct gemini_ethernet *geth = port->geth; 1039 struct net_device *netdev = port->netdev; 1040 struct gemini_ethernet_port *other_port; 1041 struct net_device *other_netdev; 1042 unsigned int new_size = 0; 1043 unsigned int new_order; 1044 unsigned long flags; 1045 u32 en; 1046 int ret; 1047 1048 if (netdev->dev_id == 0) 1049 other_netdev = geth->port1->netdev; 1050 else 1051 other_netdev = geth->port0->netdev; 1052 1053 if (other_netdev && netif_running(other_netdev)) 1054 return -EBUSY; 1055 1056 new_size = 1 << (port->rxq_order + 1); 1057 netdev_dbg(netdev, "port %d size: %d order %d\n", 1058 netdev->dev_id, 1059 new_size, 1060 port->rxq_order); 1061 if (other_netdev) { 1062 other_port = netdev_priv(other_netdev); 1063 new_size += 1 << (other_port->rxq_order + 1); 1064 netdev_dbg(other_netdev, "port %d size: %d order %d\n", 1065 other_netdev->dev_id, 1066 (1 << (other_port->rxq_order + 1)), 1067 other_port->rxq_order); 1068 } 1069 1070 new_order = min(15, ilog2(new_size - 1) + 1); 1071 dev_dbg(geth->dev, "set shared queue to size %d order %d\n", 1072 new_size, new_order); 1073 if (geth->freeq_order == new_order) 1074 return 0; 1075 1076 spin_lock_irqsave(&geth->irq_lock, flags); 1077 1078 /* Disable the software queue IRQs */ 1079 en = readl(geth->base + GLOBAL_INTERRUPT_ENABLE_4_REG); 1080 en &= ~SWFQ_EMPTY_INT_BIT; 1081 writel(en, geth->base + GLOBAL_INTERRUPT_ENABLE_4_REG); 1082 spin_unlock_irqrestore(&geth->irq_lock, flags); 1083 1084 /* Drop the old queue */ 1085 if (geth->freeq_ring) 1086 geth_cleanup_freeq(geth); 1087 1088 /* Allocate a new queue with the desired order */ 1089 geth->freeq_order = new_order; 1090 ret = geth_setup_freeq(geth); 1091 1092 /* Restart the interrupts - NOTE if this is the first resize 1093 * after probe(), this is where the interrupts get turned on 1094 * in the first place. 1095 */ 1096 spin_lock_irqsave(&geth->irq_lock, flags); 1097 en |= SWFQ_EMPTY_INT_BIT; 1098 writel(en, geth->base + GLOBAL_INTERRUPT_ENABLE_4_REG); 1099 spin_unlock_irqrestore(&geth->irq_lock, flags); 1100 1101 return ret; 1102 } 1103 1104 static void gmac_tx_irq_enable(struct net_device *netdev, 1105 unsigned int txq, int en) 1106 { 1107 struct gemini_ethernet_port *port = netdev_priv(netdev); 1108 struct gemini_ethernet *geth = port->geth; 1109 u32 val, mask; 1110 1111 netdev_dbg(netdev, "%s device %d\n", __func__, netdev->dev_id); 1112 1113 mask = GMAC0_IRQ0_TXQ0_INTS << (6 * netdev->dev_id + txq); 1114 1115 if (en) 1116 writel(mask, geth->base + GLOBAL_INTERRUPT_STATUS_0_REG); 1117 1118 val = readl(geth->base + GLOBAL_INTERRUPT_ENABLE_0_REG); 1119 val = en ? val | mask : val & ~mask; 1120 writel(val, geth->base + GLOBAL_INTERRUPT_ENABLE_0_REG); 1121 } 1122 1123 static void gmac_tx_irq(struct net_device *netdev, unsigned int txq_num) 1124 { 1125 struct netdev_queue *ntxq = netdev_get_tx_queue(netdev, txq_num); 1126 1127 gmac_tx_irq_enable(netdev, txq_num, 0); 1128 netif_tx_wake_queue(ntxq); 1129 } 1130 1131 static int gmac_map_tx_bufs(struct net_device *netdev, struct sk_buff *skb, 1132 struct gmac_txq *txq, unsigned short *desc) 1133 { 1134 struct gemini_ethernet_port *port = netdev_priv(netdev); 1135 struct skb_shared_info *skb_si = skb_shinfo(skb); 1136 unsigned short m = (1 << port->txq_order) - 1; 1137 short frag, last_frag = skb_si->nr_frags - 1; 1138 struct gemini_ethernet *geth = port->geth; 1139 unsigned int word1, word3, buflen; 1140 unsigned short w = *desc; 1141 struct gmac_txdesc *txd; 1142 skb_frag_t *skb_frag; 1143 dma_addr_t mapping; 1144 unsigned short mtu; 1145 void *buffer; 1146 1147 mtu = ETH_HLEN; 1148 mtu += netdev->mtu; 1149 if (skb->protocol == htons(ETH_P_8021Q)) 1150 mtu += VLAN_HLEN; 1151 1152 word1 = skb->len; 1153 word3 = SOF_BIT; 1154 1155 if (word1 > mtu) { 1156 word1 |= TSS_MTU_ENABLE_BIT; 1157 word3 |= mtu; 1158 } 1159 1160 if (skb->ip_summed != CHECKSUM_NONE) { 1161 int tcp = 0; 1162 1163 if (skb->protocol == htons(ETH_P_IP)) { 1164 word1 |= TSS_IP_CHKSUM_BIT; 1165 tcp = ip_hdr(skb)->protocol == IPPROTO_TCP; 1166 } else { /* IPv6 */ 1167 word1 |= TSS_IPV6_ENABLE_BIT; 1168 tcp = ipv6_hdr(skb)->nexthdr == IPPROTO_TCP; 1169 } 1170 1171 word1 |= tcp ? TSS_TCP_CHKSUM_BIT : TSS_UDP_CHKSUM_BIT; 1172 } 1173 1174 frag = -1; 1175 while (frag <= last_frag) { 1176 if (frag == -1) { 1177 buffer = skb->data; 1178 buflen = skb_headlen(skb); 1179 } else { 1180 skb_frag = skb_si->frags + frag; 1181 buffer = skb_frag_address(skb_frag); 1182 buflen = skb_frag_size(skb_frag); 1183 } 1184 1185 if (frag == last_frag) { 1186 word3 |= EOF_BIT; 1187 txq->skb[w] = skb; 1188 } 1189 1190 mapping = dma_map_single(geth->dev, buffer, buflen, 1191 DMA_TO_DEVICE); 1192 if (dma_mapping_error(geth->dev, mapping)) 1193 goto map_error; 1194 1195 txd = txq->ring + w; 1196 txd->word0.bits32 = buflen; 1197 txd->word1.bits32 = word1; 1198 txd->word2.buf_adr = mapping; 1199 txd->word3.bits32 = word3; 1200 1201 word3 &= MTU_SIZE_BIT_MASK; 1202 w++; 1203 w &= m; 1204 frag++; 1205 } 1206 1207 *desc = w; 1208 return 0; 1209 1210 map_error: 1211 while (w != *desc) { 1212 w--; 1213 w &= m; 1214 1215 dma_unmap_page(geth->dev, txq->ring[w].word2.buf_adr, 1216 txq->ring[w].word0.bits.buffer_size, 1217 DMA_TO_DEVICE); 1218 } 1219 return -ENOMEM; 1220 } 1221 1222 static netdev_tx_t gmac_start_xmit(struct sk_buff *skb, 1223 struct net_device *netdev) 1224 { 1225 struct gemini_ethernet_port *port = netdev_priv(netdev); 1226 unsigned short m = (1 << port->txq_order) - 1; 1227 struct netdev_queue *ntxq; 1228 unsigned short r, w, d; 1229 void __iomem *ptr_reg; 1230 struct gmac_txq *txq; 1231 int txq_num, nfrags; 1232 union dma_rwptr rw; 1233 1234 if (skb->len >= 0x10000) 1235 goto out_drop_free; 1236 1237 txq_num = skb_get_queue_mapping(skb); 1238 ptr_reg = port->dma_base + GMAC_SW_TX_QUEUE_PTR_REG(txq_num); 1239 txq = &port->txq[txq_num]; 1240 ntxq = netdev_get_tx_queue(netdev, txq_num); 1241 nfrags = skb_shinfo(skb)->nr_frags; 1242 1243 rw.bits32 = readl(ptr_reg); 1244 r = rw.bits.rptr; 1245 w = rw.bits.wptr; 1246 1247 d = txq->cptr - w - 1; 1248 d &= m; 1249 1250 if (d < nfrags + 2) { 1251 gmac_clean_txq(netdev, txq, r); 1252 d = txq->cptr - w - 1; 1253 d &= m; 1254 1255 if (d < nfrags + 2) { 1256 netif_tx_stop_queue(ntxq); 1257 1258 d = txq->cptr + nfrags + 16; 1259 d &= m; 1260 txq->ring[d].word3.bits.eofie = 1; 1261 gmac_tx_irq_enable(netdev, txq_num, 1); 1262 1263 u64_stats_update_begin(&port->tx_stats_syncp); 1264 netdev->stats.tx_fifo_errors++; 1265 u64_stats_update_end(&port->tx_stats_syncp); 1266 return NETDEV_TX_BUSY; 1267 } 1268 } 1269 1270 if (gmac_map_tx_bufs(netdev, skb, txq, &w)) { 1271 if (skb_linearize(skb)) 1272 goto out_drop; 1273 1274 u64_stats_update_begin(&port->tx_stats_syncp); 1275 port->tx_frags_linearized++; 1276 u64_stats_update_end(&port->tx_stats_syncp); 1277 1278 if (gmac_map_tx_bufs(netdev, skb, txq, &w)) 1279 goto out_drop_free; 1280 } 1281 1282 writew(w, ptr_reg + 2); 1283 1284 gmac_clean_txq(netdev, txq, r); 1285 return NETDEV_TX_OK; 1286 1287 out_drop_free: 1288 dev_kfree_skb(skb); 1289 out_drop: 1290 u64_stats_update_begin(&port->tx_stats_syncp); 1291 port->stats.tx_dropped++; 1292 u64_stats_update_end(&port->tx_stats_syncp); 1293 return NETDEV_TX_OK; 1294 } 1295 1296 static void gmac_tx_timeout(struct net_device *netdev, unsigned int txqueue) 1297 { 1298 netdev_err(netdev, "Tx timeout\n"); 1299 gmac_dump_dma_state(netdev); 1300 } 1301 1302 static void gmac_enable_irq(struct net_device *netdev, int enable) 1303 { 1304 struct gemini_ethernet_port *port = netdev_priv(netdev); 1305 struct gemini_ethernet *geth = port->geth; 1306 unsigned long flags; 1307 u32 val, mask; 1308 1309 netdev_dbg(netdev, "%s device %d %s\n", __func__, 1310 netdev->dev_id, enable ? "enable" : "disable"); 1311 spin_lock_irqsave(&geth->irq_lock, flags); 1312 1313 mask = GMAC0_IRQ0_2 << (netdev->dev_id * 2); 1314 val = readl(geth->base + GLOBAL_INTERRUPT_ENABLE_0_REG); 1315 val = enable ? (val | mask) : (val & ~mask); 1316 writel(val, geth->base + GLOBAL_INTERRUPT_ENABLE_0_REG); 1317 1318 mask = DEFAULT_Q0_INT_BIT << netdev->dev_id; 1319 val = readl(geth->base + GLOBAL_INTERRUPT_ENABLE_1_REG); 1320 val = enable ? (val | mask) : (val & ~mask); 1321 writel(val, geth->base + GLOBAL_INTERRUPT_ENABLE_1_REG); 1322 1323 mask = GMAC0_IRQ4_8 << (netdev->dev_id * 8); 1324 val = readl(geth->base + GLOBAL_INTERRUPT_ENABLE_4_REG); 1325 val = enable ? (val | mask) : (val & ~mask); 1326 writel(val, geth->base + GLOBAL_INTERRUPT_ENABLE_4_REG); 1327 1328 spin_unlock_irqrestore(&geth->irq_lock, flags); 1329 } 1330 1331 static void gmac_enable_rx_irq(struct net_device *netdev, int enable) 1332 { 1333 struct gemini_ethernet_port *port = netdev_priv(netdev); 1334 struct gemini_ethernet *geth = port->geth; 1335 unsigned long flags; 1336 u32 val, mask; 1337 1338 netdev_dbg(netdev, "%s device %d %s\n", __func__, netdev->dev_id, 1339 enable ? "enable" : "disable"); 1340 spin_lock_irqsave(&geth->irq_lock, flags); 1341 mask = DEFAULT_Q0_INT_BIT << netdev->dev_id; 1342 1343 val = readl(geth->base + GLOBAL_INTERRUPT_ENABLE_1_REG); 1344 val = enable ? (val | mask) : (val & ~mask); 1345 writel(val, geth->base + GLOBAL_INTERRUPT_ENABLE_1_REG); 1346 1347 spin_unlock_irqrestore(&geth->irq_lock, flags); 1348 } 1349 1350 static struct sk_buff *gmac_skb_if_good_frame(struct gemini_ethernet_port *port, 1351 union gmac_rxdesc_0 word0, 1352 unsigned int frame_len) 1353 { 1354 unsigned int rx_csum = word0.bits.chksum_status; 1355 unsigned int rx_status = word0.bits.status; 1356 struct sk_buff *skb = NULL; 1357 1358 port->rx_stats[rx_status]++; 1359 port->rx_csum_stats[rx_csum]++; 1360 1361 if (word0.bits.derr || word0.bits.perr || 1362 rx_status || frame_len < ETH_ZLEN || 1363 rx_csum >= RX_CHKSUM_IP_ERR_UNKNOWN) { 1364 port->stats.rx_errors++; 1365 1366 if (frame_len < ETH_ZLEN || RX_ERROR_LENGTH(rx_status)) 1367 port->stats.rx_length_errors++; 1368 if (RX_ERROR_OVER(rx_status)) 1369 port->stats.rx_over_errors++; 1370 if (RX_ERROR_CRC(rx_status)) 1371 port->stats.rx_crc_errors++; 1372 if (RX_ERROR_FRAME(rx_status)) 1373 port->stats.rx_frame_errors++; 1374 return NULL; 1375 } 1376 1377 skb = napi_get_frags(&port->napi); 1378 if (!skb) 1379 goto update_exit; 1380 1381 if (rx_csum == RX_CHKSUM_IP_UDP_TCP_OK) 1382 skb->ip_summed = CHECKSUM_UNNECESSARY; 1383 1384 update_exit: 1385 port->stats.rx_bytes += frame_len; 1386 port->stats.rx_packets++; 1387 return skb; 1388 } 1389 1390 static unsigned int gmac_rx(struct net_device *netdev, unsigned int budget) 1391 { 1392 struct gemini_ethernet_port *port = netdev_priv(netdev); 1393 unsigned short m = (1 << port->rxq_order) - 1; 1394 struct gemini_ethernet *geth = port->geth; 1395 void __iomem *ptr_reg = port->rxq_rwptr; 1396 unsigned int frame_len, frag_len; 1397 struct gmac_rxdesc *rx = NULL; 1398 struct gmac_queue_page *gpage; 1399 static struct sk_buff *skb; 1400 union gmac_rxdesc_0 word0; 1401 union gmac_rxdesc_1 word1; 1402 union gmac_rxdesc_3 word3; 1403 struct page *page = NULL; 1404 unsigned int page_offs; 1405 unsigned short r, w; 1406 union dma_rwptr rw; 1407 dma_addr_t mapping; 1408 int frag_nr = 0; 1409 1410 rw.bits32 = readl(ptr_reg); 1411 /* Reset interrupt as all packages until here are taken into account */ 1412 writel(DEFAULT_Q0_INT_BIT << netdev->dev_id, 1413 geth->base + GLOBAL_INTERRUPT_STATUS_1_REG); 1414 r = rw.bits.rptr; 1415 w = rw.bits.wptr; 1416 1417 while (budget && w != r) { 1418 rx = port->rxq_ring + r; 1419 word0 = rx->word0; 1420 word1 = rx->word1; 1421 mapping = rx->word2.buf_adr; 1422 word3 = rx->word3; 1423 1424 r++; 1425 r &= m; 1426 1427 frag_len = word0.bits.buffer_size; 1428 frame_len = word1.bits.byte_count; 1429 page_offs = mapping & ~PAGE_MASK; 1430 1431 if (!mapping) { 1432 netdev_err(netdev, 1433 "rxq[%u]: HW BUG: zero DMA desc\n", r); 1434 goto err_drop; 1435 } 1436 1437 /* Freeq pointers are one page off */ 1438 gpage = gmac_get_queue_page(geth, port, mapping + PAGE_SIZE); 1439 if (!gpage) { 1440 dev_err(geth->dev, "could not find mapping\n"); 1441 continue; 1442 } 1443 page = gpage->page; 1444 1445 if (word3.bits32 & SOF_BIT) { 1446 if (skb) { 1447 napi_free_frags(&port->napi); 1448 port->stats.rx_dropped++; 1449 } 1450 1451 skb = gmac_skb_if_good_frame(port, word0, frame_len); 1452 if (!skb) 1453 goto err_drop; 1454 1455 page_offs += NET_IP_ALIGN; 1456 frag_len -= NET_IP_ALIGN; 1457 frag_nr = 0; 1458 1459 } else if (!skb) { 1460 put_page(page); 1461 continue; 1462 } 1463 1464 if (word3.bits32 & EOF_BIT) 1465 frag_len = frame_len - skb->len; 1466 1467 /* append page frag to skb */ 1468 if (frag_nr == MAX_SKB_FRAGS) 1469 goto err_drop; 1470 1471 if (frag_len == 0) 1472 netdev_err(netdev, "Received fragment with len = 0\n"); 1473 1474 skb_fill_page_desc(skb, frag_nr, page, page_offs, frag_len); 1475 skb->len += frag_len; 1476 skb->data_len += frag_len; 1477 skb->truesize += frag_len; 1478 frag_nr++; 1479 1480 if (word3.bits32 & EOF_BIT) { 1481 napi_gro_frags(&port->napi); 1482 skb = NULL; 1483 --budget; 1484 } 1485 continue; 1486 1487 err_drop: 1488 if (skb) { 1489 napi_free_frags(&port->napi); 1490 skb = NULL; 1491 } 1492 1493 if (mapping) 1494 put_page(page); 1495 1496 port->stats.rx_dropped++; 1497 } 1498 1499 writew(r, ptr_reg); 1500 return budget; 1501 } 1502 1503 static int gmac_napi_poll(struct napi_struct *napi, int budget) 1504 { 1505 struct gemini_ethernet_port *port = netdev_priv(napi->dev); 1506 struct gemini_ethernet *geth = port->geth; 1507 unsigned int freeq_threshold; 1508 unsigned int received; 1509 1510 freeq_threshold = 1 << (geth->freeq_order - 1); 1511 u64_stats_update_begin(&port->rx_stats_syncp); 1512 1513 received = gmac_rx(napi->dev, budget); 1514 if (received < budget) { 1515 napi_gro_flush(napi, false); 1516 napi_complete_done(napi, received); 1517 gmac_enable_rx_irq(napi->dev, 1); 1518 ++port->rx_napi_exits; 1519 } 1520 1521 port->freeq_refill += (budget - received); 1522 if (port->freeq_refill > freeq_threshold) { 1523 port->freeq_refill -= freeq_threshold; 1524 geth_fill_freeq(geth, true); 1525 } 1526 1527 u64_stats_update_end(&port->rx_stats_syncp); 1528 return received; 1529 } 1530 1531 static void gmac_dump_dma_state(struct net_device *netdev) 1532 { 1533 struct gemini_ethernet_port *port = netdev_priv(netdev); 1534 struct gemini_ethernet *geth = port->geth; 1535 void __iomem *ptr_reg; 1536 u32 reg[5]; 1537 1538 /* Interrupt status */ 1539 reg[0] = readl(geth->base + GLOBAL_INTERRUPT_STATUS_0_REG); 1540 reg[1] = readl(geth->base + GLOBAL_INTERRUPT_STATUS_1_REG); 1541 reg[2] = readl(geth->base + GLOBAL_INTERRUPT_STATUS_2_REG); 1542 reg[3] = readl(geth->base + GLOBAL_INTERRUPT_STATUS_3_REG); 1543 reg[4] = readl(geth->base + GLOBAL_INTERRUPT_STATUS_4_REG); 1544 netdev_err(netdev, "IRQ status: 0x%08x 0x%08x 0x%08x 0x%08x 0x%08x\n", 1545 reg[0], reg[1], reg[2], reg[3], reg[4]); 1546 1547 /* Interrupt enable */ 1548 reg[0] = readl(geth->base + GLOBAL_INTERRUPT_ENABLE_0_REG); 1549 reg[1] = readl(geth->base + GLOBAL_INTERRUPT_ENABLE_1_REG); 1550 reg[2] = readl(geth->base + GLOBAL_INTERRUPT_ENABLE_2_REG); 1551 reg[3] = readl(geth->base + GLOBAL_INTERRUPT_ENABLE_3_REG); 1552 reg[4] = readl(geth->base + GLOBAL_INTERRUPT_ENABLE_4_REG); 1553 netdev_err(netdev, "IRQ enable: 0x%08x 0x%08x 0x%08x 0x%08x 0x%08x\n", 1554 reg[0], reg[1], reg[2], reg[3], reg[4]); 1555 1556 /* RX DMA status */ 1557 reg[0] = readl(port->dma_base + GMAC_DMA_RX_FIRST_DESC_REG); 1558 reg[1] = readl(port->dma_base + GMAC_DMA_RX_CURR_DESC_REG); 1559 reg[2] = GET_RPTR(port->rxq_rwptr); 1560 reg[3] = GET_WPTR(port->rxq_rwptr); 1561 netdev_err(netdev, "RX DMA regs: 0x%08x 0x%08x, ptr: %u %u\n", 1562 reg[0], reg[1], reg[2], reg[3]); 1563 1564 reg[0] = readl(port->dma_base + GMAC_DMA_RX_DESC_WORD0_REG); 1565 reg[1] = readl(port->dma_base + GMAC_DMA_RX_DESC_WORD1_REG); 1566 reg[2] = readl(port->dma_base + GMAC_DMA_RX_DESC_WORD2_REG); 1567 reg[3] = readl(port->dma_base + GMAC_DMA_RX_DESC_WORD3_REG); 1568 netdev_err(netdev, "RX DMA descriptor: 0x%08x 0x%08x 0x%08x 0x%08x\n", 1569 reg[0], reg[1], reg[2], reg[3]); 1570 1571 /* TX DMA status */ 1572 ptr_reg = port->dma_base + GMAC_SW_TX_QUEUE0_PTR_REG; 1573 1574 reg[0] = readl(port->dma_base + GMAC_DMA_TX_FIRST_DESC_REG); 1575 reg[1] = readl(port->dma_base + GMAC_DMA_TX_CURR_DESC_REG); 1576 reg[2] = GET_RPTR(ptr_reg); 1577 reg[3] = GET_WPTR(ptr_reg); 1578 netdev_err(netdev, "TX DMA regs: 0x%08x 0x%08x, ptr: %u %u\n", 1579 reg[0], reg[1], reg[2], reg[3]); 1580 1581 reg[0] = readl(port->dma_base + GMAC_DMA_TX_DESC_WORD0_REG); 1582 reg[1] = readl(port->dma_base + GMAC_DMA_TX_DESC_WORD1_REG); 1583 reg[2] = readl(port->dma_base + GMAC_DMA_TX_DESC_WORD2_REG); 1584 reg[3] = readl(port->dma_base + GMAC_DMA_TX_DESC_WORD3_REG); 1585 netdev_err(netdev, "TX DMA descriptor: 0x%08x 0x%08x 0x%08x 0x%08x\n", 1586 reg[0], reg[1], reg[2], reg[3]); 1587 1588 /* FREE queues status */ 1589 ptr_reg = geth->base + GLOBAL_SWFQ_RWPTR_REG; 1590 1591 reg[0] = GET_RPTR(ptr_reg); 1592 reg[1] = GET_WPTR(ptr_reg); 1593 1594 ptr_reg = geth->base + GLOBAL_HWFQ_RWPTR_REG; 1595 1596 reg[2] = GET_RPTR(ptr_reg); 1597 reg[3] = GET_WPTR(ptr_reg); 1598 netdev_err(netdev, "FQ SW ptr: %u %u, HW ptr: %u %u\n", 1599 reg[0], reg[1], reg[2], reg[3]); 1600 } 1601 1602 static void gmac_update_hw_stats(struct net_device *netdev) 1603 { 1604 struct gemini_ethernet_port *port = netdev_priv(netdev); 1605 unsigned int rx_discards, rx_mcast, rx_bcast; 1606 struct gemini_ethernet *geth = port->geth; 1607 unsigned long flags; 1608 1609 spin_lock_irqsave(&geth->irq_lock, flags); 1610 u64_stats_update_begin(&port->ir_stats_syncp); 1611 1612 rx_discards = readl(port->gmac_base + GMAC_IN_DISCARDS); 1613 port->hw_stats[0] += rx_discards; 1614 port->hw_stats[1] += readl(port->gmac_base + GMAC_IN_ERRORS); 1615 rx_mcast = readl(port->gmac_base + GMAC_IN_MCAST); 1616 port->hw_stats[2] += rx_mcast; 1617 rx_bcast = readl(port->gmac_base + GMAC_IN_BCAST); 1618 port->hw_stats[3] += rx_bcast; 1619 port->hw_stats[4] += readl(port->gmac_base + GMAC_IN_MAC1); 1620 port->hw_stats[5] += readl(port->gmac_base + GMAC_IN_MAC2); 1621 1622 port->stats.rx_missed_errors += rx_discards; 1623 port->stats.multicast += rx_mcast; 1624 port->stats.multicast += rx_bcast; 1625 1626 writel(GMAC0_MIB_INT_BIT << (netdev->dev_id * 8), 1627 geth->base + GLOBAL_INTERRUPT_STATUS_4_REG); 1628 1629 u64_stats_update_end(&port->ir_stats_syncp); 1630 spin_unlock_irqrestore(&geth->irq_lock, flags); 1631 } 1632 1633 /** 1634 * gmac_get_intr_flags() - get interrupt status flags for a port from 1635 * @netdev: the net device for the port to get flags from 1636 * @i: the interrupt status register 0..4 1637 */ 1638 static u32 gmac_get_intr_flags(struct net_device *netdev, int i) 1639 { 1640 struct gemini_ethernet_port *port = netdev_priv(netdev); 1641 struct gemini_ethernet *geth = port->geth; 1642 void __iomem *irqif_reg, *irqen_reg; 1643 unsigned int offs, val; 1644 1645 /* Calculate the offset using the stride of the status registers */ 1646 offs = i * (GLOBAL_INTERRUPT_STATUS_1_REG - 1647 GLOBAL_INTERRUPT_STATUS_0_REG); 1648 1649 irqif_reg = geth->base + GLOBAL_INTERRUPT_STATUS_0_REG + offs; 1650 irqen_reg = geth->base + GLOBAL_INTERRUPT_ENABLE_0_REG + offs; 1651 1652 val = readl(irqif_reg) & readl(irqen_reg); 1653 return val; 1654 } 1655 1656 static enum hrtimer_restart gmac_coalesce_delay_expired(struct hrtimer *timer) 1657 { 1658 struct gemini_ethernet_port *port = 1659 container_of(timer, struct gemini_ethernet_port, 1660 rx_coalesce_timer); 1661 1662 napi_schedule(&port->napi); 1663 return HRTIMER_NORESTART; 1664 } 1665 1666 static irqreturn_t gmac_irq(int irq, void *data) 1667 { 1668 struct gemini_ethernet_port *port; 1669 struct net_device *netdev = data; 1670 struct gemini_ethernet *geth; 1671 u32 val, orr = 0; 1672 1673 port = netdev_priv(netdev); 1674 geth = port->geth; 1675 1676 val = gmac_get_intr_flags(netdev, 0); 1677 orr |= val; 1678 1679 if (val & (GMAC0_IRQ0_2 << (netdev->dev_id * 2))) { 1680 /* Oh, crap */ 1681 netdev_err(netdev, "hw failure/sw bug\n"); 1682 gmac_dump_dma_state(netdev); 1683 1684 /* don't know how to recover, just reduce losses */ 1685 gmac_enable_irq(netdev, 0); 1686 return IRQ_HANDLED; 1687 } 1688 1689 if (val & (GMAC0_IRQ0_TXQ0_INTS << (netdev->dev_id * 6))) 1690 gmac_tx_irq(netdev, 0); 1691 1692 val = gmac_get_intr_flags(netdev, 1); 1693 orr |= val; 1694 1695 if (val & (DEFAULT_Q0_INT_BIT << netdev->dev_id)) { 1696 gmac_enable_rx_irq(netdev, 0); 1697 1698 if (!port->rx_coalesce_nsecs) { 1699 napi_schedule(&port->napi); 1700 } else { 1701 ktime_t ktime; 1702 1703 ktime = ktime_set(0, port->rx_coalesce_nsecs); 1704 hrtimer_start(&port->rx_coalesce_timer, ktime, 1705 HRTIMER_MODE_REL); 1706 } 1707 } 1708 1709 val = gmac_get_intr_flags(netdev, 4); 1710 orr |= val; 1711 1712 if (val & (GMAC0_MIB_INT_BIT << (netdev->dev_id * 8))) 1713 gmac_update_hw_stats(netdev); 1714 1715 if (val & (GMAC0_RX_OVERRUN_INT_BIT << (netdev->dev_id * 8))) { 1716 writel(GMAC0_RXDERR_INT_BIT << (netdev->dev_id * 8), 1717 geth->base + GLOBAL_INTERRUPT_STATUS_4_REG); 1718 1719 spin_lock(&geth->irq_lock); 1720 u64_stats_update_begin(&port->ir_stats_syncp); 1721 ++port->stats.rx_fifo_errors; 1722 u64_stats_update_end(&port->ir_stats_syncp); 1723 spin_unlock(&geth->irq_lock); 1724 } 1725 1726 return orr ? IRQ_HANDLED : IRQ_NONE; 1727 } 1728 1729 static void gmac_start_dma(struct gemini_ethernet_port *port) 1730 { 1731 void __iomem *dma_ctrl_reg = port->dma_base + GMAC_DMA_CTRL_REG; 1732 union gmac_dma_ctrl dma_ctrl; 1733 1734 dma_ctrl.bits32 = readl(dma_ctrl_reg); 1735 dma_ctrl.bits.rd_enable = 1; 1736 dma_ctrl.bits.td_enable = 1; 1737 dma_ctrl.bits.loopback = 0; 1738 dma_ctrl.bits.drop_small_ack = 0; 1739 dma_ctrl.bits.rd_insert_bytes = NET_IP_ALIGN; 1740 dma_ctrl.bits.rd_prot = HPROT_DATA_CACHE | HPROT_PRIVILIGED; 1741 dma_ctrl.bits.rd_burst_size = HBURST_INCR8; 1742 dma_ctrl.bits.rd_bus = HSIZE_8; 1743 dma_ctrl.bits.td_prot = HPROT_DATA_CACHE; 1744 dma_ctrl.bits.td_burst_size = HBURST_INCR8; 1745 dma_ctrl.bits.td_bus = HSIZE_8; 1746 1747 writel(dma_ctrl.bits32, dma_ctrl_reg); 1748 } 1749 1750 static void gmac_stop_dma(struct gemini_ethernet_port *port) 1751 { 1752 void __iomem *dma_ctrl_reg = port->dma_base + GMAC_DMA_CTRL_REG; 1753 union gmac_dma_ctrl dma_ctrl; 1754 1755 dma_ctrl.bits32 = readl(dma_ctrl_reg); 1756 dma_ctrl.bits.rd_enable = 0; 1757 dma_ctrl.bits.td_enable = 0; 1758 writel(dma_ctrl.bits32, dma_ctrl_reg); 1759 } 1760 1761 static int gmac_open(struct net_device *netdev) 1762 { 1763 struct gemini_ethernet_port *port = netdev_priv(netdev); 1764 int err; 1765 1766 err = request_irq(netdev->irq, gmac_irq, 1767 IRQF_SHARED, netdev->name, netdev); 1768 if (err) { 1769 netdev_err(netdev, "no IRQ\n"); 1770 return err; 1771 } 1772 1773 netif_carrier_off(netdev); 1774 phy_start(netdev->phydev); 1775 1776 err = geth_resize_freeq(port); 1777 /* It's fine if it's just busy, the other port has set up 1778 * the freeq in that case. 1779 */ 1780 if (err && (err != -EBUSY)) { 1781 netdev_err(netdev, "could not resize freeq\n"); 1782 goto err_stop_phy; 1783 } 1784 1785 err = gmac_setup_rxq(netdev); 1786 if (err) { 1787 netdev_err(netdev, "could not setup RXQ\n"); 1788 goto err_stop_phy; 1789 } 1790 1791 err = gmac_setup_txqs(netdev); 1792 if (err) { 1793 netdev_err(netdev, "could not setup TXQs\n"); 1794 gmac_cleanup_rxq(netdev); 1795 goto err_stop_phy; 1796 } 1797 1798 napi_enable(&port->napi); 1799 1800 gmac_start_dma(port); 1801 gmac_enable_irq(netdev, 1); 1802 gmac_enable_tx_rx(netdev); 1803 netif_tx_start_all_queues(netdev); 1804 1805 hrtimer_init(&port->rx_coalesce_timer, CLOCK_MONOTONIC, 1806 HRTIMER_MODE_REL); 1807 port->rx_coalesce_timer.function = &gmac_coalesce_delay_expired; 1808 1809 netdev_dbg(netdev, "opened\n"); 1810 1811 return 0; 1812 1813 err_stop_phy: 1814 phy_stop(netdev->phydev); 1815 free_irq(netdev->irq, netdev); 1816 return err; 1817 } 1818 1819 static int gmac_stop(struct net_device *netdev) 1820 { 1821 struct gemini_ethernet_port *port = netdev_priv(netdev); 1822 1823 hrtimer_cancel(&port->rx_coalesce_timer); 1824 netif_tx_stop_all_queues(netdev); 1825 gmac_disable_tx_rx(netdev); 1826 gmac_stop_dma(port); 1827 napi_disable(&port->napi); 1828 1829 gmac_enable_irq(netdev, 0); 1830 gmac_cleanup_rxq(netdev); 1831 gmac_cleanup_txqs(netdev); 1832 1833 phy_stop(netdev->phydev); 1834 free_irq(netdev->irq, netdev); 1835 1836 gmac_update_hw_stats(netdev); 1837 return 0; 1838 } 1839 1840 static void gmac_set_rx_mode(struct net_device *netdev) 1841 { 1842 struct gemini_ethernet_port *port = netdev_priv(netdev); 1843 union gmac_rx_fltr filter = { .bits = { 1844 .broadcast = 1, 1845 .multicast = 1, 1846 .unicast = 1, 1847 } }; 1848 struct netdev_hw_addr *ha; 1849 unsigned int bit_nr; 1850 u32 mc_filter[2]; 1851 1852 mc_filter[1] = 0; 1853 mc_filter[0] = 0; 1854 1855 if (netdev->flags & IFF_PROMISC) { 1856 filter.bits.error = 1; 1857 filter.bits.promiscuous = 1; 1858 mc_filter[1] = ~0; 1859 mc_filter[0] = ~0; 1860 } else if (netdev->flags & IFF_ALLMULTI) { 1861 mc_filter[1] = ~0; 1862 mc_filter[0] = ~0; 1863 } else { 1864 netdev_for_each_mc_addr(ha, netdev) { 1865 bit_nr = ~crc32_le(~0, ha->addr, ETH_ALEN) & 0x3f; 1866 mc_filter[bit_nr >> 5] |= 1 << (bit_nr & 0x1f); 1867 } 1868 } 1869 1870 writel(mc_filter[0], port->gmac_base + GMAC_MCAST_FIL0); 1871 writel(mc_filter[1], port->gmac_base + GMAC_MCAST_FIL1); 1872 writel(filter.bits32, port->gmac_base + GMAC_RX_FLTR); 1873 } 1874 1875 static void gmac_write_mac_address(struct net_device *netdev) 1876 { 1877 struct gemini_ethernet_port *port = netdev_priv(netdev); 1878 __le32 addr[3]; 1879 1880 memset(addr, 0, sizeof(addr)); 1881 memcpy(addr, netdev->dev_addr, ETH_ALEN); 1882 1883 writel(le32_to_cpu(addr[0]), port->gmac_base + GMAC_STA_ADD0); 1884 writel(le32_to_cpu(addr[1]), port->gmac_base + GMAC_STA_ADD1); 1885 writel(le32_to_cpu(addr[2]), port->gmac_base + GMAC_STA_ADD2); 1886 } 1887 1888 static int gmac_set_mac_address(struct net_device *netdev, void *addr) 1889 { 1890 struct sockaddr *sa = addr; 1891 1892 memcpy(netdev->dev_addr, sa->sa_data, ETH_ALEN); 1893 gmac_write_mac_address(netdev); 1894 1895 return 0; 1896 } 1897 1898 static void gmac_clear_hw_stats(struct net_device *netdev) 1899 { 1900 struct gemini_ethernet_port *port = netdev_priv(netdev); 1901 1902 readl(port->gmac_base + GMAC_IN_DISCARDS); 1903 readl(port->gmac_base + GMAC_IN_ERRORS); 1904 readl(port->gmac_base + GMAC_IN_MCAST); 1905 readl(port->gmac_base + GMAC_IN_BCAST); 1906 readl(port->gmac_base + GMAC_IN_MAC1); 1907 readl(port->gmac_base + GMAC_IN_MAC2); 1908 } 1909 1910 static void gmac_get_stats64(struct net_device *netdev, 1911 struct rtnl_link_stats64 *stats) 1912 { 1913 struct gemini_ethernet_port *port = netdev_priv(netdev); 1914 unsigned int start; 1915 1916 gmac_update_hw_stats(netdev); 1917 1918 /* Racing with RX NAPI */ 1919 do { 1920 start = u64_stats_fetch_begin(&port->rx_stats_syncp); 1921 1922 stats->rx_packets = port->stats.rx_packets; 1923 stats->rx_bytes = port->stats.rx_bytes; 1924 stats->rx_errors = port->stats.rx_errors; 1925 stats->rx_dropped = port->stats.rx_dropped; 1926 1927 stats->rx_length_errors = port->stats.rx_length_errors; 1928 stats->rx_over_errors = port->stats.rx_over_errors; 1929 stats->rx_crc_errors = port->stats.rx_crc_errors; 1930 stats->rx_frame_errors = port->stats.rx_frame_errors; 1931 1932 } while (u64_stats_fetch_retry(&port->rx_stats_syncp, start)); 1933 1934 /* Racing with MIB and TX completion interrupts */ 1935 do { 1936 start = u64_stats_fetch_begin(&port->ir_stats_syncp); 1937 1938 stats->tx_errors = port->stats.tx_errors; 1939 stats->tx_packets = port->stats.tx_packets; 1940 stats->tx_bytes = port->stats.tx_bytes; 1941 1942 stats->multicast = port->stats.multicast; 1943 stats->rx_missed_errors = port->stats.rx_missed_errors; 1944 stats->rx_fifo_errors = port->stats.rx_fifo_errors; 1945 1946 } while (u64_stats_fetch_retry(&port->ir_stats_syncp, start)); 1947 1948 /* Racing with hard_start_xmit */ 1949 do { 1950 start = u64_stats_fetch_begin(&port->tx_stats_syncp); 1951 1952 stats->tx_dropped = port->stats.tx_dropped; 1953 1954 } while (u64_stats_fetch_retry(&port->tx_stats_syncp, start)); 1955 1956 stats->rx_dropped += stats->rx_missed_errors; 1957 } 1958 1959 static int gmac_change_mtu(struct net_device *netdev, int new_mtu) 1960 { 1961 int max_len = gmac_pick_rx_max_len(new_mtu); 1962 1963 if (max_len < 0) 1964 return -EINVAL; 1965 1966 gmac_disable_tx_rx(netdev); 1967 1968 netdev->mtu = new_mtu; 1969 gmac_update_config0_reg(netdev, max_len << CONFIG0_MAXLEN_SHIFT, 1970 CONFIG0_MAXLEN_MASK); 1971 1972 netdev_update_features(netdev); 1973 1974 gmac_enable_tx_rx(netdev); 1975 1976 return 0; 1977 } 1978 1979 static netdev_features_t gmac_fix_features(struct net_device *netdev, 1980 netdev_features_t features) 1981 { 1982 if (netdev->mtu + ETH_HLEN + VLAN_HLEN > MTU_SIZE_BIT_MASK) 1983 features &= ~GMAC_OFFLOAD_FEATURES; 1984 1985 return features; 1986 } 1987 1988 static int gmac_set_features(struct net_device *netdev, 1989 netdev_features_t features) 1990 { 1991 struct gemini_ethernet_port *port = netdev_priv(netdev); 1992 int enable = features & NETIF_F_RXCSUM; 1993 unsigned long flags; 1994 u32 reg; 1995 1996 spin_lock_irqsave(&port->config_lock, flags); 1997 1998 reg = readl(port->gmac_base + GMAC_CONFIG0); 1999 reg = enable ? reg | CONFIG0_RX_CHKSUM : reg & ~CONFIG0_RX_CHKSUM; 2000 writel(reg, port->gmac_base + GMAC_CONFIG0); 2001 2002 spin_unlock_irqrestore(&port->config_lock, flags); 2003 return 0; 2004 } 2005 2006 static int gmac_get_sset_count(struct net_device *netdev, int sset) 2007 { 2008 return sset == ETH_SS_STATS ? GMAC_STATS_NUM : 0; 2009 } 2010 2011 static void gmac_get_strings(struct net_device *netdev, u32 stringset, u8 *data) 2012 { 2013 if (stringset != ETH_SS_STATS) 2014 return; 2015 2016 memcpy(data, gmac_stats_strings, sizeof(gmac_stats_strings)); 2017 } 2018 2019 static void gmac_get_ethtool_stats(struct net_device *netdev, 2020 struct ethtool_stats *estats, u64 *values) 2021 { 2022 struct gemini_ethernet_port *port = netdev_priv(netdev); 2023 unsigned int start; 2024 u64 *p; 2025 int i; 2026 2027 gmac_update_hw_stats(netdev); 2028 2029 /* Racing with MIB interrupt */ 2030 do { 2031 p = values; 2032 start = u64_stats_fetch_begin(&port->ir_stats_syncp); 2033 2034 for (i = 0; i < RX_STATS_NUM; i++) 2035 *p++ = port->hw_stats[i]; 2036 2037 } while (u64_stats_fetch_retry(&port->ir_stats_syncp, start)); 2038 values = p; 2039 2040 /* Racing with RX NAPI */ 2041 do { 2042 p = values; 2043 start = u64_stats_fetch_begin(&port->rx_stats_syncp); 2044 2045 for (i = 0; i < RX_STATUS_NUM; i++) 2046 *p++ = port->rx_stats[i]; 2047 for (i = 0; i < RX_CHKSUM_NUM; i++) 2048 *p++ = port->rx_csum_stats[i]; 2049 *p++ = port->rx_napi_exits; 2050 2051 } while (u64_stats_fetch_retry(&port->rx_stats_syncp, start)); 2052 values = p; 2053 2054 /* Racing with TX start_xmit */ 2055 do { 2056 p = values; 2057 start = u64_stats_fetch_begin(&port->tx_stats_syncp); 2058 2059 for (i = 0; i < TX_MAX_FRAGS; i++) { 2060 *values++ = port->tx_frag_stats[i]; 2061 port->tx_frag_stats[i] = 0; 2062 } 2063 *values++ = port->tx_frags_linearized; 2064 *values++ = port->tx_hw_csummed; 2065 2066 } while (u64_stats_fetch_retry(&port->tx_stats_syncp, start)); 2067 } 2068 2069 static int gmac_get_ksettings(struct net_device *netdev, 2070 struct ethtool_link_ksettings *cmd) 2071 { 2072 if (!netdev->phydev) 2073 return -ENXIO; 2074 phy_ethtool_ksettings_get(netdev->phydev, cmd); 2075 2076 return 0; 2077 } 2078 2079 static int gmac_set_ksettings(struct net_device *netdev, 2080 const struct ethtool_link_ksettings *cmd) 2081 { 2082 if (!netdev->phydev) 2083 return -ENXIO; 2084 return phy_ethtool_ksettings_set(netdev->phydev, cmd); 2085 } 2086 2087 static int gmac_nway_reset(struct net_device *netdev) 2088 { 2089 if (!netdev->phydev) 2090 return -ENXIO; 2091 return phy_start_aneg(netdev->phydev); 2092 } 2093 2094 static void gmac_get_pauseparam(struct net_device *netdev, 2095 struct ethtool_pauseparam *pparam) 2096 { 2097 struct gemini_ethernet_port *port = netdev_priv(netdev); 2098 union gmac_config0 config0; 2099 2100 config0.bits32 = readl(port->gmac_base + GMAC_CONFIG0); 2101 2102 pparam->rx_pause = config0.bits.rx_fc_en; 2103 pparam->tx_pause = config0.bits.tx_fc_en; 2104 pparam->autoneg = true; 2105 } 2106 2107 static void gmac_get_ringparam(struct net_device *netdev, 2108 struct ethtool_ringparam *rp) 2109 { 2110 struct gemini_ethernet_port *port = netdev_priv(netdev); 2111 2112 readl(port->gmac_base + GMAC_CONFIG0); 2113 2114 rp->rx_max_pending = 1 << 15; 2115 rp->rx_mini_max_pending = 0; 2116 rp->rx_jumbo_max_pending = 0; 2117 rp->tx_max_pending = 1 << 15; 2118 2119 rp->rx_pending = 1 << port->rxq_order; 2120 rp->rx_mini_pending = 0; 2121 rp->rx_jumbo_pending = 0; 2122 rp->tx_pending = 1 << port->txq_order; 2123 } 2124 2125 static int gmac_set_ringparam(struct net_device *netdev, 2126 struct ethtool_ringparam *rp) 2127 { 2128 struct gemini_ethernet_port *port = netdev_priv(netdev); 2129 int err = 0; 2130 2131 if (netif_running(netdev)) 2132 return -EBUSY; 2133 2134 if (rp->rx_pending) { 2135 port->rxq_order = min(15, ilog2(rp->rx_pending - 1) + 1); 2136 err = geth_resize_freeq(port); 2137 } 2138 if (rp->tx_pending) { 2139 port->txq_order = min(15, ilog2(rp->tx_pending - 1) + 1); 2140 port->irq_every_tx_packets = 1 << (port->txq_order - 2); 2141 } 2142 2143 return err; 2144 } 2145 2146 static int gmac_get_coalesce(struct net_device *netdev, 2147 struct ethtool_coalesce *ecmd) 2148 { 2149 struct gemini_ethernet_port *port = netdev_priv(netdev); 2150 2151 ecmd->rx_max_coalesced_frames = 1; 2152 ecmd->tx_max_coalesced_frames = port->irq_every_tx_packets; 2153 ecmd->rx_coalesce_usecs = port->rx_coalesce_nsecs / 1000; 2154 2155 return 0; 2156 } 2157 2158 static int gmac_set_coalesce(struct net_device *netdev, 2159 struct ethtool_coalesce *ecmd) 2160 { 2161 struct gemini_ethernet_port *port = netdev_priv(netdev); 2162 2163 if (ecmd->tx_max_coalesced_frames < 1) 2164 return -EINVAL; 2165 if (ecmd->tx_max_coalesced_frames >= 1 << port->txq_order) 2166 return -EINVAL; 2167 2168 port->irq_every_tx_packets = ecmd->tx_max_coalesced_frames; 2169 port->rx_coalesce_nsecs = ecmd->rx_coalesce_usecs * 1000; 2170 2171 return 0; 2172 } 2173 2174 static u32 gmac_get_msglevel(struct net_device *netdev) 2175 { 2176 struct gemini_ethernet_port *port = netdev_priv(netdev); 2177 2178 return port->msg_enable; 2179 } 2180 2181 static void gmac_set_msglevel(struct net_device *netdev, u32 level) 2182 { 2183 struct gemini_ethernet_port *port = netdev_priv(netdev); 2184 2185 port->msg_enable = level; 2186 } 2187 2188 static void gmac_get_drvinfo(struct net_device *netdev, 2189 struct ethtool_drvinfo *info) 2190 { 2191 strcpy(info->driver, DRV_NAME); 2192 strcpy(info->bus_info, netdev->dev_id ? "1" : "0"); 2193 } 2194 2195 static const struct net_device_ops gmac_351x_ops = { 2196 .ndo_init = gmac_init, 2197 .ndo_open = gmac_open, 2198 .ndo_stop = gmac_stop, 2199 .ndo_start_xmit = gmac_start_xmit, 2200 .ndo_tx_timeout = gmac_tx_timeout, 2201 .ndo_set_rx_mode = gmac_set_rx_mode, 2202 .ndo_set_mac_address = gmac_set_mac_address, 2203 .ndo_get_stats64 = gmac_get_stats64, 2204 .ndo_change_mtu = gmac_change_mtu, 2205 .ndo_fix_features = gmac_fix_features, 2206 .ndo_set_features = gmac_set_features, 2207 }; 2208 2209 static const struct ethtool_ops gmac_351x_ethtool_ops = { 2210 .supported_coalesce_params = ETHTOOL_COALESCE_RX_USECS | 2211 ETHTOOL_COALESCE_MAX_FRAMES, 2212 .get_sset_count = gmac_get_sset_count, 2213 .get_strings = gmac_get_strings, 2214 .get_ethtool_stats = gmac_get_ethtool_stats, 2215 .get_link = ethtool_op_get_link, 2216 .get_link_ksettings = gmac_get_ksettings, 2217 .set_link_ksettings = gmac_set_ksettings, 2218 .nway_reset = gmac_nway_reset, 2219 .get_pauseparam = gmac_get_pauseparam, 2220 .get_ringparam = gmac_get_ringparam, 2221 .set_ringparam = gmac_set_ringparam, 2222 .get_coalesce = gmac_get_coalesce, 2223 .set_coalesce = gmac_set_coalesce, 2224 .get_msglevel = gmac_get_msglevel, 2225 .set_msglevel = gmac_set_msglevel, 2226 .get_drvinfo = gmac_get_drvinfo, 2227 }; 2228 2229 static irqreturn_t gemini_port_irq_thread(int irq, void *data) 2230 { 2231 unsigned long irqmask = SWFQ_EMPTY_INT_BIT; 2232 struct gemini_ethernet_port *port = data; 2233 struct gemini_ethernet *geth; 2234 unsigned long flags; 2235 2236 geth = port->geth; 2237 /* The queue is half empty so refill it */ 2238 geth_fill_freeq(geth, true); 2239 2240 spin_lock_irqsave(&geth->irq_lock, flags); 2241 /* ACK queue interrupt */ 2242 writel(irqmask, geth->base + GLOBAL_INTERRUPT_STATUS_4_REG); 2243 /* Enable queue interrupt again */ 2244 irqmask |= readl(geth->base + GLOBAL_INTERRUPT_ENABLE_4_REG); 2245 writel(irqmask, geth->base + GLOBAL_INTERRUPT_ENABLE_4_REG); 2246 spin_unlock_irqrestore(&geth->irq_lock, flags); 2247 2248 return IRQ_HANDLED; 2249 } 2250 2251 static irqreturn_t gemini_port_irq(int irq, void *data) 2252 { 2253 struct gemini_ethernet_port *port = data; 2254 struct gemini_ethernet *geth; 2255 irqreturn_t ret = IRQ_NONE; 2256 u32 val, en; 2257 2258 geth = port->geth; 2259 spin_lock(&geth->irq_lock); 2260 2261 val = readl(geth->base + GLOBAL_INTERRUPT_STATUS_4_REG); 2262 en = readl(geth->base + GLOBAL_INTERRUPT_ENABLE_4_REG); 2263 2264 if (val & en & SWFQ_EMPTY_INT_BIT) { 2265 /* Disable the queue empty interrupt while we work on 2266 * processing the queue. Also disable overrun interrupts 2267 * as there is not much we can do about it here. 2268 */ 2269 en &= ~(SWFQ_EMPTY_INT_BIT | GMAC0_RX_OVERRUN_INT_BIT 2270 | GMAC1_RX_OVERRUN_INT_BIT); 2271 writel(en, geth->base + GLOBAL_INTERRUPT_ENABLE_4_REG); 2272 ret = IRQ_WAKE_THREAD; 2273 } 2274 2275 spin_unlock(&geth->irq_lock); 2276 2277 return ret; 2278 } 2279 2280 static void gemini_port_remove(struct gemini_ethernet_port *port) 2281 { 2282 if (port->netdev) { 2283 phy_disconnect(port->netdev->phydev); 2284 unregister_netdev(port->netdev); 2285 } 2286 clk_disable_unprepare(port->pclk); 2287 geth_cleanup_freeq(port->geth); 2288 } 2289 2290 static void gemini_ethernet_init(struct gemini_ethernet *geth) 2291 { 2292 /* Only do this once both ports are online */ 2293 if (geth->initialized) 2294 return; 2295 if (geth->port0 && geth->port1) 2296 geth->initialized = true; 2297 else 2298 return; 2299 2300 writel(0, geth->base + GLOBAL_INTERRUPT_ENABLE_0_REG); 2301 writel(0, geth->base + GLOBAL_INTERRUPT_ENABLE_1_REG); 2302 writel(0, geth->base + GLOBAL_INTERRUPT_ENABLE_2_REG); 2303 writel(0, geth->base + GLOBAL_INTERRUPT_ENABLE_3_REG); 2304 writel(0, geth->base + GLOBAL_INTERRUPT_ENABLE_4_REG); 2305 2306 /* Interrupt config: 2307 * 2308 * GMAC0 intr bits ------> int0 ----> eth0 2309 * GMAC1 intr bits ------> int1 ----> eth1 2310 * TOE intr -------------> int1 ----> eth1 2311 * Classification Intr --> int0 ----> eth0 2312 * Default Q0 -----------> int0 ----> eth0 2313 * Default Q1 -----------> int1 ----> eth1 2314 * FreeQ intr -----------> int1 ----> eth1 2315 */ 2316 writel(0xCCFC0FC0, geth->base + GLOBAL_INTERRUPT_SELECT_0_REG); 2317 writel(0x00F00002, geth->base + GLOBAL_INTERRUPT_SELECT_1_REG); 2318 writel(0xFFFFFFFF, geth->base + GLOBAL_INTERRUPT_SELECT_2_REG); 2319 writel(0xFFFFFFFF, geth->base + GLOBAL_INTERRUPT_SELECT_3_REG); 2320 writel(0xFF000003, geth->base + GLOBAL_INTERRUPT_SELECT_4_REG); 2321 2322 /* edge-triggered interrupts packed to level-triggered one... */ 2323 writel(~0, geth->base + GLOBAL_INTERRUPT_STATUS_0_REG); 2324 writel(~0, geth->base + GLOBAL_INTERRUPT_STATUS_1_REG); 2325 writel(~0, geth->base + GLOBAL_INTERRUPT_STATUS_2_REG); 2326 writel(~0, geth->base + GLOBAL_INTERRUPT_STATUS_3_REG); 2327 writel(~0, geth->base + GLOBAL_INTERRUPT_STATUS_4_REG); 2328 2329 /* Set up queue */ 2330 writel(0, geth->base + GLOBAL_SW_FREEQ_BASE_SIZE_REG); 2331 writel(0, geth->base + GLOBAL_HW_FREEQ_BASE_SIZE_REG); 2332 writel(0, geth->base + GLOBAL_SWFQ_RWPTR_REG); 2333 writel(0, geth->base + GLOBAL_HWFQ_RWPTR_REG); 2334 2335 geth->freeq_frag_order = DEFAULT_RX_BUF_ORDER; 2336 /* This makes the queue resize on probe() so that we 2337 * set up and enable the queue IRQ. FIXME: fragile. 2338 */ 2339 geth->freeq_order = 1; 2340 } 2341 2342 static void gemini_port_save_mac_addr(struct gemini_ethernet_port *port) 2343 { 2344 port->mac_addr[0] = 2345 cpu_to_le32(readl(port->gmac_base + GMAC_STA_ADD0)); 2346 port->mac_addr[1] = 2347 cpu_to_le32(readl(port->gmac_base + GMAC_STA_ADD1)); 2348 port->mac_addr[2] = 2349 cpu_to_le32(readl(port->gmac_base + GMAC_STA_ADD2)); 2350 } 2351 2352 static int gemini_ethernet_port_probe(struct platform_device *pdev) 2353 { 2354 char *port_names[2] = { "ethernet0", "ethernet1" }; 2355 struct gemini_ethernet_port *port; 2356 struct device *dev = &pdev->dev; 2357 struct gemini_ethernet *geth; 2358 struct net_device *netdev; 2359 struct resource *gmacres; 2360 struct resource *dmares; 2361 struct device *parent; 2362 unsigned int id; 2363 int irq; 2364 int ret; 2365 2366 parent = dev->parent; 2367 geth = dev_get_drvdata(parent); 2368 2369 if (!strcmp(dev_name(dev), "60008000.ethernet-port")) 2370 id = 0; 2371 else if (!strcmp(dev_name(dev), "6000c000.ethernet-port")) 2372 id = 1; 2373 else 2374 return -ENODEV; 2375 2376 dev_info(dev, "probe %s ID %d\n", dev_name(dev), id); 2377 2378 netdev = devm_alloc_etherdev_mqs(dev, sizeof(*port), TX_QUEUE_NUM, TX_QUEUE_NUM); 2379 if (!netdev) { 2380 dev_err(dev, "Can't allocate ethernet device #%d\n", id); 2381 return -ENOMEM; 2382 } 2383 2384 port = netdev_priv(netdev); 2385 SET_NETDEV_DEV(netdev, dev); 2386 port->netdev = netdev; 2387 port->id = id; 2388 port->geth = geth; 2389 port->dev = dev; 2390 port->msg_enable = netif_msg_init(debug, DEFAULT_MSG_ENABLE); 2391 2392 /* DMA memory */ 2393 dmares = platform_get_resource(pdev, IORESOURCE_MEM, 0); 2394 if (!dmares) { 2395 dev_err(dev, "no DMA resource\n"); 2396 return -ENODEV; 2397 } 2398 port->dma_base = devm_ioremap_resource(dev, dmares); 2399 if (IS_ERR(port->dma_base)) 2400 return PTR_ERR(port->dma_base); 2401 2402 /* GMAC config memory */ 2403 gmacres = platform_get_resource(pdev, IORESOURCE_MEM, 1); 2404 if (!gmacres) { 2405 dev_err(dev, "no GMAC resource\n"); 2406 return -ENODEV; 2407 } 2408 port->gmac_base = devm_ioremap_resource(dev, gmacres); 2409 if (IS_ERR(port->gmac_base)) 2410 return PTR_ERR(port->gmac_base); 2411 2412 /* Interrupt */ 2413 irq = platform_get_irq(pdev, 0); 2414 if (irq <= 0) 2415 return irq ? irq : -ENODEV; 2416 port->irq = irq; 2417 2418 /* Clock the port */ 2419 port->pclk = devm_clk_get(dev, "PCLK"); 2420 if (IS_ERR(port->pclk)) { 2421 dev_err(dev, "no PCLK\n"); 2422 return PTR_ERR(port->pclk); 2423 } 2424 ret = clk_prepare_enable(port->pclk); 2425 if (ret) 2426 return ret; 2427 2428 /* Maybe there is a nice ethernet address we should use */ 2429 gemini_port_save_mac_addr(port); 2430 2431 /* Reset the port */ 2432 port->reset = devm_reset_control_get_exclusive(dev, NULL); 2433 if (IS_ERR(port->reset)) { 2434 dev_err(dev, "no reset\n"); 2435 ret = PTR_ERR(port->reset); 2436 goto unprepare; 2437 } 2438 reset_control_reset(port->reset); 2439 usleep_range(100, 500); 2440 2441 /* Assign pointer in the main state container */ 2442 if (!id) 2443 geth->port0 = port; 2444 else 2445 geth->port1 = port; 2446 2447 /* This will just be done once both ports are up and reset */ 2448 gemini_ethernet_init(geth); 2449 2450 platform_set_drvdata(pdev, port); 2451 2452 /* Set up and register the netdev */ 2453 netdev->dev_id = port->id; 2454 netdev->irq = irq; 2455 netdev->netdev_ops = &gmac_351x_ops; 2456 netdev->ethtool_ops = &gmac_351x_ethtool_ops; 2457 2458 spin_lock_init(&port->config_lock); 2459 gmac_clear_hw_stats(netdev); 2460 2461 netdev->hw_features = GMAC_OFFLOAD_FEATURES; 2462 netdev->features |= GMAC_OFFLOAD_FEATURES | NETIF_F_GRO; 2463 /* We can handle jumbo frames up to 10236 bytes so, let's accept 2464 * payloads of 10236 bytes minus VLAN and ethernet header 2465 */ 2466 netdev->min_mtu = ETH_MIN_MTU; 2467 netdev->max_mtu = 10236 - VLAN_ETH_HLEN; 2468 2469 port->freeq_refill = 0; 2470 netif_napi_add(netdev, &port->napi, gmac_napi_poll, 2471 DEFAULT_NAPI_WEIGHT); 2472 2473 if (is_valid_ether_addr((void *)port->mac_addr)) { 2474 memcpy(netdev->dev_addr, port->mac_addr, ETH_ALEN); 2475 } else { 2476 dev_dbg(dev, "ethernet address 0x%08x%08x%08x invalid\n", 2477 port->mac_addr[0], port->mac_addr[1], 2478 port->mac_addr[2]); 2479 dev_info(dev, "using a random ethernet address\n"); 2480 eth_random_addr(netdev->dev_addr); 2481 } 2482 gmac_write_mac_address(netdev); 2483 2484 ret = devm_request_threaded_irq(port->dev, 2485 port->irq, 2486 gemini_port_irq, 2487 gemini_port_irq_thread, 2488 IRQF_SHARED, 2489 port_names[port->id], 2490 port); 2491 if (ret) 2492 goto unprepare; 2493 2494 ret = gmac_setup_phy(netdev); 2495 if (ret) { 2496 netdev_err(netdev, 2497 "PHY init failed\n"); 2498 goto unprepare; 2499 } 2500 2501 ret = register_netdev(netdev); 2502 if (ret) 2503 goto unprepare; 2504 2505 netdev_info(netdev, 2506 "irq %d, DMA @ 0x%pap, GMAC @ 0x%pap\n", 2507 port->irq, &dmares->start, 2508 &gmacres->start); 2509 return 0; 2510 2511 unprepare: 2512 clk_disable_unprepare(port->pclk); 2513 return ret; 2514 } 2515 2516 static int gemini_ethernet_port_remove(struct platform_device *pdev) 2517 { 2518 struct gemini_ethernet_port *port = platform_get_drvdata(pdev); 2519 2520 gemini_port_remove(port); 2521 2522 return 0; 2523 } 2524 2525 static const struct of_device_id gemini_ethernet_port_of_match[] = { 2526 { 2527 .compatible = "cortina,gemini-ethernet-port", 2528 }, 2529 {}, 2530 }; 2531 MODULE_DEVICE_TABLE(of, gemini_ethernet_port_of_match); 2532 2533 static struct platform_driver gemini_ethernet_port_driver = { 2534 .driver = { 2535 .name = "gemini-ethernet-port", 2536 .of_match_table = of_match_ptr(gemini_ethernet_port_of_match), 2537 }, 2538 .probe = gemini_ethernet_port_probe, 2539 .remove = gemini_ethernet_port_remove, 2540 }; 2541 2542 static int gemini_ethernet_probe(struct platform_device *pdev) 2543 { 2544 struct device *dev = &pdev->dev; 2545 struct gemini_ethernet *geth; 2546 unsigned int retry = 5; 2547 struct resource *res; 2548 u32 val; 2549 2550 /* Global registers */ 2551 geth = devm_kzalloc(dev, sizeof(*geth), GFP_KERNEL); 2552 if (!geth) 2553 return -ENOMEM; 2554 res = platform_get_resource(pdev, IORESOURCE_MEM, 0); 2555 if (!res) 2556 return -ENODEV; 2557 geth->base = devm_ioremap_resource(dev, res); 2558 if (IS_ERR(geth->base)) 2559 return PTR_ERR(geth->base); 2560 geth->dev = dev; 2561 2562 /* Wait for ports to stabilize */ 2563 do { 2564 udelay(2); 2565 val = readl(geth->base + GLOBAL_TOE_VERSION_REG); 2566 barrier(); 2567 } while (!val && --retry); 2568 if (!retry) { 2569 dev_err(dev, "failed to reset ethernet\n"); 2570 return -EIO; 2571 } 2572 dev_info(dev, "Ethernet device ID: 0x%03x, revision 0x%01x\n", 2573 (val >> 4) & 0xFFFU, val & 0xFU); 2574 2575 spin_lock_init(&geth->irq_lock); 2576 spin_lock_init(&geth->freeq_lock); 2577 2578 /* The children will use this */ 2579 platform_set_drvdata(pdev, geth); 2580 2581 /* Spawn child devices for the two ports */ 2582 return devm_of_platform_populate(dev); 2583 } 2584 2585 static int gemini_ethernet_remove(struct platform_device *pdev) 2586 { 2587 struct gemini_ethernet *geth = platform_get_drvdata(pdev); 2588 2589 geth_cleanup_freeq(geth); 2590 geth->initialized = false; 2591 2592 return 0; 2593 } 2594 2595 static const struct of_device_id gemini_ethernet_of_match[] = { 2596 { 2597 .compatible = "cortina,gemini-ethernet", 2598 }, 2599 {}, 2600 }; 2601 MODULE_DEVICE_TABLE(of, gemini_ethernet_of_match); 2602 2603 static struct platform_driver gemini_ethernet_driver = { 2604 .driver = { 2605 .name = DRV_NAME, 2606 .of_match_table = of_match_ptr(gemini_ethernet_of_match), 2607 }, 2608 .probe = gemini_ethernet_probe, 2609 .remove = gemini_ethernet_remove, 2610 }; 2611 2612 static int __init gemini_ethernet_module_init(void) 2613 { 2614 int ret; 2615 2616 ret = platform_driver_register(&gemini_ethernet_port_driver); 2617 if (ret) 2618 return ret; 2619 2620 ret = platform_driver_register(&gemini_ethernet_driver); 2621 if (ret) { 2622 platform_driver_unregister(&gemini_ethernet_port_driver); 2623 return ret; 2624 } 2625 2626 return 0; 2627 } 2628 module_init(gemini_ethernet_module_init); 2629 2630 static void __exit gemini_ethernet_module_exit(void) 2631 { 2632 platform_driver_unregister(&gemini_ethernet_driver); 2633 platform_driver_unregister(&gemini_ethernet_port_driver); 2634 } 2635 module_exit(gemini_ethernet_module_exit); 2636 2637 MODULE_AUTHOR("Linus Walleij <linus.walleij@linaro.org>"); 2638 MODULE_DESCRIPTION("StorLink SL351x (Gemini) ethernet driver"); 2639 MODULE_LICENSE("GPL"); 2640 MODULE_ALIAS("platform:" DRV_NAME); 2641