1 // SPDX-License-Identifier: GPL-2.0-only 2 /* 3 * Copyright 2008-2010 Cisco Systems, Inc. All rights reserved. 4 * Copyright 2007 Nuova Systems, Inc. All rights reserved. 5 */ 6 7 #include <linux/kernel.h> 8 #include <linux/errno.h> 9 #include <linux/types.h> 10 #include <linux/pci.h> 11 #include <linux/delay.h> 12 #include <linux/slab.h> 13 14 #include "vnic_dev.h" 15 #include "vnic_wq.h" 16 #include "enic.h" 17 18 static int vnic_wq_alloc_bufs(struct vnic_wq *wq) 19 { 20 struct vnic_wq_buf *buf; 21 unsigned int i, j, count = wq->ring.desc_count; 22 unsigned int blks = VNIC_WQ_BUF_BLKS_NEEDED(count); 23 24 for (i = 0; i < blks; i++) { 25 wq->bufs[i] = kzalloc(VNIC_WQ_BUF_BLK_SZ(count), GFP_KERNEL); 26 if (!wq->bufs[i]) 27 return -ENOMEM; 28 } 29 30 for (i = 0; i < blks; i++) { 31 buf = wq->bufs[i]; 32 for (j = 0; j < VNIC_WQ_BUF_BLK_ENTRIES(count); j++) { 33 buf->index = i * VNIC_WQ_BUF_BLK_ENTRIES(count) + j; 34 buf->desc = (u8 *)wq->ring.descs + 35 wq->ring.desc_size * buf->index; 36 if (buf->index + 1 == count) { 37 buf->next = wq->bufs[0]; 38 buf->next->prev = buf; 39 break; 40 } else if (j + 1 == VNIC_WQ_BUF_BLK_ENTRIES(count)) { 41 buf->next = wq->bufs[i + 1]; 42 buf->next->prev = buf; 43 } else { 44 buf->next = buf + 1; 45 buf->next->prev = buf; 46 buf++; 47 } 48 } 49 } 50 51 wq->to_use = wq->to_clean = wq->bufs[0]; 52 53 return 0; 54 } 55 56 void vnic_wq_free(struct vnic_wq *wq) 57 { 58 struct vnic_dev *vdev; 59 unsigned int i; 60 61 vdev = wq->vdev; 62 63 vnic_dev_free_desc_ring(vdev, &wq->ring); 64 65 for (i = 0; i < VNIC_WQ_BUF_BLKS_MAX; i++) { 66 if (wq->bufs[i]) { 67 kfree(wq->bufs[i]); 68 wq->bufs[i] = NULL; 69 } 70 } 71 72 wq->ctrl = NULL; 73 } 74 75 int vnic_wq_alloc(struct vnic_dev *vdev, struct vnic_wq *wq, unsigned int index, 76 unsigned int desc_count, unsigned int desc_size) 77 { 78 int err; 79 80 wq->index = index; 81 wq->vdev = vdev; 82 83 wq->ctrl = vnic_dev_get_res(vdev, RES_TYPE_WQ, index); 84 if (!wq->ctrl) { 85 vdev_err(vdev, "Failed to hook WQ[%d] resource\n", index); 86 return -EINVAL; 87 } 88 89 vnic_wq_disable(wq); 90 91 err = vnic_dev_alloc_desc_ring(vdev, &wq->ring, desc_count, desc_size); 92 if (err) 93 return err; 94 95 err = vnic_wq_alloc_bufs(wq); 96 if (err) { 97 vnic_wq_free(wq); 98 return err; 99 } 100 101 return 0; 102 } 103 104 int enic_wq_devcmd2_alloc(struct vnic_dev *vdev, struct vnic_wq *wq, 105 unsigned int desc_count, unsigned int desc_size) 106 { 107 int err; 108 109 wq->index = 0; 110 wq->vdev = vdev; 111 112 wq->ctrl = vnic_dev_get_res(vdev, RES_TYPE_DEVCMD2, 0); 113 if (!wq->ctrl) 114 return -EINVAL; 115 vnic_wq_disable(wq); 116 err = vnic_dev_alloc_desc_ring(vdev, &wq->ring, desc_count, desc_size); 117 118 return err; 119 } 120 121 void enic_wq_init_start(struct vnic_wq *wq, unsigned int cq_index, 122 unsigned int fetch_index, unsigned int posted_index, 123 unsigned int error_interrupt_enable, 124 unsigned int error_interrupt_offset) 125 { 126 u64 paddr; 127 unsigned int count = wq->ring.desc_count; 128 129 paddr = (u64)wq->ring.base_addr | VNIC_PADDR_TARGET; 130 writeq(paddr, &wq->ctrl->ring_base); 131 iowrite32(count, &wq->ctrl->ring_size); 132 iowrite32(fetch_index, &wq->ctrl->fetch_index); 133 iowrite32(posted_index, &wq->ctrl->posted_index); 134 iowrite32(cq_index, &wq->ctrl->cq_index); 135 iowrite32(error_interrupt_enable, &wq->ctrl->error_interrupt_enable); 136 iowrite32(error_interrupt_offset, &wq->ctrl->error_interrupt_offset); 137 iowrite32(0, &wq->ctrl->error_status); 138 139 wq->to_use = wq->to_clean = 140 &wq->bufs[fetch_index / VNIC_WQ_BUF_BLK_ENTRIES(count)] 141 [fetch_index % VNIC_WQ_BUF_BLK_ENTRIES(count)]; 142 } 143 144 void vnic_wq_init(struct vnic_wq *wq, unsigned int cq_index, 145 unsigned int error_interrupt_enable, 146 unsigned int error_interrupt_offset) 147 { 148 enic_wq_init_start(wq, cq_index, 0, 0, 149 error_interrupt_enable, 150 error_interrupt_offset); 151 } 152 153 unsigned int vnic_wq_error_status(struct vnic_wq *wq) 154 { 155 return ioread32(&wq->ctrl->error_status); 156 } 157 158 void vnic_wq_enable(struct vnic_wq *wq) 159 { 160 iowrite32(1, &wq->ctrl->enable); 161 } 162 163 int vnic_wq_disable(struct vnic_wq *wq) 164 { 165 unsigned int wait; 166 struct vnic_dev *vdev = wq->vdev; 167 168 iowrite32(0, &wq->ctrl->enable); 169 170 /* Wait for HW to ACK disable request */ 171 for (wait = 0; wait < 1000; wait++) { 172 if (!(ioread32(&wq->ctrl->running))) 173 return 0; 174 udelay(10); 175 } 176 177 vdev_neterr(vdev, "Failed to disable WQ[%d]\n", wq->index); 178 179 return -ETIMEDOUT; 180 } 181 182 void vnic_wq_clean(struct vnic_wq *wq, 183 void (*buf_clean)(struct vnic_wq *wq, struct vnic_wq_buf *buf)) 184 { 185 struct vnic_wq_buf *buf; 186 187 buf = wq->to_clean; 188 189 while (vnic_wq_desc_used(wq) > 0) { 190 191 (*buf_clean)(wq, buf); 192 193 buf = wq->to_clean = buf->next; 194 wq->ring.desc_avail++; 195 } 196 197 wq->to_use = wq->to_clean = wq->bufs[0]; 198 199 iowrite32(0, &wq->ctrl->fetch_index); 200 iowrite32(0, &wq->ctrl->posted_index); 201 iowrite32(0, &wq->ctrl->error_status); 202 203 vnic_dev_clear_desc_ring(&wq->ring); 204 } 205