xref: /linux/drivers/net/ethernet/cisco/enic/enic.h (revision 04eeb606a8383b306f4bc6991da8231b5f3924b0)
1 /*
2  * Copyright 2008-2010 Cisco Systems, Inc.  All rights reserved.
3  * Copyright 2007 Nuova Systems, Inc.  All rights reserved.
4  *
5  * This program is free software; you may redistribute it and/or modify
6  * it under the terms of the GNU General Public License as published by
7  * the Free Software Foundation; version 2 of the License.
8  *
9  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
10  * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
11  * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
12  * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
13  * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
14  * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
15  * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
16  * SOFTWARE.
17  *
18  */
19 
20 #ifndef _ENIC_H_
21 #define _ENIC_H_
22 
23 #include "vnic_enet.h"
24 #include "vnic_dev.h"
25 #include "vnic_wq.h"
26 #include "vnic_rq.h"
27 #include "vnic_cq.h"
28 #include "vnic_intr.h"
29 #include "vnic_stats.h"
30 #include "vnic_nic.h"
31 #include "vnic_rss.h"
32 #include <linux/irq.h>
33 
34 #define DRV_NAME		"enic"
35 #define DRV_DESCRIPTION		"Cisco VIC Ethernet NIC Driver"
36 #define DRV_VERSION		"2.1.1.67"
37 #define DRV_COPYRIGHT		"Copyright 2008-2013 Cisco Systems, Inc"
38 
39 #define ENIC_BARS_MAX		6
40 
41 #define ENIC_WQ_MAX		8
42 #define ENIC_RQ_MAX		8
43 #define ENIC_CQ_MAX		(ENIC_WQ_MAX + ENIC_RQ_MAX)
44 #define ENIC_INTR_MAX		(ENIC_CQ_MAX + 2)
45 
46 #define ENIC_AIC_LARGE_PKT_DIFF	3
47 
48 struct enic_msix_entry {
49 	int requested;
50 	char devname[IFNAMSIZ];
51 	irqreturn_t (*isr)(int, void *);
52 	void *devid;
53 };
54 
55 /* Store only the lower range.  Higher range is given by fw. */
56 struct enic_intr_mod_range {
57 	u32 small_pkt_range_start;
58 	u32 large_pkt_range_start;
59 };
60 
61 struct enic_intr_mod_table {
62 	u32 rx_rate;
63 	u32 range_percent;
64 };
65 
66 #define ENIC_MAX_LINK_SPEEDS		3
67 #define ENIC_LINK_SPEED_10G		10000
68 #define ENIC_LINK_SPEED_4G		4000
69 #define ENIC_LINK_40G_INDEX		2
70 #define ENIC_LINK_10G_INDEX		1
71 #define ENIC_LINK_4G_INDEX		0
72 #define ENIC_RX_COALESCE_RANGE_END	125
73 #define ENIC_AIC_TS_BREAK		100
74 
75 struct enic_rx_coal {
76 	u32 small_pkt_range_start;
77 	u32 large_pkt_range_start;
78 	u32 range_end;
79 	u32 use_adaptive_rx_coalesce;
80 };
81 
82 /* priv_flags */
83 #define ENIC_SRIOV_ENABLED		(1 << 0)
84 
85 /* enic port profile set flags */
86 #define ENIC_PORT_REQUEST_APPLIED	(1 << 0)
87 #define ENIC_SET_REQUEST		(1 << 1)
88 #define ENIC_SET_NAME			(1 << 2)
89 #define ENIC_SET_INSTANCE		(1 << 3)
90 #define ENIC_SET_HOST			(1 << 4)
91 
92 struct enic_port_profile {
93 	u32 set;
94 	u8 request;
95 	char name[PORT_PROFILE_MAX];
96 	u8 instance_uuid[PORT_UUID_MAX];
97 	u8 host_uuid[PORT_UUID_MAX];
98 	u8 vf_mac[ETH_ALEN];
99 	u8 mac_addr[ETH_ALEN];
100 };
101 
102 /* enic_rfs_fltr_node - rfs filter node in hash table
103  *	@@keys: IPv4 5 tuple
104  *	@flow_id: flow_id of clsf filter provided by kernel
105  *	@fltr_id: filter id of clsf filter returned by adaptor
106  *	@rq_id: desired rq index
107  *	@node: hlist_node
108  */
109 struct enic_rfs_fltr_node {
110 	struct flow_keys keys;
111 	u32 flow_id;
112 	u16 fltr_id;
113 	u16 rq_id;
114 	struct hlist_node node;
115 };
116 
117 /* enic_rfs_flw_tbl - rfs flow table
118  *	@max: Maximum number of filters vNIC supports
119  *	@free: Number of free filters available
120  *	@toclean: hash table index to clean next
121  *	@ht_head: hash table list head
122  *	@lock: spin lock
123  *	@rfs_may_expire: timer function for enic_rps_may_expire_flow
124  */
125 struct enic_rfs_flw_tbl {
126 	u16 max;
127 	int free;
128 
129 #define ENIC_RFS_FLW_BITSHIFT	(10)
130 #define ENIC_RFS_FLW_MASK	((1 << ENIC_RFS_FLW_BITSHIFT) - 1)
131 	u16 toclean:ENIC_RFS_FLW_BITSHIFT;
132 	struct hlist_head ht_head[1 << ENIC_RFS_FLW_BITSHIFT];
133 	spinlock_t lock;
134 	struct timer_list rfs_may_expire;
135 };
136 
137 /* Per-instance private data structure */
138 struct enic {
139 	struct net_device *netdev;
140 	struct pci_dev *pdev;
141 	struct vnic_enet_config config;
142 	struct vnic_dev_bar bar[ENIC_BARS_MAX];
143 	struct vnic_dev *vdev;
144 	struct timer_list notify_timer;
145 	struct work_struct reset;
146 	struct work_struct change_mtu_work;
147 	struct msix_entry msix_entry[ENIC_INTR_MAX];
148 	struct enic_msix_entry msix[ENIC_INTR_MAX];
149 	u32 msg_enable;
150 	spinlock_t devcmd_lock;
151 	u8 mac_addr[ETH_ALEN];
152 	unsigned int flags;
153 	unsigned int priv_flags;
154 	unsigned int mc_count;
155 	unsigned int uc_count;
156 	u32 port_mtu;
157 	struct enic_rx_coal rx_coalesce_setting;
158 	u32 rx_coalesce_usecs;
159 	u32 tx_coalesce_usecs;
160 #ifdef CONFIG_PCI_IOV
161 	u16 num_vfs;
162 #endif
163 	spinlock_t enic_api_lock;
164 	struct enic_port_profile *pp;
165 
166 	/* work queue cache line section */
167 	____cacheline_aligned struct vnic_wq wq[ENIC_WQ_MAX];
168 	spinlock_t wq_lock[ENIC_WQ_MAX];
169 	unsigned int wq_count;
170 	u16 loop_enable;
171 	u16 loop_tag;
172 
173 	/* receive queue cache line section */
174 	____cacheline_aligned struct vnic_rq rq[ENIC_RQ_MAX];
175 	unsigned int rq_count;
176 	u64 rq_truncated_pkts;
177 	u64 rq_bad_fcs;
178 	struct napi_struct napi[ENIC_RQ_MAX + ENIC_WQ_MAX];
179 
180 	/* interrupt resource cache line section */
181 	____cacheline_aligned struct vnic_intr intr[ENIC_INTR_MAX];
182 	unsigned int intr_count;
183 	u32 __iomem *legacy_pba;		/* memory-mapped */
184 
185 	/* completion queue cache line section */
186 	____cacheline_aligned struct vnic_cq cq[ENIC_CQ_MAX];
187 	unsigned int cq_count;
188 	struct enic_rfs_flw_tbl rfs_h;
189 	u32 rx_copybreak;
190 };
191 
192 static inline struct device *enic_get_dev(struct enic *enic)
193 {
194 	return &(enic->pdev->dev);
195 }
196 
197 static inline unsigned int enic_cq_rq(struct enic *enic, unsigned int rq)
198 {
199 	return rq;
200 }
201 
202 static inline unsigned int enic_cq_wq(struct enic *enic, unsigned int wq)
203 {
204 	return enic->rq_count + wq;
205 }
206 
207 static inline unsigned int enic_legacy_io_intr(void)
208 {
209 	return 0;
210 }
211 
212 static inline unsigned int enic_legacy_err_intr(void)
213 {
214 	return 1;
215 }
216 
217 static inline unsigned int enic_legacy_notify_intr(void)
218 {
219 	return 2;
220 }
221 
222 static inline unsigned int enic_msix_rq_intr(struct enic *enic,
223 	unsigned int rq)
224 {
225 	return enic->cq[enic_cq_rq(enic, rq)].interrupt_offset;
226 }
227 
228 static inline unsigned int enic_msix_wq_intr(struct enic *enic,
229 	unsigned int wq)
230 {
231 	return enic->cq[enic_cq_wq(enic, wq)].interrupt_offset;
232 }
233 
234 static inline unsigned int enic_msix_err_intr(struct enic *enic)
235 {
236 	return enic->rq_count + enic->wq_count;
237 }
238 
239 static inline unsigned int enic_msix_notify_intr(struct enic *enic)
240 {
241 	return enic->rq_count + enic->wq_count + 1;
242 }
243 
244 void enic_reset_addr_lists(struct enic *enic);
245 int enic_sriov_enabled(struct enic *enic);
246 int enic_is_valid_vf(struct enic *enic, int vf);
247 int enic_is_dynamic(struct enic *enic);
248 void enic_set_ethtool_ops(struct net_device *netdev);
249 
250 #endif /* _ENIC_H_ */
251