1 /* 2 * This file is part of the Chelsio T4 PCI-E SR-IOV Virtual Function Ethernet 3 * driver for Linux. 4 * 5 * Copyright (c) 2009-2010 Chelsio Communications, Inc. All rights reserved. 6 * 7 * This software is available to you under a choice of one of two 8 * licenses. You may choose to be licensed under the terms of the GNU 9 * General Public License (GPL) Version 2, available from the file 10 * COPYING in the main directory of this source tree, or the 11 * OpenIB.org BSD license below: 12 * 13 * Redistribution and use in source and binary forms, with or 14 * without modification, are permitted provided that the following 15 * conditions are met: 16 * 17 * - Redistributions of source code must retain the above 18 * copyright notice, this list of conditions and the following 19 * disclaimer. 20 * 21 * - Redistributions in binary form must reproduce the above 22 * copyright notice, this list of conditions and the following 23 * disclaimer in the documentation and/or other materials 24 * provided with the distribution. 25 * 26 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, 27 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF 28 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND 29 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS 30 * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN 31 * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN 32 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE 33 * SOFTWARE. 34 */ 35 36 #include <linux/pci.h> 37 38 #include "t4vf_common.h" 39 #include "t4vf_defs.h" 40 41 #include "../cxgb4/t4_regs.h" 42 #include "../cxgb4/t4_values.h" 43 #include "../cxgb4/t4fw_api.h" 44 45 /* 46 * Wait for the device to become ready (signified by our "who am I" register 47 * returning a value other than all 1's). Return an error if it doesn't 48 * become ready ... 49 */ 50 int t4vf_wait_dev_ready(struct adapter *adapter) 51 { 52 const u32 whoami = T4VF_PL_BASE_ADDR + PL_VF_WHOAMI; 53 const u32 notready1 = 0xffffffff; 54 const u32 notready2 = 0xeeeeeeee; 55 u32 val; 56 57 val = t4_read_reg(adapter, whoami); 58 if (val != notready1 && val != notready2) 59 return 0; 60 msleep(500); 61 val = t4_read_reg(adapter, whoami); 62 if (val != notready1 && val != notready2) 63 return 0; 64 else 65 return -EIO; 66 } 67 68 /* 69 * Get the reply to a mailbox command and store it in @rpl in big-endian order 70 * (since the firmware data structures are specified in a big-endian layout). 71 */ 72 static void get_mbox_rpl(struct adapter *adapter, __be64 *rpl, int size, 73 u32 mbox_data) 74 { 75 for ( ; size; size -= 8, mbox_data += 8) 76 *rpl++ = cpu_to_be64(t4_read_reg64(adapter, mbox_data)); 77 } 78 79 /** 80 * t4vf_record_mbox - record a Firmware Mailbox Command/Reply in the log 81 * @adapter: the adapter 82 * @cmd: the Firmware Mailbox Command or Reply 83 * @size: command length in bytes 84 * @access: the time (ms) needed to access the Firmware Mailbox 85 * @execute: the time (ms) the command spent being executed 86 */ 87 static void t4vf_record_mbox(struct adapter *adapter, const __be64 *cmd, 88 int size, int access, int execute) 89 { 90 struct mbox_cmd_log *log = adapter->mbox_log; 91 struct mbox_cmd *entry; 92 int i; 93 94 entry = mbox_cmd_log_entry(log, log->cursor++); 95 if (log->cursor == log->size) 96 log->cursor = 0; 97 98 for (i = 0; i < size / 8; i++) 99 entry->cmd[i] = be64_to_cpu(cmd[i]); 100 while (i < MBOX_LEN / 8) 101 entry->cmd[i++] = 0; 102 entry->timestamp = jiffies; 103 entry->seqno = log->seqno++; 104 entry->access = access; 105 entry->execute = execute; 106 } 107 108 /** 109 * t4vf_wr_mbox_core - send a command to FW through the mailbox 110 * @adapter: the adapter 111 * @cmd: the command to write 112 * @size: command length in bytes 113 * @rpl: where to optionally store the reply 114 * @sleep_ok: if true we may sleep while awaiting command completion 115 * 116 * Sends the given command to FW through the mailbox and waits for the 117 * FW to execute the command. If @rpl is not %NULL it is used to store 118 * the FW's reply to the command. The command and its optional reply 119 * are of the same length. FW can take up to 500 ms to respond. 120 * @sleep_ok determines whether we may sleep while awaiting the response. 121 * If sleeping is allowed we use progressive backoff otherwise we spin. 122 * 123 * The return value is 0 on success or a negative errno on failure. A 124 * failure can happen either because we are not able to execute the 125 * command or FW executes it but signals an error. In the latter case 126 * the return value is the error code indicated by FW (negated). 127 */ 128 int t4vf_wr_mbox_core(struct adapter *adapter, const void *cmd, int size, 129 void *rpl, bool sleep_ok) 130 { 131 static const int delay[] = { 132 1, 1, 3, 5, 10, 10, 20, 50, 100 133 }; 134 135 u16 access = 0, execute = 0; 136 u32 v, mbox_data; 137 int i, ms, delay_idx, ret; 138 const __be64 *p; 139 u32 mbox_ctl = T4VF_CIM_BASE_ADDR + CIM_VF_EXT_MAILBOX_CTRL; 140 u32 cmd_op = FW_CMD_OP_G(be32_to_cpu(((struct fw_cmd_hdr *)cmd)->hi)); 141 __be64 cmd_rpl[MBOX_LEN / 8]; 142 struct mbox_list entry; 143 144 /* In T6, mailbox size is changed to 128 bytes to avoid 145 * invalidating the entire prefetch buffer. 146 */ 147 if (CHELSIO_CHIP_VERSION(adapter->params.chip) <= CHELSIO_T5) 148 mbox_data = T4VF_MBDATA_BASE_ADDR; 149 else 150 mbox_data = T6VF_MBDATA_BASE_ADDR; 151 152 /* 153 * Commands must be multiples of 16 bytes in length and may not be 154 * larger than the size of the Mailbox Data register array. 155 */ 156 if ((size % 16) != 0 || 157 size > NUM_CIM_VF_MAILBOX_DATA_INSTANCES * 4) 158 return -EINVAL; 159 160 /* Queue ourselves onto the mailbox access list. When our entry is at 161 * the front of the list, we have rights to access the mailbox. So we 162 * wait [for a while] till we're at the front [or bail out with an 163 * EBUSY] ... 164 */ 165 spin_lock(&adapter->mbox_lock); 166 list_add_tail(&entry.list, &adapter->mlist.list); 167 spin_unlock(&adapter->mbox_lock); 168 169 delay_idx = 0; 170 ms = delay[0]; 171 172 for (i = 0; ; i += ms) { 173 /* If we've waited too long, return a busy indication. This 174 * really ought to be based on our initial position in the 175 * mailbox access list but this is a start. We very rearely 176 * contend on access to the mailbox ... 177 */ 178 if (i > FW_CMD_MAX_TIMEOUT) { 179 spin_lock(&adapter->mbox_lock); 180 list_del(&entry.list); 181 spin_unlock(&adapter->mbox_lock); 182 ret = -EBUSY; 183 t4vf_record_mbox(adapter, cmd, size, access, ret); 184 return ret; 185 } 186 187 /* If we're at the head, break out and start the mailbox 188 * protocol. 189 */ 190 if (list_first_entry(&adapter->mlist.list, struct mbox_list, 191 list) == &entry) 192 break; 193 194 /* Delay for a bit before checking again ... */ 195 if (sleep_ok) { 196 ms = delay[delay_idx]; /* last element may repeat */ 197 if (delay_idx < ARRAY_SIZE(delay) - 1) 198 delay_idx++; 199 msleep(ms); 200 } else { 201 mdelay(ms); 202 } 203 } 204 205 /* 206 * Loop trying to get ownership of the mailbox. Return an error 207 * if we can't gain ownership. 208 */ 209 v = MBOWNER_G(t4_read_reg(adapter, mbox_ctl)); 210 for (i = 0; v == MBOX_OWNER_NONE && i < 3; i++) 211 v = MBOWNER_G(t4_read_reg(adapter, mbox_ctl)); 212 if (v != MBOX_OWNER_DRV) { 213 spin_lock(&adapter->mbox_lock); 214 list_del(&entry.list); 215 spin_unlock(&adapter->mbox_lock); 216 ret = (v == MBOX_OWNER_FW) ? -EBUSY : -ETIMEDOUT; 217 t4vf_record_mbox(adapter, cmd, size, access, ret); 218 return ret; 219 } 220 221 /* 222 * Write the command array into the Mailbox Data register array and 223 * transfer ownership of the mailbox to the firmware. 224 * 225 * For the VFs, the Mailbox Data "registers" are actually backed by 226 * T4's "MA" interface rather than PL Registers (as is the case for 227 * the PFs). Because these are in different coherency domains, the 228 * write to the VF's PL-register-backed Mailbox Control can race in 229 * front of the writes to the MA-backed VF Mailbox Data "registers". 230 * So we need to do a read-back on at least one byte of the VF Mailbox 231 * Data registers before doing the write to the VF Mailbox Control 232 * register. 233 */ 234 if (cmd_op != FW_VI_STATS_CMD) 235 t4vf_record_mbox(adapter, cmd, size, access, 0); 236 for (i = 0, p = cmd; i < size; i += 8) 237 t4_write_reg64(adapter, mbox_data + i, be64_to_cpu(*p++)); 238 t4_read_reg(adapter, mbox_data); /* flush write */ 239 240 t4_write_reg(adapter, mbox_ctl, 241 MBMSGVALID_F | MBOWNER_V(MBOX_OWNER_FW)); 242 t4_read_reg(adapter, mbox_ctl); /* flush write */ 243 244 /* 245 * Spin waiting for firmware to acknowledge processing our command. 246 */ 247 delay_idx = 0; 248 ms = delay[0]; 249 250 for (i = 0; i < FW_CMD_MAX_TIMEOUT; i += ms) { 251 if (sleep_ok) { 252 ms = delay[delay_idx]; 253 if (delay_idx < ARRAY_SIZE(delay) - 1) 254 delay_idx++; 255 msleep(ms); 256 } else 257 mdelay(ms); 258 259 /* 260 * If we're the owner, see if this is the reply we wanted. 261 */ 262 v = t4_read_reg(adapter, mbox_ctl); 263 if (MBOWNER_G(v) == MBOX_OWNER_DRV) { 264 /* 265 * If the Message Valid bit isn't on, revoke ownership 266 * of the mailbox and continue waiting for our reply. 267 */ 268 if ((v & MBMSGVALID_F) == 0) { 269 t4_write_reg(adapter, mbox_ctl, 270 MBOWNER_V(MBOX_OWNER_NONE)); 271 continue; 272 } 273 274 /* 275 * We now have our reply. Extract the command return 276 * value, copy the reply back to our caller's buffer 277 * (if specified) and revoke ownership of the mailbox. 278 * We return the (negated) firmware command return 279 * code (this depends on FW_SUCCESS == 0). 280 */ 281 get_mbox_rpl(adapter, cmd_rpl, size, mbox_data); 282 283 /* return value in low-order little-endian word */ 284 v = be64_to_cpu(cmd_rpl[0]); 285 286 if (rpl) { 287 /* request bit in high-order BE word */ 288 WARN_ON((be32_to_cpu(*(const __be32 *)cmd) 289 & FW_CMD_REQUEST_F) == 0); 290 memcpy(rpl, cmd_rpl, size); 291 WARN_ON((be32_to_cpu(*(__be32 *)rpl) 292 & FW_CMD_REQUEST_F) != 0); 293 } 294 t4_write_reg(adapter, mbox_ctl, 295 MBOWNER_V(MBOX_OWNER_NONE)); 296 execute = i + ms; 297 if (cmd_op != FW_VI_STATS_CMD) 298 t4vf_record_mbox(adapter, cmd_rpl, size, access, 299 execute); 300 spin_lock(&adapter->mbox_lock); 301 list_del(&entry.list); 302 spin_unlock(&adapter->mbox_lock); 303 return -FW_CMD_RETVAL_G(v); 304 } 305 } 306 307 /* We timed out. Return the error ... */ 308 ret = -ETIMEDOUT; 309 t4vf_record_mbox(adapter, cmd, size, access, ret); 310 spin_lock(&adapter->mbox_lock); 311 list_del(&entry.list); 312 spin_unlock(&adapter->mbox_lock); 313 return ret; 314 } 315 316 /* In the Physical Function Driver Common Code, the ADVERT_MASK is used to 317 * mask out bits in the Advertised Port Capabilities which are managed via 318 * separate controls, like Pause Frames and Forward Error Correction. In the 319 * Virtual Function Common Code, since we never perform L1 Configuration on 320 * the Link, the only things we really need to filter out are things which 321 * we decode and report separately like Speed. 322 */ 323 #define ADVERT_MASK (FW_PORT_CAP32_SPEED_V(FW_PORT_CAP32_SPEED_M) | \ 324 FW_PORT_CAP32_802_3_PAUSE | \ 325 FW_PORT_CAP32_802_3_ASM_DIR | \ 326 FW_PORT_CAP32_FEC_V(FW_PORT_CAP32_FEC_M) | \ 327 FW_PORT_CAP32_ANEG) 328 329 /** 330 * fwcaps16_to_caps32 - convert 16-bit Port Capabilities to 32-bits 331 * @caps16: a 16-bit Port Capabilities value 332 * 333 * Returns the equivalent 32-bit Port Capabilities value. 334 */ 335 static fw_port_cap32_t fwcaps16_to_caps32(fw_port_cap16_t caps16) 336 { 337 fw_port_cap32_t caps32 = 0; 338 339 #define CAP16_TO_CAP32(__cap) \ 340 do { \ 341 if (caps16 & FW_PORT_CAP_##__cap) \ 342 caps32 |= FW_PORT_CAP32_##__cap; \ 343 } while (0) 344 345 CAP16_TO_CAP32(SPEED_100M); 346 CAP16_TO_CAP32(SPEED_1G); 347 CAP16_TO_CAP32(SPEED_25G); 348 CAP16_TO_CAP32(SPEED_10G); 349 CAP16_TO_CAP32(SPEED_40G); 350 CAP16_TO_CAP32(SPEED_100G); 351 CAP16_TO_CAP32(FC_RX); 352 CAP16_TO_CAP32(FC_TX); 353 CAP16_TO_CAP32(ANEG); 354 CAP16_TO_CAP32(MDIAUTO); 355 CAP16_TO_CAP32(MDISTRAIGHT); 356 CAP16_TO_CAP32(FEC_RS); 357 CAP16_TO_CAP32(FEC_BASER_RS); 358 CAP16_TO_CAP32(802_3_PAUSE); 359 CAP16_TO_CAP32(802_3_ASM_DIR); 360 361 #undef CAP16_TO_CAP32 362 363 return caps32; 364 } 365 366 /* Translate Firmware Pause specification to Common Code */ 367 static inline enum cc_pause fwcap_to_cc_pause(fw_port_cap32_t fw_pause) 368 { 369 enum cc_pause cc_pause = 0; 370 371 if (fw_pause & FW_PORT_CAP32_FC_RX) 372 cc_pause |= PAUSE_RX; 373 if (fw_pause & FW_PORT_CAP32_FC_TX) 374 cc_pause |= PAUSE_TX; 375 376 return cc_pause; 377 } 378 379 /* Translate Firmware Forward Error Correction specification to Common Code */ 380 static inline enum cc_fec fwcap_to_cc_fec(fw_port_cap32_t fw_fec) 381 { 382 enum cc_fec cc_fec = 0; 383 384 if (fw_fec & FW_PORT_CAP32_FEC_RS) 385 cc_fec |= FEC_RS; 386 if (fw_fec & FW_PORT_CAP32_FEC_BASER_RS) 387 cc_fec |= FEC_BASER_RS; 388 389 return cc_fec; 390 } 391 392 /** 393 * Return the highest speed set in the port capabilities, in Mb/s. 394 */ 395 static unsigned int fwcap_to_speed(fw_port_cap32_t caps) 396 { 397 #define TEST_SPEED_RETURN(__caps_speed, __speed) \ 398 do { \ 399 if (caps & FW_PORT_CAP32_SPEED_##__caps_speed) \ 400 return __speed; \ 401 } while (0) 402 403 TEST_SPEED_RETURN(400G, 400000); 404 TEST_SPEED_RETURN(200G, 200000); 405 TEST_SPEED_RETURN(100G, 100000); 406 TEST_SPEED_RETURN(50G, 50000); 407 TEST_SPEED_RETURN(40G, 40000); 408 TEST_SPEED_RETURN(25G, 25000); 409 TEST_SPEED_RETURN(10G, 10000); 410 TEST_SPEED_RETURN(1G, 1000); 411 TEST_SPEED_RETURN(100M, 100); 412 413 #undef TEST_SPEED_RETURN 414 415 return 0; 416 } 417 418 /** 419 * fwcap_to_fwspeed - return highest speed in Port Capabilities 420 * @acaps: advertised Port Capabilities 421 * 422 * Get the highest speed for the port from the advertised Port 423 * Capabilities. It will be either the highest speed from the list of 424 * speeds or whatever user has set using ethtool. 425 */ 426 static fw_port_cap32_t fwcap_to_fwspeed(fw_port_cap32_t acaps) 427 { 428 #define TEST_SPEED_RETURN(__caps_speed) \ 429 do { \ 430 if (acaps & FW_PORT_CAP32_SPEED_##__caps_speed) \ 431 return FW_PORT_CAP32_SPEED_##__caps_speed; \ 432 } while (0) 433 434 TEST_SPEED_RETURN(400G); 435 TEST_SPEED_RETURN(200G); 436 TEST_SPEED_RETURN(100G); 437 TEST_SPEED_RETURN(50G); 438 TEST_SPEED_RETURN(40G); 439 TEST_SPEED_RETURN(25G); 440 TEST_SPEED_RETURN(10G); 441 TEST_SPEED_RETURN(1G); 442 TEST_SPEED_RETURN(100M); 443 444 #undef TEST_SPEED_RETURN 445 return 0; 446 } 447 448 /* 449 * init_link_config - initialize a link's SW state 450 * @lc: structure holding the link state 451 * @pcaps: link Port Capabilities 452 * @acaps: link current Advertised Port Capabilities 453 * 454 * Initializes the SW state maintained for each link, including the link's 455 * capabilities and default speed/flow-control/autonegotiation settings. 456 */ 457 static void init_link_config(struct link_config *lc, 458 fw_port_cap32_t pcaps, 459 fw_port_cap32_t acaps) 460 { 461 lc->pcaps = pcaps; 462 lc->lpacaps = 0; 463 lc->speed_caps = 0; 464 lc->speed = 0; 465 lc->requested_fc = lc->fc = PAUSE_RX | PAUSE_TX; 466 467 /* For Forward Error Control, we default to whatever the Firmware 468 * tells us the Link is currently advertising. 469 */ 470 lc->auto_fec = fwcap_to_cc_fec(acaps); 471 lc->requested_fec = FEC_AUTO; 472 lc->fec = lc->auto_fec; 473 474 /* If the Port is capable of Auto-Negtotiation, initialize it as 475 * "enabled" and copy over all of the Physical Port Capabilities 476 * to the Advertised Port Capabilities. Otherwise mark it as 477 * Auto-Negotiate disabled and select the highest supported speed 478 * for the link. Note parallel structure in t4_link_l1cfg_core() 479 * and t4_handle_get_port_info(). 480 */ 481 if (lc->pcaps & FW_PORT_CAP32_ANEG) { 482 lc->acaps = acaps & ADVERT_MASK; 483 lc->autoneg = AUTONEG_ENABLE; 484 lc->requested_fc |= PAUSE_AUTONEG; 485 } else { 486 lc->acaps = 0; 487 lc->autoneg = AUTONEG_DISABLE; 488 lc->speed_caps = fwcap_to_fwspeed(acaps); 489 } 490 } 491 492 /** 493 * t4vf_port_init - initialize port hardware/software state 494 * @adapter: the adapter 495 * @pidx: the adapter port index 496 */ 497 int t4vf_port_init(struct adapter *adapter, int pidx) 498 { 499 struct port_info *pi = adap2pinfo(adapter, pidx); 500 unsigned int fw_caps = adapter->params.fw_caps_support; 501 struct fw_vi_cmd vi_cmd, vi_rpl; 502 struct fw_port_cmd port_cmd, port_rpl; 503 enum fw_port_type port_type; 504 int mdio_addr; 505 fw_port_cap32_t pcaps, acaps; 506 int ret; 507 508 /* If we haven't yet determined whether we're talking to Firmware 509 * which knows the new 32-bit Port Capabilities, it's time to find 510 * out now. This will also tell new Firmware to send us Port Status 511 * Updates using the new 32-bit Port Capabilities version of the 512 * Port Information message. 513 */ 514 if (fw_caps == FW_CAPS_UNKNOWN) { 515 u32 param, val; 516 517 param = (FW_PARAMS_MNEM_V(FW_PARAMS_MNEM_PFVF) | 518 FW_PARAMS_PARAM_X_V(FW_PARAMS_PARAM_PFVF_PORT_CAPS32)); 519 val = 1; 520 ret = t4vf_set_params(adapter, 1, ¶m, &val); 521 fw_caps = (ret == 0 ? FW_CAPS32 : FW_CAPS16); 522 adapter->params.fw_caps_support = fw_caps; 523 } 524 525 /* 526 * Execute a VI Read command to get our Virtual Interface information 527 * like MAC address, etc. 528 */ 529 memset(&vi_cmd, 0, sizeof(vi_cmd)); 530 vi_cmd.op_to_vfn = cpu_to_be32(FW_CMD_OP_V(FW_VI_CMD) | 531 FW_CMD_REQUEST_F | 532 FW_CMD_READ_F); 533 vi_cmd.alloc_to_len16 = cpu_to_be32(FW_LEN16(vi_cmd)); 534 vi_cmd.type_viid = cpu_to_be16(FW_VI_CMD_VIID_V(pi->viid)); 535 ret = t4vf_wr_mbox(adapter, &vi_cmd, sizeof(vi_cmd), &vi_rpl); 536 if (ret != FW_SUCCESS) 537 return ret; 538 539 BUG_ON(pi->port_id != FW_VI_CMD_PORTID_G(vi_rpl.portid_pkd)); 540 pi->rss_size = FW_VI_CMD_RSSSIZE_G(be16_to_cpu(vi_rpl.rsssize_pkd)); 541 t4_os_set_hw_addr(adapter, pidx, vi_rpl.mac); 542 543 /* 544 * If we don't have read access to our port information, we're done 545 * now. Otherwise, execute a PORT Read command to get it ... 546 */ 547 if (!(adapter->params.vfres.r_caps & FW_CMD_CAP_PORT)) 548 return 0; 549 550 memset(&port_cmd, 0, sizeof(port_cmd)); 551 port_cmd.op_to_portid = cpu_to_be32(FW_CMD_OP_V(FW_PORT_CMD) | 552 FW_CMD_REQUEST_F | 553 FW_CMD_READ_F | 554 FW_PORT_CMD_PORTID_V(pi->port_id)); 555 port_cmd.action_to_len16 = cpu_to_be32( 556 FW_PORT_CMD_ACTION_V(fw_caps == FW_CAPS16 557 ? FW_PORT_ACTION_GET_PORT_INFO 558 : FW_PORT_ACTION_GET_PORT_INFO32) | 559 FW_LEN16(port_cmd)); 560 ret = t4vf_wr_mbox(adapter, &port_cmd, sizeof(port_cmd), &port_rpl); 561 if (ret != FW_SUCCESS) 562 return ret; 563 564 /* Extract the various fields from the Port Information message. */ 565 if (fw_caps == FW_CAPS16) { 566 u32 lstatus = be32_to_cpu(port_rpl.u.info.lstatus_to_modtype); 567 568 port_type = FW_PORT_CMD_PTYPE_G(lstatus); 569 mdio_addr = ((lstatus & FW_PORT_CMD_MDIOCAP_F) 570 ? FW_PORT_CMD_MDIOADDR_G(lstatus) 571 : -1); 572 pcaps = fwcaps16_to_caps32(be16_to_cpu(port_rpl.u.info.pcap)); 573 acaps = fwcaps16_to_caps32(be16_to_cpu(port_rpl.u.info.acap)); 574 } else { 575 u32 lstatus32 = 576 be32_to_cpu(port_rpl.u.info32.lstatus32_to_cbllen32); 577 578 port_type = FW_PORT_CMD_PORTTYPE32_G(lstatus32); 579 mdio_addr = ((lstatus32 & FW_PORT_CMD_MDIOCAP32_F) 580 ? FW_PORT_CMD_MDIOADDR32_G(lstatus32) 581 : -1); 582 pcaps = be32_to_cpu(port_rpl.u.info32.pcaps32); 583 acaps = be32_to_cpu(port_rpl.u.info32.acaps32); 584 } 585 586 pi->port_type = port_type; 587 pi->mdio_addr = mdio_addr; 588 pi->mod_type = FW_PORT_MOD_TYPE_NA; 589 590 init_link_config(&pi->link_cfg, pcaps, acaps); 591 return 0; 592 } 593 594 /** 595 * t4vf_fw_reset - issue a reset to FW 596 * @adapter: the adapter 597 * 598 * Issues a reset command to FW. For a Physical Function this would 599 * result in the Firmware resetting all of its state. For a Virtual 600 * Function this just resets the state associated with the VF. 601 */ 602 int t4vf_fw_reset(struct adapter *adapter) 603 { 604 struct fw_reset_cmd cmd; 605 606 memset(&cmd, 0, sizeof(cmd)); 607 cmd.op_to_write = cpu_to_be32(FW_CMD_OP_V(FW_RESET_CMD) | 608 FW_CMD_WRITE_F); 609 cmd.retval_len16 = cpu_to_be32(FW_LEN16(cmd)); 610 return t4vf_wr_mbox(adapter, &cmd, sizeof(cmd), NULL); 611 } 612 613 /** 614 * t4vf_query_params - query FW or device parameters 615 * @adapter: the adapter 616 * @nparams: the number of parameters 617 * @params: the parameter names 618 * @vals: the parameter values 619 * 620 * Reads the values of firmware or device parameters. Up to 7 parameters 621 * can be queried at once. 622 */ 623 static int t4vf_query_params(struct adapter *adapter, unsigned int nparams, 624 const u32 *params, u32 *vals) 625 { 626 int i, ret; 627 struct fw_params_cmd cmd, rpl; 628 struct fw_params_param *p; 629 size_t len16; 630 631 if (nparams > 7) 632 return -EINVAL; 633 634 memset(&cmd, 0, sizeof(cmd)); 635 cmd.op_to_vfn = cpu_to_be32(FW_CMD_OP_V(FW_PARAMS_CMD) | 636 FW_CMD_REQUEST_F | 637 FW_CMD_READ_F); 638 len16 = DIV_ROUND_UP(offsetof(struct fw_params_cmd, 639 param[nparams].mnem), 16); 640 cmd.retval_len16 = cpu_to_be32(FW_CMD_LEN16_V(len16)); 641 for (i = 0, p = &cmd.param[0]; i < nparams; i++, p++) 642 p->mnem = htonl(*params++); 643 644 ret = t4vf_wr_mbox(adapter, &cmd, sizeof(cmd), &rpl); 645 if (ret == 0) 646 for (i = 0, p = &rpl.param[0]; i < nparams; i++, p++) 647 *vals++ = be32_to_cpu(p->val); 648 return ret; 649 } 650 651 /** 652 * t4vf_set_params - sets FW or device parameters 653 * @adapter: the adapter 654 * @nparams: the number of parameters 655 * @params: the parameter names 656 * @vals: the parameter values 657 * 658 * Sets the values of firmware or device parameters. Up to 7 parameters 659 * can be specified at once. 660 */ 661 int t4vf_set_params(struct adapter *adapter, unsigned int nparams, 662 const u32 *params, const u32 *vals) 663 { 664 int i; 665 struct fw_params_cmd cmd; 666 struct fw_params_param *p; 667 size_t len16; 668 669 if (nparams > 7) 670 return -EINVAL; 671 672 memset(&cmd, 0, sizeof(cmd)); 673 cmd.op_to_vfn = cpu_to_be32(FW_CMD_OP_V(FW_PARAMS_CMD) | 674 FW_CMD_REQUEST_F | 675 FW_CMD_WRITE_F); 676 len16 = DIV_ROUND_UP(offsetof(struct fw_params_cmd, 677 param[nparams]), 16); 678 cmd.retval_len16 = cpu_to_be32(FW_CMD_LEN16_V(len16)); 679 for (i = 0, p = &cmd.param[0]; i < nparams; i++, p++) { 680 p->mnem = cpu_to_be32(*params++); 681 p->val = cpu_to_be32(*vals++); 682 } 683 684 return t4vf_wr_mbox(adapter, &cmd, sizeof(cmd), NULL); 685 } 686 687 /** 688 * t4vf_fl_pkt_align - return the fl packet alignment 689 * @adapter: the adapter 690 * 691 * T4 has a single field to specify the packing and padding boundary. 692 * T5 onwards has separate fields for this and hence the alignment for 693 * next packet offset is maximum of these two. And T6 changes the 694 * Ingress Padding Boundary Shift, so it's all a mess and it's best 695 * if we put this in low-level Common Code ... 696 * 697 */ 698 int t4vf_fl_pkt_align(struct adapter *adapter) 699 { 700 u32 sge_control, sge_control2; 701 unsigned int ingpadboundary, ingpackboundary, fl_align, ingpad_shift; 702 703 sge_control = adapter->params.sge.sge_control; 704 705 /* T4 uses a single control field to specify both the PCIe Padding and 706 * Packing Boundary. T5 introduced the ability to specify these 707 * separately. The actual Ingress Packet Data alignment boundary 708 * within Packed Buffer Mode is the maximum of these two 709 * specifications. (Note that it makes no real practical sense to 710 * have the Pading Boudary be larger than the Packing Boundary but you 711 * could set the chip up that way and, in fact, legacy T4 code would 712 * end doing this because it would initialize the Padding Boundary and 713 * leave the Packing Boundary initialized to 0 (16 bytes).) 714 * Padding Boundary values in T6 starts from 8B, 715 * where as it is 32B for T4 and T5. 716 */ 717 if (CHELSIO_CHIP_VERSION(adapter->params.chip) <= CHELSIO_T5) 718 ingpad_shift = INGPADBOUNDARY_SHIFT_X; 719 else 720 ingpad_shift = T6_INGPADBOUNDARY_SHIFT_X; 721 722 ingpadboundary = 1 << (INGPADBOUNDARY_G(sge_control) + ingpad_shift); 723 724 fl_align = ingpadboundary; 725 if (!is_t4(adapter->params.chip)) { 726 /* T5 has a different interpretation of one of the PCIe Packing 727 * Boundary values. 728 */ 729 sge_control2 = adapter->params.sge.sge_control2; 730 ingpackboundary = INGPACKBOUNDARY_G(sge_control2); 731 if (ingpackboundary == INGPACKBOUNDARY_16B_X) 732 ingpackboundary = 16; 733 else 734 ingpackboundary = 1 << (ingpackboundary + 735 INGPACKBOUNDARY_SHIFT_X); 736 737 fl_align = max(ingpadboundary, ingpackboundary); 738 } 739 return fl_align; 740 } 741 742 /** 743 * t4vf_bar2_sge_qregs - return BAR2 SGE Queue register information 744 * @adapter: the adapter 745 * @qid: the Queue ID 746 * @qtype: the Ingress or Egress type for @qid 747 * @pbar2_qoffset: BAR2 Queue Offset 748 * @pbar2_qid: BAR2 Queue ID or 0 for Queue ID inferred SGE Queues 749 * 750 * Returns the BAR2 SGE Queue Registers information associated with the 751 * indicated Absolute Queue ID. These are passed back in return value 752 * pointers. @qtype should be T4_BAR2_QTYPE_EGRESS for Egress Queue 753 * and T4_BAR2_QTYPE_INGRESS for Ingress Queues. 754 * 755 * This may return an error which indicates that BAR2 SGE Queue 756 * registers aren't available. If an error is not returned, then the 757 * following values are returned: 758 * 759 * *@pbar2_qoffset: the BAR2 Offset of the @qid Registers 760 * *@pbar2_qid: the BAR2 SGE Queue ID or 0 of @qid 761 * 762 * If the returned BAR2 Queue ID is 0, then BAR2 SGE registers which 763 * require the "Inferred Queue ID" ability may be used. E.g. the 764 * Write Combining Doorbell Buffer. If the BAR2 Queue ID is not 0, 765 * then these "Inferred Queue ID" register may not be used. 766 */ 767 int t4vf_bar2_sge_qregs(struct adapter *adapter, 768 unsigned int qid, 769 enum t4_bar2_qtype qtype, 770 u64 *pbar2_qoffset, 771 unsigned int *pbar2_qid) 772 { 773 unsigned int page_shift, page_size, qpp_shift, qpp_mask; 774 u64 bar2_page_offset, bar2_qoffset; 775 unsigned int bar2_qid, bar2_qid_offset, bar2_qinferred; 776 777 /* T4 doesn't support BAR2 SGE Queue registers. 778 */ 779 if (is_t4(adapter->params.chip)) 780 return -EINVAL; 781 782 /* Get our SGE Page Size parameters. 783 */ 784 page_shift = adapter->params.sge.sge_vf_hps + 10; 785 page_size = 1 << page_shift; 786 787 /* Get the right Queues per Page parameters for our Queue. 788 */ 789 qpp_shift = (qtype == T4_BAR2_QTYPE_EGRESS 790 ? adapter->params.sge.sge_vf_eq_qpp 791 : adapter->params.sge.sge_vf_iq_qpp); 792 qpp_mask = (1 << qpp_shift) - 1; 793 794 /* Calculate the basics of the BAR2 SGE Queue register area: 795 * o The BAR2 page the Queue registers will be in. 796 * o The BAR2 Queue ID. 797 * o The BAR2 Queue ID Offset into the BAR2 page. 798 */ 799 bar2_page_offset = ((u64)(qid >> qpp_shift) << page_shift); 800 bar2_qid = qid & qpp_mask; 801 bar2_qid_offset = bar2_qid * SGE_UDB_SIZE; 802 803 /* If the BAR2 Queue ID Offset is less than the Page Size, then the 804 * hardware will infer the Absolute Queue ID simply from the writes to 805 * the BAR2 Queue ID Offset within the BAR2 Page (and we need to use a 806 * BAR2 Queue ID of 0 for those writes). Otherwise, we'll simply 807 * write to the first BAR2 SGE Queue Area within the BAR2 Page with 808 * the BAR2 Queue ID and the hardware will infer the Absolute Queue ID 809 * from the BAR2 Page and BAR2 Queue ID. 810 * 811 * One important censequence of this is that some BAR2 SGE registers 812 * have a "Queue ID" field and we can write the BAR2 SGE Queue ID 813 * there. But other registers synthesize the SGE Queue ID purely 814 * from the writes to the registers -- the Write Combined Doorbell 815 * Buffer is a good example. These BAR2 SGE Registers are only 816 * available for those BAR2 SGE Register areas where the SGE Absolute 817 * Queue ID can be inferred from simple writes. 818 */ 819 bar2_qoffset = bar2_page_offset; 820 bar2_qinferred = (bar2_qid_offset < page_size); 821 if (bar2_qinferred) { 822 bar2_qoffset += bar2_qid_offset; 823 bar2_qid = 0; 824 } 825 826 *pbar2_qoffset = bar2_qoffset; 827 *pbar2_qid = bar2_qid; 828 return 0; 829 } 830 831 unsigned int t4vf_get_pf_from_vf(struct adapter *adapter) 832 { 833 u32 whoami; 834 835 whoami = t4_read_reg(adapter, T4VF_PL_BASE_ADDR + PL_VF_WHOAMI_A); 836 return (CHELSIO_CHIP_VERSION(adapter->params.chip) <= CHELSIO_T5 ? 837 SOURCEPF_G(whoami) : T6_SOURCEPF_G(whoami)); 838 } 839 840 /** 841 * t4vf_get_sge_params - retrieve adapter Scatter gather Engine parameters 842 * @adapter: the adapter 843 * 844 * Retrieves various core SGE parameters in the form of hardware SGE 845 * register values. The caller is responsible for decoding these as 846 * needed. The SGE parameters are stored in @adapter->params.sge. 847 */ 848 int t4vf_get_sge_params(struct adapter *adapter) 849 { 850 struct sge_params *sge_params = &adapter->params.sge; 851 u32 params[7], vals[7]; 852 int v; 853 854 params[0] = (FW_PARAMS_MNEM_V(FW_PARAMS_MNEM_REG) | 855 FW_PARAMS_PARAM_XYZ_V(SGE_CONTROL_A)); 856 params[1] = (FW_PARAMS_MNEM_V(FW_PARAMS_MNEM_REG) | 857 FW_PARAMS_PARAM_XYZ_V(SGE_HOST_PAGE_SIZE_A)); 858 params[2] = (FW_PARAMS_MNEM_V(FW_PARAMS_MNEM_REG) | 859 FW_PARAMS_PARAM_XYZ_V(SGE_FL_BUFFER_SIZE0_A)); 860 params[3] = (FW_PARAMS_MNEM_V(FW_PARAMS_MNEM_REG) | 861 FW_PARAMS_PARAM_XYZ_V(SGE_FL_BUFFER_SIZE1_A)); 862 params[4] = (FW_PARAMS_MNEM_V(FW_PARAMS_MNEM_REG) | 863 FW_PARAMS_PARAM_XYZ_V(SGE_TIMER_VALUE_0_AND_1_A)); 864 params[5] = (FW_PARAMS_MNEM_V(FW_PARAMS_MNEM_REG) | 865 FW_PARAMS_PARAM_XYZ_V(SGE_TIMER_VALUE_2_AND_3_A)); 866 params[6] = (FW_PARAMS_MNEM_V(FW_PARAMS_MNEM_REG) | 867 FW_PARAMS_PARAM_XYZ_V(SGE_TIMER_VALUE_4_AND_5_A)); 868 v = t4vf_query_params(adapter, 7, params, vals); 869 if (v) 870 return v; 871 sge_params->sge_control = vals[0]; 872 sge_params->sge_host_page_size = vals[1]; 873 sge_params->sge_fl_buffer_size[0] = vals[2]; 874 sge_params->sge_fl_buffer_size[1] = vals[3]; 875 sge_params->sge_timer_value_0_and_1 = vals[4]; 876 sge_params->sge_timer_value_2_and_3 = vals[5]; 877 sge_params->sge_timer_value_4_and_5 = vals[6]; 878 879 /* T4 uses a single control field to specify both the PCIe Padding and 880 * Packing Boundary. T5 introduced the ability to specify these 881 * separately with the Padding Boundary in SGE_CONTROL and and Packing 882 * Boundary in SGE_CONTROL2. So for T5 and later we need to grab 883 * SGE_CONTROL in order to determine how ingress packet data will be 884 * laid out in Packed Buffer Mode. Unfortunately, older versions of 885 * the firmware won't let us retrieve SGE_CONTROL2 so if we get a 886 * failure grabbing it we throw an error since we can't figure out the 887 * right value. 888 */ 889 if (!is_t4(adapter->params.chip)) { 890 params[0] = (FW_PARAMS_MNEM_V(FW_PARAMS_MNEM_REG) | 891 FW_PARAMS_PARAM_XYZ_V(SGE_CONTROL2_A)); 892 v = t4vf_query_params(adapter, 1, params, vals); 893 if (v != FW_SUCCESS) { 894 dev_err(adapter->pdev_dev, 895 "Unable to get SGE Control2; " 896 "probably old firmware.\n"); 897 return v; 898 } 899 sge_params->sge_control2 = vals[0]; 900 } 901 902 params[0] = (FW_PARAMS_MNEM_V(FW_PARAMS_MNEM_REG) | 903 FW_PARAMS_PARAM_XYZ_V(SGE_INGRESS_RX_THRESHOLD_A)); 904 params[1] = (FW_PARAMS_MNEM_V(FW_PARAMS_MNEM_REG) | 905 FW_PARAMS_PARAM_XYZ_V(SGE_CONM_CTRL_A)); 906 v = t4vf_query_params(adapter, 2, params, vals); 907 if (v) 908 return v; 909 sge_params->sge_ingress_rx_threshold = vals[0]; 910 sge_params->sge_congestion_control = vals[1]; 911 912 /* For T5 and later we want to use the new BAR2 Doorbells. 913 * Unfortunately, older firmware didn't allow the this register to be 914 * read. 915 */ 916 if (!is_t4(adapter->params.chip)) { 917 unsigned int pf, s_hps, s_qpp; 918 919 params[0] = (FW_PARAMS_MNEM_V(FW_PARAMS_MNEM_REG) | 920 FW_PARAMS_PARAM_XYZ_V( 921 SGE_EGRESS_QUEUES_PER_PAGE_VF_A)); 922 params[1] = (FW_PARAMS_MNEM_V(FW_PARAMS_MNEM_REG) | 923 FW_PARAMS_PARAM_XYZ_V( 924 SGE_INGRESS_QUEUES_PER_PAGE_VF_A)); 925 v = t4vf_query_params(adapter, 2, params, vals); 926 if (v != FW_SUCCESS) { 927 dev_warn(adapter->pdev_dev, 928 "Unable to get VF SGE Queues/Page; " 929 "probably old firmware.\n"); 930 return v; 931 } 932 sge_params->sge_egress_queues_per_page = vals[0]; 933 sge_params->sge_ingress_queues_per_page = vals[1]; 934 935 /* We need the Queues/Page for our VF. This is based on the 936 * PF from which we're instantiated and is indexed in the 937 * register we just read. Do it once here so other code in 938 * the driver can just use it. 939 */ 940 pf = t4vf_get_pf_from_vf(adapter); 941 s_hps = (HOSTPAGESIZEPF0_S + 942 (HOSTPAGESIZEPF1_S - HOSTPAGESIZEPF0_S) * pf); 943 sge_params->sge_vf_hps = 944 ((sge_params->sge_host_page_size >> s_hps) 945 & HOSTPAGESIZEPF0_M); 946 947 s_qpp = (QUEUESPERPAGEPF0_S + 948 (QUEUESPERPAGEPF1_S - QUEUESPERPAGEPF0_S) * pf); 949 sge_params->sge_vf_eq_qpp = 950 ((sge_params->sge_egress_queues_per_page >> s_qpp) 951 & QUEUESPERPAGEPF0_M); 952 sge_params->sge_vf_iq_qpp = 953 ((sge_params->sge_ingress_queues_per_page >> s_qpp) 954 & QUEUESPERPAGEPF0_M); 955 } 956 957 return 0; 958 } 959 960 /** 961 * t4vf_get_vpd_params - retrieve device VPD paremeters 962 * @adapter: the adapter 963 * 964 * Retrives various device Vital Product Data parameters. The parameters 965 * are stored in @adapter->params.vpd. 966 */ 967 int t4vf_get_vpd_params(struct adapter *adapter) 968 { 969 struct vpd_params *vpd_params = &adapter->params.vpd; 970 u32 params[7], vals[7]; 971 int v; 972 973 params[0] = (FW_PARAMS_MNEM_V(FW_PARAMS_MNEM_DEV) | 974 FW_PARAMS_PARAM_X_V(FW_PARAMS_PARAM_DEV_CCLK)); 975 v = t4vf_query_params(adapter, 1, params, vals); 976 if (v) 977 return v; 978 vpd_params->cclk = vals[0]; 979 980 return 0; 981 } 982 983 /** 984 * t4vf_get_dev_params - retrieve device paremeters 985 * @adapter: the adapter 986 * 987 * Retrives various device parameters. The parameters are stored in 988 * @adapter->params.dev. 989 */ 990 int t4vf_get_dev_params(struct adapter *adapter) 991 { 992 struct dev_params *dev_params = &adapter->params.dev; 993 u32 params[7], vals[7]; 994 int v; 995 996 params[0] = (FW_PARAMS_MNEM_V(FW_PARAMS_MNEM_DEV) | 997 FW_PARAMS_PARAM_X_V(FW_PARAMS_PARAM_DEV_FWREV)); 998 params[1] = (FW_PARAMS_MNEM_V(FW_PARAMS_MNEM_DEV) | 999 FW_PARAMS_PARAM_X_V(FW_PARAMS_PARAM_DEV_TPREV)); 1000 v = t4vf_query_params(adapter, 2, params, vals); 1001 if (v) 1002 return v; 1003 dev_params->fwrev = vals[0]; 1004 dev_params->tprev = vals[1]; 1005 1006 return 0; 1007 } 1008 1009 /** 1010 * t4vf_get_rss_glb_config - retrieve adapter RSS Global Configuration 1011 * @adapter: the adapter 1012 * 1013 * Retrieves global RSS mode and parameters with which we have to live 1014 * and stores them in the @adapter's RSS parameters. 1015 */ 1016 int t4vf_get_rss_glb_config(struct adapter *adapter) 1017 { 1018 struct rss_params *rss = &adapter->params.rss; 1019 struct fw_rss_glb_config_cmd cmd, rpl; 1020 int v; 1021 1022 /* 1023 * Execute an RSS Global Configuration read command to retrieve 1024 * our RSS configuration. 1025 */ 1026 memset(&cmd, 0, sizeof(cmd)); 1027 cmd.op_to_write = cpu_to_be32(FW_CMD_OP_V(FW_RSS_GLB_CONFIG_CMD) | 1028 FW_CMD_REQUEST_F | 1029 FW_CMD_READ_F); 1030 cmd.retval_len16 = cpu_to_be32(FW_LEN16(cmd)); 1031 v = t4vf_wr_mbox(adapter, &cmd, sizeof(cmd), &rpl); 1032 if (v) 1033 return v; 1034 1035 /* 1036 * Transate the big-endian RSS Global Configuration into our 1037 * cpu-endian format based on the RSS mode. We also do first level 1038 * filtering at this point to weed out modes which don't support 1039 * VF Drivers ... 1040 */ 1041 rss->mode = FW_RSS_GLB_CONFIG_CMD_MODE_G( 1042 be32_to_cpu(rpl.u.manual.mode_pkd)); 1043 switch (rss->mode) { 1044 case FW_RSS_GLB_CONFIG_CMD_MODE_BASICVIRTUAL: { 1045 u32 word = be32_to_cpu( 1046 rpl.u.basicvirtual.synmapen_to_hashtoeplitz); 1047 1048 rss->u.basicvirtual.synmapen = 1049 ((word & FW_RSS_GLB_CONFIG_CMD_SYNMAPEN_F) != 0); 1050 rss->u.basicvirtual.syn4tupenipv6 = 1051 ((word & FW_RSS_GLB_CONFIG_CMD_SYN4TUPENIPV6_F) != 0); 1052 rss->u.basicvirtual.syn2tupenipv6 = 1053 ((word & FW_RSS_GLB_CONFIG_CMD_SYN2TUPENIPV6_F) != 0); 1054 rss->u.basicvirtual.syn4tupenipv4 = 1055 ((word & FW_RSS_GLB_CONFIG_CMD_SYN4TUPENIPV4_F) != 0); 1056 rss->u.basicvirtual.syn2tupenipv4 = 1057 ((word & FW_RSS_GLB_CONFIG_CMD_SYN2TUPENIPV4_F) != 0); 1058 1059 rss->u.basicvirtual.ofdmapen = 1060 ((word & FW_RSS_GLB_CONFIG_CMD_OFDMAPEN_F) != 0); 1061 1062 rss->u.basicvirtual.tnlmapen = 1063 ((word & FW_RSS_GLB_CONFIG_CMD_TNLMAPEN_F) != 0); 1064 rss->u.basicvirtual.tnlalllookup = 1065 ((word & FW_RSS_GLB_CONFIG_CMD_TNLALLLKP_F) != 0); 1066 1067 rss->u.basicvirtual.hashtoeplitz = 1068 ((word & FW_RSS_GLB_CONFIG_CMD_HASHTOEPLITZ_F) != 0); 1069 1070 /* we need at least Tunnel Map Enable to be set */ 1071 if (!rss->u.basicvirtual.tnlmapen) 1072 return -EINVAL; 1073 break; 1074 } 1075 1076 default: 1077 /* all unknown/unsupported RSS modes result in an error */ 1078 return -EINVAL; 1079 } 1080 1081 return 0; 1082 } 1083 1084 /** 1085 * t4vf_get_vfres - retrieve VF resource limits 1086 * @adapter: the adapter 1087 * 1088 * Retrieves configured resource limits and capabilities for a virtual 1089 * function. The results are stored in @adapter->vfres. 1090 */ 1091 int t4vf_get_vfres(struct adapter *adapter) 1092 { 1093 struct vf_resources *vfres = &adapter->params.vfres; 1094 struct fw_pfvf_cmd cmd, rpl; 1095 int v; 1096 u32 word; 1097 1098 /* 1099 * Execute PFVF Read command to get VF resource limits; bail out early 1100 * with error on command failure. 1101 */ 1102 memset(&cmd, 0, sizeof(cmd)); 1103 cmd.op_to_vfn = cpu_to_be32(FW_CMD_OP_V(FW_PFVF_CMD) | 1104 FW_CMD_REQUEST_F | 1105 FW_CMD_READ_F); 1106 cmd.retval_len16 = cpu_to_be32(FW_LEN16(cmd)); 1107 v = t4vf_wr_mbox(adapter, &cmd, sizeof(cmd), &rpl); 1108 if (v) 1109 return v; 1110 1111 /* 1112 * Extract VF resource limits and return success. 1113 */ 1114 word = be32_to_cpu(rpl.niqflint_niq); 1115 vfres->niqflint = FW_PFVF_CMD_NIQFLINT_G(word); 1116 vfres->niq = FW_PFVF_CMD_NIQ_G(word); 1117 1118 word = be32_to_cpu(rpl.type_to_neq); 1119 vfres->neq = FW_PFVF_CMD_NEQ_G(word); 1120 vfres->pmask = FW_PFVF_CMD_PMASK_G(word); 1121 1122 word = be32_to_cpu(rpl.tc_to_nexactf); 1123 vfres->tc = FW_PFVF_CMD_TC_G(word); 1124 vfres->nvi = FW_PFVF_CMD_NVI_G(word); 1125 vfres->nexactf = FW_PFVF_CMD_NEXACTF_G(word); 1126 1127 word = be32_to_cpu(rpl.r_caps_to_nethctrl); 1128 vfres->r_caps = FW_PFVF_CMD_R_CAPS_G(word); 1129 vfres->wx_caps = FW_PFVF_CMD_WX_CAPS_G(word); 1130 vfres->nethctrl = FW_PFVF_CMD_NETHCTRL_G(word); 1131 1132 return 0; 1133 } 1134 1135 /** 1136 * t4vf_read_rss_vi_config - read a VI's RSS configuration 1137 * @adapter: the adapter 1138 * @viid: Virtual Interface ID 1139 * @config: pointer to host-native VI RSS Configuration buffer 1140 * 1141 * Reads the Virtual Interface's RSS configuration information and 1142 * translates it into CPU-native format. 1143 */ 1144 int t4vf_read_rss_vi_config(struct adapter *adapter, unsigned int viid, 1145 union rss_vi_config *config) 1146 { 1147 struct fw_rss_vi_config_cmd cmd, rpl; 1148 int v; 1149 1150 memset(&cmd, 0, sizeof(cmd)); 1151 cmd.op_to_viid = cpu_to_be32(FW_CMD_OP_V(FW_RSS_VI_CONFIG_CMD) | 1152 FW_CMD_REQUEST_F | 1153 FW_CMD_READ_F | 1154 FW_RSS_VI_CONFIG_CMD_VIID(viid)); 1155 cmd.retval_len16 = cpu_to_be32(FW_LEN16(cmd)); 1156 v = t4vf_wr_mbox(adapter, &cmd, sizeof(cmd), &rpl); 1157 if (v) 1158 return v; 1159 1160 switch (adapter->params.rss.mode) { 1161 case FW_RSS_GLB_CONFIG_CMD_MODE_BASICVIRTUAL: { 1162 u32 word = be32_to_cpu(rpl.u.basicvirtual.defaultq_to_udpen); 1163 1164 config->basicvirtual.ip6fourtupen = 1165 ((word & FW_RSS_VI_CONFIG_CMD_IP6FOURTUPEN_F) != 0); 1166 config->basicvirtual.ip6twotupen = 1167 ((word & FW_RSS_VI_CONFIG_CMD_IP6TWOTUPEN_F) != 0); 1168 config->basicvirtual.ip4fourtupen = 1169 ((word & FW_RSS_VI_CONFIG_CMD_IP4FOURTUPEN_F) != 0); 1170 config->basicvirtual.ip4twotupen = 1171 ((word & FW_RSS_VI_CONFIG_CMD_IP4TWOTUPEN_F) != 0); 1172 config->basicvirtual.udpen = 1173 ((word & FW_RSS_VI_CONFIG_CMD_UDPEN_F) != 0); 1174 config->basicvirtual.defaultq = 1175 FW_RSS_VI_CONFIG_CMD_DEFAULTQ_G(word); 1176 break; 1177 } 1178 1179 default: 1180 return -EINVAL; 1181 } 1182 1183 return 0; 1184 } 1185 1186 /** 1187 * t4vf_write_rss_vi_config - write a VI's RSS configuration 1188 * @adapter: the adapter 1189 * @viid: Virtual Interface ID 1190 * @config: pointer to host-native VI RSS Configuration buffer 1191 * 1192 * Write the Virtual Interface's RSS configuration information 1193 * (translating it into firmware-native format before writing). 1194 */ 1195 int t4vf_write_rss_vi_config(struct adapter *adapter, unsigned int viid, 1196 union rss_vi_config *config) 1197 { 1198 struct fw_rss_vi_config_cmd cmd, rpl; 1199 1200 memset(&cmd, 0, sizeof(cmd)); 1201 cmd.op_to_viid = cpu_to_be32(FW_CMD_OP_V(FW_RSS_VI_CONFIG_CMD) | 1202 FW_CMD_REQUEST_F | 1203 FW_CMD_WRITE_F | 1204 FW_RSS_VI_CONFIG_CMD_VIID(viid)); 1205 cmd.retval_len16 = cpu_to_be32(FW_LEN16(cmd)); 1206 switch (adapter->params.rss.mode) { 1207 case FW_RSS_GLB_CONFIG_CMD_MODE_BASICVIRTUAL: { 1208 u32 word = 0; 1209 1210 if (config->basicvirtual.ip6fourtupen) 1211 word |= FW_RSS_VI_CONFIG_CMD_IP6FOURTUPEN_F; 1212 if (config->basicvirtual.ip6twotupen) 1213 word |= FW_RSS_VI_CONFIG_CMD_IP6TWOTUPEN_F; 1214 if (config->basicvirtual.ip4fourtupen) 1215 word |= FW_RSS_VI_CONFIG_CMD_IP4FOURTUPEN_F; 1216 if (config->basicvirtual.ip4twotupen) 1217 word |= FW_RSS_VI_CONFIG_CMD_IP4TWOTUPEN_F; 1218 if (config->basicvirtual.udpen) 1219 word |= FW_RSS_VI_CONFIG_CMD_UDPEN_F; 1220 word |= FW_RSS_VI_CONFIG_CMD_DEFAULTQ_V( 1221 config->basicvirtual.defaultq); 1222 cmd.u.basicvirtual.defaultq_to_udpen = cpu_to_be32(word); 1223 break; 1224 } 1225 1226 default: 1227 return -EINVAL; 1228 } 1229 1230 return t4vf_wr_mbox(adapter, &cmd, sizeof(cmd), &rpl); 1231 } 1232 1233 /** 1234 * t4vf_config_rss_range - configure a portion of the RSS mapping table 1235 * @adapter: the adapter 1236 * @viid: Virtual Interface of RSS Table Slice 1237 * @start: starting entry in the table to write 1238 * @n: how many table entries to write 1239 * @rspq: values for the "Response Queue" (Ingress Queue) lookup table 1240 * @nrspq: number of values in @rspq 1241 * 1242 * Programs the selected part of the VI's RSS mapping table with the 1243 * provided values. If @nrspq < @n the supplied values are used repeatedly 1244 * until the full table range is populated. 1245 * 1246 * The caller must ensure the values in @rspq are in the range 0..1023. 1247 */ 1248 int t4vf_config_rss_range(struct adapter *adapter, unsigned int viid, 1249 int start, int n, const u16 *rspq, int nrspq) 1250 { 1251 const u16 *rsp = rspq; 1252 const u16 *rsp_end = rspq+nrspq; 1253 struct fw_rss_ind_tbl_cmd cmd; 1254 1255 /* 1256 * Initialize firmware command template to write the RSS table. 1257 */ 1258 memset(&cmd, 0, sizeof(cmd)); 1259 cmd.op_to_viid = cpu_to_be32(FW_CMD_OP_V(FW_RSS_IND_TBL_CMD) | 1260 FW_CMD_REQUEST_F | 1261 FW_CMD_WRITE_F | 1262 FW_RSS_IND_TBL_CMD_VIID_V(viid)); 1263 cmd.retval_len16 = cpu_to_be32(FW_LEN16(cmd)); 1264 1265 /* 1266 * Each firmware RSS command can accommodate up to 32 RSS Ingress 1267 * Queue Identifiers. These Ingress Queue IDs are packed three to 1268 * a 32-bit word as 10-bit values with the upper remaining 2 bits 1269 * reserved. 1270 */ 1271 while (n > 0) { 1272 __be32 *qp = &cmd.iq0_to_iq2; 1273 int nq = min(n, 32); 1274 int ret; 1275 1276 /* 1277 * Set up the firmware RSS command header to send the next 1278 * "nq" Ingress Queue IDs to the firmware. 1279 */ 1280 cmd.niqid = cpu_to_be16(nq); 1281 cmd.startidx = cpu_to_be16(start); 1282 1283 /* 1284 * "nq" more done for the start of the next loop. 1285 */ 1286 start += nq; 1287 n -= nq; 1288 1289 /* 1290 * While there are still Ingress Queue IDs to stuff into the 1291 * current firmware RSS command, retrieve them from the 1292 * Ingress Queue ID array and insert them into the command. 1293 */ 1294 while (nq > 0) { 1295 /* 1296 * Grab up to the next 3 Ingress Queue IDs (wrapping 1297 * around the Ingress Queue ID array if necessary) and 1298 * insert them into the firmware RSS command at the 1299 * current 3-tuple position within the commad. 1300 */ 1301 u16 qbuf[3]; 1302 u16 *qbp = qbuf; 1303 int nqbuf = min(3, nq); 1304 1305 nq -= nqbuf; 1306 qbuf[0] = qbuf[1] = qbuf[2] = 0; 1307 while (nqbuf) { 1308 nqbuf--; 1309 *qbp++ = *rsp++; 1310 if (rsp >= rsp_end) 1311 rsp = rspq; 1312 } 1313 *qp++ = cpu_to_be32(FW_RSS_IND_TBL_CMD_IQ0_V(qbuf[0]) | 1314 FW_RSS_IND_TBL_CMD_IQ1_V(qbuf[1]) | 1315 FW_RSS_IND_TBL_CMD_IQ2_V(qbuf[2])); 1316 } 1317 1318 /* 1319 * Send this portion of the RRS table update to the firmware; 1320 * bail out on any errors. 1321 */ 1322 ret = t4vf_wr_mbox(adapter, &cmd, sizeof(cmd), NULL); 1323 if (ret) 1324 return ret; 1325 } 1326 return 0; 1327 } 1328 1329 /** 1330 * t4vf_alloc_vi - allocate a virtual interface on a port 1331 * @adapter: the adapter 1332 * @port_id: physical port associated with the VI 1333 * 1334 * Allocate a new Virtual Interface and bind it to the indicated 1335 * physical port. Return the new Virtual Interface Identifier on 1336 * success, or a [negative] error number on failure. 1337 */ 1338 int t4vf_alloc_vi(struct adapter *adapter, int port_id) 1339 { 1340 struct fw_vi_cmd cmd, rpl; 1341 int v; 1342 1343 /* 1344 * Execute a VI command to allocate Virtual Interface and return its 1345 * VIID. 1346 */ 1347 memset(&cmd, 0, sizeof(cmd)); 1348 cmd.op_to_vfn = cpu_to_be32(FW_CMD_OP_V(FW_VI_CMD) | 1349 FW_CMD_REQUEST_F | 1350 FW_CMD_WRITE_F | 1351 FW_CMD_EXEC_F); 1352 cmd.alloc_to_len16 = cpu_to_be32(FW_LEN16(cmd) | 1353 FW_VI_CMD_ALLOC_F); 1354 cmd.portid_pkd = FW_VI_CMD_PORTID_V(port_id); 1355 v = t4vf_wr_mbox(adapter, &cmd, sizeof(cmd), &rpl); 1356 if (v) 1357 return v; 1358 1359 return FW_VI_CMD_VIID_G(be16_to_cpu(rpl.type_viid)); 1360 } 1361 1362 /** 1363 * t4vf_free_vi -- free a virtual interface 1364 * @adapter: the adapter 1365 * @viid: the virtual interface identifier 1366 * 1367 * Free a previously allocated Virtual Interface. Return an error on 1368 * failure. 1369 */ 1370 int t4vf_free_vi(struct adapter *adapter, int viid) 1371 { 1372 struct fw_vi_cmd cmd; 1373 1374 /* 1375 * Execute a VI command to free the Virtual Interface. 1376 */ 1377 memset(&cmd, 0, sizeof(cmd)); 1378 cmd.op_to_vfn = cpu_to_be32(FW_CMD_OP_V(FW_VI_CMD) | 1379 FW_CMD_REQUEST_F | 1380 FW_CMD_EXEC_F); 1381 cmd.alloc_to_len16 = cpu_to_be32(FW_LEN16(cmd) | 1382 FW_VI_CMD_FREE_F); 1383 cmd.type_viid = cpu_to_be16(FW_VI_CMD_VIID_V(viid)); 1384 return t4vf_wr_mbox(adapter, &cmd, sizeof(cmd), NULL); 1385 } 1386 1387 /** 1388 * t4vf_enable_vi - enable/disable a virtual interface 1389 * @adapter: the adapter 1390 * @viid: the Virtual Interface ID 1391 * @rx_en: 1=enable Rx, 0=disable Rx 1392 * @tx_en: 1=enable Tx, 0=disable Tx 1393 * 1394 * Enables/disables a virtual interface. 1395 */ 1396 int t4vf_enable_vi(struct adapter *adapter, unsigned int viid, 1397 bool rx_en, bool tx_en) 1398 { 1399 struct fw_vi_enable_cmd cmd; 1400 1401 memset(&cmd, 0, sizeof(cmd)); 1402 cmd.op_to_viid = cpu_to_be32(FW_CMD_OP_V(FW_VI_ENABLE_CMD) | 1403 FW_CMD_REQUEST_F | 1404 FW_CMD_EXEC_F | 1405 FW_VI_ENABLE_CMD_VIID_V(viid)); 1406 cmd.ien_to_len16 = cpu_to_be32(FW_VI_ENABLE_CMD_IEN_V(rx_en) | 1407 FW_VI_ENABLE_CMD_EEN_V(tx_en) | 1408 FW_LEN16(cmd)); 1409 return t4vf_wr_mbox(adapter, &cmd, sizeof(cmd), NULL); 1410 } 1411 1412 /** 1413 * t4vf_enable_pi - enable/disable a Port's virtual interface 1414 * @adapter: the adapter 1415 * @pi: the Port Information structure 1416 * @rx_en: 1=enable Rx, 0=disable Rx 1417 * @tx_en: 1=enable Tx, 0=disable Tx 1418 * 1419 * Enables/disables a Port's virtual interface. If the Virtual 1420 * Interface enable/disable operation is successful, we notify the 1421 * OS-specific code of a potential Link Status change via the OS Contract 1422 * API t4vf_os_link_changed(). 1423 */ 1424 int t4vf_enable_pi(struct adapter *adapter, struct port_info *pi, 1425 bool rx_en, bool tx_en) 1426 { 1427 int ret = t4vf_enable_vi(adapter, pi->viid, rx_en, tx_en); 1428 1429 if (ret) 1430 return ret; 1431 t4vf_os_link_changed(adapter, pi->pidx, 1432 rx_en && tx_en && pi->link_cfg.link_ok); 1433 return 0; 1434 } 1435 1436 /** 1437 * t4vf_identify_port - identify a VI's port by blinking its LED 1438 * @adapter: the adapter 1439 * @viid: the Virtual Interface ID 1440 * @nblinks: how many times to blink LED at 2.5 Hz 1441 * 1442 * Identifies a VI's port by blinking its LED. 1443 */ 1444 int t4vf_identify_port(struct adapter *adapter, unsigned int viid, 1445 unsigned int nblinks) 1446 { 1447 struct fw_vi_enable_cmd cmd; 1448 1449 memset(&cmd, 0, sizeof(cmd)); 1450 cmd.op_to_viid = cpu_to_be32(FW_CMD_OP_V(FW_VI_ENABLE_CMD) | 1451 FW_CMD_REQUEST_F | 1452 FW_CMD_EXEC_F | 1453 FW_VI_ENABLE_CMD_VIID_V(viid)); 1454 cmd.ien_to_len16 = cpu_to_be32(FW_VI_ENABLE_CMD_LED_F | 1455 FW_LEN16(cmd)); 1456 cmd.blinkdur = cpu_to_be16(nblinks); 1457 return t4vf_wr_mbox(adapter, &cmd, sizeof(cmd), NULL); 1458 } 1459 1460 /** 1461 * t4vf_set_rxmode - set Rx properties of a virtual interface 1462 * @adapter: the adapter 1463 * @viid: the VI id 1464 * @mtu: the new MTU or -1 for no change 1465 * @promisc: 1 to enable promiscuous mode, 0 to disable it, -1 no change 1466 * @all_multi: 1 to enable all-multi mode, 0 to disable it, -1 no change 1467 * @bcast: 1 to enable broadcast Rx, 0 to disable it, -1 no change 1468 * @vlanex: 1 to enable hardware VLAN Tag extraction, 0 to disable it, 1469 * -1 no change 1470 * 1471 * Sets Rx properties of a virtual interface. 1472 */ 1473 int t4vf_set_rxmode(struct adapter *adapter, unsigned int viid, 1474 int mtu, int promisc, int all_multi, int bcast, int vlanex, 1475 bool sleep_ok) 1476 { 1477 struct fw_vi_rxmode_cmd cmd; 1478 1479 /* convert to FW values */ 1480 if (mtu < 0) 1481 mtu = FW_VI_RXMODE_CMD_MTU_M; 1482 if (promisc < 0) 1483 promisc = FW_VI_RXMODE_CMD_PROMISCEN_M; 1484 if (all_multi < 0) 1485 all_multi = FW_VI_RXMODE_CMD_ALLMULTIEN_M; 1486 if (bcast < 0) 1487 bcast = FW_VI_RXMODE_CMD_BROADCASTEN_M; 1488 if (vlanex < 0) 1489 vlanex = FW_VI_RXMODE_CMD_VLANEXEN_M; 1490 1491 memset(&cmd, 0, sizeof(cmd)); 1492 cmd.op_to_viid = cpu_to_be32(FW_CMD_OP_V(FW_VI_RXMODE_CMD) | 1493 FW_CMD_REQUEST_F | 1494 FW_CMD_WRITE_F | 1495 FW_VI_RXMODE_CMD_VIID_V(viid)); 1496 cmd.retval_len16 = cpu_to_be32(FW_LEN16(cmd)); 1497 cmd.mtu_to_vlanexen = 1498 cpu_to_be32(FW_VI_RXMODE_CMD_MTU_V(mtu) | 1499 FW_VI_RXMODE_CMD_PROMISCEN_V(promisc) | 1500 FW_VI_RXMODE_CMD_ALLMULTIEN_V(all_multi) | 1501 FW_VI_RXMODE_CMD_BROADCASTEN_V(bcast) | 1502 FW_VI_RXMODE_CMD_VLANEXEN_V(vlanex)); 1503 return t4vf_wr_mbox_core(adapter, &cmd, sizeof(cmd), NULL, sleep_ok); 1504 } 1505 1506 /** 1507 * t4vf_alloc_mac_filt - allocates exact-match filters for MAC addresses 1508 * @adapter: the adapter 1509 * @viid: the Virtual Interface Identifier 1510 * @free: if true any existing filters for this VI id are first removed 1511 * @naddr: the number of MAC addresses to allocate filters for (up to 7) 1512 * @addr: the MAC address(es) 1513 * @idx: where to store the index of each allocated filter 1514 * @hash: pointer to hash address filter bitmap 1515 * @sleep_ok: call is allowed to sleep 1516 * 1517 * Allocates an exact-match filter for each of the supplied addresses and 1518 * sets it to the corresponding address. If @idx is not %NULL it should 1519 * have at least @naddr entries, each of which will be set to the index of 1520 * the filter allocated for the corresponding MAC address. If a filter 1521 * could not be allocated for an address its index is set to 0xffff. 1522 * If @hash is not %NULL addresses that fail to allocate an exact filter 1523 * are hashed and update the hash filter bitmap pointed at by @hash. 1524 * 1525 * Returns a negative error number or the number of filters allocated. 1526 */ 1527 int t4vf_alloc_mac_filt(struct adapter *adapter, unsigned int viid, bool free, 1528 unsigned int naddr, const u8 **addr, u16 *idx, 1529 u64 *hash, bool sleep_ok) 1530 { 1531 int offset, ret = 0; 1532 unsigned nfilters = 0; 1533 unsigned int rem = naddr; 1534 struct fw_vi_mac_cmd cmd, rpl; 1535 unsigned int max_naddr = adapter->params.arch.mps_tcam_size; 1536 1537 if (naddr > max_naddr) 1538 return -EINVAL; 1539 1540 for (offset = 0; offset < naddr; /**/) { 1541 unsigned int fw_naddr = (rem < ARRAY_SIZE(cmd.u.exact) 1542 ? rem 1543 : ARRAY_SIZE(cmd.u.exact)); 1544 size_t len16 = DIV_ROUND_UP(offsetof(struct fw_vi_mac_cmd, 1545 u.exact[fw_naddr]), 16); 1546 struct fw_vi_mac_exact *p; 1547 int i; 1548 1549 memset(&cmd, 0, sizeof(cmd)); 1550 cmd.op_to_viid = cpu_to_be32(FW_CMD_OP_V(FW_VI_MAC_CMD) | 1551 FW_CMD_REQUEST_F | 1552 FW_CMD_WRITE_F | 1553 (free ? FW_CMD_EXEC_F : 0) | 1554 FW_VI_MAC_CMD_VIID_V(viid)); 1555 cmd.freemacs_to_len16 = 1556 cpu_to_be32(FW_VI_MAC_CMD_FREEMACS_V(free) | 1557 FW_CMD_LEN16_V(len16)); 1558 1559 for (i = 0, p = cmd.u.exact; i < fw_naddr; i++, p++) { 1560 p->valid_to_idx = cpu_to_be16( 1561 FW_VI_MAC_CMD_VALID_F | 1562 FW_VI_MAC_CMD_IDX_V(FW_VI_MAC_ADD_MAC)); 1563 memcpy(p->macaddr, addr[offset+i], sizeof(p->macaddr)); 1564 } 1565 1566 1567 ret = t4vf_wr_mbox_core(adapter, &cmd, sizeof(cmd), &rpl, 1568 sleep_ok); 1569 if (ret && ret != -ENOMEM) 1570 break; 1571 1572 for (i = 0, p = rpl.u.exact; i < fw_naddr; i++, p++) { 1573 u16 index = FW_VI_MAC_CMD_IDX_G( 1574 be16_to_cpu(p->valid_to_idx)); 1575 1576 if (idx) 1577 idx[offset+i] = 1578 (index >= max_naddr 1579 ? 0xffff 1580 : index); 1581 if (index < max_naddr) 1582 nfilters++; 1583 else if (hash) 1584 *hash |= (1ULL << hash_mac_addr(addr[offset+i])); 1585 } 1586 1587 free = false; 1588 offset += fw_naddr; 1589 rem -= fw_naddr; 1590 } 1591 1592 /* 1593 * If there were no errors or we merely ran out of room in our MAC 1594 * address arena, return the number of filters actually written. 1595 */ 1596 if (ret == 0 || ret == -ENOMEM) 1597 ret = nfilters; 1598 return ret; 1599 } 1600 1601 /** 1602 * t4vf_free_mac_filt - frees exact-match filters of given MAC addresses 1603 * @adapter: the adapter 1604 * @viid: the VI id 1605 * @naddr: the number of MAC addresses to allocate filters for (up to 7) 1606 * @addr: the MAC address(es) 1607 * @sleep_ok: call is allowed to sleep 1608 * 1609 * Frees the exact-match filter for each of the supplied addresses 1610 * 1611 * Returns a negative error number or the number of filters freed. 1612 */ 1613 int t4vf_free_mac_filt(struct adapter *adapter, unsigned int viid, 1614 unsigned int naddr, const u8 **addr, bool sleep_ok) 1615 { 1616 int offset, ret = 0; 1617 struct fw_vi_mac_cmd cmd; 1618 unsigned int nfilters = 0; 1619 unsigned int max_naddr = adapter->params.arch.mps_tcam_size; 1620 unsigned int rem = naddr; 1621 1622 if (naddr > max_naddr) 1623 return -EINVAL; 1624 1625 for (offset = 0; offset < (int)naddr ; /**/) { 1626 unsigned int fw_naddr = (rem < ARRAY_SIZE(cmd.u.exact) ? 1627 rem : ARRAY_SIZE(cmd.u.exact)); 1628 size_t len16 = DIV_ROUND_UP(offsetof(struct fw_vi_mac_cmd, 1629 u.exact[fw_naddr]), 16); 1630 struct fw_vi_mac_exact *p; 1631 int i; 1632 1633 memset(&cmd, 0, sizeof(cmd)); 1634 cmd.op_to_viid = cpu_to_be32(FW_CMD_OP_V(FW_VI_MAC_CMD) | 1635 FW_CMD_REQUEST_F | 1636 FW_CMD_WRITE_F | 1637 FW_CMD_EXEC_V(0) | 1638 FW_VI_MAC_CMD_VIID_V(viid)); 1639 cmd.freemacs_to_len16 = 1640 cpu_to_be32(FW_VI_MAC_CMD_FREEMACS_V(0) | 1641 FW_CMD_LEN16_V(len16)); 1642 1643 for (i = 0, p = cmd.u.exact; i < (int)fw_naddr; i++, p++) { 1644 p->valid_to_idx = cpu_to_be16( 1645 FW_VI_MAC_CMD_VALID_F | 1646 FW_VI_MAC_CMD_IDX_V(FW_VI_MAC_MAC_BASED_FREE)); 1647 memcpy(p->macaddr, addr[offset+i], sizeof(p->macaddr)); 1648 } 1649 1650 ret = t4vf_wr_mbox_core(adapter, &cmd, sizeof(cmd), &cmd, 1651 sleep_ok); 1652 if (ret) 1653 break; 1654 1655 for (i = 0, p = cmd.u.exact; i < fw_naddr; i++, p++) { 1656 u16 index = FW_VI_MAC_CMD_IDX_G( 1657 be16_to_cpu(p->valid_to_idx)); 1658 1659 if (index < max_naddr) 1660 nfilters++; 1661 } 1662 1663 offset += fw_naddr; 1664 rem -= fw_naddr; 1665 } 1666 1667 if (ret == 0) 1668 ret = nfilters; 1669 return ret; 1670 } 1671 1672 /** 1673 * t4vf_change_mac - modifies the exact-match filter for a MAC address 1674 * @adapter: the adapter 1675 * @viid: the Virtual Interface ID 1676 * @idx: index of existing filter for old value of MAC address, or -1 1677 * @addr: the new MAC address value 1678 * @persist: if idx < 0, the new MAC allocation should be persistent 1679 * 1680 * Modifies an exact-match filter and sets it to the new MAC address. 1681 * Note that in general it is not possible to modify the value of a given 1682 * filter so the generic way to modify an address filter is to free the 1683 * one being used by the old address value and allocate a new filter for 1684 * the new address value. @idx can be -1 if the address is a new 1685 * addition. 1686 * 1687 * Returns a negative error number or the index of the filter with the new 1688 * MAC value. 1689 */ 1690 int t4vf_change_mac(struct adapter *adapter, unsigned int viid, 1691 int idx, const u8 *addr, bool persist) 1692 { 1693 int ret; 1694 struct fw_vi_mac_cmd cmd, rpl; 1695 struct fw_vi_mac_exact *p = &cmd.u.exact[0]; 1696 size_t len16 = DIV_ROUND_UP(offsetof(struct fw_vi_mac_cmd, 1697 u.exact[1]), 16); 1698 unsigned int max_mac_addr = adapter->params.arch.mps_tcam_size; 1699 1700 /* 1701 * If this is a new allocation, determine whether it should be 1702 * persistent (across a "freemacs" operation) or not. 1703 */ 1704 if (idx < 0) 1705 idx = persist ? FW_VI_MAC_ADD_PERSIST_MAC : FW_VI_MAC_ADD_MAC; 1706 1707 memset(&cmd, 0, sizeof(cmd)); 1708 cmd.op_to_viid = cpu_to_be32(FW_CMD_OP_V(FW_VI_MAC_CMD) | 1709 FW_CMD_REQUEST_F | 1710 FW_CMD_WRITE_F | 1711 FW_VI_MAC_CMD_VIID_V(viid)); 1712 cmd.freemacs_to_len16 = cpu_to_be32(FW_CMD_LEN16_V(len16)); 1713 p->valid_to_idx = cpu_to_be16(FW_VI_MAC_CMD_VALID_F | 1714 FW_VI_MAC_CMD_IDX_V(idx)); 1715 memcpy(p->macaddr, addr, sizeof(p->macaddr)); 1716 1717 ret = t4vf_wr_mbox(adapter, &cmd, sizeof(cmd), &rpl); 1718 if (ret == 0) { 1719 p = &rpl.u.exact[0]; 1720 ret = FW_VI_MAC_CMD_IDX_G(be16_to_cpu(p->valid_to_idx)); 1721 if (ret >= max_mac_addr) 1722 ret = -ENOMEM; 1723 } 1724 return ret; 1725 } 1726 1727 /** 1728 * t4vf_set_addr_hash - program the MAC inexact-match hash filter 1729 * @adapter: the adapter 1730 * @viid: the Virtual Interface Identifier 1731 * @ucast: whether the hash filter should also match unicast addresses 1732 * @vec: the value to be written to the hash filter 1733 * @sleep_ok: call is allowed to sleep 1734 * 1735 * Sets the 64-bit inexact-match hash filter for a virtual interface. 1736 */ 1737 int t4vf_set_addr_hash(struct adapter *adapter, unsigned int viid, 1738 bool ucast, u64 vec, bool sleep_ok) 1739 { 1740 struct fw_vi_mac_cmd cmd; 1741 size_t len16 = DIV_ROUND_UP(offsetof(struct fw_vi_mac_cmd, 1742 u.exact[0]), 16); 1743 1744 memset(&cmd, 0, sizeof(cmd)); 1745 cmd.op_to_viid = cpu_to_be32(FW_CMD_OP_V(FW_VI_MAC_CMD) | 1746 FW_CMD_REQUEST_F | 1747 FW_CMD_WRITE_F | 1748 FW_VI_ENABLE_CMD_VIID_V(viid)); 1749 cmd.freemacs_to_len16 = cpu_to_be32(FW_VI_MAC_CMD_HASHVECEN_F | 1750 FW_VI_MAC_CMD_HASHUNIEN_V(ucast) | 1751 FW_CMD_LEN16_V(len16)); 1752 cmd.u.hash.hashvec = cpu_to_be64(vec); 1753 return t4vf_wr_mbox_core(adapter, &cmd, sizeof(cmd), NULL, sleep_ok); 1754 } 1755 1756 /** 1757 * t4vf_get_port_stats - collect "port" statistics 1758 * @adapter: the adapter 1759 * @pidx: the port index 1760 * @s: the stats structure to fill 1761 * 1762 * Collect statistics for the "port"'s Virtual Interface. 1763 */ 1764 int t4vf_get_port_stats(struct adapter *adapter, int pidx, 1765 struct t4vf_port_stats *s) 1766 { 1767 struct port_info *pi = adap2pinfo(adapter, pidx); 1768 struct fw_vi_stats_vf fwstats; 1769 unsigned int rem = VI_VF_NUM_STATS; 1770 __be64 *fwsp = (__be64 *)&fwstats; 1771 1772 /* 1773 * Grab the Virtual Interface statistics a chunk at a time via mailbox 1774 * commands. We could use a Work Request and get all of them at once 1775 * but that's an asynchronous interface which is awkward to use. 1776 */ 1777 while (rem) { 1778 unsigned int ix = VI_VF_NUM_STATS - rem; 1779 unsigned int nstats = min(6U, rem); 1780 struct fw_vi_stats_cmd cmd, rpl; 1781 size_t len = (offsetof(struct fw_vi_stats_cmd, u) + 1782 sizeof(struct fw_vi_stats_ctl)); 1783 size_t len16 = DIV_ROUND_UP(len, 16); 1784 int ret; 1785 1786 memset(&cmd, 0, sizeof(cmd)); 1787 cmd.op_to_viid = cpu_to_be32(FW_CMD_OP_V(FW_VI_STATS_CMD) | 1788 FW_VI_STATS_CMD_VIID_V(pi->viid) | 1789 FW_CMD_REQUEST_F | 1790 FW_CMD_READ_F); 1791 cmd.retval_len16 = cpu_to_be32(FW_CMD_LEN16_V(len16)); 1792 cmd.u.ctl.nstats_ix = 1793 cpu_to_be16(FW_VI_STATS_CMD_IX_V(ix) | 1794 FW_VI_STATS_CMD_NSTATS_V(nstats)); 1795 ret = t4vf_wr_mbox_ns(adapter, &cmd, len, &rpl); 1796 if (ret) 1797 return ret; 1798 1799 memcpy(fwsp, &rpl.u.ctl.stat0, sizeof(__be64) * nstats); 1800 1801 rem -= nstats; 1802 fwsp += nstats; 1803 } 1804 1805 /* 1806 * Translate firmware statistics into host native statistics. 1807 */ 1808 s->tx_bcast_bytes = be64_to_cpu(fwstats.tx_bcast_bytes); 1809 s->tx_bcast_frames = be64_to_cpu(fwstats.tx_bcast_frames); 1810 s->tx_mcast_bytes = be64_to_cpu(fwstats.tx_mcast_bytes); 1811 s->tx_mcast_frames = be64_to_cpu(fwstats.tx_mcast_frames); 1812 s->tx_ucast_bytes = be64_to_cpu(fwstats.tx_ucast_bytes); 1813 s->tx_ucast_frames = be64_to_cpu(fwstats.tx_ucast_frames); 1814 s->tx_drop_frames = be64_to_cpu(fwstats.tx_drop_frames); 1815 s->tx_offload_bytes = be64_to_cpu(fwstats.tx_offload_bytes); 1816 s->tx_offload_frames = be64_to_cpu(fwstats.tx_offload_frames); 1817 1818 s->rx_bcast_bytes = be64_to_cpu(fwstats.rx_bcast_bytes); 1819 s->rx_bcast_frames = be64_to_cpu(fwstats.rx_bcast_frames); 1820 s->rx_mcast_bytes = be64_to_cpu(fwstats.rx_mcast_bytes); 1821 s->rx_mcast_frames = be64_to_cpu(fwstats.rx_mcast_frames); 1822 s->rx_ucast_bytes = be64_to_cpu(fwstats.rx_ucast_bytes); 1823 s->rx_ucast_frames = be64_to_cpu(fwstats.rx_ucast_frames); 1824 1825 s->rx_err_frames = be64_to_cpu(fwstats.rx_err_frames); 1826 1827 return 0; 1828 } 1829 1830 /** 1831 * t4vf_iq_free - free an ingress queue and its free lists 1832 * @adapter: the adapter 1833 * @iqtype: the ingress queue type (FW_IQ_TYPE_FL_INT_CAP, etc.) 1834 * @iqid: ingress queue ID 1835 * @fl0id: FL0 queue ID or 0xffff if no attached FL0 1836 * @fl1id: FL1 queue ID or 0xffff if no attached FL1 1837 * 1838 * Frees an ingress queue and its associated free lists, if any. 1839 */ 1840 int t4vf_iq_free(struct adapter *adapter, unsigned int iqtype, 1841 unsigned int iqid, unsigned int fl0id, unsigned int fl1id) 1842 { 1843 struct fw_iq_cmd cmd; 1844 1845 memset(&cmd, 0, sizeof(cmd)); 1846 cmd.op_to_vfn = cpu_to_be32(FW_CMD_OP_V(FW_IQ_CMD) | 1847 FW_CMD_REQUEST_F | 1848 FW_CMD_EXEC_F); 1849 cmd.alloc_to_len16 = cpu_to_be32(FW_IQ_CMD_FREE_F | 1850 FW_LEN16(cmd)); 1851 cmd.type_to_iqandstindex = 1852 cpu_to_be32(FW_IQ_CMD_TYPE_V(iqtype)); 1853 1854 cmd.iqid = cpu_to_be16(iqid); 1855 cmd.fl0id = cpu_to_be16(fl0id); 1856 cmd.fl1id = cpu_to_be16(fl1id); 1857 return t4vf_wr_mbox(adapter, &cmd, sizeof(cmd), NULL); 1858 } 1859 1860 /** 1861 * t4vf_eth_eq_free - free an Ethernet egress queue 1862 * @adapter: the adapter 1863 * @eqid: egress queue ID 1864 * 1865 * Frees an Ethernet egress queue. 1866 */ 1867 int t4vf_eth_eq_free(struct adapter *adapter, unsigned int eqid) 1868 { 1869 struct fw_eq_eth_cmd cmd; 1870 1871 memset(&cmd, 0, sizeof(cmd)); 1872 cmd.op_to_vfn = cpu_to_be32(FW_CMD_OP_V(FW_EQ_ETH_CMD) | 1873 FW_CMD_REQUEST_F | 1874 FW_CMD_EXEC_F); 1875 cmd.alloc_to_len16 = cpu_to_be32(FW_EQ_ETH_CMD_FREE_F | 1876 FW_LEN16(cmd)); 1877 cmd.eqid_pkd = cpu_to_be32(FW_EQ_ETH_CMD_EQID_V(eqid)); 1878 return t4vf_wr_mbox(adapter, &cmd, sizeof(cmd), NULL); 1879 } 1880 1881 /** 1882 * t4vf_link_down_rc_str - return a string for a Link Down Reason Code 1883 * @link_down_rc: Link Down Reason Code 1884 * 1885 * Returns a string representation of the Link Down Reason Code. 1886 */ 1887 static const char *t4vf_link_down_rc_str(unsigned char link_down_rc) 1888 { 1889 static const char * const reason[] = { 1890 "Link Down", 1891 "Remote Fault", 1892 "Auto-negotiation Failure", 1893 "Reserved", 1894 "Insufficient Airflow", 1895 "Unable To Determine Reason", 1896 "No RX Signal Detected", 1897 "Reserved", 1898 }; 1899 1900 if (link_down_rc >= ARRAY_SIZE(reason)) 1901 return "Bad Reason Code"; 1902 1903 return reason[link_down_rc]; 1904 } 1905 1906 /** 1907 * t4vf_handle_get_port_info - process a FW reply message 1908 * @pi: the port info 1909 * @rpl: start of the FW message 1910 * 1911 * Processes a GET_PORT_INFO FW reply message. 1912 */ 1913 static void t4vf_handle_get_port_info(struct port_info *pi, 1914 const struct fw_port_cmd *cmd) 1915 { 1916 int action = FW_PORT_CMD_ACTION_G(be32_to_cpu(cmd->action_to_len16)); 1917 struct adapter *adapter = pi->adapter; 1918 struct link_config *lc = &pi->link_cfg; 1919 int link_ok, linkdnrc; 1920 enum fw_port_type port_type; 1921 enum fw_port_module_type mod_type; 1922 unsigned int speed, fc, fec; 1923 fw_port_cap32_t pcaps, acaps, lpacaps, linkattr; 1924 1925 /* Extract the various fields from the Port Information message. */ 1926 switch (action) { 1927 case FW_PORT_ACTION_GET_PORT_INFO: { 1928 u32 lstatus = be32_to_cpu(cmd->u.info.lstatus_to_modtype); 1929 1930 link_ok = (lstatus & FW_PORT_CMD_LSTATUS_F) != 0; 1931 linkdnrc = FW_PORT_CMD_LINKDNRC_G(lstatus); 1932 port_type = FW_PORT_CMD_PTYPE_G(lstatus); 1933 mod_type = FW_PORT_CMD_MODTYPE_G(lstatus); 1934 pcaps = fwcaps16_to_caps32(be16_to_cpu(cmd->u.info.pcap)); 1935 acaps = fwcaps16_to_caps32(be16_to_cpu(cmd->u.info.acap)); 1936 lpacaps = fwcaps16_to_caps32(be16_to_cpu(cmd->u.info.lpacap)); 1937 1938 /* Unfortunately the format of the Link Status in the old 1939 * 16-bit Port Information message isn't the same as the 1940 * 16-bit Port Capabilities bitfield used everywhere else ... 1941 */ 1942 linkattr = 0; 1943 if (lstatus & FW_PORT_CMD_RXPAUSE_F) 1944 linkattr |= FW_PORT_CAP32_FC_RX; 1945 if (lstatus & FW_PORT_CMD_TXPAUSE_F) 1946 linkattr |= FW_PORT_CAP32_FC_TX; 1947 if (lstatus & FW_PORT_CMD_LSPEED_V(FW_PORT_CAP_SPEED_100M)) 1948 linkattr |= FW_PORT_CAP32_SPEED_100M; 1949 if (lstatus & FW_PORT_CMD_LSPEED_V(FW_PORT_CAP_SPEED_1G)) 1950 linkattr |= FW_PORT_CAP32_SPEED_1G; 1951 if (lstatus & FW_PORT_CMD_LSPEED_V(FW_PORT_CAP_SPEED_10G)) 1952 linkattr |= FW_PORT_CAP32_SPEED_10G; 1953 if (lstatus & FW_PORT_CMD_LSPEED_V(FW_PORT_CAP_SPEED_25G)) 1954 linkattr |= FW_PORT_CAP32_SPEED_25G; 1955 if (lstatus & FW_PORT_CMD_LSPEED_V(FW_PORT_CAP_SPEED_40G)) 1956 linkattr |= FW_PORT_CAP32_SPEED_40G; 1957 if (lstatus & FW_PORT_CMD_LSPEED_V(FW_PORT_CAP_SPEED_100G)) 1958 linkattr |= FW_PORT_CAP32_SPEED_100G; 1959 1960 break; 1961 } 1962 1963 case FW_PORT_ACTION_GET_PORT_INFO32: { 1964 u32 lstatus32; 1965 1966 lstatus32 = be32_to_cpu(cmd->u.info32.lstatus32_to_cbllen32); 1967 link_ok = (lstatus32 & FW_PORT_CMD_LSTATUS32_F) != 0; 1968 linkdnrc = FW_PORT_CMD_LINKDNRC32_G(lstatus32); 1969 port_type = FW_PORT_CMD_PORTTYPE32_G(lstatus32); 1970 mod_type = FW_PORT_CMD_MODTYPE32_G(lstatus32); 1971 pcaps = be32_to_cpu(cmd->u.info32.pcaps32); 1972 acaps = be32_to_cpu(cmd->u.info32.acaps32); 1973 lpacaps = be32_to_cpu(cmd->u.info32.lpacaps32); 1974 linkattr = be32_to_cpu(cmd->u.info32.linkattr32); 1975 break; 1976 } 1977 1978 default: 1979 dev_err(adapter->pdev_dev, "Handle Port Information: Bad Command/Action %#x\n", 1980 be32_to_cpu(cmd->action_to_len16)); 1981 return; 1982 } 1983 1984 fec = fwcap_to_cc_fec(acaps); 1985 fc = fwcap_to_cc_pause(linkattr); 1986 speed = fwcap_to_speed(linkattr); 1987 1988 if (mod_type != pi->mod_type) { 1989 /* When a new Transceiver Module is inserted, the Firmware 1990 * will examine any Forward Error Correction parameters 1991 * present in the Transceiver Module i2c EPROM and determine 1992 * the supported and recommended FEC settings from those 1993 * based on IEEE 802.3 standards. We always record the 1994 * IEEE 802.3 recommended "automatic" settings. 1995 */ 1996 lc->auto_fec = fec; 1997 1998 /* Some versions of the early T6 Firmware "cheated" when 1999 * handling different Transceiver Modules by changing the 2000 * underlaying Port Type reported to the Host Drivers. As 2001 * such we need to capture whatever Port Type the Firmware 2002 * sends us and record it in case it's different from what we 2003 * were told earlier. Unfortunately, since Firmware is 2004 * forever, we'll need to keep this code here forever, but in 2005 * later T6 Firmware it should just be an assignment of the 2006 * same value already recorded. 2007 */ 2008 pi->port_type = port_type; 2009 2010 pi->mod_type = mod_type; 2011 t4vf_os_portmod_changed(adapter, pi->pidx); 2012 } 2013 2014 if (link_ok != lc->link_ok || speed != lc->speed || 2015 fc != lc->fc || fec != lc->fec) { /* something changed */ 2016 if (!link_ok && lc->link_ok) { 2017 lc->link_down_rc = linkdnrc; 2018 dev_warn_ratelimited(adapter->pdev_dev, 2019 "Port %d link down, reason: %s\n", 2020 pi->port_id, 2021 t4vf_link_down_rc_str(linkdnrc)); 2022 } 2023 lc->link_ok = link_ok; 2024 lc->speed = speed; 2025 lc->fc = fc; 2026 lc->fec = fec; 2027 2028 lc->pcaps = pcaps; 2029 lc->lpacaps = lpacaps; 2030 lc->acaps = acaps & ADVERT_MASK; 2031 2032 /* If we're not physically capable of Auto-Negotiation, note 2033 * this as Auto-Negotiation disabled. Otherwise, we track 2034 * what Auto-Negotiation settings we have. Note parallel 2035 * structure in init_link_config(). 2036 */ 2037 if (!(lc->pcaps & FW_PORT_CAP32_ANEG)) { 2038 lc->autoneg = AUTONEG_DISABLE; 2039 } else if (lc->acaps & FW_PORT_CAP32_ANEG) { 2040 lc->autoneg = AUTONEG_ENABLE; 2041 } else { 2042 /* When Autoneg is disabled, user needs to set 2043 * single speed. 2044 * Similar to cxgb4_ethtool.c: set_link_ksettings 2045 */ 2046 lc->acaps = 0; 2047 lc->speed_caps = fwcap_to_speed(acaps); 2048 lc->autoneg = AUTONEG_DISABLE; 2049 } 2050 2051 t4vf_os_link_changed(adapter, pi->pidx, link_ok); 2052 } 2053 } 2054 2055 /** 2056 * t4vf_update_port_info - retrieve and update port information if changed 2057 * @pi: the port_info 2058 * 2059 * We issue a Get Port Information Command to the Firmware and, if 2060 * successful, we check to see if anything is different from what we 2061 * last recorded and update things accordingly. 2062 */ 2063 int t4vf_update_port_info(struct port_info *pi) 2064 { 2065 unsigned int fw_caps = pi->adapter->params.fw_caps_support; 2066 struct fw_port_cmd port_cmd; 2067 int ret; 2068 2069 memset(&port_cmd, 0, sizeof(port_cmd)); 2070 port_cmd.op_to_portid = cpu_to_be32(FW_CMD_OP_V(FW_PORT_CMD) | 2071 FW_CMD_REQUEST_F | FW_CMD_READ_F | 2072 FW_PORT_CMD_PORTID_V(pi->port_id)); 2073 port_cmd.action_to_len16 = cpu_to_be32( 2074 FW_PORT_CMD_ACTION_V(fw_caps == FW_CAPS16 2075 ? FW_PORT_ACTION_GET_PORT_INFO 2076 : FW_PORT_ACTION_GET_PORT_INFO32) | 2077 FW_LEN16(port_cmd)); 2078 ret = t4vf_wr_mbox(pi->adapter, &port_cmd, sizeof(port_cmd), 2079 &port_cmd); 2080 if (ret) 2081 return ret; 2082 t4vf_handle_get_port_info(pi, &port_cmd); 2083 return 0; 2084 } 2085 2086 /** 2087 * t4vf_handle_fw_rpl - process a firmware reply message 2088 * @adapter: the adapter 2089 * @rpl: start of the firmware message 2090 * 2091 * Processes a firmware message, such as link state change messages. 2092 */ 2093 int t4vf_handle_fw_rpl(struct adapter *adapter, const __be64 *rpl) 2094 { 2095 const struct fw_cmd_hdr *cmd_hdr = (const struct fw_cmd_hdr *)rpl; 2096 u8 opcode = FW_CMD_OP_G(be32_to_cpu(cmd_hdr->hi)); 2097 2098 switch (opcode) { 2099 case FW_PORT_CMD: { 2100 /* 2101 * Link/module state change message. 2102 */ 2103 const struct fw_port_cmd *port_cmd = 2104 (const struct fw_port_cmd *)rpl; 2105 int action = FW_PORT_CMD_ACTION_G( 2106 be32_to_cpu(port_cmd->action_to_len16)); 2107 int port_id, pidx; 2108 2109 if (action != FW_PORT_ACTION_GET_PORT_INFO && 2110 action != FW_PORT_ACTION_GET_PORT_INFO32) { 2111 dev_err(adapter->pdev_dev, 2112 "Unknown firmware PORT reply action %x\n", 2113 action); 2114 break; 2115 } 2116 2117 port_id = FW_PORT_CMD_PORTID_G( 2118 be32_to_cpu(port_cmd->op_to_portid)); 2119 for_each_port(adapter, pidx) { 2120 struct port_info *pi = adap2pinfo(adapter, pidx); 2121 2122 if (pi->port_id != port_id) 2123 continue; 2124 t4vf_handle_get_port_info(pi, port_cmd); 2125 } 2126 break; 2127 } 2128 2129 default: 2130 dev_err(adapter->pdev_dev, "Unknown firmware reply %X\n", 2131 opcode); 2132 } 2133 return 0; 2134 } 2135 2136 /** 2137 */ 2138 int t4vf_prep_adapter(struct adapter *adapter) 2139 { 2140 int err; 2141 unsigned int chipid; 2142 2143 /* Wait for the device to become ready before proceeding ... 2144 */ 2145 err = t4vf_wait_dev_ready(adapter); 2146 if (err) 2147 return err; 2148 2149 /* Default port and clock for debugging in case we can't reach 2150 * firmware. 2151 */ 2152 adapter->params.nports = 1; 2153 adapter->params.vfres.pmask = 1; 2154 adapter->params.vpd.cclk = 50000; 2155 2156 adapter->params.chip = 0; 2157 switch (CHELSIO_PCI_ID_VER(adapter->pdev->device)) { 2158 case CHELSIO_T4: 2159 adapter->params.chip |= CHELSIO_CHIP_CODE(CHELSIO_T4, 0); 2160 adapter->params.arch.sge_fl_db = DBPRIO_F; 2161 adapter->params.arch.mps_tcam_size = 2162 NUM_MPS_CLS_SRAM_L_INSTANCES; 2163 break; 2164 2165 case CHELSIO_T5: 2166 chipid = REV_G(t4_read_reg(adapter, PL_VF_REV_A)); 2167 adapter->params.chip |= CHELSIO_CHIP_CODE(CHELSIO_T5, chipid); 2168 adapter->params.arch.sge_fl_db = DBPRIO_F | DBTYPE_F; 2169 adapter->params.arch.mps_tcam_size = 2170 NUM_MPS_T5_CLS_SRAM_L_INSTANCES; 2171 break; 2172 2173 case CHELSIO_T6: 2174 chipid = REV_G(t4_read_reg(adapter, PL_VF_REV_A)); 2175 adapter->params.chip |= CHELSIO_CHIP_CODE(CHELSIO_T6, chipid); 2176 adapter->params.arch.sge_fl_db = 0; 2177 adapter->params.arch.mps_tcam_size = 2178 NUM_MPS_T5_CLS_SRAM_L_INSTANCES; 2179 break; 2180 } 2181 2182 return 0; 2183 } 2184 2185 /** 2186 * t4vf_get_vf_mac_acl - Get the MAC address to be set to 2187 * the VI of this VF. 2188 * @adapter: The adapter 2189 * @pf: The pf associated with vf 2190 * @naddr: the number of ACL MAC addresses returned in addr 2191 * @addr: Placeholder for MAC addresses 2192 * 2193 * Find the MAC address to be set to the VF's VI. The requested MAC address 2194 * is from the host OS via callback in the PF driver. 2195 */ 2196 int t4vf_get_vf_mac_acl(struct adapter *adapter, unsigned int pf, 2197 unsigned int *naddr, u8 *addr) 2198 { 2199 struct fw_acl_mac_cmd cmd; 2200 int ret; 2201 2202 memset(&cmd, 0, sizeof(cmd)); 2203 cmd.op_to_vfn = cpu_to_be32(FW_CMD_OP_V(FW_ACL_MAC_CMD) | 2204 FW_CMD_REQUEST_F | 2205 FW_CMD_READ_F); 2206 cmd.en_to_len16 = cpu_to_be32((unsigned int)FW_LEN16(cmd)); 2207 ret = t4vf_wr_mbox(adapter, &cmd, sizeof(cmd), &cmd); 2208 if (ret) 2209 return ret; 2210 2211 if (cmd.nmac < *naddr) 2212 *naddr = cmd.nmac; 2213 2214 switch (pf) { 2215 case 3: 2216 memcpy(addr, cmd.macaddr3, sizeof(cmd.macaddr3)); 2217 break; 2218 case 2: 2219 memcpy(addr, cmd.macaddr2, sizeof(cmd.macaddr2)); 2220 break; 2221 case 1: 2222 memcpy(addr, cmd.macaddr1, sizeof(cmd.macaddr1)); 2223 break; 2224 case 0: 2225 memcpy(addr, cmd.macaddr0, sizeof(cmd.macaddr0)); 2226 break; 2227 } 2228 2229 return ret; 2230 } 2231 2232 /** 2233 * t4vf_get_vf_vlan_acl - Get the VLAN ID to be set to 2234 * the VI of this VF. 2235 * @adapter: The adapter 2236 * 2237 * Find the VLAN ID to be set to the VF's VI. The requested VLAN ID 2238 * is from the host OS via callback in the PF driver. 2239 */ 2240 int t4vf_get_vf_vlan_acl(struct adapter *adapter) 2241 { 2242 struct fw_acl_vlan_cmd cmd; 2243 int vlan = 0; 2244 int ret = 0; 2245 2246 cmd.op_to_vfn = htonl(FW_CMD_OP_V(FW_ACL_VLAN_CMD) | 2247 FW_CMD_REQUEST_F | FW_CMD_READ_F); 2248 2249 /* Note: Do not enable the ACL */ 2250 cmd.en_to_len16 = cpu_to_be32((unsigned int)FW_LEN16(cmd)); 2251 2252 ret = t4vf_wr_mbox(adapter, &cmd, sizeof(cmd), &cmd); 2253 2254 if (!ret) 2255 vlan = be16_to_cpu(cmd.vlanid[0]); 2256 2257 return vlan; 2258 } 2259