xref: /linux/drivers/net/ethernet/chelsio/cxgb4/cxgb4_uld.h (revision 08ec212c0f92cbf30e3ecc7349f18151714041d6)
1 /*
2  * This file is part of the Chelsio T4 Ethernet driver for Linux.
3  *
4  * Copyright (c) 2003-2010 Chelsio Communications, Inc. All rights reserved.
5  *
6  * This software is available to you under a choice of one of two
7  * licenses.  You may choose to be licensed under the terms of the GNU
8  * General Public License (GPL) Version 2, available from the file
9  * COPYING in the main directory of this source tree, or the
10  * OpenIB.org BSD license below:
11  *
12  *     Redistribution and use in source and binary forms, with or
13  *     without modification, are permitted provided that the following
14  *     conditions are met:
15  *
16  *      - Redistributions of source code must retain the above
17  *        copyright notice, this list of conditions and the following
18  *        disclaimer.
19  *
20  *      - Redistributions in binary form must reproduce the above
21  *        copyright notice, this list of conditions and the following
22  *        disclaimer in the documentation and/or other materials
23  *        provided with the distribution.
24  *
25  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
26  * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
27  * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
28  * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
29  * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
30  * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
31  * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
32  * SOFTWARE.
33  */
34 
35 #ifndef __CXGB4_OFLD_H
36 #define __CXGB4_OFLD_H
37 
38 #include <linux/cache.h>
39 #include <linux/spinlock.h>
40 #include <linux/skbuff.h>
41 #include <linux/atomic.h>
42 
43 /* CPL message priority levels */
44 enum {
45 	CPL_PRIORITY_DATA     = 0,  /* data messages */
46 	CPL_PRIORITY_SETUP    = 1,  /* connection setup messages */
47 	CPL_PRIORITY_TEARDOWN = 0,  /* connection teardown messages */
48 	CPL_PRIORITY_LISTEN   = 1,  /* listen start/stop messages */
49 	CPL_PRIORITY_ACK      = 1,  /* RX ACK messages */
50 	CPL_PRIORITY_CONTROL  = 1   /* control messages */
51 };
52 
53 #define INIT_TP_WR(w, tid) do { \
54 	(w)->wr.wr_hi = htonl(FW_WR_OP(FW_TP_WR) | \
55 			      FW_WR_IMMDLEN(sizeof(*w) - sizeof(w->wr))); \
56 	(w)->wr.wr_mid = htonl(FW_WR_LEN16(DIV_ROUND_UP(sizeof(*w), 16)) | \
57 			       FW_WR_FLOWID(tid)); \
58 	(w)->wr.wr_lo = cpu_to_be64(0); \
59 } while (0)
60 
61 #define INIT_TP_WR_CPL(w, cpl, tid) do { \
62 	INIT_TP_WR(w, tid); \
63 	OPCODE_TID(w) = htonl(MK_OPCODE_TID(cpl, tid)); \
64 } while (0)
65 
66 #define INIT_ULPTX_WR(w, wrlen, atomic, tid) do { \
67 	(w)->wr.wr_hi = htonl(FW_WR_OP(FW_ULPTX_WR) | FW_WR_ATOMIC(atomic)); \
68 	(w)->wr.wr_mid = htonl(FW_WR_LEN16(DIV_ROUND_UP(wrlen, 16)) | \
69 			       FW_WR_FLOWID(tid)); \
70 	(w)->wr.wr_lo = cpu_to_be64(0); \
71 } while (0)
72 
73 /* Special asynchronous notification message */
74 #define CXGB4_MSG_AN ((void *)1)
75 
76 struct serv_entry {
77 	void *data;
78 };
79 
80 union aopen_entry {
81 	void *data;
82 	union aopen_entry *next;
83 };
84 
85 /*
86  * Holds the size, base address, free list start, etc of the TID, server TID,
87  * and active-open TID tables.  The tables themselves are allocated dynamically.
88  */
89 struct tid_info {
90 	void **tid_tab;
91 	unsigned int ntids;
92 
93 	struct serv_entry *stid_tab;
94 	unsigned long *stid_bmap;
95 	unsigned int nstids;
96 	unsigned int stid_base;
97 
98 	union aopen_entry *atid_tab;
99 	unsigned int natids;
100 
101 	unsigned int nftids;
102 	unsigned int ftid_base;
103 	unsigned int aftid_base;
104 	unsigned int aftid_end;
105 
106 	spinlock_t atid_lock ____cacheline_aligned_in_smp;
107 	union aopen_entry *afree;
108 	unsigned int atids_in_use;
109 
110 	spinlock_t stid_lock;
111 	unsigned int stids_in_use;
112 
113 	atomic_t tids_in_use;
114 };
115 
116 static inline void *lookup_tid(const struct tid_info *t, unsigned int tid)
117 {
118 	return tid < t->ntids ? t->tid_tab[tid] : NULL;
119 }
120 
121 static inline void *lookup_atid(const struct tid_info *t, unsigned int atid)
122 {
123 	return atid < t->natids ? t->atid_tab[atid].data : NULL;
124 }
125 
126 static inline void *lookup_stid(const struct tid_info *t, unsigned int stid)
127 {
128 	stid -= t->stid_base;
129 	return stid < t->nstids ? t->stid_tab[stid].data : NULL;
130 }
131 
132 static inline void cxgb4_insert_tid(struct tid_info *t, void *data,
133 				    unsigned int tid)
134 {
135 	t->tid_tab[tid] = data;
136 	atomic_inc(&t->tids_in_use);
137 }
138 
139 int cxgb4_alloc_atid(struct tid_info *t, void *data);
140 int cxgb4_alloc_stid(struct tid_info *t, int family, void *data);
141 void cxgb4_free_atid(struct tid_info *t, unsigned int atid);
142 void cxgb4_free_stid(struct tid_info *t, unsigned int stid, int family);
143 void cxgb4_remove_tid(struct tid_info *t, unsigned int qid, unsigned int tid);
144 
145 struct in6_addr;
146 
147 int cxgb4_create_server(const struct net_device *dev, unsigned int stid,
148 			__be32 sip, __be16 sport, unsigned int queue);
149 
150 static inline void set_wr_txq(struct sk_buff *skb, int prio, int queue)
151 {
152 	skb_set_queue_mapping(skb, (queue << 1) | prio);
153 }
154 
155 enum cxgb4_uld {
156 	CXGB4_ULD_RDMA,
157 	CXGB4_ULD_ISCSI,
158 	CXGB4_ULD_MAX
159 };
160 
161 enum cxgb4_state {
162 	CXGB4_STATE_UP,
163 	CXGB4_STATE_START_RECOVERY,
164 	CXGB4_STATE_DOWN,
165 	CXGB4_STATE_DETACH
166 };
167 
168 enum cxgb4_control {
169 	CXGB4_CONTROL_DB_FULL,
170 	CXGB4_CONTROL_DB_EMPTY,
171 	CXGB4_CONTROL_DB_DROP,
172 };
173 
174 struct pci_dev;
175 struct l2t_data;
176 struct net_device;
177 struct pkt_gl;
178 struct tp_tcp_stats;
179 
180 struct cxgb4_range {
181 	unsigned int start;
182 	unsigned int size;
183 };
184 
185 struct cxgb4_virt_res {                      /* virtualized HW resources */
186 	struct cxgb4_range ddp;
187 	struct cxgb4_range iscsi;
188 	struct cxgb4_range stag;
189 	struct cxgb4_range rq;
190 	struct cxgb4_range pbl;
191 	struct cxgb4_range qp;
192 	struct cxgb4_range cq;
193 	struct cxgb4_range ocq;
194 };
195 
196 #define OCQ_WIN_OFFSET(pdev, vres) \
197 	(pci_resource_len((pdev), 2) - roundup_pow_of_two((vres)->ocq.size))
198 
199 /*
200  * Block of information the LLD provides to ULDs attaching to a device.
201  */
202 struct cxgb4_lld_info {
203 	struct pci_dev *pdev;                /* associated PCI device */
204 	struct l2t_data *l2t;                /* L2 table */
205 	struct tid_info *tids;               /* TID table */
206 	struct net_device **ports;           /* device ports */
207 	const struct cxgb4_virt_res *vr;     /* assorted HW resources */
208 	const unsigned short *mtus;          /* MTU table */
209 	const unsigned short *rxq_ids;       /* the ULD's Rx queue ids */
210 	unsigned short nrxq;                 /* # of Rx queues */
211 	unsigned short ntxq;                 /* # of Tx queues */
212 	unsigned char nchan:4;               /* # of channels */
213 	unsigned char nports:4;              /* # of ports */
214 	unsigned char wr_cred;               /* WR 16-byte credits */
215 	unsigned char adapter_type;          /* type of adapter */
216 	unsigned char fw_api_ver;            /* FW API version */
217 	unsigned int fw_vers;                /* FW version */
218 	unsigned int iscsi_iolen;            /* iSCSI max I/O length */
219 	unsigned short udb_density;          /* # of user DB/page */
220 	unsigned short ucq_density;          /* # of user CQs/page */
221 	void __iomem *gts_reg;               /* address of GTS register */
222 	void __iomem *db_reg;                /* address of kernel doorbell */
223 	int dbfifo_int_thresh;		     /* doorbell fifo int threshold */
224 };
225 
226 struct cxgb4_uld_info {
227 	const char *name;
228 	void *(*add)(const struct cxgb4_lld_info *p);
229 	int (*rx_handler)(void *handle, const __be64 *rsp,
230 			  const struct pkt_gl *gl);
231 	int (*state_change)(void *handle, enum cxgb4_state new_state);
232 	int (*control)(void *handle, enum cxgb4_control control, ...);
233 };
234 
235 int cxgb4_register_uld(enum cxgb4_uld type, const struct cxgb4_uld_info *p);
236 int cxgb4_unregister_uld(enum cxgb4_uld type);
237 int cxgb4_ofld_send(struct net_device *dev, struct sk_buff *skb);
238 unsigned int cxgb4_dbfifo_count(const struct net_device *dev, int lpfifo);
239 unsigned int cxgb4_port_chan(const struct net_device *dev);
240 unsigned int cxgb4_port_viid(const struct net_device *dev);
241 unsigned int cxgb4_port_idx(const struct net_device *dev);
242 unsigned int cxgb4_best_mtu(const unsigned short *mtus, unsigned short mtu,
243 			    unsigned int *idx);
244 void cxgb4_get_tcp_stats(struct pci_dev *pdev, struct tp_tcp_stats *v4,
245 			 struct tp_tcp_stats *v6);
246 void cxgb4_iscsi_init(struct net_device *dev, unsigned int tag_mask,
247 		      const unsigned int *pgsz_order);
248 struct sk_buff *cxgb4_pktgl_to_skb(const struct pkt_gl *gl,
249 				   unsigned int skb_len, unsigned int pull_len);
250 int cxgb4_sync_txq_pidx(struct net_device *dev, u16 qid, u16 pidx, u16 size);
251 int cxgb4_flush_eq_cache(struct net_device *dev);
252 #endif  /* !__CXGB4_OFLD_H */
253