xref: /linux/drivers/net/ethernet/brocade/bna/bfi_enet.h (revision 3932b9ca55b0be314a36d3e84faff3e823c081f5)
1 /*
2  * Linux network driver for Brocade Converged Network Adapter.
3  *
4  * This program is free software; you can redistribute it and/or modify it
5  * under the terms of the GNU General Public License (GPL) Version 2 as
6  * published by the Free Software Foundation
7  *
8  * This program is distributed in the hope that it will be useful, but
9  * WITHOUT ANY WARRANTY; without even the implied warranty of
10  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
11  * General Public License for more details.
12  */
13 /*
14  * Copyright (c) 2005-2011 Brocade Communications Systems, Inc.
15  * All rights reserved
16  * www.brocade.com
17  */
18 
19 /* BNA Hardware and Firmware Interface */
20 
21 /* Skipping statistics collection to avoid clutter.
22  * Command is no longer needed:
23  *	MTU
24  *	TxQ Stop
25  *	RxQ Stop
26  *	RxF Enable/Disable
27  *
28  * HDS-off request is dynamic
29  * keep structures as multiple of 32-bit fields for alignment.
30  * All values must be written in big-endian.
31  */
32 #ifndef __BFI_ENET_H__
33 #define __BFI_ENET_H__
34 
35 #include "bfa_defs.h"
36 #include "bfi.h"
37 
38 #pragma pack(1)
39 
40 #define BFI_ENET_CFG_MAX		32	/* Max resources per PF */
41 
42 #define BFI_ENET_TXQ_PRIO_MAX		8
43 #define BFI_ENET_RX_QSET_MAX		16
44 #define BFI_ENET_TXQ_WI_VECT_MAX	4
45 
46 #define BFI_ENET_VLAN_ID_MAX		4096
47 #define BFI_ENET_VLAN_BLOCK_SIZE	512	/* in bits */
48 #define BFI_ENET_VLAN_BLOCKS_MAX					\
49 	(BFI_ENET_VLAN_ID_MAX / BFI_ENET_VLAN_BLOCK_SIZE)
50 #define BFI_ENET_VLAN_WORD_SIZE		32	/* in bits */
51 #define BFI_ENET_VLAN_WORDS_MAX						\
52 	(BFI_ENET_VLAN_BLOCK_SIZE / BFI_ENET_VLAN_WORD_SIZE)
53 
54 #define BFI_ENET_RSS_RIT_MAX		64	/* entries */
55 #define BFI_ENET_RSS_KEY_LEN		10	/* 32-bit words */
56 
57 union bfi_addr_be_u {
58 	struct {
59 		u32	addr_hi;	/* Most Significant 32-bits */
60 		u32	addr_lo;	/* Least Significant 32-Bits */
61 	} a32;
62 };
63 
64 /*	T X   Q U E U E   D E F I N E S      */
65 /* TxQ Vector (a.k.a. Tx-Buffer Descriptor) */
66 /* TxQ Entry Opcodes */
67 #define BFI_ENET_TXQ_WI_SEND		(0x402)	/* Single Frame Transmission */
68 #define BFI_ENET_TXQ_WI_SEND_LSO	(0x403)	/* Multi-Frame Transmission */
69 #define BFI_ENET_TXQ_WI_EXTENSION	(0x104)	/* Extension WI */
70 
71 /* TxQ Entry Control Flags */
72 #define BFI_ENET_TXQ_WI_CF_FCOE_CRC	(1 << 8)
73 #define BFI_ENET_TXQ_WI_CF_IPID_MODE	(1 << 5)
74 #define BFI_ENET_TXQ_WI_CF_INS_PRIO	(1 << 4)
75 #define BFI_ENET_TXQ_WI_CF_INS_VLAN	(1 << 3)
76 #define BFI_ENET_TXQ_WI_CF_UDP_CKSUM	(1 << 2)
77 #define BFI_ENET_TXQ_WI_CF_TCP_CKSUM	(1 << 1)
78 #define BFI_ENET_TXQ_WI_CF_IP_CKSUM	(1 << 0)
79 
80 struct bfi_enet_txq_wi_base {
81 	u8			reserved;
82 	u8			num_vectors;	/* number of vectors present */
83 	u16			opcode;
84 			/* BFI_ENET_TXQ_WI_SEND or BFI_ENET_TXQ_WI_SEND_LSO */
85 	u16			flags;		/* OR of all the flags */
86 	u16			l4_hdr_size_n_offset;
87 	u16			vlan_tag;
88 	u16			lso_mss;	/* Only 14 LSB are valid */
89 	u32			frame_length;	/* Only 24 LSB are valid */
90 };
91 
92 struct bfi_enet_txq_wi_ext {
93 	u16			reserved;
94 	u16			opcode;		/* BFI_ENET_TXQ_WI_EXTENSION */
95 	u32			reserved2[3];
96 };
97 
98 struct bfi_enet_txq_wi_vector {			/* Tx Buffer Descriptor */
99 	u16			reserved;
100 	u16			length;		/* Only 14 LSB are valid */
101 	union bfi_addr_be_u	addr;
102 };
103 
104 /*  TxQ Entry Structure  */
105 struct bfi_enet_txq_entry {
106 	union {
107 		struct bfi_enet_txq_wi_base	base;
108 		struct bfi_enet_txq_wi_ext	ext;
109 	} wi;
110 	struct bfi_enet_txq_wi_vector vector[BFI_ENET_TXQ_WI_VECT_MAX];
111 };
112 
113 #define wi_hdr		wi.base
114 #define wi_ext_hdr	wi.ext
115 
116 #define BFI_ENET_TXQ_WI_L4_HDR_N_OFFSET(_hdr_size, _offset) \
117 		(((_hdr_size) << 10) | ((_offset) & 0x3FF))
118 
119 /*   R X   Q U E U E   D E F I N E S   */
120 struct bfi_enet_rxq_entry {
121 	union bfi_addr_be_u  rx_buffer;
122 };
123 
124 /*   R X   C O M P L E T I O N   Q U E U E   D E F I N E S   */
125 /* CQ Entry Flags */
126 #define	BFI_ENET_CQ_EF_MAC_ERROR	(1 <<  0)
127 #define	BFI_ENET_CQ_EF_FCS_ERROR	(1 <<  1)
128 #define	BFI_ENET_CQ_EF_TOO_LONG		(1 <<  2)
129 #define	BFI_ENET_CQ_EF_FC_CRC_OK	(1 <<  3)
130 
131 #define	BFI_ENET_CQ_EF_RSVD1		(1 <<  4)
132 #define	BFI_ENET_CQ_EF_L4_CKSUM_OK	(1 <<  5)
133 #define	BFI_ENET_CQ_EF_L3_CKSUM_OK	(1 <<  6)
134 #define	BFI_ENET_CQ_EF_HDS_HEADER	(1 <<  7)
135 
136 #define	BFI_ENET_CQ_EF_UDP		(1 <<  8)
137 #define	BFI_ENET_CQ_EF_TCP		(1 <<  9)
138 #define	BFI_ENET_CQ_EF_IP_OPTIONS	(1 << 10)
139 #define	BFI_ENET_CQ_EF_IPV6		(1 << 11)
140 
141 #define	BFI_ENET_CQ_EF_IPV4		(1 << 12)
142 #define	BFI_ENET_CQ_EF_VLAN		(1 << 13)
143 #define	BFI_ENET_CQ_EF_RSS		(1 << 14)
144 #define	BFI_ENET_CQ_EF_RSVD2		(1 << 15)
145 
146 #define	BFI_ENET_CQ_EF_MCAST_MATCH	(1 << 16)
147 #define	BFI_ENET_CQ_EF_MCAST		(1 << 17)
148 #define BFI_ENET_CQ_EF_BCAST		(1 << 18)
149 #define	BFI_ENET_CQ_EF_REMOTE		(1 << 19)
150 
151 #define	BFI_ENET_CQ_EF_LOCAL		(1 << 20)
152 
153 /* CQ Entry Structure */
154 struct bfi_enet_cq_entry {
155 	u32 flags;
156 	u16	vlan_tag;
157 	u16	length;
158 	u32	rss_hash;
159 	u8	valid;
160 	u8	reserved1;
161 	u8	reserved2;
162 	u8	rxq_id;
163 };
164 
165 /*   E N E T   C O N T R O L   P A T H   C O M M A N D S   */
166 struct bfi_enet_q {
167 	union bfi_addr_u	pg_tbl;
168 	union bfi_addr_u	first_entry;
169 	u16		pages;	/* # of pages */
170 	u16		page_sz;
171 };
172 
173 struct bfi_enet_txq {
174 	struct bfi_enet_q	q;
175 	u8			priority;
176 	u8			rsvd[3];
177 };
178 
179 struct bfi_enet_rxq {
180 	struct bfi_enet_q	q;
181 	u16		rx_buffer_size;
182 	u16		rsvd;
183 };
184 
185 struct bfi_enet_cq {
186 	struct bfi_enet_q	q;
187 };
188 
189 struct bfi_enet_ib_cfg {
190 	u8		int_pkt_dma;
191 	u8		int_enabled;
192 	u8		int_pkt_enabled;
193 	u8		continuous_coalescing;
194 	u8		msix;
195 	u8		rsvd[3];
196 	u32	coalescing_timeout;
197 	u32	inter_pkt_timeout;
198 	u8		inter_pkt_count;
199 	u8		rsvd1[3];
200 };
201 
202 struct bfi_enet_ib {
203 	union bfi_addr_u	index_addr;
204 	union {
205 		u16	msix_index;
206 		u16	intx_bitmask;
207 	} intr;
208 	u16		rsvd;
209 };
210 
211 /* ENET command messages */
212 enum bfi_enet_h2i_msgs {
213 	/* Rx Commands */
214 	BFI_ENET_H2I_RX_CFG_SET_REQ = 1,
215 	BFI_ENET_H2I_RX_CFG_CLR_REQ = 2,
216 
217 	BFI_ENET_H2I_RIT_CFG_REQ = 3,
218 	BFI_ENET_H2I_RSS_CFG_REQ = 4,
219 	BFI_ENET_H2I_RSS_ENABLE_REQ = 5,
220 	BFI_ENET_H2I_RX_PROMISCUOUS_REQ = 6,
221 	BFI_ENET_H2I_RX_DEFAULT_REQ = 7,
222 
223 	BFI_ENET_H2I_MAC_UCAST_SET_REQ = 8,
224 	BFI_ENET_H2I_MAC_UCAST_CLR_REQ = 9,
225 	BFI_ENET_H2I_MAC_UCAST_ADD_REQ = 10,
226 	BFI_ENET_H2I_MAC_UCAST_DEL_REQ = 11,
227 
228 	BFI_ENET_H2I_MAC_MCAST_ADD_REQ = 12,
229 	BFI_ENET_H2I_MAC_MCAST_DEL_REQ = 13,
230 	BFI_ENET_H2I_MAC_MCAST_FILTER_REQ = 14,
231 
232 	BFI_ENET_H2I_RX_VLAN_SET_REQ = 15,
233 	BFI_ENET_H2I_RX_VLAN_STRIP_ENABLE_REQ = 16,
234 
235 	/* Tx Commands */
236 	BFI_ENET_H2I_TX_CFG_SET_REQ = 17,
237 	BFI_ENET_H2I_TX_CFG_CLR_REQ = 18,
238 
239 	/* Port Commands */
240 	BFI_ENET_H2I_PORT_ADMIN_UP_REQ = 19,
241 	BFI_ENET_H2I_SET_PAUSE_REQ = 20,
242 	BFI_ENET_H2I_DIAG_LOOPBACK_REQ = 21,
243 
244 	/* Get Attributes Command */
245 	BFI_ENET_H2I_GET_ATTR_REQ = 22,
246 
247 	/*  Statistics Commands */
248 	BFI_ENET_H2I_STATS_GET_REQ = 23,
249 	BFI_ENET_H2I_STATS_CLR_REQ = 24,
250 
251 	BFI_ENET_H2I_WOL_MAGIC_REQ = 25,
252 	BFI_ENET_H2I_WOL_FRAME_REQ = 26,
253 
254 	BFI_ENET_H2I_MAX = 27,
255 };
256 
257 enum bfi_enet_i2h_msgs {
258 	/* Rx Responses */
259 	BFI_ENET_I2H_RX_CFG_SET_RSP =
260 		BFA_I2HM(BFI_ENET_H2I_RX_CFG_SET_REQ),
261 	BFI_ENET_I2H_RX_CFG_CLR_RSP =
262 		BFA_I2HM(BFI_ENET_H2I_RX_CFG_CLR_REQ),
263 
264 	BFI_ENET_I2H_RIT_CFG_RSP =
265 		BFA_I2HM(BFI_ENET_H2I_RIT_CFG_REQ),
266 	BFI_ENET_I2H_RSS_CFG_RSP =
267 		BFA_I2HM(BFI_ENET_H2I_RSS_CFG_REQ),
268 	BFI_ENET_I2H_RSS_ENABLE_RSP =
269 		BFA_I2HM(BFI_ENET_H2I_RSS_ENABLE_REQ),
270 	BFI_ENET_I2H_RX_PROMISCUOUS_RSP =
271 		BFA_I2HM(BFI_ENET_H2I_RX_PROMISCUOUS_REQ),
272 	BFI_ENET_I2H_RX_DEFAULT_RSP =
273 		BFA_I2HM(BFI_ENET_H2I_RX_DEFAULT_REQ),
274 
275 	BFI_ENET_I2H_MAC_UCAST_SET_RSP =
276 		BFA_I2HM(BFI_ENET_H2I_MAC_UCAST_SET_REQ),
277 	BFI_ENET_I2H_MAC_UCAST_CLR_RSP =
278 		BFA_I2HM(BFI_ENET_H2I_MAC_UCAST_CLR_REQ),
279 	BFI_ENET_I2H_MAC_UCAST_ADD_RSP =
280 		BFA_I2HM(BFI_ENET_H2I_MAC_UCAST_ADD_REQ),
281 	BFI_ENET_I2H_MAC_UCAST_DEL_RSP =
282 		BFA_I2HM(BFI_ENET_H2I_MAC_UCAST_DEL_REQ),
283 
284 	BFI_ENET_I2H_MAC_MCAST_ADD_RSP =
285 		BFA_I2HM(BFI_ENET_H2I_MAC_MCAST_ADD_REQ),
286 	BFI_ENET_I2H_MAC_MCAST_DEL_RSP =
287 		BFA_I2HM(BFI_ENET_H2I_MAC_MCAST_DEL_REQ),
288 	BFI_ENET_I2H_MAC_MCAST_FILTER_RSP =
289 		BFA_I2HM(BFI_ENET_H2I_MAC_MCAST_FILTER_REQ),
290 
291 	BFI_ENET_I2H_RX_VLAN_SET_RSP =
292 		BFA_I2HM(BFI_ENET_H2I_RX_VLAN_SET_REQ),
293 
294 	BFI_ENET_I2H_RX_VLAN_STRIP_ENABLE_RSP =
295 		BFA_I2HM(BFI_ENET_H2I_RX_VLAN_STRIP_ENABLE_REQ),
296 
297 	/* Tx Responses */
298 	BFI_ENET_I2H_TX_CFG_SET_RSP =
299 		BFA_I2HM(BFI_ENET_H2I_TX_CFG_SET_REQ),
300 	BFI_ENET_I2H_TX_CFG_CLR_RSP =
301 		BFA_I2HM(BFI_ENET_H2I_TX_CFG_CLR_REQ),
302 
303 	/* Port Responses */
304 	BFI_ENET_I2H_PORT_ADMIN_RSP =
305 		BFA_I2HM(BFI_ENET_H2I_PORT_ADMIN_UP_REQ),
306 
307 	BFI_ENET_I2H_SET_PAUSE_RSP =
308 		BFA_I2HM(BFI_ENET_H2I_SET_PAUSE_REQ),
309 	BFI_ENET_I2H_DIAG_LOOPBACK_RSP =
310 		BFA_I2HM(BFI_ENET_H2I_DIAG_LOOPBACK_REQ),
311 
312 	/*  Attributes Response */
313 	BFI_ENET_I2H_GET_ATTR_RSP =
314 		BFA_I2HM(BFI_ENET_H2I_GET_ATTR_REQ),
315 
316 	/* Statistics Responses */
317 	BFI_ENET_I2H_STATS_GET_RSP =
318 		BFA_I2HM(BFI_ENET_H2I_STATS_GET_REQ),
319 	BFI_ENET_I2H_STATS_CLR_RSP =
320 		BFA_I2HM(BFI_ENET_H2I_STATS_CLR_REQ),
321 
322 	BFI_ENET_I2H_WOL_MAGIC_RSP =
323 		BFA_I2HM(BFI_ENET_H2I_WOL_MAGIC_REQ),
324 	BFI_ENET_I2H_WOL_FRAME_RSP =
325 		BFA_I2HM(BFI_ENET_H2I_WOL_FRAME_REQ),
326 
327 	/* AENs */
328 	BFI_ENET_I2H_LINK_DOWN_AEN = BFA_I2HM(BFI_ENET_H2I_MAX),
329 	BFI_ENET_I2H_LINK_UP_AEN = BFA_I2HM(BFI_ENET_H2I_MAX + 1),
330 
331 	BFI_ENET_I2H_PORT_ENABLE_AEN = BFA_I2HM(BFI_ENET_H2I_MAX + 2),
332 	BFI_ENET_I2H_PORT_DISABLE_AEN = BFA_I2HM(BFI_ENET_H2I_MAX + 3),
333 
334 	BFI_ENET_I2H_BW_UPDATE_AEN = BFA_I2HM(BFI_ENET_H2I_MAX + 4),
335 };
336 
337 /* The following error codes can be returned by the enet commands */
338 enum bfi_enet_err {
339 	BFI_ENET_CMD_OK		= 0,
340 	BFI_ENET_CMD_FAIL	= 1,
341 	BFI_ENET_CMD_DUP_ENTRY	= 2,	/* !< Duplicate entry in CAM */
342 	BFI_ENET_CMD_CAM_FULL	= 3,	/* !< CAM is full */
343 	BFI_ENET_CMD_NOT_OWNER	= 4,	/* !< Not permitted, b'cos not owner */
344 	BFI_ENET_CMD_NOT_EXEC	= 5,	/* !< Was not sent to f/w at all */
345 	BFI_ENET_CMD_WAITING	= 6,	/* !< Waiting for completion */
346 	BFI_ENET_CMD_PORT_DISABLED = 7,	/* !< port in disabled state */
347 };
348 
349 /* Generic Request
350  *
351  * bfi_enet_req is used by:
352  *	BFI_ENET_H2I_RX_CFG_CLR_REQ
353  *	BFI_ENET_H2I_TX_CFG_CLR_REQ
354  */
355 struct bfi_enet_req {
356 	struct bfi_msgq_mhdr mh;
357 };
358 
359 /* Enable/Disable Request
360  *
361  * bfi_enet_enable_req is used by:
362  *	BFI_ENET_H2I_RSS_ENABLE_REQ	(enet_id must be zero)
363  *	BFI_ENET_H2I_RX_PROMISCUOUS_REQ (enet_id must be zero)
364  *	BFI_ENET_H2I_RX_DEFAULT_REQ	(enet_id must be zero)
365  *	BFI_ENET_H2I_RX_MAC_MCAST_FILTER_REQ
366  *	BFI_ENET_H2I_PORT_ADMIN_UP_REQ	(enet_id must be zero)
367  */
368 struct bfi_enet_enable_req {
369 	struct		bfi_msgq_mhdr mh;
370 	u8		enable;		/* 1 = enable;  0 = disable */
371 	u8		rsvd[3];
372 };
373 
374 /* Generic Response */
375 struct bfi_enet_rsp {
376 	struct bfi_msgq_mhdr mh;
377 	u8		error;		/*!< if error see cmd_offset */
378 	u8		rsvd;
379 	u16		cmd_offset;	/*!< offset to invalid parameter */
380 };
381 
382 /* GLOBAL CONFIGURATION */
383 
384 /* bfi_enet_attr_req is used by:
385  *	BFI_ENET_H2I_GET_ATTR_REQ
386  */
387 struct bfi_enet_attr_req {
388 	struct bfi_msgq_mhdr	mh;
389 };
390 
391 /* bfi_enet_attr_rsp is used by:
392  *	BFI_ENET_I2H_GET_ATTR_RSP
393  */
394 struct bfi_enet_attr_rsp {
395 	struct bfi_msgq_mhdr mh;
396 	u8		error;		/*!< if error see cmd_offset */
397 	u8		rsvd;
398 	u16		cmd_offset;	/*!< offset to invalid parameter */
399 	u32		max_cfg;
400 	u32		max_ucmac;
401 	u32		rit_size;
402 };
403 
404 /* Tx Configuration
405  *
406  * bfi_enet_tx_cfg is used by:
407  *	BFI_ENET_H2I_TX_CFG_SET_REQ
408  */
409 enum bfi_enet_tx_vlan_mode {
410 	BFI_ENET_TX_VLAN_NOP	= 0,
411 	BFI_ENET_TX_VLAN_INS	= 1,
412 	BFI_ENET_TX_VLAN_WI	= 2,
413 };
414 
415 struct bfi_enet_tx_cfg {
416 	u8		vlan_mode;	/*!< processing mode */
417 	u8		rsvd;
418 	u16		vlan_id;
419 	u8		admit_tagged_frame;
420 	u8		apply_vlan_filter;
421 	u8		add_to_vswitch;
422 	u8		rsvd1[1];
423 };
424 
425 struct bfi_enet_tx_cfg_req {
426 	struct bfi_msgq_mhdr mh;
427 	u8			num_queues;	/* # of Tx Queues */
428 	u8			rsvd[3];
429 
430 	struct {
431 		struct bfi_enet_txq	q;
432 		struct bfi_enet_ib	ib;
433 	} q_cfg[BFI_ENET_TXQ_PRIO_MAX];
434 
435 	struct bfi_enet_ib_cfg	ib_cfg;
436 
437 	struct bfi_enet_tx_cfg	tx_cfg;
438 };
439 
440 struct bfi_enet_tx_cfg_rsp {
441 	struct		bfi_msgq_mhdr mh;
442 	u8		error;
443 	u8		hw_id;		/* For debugging */
444 	u8		rsvd[2];
445 	struct {
446 		u32	q_dbell;	/* PCI base address offset */
447 		u32	i_dbell;	/* PCI base address offset */
448 		u8	hw_qid;		/* For debugging */
449 		u8	rsvd[3];
450 	} q_handles[BFI_ENET_TXQ_PRIO_MAX];
451 };
452 
453 /* Rx Configuration
454  *
455  * bfi_enet_rx_cfg is used by:
456  *	BFI_ENET_H2I_RX_CFG_SET_REQ
457  */
458 enum bfi_enet_rxq_type {
459 	BFI_ENET_RXQ_SINGLE		= 1,
460 	BFI_ENET_RXQ_LARGE_SMALL	= 2,
461 	BFI_ENET_RXQ_HDS		= 3,
462 	BFI_ENET_RXQ_HDS_OPT_BASED	= 4,
463 };
464 
465 enum bfi_enet_hds_type {
466 	BFI_ENET_HDS_FORCED	= 0x01,
467 	BFI_ENET_HDS_IPV6_UDP	= 0x02,
468 	BFI_ENET_HDS_IPV6_TCP	= 0x04,
469 	BFI_ENET_HDS_IPV4_TCP	= 0x08,
470 	BFI_ENET_HDS_IPV4_UDP	= 0x10,
471 };
472 
473 struct bfi_enet_rx_cfg {
474 	u8		rxq_type;
475 	u8		rsvd[1];
476 	u16		frame_size;
477 
478 	struct {
479 		u8			max_header_size;
480 		u8			force_offset;
481 		u8			type;
482 		u8			rsvd1;
483 	} hds;
484 
485 	u8		multi_buffer;
486 	u8		strip_vlan;
487 	u8		drop_untagged;
488 	u8		rsvd2;
489 };
490 
491 /*
492  * Multicast frames are received on the ql of q-set index zero.
493  * On the completion queue.  RxQ ID = even is for large/data buffer queues
494  * and RxQ ID = odd is for small/header buffer queues.
495  */
496 struct bfi_enet_rx_cfg_req {
497 	struct bfi_msgq_mhdr mh;
498 	u8			num_queue_sets;	/* # of Rx Queue Sets */
499 	u8			rsvd[3];
500 
501 	struct {
502 		struct bfi_enet_rxq	ql;	/* large/data/single buffers */
503 		struct bfi_enet_rxq	qs;	/* small/header buffers */
504 		struct bfi_enet_cq	cq;
505 		struct bfi_enet_ib	ib;
506 	} q_cfg[BFI_ENET_RX_QSET_MAX];
507 
508 	struct bfi_enet_ib_cfg	ib_cfg;
509 
510 	struct bfi_enet_rx_cfg	rx_cfg;
511 };
512 
513 struct bfi_enet_rx_cfg_rsp {
514 	struct bfi_msgq_mhdr mh;
515 	u8		error;
516 	u8		hw_id;	 /* For debugging */
517 	u8		rsvd[2];
518 	struct {
519 		u32	ql_dbell; /* PCI base address offset */
520 		u32	qs_dbell; /* PCI base address offset */
521 		u32	i_dbell;  /* PCI base address offset */
522 		u8		hw_lqid;  /* For debugging */
523 		u8		hw_sqid;  /* For debugging */
524 		u8		hw_cqid;  /* For debugging */
525 		u8		rsvd;
526 	} q_handles[BFI_ENET_RX_QSET_MAX];
527 };
528 
529 /* RIT
530  *
531  * bfi_enet_rit_req is used by:
532  *	BFI_ENET_H2I_RIT_CFG_REQ
533  */
534 struct bfi_enet_rit_req {
535 	struct	bfi_msgq_mhdr mh;
536 	u16	size;			/* number of table-entries used */
537 	u8	rsvd[2];
538 	u8	table[BFI_ENET_RSS_RIT_MAX];
539 };
540 
541 /* RSS
542  *
543  * bfi_enet_rss_cfg_req is used by:
544  *	BFI_ENET_H2I_RSS_CFG_REQ
545  */
546 enum bfi_enet_rss_type {
547 	BFI_ENET_RSS_IPV6	= 0x01,
548 	BFI_ENET_RSS_IPV6_TCP	= 0x02,
549 	BFI_ENET_RSS_IPV4	= 0x04,
550 	BFI_ENET_RSS_IPV4_TCP	= 0x08
551 };
552 
553 struct bfi_enet_rss_cfg {
554 	u8	type;
555 	u8	mask;
556 	u8	rsvd[2];
557 	u32	key[BFI_ENET_RSS_KEY_LEN];
558 };
559 
560 struct bfi_enet_rss_cfg_req {
561 	struct bfi_msgq_mhdr	mh;
562 	struct bfi_enet_rss_cfg	cfg;
563 };
564 
565 /* MAC Unicast
566  *
567  * bfi_enet_rx_vlan_req is used by:
568  *	BFI_ENET_H2I_MAC_UCAST_SET_REQ
569  *	BFI_ENET_H2I_MAC_UCAST_CLR_REQ
570  *	BFI_ENET_H2I_MAC_UCAST_ADD_REQ
571  *	BFI_ENET_H2I_MAC_UCAST_DEL_REQ
572  */
573 struct bfi_enet_ucast_req {
574 	struct bfi_msgq_mhdr	mh;
575 	mac_t			mac_addr;
576 	u8			rsvd[2];
577 };
578 
579 /* MAC Unicast + VLAN */
580 struct bfi_enet_mac_n_vlan_req {
581 	struct bfi_msgq_mhdr	mh;
582 	u16			vlan_id;
583 	mac_t			mac_addr;
584 };
585 
586 /* MAC Multicast
587  *
588  * bfi_enet_mac_mfilter_add_req is used by:
589  *	BFI_ENET_H2I_MAC_MCAST_ADD_REQ
590  */
591 struct bfi_enet_mcast_add_req {
592 	struct bfi_msgq_mhdr	mh;
593 	mac_t			mac_addr;
594 	u8			rsvd[2];
595 };
596 
597 /* bfi_enet_mac_mfilter_add_rsp is used by:
598  *	BFI_ENET_I2H_MAC_MCAST_ADD_RSP
599  */
600 struct bfi_enet_mcast_add_rsp {
601 	struct bfi_msgq_mhdr	mh;
602 	u8			error;
603 	u8			rsvd;
604 	u16			cmd_offset;
605 	u16			handle;
606 	u8			rsvd1[2];
607 };
608 
609 /* bfi_enet_mac_mfilter_del_req is used by:
610  *	BFI_ENET_H2I_MAC_MCAST_DEL_REQ
611  */
612 struct bfi_enet_mcast_del_req {
613 	struct bfi_msgq_mhdr	mh;
614 	u16			handle;
615 	u8			rsvd[2];
616 };
617 
618 /* VLAN
619  *
620  * bfi_enet_rx_vlan_req is used by:
621  *	BFI_ENET_H2I_RX_VLAN_SET_REQ
622  */
623 struct bfi_enet_rx_vlan_req {
624 	struct bfi_msgq_mhdr	mh;
625 	u8			block_idx;
626 	u8			rsvd[3];
627 	u32			bit_mask[BFI_ENET_VLAN_WORDS_MAX];
628 };
629 
630 /* PAUSE
631  *
632  * bfi_enet_set_pause_req is used by:
633  *	BFI_ENET_H2I_SET_PAUSE_REQ
634  */
635 struct bfi_enet_set_pause_req {
636 	struct bfi_msgq_mhdr	mh;
637 	u8			rsvd[2];
638 	u8			tx_pause;	/* 1 = enable;  0 = disable */
639 	u8			rx_pause;	/* 1 = enable;  0 = disable */
640 };
641 
642 /* DIAGNOSTICS
643  *
644  * bfi_enet_diag_lb_req is used by:
645  *      BFI_ENET_H2I_DIAG_LOOPBACK
646  */
647 struct bfi_enet_diag_lb_req {
648 	struct bfi_msgq_mhdr	mh;
649 	u8			rsvd[2];
650 	u8			mode;		/* cable or Serdes */
651 	u8			enable;		/* 1 = enable;  0 = disable */
652 };
653 
654 /* enum for Loopback opmodes */
655 enum {
656 	BFI_ENET_DIAG_LB_OPMODE_EXT = 0,
657 	BFI_ENET_DIAG_LB_OPMODE_CBL = 1,
658 };
659 
660 /* STATISTICS
661  *
662  * bfi_enet_stats_req is used by:
663  *    BFI_ENET_H2I_STATS_GET_REQ
664  *    BFI_ENET_I2H_STATS_CLR_REQ
665  */
666 struct bfi_enet_stats_req {
667 	struct bfi_msgq_mhdr	mh;
668 	u16			stats_mask;
669 	u8			rsvd[2];
670 	u32			rx_enet_mask;
671 	u32			tx_enet_mask;
672 	union bfi_addr_u	host_buffer;
673 };
674 
675 /* defines for "stats_mask" above. */
676 #define BFI_ENET_STATS_MAC    (1 << 0)    /* !< MAC Statistics */
677 #define BFI_ENET_STATS_BPC    (1 << 1)    /* !< Pause Stats from BPC */
678 #define BFI_ENET_STATS_RAD    (1 << 2)    /* !< Rx Admission Statistics */
679 #define BFI_ENET_STATS_RX_FC  (1 << 3)    /* !< Rx FC Stats from RxA */
680 #define BFI_ENET_STATS_TX_FC  (1 << 4)    /* !< Tx FC Stats from TxA */
681 
682 #define BFI_ENET_STATS_ALL    0x1f
683 
684 /* TxF Frame Statistics */
685 struct bfi_enet_stats_txf {
686 	u64 ucast_octets;
687 	u64 ucast;
688 	u64 ucast_vlan;
689 
690 	u64 mcast_octets;
691 	u64 mcast;
692 	u64 mcast_vlan;
693 
694 	u64 bcast_octets;
695 	u64 bcast;
696 	u64 bcast_vlan;
697 
698 	u64 errors;
699 	u64 filter_vlan;      /* frames filtered due to VLAN */
700 	u64 filter_mac_sa;    /* frames filtered due to SA check */
701 };
702 
703 /* RxF Frame Statistics */
704 struct bfi_enet_stats_rxf {
705 	u64 ucast_octets;
706 	u64 ucast;
707 	u64 ucast_vlan;
708 
709 	u64 mcast_octets;
710 	u64 mcast;
711 	u64 mcast_vlan;
712 
713 	u64 bcast_octets;
714 	u64 bcast;
715 	u64 bcast_vlan;
716 	u64 frame_drops;
717 };
718 
719 /* FC Tx Frame Statistics */
720 struct bfi_enet_stats_fc_tx {
721 	u64 txf_ucast_octets;
722 	u64 txf_ucast;
723 	u64 txf_ucast_vlan;
724 
725 	u64 txf_mcast_octets;
726 	u64 txf_mcast;
727 	u64 txf_mcast_vlan;
728 
729 	u64 txf_bcast_octets;
730 	u64 txf_bcast;
731 	u64 txf_bcast_vlan;
732 
733 	u64 txf_parity_errors;
734 	u64 txf_timeout;
735 	u64 txf_fid_parity_errors;
736 };
737 
738 /* FC Rx Frame Statistics */
739 struct bfi_enet_stats_fc_rx {
740 	u64 rxf_ucast_octets;
741 	u64 rxf_ucast;
742 	u64 rxf_ucast_vlan;
743 
744 	u64 rxf_mcast_octets;
745 	u64 rxf_mcast;
746 	u64 rxf_mcast_vlan;
747 
748 	u64 rxf_bcast_octets;
749 	u64 rxf_bcast;
750 	u64 rxf_bcast_vlan;
751 };
752 
753 /* RAD Frame Statistics */
754 struct bfi_enet_stats_rad {
755 	u64 rx_frames;
756 	u64 rx_octets;
757 	u64 rx_vlan_frames;
758 
759 	u64 rx_ucast;
760 	u64 rx_ucast_octets;
761 	u64 rx_ucast_vlan;
762 
763 	u64 rx_mcast;
764 	u64 rx_mcast_octets;
765 	u64 rx_mcast_vlan;
766 
767 	u64 rx_bcast;
768 	u64 rx_bcast_octets;
769 	u64 rx_bcast_vlan;
770 
771 	u64 rx_drops;
772 };
773 
774 /* BPC Tx Registers */
775 struct bfi_enet_stats_bpc {
776 	/* transmit stats */
777 	u64 tx_pause[8];
778 	u64 tx_zero_pause[8];	/*!< Pause cancellation */
779 	/*!<Pause initiation rather than retention */
780 	u64 tx_first_pause[8];
781 
782 	/* receive stats */
783 	u64 rx_pause[8];
784 	u64 rx_zero_pause[8];	/*!< Pause cancellation */
785 	/*!<Pause initiation rather than retention */
786 	u64 rx_first_pause[8];
787 };
788 
789 /* MAC Rx Statistics */
790 struct bfi_enet_stats_mac {
791 	u64 stats_clr_cnt;	/* times this stats cleared */
792 	u64 frame_64;		/* both rx and tx counter */
793 	u64 frame_65_127;		/* both rx and tx counter */
794 	u64 frame_128_255;		/* both rx and tx counter */
795 	u64 frame_256_511;		/* both rx and tx counter */
796 	u64 frame_512_1023;	/* both rx and tx counter */
797 	u64 frame_1024_1518;	/* both rx and tx counter */
798 	u64 frame_1519_1522;	/* both rx and tx counter */
799 
800 	/* receive stats */
801 	u64 rx_bytes;
802 	u64 rx_packets;
803 	u64 rx_fcs_error;
804 	u64 rx_multicast;
805 	u64 rx_broadcast;
806 	u64 rx_control_frames;
807 	u64 rx_pause;
808 	u64 rx_unknown_opcode;
809 	u64 rx_alignment_error;
810 	u64 rx_frame_length_error;
811 	u64 rx_code_error;
812 	u64 rx_carrier_sense_error;
813 	u64 rx_undersize;
814 	u64 rx_oversize;
815 	u64 rx_fragments;
816 	u64 rx_jabber;
817 	u64 rx_drop;
818 
819 	/* transmit stats */
820 	u64 tx_bytes;
821 	u64 tx_packets;
822 	u64 tx_multicast;
823 	u64 tx_broadcast;
824 	u64 tx_pause;
825 	u64 tx_deferral;
826 	u64 tx_excessive_deferral;
827 	u64 tx_single_collision;
828 	u64 tx_muliple_collision;
829 	u64 tx_late_collision;
830 	u64 tx_excessive_collision;
831 	u64 tx_total_collision;
832 	u64 tx_pause_honored;
833 	u64 tx_drop;
834 	u64 tx_jabber;
835 	u64 tx_fcs_error;
836 	u64 tx_control_frame;
837 	u64 tx_oversize;
838 	u64 tx_undersize;
839 	u64 tx_fragments;
840 };
841 
842 /* Complete statistics, DMAed from fw to host followed by
843  * BFI_ENET_I2H_STATS_GET_RSP
844  */
845 struct bfi_enet_stats {
846 	struct bfi_enet_stats_mac	mac_stats;
847 	struct bfi_enet_stats_bpc	bpc_stats;
848 	struct bfi_enet_stats_rad	rad_stats;
849 	struct bfi_enet_stats_rad	rlb_stats;
850 	struct bfi_enet_stats_fc_rx	fc_rx_stats;
851 	struct bfi_enet_stats_fc_tx	fc_tx_stats;
852 	struct bfi_enet_stats_rxf	rxf_stats[BFI_ENET_CFG_MAX];
853 	struct bfi_enet_stats_txf	txf_stats[BFI_ENET_CFG_MAX];
854 };
855 
856 #pragma pack()
857 
858 #endif  /* __BFI_ENET_H__ */
859