1 /* 2 * Linux network driver for Brocade Converged Network Adapter. 3 * 4 * This program is free software; you can redistribute it and/or modify it 5 * under the terms of the GNU General Public License (GPL) Version 2 as 6 * published by the Free Software Foundation 7 * 8 * This program is distributed in the hope that it will be useful, but 9 * WITHOUT ANY WARRANTY; without even the implied warranty of 10 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU 11 * General Public License for more details. 12 */ 13 /* 14 * Copyright (c) 2005-2010 Brocade Communications Systems, Inc. 15 * All rights reserved 16 * www.brocade.com 17 */ 18 #ifndef __BFI_H__ 19 #define __BFI_H__ 20 21 #include "bfa_defs.h" 22 23 #pragma pack(1) 24 25 /** 26 * BFI FW image type 27 */ 28 #define BFI_FLASH_CHUNK_SZ 256 /*!< Flash chunk size */ 29 #define BFI_FLASH_CHUNK_SZ_WORDS (BFI_FLASH_CHUNK_SZ/sizeof(u32)) 30 31 /** 32 * Msg header common to all msgs 33 */ 34 struct bfi_mhdr { 35 u8 msg_class; /*!< @ref enum bfi_mclass */ 36 u8 msg_id; /*!< msg opcode with in the class */ 37 union { 38 struct { 39 u8 qid; 40 u8 fn_lpu; /*!< msg destination */ 41 } h2i; 42 u16 i2htok; /*!< token in msgs to host */ 43 } mtag; 44 }; 45 46 #define bfi_fn_lpu(__fn, __lpu) ((__fn) << 1 | (__lpu)) 47 #define bfi_mhdr_2_fn(_mh) ((_mh)->mtag.h2i.fn_lpu >> 1) 48 #define bfi_mhdr_2_qid(_mh) ((_mh)->mtag.h2i.qid) 49 50 #define bfi_h2i_set(_mh, _mc, _op, _fn_lpu) do { \ 51 (_mh).msg_class = (_mc); \ 52 (_mh).msg_id = (_op); \ 53 (_mh).mtag.h2i.fn_lpu = (_fn_lpu); \ 54 } while (0) 55 56 #define bfi_i2h_set(_mh, _mc, _op, _i2htok) do { \ 57 (_mh).msg_class = (_mc); \ 58 (_mh).msg_id = (_op); \ 59 (_mh).mtag.i2htok = (_i2htok); \ 60 } while (0) 61 62 /* 63 * Message opcodes: 0-127 to firmware, 128-255 to host 64 */ 65 #define BFI_I2H_OPCODE_BASE 128 66 #define BFA_I2HM(_x) ((_x) + BFI_I2H_OPCODE_BASE) 67 68 /** 69 **************************************************************************** 70 * 71 * Scatter Gather Element and Page definition 72 * 73 **************************************************************************** 74 */ 75 76 /** 77 * DMA addresses 78 */ 79 union bfi_addr_u { 80 struct { 81 u32 addr_lo; 82 u32 addr_hi; 83 } a32; 84 }; 85 86 /* 87 * Large Message structure - 128 Bytes size Msgs 88 */ 89 #define BFI_LMSG_SZ 128 90 #define BFI_LMSG_PL_WSZ \ 91 ((BFI_LMSG_SZ - sizeof(struct bfi_mhdr)) / 4) 92 93 /** 94 * Mailbox message structure 95 */ 96 #define BFI_MBMSG_SZ 7 97 struct bfi_mbmsg { 98 struct bfi_mhdr mh; 99 u32 pl[BFI_MBMSG_SZ]; 100 }; 101 102 /** 103 * Supported PCI function class codes (personality) 104 */ 105 enum bfi_pcifn_class { 106 BFI_PCIFN_CLASS_FC = 0x0c04, 107 BFI_PCIFN_CLASS_ETH = 0x0200, 108 }; 109 110 /** 111 * Message Classes 112 */ 113 enum bfi_mclass { 114 BFI_MC_IOC = 1, /*!< IO Controller (IOC) */ 115 BFI_MC_DIAG = 2, /*!< Diagnostic Msgs */ 116 BFI_MC_FLASH = 3, /*!< Flash message class */ 117 BFI_MC_CEE = 4, /*!< CEE */ 118 BFI_MC_FCPORT = 5, /*!< FC port */ 119 BFI_MC_IOCFC = 6, /*!< FC - IO Controller (IOC) */ 120 BFI_MC_LL = 7, /*!< Link Layer */ 121 BFI_MC_UF = 8, /*!< Unsolicited frame receive */ 122 BFI_MC_FCXP = 9, /*!< FC Transport */ 123 BFI_MC_LPS = 10, /*!< lport fc login services */ 124 BFI_MC_RPORT = 11, /*!< Remote port */ 125 BFI_MC_ITNIM = 12, /*!< I-T nexus (Initiator mode) */ 126 BFI_MC_IOIM_READ = 13, /*!< read IO (Initiator mode) */ 127 BFI_MC_IOIM_WRITE = 14, /*!< write IO (Initiator mode) */ 128 BFI_MC_IOIM_IO = 15, /*!< IO (Initiator mode) */ 129 BFI_MC_IOIM = 16, /*!< IO (Initiator mode) */ 130 BFI_MC_IOIM_IOCOM = 17, /*!< good IO completion */ 131 BFI_MC_TSKIM = 18, /*!< Initiator Task management */ 132 BFI_MC_SBOOT = 19, /*!< SAN boot services */ 133 BFI_MC_IPFC = 20, /*!< IP over FC Msgs */ 134 BFI_MC_PORT = 21, /*!< Physical port */ 135 BFI_MC_SFP = 22, /*!< SFP module */ 136 BFI_MC_MSGQ = 23, /*!< MSGQ */ 137 BFI_MC_ENET = 24, /*!< ENET commands/responses */ 138 BFI_MC_PHY = 25, /*!< External PHY message class */ 139 BFI_MC_NBOOT = 26, /*!< Network Boot */ 140 BFI_MC_TIO_READ = 27, /*!< read IO (Target mode) */ 141 BFI_MC_TIO_WRITE = 28, /*!< write IO (Target mode) */ 142 BFI_MC_TIO_DATA_XFERED = 29, /*!< ds transferred (target mode) */ 143 BFI_MC_TIO_IO = 30, /*!< IO (Target mode) */ 144 BFI_MC_TIO = 31, /*!< IO (target mode) */ 145 BFI_MC_MFG = 32, /*!< MFG/ASIC block commands */ 146 BFI_MC_EDMA = 33, /*!< EDMA copy commands */ 147 BFI_MC_MAX = 34 148 }; 149 150 #define BFI_IOC_MSGLEN_MAX 32 /* 32 bytes */ 151 152 #define BFI_FWBOOT_ENV_OS 0 153 154 /** 155 *---------------------------------------------------------------------- 156 * IOC 157 *---------------------------------------------------------------------- 158 */ 159 160 /** 161 * Different asic generations 162 */ 163 enum bfi_asic_gen { 164 BFI_ASIC_GEN_CB = 1, 165 BFI_ASIC_GEN_CT = 2, 166 BFI_ASIC_GEN_CT2 = 3, 167 }; 168 169 enum bfi_asic_mode { 170 BFI_ASIC_MODE_FC = 1, /* FC upto 8G speed */ 171 BFI_ASIC_MODE_FC16 = 2, /* FC upto 16G speed */ 172 BFI_ASIC_MODE_ETH = 3, /* Ethernet ports */ 173 BFI_ASIC_MODE_COMBO = 4, /* FC 16G and Ethernet 10G port */ 174 }; 175 176 enum bfi_ioc_h2i_msgs { 177 BFI_IOC_H2I_ENABLE_REQ = 1, 178 BFI_IOC_H2I_DISABLE_REQ = 2, 179 BFI_IOC_H2I_GETATTR_REQ = 3, 180 BFI_IOC_H2I_DBG_SYNC = 4, 181 BFI_IOC_H2I_DBG_DUMP = 5, 182 }; 183 184 enum bfi_ioc_i2h_msgs { 185 BFI_IOC_I2H_ENABLE_REPLY = BFA_I2HM(1), 186 BFI_IOC_I2H_DISABLE_REPLY = BFA_I2HM(2), 187 BFI_IOC_I2H_GETATTR_REPLY = BFA_I2HM(3), 188 BFI_IOC_I2H_HBEAT = BFA_I2HM(4), 189 }; 190 191 /** 192 * BFI_IOC_H2I_GETATTR_REQ message 193 */ 194 struct bfi_ioc_getattr_req { 195 struct bfi_mhdr mh; 196 union bfi_addr_u attr_addr; 197 }; 198 199 struct bfi_ioc_attr { 200 u64 mfg_pwwn; /*!< Mfg port wwn */ 201 u64 mfg_nwwn; /*!< Mfg node wwn */ 202 mac_t mfg_mac; /*!< Mfg mac */ 203 u8 port_mode; /* enum bfi_port_mode */ 204 u8 rsvd_a; 205 u64 pwwn; 206 u64 nwwn; 207 mac_t mac; /*!< PBC or Mfg mac */ 208 u16 rsvd_b; 209 mac_t fcoe_mac; 210 u16 rsvd_c; 211 char brcd_serialnum[STRSZ(BFA_MFG_SERIALNUM_SIZE)]; 212 u8 pcie_gen; 213 u8 pcie_lanes_orig; 214 u8 pcie_lanes; 215 u8 rx_bbcredit; /*!< receive buffer credits */ 216 u32 adapter_prop; /*!< adapter properties */ 217 u16 maxfrsize; /*!< max receive frame size */ 218 char asic_rev; 219 u8 rsvd_d; 220 char fw_version[BFA_VERSION_LEN]; 221 char optrom_version[BFA_VERSION_LEN]; 222 struct bfa_mfg_vpd vpd; 223 u32 card_type; /*!< card type */ 224 }; 225 226 /** 227 * BFI_IOC_I2H_GETATTR_REPLY message 228 */ 229 struct bfi_ioc_getattr_reply { 230 struct bfi_mhdr mh; /*!< Common msg header */ 231 u8 status; /*!< cfg reply status */ 232 u8 rsvd[3]; 233 }; 234 235 /** 236 * Firmware memory page offsets 237 */ 238 #define BFI_IOC_SMEM_PG0_CB (0x40) 239 #define BFI_IOC_SMEM_PG0_CT (0x180) 240 241 /** 242 * Firmware statistic offset 243 */ 244 #define BFI_IOC_FWSTATS_OFF (0x6B40) 245 #define BFI_IOC_FWSTATS_SZ (4096) 246 247 /** 248 * Firmware trace offset 249 */ 250 #define BFI_IOC_TRC_OFF (0x4b00) 251 #define BFI_IOC_TRC_ENTS 256 252 253 #define BFI_IOC_FW_SIGNATURE (0xbfadbfad) 254 #define BFI_IOC_MD5SUM_SZ 4 255 struct bfi_ioc_image_hdr { 256 u32 signature; /*!< constant signature */ 257 u8 asic_gen; /*!< asic generation */ 258 u8 asic_mode; 259 u8 port0_mode; /*!< device mode for port 0 */ 260 u8 port1_mode; /*!< device mode for port 1 */ 261 u32 exec; /*!< exec vector */ 262 u32 bootenv; /*!< firmware boot env */ 263 u32 rsvd_b[4]; 264 u32 md5sum[BFI_IOC_MD5SUM_SZ]; 265 }; 266 267 #define BFI_FWBOOT_DEVMODE_OFF 4 268 #define BFI_FWBOOT_TYPE_OFF 8 269 #define BFI_FWBOOT_ENV_OFF 12 270 #define BFI_FWBOOT_DEVMODE(__asic_gen, __asic_mode, __p0_mode, __p1_mode) \ 271 (((u32)(__asic_gen)) << 24 | \ 272 ((u32)(__asic_mode)) << 16 | \ 273 ((u32)(__p0_mode)) << 8 | \ 274 ((u32)(__p1_mode))) 275 276 enum bfi_fwboot_type { 277 BFI_FWBOOT_TYPE_NORMAL = 0, 278 BFI_FWBOOT_TYPE_FLASH = 1, 279 BFI_FWBOOT_TYPE_MEMTEST = 2, 280 }; 281 282 enum bfi_port_mode { 283 BFI_PORT_MODE_FC = 1, 284 BFI_PORT_MODE_ETH = 2, 285 }; 286 287 struct bfi_ioc_hbeat { 288 struct bfi_mhdr mh; /*!< common msg header */ 289 u32 hb_count; /*!< current heart beat count */ 290 }; 291 292 /** 293 * IOC hardware/firmware state 294 */ 295 enum bfi_ioc_state { 296 BFI_IOC_UNINIT = 0, /*!< not initialized */ 297 BFI_IOC_INITING = 1, /*!< h/w is being initialized */ 298 BFI_IOC_HWINIT = 2, /*!< h/w is initialized */ 299 BFI_IOC_CFG = 3, /*!< IOC configuration in progress */ 300 BFI_IOC_OP = 4, /*!< IOC is operational */ 301 BFI_IOC_DISABLING = 5, /*!< IOC is being disabled */ 302 BFI_IOC_DISABLED = 6, /*!< IOC is disabled */ 303 BFI_IOC_CFG_DISABLED = 7, /*!< IOC is being disabled;transient */ 304 BFI_IOC_FAIL = 8, /*!< IOC heart-beat failure */ 305 BFI_IOC_MEMTEST = 9, /*!< IOC is doing memtest */ 306 }; 307 308 #define BFI_IOC_ENDIAN_SIG 0x12345678 309 310 enum { 311 BFI_ADAPTER_TYPE_FC = 0x01, /*!< FC adapters */ 312 BFI_ADAPTER_TYPE_MK = 0x0f0000, /*!< adapter type mask */ 313 BFI_ADAPTER_TYPE_SH = 16, /*!< adapter type shift */ 314 BFI_ADAPTER_NPORTS_MK = 0xff00, /*!< number of ports mask */ 315 BFI_ADAPTER_NPORTS_SH = 8, /*!< number of ports shift */ 316 BFI_ADAPTER_SPEED_MK = 0xff, /*!< adapter speed mask */ 317 BFI_ADAPTER_SPEED_SH = 0, /*!< adapter speed shift */ 318 BFI_ADAPTER_PROTO = 0x100000, /*!< prototype adapaters */ 319 BFI_ADAPTER_TTV = 0x200000, /*!< TTV debug capable */ 320 BFI_ADAPTER_UNSUPP = 0x400000, /*!< unknown adapter type */ 321 }; 322 323 #define BFI_ADAPTER_GETP(__prop, __adap_prop) \ 324 (((__adap_prop) & BFI_ADAPTER_ ## __prop ## _MK) >> \ 325 BFI_ADAPTER_ ## __prop ## _SH) 326 #define BFI_ADAPTER_SETP(__prop, __val) \ 327 ((__val) << BFI_ADAPTER_ ## __prop ## _SH) 328 #define BFI_ADAPTER_IS_PROTO(__adap_type) \ 329 ((__adap_type) & BFI_ADAPTER_PROTO) 330 #define BFI_ADAPTER_IS_TTV(__adap_type) \ 331 ((__adap_type) & BFI_ADAPTER_TTV) 332 #define BFI_ADAPTER_IS_UNSUPP(__adap_type) \ 333 ((__adap_type) & BFI_ADAPTER_UNSUPP) 334 #define BFI_ADAPTER_IS_SPECIAL(__adap_type) \ 335 ((__adap_type) & (BFI_ADAPTER_TTV | BFI_ADAPTER_PROTO | \ 336 BFI_ADAPTER_UNSUPP)) 337 338 /** 339 * BFI_IOC_H2I_ENABLE_REQ & BFI_IOC_H2I_DISABLE_REQ messages 340 */ 341 struct bfi_ioc_ctrl_req { 342 struct bfi_mhdr mh; 343 u16 clscode; 344 u16 rsvd; 345 u32 tv_sec; 346 }; 347 348 /** 349 * BFI_IOC_I2H_ENABLE_REPLY & BFI_IOC_I2H_DISABLE_REPLY messages 350 */ 351 struct bfi_ioc_ctrl_reply { 352 struct bfi_mhdr mh; /*!< Common msg header */ 353 u8 status; /*!< enable/disable status */ 354 u8 port_mode; /*!< enum bfa_mode */ 355 u8 cap_bm; /*!< capability bit mask */ 356 u8 rsvd; 357 }; 358 359 #define BFI_IOC_MSGSZ 8 360 /** 361 * H2I Messages 362 */ 363 union bfi_ioc_h2i_msg_u { 364 struct bfi_mhdr mh; 365 struct bfi_ioc_ctrl_req enable_req; 366 struct bfi_ioc_ctrl_req disable_req; 367 struct bfi_ioc_getattr_req getattr_req; 368 u32 mboxmsg[BFI_IOC_MSGSZ]; 369 }; 370 371 /** 372 * I2H Messages 373 */ 374 union bfi_ioc_i2h_msg_u { 375 struct bfi_mhdr mh; 376 struct bfi_ioc_ctrl_reply fw_event; 377 u32 mboxmsg[BFI_IOC_MSGSZ]; 378 }; 379 380 /** 381 *---------------------------------------------------------------------- 382 * MSGQ 383 *---------------------------------------------------------------------- 384 */ 385 386 enum bfi_msgq_h2i_msgs { 387 BFI_MSGQ_H2I_INIT_REQ = 1, 388 BFI_MSGQ_H2I_DOORBELL_PI = 2, 389 BFI_MSGQ_H2I_DOORBELL_CI = 3, 390 BFI_MSGQ_H2I_CMDQ_COPY_RSP = 4, 391 }; 392 393 enum bfi_msgq_i2h_msgs { 394 BFI_MSGQ_I2H_INIT_RSP = BFA_I2HM(BFI_MSGQ_H2I_INIT_REQ), 395 BFI_MSGQ_I2H_DOORBELL_PI = BFA_I2HM(BFI_MSGQ_H2I_DOORBELL_PI), 396 BFI_MSGQ_I2H_DOORBELL_CI = BFA_I2HM(BFI_MSGQ_H2I_DOORBELL_CI), 397 BFI_MSGQ_I2H_CMDQ_COPY_REQ = BFA_I2HM(BFI_MSGQ_H2I_CMDQ_COPY_RSP), 398 }; 399 400 /* Messages(commands/responsed/AENS will have the following header */ 401 struct bfi_msgq_mhdr { 402 u8 msg_class; 403 u8 msg_id; 404 u16 msg_token; 405 u16 num_entries; 406 u8 enet_id; 407 u8 rsvd[1]; 408 }; 409 410 #define bfi_msgq_mhdr_set(_mh, _mc, _mid, _tok, _enet_id) do { \ 411 (_mh).msg_class = (_mc); \ 412 (_mh).msg_id = (_mid); \ 413 (_mh).msg_token = (_tok); \ 414 (_mh).enet_id = (_enet_id); \ 415 } while (0) 416 417 /* 418 * Mailbox for messaging interface 419 */ 420 #define BFI_MSGQ_CMD_ENTRY_SIZE (64) /* TBD */ 421 #define BFI_MSGQ_RSP_ENTRY_SIZE (64) /* TBD */ 422 423 #define bfi_msgq_num_cmd_entries(_size) \ 424 (((_size) + BFI_MSGQ_CMD_ENTRY_SIZE - 1) / BFI_MSGQ_CMD_ENTRY_SIZE) 425 426 struct bfi_msgq { 427 union bfi_addr_u addr; 428 u16 q_depth; /* Total num of entries in the queue */ 429 u8 rsvd[2]; 430 }; 431 432 /* BFI_ENET_MSGQ_CFG_REQ TBD init or cfg? */ 433 struct bfi_msgq_cfg_req { 434 struct bfi_mhdr mh; 435 struct bfi_msgq cmdq; 436 struct bfi_msgq rspq; 437 }; 438 439 /* BFI_ENET_MSGQ_CFG_RSP */ 440 struct bfi_msgq_cfg_rsp { 441 struct bfi_mhdr mh; 442 u8 cmd_status; 443 u8 rsvd[3]; 444 }; 445 446 /* BFI_MSGQ_H2I_DOORBELL */ 447 struct bfi_msgq_h2i_db { 448 struct bfi_mhdr mh; 449 union { 450 u16 cmdq_pi; 451 u16 rspq_ci; 452 } idx; 453 }; 454 455 /* BFI_MSGQ_I2H_DOORBELL */ 456 struct bfi_msgq_i2h_db { 457 struct bfi_mhdr mh; 458 union { 459 u16 rspq_pi; 460 u16 cmdq_ci; 461 } idx; 462 }; 463 464 #define BFI_CMD_COPY_SZ 28 465 466 /* BFI_MSGQ_H2I_CMD_COPY_RSP */ 467 struct bfi_msgq_h2i_cmdq_copy_rsp { 468 struct bfi_mhdr mh; 469 u8 data[BFI_CMD_COPY_SZ]; 470 }; 471 472 /* BFI_MSGQ_I2H_CMD_COPY_REQ */ 473 struct bfi_msgq_i2h_cmdq_copy_req { 474 struct bfi_mhdr mh; 475 u16 offset; 476 u16 len; 477 }; 478 479 #pragma pack() 480 481 #endif /* __BFI_H__ */ 482