xref: /linux/drivers/net/ethernet/broadcom/bnxt/bnxt_ptp.h (revision 001821b0e79716c4e17c71d8e053a23599a7a508)
1 /* Broadcom NetXtreme-C/E network driver.
2  *
3  * Copyright (c) 2021 Broadcom Inc.
4  *
5  * This program is free software; you can redistribute it and/or modify
6  * it under the terms of the GNU General Public License as published by
7  * the Free Software Foundation.
8  */
9 
10 #ifndef BNXT_PTP_H
11 #define BNXT_PTP_H
12 
13 #include <linux/ptp_clock_kernel.h>
14 #include <linux/timecounter.h>
15 
16 #define BNXT_PTP_GRC_WIN	6
17 #define BNXT_PTP_GRC_WIN_BASE	0x6000
18 
19 #define BNXT_MAX_PHC_DRIFT	31000000
20 #define BNXT_CYCLES_SHIFT	23
21 #define BNXT_DEVCLK_FREQ	1000000
22 #define BNXT_LO_TIMER_MASK	0x0000ffffffffUL
23 #define BNXT_HI_TIMER_MASK	0xffff00000000UL
24 
25 #define BNXT_PTP_DFLT_TX_TMO	1000 /* ms */
26 #define BNXT_PTP_QTS_TIMEOUT	1000
27 #define BNXT_PTP_QTS_MAX_TMO_US	65535U
28 #define BNXT_PTP_QTS_TX_ENABLES	(PORT_TS_QUERY_REQ_ENABLES_PTP_SEQ_ID |	\
29 				 PORT_TS_QUERY_REQ_ENABLES_TS_REQ_TIMEOUT | \
30 				 PORT_TS_QUERY_REQ_ENABLES_PTP_HDR_OFFSET)
31 
32 struct pps_pin {
33 	u8 event;
34 	u8 usage;
35 	u8 state;
36 };
37 
38 #define TSIO_PIN_VALID(pin) ((pin) >= 0 && (pin) < (BNXT_MAX_TSIO_PINS))
39 
40 #define EVENT_DATA2_PPS_EVENT_TYPE(data2)				\
41 	((data2) & ASYNC_EVENT_CMPL_PPS_TIMESTAMP_EVENT_DATA2_EVENT_TYPE)
42 
43 #define EVENT_DATA2_PPS_PIN_NUM(data2)					\
44 	(((data2) &							\
45 	  ASYNC_EVENT_CMPL_PPS_TIMESTAMP_EVENT_DATA2_PIN_NUMBER_MASK) >>\
46 	 ASYNC_EVENT_CMPL_PPS_TIMESTAMP_EVENT_DATA2_PIN_NUMBER_SFT)
47 
48 #define BNXT_DATA2_UPPER_MSK						\
49 	ASYNC_EVENT_CMPL_PPS_TIMESTAMP_EVENT_DATA2_PPS_TIMESTAMP_UPPER_MASK
50 
51 #define BNXT_DATA2_UPPER_SFT						\
52 	(32 -								\
53 	 ASYNC_EVENT_CMPL_PPS_TIMESTAMP_EVENT_DATA2_PPS_TIMESTAMP_UPPER_SFT)
54 
55 #define BNXT_DATA1_LOWER_MSK						\
56 	ASYNC_EVENT_CMPL_PPS_TIMESTAMP_EVENT_DATA1_PPS_TIMESTAMP_LOWER_MASK
57 
58 #define BNXT_DATA1_LOWER_SFT						\
59 	  ASYNC_EVENT_CMPL_PPS_TIMESTAMP_EVENT_DATA1_PPS_TIMESTAMP_LOWER_SFT
60 
61 #define EVENT_PPS_TS(data2, data1)					\
62 	(((u64)((data2) & BNXT_DATA2_UPPER_MSK) << BNXT_DATA2_UPPER_SFT) |\
63 	 (((data1) & BNXT_DATA1_LOWER_MSK) >> BNXT_DATA1_LOWER_SFT))
64 
65 #define BNXT_PPS_PIN_DISABLE	0
66 #define BNXT_PPS_PIN_ENABLE	1
67 #define BNXT_PPS_PIN_NONE	0
68 #define BNXT_PPS_PIN_PPS_IN	1
69 #define BNXT_PPS_PIN_PPS_OUT	2
70 #define BNXT_PPS_PIN_SYNC_IN	3
71 #define BNXT_PPS_PIN_SYNC_OUT	4
72 
73 #define BNXT_PPS_EVENT_INTERNAL	1
74 #define BNXT_PPS_EVENT_EXTERNAL	2
75 
76 struct bnxt_pps {
77 	u8 num_pins;
78 #define BNXT_MAX_TSIO_PINS	4
79 	struct pps_pin pins[BNXT_MAX_TSIO_PINS];
80 };
81 
82 struct bnxt_ptp_cfg {
83 	struct ptp_clock_info	ptp_info;
84 	struct ptp_clock	*ptp_clock;
85 	struct cyclecounter	cc;
86 	struct timecounter	tc;
87 	struct bnxt_pps		pps_info;
88 	/* serialize timecounter access */
89 	spinlock_t		ptp_lock;
90 	struct sk_buff		*tx_skb;
91 	u64			current_time;
92 	u64			old_time;
93 	unsigned long		next_period;
94 	unsigned long		next_overflow_check;
95 	u32			cmult;
96 	/* a 23b shift cyclecounter will overflow in ~36 mins.  Check overflow every 18 mins. */
97 	#define BNXT_PHC_OVERFLOW_PERIOD	(18 * 60 * HZ)
98 
99 	u16			tx_seqid;
100 	u16			tx_hdr_off;
101 	struct bnxt		*bp;
102 	atomic_t		tx_avail;
103 #define BNXT_MAX_TX_TS	1
104 	u16			rxctl;
105 #define BNXT_PTP_MSG_SYNC			(1 << 0)
106 #define BNXT_PTP_MSG_DELAY_REQ			(1 << 1)
107 #define BNXT_PTP_MSG_PDELAY_REQ			(1 << 2)
108 #define BNXT_PTP_MSG_PDELAY_RESP		(1 << 3)
109 #define BNXT_PTP_MSG_FOLLOW_UP			(1 << 8)
110 #define BNXT_PTP_MSG_DELAY_RESP			(1 << 9)
111 #define BNXT_PTP_MSG_PDELAY_RESP_FOLLOW_UP	(1 << 10)
112 #define BNXT_PTP_MSG_ANNOUNCE			(1 << 11)
113 #define BNXT_PTP_MSG_SIGNALING			(1 << 12)
114 #define BNXT_PTP_MSG_MANAGEMENT			(1 << 13)
115 #define BNXT_PTP_MSG_EVENTS		(BNXT_PTP_MSG_SYNC |		\
116 					 BNXT_PTP_MSG_DELAY_REQ |	\
117 					 BNXT_PTP_MSG_PDELAY_REQ |	\
118 					 BNXT_PTP_MSG_PDELAY_RESP)
119 	u8			tx_tstamp_en:1;
120 	u8			txts_pending:1;
121 	int			rx_filter;
122 	u32			tstamp_filters;
123 
124 	u32			refclk_regs[2];
125 	u32			refclk_mapped_regs[2];
126 	u32			txts_tmo;
127 	unsigned long		abs_txts_tmo;
128 };
129 
130 #if BITS_PER_LONG == 32
131 #define BNXT_READ_TIME64(ptp, dst, src)		\
132 do {						\
133 	spin_lock_bh(&(ptp)->ptp_lock);		\
134 	(dst) = (src);				\
135 	spin_unlock_bh(&(ptp)->ptp_lock);	\
136 } while (0)
137 #else
138 #define BNXT_READ_TIME64(ptp, dst, src)		\
139 	((dst) = READ_ONCE(src))
140 #endif
141 
142 int bnxt_ptp_parse(struct sk_buff *skb, u16 *seq_id, u16 *hdr_off);
143 void bnxt_ptp_update_current_time(struct bnxt *bp);
144 void bnxt_ptp_pps_event(struct bnxt *bp, u32 data1, u32 data2);
145 int bnxt_ptp_cfg_tstamp_filters(struct bnxt *bp);
146 void bnxt_ptp_reapply_pps(struct bnxt *bp);
147 int bnxt_hwtstamp_set(struct net_device *dev, struct ifreq *ifr);
148 int bnxt_hwtstamp_get(struct net_device *dev, struct ifreq *ifr);
149 int bnxt_get_tx_ts_p5(struct bnxt *bp, struct sk_buff *skb);
150 int bnxt_get_rx_ts_p5(struct bnxt *bp, u64 *ts, u32 pkt_ts);
151 void bnxt_ptp_rtc_timecounter_init(struct bnxt_ptp_cfg *ptp, u64 ns);
152 int bnxt_ptp_init_rtc(struct bnxt *bp, bool phc_cfg);
153 int bnxt_ptp_init(struct bnxt *bp, bool phc_cfg);
154 void bnxt_ptp_clear(struct bnxt *bp);
155 #endif
156