xref: /linux/drivers/net/ethernet/broadcom/bnxt/bnxt_ethtool.c (revision b9b77222d4ff6b5bb8f5d87fca20de0910618bb9)
1 /* Broadcom NetXtreme-C/E network driver.
2  *
3  * Copyright (c) 2014-2016 Broadcom Corporation
4  * Copyright (c) 2016-2017 Broadcom Limited
5  *
6  * This program is free software; you can redistribute it and/or modify
7  * it under the terms of the GNU General Public License as published by
8  * the Free Software Foundation.
9  */
10 
11 #include <linux/ctype.h>
12 #include <linux/stringify.h>
13 #include <linux/ethtool.h>
14 #include <linux/interrupt.h>
15 #include <linux/pci.h>
16 #include <linux/etherdevice.h>
17 #include <linux/crc32.h>
18 #include <linux/firmware.h>
19 #include "bnxt_hsi.h"
20 #include "bnxt.h"
21 #include "bnxt_xdp.h"
22 #include "bnxt_ethtool.h"
23 #include "bnxt_nvm_defs.h"	/* NVRAM content constant and structure defs */
24 #include "bnxt_fw_hdr.h"	/* Firmware hdr constant and structure defs */
25 #define FLASH_NVRAM_TIMEOUT	((HWRM_CMD_TIMEOUT) * 100)
26 #define FLASH_PACKAGE_TIMEOUT	((HWRM_CMD_TIMEOUT) * 200)
27 #define INSTALL_PACKAGE_TIMEOUT	((HWRM_CMD_TIMEOUT) * 200)
28 
29 static u32 bnxt_get_msglevel(struct net_device *dev)
30 {
31 	struct bnxt *bp = netdev_priv(dev);
32 
33 	return bp->msg_enable;
34 }
35 
36 static void bnxt_set_msglevel(struct net_device *dev, u32 value)
37 {
38 	struct bnxt *bp = netdev_priv(dev);
39 
40 	bp->msg_enable = value;
41 }
42 
43 static int bnxt_get_coalesce(struct net_device *dev,
44 			     struct ethtool_coalesce *coal)
45 {
46 	struct bnxt *bp = netdev_priv(dev);
47 	struct bnxt_coal *hw_coal;
48 	u16 mult;
49 
50 	memset(coal, 0, sizeof(*coal));
51 
52 	coal->use_adaptive_rx_coalesce = bp->flags & BNXT_FLAG_DIM;
53 
54 	hw_coal = &bp->rx_coal;
55 	mult = hw_coal->bufs_per_record;
56 	coal->rx_coalesce_usecs = hw_coal->coal_ticks;
57 	coal->rx_max_coalesced_frames = hw_coal->coal_bufs / mult;
58 	coal->rx_coalesce_usecs_irq = hw_coal->coal_ticks_irq;
59 	coal->rx_max_coalesced_frames_irq = hw_coal->coal_bufs_irq / mult;
60 
61 	hw_coal = &bp->tx_coal;
62 	mult = hw_coal->bufs_per_record;
63 	coal->tx_coalesce_usecs = hw_coal->coal_ticks;
64 	coal->tx_max_coalesced_frames = hw_coal->coal_bufs / mult;
65 	coal->tx_coalesce_usecs_irq = hw_coal->coal_ticks_irq;
66 	coal->tx_max_coalesced_frames_irq = hw_coal->coal_bufs_irq / mult;
67 
68 	coal->stats_block_coalesce_usecs = bp->stats_coal_ticks;
69 
70 	return 0;
71 }
72 
73 static int bnxt_set_coalesce(struct net_device *dev,
74 			     struct ethtool_coalesce *coal)
75 {
76 	struct bnxt *bp = netdev_priv(dev);
77 	bool update_stats = false;
78 	struct bnxt_coal *hw_coal;
79 	int rc = 0;
80 	u16 mult;
81 
82 	if (coal->use_adaptive_rx_coalesce) {
83 		bp->flags |= BNXT_FLAG_DIM;
84 	} else {
85 		if (bp->flags & BNXT_FLAG_DIM) {
86 			bp->flags &= ~(BNXT_FLAG_DIM);
87 			goto reset_coalesce;
88 		}
89 	}
90 
91 	hw_coal = &bp->rx_coal;
92 	mult = hw_coal->bufs_per_record;
93 	hw_coal->coal_ticks = coal->rx_coalesce_usecs;
94 	hw_coal->coal_bufs = coal->rx_max_coalesced_frames * mult;
95 	hw_coal->coal_ticks_irq = coal->rx_coalesce_usecs_irq;
96 	hw_coal->coal_bufs_irq = coal->rx_max_coalesced_frames_irq * mult;
97 
98 	hw_coal = &bp->tx_coal;
99 	mult = hw_coal->bufs_per_record;
100 	hw_coal->coal_ticks = coal->tx_coalesce_usecs;
101 	hw_coal->coal_bufs = coal->tx_max_coalesced_frames * mult;
102 	hw_coal->coal_ticks_irq = coal->tx_coalesce_usecs_irq;
103 	hw_coal->coal_bufs_irq = coal->tx_max_coalesced_frames_irq * mult;
104 
105 	if (bp->stats_coal_ticks != coal->stats_block_coalesce_usecs) {
106 		u32 stats_ticks = coal->stats_block_coalesce_usecs;
107 
108 		/* Allow 0, which means disable. */
109 		if (stats_ticks)
110 			stats_ticks = clamp_t(u32, stats_ticks,
111 					      BNXT_MIN_STATS_COAL_TICKS,
112 					      BNXT_MAX_STATS_COAL_TICKS);
113 		stats_ticks = rounddown(stats_ticks, BNXT_MIN_STATS_COAL_TICKS);
114 		bp->stats_coal_ticks = stats_ticks;
115 		update_stats = true;
116 	}
117 
118 reset_coalesce:
119 	if (netif_running(dev)) {
120 		if (update_stats) {
121 			rc = bnxt_close_nic(bp, true, false);
122 			if (!rc)
123 				rc = bnxt_open_nic(bp, true, false);
124 		} else {
125 			rc = bnxt_hwrm_set_coal(bp);
126 		}
127 	}
128 
129 	return rc;
130 }
131 
132 #define BNXT_NUM_STATS	21
133 
134 #define BNXT_RX_STATS_ENTRY(counter)	\
135 	{ BNXT_RX_STATS_OFFSET(counter), __stringify(counter) }
136 
137 #define BNXT_TX_STATS_ENTRY(counter)	\
138 	{ BNXT_TX_STATS_OFFSET(counter), __stringify(counter) }
139 
140 #define BNXT_RX_STATS_EXT_ENTRY(counter)	\
141 	{ BNXT_RX_STATS_EXT_OFFSET(counter), __stringify(counter) }
142 
143 enum {
144 	RX_TOTAL_DISCARDS,
145 	TX_TOTAL_DISCARDS,
146 };
147 
148 static struct {
149 	u64			counter;
150 	char			string[ETH_GSTRING_LEN];
151 } bnxt_sw_func_stats[] = {
152 	{0, "rx_total_discard_pkts"},
153 	{0, "tx_total_discard_pkts"},
154 };
155 
156 static const struct {
157 	long offset;
158 	char string[ETH_GSTRING_LEN];
159 } bnxt_port_stats_arr[] = {
160 	BNXT_RX_STATS_ENTRY(rx_64b_frames),
161 	BNXT_RX_STATS_ENTRY(rx_65b_127b_frames),
162 	BNXT_RX_STATS_ENTRY(rx_128b_255b_frames),
163 	BNXT_RX_STATS_ENTRY(rx_256b_511b_frames),
164 	BNXT_RX_STATS_ENTRY(rx_512b_1023b_frames),
165 	BNXT_RX_STATS_ENTRY(rx_1024b_1518_frames),
166 	BNXT_RX_STATS_ENTRY(rx_good_vlan_frames),
167 	BNXT_RX_STATS_ENTRY(rx_1519b_2047b_frames),
168 	BNXT_RX_STATS_ENTRY(rx_2048b_4095b_frames),
169 	BNXT_RX_STATS_ENTRY(rx_4096b_9216b_frames),
170 	BNXT_RX_STATS_ENTRY(rx_9217b_16383b_frames),
171 	BNXT_RX_STATS_ENTRY(rx_total_frames),
172 	BNXT_RX_STATS_ENTRY(rx_ucast_frames),
173 	BNXT_RX_STATS_ENTRY(rx_mcast_frames),
174 	BNXT_RX_STATS_ENTRY(rx_bcast_frames),
175 	BNXT_RX_STATS_ENTRY(rx_fcs_err_frames),
176 	BNXT_RX_STATS_ENTRY(rx_ctrl_frames),
177 	BNXT_RX_STATS_ENTRY(rx_pause_frames),
178 	BNXT_RX_STATS_ENTRY(rx_pfc_frames),
179 	BNXT_RX_STATS_ENTRY(rx_align_err_frames),
180 	BNXT_RX_STATS_ENTRY(rx_ovrsz_frames),
181 	BNXT_RX_STATS_ENTRY(rx_jbr_frames),
182 	BNXT_RX_STATS_ENTRY(rx_mtu_err_frames),
183 	BNXT_RX_STATS_ENTRY(rx_tagged_frames),
184 	BNXT_RX_STATS_ENTRY(rx_double_tagged_frames),
185 	BNXT_RX_STATS_ENTRY(rx_good_frames),
186 	BNXT_RX_STATS_ENTRY(rx_pfc_ena_frames_pri0),
187 	BNXT_RX_STATS_ENTRY(rx_pfc_ena_frames_pri1),
188 	BNXT_RX_STATS_ENTRY(rx_pfc_ena_frames_pri2),
189 	BNXT_RX_STATS_ENTRY(rx_pfc_ena_frames_pri3),
190 	BNXT_RX_STATS_ENTRY(rx_pfc_ena_frames_pri4),
191 	BNXT_RX_STATS_ENTRY(rx_pfc_ena_frames_pri5),
192 	BNXT_RX_STATS_ENTRY(rx_pfc_ena_frames_pri6),
193 	BNXT_RX_STATS_ENTRY(rx_pfc_ena_frames_pri7),
194 	BNXT_RX_STATS_ENTRY(rx_undrsz_frames),
195 	BNXT_RX_STATS_ENTRY(rx_eee_lpi_events),
196 	BNXT_RX_STATS_ENTRY(rx_eee_lpi_duration),
197 	BNXT_RX_STATS_ENTRY(rx_bytes),
198 	BNXT_RX_STATS_ENTRY(rx_runt_bytes),
199 	BNXT_RX_STATS_ENTRY(rx_runt_frames),
200 	BNXT_RX_STATS_ENTRY(rx_stat_discard),
201 	BNXT_RX_STATS_ENTRY(rx_stat_err),
202 
203 	BNXT_TX_STATS_ENTRY(tx_64b_frames),
204 	BNXT_TX_STATS_ENTRY(tx_65b_127b_frames),
205 	BNXT_TX_STATS_ENTRY(tx_128b_255b_frames),
206 	BNXT_TX_STATS_ENTRY(tx_256b_511b_frames),
207 	BNXT_TX_STATS_ENTRY(tx_512b_1023b_frames),
208 	BNXT_TX_STATS_ENTRY(tx_1024b_1518_frames),
209 	BNXT_TX_STATS_ENTRY(tx_good_vlan_frames),
210 	BNXT_TX_STATS_ENTRY(tx_1519b_2047_frames),
211 	BNXT_TX_STATS_ENTRY(tx_2048b_4095b_frames),
212 	BNXT_TX_STATS_ENTRY(tx_4096b_9216b_frames),
213 	BNXT_TX_STATS_ENTRY(tx_9217b_16383b_frames),
214 	BNXT_TX_STATS_ENTRY(tx_good_frames),
215 	BNXT_TX_STATS_ENTRY(tx_total_frames),
216 	BNXT_TX_STATS_ENTRY(tx_ucast_frames),
217 	BNXT_TX_STATS_ENTRY(tx_mcast_frames),
218 	BNXT_TX_STATS_ENTRY(tx_bcast_frames),
219 	BNXT_TX_STATS_ENTRY(tx_pause_frames),
220 	BNXT_TX_STATS_ENTRY(tx_pfc_frames),
221 	BNXT_TX_STATS_ENTRY(tx_jabber_frames),
222 	BNXT_TX_STATS_ENTRY(tx_fcs_err_frames),
223 	BNXT_TX_STATS_ENTRY(tx_err),
224 	BNXT_TX_STATS_ENTRY(tx_fifo_underruns),
225 	BNXT_TX_STATS_ENTRY(tx_pfc_ena_frames_pri0),
226 	BNXT_TX_STATS_ENTRY(tx_pfc_ena_frames_pri1),
227 	BNXT_TX_STATS_ENTRY(tx_pfc_ena_frames_pri2),
228 	BNXT_TX_STATS_ENTRY(tx_pfc_ena_frames_pri3),
229 	BNXT_TX_STATS_ENTRY(tx_pfc_ena_frames_pri4),
230 	BNXT_TX_STATS_ENTRY(tx_pfc_ena_frames_pri5),
231 	BNXT_TX_STATS_ENTRY(tx_pfc_ena_frames_pri6),
232 	BNXT_TX_STATS_ENTRY(tx_pfc_ena_frames_pri7),
233 	BNXT_TX_STATS_ENTRY(tx_eee_lpi_events),
234 	BNXT_TX_STATS_ENTRY(tx_eee_lpi_duration),
235 	BNXT_TX_STATS_ENTRY(tx_total_collisions),
236 	BNXT_TX_STATS_ENTRY(tx_bytes),
237 	BNXT_TX_STATS_ENTRY(tx_xthol_frames),
238 	BNXT_TX_STATS_ENTRY(tx_stat_discard),
239 	BNXT_TX_STATS_ENTRY(tx_stat_error),
240 };
241 
242 static const struct {
243 	long offset;
244 	char string[ETH_GSTRING_LEN];
245 } bnxt_port_stats_ext_arr[] = {
246 	BNXT_RX_STATS_EXT_ENTRY(link_down_events),
247 	BNXT_RX_STATS_EXT_ENTRY(continuous_pause_events),
248 	BNXT_RX_STATS_EXT_ENTRY(resume_pause_events),
249 	BNXT_RX_STATS_EXT_ENTRY(continuous_roce_pause_events),
250 	BNXT_RX_STATS_EXT_ENTRY(resume_roce_pause_events),
251 };
252 
253 #define BNXT_NUM_SW_FUNC_STATS	ARRAY_SIZE(bnxt_sw_func_stats)
254 #define BNXT_NUM_PORT_STATS ARRAY_SIZE(bnxt_port_stats_arr)
255 #define BNXT_NUM_PORT_STATS_EXT ARRAY_SIZE(bnxt_port_stats_ext_arr)
256 
257 static int bnxt_get_num_stats(struct bnxt *bp)
258 {
259 	int num_stats = BNXT_NUM_STATS * bp->cp_nr_rings;
260 
261 	num_stats += BNXT_NUM_SW_FUNC_STATS;
262 
263 	if (bp->flags & BNXT_FLAG_PORT_STATS)
264 		num_stats += BNXT_NUM_PORT_STATS;
265 
266 	if (bp->flags & BNXT_FLAG_PORT_STATS_EXT)
267 		num_stats += BNXT_NUM_PORT_STATS_EXT;
268 
269 	return num_stats;
270 }
271 
272 static int bnxt_get_sset_count(struct net_device *dev, int sset)
273 {
274 	struct bnxt *bp = netdev_priv(dev);
275 
276 	switch (sset) {
277 	case ETH_SS_STATS:
278 		return bnxt_get_num_stats(bp);
279 	case ETH_SS_TEST:
280 		if (!bp->num_tests)
281 			return -EOPNOTSUPP;
282 		return bp->num_tests;
283 	default:
284 		return -EOPNOTSUPP;
285 	}
286 }
287 
288 static void bnxt_get_ethtool_stats(struct net_device *dev,
289 				   struct ethtool_stats *stats, u64 *buf)
290 {
291 	u32 i, j = 0;
292 	struct bnxt *bp = netdev_priv(dev);
293 	u32 stat_fields = sizeof(struct ctx_hw_stats) / 8;
294 
295 	if (!bp->bnapi)
296 		return;
297 
298 	for (i = 0; i < BNXT_NUM_SW_FUNC_STATS; i++)
299 		bnxt_sw_func_stats[i].counter = 0;
300 
301 	for (i = 0; i < bp->cp_nr_rings; i++) {
302 		struct bnxt_napi *bnapi = bp->bnapi[i];
303 		struct bnxt_cp_ring_info *cpr = &bnapi->cp_ring;
304 		__le64 *hw_stats = (__le64 *)cpr->hw_stats;
305 		int k;
306 
307 		for (k = 0; k < stat_fields; j++, k++)
308 			buf[j] = le64_to_cpu(hw_stats[k]);
309 		buf[j++] = cpr->rx_l4_csum_errors;
310 
311 		bnxt_sw_func_stats[RX_TOTAL_DISCARDS].counter +=
312 			le64_to_cpu(cpr->hw_stats->rx_discard_pkts);
313 		bnxt_sw_func_stats[TX_TOTAL_DISCARDS].counter +=
314 			le64_to_cpu(cpr->hw_stats->tx_discard_pkts);
315 	}
316 
317 	for (i = 0; i < BNXT_NUM_SW_FUNC_STATS; i++, j++)
318 		buf[j] = bnxt_sw_func_stats[i].counter;
319 
320 	if (bp->flags & BNXT_FLAG_PORT_STATS) {
321 		__le64 *port_stats = (__le64 *)bp->hw_rx_port_stats;
322 
323 		for (i = 0; i < BNXT_NUM_PORT_STATS; i++, j++) {
324 			buf[j] = le64_to_cpu(*(port_stats +
325 					       bnxt_port_stats_arr[i].offset));
326 		}
327 	}
328 	if (bp->flags & BNXT_FLAG_PORT_STATS_EXT) {
329 		__le64 *port_stats_ext = (__le64 *)bp->hw_rx_port_stats_ext;
330 
331 		for (i = 0; i < BNXT_NUM_PORT_STATS_EXT; i++, j++) {
332 			buf[j] = le64_to_cpu(*(port_stats_ext +
333 					    bnxt_port_stats_ext_arr[i].offset));
334 		}
335 	}
336 }
337 
338 static void bnxt_get_strings(struct net_device *dev, u32 stringset, u8 *buf)
339 {
340 	struct bnxt *bp = netdev_priv(dev);
341 	u32 i;
342 
343 	switch (stringset) {
344 	/* The number of strings must match BNXT_NUM_STATS defined above. */
345 	case ETH_SS_STATS:
346 		for (i = 0; i < bp->cp_nr_rings; i++) {
347 			sprintf(buf, "[%d]: rx_ucast_packets", i);
348 			buf += ETH_GSTRING_LEN;
349 			sprintf(buf, "[%d]: rx_mcast_packets", i);
350 			buf += ETH_GSTRING_LEN;
351 			sprintf(buf, "[%d]: rx_bcast_packets", i);
352 			buf += ETH_GSTRING_LEN;
353 			sprintf(buf, "[%d]: rx_discards", i);
354 			buf += ETH_GSTRING_LEN;
355 			sprintf(buf, "[%d]: rx_drops", i);
356 			buf += ETH_GSTRING_LEN;
357 			sprintf(buf, "[%d]: rx_ucast_bytes", i);
358 			buf += ETH_GSTRING_LEN;
359 			sprintf(buf, "[%d]: rx_mcast_bytes", i);
360 			buf += ETH_GSTRING_LEN;
361 			sprintf(buf, "[%d]: rx_bcast_bytes", i);
362 			buf += ETH_GSTRING_LEN;
363 			sprintf(buf, "[%d]: tx_ucast_packets", i);
364 			buf += ETH_GSTRING_LEN;
365 			sprintf(buf, "[%d]: tx_mcast_packets", i);
366 			buf += ETH_GSTRING_LEN;
367 			sprintf(buf, "[%d]: tx_bcast_packets", i);
368 			buf += ETH_GSTRING_LEN;
369 			sprintf(buf, "[%d]: tx_discards", i);
370 			buf += ETH_GSTRING_LEN;
371 			sprintf(buf, "[%d]: tx_drops", i);
372 			buf += ETH_GSTRING_LEN;
373 			sprintf(buf, "[%d]: tx_ucast_bytes", i);
374 			buf += ETH_GSTRING_LEN;
375 			sprintf(buf, "[%d]: tx_mcast_bytes", i);
376 			buf += ETH_GSTRING_LEN;
377 			sprintf(buf, "[%d]: tx_bcast_bytes", i);
378 			buf += ETH_GSTRING_LEN;
379 			sprintf(buf, "[%d]: tpa_packets", i);
380 			buf += ETH_GSTRING_LEN;
381 			sprintf(buf, "[%d]: tpa_bytes", i);
382 			buf += ETH_GSTRING_LEN;
383 			sprintf(buf, "[%d]: tpa_events", i);
384 			buf += ETH_GSTRING_LEN;
385 			sprintf(buf, "[%d]: tpa_aborts", i);
386 			buf += ETH_GSTRING_LEN;
387 			sprintf(buf, "[%d]: rx_l4_csum_errors", i);
388 			buf += ETH_GSTRING_LEN;
389 		}
390 		for (i = 0; i < BNXT_NUM_SW_FUNC_STATS; i++) {
391 			strcpy(buf, bnxt_sw_func_stats[i].string);
392 			buf += ETH_GSTRING_LEN;
393 		}
394 
395 		if (bp->flags & BNXT_FLAG_PORT_STATS) {
396 			for (i = 0; i < BNXT_NUM_PORT_STATS; i++) {
397 				strcpy(buf, bnxt_port_stats_arr[i].string);
398 				buf += ETH_GSTRING_LEN;
399 			}
400 		}
401 		if (bp->flags & BNXT_FLAG_PORT_STATS_EXT) {
402 			for (i = 0; i < BNXT_NUM_PORT_STATS_EXT; i++) {
403 				strcpy(buf, bnxt_port_stats_ext_arr[i].string);
404 				buf += ETH_GSTRING_LEN;
405 			}
406 		}
407 		break;
408 	case ETH_SS_TEST:
409 		if (bp->num_tests)
410 			memcpy(buf, bp->test_info->string,
411 			       bp->num_tests * ETH_GSTRING_LEN);
412 		break;
413 	default:
414 		netdev_err(bp->dev, "bnxt_get_strings invalid request %x\n",
415 			   stringset);
416 		break;
417 	}
418 }
419 
420 static void bnxt_get_ringparam(struct net_device *dev,
421 			       struct ethtool_ringparam *ering)
422 {
423 	struct bnxt *bp = netdev_priv(dev);
424 
425 	ering->rx_max_pending = BNXT_MAX_RX_DESC_CNT;
426 	ering->rx_jumbo_max_pending = BNXT_MAX_RX_JUM_DESC_CNT;
427 	ering->tx_max_pending = BNXT_MAX_TX_DESC_CNT;
428 
429 	ering->rx_pending = bp->rx_ring_size;
430 	ering->rx_jumbo_pending = bp->rx_agg_ring_size;
431 	ering->tx_pending = bp->tx_ring_size;
432 }
433 
434 static int bnxt_set_ringparam(struct net_device *dev,
435 			      struct ethtool_ringparam *ering)
436 {
437 	struct bnxt *bp = netdev_priv(dev);
438 
439 	if ((ering->rx_pending > BNXT_MAX_RX_DESC_CNT) ||
440 	    (ering->tx_pending > BNXT_MAX_TX_DESC_CNT) ||
441 	    (ering->tx_pending <= MAX_SKB_FRAGS))
442 		return -EINVAL;
443 
444 	if (netif_running(dev))
445 		bnxt_close_nic(bp, false, false);
446 
447 	bp->rx_ring_size = ering->rx_pending;
448 	bp->tx_ring_size = ering->tx_pending;
449 	bnxt_set_ring_params(bp);
450 
451 	if (netif_running(dev))
452 		return bnxt_open_nic(bp, false, false);
453 
454 	return 0;
455 }
456 
457 static void bnxt_get_channels(struct net_device *dev,
458 			      struct ethtool_channels *channel)
459 {
460 	struct bnxt *bp = netdev_priv(dev);
461 	struct bnxt_hw_resc *hw_resc = &bp->hw_resc;
462 	int max_rx_rings, max_tx_rings, tcs;
463 	int max_tx_sch_inputs;
464 
465 	/* Get the most up-to-date max_tx_sch_inputs. */
466 	if (bp->flags & BNXT_FLAG_NEW_RM)
467 		bnxt_hwrm_func_resc_qcaps(bp, false);
468 	max_tx_sch_inputs = hw_resc->max_tx_sch_inputs;
469 
470 	bnxt_get_max_rings(bp, &max_rx_rings, &max_tx_rings, true);
471 	if (max_tx_sch_inputs)
472 		max_tx_rings = min_t(int, max_tx_rings, max_tx_sch_inputs);
473 	channel->max_combined = min_t(int, max_rx_rings, max_tx_rings);
474 
475 	if (bnxt_get_max_rings(bp, &max_rx_rings, &max_tx_rings, false)) {
476 		max_rx_rings = 0;
477 		max_tx_rings = 0;
478 	}
479 	if (max_tx_sch_inputs)
480 		max_tx_rings = min_t(int, max_tx_rings, max_tx_sch_inputs);
481 
482 	tcs = netdev_get_num_tc(dev);
483 	if (tcs > 1)
484 		max_tx_rings /= tcs;
485 
486 	channel->max_rx = max_rx_rings;
487 	channel->max_tx = max_tx_rings;
488 	channel->max_other = 0;
489 	if (bp->flags & BNXT_FLAG_SHARED_RINGS) {
490 		channel->combined_count = bp->rx_nr_rings;
491 		if (BNXT_CHIP_TYPE_NITRO_A0(bp))
492 			channel->combined_count--;
493 	} else {
494 		if (!BNXT_CHIP_TYPE_NITRO_A0(bp)) {
495 			channel->rx_count = bp->rx_nr_rings;
496 			channel->tx_count = bp->tx_nr_rings_per_tc;
497 		}
498 	}
499 }
500 
501 static int bnxt_set_channels(struct net_device *dev,
502 			     struct ethtool_channels *channel)
503 {
504 	struct bnxt *bp = netdev_priv(dev);
505 	int req_tx_rings, req_rx_rings, tcs;
506 	bool sh = false;
507 	int tx_xdp = 0;
508 	int rc = 0;
509 
510 	if (channel->other_count)
511 		return -EINVAL;
512 
513 	if (!channel->combined_count &&
514 	    (!channel->rx_count || !channel->tx_count))
515 		return -EINVAL;
516 
517 	if (channel->combined_count &&
518 	    (channel->rx_count || channel->tx_count))
519 		return -EINVAL;
520 
521 	if (BNXT_CHIP_TYPE_NITRO_A0(bp) && (channel->rx_count ||
522 					    channel->tx_count))
523 		return -EINVAL;
524 
525 	if (channel->combined_count)
526 		sh = true;
527 
528 	tcs = netdev_get_num_tc(dev);
529 
530 	req_tx_rings = sh ? channel->combined_count : channel->tx_count;
531 	req_rx_rings = sh ? channel->combined_count : channel->rx_count;
532 	if (bp->tx_nr_rings_xdp) {
533 		if (!sh) {
534 			netdev_err(dev, "Only combined mode supported when XDP is enabled.\n");
535 			return -EINVAL;
536 		}
537 		tx_xdp = req_rx_rings;
538 	}
539 	rc = bnxt_check_rings(bp, req_tx_rings, req_rx_rings, sh, tcs, tx_xdp);
540 	if (rc) {
541 		netdev_warn(dev, "Unable to allocate the requested rings\n");
542 		return rc;
543 	}
544 
545 	if (netif_running(dev)) {
546 		if (BNXT_PF(bp)) {
547 			/* TODO CHIMP_FW: Send message to all VF's
548 			 * before PF unload
549 			 */
550 		}
551 		rc = bnxt_close_nic(bp, true, false);
552 		if (rc) {
553 			netdev_err(bp->dev, "Set channel failure rc :%x\n",
554 				   rc);
555 			return rc;
556 		}
557 	}
558 
559 	if (sh) {
560 		bp->flags |= BNXT_FLAG_SHARED_RINGS;
561 		bp->rx_nr_rings = channel->combined_count;
562 		bp->tx_nr_rings_per_tc = channel->combined_count;
563 	} else {
564 		bp->flags &= ~BNXT_FLAG_SHARED_RINGS;
565 		bp->rx_nr_rings = channel->rx_count;
566 		bp->tx_nr_rings_per_tc = channel->tx_count;
567 	}
568 	bp->tx_nr_rings_xdp = tx_xdp;
569 	bp->tx_nr_rings = bp->tx_nr_rings_per_tc + tx_xdp;
570 	if (tcs > 1)
571 		bp->tx_nr_rings = bp->tx_nr_rings_per_tc * tcs + tx_xdp;
572 
573 	bp->cp_nr_rings = sh ? max_t(int, bp->tx_nr_rings, bp->rx_nr_rings) :
574 			       bp->tx_nr_rings + bp->rx_nr_rings;
575 
576 	bp->num_stat_ctxs = bp->cp_nr_rings;
577 
578 	/* After changing number of rx channels, update NTUPLE feature. */
579 	netdev_update_features(dev);
580 	if (netif_running(dev)) {
581 		rc = bnxt_open_nic(bp, true, false);
582 		if ((!rc) && BNXT_PF(bp)) {
583 			/* TODO CHIMP_FW: Send message to all VF's
584 			 * to renable
585 			 */
586 		}
587 	} else {
588 		rc = bnxt_reserve_rings(bp);
589 	}
590 
591 	return rc;
592 }
593 
594 #ifdef CONFIG_RFS_ACCEL
595 static int bnxt_grxclsrlall(struct bnxt *bp, struct ethtool_rxnfc *cmd,
596 			    u32 *rule_locs)
597 {
598 	int i, j = 0;
599 
600 	cmd->data = bp->ntp_fltr_count;
601 	for (i = 0; i < BNXT_NTP_FLTR_HASH_SIZE; i++) {
602 		struct hlist_head *head;
603 		struct bnxt_ntuple_filter *fltr;
604 
605 		head = &bp->ntp_fltr_hash_tbl[i];
606 		rcu_read_lock();
607 		hlist_for_each_entry_rcu(fltr, head, hash) {
608 			if (j == cmd->rule_cnt)
609 				break;
610 			rule_locs[j++] = fltr->sw_id;
611 		}
612 		rcu_read_unlock();
613 		if (j == cmd->rule_cnt)
614 			break;
615 	}
616 	cmd->rule_cnt = j;
617 	return 0;
618 }
619 
620 static int bnxt_grxclsrule(struct bnxt *bp, struct ethtool_rxnfc *cmd)
621 {
622 	struct ethtool_rx_flow_spec *fs =
623 		(struct ethtool_rx_flow_spec *)&cmd->fs;
624 	struct bnxt_ntuple_filter *fltr;
625 	struct flow_keys *fkeys;
626 	int i, rc = -EINVAL;
627 
628 	if (fs->location >= BNXT_NTP_FLTR_MAX_FLTR)
629 		return rc;
630 
631 	for (i = 0; i < BNXT_NTP_FLTR_HASH_SIZE; i++) {
632 		struct hlist_head *head;
633 
634 		head = &bp->ntp_fltr_hash_tbl[i];
635 		rcu_read_lock();
636 		hlist_for_each_entry_rcu(fltr, head, hash) {
637 			if (fltr->sw_id == fs->location)
638 				goto fltr_found;
639 		}
640 		rcu_read_unlock();
641 	}
642 	return rc;
643 
644 fltr_found:
645 	fkeys = &fltr->fkeys;
646 	if (fkeys->basic.n_proto == htons(ETH_P_IP)) {
647 		if (fkeys->basic.ip_proto == IPPROTO_TCP)
648 			fs->flow_type = TCP_V4_FLOW;
649 		else if (fkeys->basic.ip_proto == IPPROTO_UDP)
650 			fs->flow_type = UDP_V4_FLOW;
651 		else
652 			goto fltr_err;
653 
654 		fs->h_u.tcp_ip4_spec.ip4src = fkeys->addrs.v4addrs.src;
655 		fs->m_u.tcp_ip4_spec.ip4src = cpu_to_be32(~0);
656 
657 		fs->h_u.tcp_ip4_spec.ip4dst = fkeys->addrs.v4addrs.dst;
658 		fs->m_u.tcp_ip4_spec.ip4dst = cpu_to_be32(~0);
659 
660 		fs->h_u.tcp_ip4_spec.psrc = fkeys->ports.src;
661 		fs->m_u.tcp_ip4_spec.psrc = cpu_to_be16(~0);
662 
663 		fs->h_u.tcp_ip4_spec.pdst = fkeys->ports.dst;
664 		fs->m_u.tcp_ip4_spec.pdst = cpu_to_be16(~0);
665 	} else {
666 		int i;
667 
668 		if (fkeys->basic.ip_proto == IPPROTO_TCP)
669 			fs->flow_type = TCP_V6_FLOW;
670 		else if (fkeys->basic.ip_proto == IPPROTO_UDP)
671 			fs->flow_type = UDP_V6_FLOW;
672 		else
673 			goto fltr_err;
674 
675 		*(struct in6_addr *)&fs->h_u.tcp_ip6_spec.ip6src[0] =
676 			fkeys->addrs.v6addrs.src;
677 		*(struct in6_addr *)&fs->h_u.tcp_ip6_spec.ip6dst[0] =
678 			fkeys->addrs.v6addrs.dst;
679 		for (i = 0; i < 4; i++) {
680 			fs->m_u.tcp_ip6_spec.ip6src[i] = cpu_to_be32(~0);
681 			fs->m_u.tcp_ip6_spec.ip6dst[i] = cpu_to_be32(~0);
682 		}
683 		fs->h_u.tcp_ip6_spec.psrc = fkeys->ports.src;
684 		fs->m_u.tcp_ip6_spec.psrc = cpu_to_be16(~0);
685 
686 		fs->h_u.tcp_ip6_spec.pdst = fkeys->ports.dst;
687 		fs->m_u.tcp_ip6_spec.pdst = cpu_to_be16(~0);
688 	}
689 
690 	fs->ring_cookie = fltr->rxq;
691 	rc = 0;
692 
693 fltr_err:
694 	rcu_read_unlock();
695 
696 	return rc;
697 }
698 #endif
699 
700 static u64 get_ethtool_ipv4_rss(struct bnxt *bp)
701 {
702 	if (bp->rss_hash_cfg & VNIC_RSS_CFG_REQ_HASH_TYPE_IPV4)
703 		return RXH_IP_SRC | RXH_IP_DST;
704 	return 0;
705 }
706 
707 static u64 get_ethtool_ipv6_rss(struct bnxt *bp)
708 {
709 	if (bp->rss_hash_cfg & VNIC_RSS_CFG_REQ_HASH_TYPE_IPV6)
710 		return RXH_IP_SRC | RXH_IP_DST;
711 	return 0;
712 }
713 
714 static int bnxt_grxfh(struct bnxt *bp, struct ethtool_rxnfc *cmd)
715 {
716 	cmd->data = 0;
717 	switch (cmd->flow_type) {
718 	case TCP_V4_FLOW:
719 		if (bp->rss_hash_cfg & VNIC_RSS_CFG_REQ_HASH_TYPE_TCP_IPV4)
720 			cmd->data |= RXH_IP_SRC | RXH_IP_DST |
721 				     RXH_L4_B_0_1 | RXH_L4_B_2_3;
722 		cmd->data |= get_ethtool_ipv4_rss(bp);
723 		break;
724 	case UDP_V4_FLOW:
725 		if (bp->rss_hash_cfg & VNIC_RSS_CFG_REQ_HASH_TYPE_UDP_IPV4)
726 			cmd->data |= RXH_IP_SRC | RXH_IP_DST |
727 				     RXH_L4_B_0_1 | RXH_L4_B_2_3;
728 		/* fall through */
729 	case SCTP_V4_FLOW:
730 	case AH_ESP_V4_FLOW:
731 	case AH_V4_FLOW:
732 	case ESP_V4_FLOW:
733 	case IPV4_FLOW:
734 		cmd->data |= get_ethtool_ipv4_rss(bp);
735 		break;
736 
737 	case TCP_V6_FLOW:
738 		if (bp->rss_hash_cfg & VNIC_RSS_CFG_REQ_HASH_TYPE_TCP_IPV6)
739 			cmd->data |= RXH_IP_SRC | RXH_IP_DST |
740 				     RXH_L4_B_0_1 | RXH_L4_B_2_3;
741 		cmd->data |= get_ethtool_ipv6_rss(bp);
742 		break;
743 	case UDP_V6_FLOW:
744 		if (bp->rss_hash_cfg & VNIC_RSS_CFG_REQ_HASH_TYPE_UDP_IPV6)
745 			cmd->data |= RXH_IP_SRC | RXH_IP_DST |
746 				     RXH_L4_B_0_1 | RXH_L4_B_2_3;
747 		/* fall through */
748 	case SCTP_V6_FLOW:
749 	case AH_ESP_V6_FLOW:
750 	case AH_V6_FLOW:
751 	case ESP_V6_FLOW:
752 	case IPV6_FLOW:
753 		cmd->data |= get_ethtool_ipv6_rss(bp);
754 		break;
755 	}
756 	return 0;
757 }
758 
759 #define RXH_4TUPLE (RXH_IP_SRC | RXH_IP_DST | RXH_L4_B_0_1 | RXH_L4_B_2_3)
760 #define RXH_2TUPLE (RXH_IP_SRC | RXH_IP_DST)
761 
762 static int bnxt_srxfh(struct bnxt *bp, struct ethtool_rxnfc *cmd)
763 {
764 	u32 rss_hash_cfg = bp->rss_hash_cfg;
765 	int tuple, rc = 0;
766 
767 	if (cmd->data == RXH_4TUPLE)
768 		tuple = 4;
769 	else if (cmd->data == RXH_2TUPLE)
770 		tuple = 2;
771 	else if (!cmd->data)
772 		tuple = 0;
773 	else
774 		return -EINVAL;
775 
776 	if (cmd->flow_type == TCP_V4_FLOW) {
777 		rss_hash_cfg &= ~VNIC_RSS_CFG_REQ_HASH_TYPE_TCP_IPV4;
778 		if (tuple == 4)
779 			rss_hash_cfg |= VNIC_RSS_CFG_REQ_HASH_TYPE_TCP_IPV4;
780 	} else if (cmd->flow_type == UDP_V4_FLOW) {
781 		if (tuple == 4 && !(bp->flags & BNXT_FLAG_UDP_RSS_CAP))
782 			return -EINVAL;
783 		rss_hash_cfg &= ~VNIC_RSS_CFG_REQ_HASH_TYPE_UDP_IPV4;
784 		if (tuple == 4)
785 			rss_hash_cfg |= VNIC_RSS_CFG_REQ_HASH_TYPE_UDP_IPV4;
786 	} else if (cmd->flow_type == TCP_V6_FLOW) {
787 		rss_hash_cfg &= ~VNIC_RSS_CFG_REQ_HASH_TYPE_TCP_IPV6;
788 		if (tuple == 4)
789 			rss_hash_cfg |= VNIC_RSS_CFG_REQ_HASH_TYPE_TCP_IPV6;
790 	} else if (cmd->flow_type == UDP_V6_FLOW) {
791 		if (tuple == 4 && !(bp->flags & BNXT_FLAG_UDP_RSS_CAP))
792 			return -EINVAL;
793 		rss_hash_cfg &= ~VNIC_RSS_CFG_REQ_HASH_TYPE_UDP_IPV6;
794 		if (tuple == 4)
795 			rss_hash_cfg |= VNIC_RSS_CFG_REQ_HASH_TYPE_UDP_IPV6;
796 	} else if (tuple == 4) {
797 		return -EINVAL;
798 	}
799 
800 	switch (cmd->flow_type) {
801 	case TCP_V4_FLOW:
802 	case UDP_V4_FLOW:
803 	case SCTP_V4_FLOW:
804 	case AH_ESP_V4_FLOW:
805 	case AH_V4_FLOW:
806 	case ESP_V4_FLOW:
807 	case IPV4_FLOW:
808 		if (tuple == 2)
809 			rss_hash_cfg |= VNIC_RSS_CFG_REQ_HASH_TYPE_IPV4;
810 		else if (!tuple)
811 			rss_hash_cfg &= ~VNIC_RSS_CFG_REQ_HASH_TYPE_IPV4;
812 		break;
813 
814 	case TCP_V6_FLOW:
815 	case UDP_V6_FLOW:
816 	case SCTP_V6_FLOW:
817 	case AH_ESP_V6_FLOW:
818 	case AH_V6_FLOW:
819 	case ESP_V6_FLOW:
820 	case IPV6_FLOW:
821 		if (tuple == 2)
822 			rss_hash_cfg |= VNIC_RSS_CFG_REQ_HASH_TYPE_IPV6;
823 		else if (!tuple)
824 			rss_hash_cfg &= ~VNIC_RSS_CFG_REQ_HASH_TYPE_IPV6;
825 		break;
826 	}
827 
828 	if (bp->rss_hash_cfg == rss_hash_cfg)
829 		return 0;
830 
831 	bp->rss_hash_cfg = rss_hash_cfg;
832 	if (netif_running(bp->dev)) {
833 		bnxt_close_nic(bp, false, false);
834 		rc = bnxt_open_nic(bp, false, false);
835 	}
836 	return rc;
837 }
838 
839 static int bnxt_get_rxnfc(struct net_device *dev, struct ethtool_rxnfc *cmd,
840 			  u32 *rule_locs)
841 {
842 	struct bnxt *bp = netdev_priv(dev);
843 	int rc = 0;
844 
845 	switch (cmd->cmd) {
846 #ifdef CONFIG_RFS_ACCEL
847 	case ETHTOOL_GRXRINGS:
848 		cmd->data = bp->rx_nr_rings;
849 		break;
850 
851 	case ETHTOOL_GRXCLSRLCNT:
852 		cmd->rule_cnt = bp->ntp_fltr_count;
853 		cmd->data = BNXT_NTP_FLTR_MAX_FLTR;
854 		break;
855 
856 	case ETHTOOL_GRXCLSRLALL:
857 		rc = bnxt_grxclsrlall(bp, cmd, (u32 *)rule_locs);
858 		break;
859 
860 	case ETHTOOL_GRXCLSRULE:
861 		rc = bnxt_grxclsrule(bp, cmd);
862 		break;
863 #endif
864 
865 	case ETHTOOL_GRXFH:
866 		rc = bnxt_grxfh(bp, cmd);
867 		break;
868 
869 	default:
870 		rc = -EOPNOTSUPP;
871 		break;
872 	}
873 
874 	return rc;
875 }
876 
877 static int bnxt_set_rxnfc(struct net_device *dev, struct ethtool_rxnfc *cmd)
878 {
879 	struct bnxt *bp = netdev_priv(dev);
880 	int rc;
881 
882 	switch (cmd->cmd) {
883 	case ETHTOOL_SRXFH:
884 		rc = bnxt_srxfh(bp, cmd);
885 		break;
886 
887 	default:
888 		rc = -EOPNOTSUPP;
889 		break;
890 	}
891 	return rc;
892 }
893 
894 static u32 bnxt_get_rxfh_indir_size(struct net_device *dev)
895 {
896 	return HW_HASH_INDEX_SIZE;
897 }
898 
899 static u32 bnxt_get_rxfh_key_size(struct net_device *dev)
900 {
901 	return HW_HASH_KEY_SIZE;
902 }
903 
904 static int bnxt_get_rxfh(struct net_device *dev, u32 *indir, u8 *key,
905 			 u8 *hfunc)
906 {
907 	struct bnxt *bp = netdev_priv(dev);
908 	struct bnxt_vnic_info *vnic;
909 	int i = 0;
910 
911 	if (hfunc)
912 		*hfunc = ETH_RSS_HASH_TOP;
913 
914 	if (!bp->vnic_info)
915 		return 0;
916 
917 	vnic = &bp->vnic_info[0];
918 	if (indir && vnic->rss_table) {
919 		for (i = 0; i < HW_HASH_INDEX_SIZE; i++)
920 			indir[i] = le16_to_cpu(vnic->rss_table[i]);
921 	}
922 
923 	if (key && vnic->rss_hash_key)
924 		memcpy(key, vnic->rss_hash_key, HW_HASH_KEY_SIZE);
925 
926 	return 0;
927 }
928 
929 static void bnxt_get_drvinfo(struct net_device *dev,
930 			     struct ethtool_drvinfo *info)
931 {
932 	struct bnxt *bp = netdev_priv(dev);
933 
934 	strlcpy(info->driver, DRV_MODULE_NAME, sizeof(info->driver));
935 	strlcpy(info->version, DRV_MODULE_VERSION, sizeof(info->version));
936 	strlcpy(info->fw_version, bp->fw_ver_str, sizeof(info->fw_version));
937 	strlcpy(info->bus_info, pci_name(bp->pdev), sizeof(info->bus_info));
938 	info->n_stats = bnxt_get_num_stats(bp);
939 	info->testinfo_len = bp->num_tests;
940 	/* TODO CHIMP_FW: eeprom dump details */
941 	info->eedump_len = 0;
942 	/* TODO CHIMP FW: reg dump details */
943 	info->regdump_len = 0;
944 }
945 
946 static void bnxt_get_wol(struct net_device *dev, struct ethtool_wolinfo *wol)
947 {
948 	struct bnxt *bp = netdev_priv(dev);
949 
950 	wol->supported = 0;
951 	wol->wolopts = 0;
952 	memset(&wol->sopass, 0, sizeof(wol->sopass));
953 	if (bp->flags & BNXT_FLAG_WOL_CAP) {
954 		wol->supported = WAKE_MAGIC;
955 		if (bp->wol)
956 			wol->wolopts = WAKE_MAGIC;
957 	}
958 }
959 
960 static int bnxt_set_wol(struct net_device *dev, struct ethtool_wolinfo *wol)
961 {
962 	struct bnxt *bp = netdev_priv(dev);
963 
964 	if (wol->wolopts & ~WAKE_MAGIC)
965 		return -EINVAL;
966 
967 	if (wol->wolopts & WAKE_MAGIC) {
968 		if (!(bp->flags & BNXT_FLAG_WOL_CAP))
969 			return -EINVAL;
970 		if (!bp->wol) {
971 			if (bnxt_hwrm_alloc_wol_fltr(bp))
972 				return -EBUSY;
973 			bp->wol = 1;
974 		}
975 	} else {
976 		if (bp->wol) {
977 			if (bnxt_hwrm_free_wol_fltr(bp))
978 				return -EBUSY;
979 			bp->wol = 0;
980 		}
981 	}
982 	return 0;
983 }
984 
985 u32 _bnxt_fw_to_ethtool_adv_spds(u16 fw_speeds, u8 fw_pause)
986 {
987 	u32 speed_mask = 0;
988 
989 	/* TODO: support 25GB, 40GB, 50GB with different cable type */
990 	/* set the advertised speeds */
991 	if (fw_speeds & BNXT_LINK_SPEED_MSK_100MB)
992 		speed_mask |= ADVERTISED_100baseT_Full;
993 	if (fw_speeds & BNXT_LINK_SPEED_MSK_1GB)
994 		speed_mask |= ADVERTISED_1000baseT_Full;
995 	if (fw_speeds & BNXT_LINK_SPEED_MSK_2_5GB)
996 		speed_mask |= ADVERTISED_2500baseX_Full;
997 	if (fw_speeds & BNXT_LINK_SPEED_MSK_10GB)
998 		speed_mask |= ADVERTISED_10000baseT_Full;
999 	if (fw_speeds & BNXT_LINK_SPEED_MSK_40GB)
1000 		speed_mask |= ADVERTISED_40000baseCR4_Full;
1001 
1002 	if ((fw_pause & BNXT_LINK_PAUSE_BOTH) == BNXT_LINK_PAUSE_BOTH)
1003 		speed_mask |= ADVERTISED_Pause;
1004 	else if (fw_pause & BNXT_LINK_PAUSE_TX)
1005 		speed_mask |= ADVERTISED_Asym_Pause;
1006 	else if (fw_pause & BNXT_LINK_PAUSE_RX)
1007 		speed_mask |= ADVERTISED_Pause | ADVERTISED_Asym_Pause;
1008 
1009 	return speed_mask;
1010 }
1011 
1012 #define BNXT_FW_TO_ETHTOOL_SPDS(fw_speeds, fw_pause, lk_ksettings, name)\
1013 {									\
1014 	if ((fw_speeds) & BNXT_LINK_SPEED_MSK_100MB)			\
1015 		ethtool_link_ksettings_add_link_mode(lk_ksettings, name,\
1016 						     100baseT_Full);	\
1017 	if ((fw_speeds) & BNXT_LINK_SPEED_MSK_1GB)			\
1018 		ethtool_link_ksettings_add_link_mode(lk_ksettings, name,\
1019 						     1000baseT_Full);	\
1020 	if ((fw_speeds) & BNXT_LINK_SPEED_MSK_10GB)			\
1021 		ethtool_link_ksettings_add_link_mode(lk_ksettings, name,\
1022 						     10000baseT_Full);	\
1023 	if ((fw_speeds) & BNXT_LINK_SPEED_MSK_25GB)			\
1024 		ethtool_link_ksettings_add_link_mode(lk_ksettings, name,\
1025 						     25000baseCR_Full);	\
1026 	if ((fw_speeds) & BNXT_LINK_SPEED_MSK_40GB)			\
1027 		ethtool_link_ksettings_add_link_mode(lk_ksettings, name,\
1028 						     40000baseCR4_Full);\
1029 	if ((fw_speeds) & BNXT_LINK_SPEED_MSK_50GB)			\
1030 		ethtool_link_ksettings_add_link_mode(lk_ksettings, name,\
1031 						     50000baseCR2_Full);\
1032 	if ((fw_speeds) & BNXT_LINK_SPEED_MSK_100GB)			\
1033 		ethtool_link_ksettings_add_link_mode(lk_ksettings, name,\
1034 						     100000baseCR4_Full);\
1035 	if ((fw_pause) & BNXT_LINK_PAUSE_RX) {				\
1036 		ethtool_link_ksettings_add_link_mode(lk_ksettings, name,\
1037 						     Pause);		\
1038 		if (!((fw_pause) & BNXT_LINK_PAUSE_TX))			\
1039 			ethtool_link_ksettings_add_link_mode(		\
1040 					lk_ksettings, name, Asym_Pause);\
1041 	} else if ((fw_pause) & BNXT_LINK_PAUSE_TX) {			\
1042 		ethtool_link_ksettings_add_link_mode(lk_ksettings, name,\
1043 						     Asym_Pause);	\
1044 	}								\
1045 }
1046 
1047 #define BNXT_ETHTOOL_TO_FW_SPDS(fw_speeds, lk_ksettings, name)		\
1048 {									\
1049 	if (ethtool_link_ksettings_test_link_mode(lk_ksettings, name,	\
1050 						  100baseT_Full) ||	\
1051 	    ethtool_link_ksettings_test_link_mode(lk_ksettings, name,	\
1052 						  100baseT_Half))	\
1053 		(fw_speeds) |= BNXT_LINK_SPEED_MSK_100MB;		\
1054 	if (ethtool_link_ksettings_test_link_mode(lk_ksettings, name,	\
1055 						  1000baseT_Full) ||	\
1056 	    ethtool_link_ksettings_test_link_mode(lk_ksettings, name,	\
1057 						  1000baseT_Half))	\
1058 		(fw_speeds) |= BNXT_LINK_SPEED_MSK_1GB;			\
1059 	if (ethtool_link_ksettings_test_link_mode(lk_ksettings, name,	\
1060 						  10000baseT_Full))	\
1061 		(fw_speeds) |= BNXT_LINK_SPEED_MSK_10GB;		\
1062 	if (ethtool_link_ksettings_test_link_mode(lk_ksettings, name,	\
1063 						  25000baseCR_Full))	\
1064 		(fw_speeds) |= BNXT_LINK_SPEED_MSK_25GB;		\
1065 	if (ethtool_link_ksettings_test_link_mode(lk_ksettings, name,	\
1066 						  40000baseCR4_Full))	\
1067 		(fw_speeds) |= BNXT_LINK_SPEED_MSK_40GB;		\
1068 	if (ethtool_link_ksettings_test_link_mode(lk_ksettings, name,	\
1069 						  50000baseCR2_Full))	\
1070 		(fw_speeds) |= BNXT_LINK_SPEED_MSK_50GB;		\
1071 	if (ethtool_link_ksettings_test_link_mode(lk_ksettings, name,	\
1072 						  100000baseCR4_Full))	\
1073 		(fw_speeds) |= BNXT_LINK_SPEED_MSK_100GB;		\
1074 }
1075 
1076 static void bnxt_fw_to_ethtool_advertised_spds(struct bnxt_link_info *link_info,
1077 				struct ethtool_link_ksettings *lk_ksettings)
1078 {
1079 	u16 fw_speeds = link_info->advertising;
1080 	u8 fw_pause = 0;
1081 
1082 	if (link_info->autoneg & BNXT_AUTONEG_FLOW_CTRL)
1083 		fw_pause = link_info->auto_pause_setting;
1084 
1085 	BNXT_FW_TO_ETHTOOL_SPDS(fw_speeds, fw_pause, lk_ksettings, advertising);
1086 }
1087 
1088 static void bnxt_fw_to_ethtool_lp_adv(struct bnxt_link_info *link_info,
1089 				struct ethtool_link_ksettings *lk_ksettings)
1090 {
1091 	u16 fw_speeds = link_info->lp_auto_link_speeds;
1092 	u8 fw_pause = 0;
1093 
1094 	if (link_info->autoneg & BNXT_AUTONEG_FLOW_CTRL)
1095 		fw_pause = link_info->lp_pause;
1096 
1097 	BNXT_FW_TO_ETHTOOL_SPDS(fw_speeds, fw_pause, lk_ksettings,
1098 				lp_advertising);
1099 }
1100 
1101 static void bnxt_fw_to_ethtool_support_spds(struct bnxt_link_info *link_info,
1102 				struct ethtool_link_ksettings *lk_ksettings)
1103 {
1104 	u16 fw_speeds = link_info->support_speeds;
1105 
1106 	BNXT_FW_TO_ETHTOOL_SPDS(fw_speeds, 0, lk_ksettings, supported);
1107 
1108 	ethtool_link_ksettings_add_link_mode(lk_ksettings, supported, Pause);
1109 	ethtool_link_ksettings_add_link_mode(lk_ksettings, supported,
1110 					     Asym_Pause);
1111 
1112 	if (link_info->support_auto_speeds)
1113 		ethtool_link_ksettings_add_link_mode(lk_ksettings, supported,
1114 						     Autoneg);
1115 }
1116 
1117 u32 bnxt_fw_to_ethtool_speed(u16 fw_link_speed)
1118 {
1119 	switch (fw_link_speed) {
1120 	case BNXT_LINK_SPEED_100MB:
1121 		return SPEED_100;
1122 	case BNXT_LINK_SPEED_1GB:
1123 		return SPEED_1000;
1124 	case BNXT_LINK_SPEED_2_5GB:
1125 		return SPEED_2500;
1126 	case BNXT_LINK_SPEED_10GB:
1127 		return SPEED_10000;
1128 	case BNXT_LINK_SPEED_20GB:
1129 		return SPEED_20000;
1130 	case BNXT_LINK_SPEED_25GB:
1131 		return SPEED_25000;
1132 	case BNXT_LINK_SPEED_40GB:
1133 		return SPEED_40000;
1134 	case BNXT_LINK_SPEED_50GB:
1135 		return SPEED_50000;
1136 	case BNXT_LINK_SPEED_100GB:
1137 		return SPEED_100000;
1138 	default:
1139 		return SPEED_UNKNOWN;
1140 	}
1141 }
1142 
1143 static int bnxt_get_link_ksettings(struct net_device *dev,
1144 				   struct ethtool_link_ksettings *lk_ksettings)
1145 {
1146 	struct bnxt *bp = netdev_priv(dev);
1147 	struct bnxt_link_info *link_info = &bp->link_info;
1148 	struct ethtool_link_settings *base = &lk_ksettings->base;
1149 	u32 ethtool_speed;
1150 
1151 	ethtool_link_ksettings_zero_link_mode(lk_ksettings, supported);
1152 	mutex_lock(&bp->link_lock);
1153 	bnxt_fw_to_ethtool_support_spds(link_info, lk_ksettings);
1154 
1155 	ethtool_link_ksettings_zero_link_mode(lk_ksettings, advertising);
1156 	if (link_info->autoneg) {
1157 		bnxt_fw_to_ethtool_advertised_spds(link_info, lk_ksettings);
1158 		ethtool_link_ksettings_add_link_mode(lk_ksettings,
1159 						     advertising, Autoneg);
1160 		base->autoneg = AUTONEG_ENABLE;
1161 		if (link_info->phy_link_status == BNXT_LINK_LINK)
1162 			bnxt_fw_to_ethtool_lp_adv(link_info, lk_ksettings);
1163 		ethtool_speed = bnxt_fw_to_ethtool_speed(link_info->link_speed);
1164 		if (!netif_carrier_ok(dev))
1165 			base->duplex = DUPLEX_UNKNOWN;
1166 		else if (link_info->duplex & BNXT_LINK_DUPLEX_FULL)
1167 			base->duplex = DUPLEX_FULL;
1168 		else
1169 			base->duplex = DUPLEX_HALF;
1170 	} else {
1171 		base->autoneg = AUTONEG_DISABLE;
1172 		ethtool_speed =
1173 			bnxt_fw_to_ethtool_speed(link_info->req_link_speed);
1174 		base->duplex = DUPLEX_HALF;
1175 		if (link_info->req_duplex == BNXT_LINK_DUPLEX_FULL)
1176 			base->duplex = DUPLEX_FULL;
1177 	}
1178 	base->speed = ethtool_speed;
1179 
1180 	base->port = PORT_NONE;
1181 	if (link_info->media_type == PORT_PHY_QCFG_RESP_MEDIA_TYPE_TP) {
1182 		base->port = PORT_TP;
1183 		ethtool_link_ksettings_add_link_mode(lk_ksettings, supported,
1184 						     TP);
1185 		ethtool_link_ksettings_add_link_mode(lk_ksettings, advertising,
1186 						     TP);
1187 	} else {
1188 		ethtool_link_ksettings_add_link_mode(lk_ksettings, supported,
1189 						     FIBRE);
1190 		ethtool_link_ksettings_add_link_mode(lk_ksettings, advertising,
1191 						     FIBRE);
1192 
1193 		if (link_info->media_type == PORT_PHY_QCFG_RESP_MEDIA_TYPE_DAC)
1194 			base->port = PORT_DA;
1195 		else if (link_info->media_type ==
1196 			 PORT_PHY_QCFG_RESP_MEDIA_TYPE_FIBRE)
1197 			base->port = PORT_FIBRE;
1198 	}
1199 	base->phy_address = link_info->phy_addr;
1200 	mutex_unlock(&bp->link_lock);
1201 
1202 	return 0;
1203 }
1204 
1205 static u32 bnxt_get_fw_speed(struct net_device *dev, u32 ethtool_speed)
1206 {
1207 	struct bnxt *bp = netdev_priv(dev);
1208 	struct bnxt_link_info *link_info = &bp->link_info;
1209 	u16 support_spds = link_info->support_speeds;
1210 	u32 fw_speed = 0;
1211 
1212 	switch (ethtool_speed) {
1213 	case SPEED_100:
1214 		if (support_spds & BNXT_LINK_SPEED_MSK_100MB)
1215 			fw_speed = PORT_PHY_CFG_REQ_AUTO_LINK_SPEED_100MB;
1216 		break;
1217 	case SPEED_1000:
1218 		if (support_spds & BNXT_LINK_SPEED_MSK_1GB)
1219 			fw_speed = PORT_PHY_CFG_REQ_AUTO_LINK_SPEED_1GB;
1220 		break;
1221 	case SPEED_2500:
1222 		if (support_spds & BNXT_LINK_SPEED_MSK_2_5GB)
1223 			fw_speed = PORT_PHY_CFG_REQ_AUTO_LINK_SPEED_2_5GB;
1224 		break;
1225 	case SPEED_10000:
1226 		if (support_spds & BNXT_LINK_SPEED_MSK_10GB)
1227 			fw_speed = PORT_PHY_CFG_REQ_AUTO_LINK_SPEED_10GB;
1228 		break;
1229 	case SPEED_20000:
1230 		if (support_spds & BNXT_LINK_SPEED_MSK_20GB)
1231 			fw_speed = PORT_PHY_CFG_REQ_AUTO_LINK_SPEED_20GB;
1232 		break;
1233 	case SPEED_25000:
1234 		if (support_spds & BNXT_LINK_SPEED_MSK_25GB)
1235 			fw_speed = PORT_PHY_CFG_REQ_AUTO_LINK_SPEED_25GB;
1236 		break;
1237 	case SPEED_40000:
1238 		if (support_spds & BNXT_LINK_SPEED_MSK_40GB)
1239 			fw_speed = PORT_PHY_CFG_REQ_AUTO_LINK_SPEED_40GB;
1240 		break;
1241 	case SPEED_50000:
1242 		if (support_spds & BNXT_LINK_SPEED_MSK_50GB)
1243 			fw_speed = PORT_PHY_CFG_REQ_AUTO_LINK_SPEED_50GB;
1244 		break;
1245 	case SPEED_100000:
1246 		if (support_spds & BNXT_LINK_SPEED_MSK_100GB)
1247 			fw_speed = PORT_PHY_CFG_REQ_AUTO_LINK_SPEED_100GB;
1248 		break;
1249 	default:
1250 		netdev_err(dev, "unsupported speed!\n");
1251 		break;
1252 	}
1253 	return fw_speed;
1254 }
1255 
1256 u16 bnxt_get_fw_auto_link_speeds(u32 advertising)
1257 {
1258 	u16 fw_speed_mask = 0;
1259 
1260 	/* only support autoneg at speed 100, 1000, and 10000 */
1261 	if (advertising & (ADVERTISED_100baseT_Full |
1262 			   ADVERTISED_100baseT_Half)) {
1263 		fw_speed_mask |= BNXT_LINK_SPEED_MSK_100MB;
1264 	}
1265 	if (advertising & (ADVERTISED_1000baseT_Full |
1266 			   ADVERTISED_1000baseT_Half)) {
1267 		fw_speed_mask |= BNXT_LINK_SPEED_MSK_1GB;
1268 	}
1269 	if (advertising & ADVERTISED_10000baseT_Full)
1270 		fw_speed_mask |= BNXT_LINK_SPEED_MSK_10GB;
1271 
1272 	if (advertising & ADVERTISED_40000baseCR4_Full)
1273 		fw_speed_mask |= BNXT_LINK_SPEED_MSK_40GB;
1274 
1275 	return fw_speed_mask;
1276 }
1277 
1278 static int bnxt_set_link_ksettings(struct net_device *dev,
1279 			   const struct ethtool_link_ksettings *lk_ksettings)
1280 {
1281 	struct bnxt *bp = netdev_priv(dev);
1282 	struct bnxt_link_info *link_info = &bp->link_info;
1283 	const struct ethtool_link_settings *base = &lk_ksettings->base;
1284 	bool set_pause = false;
1285 	u16 fw_advertising = 0;
1286 	u32 speed;
1287 	int rc = 0;
1288 
1289 	if (!BNXT_SINGLE_PF(bp))
1290 		return -EOPNOTSUPP;
1291 
1292 	mutex_lock(&bp->link_lock);
1293 	if (base->autoneg == AUTONEG_ENABLE) {
1294 		BNXT_ETHTOOL_TO_FW_SPDS(fw_advertising, lk_ksettings,
1295 					advertising);
1296 		link_info->autoneg |= BNXT_AUTONEG_SPEED;
1297 		if (!fw_advertising)
1298 			link_info->advertising = link_info->support_auto_speeds;
1299 		else
1300 			link_info->advertising = fw_advertising;
1301 		/* any change to autoneg will cause link change, therefore the
1302 		 * driver should put back the original pause setting in autoneg
1303 		 */
1304 		set_pause = true;
1305 	} else {
1306 		u16 fw_speed;
1307 		u8 phy_type = link_info->phy_type;
1308 
1309 		if (phy_type == PORT_PHY_QCFG_RESP_PHY_TYPE_BASET  ||
1310 		    phy_type == PORT_PHY_QCFG_RESP_PHY_TYPE_BASETE ||
1311 		    link_info->media_type == PORT_PHY_QCFG_RESP_MEDIA_TYPE_TP) {
1312 			netdev_err(dev, "10GBase-T devices must autoneg\n");
1313 			rc = -EINVAL;
1314 			goto set_setting_exit;
1315 		}
1316 		if (base->duplex == DUPLEX_HALF) {
1317 			netdev_err(dev, "HALF DUPLEX is not supported!\n");
1318 			rc = -EINVAL;
1319 			goto set_setting_exit;
1320 		}
1321 		speed = base->speed;
1322 		fw_speed = bnxt_get_fw_speed(dev, speed);
1323 		if (!fw_speed) {
1324 			rc = -EINVAL;
1325 			goto set_setting_exit;
1326 		}
1327 		link_info->req_link_speed = fw_speed;
1328 		link_info->req_duplex = BNXT_LINK_DUPLEX_FULL;
1329 		link_info->autoneg = 0;
1330 		link_info->advertising = 0;
1331 	}
1332 
1333 	if (netif_running(dev))
1334 		rc = bnxt_hwrm_set_link_setting(bp, set_pause, false);
1335 
1336 set_setting_exit:
1337 	mutex_unlock(&bp->link_lock);
1338 	return rc;
1339 }
1340 
1341 static void bnxt_get_pauseparam(struct net_device *dev,
1342 				struct ethtool_pauseparam *epause)
1343 {
1344 	struct bnxt *bp = netdev_priv(dev);
1345 	struct bnxt_link_info *link_info = &bp->link_info;
1346 
1347 	if (BNXT_VF(bp))
1348 		return;
1349 	epause->autoneg = !!(link_info->autoneg & BNXT_AUTONEG_FLOW_CTRL);
1350 	epause->rx_pause = !!(link_info->req_flow_ctrl & BNXT_LINK_PAUSE_RX);
1351 	epause->tx_pause = !!(link_info->req_flow_ctrl & BNXT_LINK_PAUSE_TX);
1352 }
1353 
1354 static int bnxt_set_pauseparam(struct net_device *dev,
1355 			       struct ethtool_pauseparam *epause)
1356 {
1357 	int rc = 0;
1358 	struct bnxt *bp = netdev_priv(dev);
1359 	struct bnxt_link_info *link_info = &bp->link_info;
1360 
1361 	if (!BNXT_SINGLE_PF(bp))
1362 		return -EOPNOTSUPP;
1363 
1364 	if (epause->autoneg) {
1365 		if (!(link_info->autoneg & BNXT_AUTONEG_SPEED))
1366 			return -EINVAL;
1367 
1368 		link_info->autoneg |= BNXT_AUTONEG_FLOW_CTRL;
1369 		if (bp->hwrm_spec_code >= 0x10201)
1370 			link_info->req_flow_ctrl =
1371 				PORT_PHY_CFG_REQ_AUTO_PAUSE_AUTONEG_PAUSE;
1372 	} else {
1373 		/* when transition from auto pause to force pause,
1374 		 * force a link change
1375 		 */
1376 		if (link_info->autoneg & BNXT_AUTONEG_FLOW_CTRL)
1377 			link_info->force_link_chng = true;
1378 		link_info->autoneg &= ~BNXT_AUTONEG_FLOW_CTRL;
1379 		link_info->req_flow_ctrl = 0;
1380 	}
1381 	if (epause->rx_pause)
1382 		link_info->req_flow_ctrl |= BNXT_LINK_PAUSE_RX;
1383 
1384 	if (epause->tx_pause)
1385 		link_info->req_flow_ctrl |= BNXT_LINK_PAUSE_TX;
1386 
1387 	if (netif_running(dev))
1388 		rc = bnxt_hwrm_set_pause(bp);
1389 	return rc;
1390 }
1391 
1392 static u32 bnxt_get_link(struct net_device *dev)
1393 {
1394 	struct bnxt *bp = netdev_priv(dev);
1395 
1396 	/* TODO: handle MF, VF, driver close case */
1397 	return bp->link_info.link_up;
1398 }
1399 
1400 static int bnxt_find_nvram_item(struct net_device *dev, u16 type, u16 ordinal,
1401 				u16 ext, u16 *index, u32 *item_length,
1402 				u32 *data_length);
1403 
1404 static int bnxt_flash_nvram(struct net_device *dev,
1405 			    u16 dir_type,
1406 			    u16 dir_ordinal,
1407 			    u16 dir_ext,
1408 			    u16 dir_attr,
1409 			    const u8 *data,
1410 			    size_t data_len)
1411 {
1412 	struct bnxt *bp = netdev_priv(dev);
1413 	int rc;
1414 	struct hwrm_nvm_write_input req = {0};
1415 	dma_addr_t dma_handle;
1416 	u8 *kmem;
1417 
1418 	bnxt_hwrm_cmd_hdr_init(bp, &req, HWRM_NVM_WRITE, -1, -1);
1419 
1420 	req.dir_type = cpu_to_le16(dir_type);
1421 	req.dir_ordinal = cpu_to_le16(dir_ordinal);
1422 	req.dir_ext = cpu_to_le16(dir_ext);
1423 	req.dir_attr = cpu_to_le16(dir_attr);
1424 	req.dir_data_length = cpu_to_le32(data_len);
1425 
1426 	kmem = dma_alloc_coherent(&bp->pdev->dev, data_len, &dma_handle,
1427 				  GFP_KERNEL);
1428 	if (!kmem) {
1429 		netdev_err(dev, "dma_alloc_coherent failure, length = %u\n",
1430 			   (unsigned)data_len);
1431 		return -ENOMEM;
1432 	}
1433 	memcpy(kmem, data, data_len);
1434 	req.host_src_addr = cpu_to_le64(dma_handle);
1435 
1436 	rc = hwrm_send_message(bp, &req, sizeof(req), FLASH_NVRAM_TIMEOUT);
1437 	dma_free_coherent(&bp->pdev->dev, data_len, kmem, dma_handle);
1438 
1439 	return rc;
1440 }
1441 
1442 static int bnxt_firmware_reset(struct net_device *dev,
1443 			       u16 dir_type)
1444 {
1445 	struct bnxt *bp = netdev_priv(dev);
1446 	struct hwrm_fw_reset_input req = {0};
1447 
1448 	bnxt_hwrm_cmd_hdr_init(bp, &req, HWRM_FW_RESET, -1, -1);
1449 
1450 	/* TODO: Address self-reset of APE/KONG/BONO/TANG or ungraceful reset */
1451 	/*       (e.g. when firmware isn't already running) */
1452 	switch (dir_type) {
1453 	case BNX_DIR_TYPE_CHIMP_PATCH:
1454 	case BNX_DIR_TYPE_BOOTCODE:
1455 	case BNX_DIR_TYPE_BOOTCODE_2:
1456 		req.embedded_proc_type = FW_RESET_REQ_EMBEDDED_PROC_TYPE_BOOT;
1457 		/* Self-reset ChiMP upon next PCIe reset: */
1458 		req.selfrst_status = FW_RESET_REQ_SELFRST_STATUS_SELFRSTPCIERST;
1459 		break;
1460 	case BNX_DIR_TYPE_APE_FW:
1461 	case BNX_DIR_TYPE_APE_PATCH:
1462 		req.embedded_proc_type = FW_RESET_REQ_EMBEDDED_PROC_TYPE_MGMT;
1463 		/* Self-reset APE upon next PCIe reset: */
1464 		req.selfrst_status = FW_RESET_REQ_SELFRST_STATUS_SELFRSTPCIERST;
1465 		break;
1466 	case BNX_DIR_TYPE_KONG_FW:
1467 	case BNX_DIR_TYPE_KONG_PATCH:
1468 		req.embedded_proc_type =
1469 			FW_RESET_REQ_EMBEDDED_PROC_TYPE_NETCTRL;
1470 		break;
1471 	case BNX_DIR_TYPE_BONO_FW:
1472 	case BNX_DIR_TYPE_BONO_PATCH:
1473 		req.embedded_proc_type = FW_RESET_REQ_EMBEDDED_PROC_TYPE_ROCE;
1474 		break;
1475 	case BNXT_FW_RESET_CHIP:
1476 		req.embedded_proc_type = FW_RESET_REQ_EMBEDDED_PROC_TYPE_CHIP;
1477 		req.selfrst_status = FW_RESET_REQ_SELFRST_STATUS_SELFRSTASAP;
1478 		break;
1479 	case BNXT_FW_RESET_AP:
1480 		req.embedded_proc_type = FW_RESET_REQ_EMBEDDED_PROC_TYPE_AP;
1481 		break;
1482 	default:
1483 		return -EINVAL;
1484 	}
1485 
1486 	return hwrm_send_message(bp, &req, sizeof(req), HWRM_CMD_TIMEOUT);
1487 }
1488 
1489 static int bnxt_flash_firmware(struct net_device *dev,
1490 			       u16 dir_type,
1491 			       const u8 *fw_data,
1492 			       size_t fw_size)
1493 {
1494 	int	rc = 0;
1495 	u16	code_type;
1496 	u32	stored_crc;
1497 	u32	calculated_crc;
1498 	struct bnxt_fw_header *header = (struct bnxt_fw_header *)fw_data;
1499 
1500 	switch (dir_type) {
1501 	case BNX_DIR_TYPE_BOOTCODE:
1502 	case BNX_DIR_TYPE_BOOTCODE_2:
1503 		code_type = CODE_BOOT;
1504 		break;
1505 	case BNX_DIR_TYPE_CHIMP_PATCH:
1506 		code_type = CODE_CHIMP_PATCH;
1507 		break;
1508 	case BNX_DIR_TYPE_APE_FW:
1509 		code_type = CODE_MCTP_PASSTHRU;
1510 		break;
1511 	case BNX_DIR_TYPE_APE_PATCH:
1512 		code_type = CODE_APE_PATCH;
1513 		break;
1514 	case BNX_DIR_TYPE_KONG_FW:
1515 		code_type = CODE_KONG_FW;
1516 		break;
1517 	case BNX_DIR_TYPE_KONG_PATCH:
1518 		code_type = CODE_KONG_PATCH;
1519 		break;
1520 	case BNX_DIR_TYPE_BONO_FW:
1521 		code_type = CODE_BONO_FW;
1522 		break;
1523 	case BNX_DIR_TYPE_BONO_PATCH:
1524 		code_type = CODE_BONO_PATCH;
1525 		break;
1526 	default:
1527 		netdev_err(dev, "Unsupported directory entry type: %u\n",
1528 			   dir_type);
1529 		return -EINVAL;
1530 	}
1531 	if (fw_size < sizeof(struct bnxt_fw_header)) {
1532 		netdev_err(dev, "Invalid firmware file size: %u\n",
1533 			   (unsigned int)fw_size);
1534 		return -EINVAL;
1535 	}
1536 	if (header->signature != cpu_to_le32(BNXT_FIRMWARE_BIN_SIGNATURE)) {
1537 		netdev_err(dev, "Invalid firmware signature: %08X\n",
1538 			   le32_to_cpu(header->signature));
1539 		return -EINVAL;
1540 	}
1541 	if (header->code_type != code_type) {
1542 		netdev_err(dev, "Expected firmware type: %d, read: %d\n",
1543 			   code_type, header->code_type);
1544 		return -EINVAL;
1545 	}
1546 	if (header->device != DEVICE_CUMULUS_FAMILY) {
1547 		netdev_err(dev, "Expected firmware device family %d, read: %d\n",
1548 			   DEVICE_CUMULUS_FAMILY, header->device);
1549 		return -EINVAL;
1550 	}
1551 	/* Confirm the CRC32 checksum of the file: */
1552 	stored_crc = le32_to_cpu(*(__le32 *)(fw_data + fw_size -
1553 					     sizeof(stored_crc)));
1554 	calculated_crc = ~crc32(~0, fw_data, fw_size - sizeof(stored_crc));
1555 	if (calculated_crc != stored_crc) {
1556 		netdev_err(dev, "Firmware file CRC32 checksum (%08lX) does not match calculated checksum (%08lX)\n",
1557 			   (unsigned long)stored_crc,
1558 			   (unsigned long)calculated_crc);
1559 		return -EINVAL;
1560 	}
1561 	rc = bnxt_flash_nvram(dev, dir_type, BNX_DIR_ORDINAL_FIRST,
1562 			      0, 0, fw_data, fw_size);
1563 	if (rc == 0)	/* Firmware update successful */
1564 		rc = bnxt_firmware_reset(dev, dir_type);
1565 
1566 	return rc;
1567 }
1568 
1569 static int bnxt_flash_microcode(struct net_device *dev,
1570 				u16 dir_type,
1571 				const u8 *fw_data,
1572 				size_t fw_size)
1573 {
1574 	struct bnxt_ucode_trailer *trailer;
1575 	u32 calculated_crc;
1576 	u32 stored_crc;
1577 	int rc = 0;
1578 
1579 	if (fw_size < sizeof(struct bnxt_ucode_trailer)) {
1580 		netdev_err(dev, "Invalid microcode file size: %u\n",
1581 			   (unsigned int)fw_size);
1582 		return -EINVAL;
1583 	}
1584 	trailer = (struct bnxt_ucode_trailer *)(fw_data + (fw_size -
1585 						sizeof(*trailer)));
1586 	if (trailer->sig != cpu_to_le32(BNXT_UCODE_TRAILER_SIGNATURE)) {
1587 		netdev_err(dev, "Invalid microcode trailer signature: %08X\n",
1588 			   le32_to_cpu(trailer->sig));
1589 		return -EINVAL;
1590 	}
1591 	if (le16_to_cpu(trailer->dir_type) != dir_type) {
1592 		netdev_err(dev, "Expected microcode type: %d, read: %d\n",
1593 			   dir_type, le16_to_cpu(trailer->dir_type));
1594 		return -EINVAL;
1595 	}
1596 	if (le16_to_cpu(trailer->trailer_length) <
1597 		sizeof(struct bnxt_ucode_trailer)) {
1598 		netdev_err(dev, "Invalid microcode trailer length: %d\n",
1599 			   le16_to_cpu(trailer->trailer_length));
1600 		return -EINVAL;
1601 	}
1602 
1603 	/* Confirm the CRC32 checksum of the file: */
1604 	stored_crc = le32_to_cpu(*(__le32 *)(fw_data + fw_size -
1605 					     sizeof(stored_crc)));
1606 	calculated_crc = ~crc32(~0, fw_data, fw_size - sizeof(stored_crc));
1607 	if (calculated_crc != stored_crc) {
1608 		netdev_err(dev,
1609 			   "CRC32 (%08lX) does not match calculated: %08lX\n",
1610 			   (unsigned long)stored_crc,
1611 			   (unsigned long)calculated_crc);
1612 		return -EINVAL;
1613 	}
1614 	rc = bnxt_flash_nvram(dev, dir_type, BNX_DIR_ORDINAL_FIRST,
1615 			      0, 0, fw_data, fw_size);
1616 
1617 	return rc;
1618 }
1619 
1620 static bool bnxt_dir_type_is_ape_bin_format(u16 dir_type)
1621 {
1622 	switch (dir_type) {
1623 	case BNX_DIR_TYPE_CHIMP_PATCH:
1624 	case BNX_DIR_TYPE_BOOTCODE:
1625 	case BNX_DIR_TYPE_BOOTCODE_2:
1626 	case BNX_DIR_TYPE_APE_FW:
1627 	case BNX_DIR_TYPE_APE_PATCH:
1628 	case BNX_DIR_TYPE_KONG_FW:
1629 	case BNX_DIR_TYPE_KONG_PATCH:
1630 	case BNX_DIR_TYPE_BONO_FW:
1631 	case BNX_DIR_TYPE_BONO_PATCH:
1632 		return true;
1633 	}
1634 
1635 	return false;
1636 }
1637 
1638 static bool bnxt_dir_type_is_other_exec_format(u16 dir_type)
1639 {
1640 	switch (dir_type) {
1641 	case BNX_DIR_TYPE_AVS:
1642 	case BNX_DIR_TYPE_EXP_ROM_MBA:
1643 	case BNX_DIR_TYPE_PCIE:
1644 	case BNX_DIR_TYPE_TSCF_UCODE:
1645 	case BNX_DIR_TYPE_EXT_PHY:
1646 	case BNX_DIR_TYPE_CCM:
1647 	case BNX_DIR_TYPE_ISCSI_BOOT:
1648 	case BNX_DIR_TYPE_ISCSI_BOOT_IPV6:
1649 	case BNX_DIR_TYPE_ISCSI_BOOT_IPV4N6:
1650 		return true;
1651 	}
1652 
1653 	return false;
1654 }
1655 
1656 static bool bnxt_dir_type_is_executable(u16 dir_type)
1657 {
1658 	return bnxt_dir_type_is_ape_bin_format(dir_type) ||
1659 		bnxt_dir_type_is_other_exec_format(dir_type);
1660 }
1661 
1662 static int bnxt_flash_firmware_from_file(struct net_device *dev,
1663 					 u16 dir_type,
1664 					 const char *filename)
1665 {
1666 	const struct firmware  *fw;
1667 	int			rc;
1668 
1669 	rc = request_firmware(&fw, filename, &dev->dev);
1670 	if (rc != 0) {
1671 		netdev_err(dev, "Error %d requesting firmware file: %s\n",
1672 			   rc, filename);
1673 		return rc;
1674 	}
1675 	if (bnxt_dir_type_is_ape_bin_format(dir_type) == true)
1676 		rc = bnxt_flash_firmware(dev, dir_type, fw->data, fw->size);
1677 	else if (bnxt_dir_type_is_other_exec_format(dir_type) == true)
1678 		rc = bnxt_flash_microcode(dev, dir_type, fw->data, fw->size);
1679 	else
1680 		rc = bnxt_flash_nvram(dev, dir_type, BNX_DIR_ORDINAL_FIRST,
1681 				      0, 0, fw->data, fw->size);
1682 	release_firmware(fw);
1683 	return rc;
1684 }
1685 
1686 static int bnxt_flash_package_from_file(struct net_device *dev,
1687 					char *filename, u32 install_type)
1688 {
1689 	struct bnxt *bp = netdev_priv(dev);
1690 	struct hwrm_nvm_install_update_output *resp = bp->hwrm_cmd_resp_addr;
1691 	struct hwrm_nvm_install_update_input install = {0};
1692 	const struct firmware *fw;
1693 	u32 item_len;
1694 	u16 index;
1695 	int rc;
1696 
1697 	bnxt_hwrm_fw_set_time(bp);
1698 
1699 	if (bnxt_find_nvram_item(dev, BNX_DIR_TYPE_UPDATE,
1700 				 BNX_DIR_ORDINAL_FIRST, BNX_DIR_EXT_NONE,
1701 				 &index, &item_len, NULL) != 0) {
1702 		netdev_err(dev, "PKG update area not created in nvram\n");
1703 		return -ENOBUFS;
1704 	}
1705 
1706 	rc = request_firmware(&fw, filename, &dev->dev);
1707 	if (rc != 0) {
1708 		netdev_err(dev, "PKG error %d requesting file: %s\n",
1709 			   rc, filename);
1710 		return rc;
1711 	}
1712 
1713 	if (fw->size > item_len) {
1714 		netdev_err(dev, "PKG insufficient update area in nvram: %lu",
1715 			   (unsigned long)fw->size);
1716 		rc = -EFBIG;
1717 	} else {
1718 		dma_addr_t dma_handle;
1719 		u8 *kmem;
1720 		struct hwrm_nvm_modify_input modify = {0};
1721 
1722 		bnxt_hwrm_cmd_hdr_init(bp, &modify, HWRM_NVM_MODIFY, -1, -1);
1723 
1724 		modify.dir_idx = cpu_to_le16(index);
1725 		modify.len = cpu_to_le32(fw->size);
1726 
1727 		kmem = dma_alloc_coherent(&bp->pdev->dev, fw->size,
1728 					  &dma_handle, GFP_KERNEL);
1729 		if (!kmem) {
1730 			netdev_err(dev,
1731 				   "dma_alloc_coherent failure, length = %u\n",
1732 				   (unsigned int)fw->size);
1733 			rc = -ENOMEM;
1734 		} else {
1735 			memcpy(kmem, fw->data, fw->size);
1736 			modify.host_src_addr = cpu_to_le64(dma_handle);
1737 
1738 			rc = hwrm_send_message(bp, &modify, sizeof(modify),
1739 					       FLASH_PACKAGE_TIMEOUT);
1740 			dma_free_coherent(&bp->pdev->dev, fw->size, kmem,
1741 					  dma_handle);
1742 		}
1743 	}
1744 	release_firmware(fw);
1745 	if (rc)
1746 		return rc;
1747 
1748 	if ((install_type & 0xffff) == 0)
1749 		install_type >>= 16;
1750 	bnxt_hwrm_cmd_hdr_init(bp, &install, HWRM_NVM_INSTALL_UPDATE, -1, -1);
1751 	install.install_type = cpu_to_le32(install_type);
1752 
1753 	mutex_lock(&bp->hwrm_cmd_lock);
1754 	rc = _hwrm_send_message(bp, &install, sizeof(install),
1755 				INSTALL_PACKAGE_TIMEOUT);
1756 	if (rc) {
1757 		rc = -EOPNOTSUPP;
1758 		goto flash_pkg_exit;
1759 	}
1760 
1761 	if (resp->error_code) {
1762 		u8 error_code = ((struct hwrm_err_output *)resp)->cmd_err;
1763 
1764 		if (error_code == NVM_INSTALL_UPDATE_CMD_ERR_CODE_FRAG_ERR) {
1765 			install.flags |= cpu_to_le16(
1766 			       NVM_INSTALL_UPDATE_REQ_FLAGS_ALLOWED_TO_DEFRAG);
1767 			rc = _hwrm_send_message(bp, &install, sizeof(install),
1768 						INSTALL_PACKAGE_TIMEOUT);
1769 			if (rc) {
1770 				rc = -EOPNOTSUPP;
1771 				goto flash_pkg_exit;
1772 			}
1773 		}
1774 	}
1775 
1776 	if (resp->result) {
1777 		netdev_err(dev, "PKG install error = %d, problem_item = %d\n",
1778 			   (s8)resp->result, (int)resp->problem_item);
1779 		rc = -ENOPKG;
1780 	}
1781 flash_pkg_exit:
1782 	mutex_unlock(&bp->hwrm_cmd_lock);
1783 	return rc;
1784 }
1785 
1786 static int bnxt_flash_device(struct net_device *dev,
1787 			     struct ethtool_flash *flash)
1788 {
1789 	if (!BNXT_PF((struct bnxt *)netdev_priv(dev))) {
1790 		netdev_err(dev, "flashdev not supported from a virtual function\n");
1791 		return -EINVAL;
1792 	}
1793 
1794 	if (flash->region == ETHTOOL_FLASH_ALL_REGIONS ||
1795 	    flash->region > 0xffff)
1796 		return bnxt_flash_package_from_file(dev, flash->data,
1797 						    flash->region);
1798 
1799 	return bnxt_flash_firmware_from_file(dev, flash->region, flash->data);
1800 }
1801 
1802 static int nvm_get_dir_info(struct net_device *dev, u32 *entries, u32 *length)
1803 {
1804 	struct bnxt *bp = netdev_priv(dev);
1805 	int rc;
1806 	struct hwrm_nvm_get_dir_info_input req = {0};
1807 	struct hwrm_nvm_get_dir_info_output *output = bp->hwrm_cmd_resp_addr;
1808 
1809 	bnxt_hwrm_cmd_hdr_init(bp, &req, HWRM_NVM_GET_DIR_INFO, -1, -1);
1810 
1811 	mutex_lock(&bp->hwrm_cmd_lock);
1812 	rc = _hwrm_send_message(bp, &req, sizeof(req), HWRM_CMD_TIMEOUT);
1813 	if (!rc) {
1814 		*entries = le32_to_cpu(output->entries);
1815 		*length = le32_to_cpu(output->entry_length);
1816 	}
1817 	mutex_unlock(&bp->hwrm_cmd_lock);
1818 	return rc;
1819 }
1820 
1821 static int bnxt_get_eeprom_len(struct net_device *dev)
1822 {
1823 	struct bnxt *bp = netdev_priv(dev);
1824 
1825 	if (BNXT_VF(bp))
1826 		return 0;
1827 
1828 	/* The -1 return value allows the entire 32-bit range of offsets to be
1829 	 * passed via the ethtool command-line utility.
1830 	 */
1831 	return -1;
1832 }
1833 
1834 static int bnxt_get_nvram_directory(struct net_device *dev, u32 len, u8 *data)
1835 {
1836 	struct bnxt *bp = netdev_priv(dev);
1837 	int rc;
1838 	u32 dir_entries;
1839 	u32 entry_length;
1840 	u8 *buf;
1841 	size_t buflen;
1842 	dma_addr_t dma_handle;
1843 	struct hwrm_nvm_get_dir_entries_input req = {0};
1844 
1845 	rc = nvm_get_dir_info(dev, &dir_entries, &entry_length);
1846 	if (rc != 0)
1847 		return rc;
1848 
1849 	/* Insert 2 bytes of directory info (count and size of entries) */
1850 	if (len < 2)
1851 		return -EINVAL;
1852 
1853 	*data++ = dir_entries;
1854 	*data++ = entry_length;
1855 	len -= 2;
1856 	memset(data, 0xff, len);
1857 
1858 	buflen = dir_entries * entry_length;
1859 	buf = dma_alloc_coherent(&bp->pdev->dev, buflen, &dma_handle,
1860 				 GFP_KERNEL);
1861 	if (!buf) {
1862 		netdev_err(dev, "dma_alloc_coherent failure, length = %u\n",
1863 			   (unsigned)buflen);
1864 		return -ENOMEM;
1865 	}
1866 	bnxt_hwrm_cmd_hdr_init(bp, &req, HWRM_NVM_GET_DIR_ENTRIES, -1, -1);
1867 	req.host_dest_addr = cpu_to_le64(dma_handle);
1868 	rc = hwrm_send_message(bp, &req, sizeof(req), HWRM_CMD_TIMEOUT);
1869 	if (rc == 0)
1870 		memcpy(data, buf, len > buflen ? buflen : len);
1871 	dma_free_coherent(&bp->pdev->dev, buflen, buf, dma_handle);
1872 	return rc;
1873 }
1874 
1875 static int bnxt_get_nvram_item(struct net_device *dev, u32 index, u32 offset,
1876 			       u32 length, u8 *data)
1877 {
1878 	struct bnxt *bp = netdev_priv(dev);
1879 	int rc;
1880 	u8 *buf;
1881 	dma_addr_t dma_handle;
1882 	struct hwrm_nvm_read_input req = {0};
1883 
1884 	if (!length)
1885 		return -EINVAL;
1886 
1887 	buf = dma_alloc_coherent(&bp->pdev->dev, length, &dma_handle,
1888 				 GFP_KERNEL);
1889 	if (!buf) {
1890 		netdev_err(dev, "dma_alloc_coherent failure, length = %u\n",
1891 			   (unsigned)length);
1892 		return -ENOMEM;
1893 	}
1894 	bnxt_hwrm_cmd_hdr_init(bp, &req, HWRM_NVM_READ, -1, -1);
1895 	req.host_dest_addr = cpu_to_le64(dma_handle);
1896 	req.dir_idx = cpu_to_le16(index);
1897 	req.offset = cpu_to_le32(offset);
1898 	req.len = cpu_to_le32(length);
1899 
1900 	rc = hwrm_send_message(bp, &req, sizeof(req), HWRM_CMD_TIMEOUT);
1901 	if (rc == 0)
1902 		memcpy(data, buf, length);
1903 	dma_free_coherent(&bp->pdev->dev, length, buf, dma_handle);
1904 	return rc;
1905 }
1906 
1907 static int bnxt_find_nvram_item(struct net_device *dev, u16 type, u16 ordinal,
1908 				u16 ext, u16 *index, u32 *item_length,
1909 				u32 *data_length)
1910 {
1911 	struct bnxt *bp = netdev_priv(dev);
1912 	int rc;
1913 	struct hwrm_nvm_find_dir_entry_input req = {0};
1914 	struct hwrm_nvm_find_dir_entry_output *output = bp->hwrm_cmd_resp_addr;
1915 
1916 	bnxt_hwrm_cmd_hdr_init(bp, &req, HWRM_NVM_FIND_DIR_ENTRY, -1, -1);
1917 	req.enables = 0;
1918 	req.dir_idx = 0;
1919 	req.dir_type = cpu_to_le16(type);
1920 	req.dir_ordinal = cpu_to_le16(ordinal);
1921 	req.dir_ext = cpu_to_le16(ext);
1922 	req.opt_ordinal = NVM_FIND_DIR_ENTRY_REQ_OPT_ORDINAL_EQ;
1923 	mutex_lock(&bp->hwrm_cmd_lock);
1924 	rc = _hwrm_send_message_silent(bp, &req, sizeof(req), HWRM_CMD_TIMEOUT);
1925 	if (rc == 0) {
1926 		if (index)
1927 			*index = le16_to_cpu(output->dir_idx);
1928 		if (item_length)
1929 			*item_length = le32_to_cpu(output->dir_item_length);
1930 		if (data_length)
1931 			*data_length = le32_to_cpu(output->dir_data_length);
1932 	}
1933 	mutex_unlock(&bp->hwrm_cmd_lock);
1934 	return rc;
1935 }
1936 
1937 static char *bnxt_parse_pkglog(int desired_field, u8 *data, size_t datalen)
1938 {
1939 	char	*retval = NULL;
1940 	char	*p;
1941 	char	*value;
1942 	int	field = 0;
1943 
1944 	if (datalen < 1)
1945 		return NULL;
1946 	/* null-terminate the log data (removing last '\n'): */
1947 	data[datalen - 1] = 0;
1948 	for (p = data; *p != 0; p++) {
1949 		field = 0;
1950 		retval = NULL;
1951 		while (*p != 0 && *p != '\n') {
1952 			value = p;
1953 			while (*p != 0 && *p != '\t' && *p != '\n')
1954 				p++;
1955 			if (field == desired_field)
1956 				retval = value;
1957 			if (*p != '\t')
1958 				break;
1959 			*p = 0;
1960 			field++;
1961 			p++;
1962 		}
1963 		if (*p == 0)
1964 			break;
1965 		*p = 0;
1966 	}
1967 	return retval;
1968 }
1969 
1970 static void bnxt_get_pkgver(struct net_device *dev)
1971 {
1972 	struct bnxt *bp = netdev_priv(dev);
1973 	u16 index = 0;
1974 	char *pkgver;
1975 	u32 pkglen;
1976 	u8 *pkgbuf;
1977 	int len;
1978 
1979 	if (bnxt_find_nvram_item(dev, BNX_DIR_TYPE_PKG_LOG,
1980 				 BNX_DIR_ORDINAL_FIRST, BNX_DIR_EXT_NONE,
1981 				 &index, NULL, &pkglen) != 0)
1982 		return;
1983 
1984 	pkgbuf = kzalloc(pkglen, GFP_KERNEL);
1985 	if (!pkgbuf) {
1986 		dev_err(&bp->pdev->dev, "Unable to allocate memory for pkg version, length = %u\n",
1987 			pkglen);
1988 		return;
1989 	}
1990 
1991 	if (bnxt_get_nvram_item(dev, index, 0, pkglen, pkgbuf))
1992 		goto err;
1993 
1994 	pkgver = bnxt_parse_pkglog(BNX_PKG_LOG_FIELD_IDX_PKG_VERSION, pkgbuf,
1995 				   pkglen);
1996 	if (pkgver && *pkgver != 0 && isdigit(*pkgver)) {
1997 		len = strlen(bp->fw_ver_str);
1998 		snprintf(bp->fw_ver_str + len, FW_VER_STR_LEN - len - 1,
1999 			 "/pkg %s", pkgver);
2000 	}
2001 err:
2002 	kfree(pkgbuf);
2003 }
2004 
2005 static int bnxt_get_eeprom(struct net_device *dev,
2006 			   struct ethtool_eeprom *eeprom,
2007 			   u8 *data)
2008 {
2009 	u32 index;
2010 	u32 offset;
2011 
2012 	if (eeprom->offset == 0) /* special offset value to get directory */
2013 		return bnxt_get_nvram_directory(dev, eeprom->len, data);
2014 
2015 	index = eeprom->offset >> 24;
2016 	offset = eeprom->offset & 0xffffff;
2017 
2018 	if (index == 0) {
2019 		netdev_err(dev, "unsupported index value: %d\n", index);
2020 		return -EINVAL;
2021 	}
2022 
2023 	return bnxt_get_nvram_item(dev, index - 1, offset, eeprom->len, data);
2024 }
2025 
2026 static int bnxt_erase_nvram_directory(struct net_device *dev, u8 index)
2027 {
2028 	struct bnxt *bp = netdev_priv(dev);
2029 	struct hwrm_nvm_erase_dir_entry_input req = {0};
2030 
2031 	bnxt_hwrm_cmd_hdr_init(bp, &req, HWRM_NVM_ERASE_DIR_ENTRY, -1, -1);
2032 	req.dir_idx = cpu_to_le16(index);
2033 	return hwrm_send_message(bp, &req, sizeof(req), HWRM_CMD_TIMEOUT);
2034 }
2035 
2036 static int bnxt_set_eeprom(struct net_device *dev,
2037 			   struct ethtool_eeprom *eeprom,
2038 			   u8 *data)
2039 {
2040 	struct bnxt *bp = netdev_priv(dev);
2041 	u8 index, dir_op;
2042 	u16 type, ext, ordinal, attr;
2043 
2044 	if (!BNXT_PF(bp)) {
2045 		netdev_err(dev, "NVM write not supported from a virtual function\n");
2046 		return -EINVAL;
2047 	}
2048 
2049 	type = eeprom->magic >> 16;
2050 
2051 	if (type == 0xffff) { /* special value for directory operations */
2052 		index = eeprom->magic & 0xff;
2053 		dir_op = eeprom->magic >> 8;
2054 		if (index == 0)
2055 			return -EINVAL;
2056 		switch (dir_op) {
2057 		case 0x0e: /* erase */
2058 			if (eeprom->offset != ~eeprom->magic)
2059 				return -EINVAL;
2060 			return bnxt_erase_nvram_directory(dev, index - 1);
2061 		default:
2062 			return -EINVAL;
2063 		}
2064 	}
2065 
2066 	/* Create or re-write an NVM item: */
2067 	if (bnxt_dir_type_is_executable(type) == true)
2068 		return -EOPNOTSUPP;
2069 	ext = eeprom->magic & 0xffff;
2070 	ordinal = eeprom->offset >> 16;
2071 	attr = eeprom->offset & 0xffff;
2072 
2073 	return bnxt_flash_nvram(dev, type, ordinal, ext, attr, data,
2074 				eeprom->len);
2075 }
2076 
2077 static int bnxt_set_eee(struct net_device *dev, struct ethtool_eee *edata)
2078 {
2079 	struct bnxt *bp = netdev_priv(dev);
2080 	struct ethtool_eee *eee = &bp->eee;
2081 	struct bnxt_link_info *link_info = &bp->link_info;
2082 	u32 advertising =
2083 		 _bnxt_fw_to_ethtool_adv_spds(link_info->advertising, 0);
2084 	int rc = 0;
2085 
2086 	if (!BNXT_SINGLE_PF(bp))
2087 		return -EOPNOTSUPP;
2088 
2089 	if (!(bp->flags & BNXT_FLAG_EEE_CAP))
2090 		return -EOPNOTSUPP;
2091 
2092 	if (!edata->eee_enabled)
2093 		goto eee_ok;
2094 
2095 	if (!(link_info->autoneg & BNXT_AUTONEG_SPEED)) {
2096 		netdev_warn(dev, "EEE requires autoneg\n");
2097 		return -EINVAL;
2098 	}
2099 	if (edata->tx_lpi_enabled) {
2100 		if (bp->lpi_tmr_hi && (edata->tx_lpi_timer > bp->lpi_tmr_hi ||
2101 				       edata->tx_lpi_timer < bp->lpi_tmr_lo)) {
2102 			netdev_warn(dev, "Valid LPI timer range is %d and %d microsecs\n",
2103 				    bp->lpi_tmr_lo, bp->lpi_tmr_hi);
2104 			return -EINVAL;
2105 		} else if (!bp->lpi_tmr_hi) {
2106 			edata->tx_lpi_timer = eee->tx_lpi_timer;
2107 		}
2108 	}
2109 	if (!edata->advertised) {
2110 		edata->advertised = advertising & eee->supported;
2111 	} else if (edata->advertised & ~advertising) {
2112 		netdev_warn(dev, "EEE advertised %x must be a subset of autoneg advertised speeds %x\n",
2113 			    edata->advertised, advertising);
2114 		return -EINVAL;
2115 	}
2116 
2117 	eee->advertised = edata->advertised;
2118 	eee->tx_lpi_enabled = edata->tx_lpi_enabled;
2119 	eee->tx_lpi_timer = edata->tx_lpi_timer;
2120 eee_ok:
2121 	eee->eee_enabled = edata->eee_enabled;
2122 
2123 	if (netif_running(dev))
2124 		rc = bnxt_hwrm_set_link_setting(bp, false, true);
2125 
2126 	return rc;
2127 }
2128 
2129 static int bnxt_get_eee(struct net_device *dev, struct ethtool_eee *edata)
2130 {
2131 	struct bnxt *bp = netdev_priv(dev);
2132 
2133 	if (!(bp->flags & BNXT_FLAG_EEE_CAP))
2134 		return -EOPNOTSUPP;
2135 
2136 	*edata = bp->eee;
2137 	if (!bp->eee.eee_enabled) {
2138 		/* Preserve tx_lpi_timer so that the last value will be used
2139 		 * by default when it is re-enabled.
2140 		 */
2141 		edata->advertised = 0;
2142 		edata->tx_lpi_enabled = 0;
2143 	}
2144 
2145 	if (!bp->eee.eee_active)
2146 		edata->lp_advertised = 0;
2147 
2148 	return 0;
2149 }
2150 
2151 static int bnxt_read_sfp_module_eeprom_info(struct bnxt *bp, u16 i2c_addr,
2152 					    u16 page_number, u16 start_addr,
2153 					    u16 data_length, u8 *buf)
2154 {
2155 	struct hwrm_port_phy_i2c_read_input req = {0};
2156 	struct hwrm_port_phy_i2c_read_output *output = bp->hwrm_cmd_resp_addr;
2157 	int rc, byte_offset = 0;
2158 
2159 	bnxt_hwrm_cmd_hdr_init(bp, &req, HWRM_PORT_PHY_I2C_READ, -1, -1);
2160 	req.i2c_slave_addr = i2c_addr;
2161 	req.page_number = cpu_to_le16(page_number);
2162 	req.port_id = cpu_to_le16(bp->pf.port_id);
2163 	do {
2164 		u16 xfer_size;
2165 
2166 		xfer_size = min_t(u16, data_length, BNXT_MAX_PHY_I2C_RESP_SIZE);
2167 		data_length -= xfer_size;
2168 		req.page_offset = cpu_to_le16(start_addr + byte_offset);
2169 		req.data_length = xfer_size;
2170 		req.enables = cpu_to_le32(start_addr + byte_offset ?
2171 				 PORT_PHY_I2C_READ_REQ_ENABLES_PAGE_OFFSET : 0);
2172 		mutex_lock(&bp->hwrm_cmd_lock);
2173 		rc = _hwrm_send_message(bp, &req, sizeof(req),
2174 					HWRM_CMD_TIMEOUT);
2175 		if (!rc)
2176 			memcpy(buf + byte_offset, output->data, xfer_size);
2177 		mutex_unlock(&bp->hwrm_cmd_lock);
2178 		byte_offset += xfer_size;
2179 	} while (!rc && data_length > 0);
2180 
2181 	return rc;
2182 }
2183 
2184 static int bnxt_get_module_info(struct net_device *dev,
2185 				struct ethtool_modinfo *modinfo)
2186 {
2187 	u8 data[SFF_DIAG_SUPPORT_OFFSET + 1];
2188 	struct bnxt *bp = netdev_priv(dev);
2189 	int rc;
2190 
2191 	/* No point in going further if phy status indicates
2192 	 * module is not inserted or if it is powered down or
2193 	 * if it is of type 10GBase-T
2194 	 */
2195 	if (bp->link_info.module_status >
2196 		PORT_PHY_QCFG_RESP_MODULE_STATUS_WARNINGMSG)
2197 		return -EOPNOTSUPP;
2198 
2199 	/* This feature is not supported in older firmware versions */
2200 	if (bp->hwrm_spec_code < 0x10202)
2201 		return -EOPNOTSUPP;
2202 
2203 	rc = bnxt_read_sfp_module_eeprom_info(bp, I2C_DEV_ADDR_A0, 0, 0,
2204 					      SFF_DIAG_SUPPORT_OFFSET + 1,
2205 					      data);
2206 	if (!rc) {
2207 		u8 module_id = data[0];
2208 		u8 diag_supported = data[SFF_DIAG_SUPPORT_OFFSET];
2209 
2210 		switch (module_id) {
2211 		case SFF_MODULE_ID_SFP:
2212 			modinfo->type = ETH_MODULE_SFF_8472;
2213 			modinfo->eeprom_len = ETH_MODULE_SFF_8472_LEN;
2214 			if (!diag_supported)
2215 				modinfo->eeprom_len = ETH_MODULE_SFF_8436_LEN;
2216 			break;
2217 		case SFF_MODULE_ID_QSFP:
2218 		case SFF_MODULE_ID_QSFP_PLUS:
2219 			modinfo->type = ETH_MODULE_SFF_8436;
2220 			modinfo->eeprom_len = ETH_MODULE_SFF_8436_LEN;
2221 			break;
2222 		case SFF_MODULE_ID_QSFP28:
2223 			modinfo->type = ETH_MODULE_SFF_8636;
2224 			modinfo->eeprom_len = ETH_MODULE_SFF_8636_LEN;
2225 			break;
2226 		default:
2227 			rc = -EOPNOTSUPP;
2228 			break;
2229 		}
2230 	}
2231 	return rc;
2232 }
2233 
2234 static int bnxt_get_module_eeprom(struct net_device *dev,
2235 				  struct ethtool_eeprom *eeprom,
2236 				  u8 *data)
2237 {
2238 	struct bnxt *bp = netdev_priv(dev);
2239 	u16  start = eeprom->offset, length = eeprom->len;
2240 	int rc = 0;
2241 
2242 	memset(data, 0, eeprom->len);
2243 
2244 	/* Read A0 portion of the EEPROM */
2245 	if (start < ETH_MODULE_SFF_8436_LEN) {
2246 		if (start + eeprom->len > ETH_MODULE_SFF_8436_LEN)
2247 			length = ETH_MODULE_SFF_8436_LEN - start;
2248 		rc = bnxt_read_sfp_module_eeprom_info(bp, I2C_DEV_ADDR_A0, 0,
2249 						      start, length, data);
2250 		if (rc)
2251 			return rc;
2252 		start += length;
2253 		data += length;
2254 		length = eeprom->len - length;
2255 	}
2256 
2257 	/* Read A2 portion of the EEPROM */
2258 	if (length) {
2259 		start -= ETH_MODULE_SFF_8436_LEN;
2260 		rc = bnxt_read_sfp_module_eeprom_info(bp, I2C_DEV_ADDR_A2, 1,
2261 						      start, length, data);
2262 	}
2263 	return rc;
2264 }
2265 
2266 static int bnxt_nway_reset(struct net_device *dev)
2267 {
2268 	int rc = 0;
2269 
2270 	struct bnxt *bp = netdev_priv(dev);
2271 	struct bnxt_link_info *link_info = &bp->link_info;
2272 
2273 	if (!BNXT_SINGLE_PF(bp))
2274 		return -EOPNOTSUPP;
2275 
2276 	if (!(link_info->autoneg & BNXT_AUTONEG_SPEED))
2277 		return -EINVAL;
2278 
2279 	if (netif_running(dev))
2280 		rc = bnxt_hwrm_set_link_setting(bp, true, false);
2281 
2282 	return rc;
2283 }
2284 
2285 static int bnxt_set_phys_id(struct net_device *dev,
2286 			    enum ethtool_phys_id_state state)
2287 {
2288 	struct hwrm_port_led_cfg_input req = {0};
2289 	struct bnxt *bp = netdev_priv(dev);
2290 	struct bnxt_pf_info *pf = &bp->pf;
2291 	struct bnxt_led_cfg *led_cfg;
2292 	u8 led_state;
2293 	__le16 duration;
2294 	int i, rc;
2295 
2296 	if (!bp->num_leds || BNXT_VF(bp))
2297 		return -EOPNOTSUPP;
2298 
2299 	if (state == ETHTOOL_ID_ACTIVE) {
2300 		led_state = PORT_LED_CFG_REQ_LED0_STATE_BLINKALT;
2301 		duration = cpu_to_le16(500);
2302 	} else if (state == ETHTOOL_ID_INACTIVE) {
2303 		led_state = PORT_LED_CFG_REQ_LED1_STATE_DEFAULT;
2304 		duration = cpu_to_le16(0);
2305 	} else {
2306 		return -EINVAL;
2307 	}
2308 	bnxt_hwrm_cmd_hdr_init(bp, &req, HWRM_PORT_LED_CFG, -1, -1);
2309 	req.port_id = cpu_to_le16(pf->port_id);
2310 	req.num_leds = bp->num_leds;
2311 	led_cfg = (struct bnxt_led_cfg *)&req.led0_id;
2312 	for (i = 0; i < bp->num_leds; i++, led_cfg++) {
2313 		req.enables |= BNXT_LED_DFLT_ENABLES(i);
2314 		led_cfg->led_id = bp->leds[i].led_id;
2315 		led_cfg->led_state = led_state;
2316 		led_cfg->led_blink_on = duration;
2317 		led_cfg->led_blink_off = duration;
2318 		led_cfg->led_group_id = bp->leds[i].led_group_id;
2319 	}
2320 	rc = hwrm_send_message(bp, &req, sizeof(req), HWRM_CMD_TIMEOUT);
2321 	if (rc)
2322 		rc = -EIO;
2323 	return rc;
2324 }
2325 
2326 static int bnxt_hwrm_selftest_irq(struct bnxt *bp, u16 cmpl_ring)
2327 {
2328 	struct hwrm_selftest_irq_input req = {0};
2329 
2330 	bnxt_hwrm_cmd_hdr_init(bp, &req, HWRM_SELFTEST_IRQ, cmpl_ring, -1);
2331 	return hwrm_send_message(bp, &req, sizeof(req), HWRM_CMD_TIMEOUT);
2332 }
2333 
2334 static int bnxt_test_irq(struct bnxt *bp)
2335 {
2336 	int i;
2337 
2338 	for (i = 0; i < bp->cp_nr_rings; i++) {
2339 		u16 cmpl_ring = bp->grp_info[i].cp_fw_ring_id;
2340 		int rc;
2341 
2342 		rc = bnxt_hwrm_selftest_irq(bp, cmpl_ring);
2343 		if (rc)
2344 			return rc;
2345 	}
2346 	return 0;
2347 }
2348 
2349 static int bnxt_hwrm_mac_loopback(struct bnxt *bp, bool enable)
2350 {
2351 	struct hwrm_port_mac_cfg_input req = {0};
2352 
2353 	bnxt_hwrm_cmd_hdr_init(bp, &req, HWRM_PORT_MAC_CFG, -1, -1);
2354 
2355 	req.enables = cpu_to_le32(PORT_MAC_CFG_REQ_ENABLES_LPBK);
2356 	if (enable)
2357 		req.lpbk = PORT_MAC_CFG_REQ_LPBK_LOCAL;
2358 	else
2359 		req.lpbk = PORT_MAC_CFG_REQ_LPBK_NONE;
2360 	return hwrm_send_message(bp, &req, sizeof(req), HWRM_CMD_TIMEOUT);
2361 }
2362 
2363 static int bnxt_disable_an_for_lpbk(struct bnxt *bp,
2364 				    struct hwrm_port_phy_cfg_input *req)
2365 {
2366 	struct bnxt_link_info *link_info = &bp->link_info;
2367 	u16 fw_advertising = link_info->advertising;
2368 	u16 fw_speed;
2369 	int rc;
2370 
2371 	if (!link_info->autoneg)
2372 		return 0;
2373 
2374 	fw_speed = PORT_PHY_CFG_REQ_FORCE_LINK_SPEED_1GB;
2375 	if (netif_carrier_ok(bp->dev))
2376 		fw_speed = bp->link_info.link_speed;
2377 	else if (fw_advertising & BNXT_LINK_SPEED_MSK_10GB)
2378 		fw_speed = PORT_PHY_CFG_REQ_FORCE_LINK_SPEED_10GB;
2379 	else if (fw_advertising & BNXT_LINK_SPEED_MSK_25GB)
2380 		fw_speed = PORT_PHY_CFG_REQ_FORCE_LINK_SPEED_25GB;
2381 	else if (fw_advertising & BNXT_LINK_SPEED_MSK_40GB)
2382 		fw_speed = PORT_PHY_CFG_REQ_FORCE_LINK_SPEED_40GB;
2383 	else if (fw_advertising & BNXT_LINK_SPEED_MSK_50GB)
2384 		fw_speed = PORT_PHY_CFG_REQ_FORCE_LINK_SPEED_50GB;
2385 
2386 	req->force_link_speed = cpu_to_le16(fw_speed);
2387 	req->flags |= cpu_to_le32(PORT_PHY_CFG_REQ_FLAGS_FORCE |
2388 				  PORT_PHY_CFG_REQ_FLAGS_RESET_PHY);
2389 	rc = hwrm_send_message(bp, req, sizeof(*req), HWRM_CMD_TIMEOUT);
2390 	req->flags = 0;
2391 	req->force_link_speed = cpu_to_le16(0);
2392 	return rc;
2393 }
2394 
2395 static int bnxt_hwrm_phy_loopback(struct bnxt *bp, bool enable)
2396 {
2397 	struct hwrm_port_phy_cfg_input req = {0};
2398 
2399 	bnxt_hwrm_cmd_hdr_init(bp, &req, HWRM_PORT_PHY_CFG, -1, -1);
2400 
2401 	if (enable) {
2402 		bnxt_disable_an_for_lpbk(bp, &req);
2403 		req.lpbk = PORT_PHY_CFG_REQ_LPBK_LOCAL;
2404 	} else {
2405 		req.lpbk = PORT_PHY_CFG_REQ_LPBK_NONE;
2406 	}
2407 	req.enables = cpu_to_le32(PORT_PHY_CFG_REQ_ENABLES_LPBK);
2408 	return hwrm_send_message(bp, &req, sizeof(req), HWRM_CMD_TIMEOUT);
2409 }
2410 
2411 static int bnxt_rx_loopback(struct bnxt *bp, struct bnxt_napi *bnapi,
2412 			    u32 raw_cons, int pkt_size)
2413 {
2414 	struct bnxt_cp_ring_info *cpr = &bnapi->cp_ring;
2415 	struct bnxt_rx_ring_info *rxr = bnapi->rx_ring;
2416 	struct bnxt_sw_rx_bd *rx_buf;
2417 	struct rx_cmp *rxcmp;
2418 	u16 cp_cons, cons;
2419 	u8 *data;
2420 	u32 len;
2421 	int i;
2422 
2423 	cp_cons = RING_CMP(raw_cons);
2424 	rxcmp = (struct rx_cmp *)
2425 		&cpr->cp_desc_ring[CP_RING(cp_cons)][CP_IDX(cp_cons)];
2426 	cons = rxcmp->rx_cmp_opaque;
2427 	rx_buf = &rxr->rx_buf_ring[cons];
2428 	data = rx_buf->data_ptr;
2429 	len = le32_to_cpu(rxcmp->rx_cmp_len_flags_type) >> RX_CMP_LEN_SHIFT;
2430 	if (len != pkt_size)
2431 		return -EIO;
2432 	i = ETH_ALEN;
2433 	if (!ether_addr_equal(data + i, bnapi->bp->dev->dev_addr))
2434 		return -EIO;
2435 	i += ETH_ALEN;
2436 	for (  ; i < pkt_size; i++) {
2437 		if (data[i] != (u8)(i & 0xff))
2438 			return -EIO;
2439 	}
2440 	return 0;
2441 }
2442 
2443 static int bnxt_poll_loopback(struct bnxt *bp, int pkt_size)
2444 {
2445 	struct bnxt_napi *bnapi = bp->bnapi[0];
2446 	struct bnxt_cp_ring_info *cpr;
2447 	struct tx_cmp *txcmp;
2448 	int rc = -EIO;
2449 	u32 raw_cons;
2450 	u32 cons;
2451 	int i;
2452 
2453 	cpr = &bnapi->cp_ring;
2454 	raw_cons = cpr->cp_raw_cons;
2455 	for (i = 0; i < 200; i++) {
2456 		cons = RING_CMP(raw_cons);
2457 		txcmp = &cpr->cp_desc_ring[CP_RING(cons)][CP_IDX(cons)];
2458 
2459 		if (!TX_CMP_VALID(txcmp, raw_cons)) {
2460 			udelay(5);
2461 			continue;
2462 		}
2463 
2464 		/* The valid test of the entry must be done first before
2465 		 * reading any further.
2466 		 */
2467 		dma_rmb();
2468 		if (TX_CMP_TYPE(txcmp) == CMP_TYPE_RX_L2_CMP) {
2469 			rc = bnxt_rx_loopback(bp, bnapi, raw_cons, pkt_size);
2470 			raw_cons = NEXT_RAW_CMP(raw_cons);
2471 			raw_cons = NEXT_RAW_CMP(raw_cons);
2472 			break;
2473 		}
2474 		raw_cons = NEXT_RAW_CMP(raw_cons);
2475 	}
2476 	cpr->cp_raw_cons = raw_cons;
2477 	return rc;
2478 }
2479 
2480 static int bnxt_run_loopback(struct bnxt *bp)
2481 {
2482 	struct bnxt_tx_ring_info *txr = &bp->tx_ring[0];
2483 	int pkt_size, i = 0;
2484 	struct sk_buff *skb;
2485 	dma_addr_t map;
2486 	u8 *data;
2487 	int rc;
2488 
2489 	pkt_size = min(bp->dev->mtu + ETH_HLEN, bp->rx_copy_thresh);
2490 	skb = netdev_alloc_skb(bp->dev, pkt_size);
2491 	if (!skb)
2492 		return -ENOMEM;
2493 	data = skb_put(skb, pkt_size);
2494 	eth_broadcast_addr(data);
2495 	i += ETH_ALEN;
2496 	ether_addr_copy(&data[i], bp->dev->dev_addr);
2497 	i += ETH_ALEN;
2498 	for ( ; i < pkt_size; i++)
2499 		data[i] = (u8)(i & 0xff);
2500 
2501 	map = dma_map_single(&bp->pdev->dev, skb->data, pkt_size,
2502 			     PCI_DMA_TODEVICE);
2503 	if (dma_mapping_error(&bp->pdev->dev, map)) {
2504 		dev_kfree_skb(skb);
2505 		return -EIO;
2506 	}
2507 	bnxt_xmit_xdp(bp, txr, map, pkt_size, 0);
2508 
2509 	/* Sync BD data before updating doorbell */
2510 	wmb();
2511 
2512 	bnxt_db_write(bp, txr->tx_doorbell, DB_KEY_TX | txr->tx_prod);
2513 	rc = bnxt_poll_loopback(bp, pkt_size);
2514 
2515 	dma_unmap_single(&bp->pdev->dev, map, pkt_size, PCI_DMA_TODEVICE);
2516 	dev_kfree_skb(skb);
2517 	return rc;
2518 }
2519 
2520 static int bnxt_run_fw_tests(struct bnxt *bp, u8 test_mask, u8 *test_results)
2521 {
2522 	struct hwrm_selftest_exec_output *resp = bp->hwrm_cmd_resp_addr;
2523 	struct hwrm_selftest_exec_input req = {0};
2524 	int rc;
2525 
2526 	bnxt_hwrm_cmd_hdr_init(bp, &req, HWRM_SELFTEST_EXEC, -1, -1);
2527 	mutex_lock(&bp->hwrm_cmd_lock);
2528 	resp->test_success = 0;
2529 	req.flags = test_mask;
2530 	rc = _hwrm_send_message(bp, &req, sizeof(req), bp->test_info->timeout);
2531 	*test_results = resp->test_success;
2532 	mutex_unlock(&bp->hwrm_cmd_lock);
2533 	return rc;
2534 }
2535 
2536 #define BNXT_DRV_TESTS			3
2537 #define BNXT_MACLPBK_TEST_IDX		(bp->num_tests - BNXT_DRV_TESTS)
2538 #define BNXT_PHYLPBK_TEST_IDX		(BNXT_MACLPBK_TEST_IDX + 1)
2539 #define BNXT_IRQ_TEST_IDX		(BNXT_MACLPBK_TEST_IDX + 2)
2540 
2541 static void bnxt_self_test(struct net_device *dev, struct ethtool_test *etest,
2542 			   u64 *buf)
2543 {
2544 	struct bnxt *bp = netdev_priv(dev);
2545 	bool offline = false;
2546 	u8 test_results = 0;
2547 	u8 test_mask = 0;
2548 	int rc, i;
2549 
2550 	if (!bp->num_tests || !BNXT_SINGLE_PF(bp))
2551 		return;
2552 	memset(buf, 0, sizeof(u64) * bp->num_tests);
2553 	if (!netif_running(dev)) {
2554 		etest->flags |= ETH_TEST_FL_FAILED;
2555 		return;
2556 	}
2557 
2558 	if (etest->flags & ETH_TEST_FL_OFFLINE) {
2559 		if (bp->pf.active_vfs) {
2560 			etest->flags |= ETH_TEST_FL_FAILED;
2561 			netdev_warn(dev, "Offline tests cannot be run with active VFs\n");
2562 			return;
2563 		}
2564 		offline = true;
2565 	}
2566 
2567 	for (i = 0; i < bp->num_tests - BNXT_DRV_TESTS; i++) {
2568 		u8 bit_val = 1 << i;
2569 
2570 		if (!(bp->test_info->offline_mask & bit_val))
2571 			test_mask |= bit_val;
2572 		else if (offline)
2573 			test_mask |= bit_val;
2574 	}
2575 	if (!offline) {
2576 		bnxt_run_fw_tests(bp, test_mask, &test_results);
2577 	} else {
2578 		rc = bnxt_close_nic(bp, false, false);
2579 		if (rc)
2580 			return;
2581 		bnxt_run_fw_tests(bp, test_mask, &test_results);
2582 
2583 		buf[BNXT_MACLPBK_TEST_IDX] = 1;
2584 		bnxt_hwrm_mac_loopback(bp, true);
2585 		msleep(250);
2586 		rc = bnxt_half_open_nic(bp);
2587 		if (rc) {
2588 			bnxt_hwrm_mac_loopback(bp, false);
2589 			etest->flags |= ETH_TEST_FL_FAILED;
2590 			return;
2591 		}
2592 		if (bnxt_run_loopback(bp))
2593 			etest->flags |= ETH_TEST_FL_FAILED;
2594 		else
2595 			buf[BNXT_MACLPBK_TEST_IDX] = 0;
2596 
2597 		bnxt_hwrm_mac_loopback(bp, false);
2598 		bnxt_hwrm_phy_loopback(bp, true);
2599 		msleep(1000);
2600 		if (bnxt_run_loopback(bp)) {
2601 			buf[BNXT_PHYLPBK_TEST_IDX] = 1;
2602 			etest->flags |= ETH_TEST_FL_FAILED;
2603 		}
2604 		bnxt_hwrm_phy_loopback(bp, false);
2605 		bnxt_half_close_nic(bp);
2606 		bnxt_open_nic(bp, false, true);
2607 	}
2608 	if (bnxt_test_irq(bp)) {
2609 		buf[BNXT_IRQ_TEST_IDX] = 1;
2610 		etest->flags |= ETH_TEST_FL_FAILED;
2611 	}
2612 	for (i = 0; i < bp->num_tests - BNXT_DRV_TESTS; i++) {
2613 		u8 bit_val = 1 << i;
2614 
2615 		if ((test_mask & bit_val) && !(test_results & bit_val)) {
2616 			buf[i] = 1;
2617 			etest->flags |= ETH_TEST_FL_FAILED;
2618 		}
2619 	}
2620 }
2621 
2622 static int bnxt_reset(struct net_device *dev, u32 *flags)
2623 {
2624 	struct bnxt *bp = netdev_priv(dev);
2625 	int rc = 0;
2626 
2627 	if (!BNXT_PF(bp)) {
2628 		netdev_err(dev, "Reset is not supported from a VF\n");
2629 		return -EOPNOTSUPP;
2630 	}
2631 
2632 	if (pci_vfs_assigned(bp->pdev)) {
2633 		netdev_err(dev,
2634 			   "Reset not allowed when VFs are assigned to VMs\n");
2635 		return -EBUSY;
2636 	}
2637 
2638 	if (*flags == ETH_RESET_ALL) {
2639 		/* This feature is not supported in older firmware versions */
2640 		if (bp->hwrm_spec_code < 0x10803)
2641 			return -EOPNOTSUPP;
2642 
2643 		rc = bnxt_firmware_reset(dev, BNXT_FW_RESET_CHIP);
2644 		if (!rc) {
2645 			netdev_info(dev, "Reset request successful. Reload driver to complete reset\n");
2646 			*flags = 0;
2647 		}
2648 	} else if (*flags == ETH_RESET_AP) {
2649 		/* This feature is not supported in older firmware versions */
2650 		if (bp->hwrm_spec_code < 0x10803)
2651 			return -EOPNOTSUPP;
2652 
2653 		rc = bnxt_firmware_reset(dev, BNXT_FW_RESET_AP);
2654 		if (!rc) {
2655 			netdev_info(dev, "Reset Application Processor request successful.\n");
2656 			*flags = 0;
2657 		}
2658 	} else {
2659 		rc = -EINVAL;
2660 	}
2661 
2662 	return rc;
2663 }
2664 
2665 void bnxt_ethtool_init(struct bnxt *bp)
2666 {
2667 	struct hwrm_selftest_qlist_output *resp = bp->hwrm_cmd_resp_addr;
2668 	struct hwrm_selftest_qlist_input req = {0};
2669 	struct bnxt_test_info *test_info;
2670 	struct net_device *dev = bp->dev;
2671 	int i, rc;
2672 
2673 	bnxt_get_pkgver(dev);
2674 
2675 	if (bp->hwrm_spec_code < 0x10704 || !BNXT_SINGLE_PF(bp))
2676 		return;
2677 
2678 	bnxt_hwrm_cmd_hdr_init(bp, &req, HWRM_SELFTEST_QLIST, -1, -1);
2679 	mutex_lock(&bp->hwrm_cmd_lock);
2680 	rc = _hwrm_send_message(bp, &req, sizeof(req), HWRM_CMD_TIMEOUT);
2681 	if (rc)
2682 		goto ethtool_init_exit;
2683 
2684 	test_info = kzalloc(sizeof(*bp->test_info), GFP_KERNEL);
2685 	if (!test_info)
2686 		goto ethtool_init_exit;
2687 
2688 	bp->test_info = test_info;
2689 	bp->num_tests = resp->num_tests + BNXT_DRV_TESTS;
2690 	if (bp->num_tests > BNXT_MAX_TEST)
2691 		bp->num_tests = BNXT_MAX_TEST;
2692 
2693 	test_info->offline_mask = resp->offline_tests;
2694 	test_info->timeout = le16_to_cpu(resp->test_timeout);
2695 	if (!test_info->timeout)
2696 		test_info->timeout = HWRM_CMD_TIMEOUT;
2697 	for (i = 0; i < bp->num_tests; i++) {
2698 		char *str = test_info->string[i];
2699 		char *fw_str = resp->test0_name + i * 32;
2700 
2701 		if (i == BNXT_MACLPBK_TEST_IDX) {
2702 			strcpy(str, "Mac loopback test (offline)");
2703 		} else if (i == BNXT_PHYLPBK_TEST_IDX) {
2704 			strcpy(str, "Phy loopback test (offline)");
2705 		} else if (i == BNXT_IRQ_TEST_IDX) {
2706 			strcpy(str, "Interrupt_test (offline)");
2707 		} else {
2708 			strlcpy(str, fw_str, ETH_GSTRING_LEN);
2709 			strncat(str, " test", ETH_GSTRING_LEN - strlen(str));
2710 			if (test_info->offline_mask & (1 << i))
2711 				strncat(str, " (offline)",
2712 					ETH_GSTRING_LEN - strlen(str));
2713 			else
2714 				strncat(str, " (online)",
2715 					ETH_GSTRING_LEN - strlen(str));
2716 		}
2717 	}
2718 
2719 ethtool_init_exit:
2720 	mutex_unlock(&bp->hwrm_cmd_lock);
2721 }
2722 
2723 void bnxt_ethtool_free(struct bnxt *bp)
2724 {
2725 	kfree(bp->test_info);
2726 	bp->test_info = NULL;
2727 }
2728 
2729 const struct ethtool_ops bnxt_ethtool_ops = {
2730 	.get_link_ksettings	= bnxt_get_link_ksettings,
2731 	.set_link_ksettings	= bnxt_set_link_ksettings,
2732 	.get_pauseparam		= bnxt_get_pauseparam,
2733 	.set_pauseparam		= bnxt_set_pauseparam,
2734 	.get_drvinfo		= bnxt_get_drvinfo,
2735 	.get_wol		= bnxt_get_wol,
2736 	.set_wol		= bnxt_set_wol,
2737 	.get_coalesce		= bnxt_get_coalesce,
2738 	.set_coalesce		= bnxt_set_coalesce,
2739 	.get_msglevel		= bnxt_get_msglevel,
2740 	.set_msglevel		= bnxt_set_msglevel,
2741 	.get_sset_count		= bnxt_get_sset_count,
2742 	.get_strings		= bnxt_get_strings,
2743 	.get_ethtool_stats	= bnxt_get_ethtool_stats,
2744 	.set_ringparam		= bnxt_set_ringparam,
2745 	.get_ringparam		= bnxt_get_ringparam,
2746 	.get_channels		= bnxt_get_channels,
2747 	.set_channels		= bnxt_set_channels,
2748 	.get_rxnfc		= bnxt_get_rxnfc,
2749 	.set_rxnfc		= bnxt_set_rxnfc,
2750 	.get_rxfh_indir_size    = bnxt_get_rxfh_indir_size,
2751 	.get_rxfh_key_size      = bnxt_get_rxfh_key_size,
2752 	.get_rxfh               = bnxt_get_rxfh,
2753 	.flash_device		= bnxt_flash_device,
2754 	.get_eeprom_len         = bnxt_get_eeprom_len,
2755 	.get_eeprom             = bnxt_get_eeprom,
2756 	.set_eeprom		= bnxt_set_eeprom,
2757 	.get_link		= bnxt_get_link,
2758 	.get_eee		= bnxt_get_eee,
2759 	.set_eee		= bnxt_set_eee,
2760 	.get_module_info	= bnxt_get_module_info,
2761 	.get_module_eeprom	= bnxt_get_module_eeprom,
2762 	.nway_reset		= bnxt_nway_reset,
2763 	.set_phys_id		= bnxt_set_phys_id,
2764 	.self_test		= bnxt_self_test,
2765 	.reset			= bnxt_reset,
2766 };
2767