1 /* Broadcom NetXtreme-C/E network driver. 2 * 3 * Copyright (c) 2014-2016 Broadcom Corporation 4 * Copyright (c) 2016-2017 Broadcom Limited 5 * 6 * This program is free software; you can redistribute it and/or modify 7 * it under the terms of the GNU General Public License as published by 8 * the Free Software Foundation. 9 */ 10 11 #include <linux/ctype.h> 12 #include <linux/stringify.h> 13 #include <linux/ethtool.h> 14 #include <linux/linkmode.h> 15 #include <linux/interrupt.h> 16 #include <linux/pci.h> 17 #include <linux/etherdevice.h> 18 #include <linux/crc32.h> 19 #include <linux/firmware.h> 20 #include <linux/utsname.h> 21 #include <linux/time.h> 22 #include <linux/ptp_clock_kernel.h> 23 #include <linux/net_tstamp.h> 24 #include <linux/timecounter.h> 25 #include "bnxt_hsi.h" 26 #include "bnxt.h" 27 #include "bnxt_hwrm.h" 28 #include "bnxt_ulp.h" 29 #include "bnxt_xdp.h" 30 #include "bnxt_ptp.h" 31 #include "bnxt_ethtool.h" 32 #include "bnxt_nvm_defs.h" /* NVRAM content constant and structure defs */ 33 #include "bnxt_fw_hdr.h" /* Firmware hdr constant and structure defs */ 34 #include "bnxt_coredump.h" 35 36 static u32 bnxt_get_msglevel(struct net_device *dev) 37 { 38 struct bnxt *bp = netdev_priv(dev); 39 40 return bp->msg_enable; 41 } 42 43 static void bnxt_set_msglevel(struct net_device *dev, u32 value) 44 { 45 struct bnxt *bp = netdev_priv(dev); 46 47 bp->msg_enable = value; 48 } 49 50 static int bnxt_get_coalesce(struct net_device *dev, 51 struct ethtool_coalesce *coal, 52 struct kernel_ethtool_coalesce *kernel_coal, 53 struct netlink_ext_ack *extack) 54 { 55 struct bnxt *bp = netdev_priv(dev); 56 struct bnxt_coal *hw_coal; 57 u16 mult; 58 59 memset(coal, 0, sizeof(*coal)); 60 61 coal->use_adaptive_rx_coalesce = bp->flags & BNXT_FLAG_DIM; 62 63 hw_coal = &bp->rx_coal; 64 mult = hw_coal->bufs_per_record; 65 coal->rx_coalesce_usecs = hw_coal->coal_ticks; 66 coal->rx_max_coalesced_frames = hw_coal->coal_bufs / mult; 67 coal->rx_coalesce_usecs_irq = hw_coal->coal_ticks_irq; 68 coal->rx_max_coalesced_frames_irq = hw_coal->coal_bufs_irq / mult; 69 if (hw_coal->flags & 70 RING_CMPL_RING_CFG_AGGINT_PARAMS_REQ_FLAGS_TIMER_RESET) 71 kernel_coal->use_cqe_mode_rx = true; 72 73 hw_coal = &bp->tx_coal; 74 mult = hw_coal->bufs_per_record; 75 coal->tx_coalesce_usecs = hw_coal->coal_ticks; 76 coal->tx_max_coalesced_frames = hw_coal->coal_bufs / mult; 77 coal->tx_coalesce_usecs_irq = hw_coal->coal_ticks_irq; 78 coal->tx_max_coalesced_frames_irq = hw_coal->coal_bufs_irq / mult; 79 if (hw_coal->flags & 80 RING_CMPL_RING_CFG_AGGINT_PARAMS_REQ_FLAGS_TIMER_RESET) 81 kernel_coal->use_cqe_mode_tx = true; 82 83 coal->stats_block_coalesce_usecs = bp->stats_coal_ticks; 84 85 return 0; 86 } 87 88 static int bnxt_set_coalesce(struct net_device *dev, 89 struct ethtool_coalesce *coal, 90 struct kernel_ethtool_coalesce *kernel_coal, 91 struct netlink_ext_ack *extack) 92 { 93 struct bnxt *bp = netdev_priv(dev); 94 bool update_stats = false; 95 struct bnxt_coal *hw_coal; 96 int rc = 0; 97 u16 mult; 98 99 if (coal->use_adaptive_rx_coalesce) { 100 bp->flags |= BNXT_FLAG_DIM; 101 } else { 102 if (bp->flags & BNXT_FLAG_DIM) { 103 bp->flags &= ~(BNXT_FLAG_DIM); 104 goto reset_coalesce; 105 } 106 } 107 108 if ((kernel_coal->use_cqe_mode_rx || kernel_coal->use_cqe_mode_tx) && 109 !(bp->coal_cap.cmpl_params & 110 RING_AGGINT_QCAPS_RESP_CMPL_PARAMS_TIMER_RESET)) 111 return -EOPNOTSUPP; 112 113 hw_coal = &bp->rx_coal; 114 mult = hw_coal->bufs_per_record; 115 hw_coal->coal_ticks = coal->rx_coalesce_usecs; 116 hw_coal->coal_bufs = coal->rx_max_coalesced_frames * mult; 117 hw_coal->coal_ticks_irq = coal->rx_coalesce_usecs_irq; 118 hw_coal->coal_bufs_irq = coal->rx_max_coalesced_frames_irq * mult; 119 hw_coal->flags &= 120 ~RING_CMPL_RING_CFG_AGGINT_PARAMS_REQ_FLAGS_TIMER_RESET; 121 if (kernel_coal->use_cqe_mode_rx) 122 hw_coal->flags |= 123 RING_CMPL_RING_CFG_AGGINT_PARAMS_REQ_FLAGS_TIMER_RESET; 124 125 hw_coal = &bp->tx_coal; 126 mult = hw_coal->bufs_per_record; 127 hw_coal->coal_ticks = coal->tx_coalesce_usecs; 128 hw_coal->coal_bufs = coal->tx_max_coalesced_frames * mult; 129 hw_coal->coal_ticks_irq = coal->tx_coalesce_usecs_irq; 130 hw_coal->coal_bufs_irq = coal->tx_max_coalesced_frames_irq * mult; 131 hw_coal->flags &= 132 ~RING_CMPL_RING_CFG_AGGINT_PARAMS_REQ_FLAGS_TIMER_RESET; 133 if (kernel_coal->use_cqe_mode_tx) 134 hw_coal->flags |= 135 RING_CMPL_RING_CFG_AGGINT_PARAMS_REQ_FLAGS_TIMER_RESET; 136 137 if (bp->stats_coal_ticks != coal->stats_block_coalesce_usecs) { 138 u32 stats_ticks = coal->stats_block_coalesce_usecs; 139 140 /* Allow 0, which means disable. */ 141 if (stats_ticks) 142 stats_ticks = clamp_t(u32, stats_ticks, 143 BNXT_MIN_STATS_COAL_TICKS, 144 BNXT_MAX_STATS_COAL_TICKS); 145 stats_ticks = rounddown(stats_ticks, BNXT_MIN_STATS_COAL_TICKS); 146 bp->stats_coal_ticks = stats_ticks; 147 if (bp->stats_coal_ticks) 148 bp->current_interval = 149 bp->stats_coal_ticks * HZ / 1000000; 150 else 151 bp->current_interval = BNXT_TIMER_INTERVAL; 152 update_stats = true; 153 } 154 155 reset_coalesce: 156 if (netif_running(dev)) { 157 if (update_stats) { 158 rc = bnxt_close_nic(bp, true, false); 159 if (!rc) 160 rc = bnxt_open_nic(bp, true, false); 161 } else { 162 rc = bnxt_hwrm_set_coal(bp); 163 } 164 } 165 166 return rc; 167 } 168 169 static const char * const bnxt_ring_rx_stats_str[] = { 170 "rx_ucast_packets", 171 "rx_mcast_packets", 172 "rx_bcast_packets", 173 "rx_discards", 174 "rx_errors", 175 "rx_ucast_bytes", 176 "rx_mcast_bytes", 177 "rx_bcast_bytes", 178 }; 179 180 static const char * const bnxt_ring_tx_stats_str[] = { 181 "tx_ucast_packets", 182 "tx_mcast_packets", 183 "tx_bcast_packets", 184 "tx_errors", 185 "tx_discards", 186 "tx_ucast_bytes", 187 "tx_mcast_bytes", 188 "tx_bcast_bytes", 189 }; 190 191 static const char * const bnxt_ring_tpa_stats_str[] = { 192 "tpa_packets", 193 "tpa_bytes", 194 "tpa_events", 195 "tpa_aborts", 196 }; 197 198 static const char * const bnxt_ring_tpa2_stats_str[] = { 199 "rx_tpa_eligible_pkt", 200 "rx_tpa_eligible_bytes", 201 "rx_tpa_pkt", 202 "rx_tpa_bytes", 203 "rx_tpa_errors", 204 "rx_tpa_events", 205 }; 206 207 static const char * const bnxt_rx_sw_stats_str[] = { 208 "rx_l4_csum_errors", 209 "rx_resets", 210 "rx_buf_errors", 211 }; 212 213 static const char * const bnxt_cmn_sw_stats_str[] = { 214 "missed_irqs", 215 }; 216 217 #define BNXT_RX_STATS_ENTRY(counter) \ 218 { BNXT_RX_STATS_OFFSET(counter), __stringify(counter) } 219 220 #define BNXT_TX_STATS_ENTRY(counter) \ 221 { BNXT_TX_STATS_OFFSET(counter), __stringify(counter) } 222 223 #define BNXT_RX_STATS_EXT_ENTRY(counter) \ 224 { BNXT_RX_STATS_EXT_OFFSET(counter), __stringify(counter) } 225 226 #define BNXT_TX_STATS_EXT_ENTRY(counter) \ 227 { BNXT_TX_STATS_EXT_OFFSET(counter), __stringify(counter) } 228 229 #define BNXT_RX_STATS_EXT_PFC_ENTRY(n) \ 230 BNXT_RX_STATS_EXT_ENTRY(pfc_pri##n##_rx_duration_us), \ 231 BNXT_RX_STATS_EXT_ENTRY(pfc_pri##n##_rx_transitions) 232 233 #define BNXT_TX_STATS_EXT_PFC_ENTRY(n) \ 234 BNXT_TX_STATS_EXT_ENTRY(pfc_pri##n##_tx_duration_us), \ 235 BNXT_TX_STATS_EXT_ENTRY(pfc_pri##n##_tx_transitions) 236 237 #define BNXT_RX_STATS_EXT_PFC_ENTRIES \ 238 BNXT_RX_STATS_EXT_PFC_ENTRY(0), \ 239 BNXT_RX_STATS_EXT_PFC_ENTRY(1), \ 240 BNXT_RX_STATS_EXT_PFC_ENTRY(2), \ 241 BNXT_RX_STATS_EXT_PFC_ENTRY(3), \ 242 BNXT_RX_STATS_EXT_PFC_ENTRY(4), \ 243 BNXT_RX_STATS_EXT_PFC_ENTRY(5), \ 244 BNXT_RX_STATS_EXT_PFC_ENTRY(6), \ 245 BNXT_RX_STATS_EXT_PFC_ENTRY(7) 246 247 #define BNXT_TX_STATS_EXT_PFC_ENTRIES \ 248 BNXT_TX_STATS_EXT_PFC_ENTRY(0), \ 249 BNXT_TX_STATS_EXT_PFC_ENTRY(1), \ 250 BNXT_TX_STATS_EXT_PFC_ENTRY(2), \ 251 BNXT_TX_STATS_EXT_PFC_ENTRY(3), \ 252 BNXT_TX_STATS_EXT_PFC_ENTRY(4), \ 253 BNXT_TX_STATS_EXT_PFC_ENTRY(5), \ 254 BNXT_TX_STATS_EXT_PFC_ENTRY(6), \ 255 BNXT_TX_STATS_EXT_PFC_ENTRY(7) 256 257 #define BNXT_RX_STATS_EXT_COS_ENTRY(n) \ 258 BNXT_RX_STATS_EXT_ENTRY(rx_bytes_cos##n), \ 259 BNXT_RX_STATS_EXT_ENTRY(rx_packets_cos##n) 260 261 #define BNXT_TX_STATS_EXT_COS_ENTRY(n) \ 262 BNXT_TX_STATS_EXT_ENTRY(tx_bytes_cos##n), \ 263 BNXT_TX_STATS_EXT_ENTRY(tx_packets_cos##n) 264 265 #define BNXT_RX_STATS_EXT_COS_ENTRIES \ 266 BNXT_RX_STATS_EXT_COS_ENTRY(0), \ 267 BNXT_RX_STATS_EXT_COS_ENTRY(1), \ 268 BNXT_RX_STATS_EXT_COS_ENTRY(2), \ 269 BNXT_RX_STATS_EXT_COS_ENTRY(3), \ 270 BNXT_RX_STATS_EXT_COS_ENTRY(4), \ 271 BNXT_RX_STATS_EXT_COS_ENTRY(5), \ 272 BNXT_RX_STATS_EXT_COS_ENTRY(6), \ 273 BNXT_RX_STATS_EXT_COS_ENTRY(7) \ 274 275 #define BNXT_TX_STATS_EXT_COS_ENTRIES \ 276 BNXT_TX_STATS_EXT_COS_ENTRY(0), \ 277 BNXT_TX_STATS_EXT_COS_ENTRY(1), \ 278 BNXT_TX_STATS_EXT_COS_ENTRY(2), \ 279 BNXT_TX_STATS_EXT_COS_ENTRY(3), \ 280 BNXT_TX_STATS_EXT_COS_ENTRY(4), \ 281 BNXT_TX_STATS_EXT_COS_ENTRY(5), \ 282 BNXT_TX_STATS_EXT_COS_ENTRY(6), \ 283 BNXT_TX_STATS_EXT_COS_ENTRY(7) \ 284 285 #define BNXT_RX_STATS_EXT_DISCARD_COS_ENTRY(n) \ 286 BNXT_RX_STATS_EXT_ENTRY(rx_discard_bytes_cos##n), \ 287 BNXT_RX_STATS_EXT_ENTRY(rx_discard_packets_cos##n) 288 289 #define BNXT_RX_STATS_EXT_DISCARD_COS_ENTRIES \ 290 BNXT_RX_STATS_EXT_DISCARD_COS_ENTRY(0), \ 291 BNXT_RX_STATS_EXT_DISCARD_COS_ENTRY(1), \ 292 BNXT_RX_STATS_EXT_DISCARD_COS_ENTRY(2), \ 293 BNXT_RX_STATS_EXT_DISCARD_COS_ENTRY(3), \ 294 BNXT_RX_STATS_EXT_DISCARD_COS_ENTRY(4), \ 295 BNXT_RX_STATS_EXT_DISCARD_COS_ENTRY(5), \ 296 BNXT_RX_STATS_EXT_DISCARD_COS_ENTRY(6), \ 297 BNXT_RX_STATS_EXT_DISCARD_COS_ENTRY(7) 298 299 #define BNXT_RX_STATS_PRI_ENTRY(counter, n) \ 300 { BNXT_RX_STATS_EXT_OFFSET(counter##_cos0), \ 301 __stringify(counter##_pri##n) } 302 303 #define BNXT_TX_STATS_PRI_ENTRY(counter, n) \ 304 { BNXT_TX_STATS_EXT_OFFSET(counter##_cos0), \ 305 __stringify(counter##_pri##n) } 306 307 #define BNXT_RX_STATS_PRI_ENTRIES(counter) \ 308 BNXT_RX_STATS_PRI_ENTRY(counter, 0), \ 309 BNXT_RX_STATS_PRI_ENTRY(counter, 1), \ 310 BNXT_RX_STATS_PRI_ENTRY(counter, 2), \ 311 BNXT_RX_STATS_PRI_ENTRY(counter, 3), \ 312 BNXT_RX_STATS_PRI_ENTRY(counter, 4), \ 313 BNXT_RX_STATS_PRI_ENTRY(counter, 5), \ 314 BNXT_RX_STATS_PRI_ENTRY(counter, 6), \ 315 BNXT_RX_STATS_PRI_ENTRY(counter, 7) 316 317 #define BNXT_TX_STATS_PRI_ENTRIES(counter) \ 318 BNXT_TX_STATS_PRI_ENTRY(counter, 0), \ 319 BNXT_TX_STATS_PRI_ENTRY(counter, 1), \ 320 BNXT_TX_STATS_PRI_ENTRY(counter, 2), \ 321 BNXT_TX_STATS_PRI_ENTRY(counter, 3), \ 322 BNXT_TX_STATS_PRI_ENTRY(counter, 4), \ 323 BNXT_TX_STATS_PRI_ENTRY(counter, 5), \ 324 BNXT_TX_STATS_PRI_ENTRY(counter, 6), \ 325 BNXT_TX_STATS_PRI_ENTRY(counter, 7) 326 327 enum { 328 RX_TOTAL_DISCARDS, 329 TX_TOTAL_DISCARDS, 330 RX_NETPOLL_DISCARDS, 331 }; 332 333 static struct { 334 u64 counter; 335 char string[ETH_GSTRING_LEN]; 336 } bnxt_sw_func_stats[] = { 337 {0, "rx_total_discard_pkts"}, 338 {0, "tx_total_discard_pkts"}, 339 {0, "rx_total_netpoll_discards"}, 340 }; 341 342 #define NUM_RING_RX_SW_STATS ARRAY_SIZE(bnxt_rx_sw_stats_str) 343 #define NUM_RING_CMN_SW_STATS ARRAY_SIZE(bnxt_cmn_sw_stats_str) 344 #define NUM_RING_RX_HW_STATS ARRAY_SIZE(bnxt_ring_rx_stats_str) 345 #define NUM_RING_TX_HW_STATS ARRAY_SIZE(bnxt_ring_tx_stats_str) 346 347 static const struct { 348 long offset; 349 char string[ETH_GSTRING_LEN]; 350 } bnxt_port_stats_arr[] = { 351 BNXT_RX_STATS_ENTRY(rx_64b_frames), 352 BNXT_RX_STATS_ENTRY(rx_65b_127b_frames), 353 BNXT_RX_STATS_ENTRY(rx_128b_255b_frames), 354 BNXT_RX_STATS_ENTRY(rx_256b_511b_frames), 355 BNXT_RX_STATS_ENTRY(rx_512b_1023b_frames), 356 BNXT_RX_STATS_ENTRY(rx_1024b_1518b_frames), 357 BNXT_RX_STATS_ENTRY(rx_good_vlan_frames), 358 BNXT_RX_STATS_ENTRY(rx_1519b_2047b_frames), 359 BNXT_RX_STATS_ENTRY(rx_2048b_4095b_frames), 360 BNXT_RX_STATS_ENTRY(rx_4096b_9216b_frames), 361 BNXT_RX_STATS_ENTRY(rx_9217b_16383b_frames), 362 BNXT_RX_STATS_ENTRY(rx_total_frames), 363 BNXT_RX_STATS_ENTRY(rx_ucast_frames), 364 BNXT_RX_STATS_ENTRY(rx_mcast_frames), 365 BNXT_RX_STATS_ENTRY(rx_bcast_frames), 366 BNXT_RX_STATS_ENTRY(rx_fcs_err_frames), 367 BNXT_RX_STATS_ENTRY(rx_ctrl_frames), 368 BNXT_RX_STATS_ENTRY(rx_pause_frames), 369 BNXT_RX_STATS_ENTRY(rx_pfc_frames), 370 BNXT_RX_STATS_ENTRY(rx_align_err_frames), 371 BNXT_RX_STATS_ENTRY(rx_ovrsz_frames), 372 BNXT_RX_STATS_ENTRY(rx_jbr_frames), 373 BNXT_RX_STATS_ENTRY(rx_mtu_err_frames), 374 BNXT_RX_STATS_ENTRY(rx_tagged_frames), 375 BNXT_RX_STATS_ENTRY(rx_double_tagged_frames), 376 BNXT_RX_STATS_ENTRY(rx_good_frames), 377 BNXT_RX_STATS_ENTRY(rx_pfc_ena_frames_pri0), 378 BNXT_RX_STATS_ENTRY(rx_pfc_ena_frames_pri1), 379 BNXT_RX_STATS_ENTRY(rx_pfc_ena_frames_pri2), 380 BNXT_RX_STATS_ENTRY(rx_pfc_ena_frames_pri3), 381 BNXT_RX_STATS_ENTRY(rx_pfc_ena_frames_pri4), 382 BNXT_RX_STATS_ENTRY(rx_pfc_ena_frames_pri5), 383 BNXT_RX_STATS_ENTRY(rx_pfc_ena_frames_pri6), 384 BNXT_RX_STATS_ENTRY(rx_pfc_ena_frames_pri7), 385 BNXT_RX_STATS_ENTRY(rx_undrsz_frames), 386 BNXT_RX_STATS_ENTRY(rx_eee_lpi_events), 387 BNXT_RX_STATS_ENTRY(rx_eee_lpi_duration), 388 BNXT_RX_STATS_ENTRY(rx_bytes), 389 BNXT_RX_STATS_ENTRY(rx_runt_bytes), 390 BNXT_RX_STATS_ENTRY(rx_runt_frames), 391 BNXT_RX_STATS_ENTRY(rx_stat_discard), 392 BNXT_RX_STATS_ENTRY(rx_stat_err), 393 394 BNXT_TX_STATS_ENTRY(tx_64b_frames), 395 BNXT_TX_STATS_ENTRY(tx_65b_127b_frames), 396 BNXT_TX_STATS_ENTRY(tx_128b_255b_frames), 397 BNXT_TX_STATS_ENTRY(tx_256b_511b_frames), 398 BNXT_TX_STATS_ENTRY(tx_512b_1023b_frames), 399 BNXT_TX_STATS_ENTRY(tx_1024b_1518b_frames), 400 BNXT_TX_STATS_ENTRY(tx_good_vlan_frames), 401 BNXT_TX_STATS_ENTRY(tx_1519b_2047b_frames), 402 BNXT_TX_STATS_ENTRY(tx_2048b_4095b_frames), 403 BNXT_TX_STATS_ENTRY(tx_4096b_9216b_frames), 404 BNXT_TX_STATS_ENTRY(tx_9217b_16383b_frames), 405 BNXT_TX_STATS_ENTRY(tx_good_frames), 406 BNXT_TX_STATS_ENTRY(tx_total_frames), 407 BNXT_TX_STATS_ENTRY(tx_ucast_frames), 408 BNXT_TX_STATS_ENTRY(tx_mcast_frames), 409 BNXT_TX_STATS_ENTRY(tx_bcast_frames), 410 BNXT_TX_STATS_ENTRY(tx_pause_frames), 411 BNXT_TX_STATS_ENTRY(tx_pfc_frames), 412 BNXT_TX_STATS_ENTRY(tx_jabber_frames), 413 BNXT_TX_STATS_ENTRY(tx_fcs_err_frames), 414 BNXT_TX_STATS_ENTRY(tx_err), 415 BNXT_TX_STATS_ENTRY(tx_fifo_underruns), 416 BNXT_TX_STATS_ENTRY(tx_pfc_ena_frames_pri0), 417 BNXT_TX_STATS_ENTRY(tx_pfc_ena_frames_pri1), 418 BNXT_TX_STATS_ENTRY(tx_pfc_ena_frames_pri2), 419 BNXT_TX_STATS_ENTRY(tx_pfc_ena_frames_pri3), 420 BNXT_TX_STATS_ENTRY(tx_pfc_ena_frames_pri4), 421 BNXT_TX_STATS_ENTRY(tx_pfc_ena_frames_pri5), 422 BNXT_TX_STATS_ENTRY(tx_pfc_ena_frames_pri6), 423 BNXT_TX_STATS_ENTRY(tx_pfc_ena_frames_pri7), 424 BNXT_TX_STATS_ENTRY(tx_eee_lpi_events), 425 BNXT_TX_STATS_ENTRY(tx_eee_lpi_duration), 426 BNXT_TX_STATS_ENTRY(tx_total_collisions), 427 BNXT_TX_STATS_ENTRY(tx_bytes), 428 BNXT_TX_STATS_ENTRY(tx_xthol_frames), 429 BNXT_TX_STATS_ENTRY(tx_stat_discard), 430 BNXT_TX_STATS_ENTRY(tx_stat_error), 431 }; 432 433 static const struct { 434 long offset; 435 char string[ETH_GSTRING_LEN]; 436 } bnxt_port_stats_ext_arr[] = { 437 BNXT_RX_STATS_EXT_ENTRY(link_down_events), 438 BNXT_RX_STATS_EXT_ENTRY(continuous_pause_events), 439 BNXT_RX_STATS_EXT_ENTRY(resume_pause_events), 440 BNXT_RX_STATS_EXT_ENTRY(continuous_roce_pause_events), 441 BNXT_RX_STATS_EXT_ENTRY(resume_roce_pause_events), 442 BNXT_RX_STATS_EXT_COS_ENTRIES, 443 BNXT_RX_STATS_EXT_PFC_ENTRIES, 444 BNXT_RX_STATS_EXT_ENTRY(rx_bits), 445 BNXT_RX_STATS_EXT_ENTRY(rx_buffer_passed_threshold), 446 BNXT_RX_STATS_EXT_ENTRY(rx_pcs_symbol_err), 447 BNXT_RX_STATS_EXT_ENTRY(rx_corrected_bits), 448 BNXT_RX_STATS_EXT_DISCARD_COS_ENTRIES, 449 BNXT_RX_STATS_EXT_ENTRY(rx_fec_corrected_blocks), 450 BNXT_RX_STATS_EXT_ENTRY(rx_fec_uncorrectable_blocks), 451 }; 452 453 static const struct { 454 long offset; 455 char string[ETH_GSTRING_LEN]; 456 } bnxt_tx_port_stats_ext_arr[] = { 457 BNXT_TX_STATS_EXT_COS_ENTRIES, 458 BNXT_TX_STATS_EXT_PFC_ENTRIES, 459 }; 460 461 static const struct { 462 long base_off; 463 char string[ETH_GSTRING_LEN]; 464 } bnxt_rx_bytes_pri_arr[] = { 465 BNXT_RX_STATS_PRI_ENTRIES(rx_bytes), 466 }; 467 468 static const struct { 469 long base_off; 470 char string[ETH_GSTRING_LEN]; 471 } bnxt_rx_pkts_pri_arr[] = { 472 BNXT_RX_STATS_PRI_ENTRIES(rx_packets), 473 }; 474 475 static const struct { 476 long base_off; 477 char string[ETH_GSTRING_LEN]; 478 } bnxt_tx_bytes_pri_arr[] = { 479 BNXT_TX_STATS_PRI_ENTRIES(tx_bytes), 480 }; 481 482 static const struct { 483 long base_off; 484 char string[ETH_GSTRING_LEN]; 485 } bnxt_tx_pkts_pri_arr[] = { 486 BNXT_TX_STATS_PRI_ENTRIES(tx_packets), 487 }; 488 489 #define BNXT_NUM_SW_FUNC_STATS ARRAY_SIZE(bnxt_sw_func_stats) 490 #define BNXT_NUM_PORT_STATS ARRAY_SIZE(bnxt_port_stats_arr) 491 #define BNXT_NUM_STATS_PRI \ 492 (ARRAY_SIZE(bnxt_rx_bytes_pri_arr) + \ 493 ARRAY_SIZE(bnxt_rx_pkts_pri_arr) + \ 494 ARRAY_SIZE(bnxt_tx_bytes_pri_arr) + \ 495 ARRAY_SIZE(bnxt_tx_pkts_pri_arr)) 496 497 static int bnxt_get_num_tpa_ring_stats(struct bnxt *bp) 498 { 499 if (BNXT_SUPPORTS_TPA(bp)) { 500 if (bp->max_tpa_v2) { 501 if (BNXT_CHIP_P5_THOR(bp)) 502 return BNXT_NUM_TPA_RING_STATS_P5; 503 return BNXT_NUM_TPA_RING_STATS_P5_SR2; 504 } 505 return BNXT_NUM_TPA_RING_STATS; 506 } 507 return 0; 508 } 509 510 static int bnxt_get_num_ring_stats(struct bnxt *bp) 511 { 512 int rx, tx, cmn; 513 514 rx = NUM_RING_RX_HW_STATS + NUM_RING_RX_SW_STATS + 515 bnxt_get_num_tpa_ring_stats(bp); 516 tx = NUM_RING_TX_HW_STATS; 517 cmn = NUM_RING_CMN_SW_STATS; 518 return rx * bp->rx_nr_rings + tx * bp->tx_nr_rings + 519 cmn * bp->cp_nr_rings; 520 } 521 522 static int bnxt_get_num_stats(struct bnxt *bp) 523 { 524 int num_stats = bnxt_get_num_ring_stats(bp); 525 526 num_stats += BNXT_NUM_SW_FUNC_STATS; 527 528 if (bp->flags & BNXT_FLAG_PORT_STATS) 529 num_stats += BNXT_NUM_PORT_STATS; 530 531 if (bp->flags & BNXT_FLAG_PORT_STATS_EXT) { 532 num_stats += bp->fw_rx_stats_ext_size + 533 bp->fw_tx_stats_ext_size; 534 if (bp->pri2cos_valid) 535 num_stats += BNXT_NUM_STATS_PRI; 536 } 537 538 return num_stats; 539 } 540 541 static int bnxt_get_sset_count(struct net_device *dev, int sset) 542 { 543 struct bnxt *bp = netdev_priv(dev); 544 545 switch (sset) { 546 case ETH_SS_STATS: 547 return bnxt_get_num_stats(bp); 548 case ETH_SS_TEST: 549 if (!bp->num_tests) 550 return -EOPNOTSUPP; 551 return bp->num_tests; 552 default: 553 return -EOPNOTSUPP; 554 } 555 } 556 557 static bool is_rx_ring(struct bnxt *bp, int ring_num) 558 { 559 return ring_num < bp->rx_nr_rings; 560 } 561 562 static bool is_tx_ring(struct bnxt *bp, int ring_num) 563 { 564 int tx_base = 0; 565 566 if (!(bp->flags & BNXT_FLAG_SHARED_RINGS)) 567 tx_base = bp->rx_nr_rings; 568 569 if (ring_num >= tx_base && ring_num < (tx_base + bp->tx_nr_rings)) 570 return true; 571 return false; 572 } 573 574 static void bnxt_get_ethtool_stats(struct net_device *dev, 575 struct ethtool_stats *stats, u64 *buf) 576 { 577 u32 i, j = 0; 578 struct bnxt *bp = netdev_priv(dev); 579 u32 tpa_stats; 580 581 if (!bp->bnapi) { 582 j += bnxt_get_num_ring_stats(bp) + BNXT_NUM_SW_FUNC_STATS; 583 goto skip_ring_stats; 584 } 585 586 for (i = 0; i < BNXT_NUM_SW_FUNC_STATS; i++) 587 bnxt_sw_func_stats[i].counter = 0; 588 589 tpa_stats = bnxt_get_num_tpa_ring_stats(bp); 590 for (i = 0; i < bp->cp_nr_rings; i++) { 591 struct bnxt_napi *bnapi = bp->bnapi[i]; 592 struct bnxt_cp_ring_info *cpr = &bnapi->cp_ring; 593 u64 *sw_stats = cpr->stats.sw_stats; 594 u64 *sw; 595 int k; 596 597 if (is_rx_ring(bp, i)) { 598 for (k = 0; k < NUM_RING_RX_HW_STATS; j++, k++) 599 buf[j] = sw_stats[k]; 600 } 601 if (is_tx_ring(bp, i)) { 602 k = NUM_RING_RX_HW_STATS; 603 for (; k < NUM_RING_RX_HW_STATS + NUM_RING_TX_HW_STATS; 604 j++, k++) 605 buf[j] = sw_stats[k]; 606 } 607 if (!tpa_stats || !is_rx_ring(bp, i)) 608 goto skip_tpa_ring_stats; 609 610 k = NUM_RING_RX_HW_STATS + NUM_RING_TX_HW_STATS; 611 for (; k < NUM_RING_RX_HW_STATS + NUM_RING_TX_HW_STATS + 612 tpa_stats; j++, k++) 613 buf[j] = sw_stats[k]; 614 615 skip_tpa_ring_stats: 616 sw = (u64 *)&cpr->sw_stats.rx; 617 if (is_rx_ring(bp, i)) { 618 for (k = 0; k < NUM_RING_RX_SW_STATS; j++, k++) 619 buf[j] = sw[k]; 620 } 621 622 sw = (u64 *)&cpr->sw_stats.cmn; 623 for (k = 0; k < NUM_RING_CMN_SW_STATS; j++, k++) 624 buf[j] = sw[k]; 625 626 bnxt_sw_func_stats[RX_TOTAL_DISCARDS].counter += 627 BNXT_GET_RING_STATS64(sw_stats, rx_discard_pkts); 628 bnxt_sw_func_stats[TX_TOTAL_DISCARDS].counter += 629 BNXT_GET_RING_STATS64(sw_stats, tx_discard_pkts); 630 bnxt_sw_func_stats[RX_NETPOLL_DISCARDS].counter += 631 cpr->sw_stats.rx.rx_netpoll_discards; 632 } 633 634 for (i = 0; i < BNXT_NUM_SW_FUNC_STATS; i++, j++) 635 buf[j] = bnxt_sw_func_stats[i].counter; 636 637 skip_ring_stats: 638 if (bp->flags & BNXT_FLAG_PORT_STATS) { 639 u64 *port_stats = bp->port_stats.sw_stats; 640 641 for (i = 0; i < BNXT_NUM_PORT_STATS; i++, j++) 642 buf[j] = *(port_stats + bnxt_port_stats_arr[i].offset); 643 } 644 if (bp->flags & BNXT_FLAG_PORT_STATS_EXT) { 645 u64 *rx_port_stats_ext = bp->rx_port_stats_ext.sw_stats; 646 u64 *tx_port_stats_ext = bp->tx_port_stats_ext.sw_stats; 647 648 for (i = 0; i < bp->fw_rx_stats_ext_size; i++, j++) { 649 buf[j] = *(rx_port_stats_ext + 650 bnxt_port_stats_ext_arr[i].offset); 651 } 652 for (i = 0; i < bp->fw_tx_stats_ext_size; i++, j++) { 653 buf[j] = *(tx_port_stats_ext + 654 bnxt_tx_port_stats_ext_arr[i].offset); 655 } 656 if (bp->pri2cos_valid) { 657 for (i = 0; i < 8; i++, j++) { 658 long n = bnxt_rx_bytes_pri_arr[i].base_off + 659 bp->pri2cos_idx[i]; 660 661 buf[j] = *(rx_port_stats_ext + n); 662 } 663 for (i = 0; i < 8; i++, j++) { 664 long n = bnxt_rx_pkts_pri_arr[i].base_off + 665 bp->pri2cos_idx[i]; 666 667 buf[j] = *(rx_port_stats_ext + n); 668 } 669 for (i = 0; i < 8; i++, j++) { 670 long n = bnxt_tx_bytes_pri_arr[i].base_off + 671 bp->pri2cos_idx[i]; 672 673 buf[j] = *(tx_port_stats_ext + n); 674 } 675 for (i = 0; i < 8; i++, j++) { 676 long n = bnxt_tx_pkts_pri_arr[i].base_off + 677 bp->pri2cos_idx[i]; 678 679 buf[j] = *(tx_port_stats_ext + n); 680 } 681 } 682 } 683 } 684 685 static void bnxt_get_strings(struct net_device *dev, u32 stringset, u8 *buf) 686 { 687 struct bnxt *bp = netdev_priv(dev); 688 static const char * const *str; 689 u32 i, j, num_str; 690 691 switch (stringset) { 692 case ETH_SS_STATS: 693 for (i = 0; i < bp->cp_nr_rings; i++) { 694 if (is_rx_ring(bp, i)) { 695 num_str = NUM_RING_RX_HW_STATS; 696 for (j = 0; j < num_str; j++) { 697 sprintf(buf, "[%d]: %s", i, 698 bnxt_ring_rx_stats_str[j]); 699 buf += ETH_GSTRING_LEN; 700 } 701 } 702 if (is_tx_ring(bp, i)) { 703 num_str = NUM_RING_TX_HW_STATS; 704 for (j = 0; j < num_str; j++) { 705 sprintf(buf, "[%d]: %s", i, 706 bnxt_ring_tx_stats_str[j]); 707 buf += ETH_GSTRING_LEN; 708 } 709 } 710 num_str = bnxt_get_num_tpa_ring_stats(bp); 711 if (!num_str || !is_rx_ring(bp, i)) 712 goto skip_tpa_stats; 713 714 if (bp->max_tpa_v2) 715 str = bnxt_ring_tpa2_stats_str; 716 else 717 str = bnxt_ring_tpa_stats_str; 718 719 for (j = 0; j < num_str; j++) { 720 sprintf(buf, "[%d]: %s", i, str[j]); 721 buf += ETH_GSTRING_LEN; 722 } 723 skip_tpa_stats: 724 if (is_rx_ring(bp, i)) { 725 num_str = NUM_RING_RX_SW_STATS; 726 for (j = 0; j < num_str; j++) { 727 sprintf(buf, "[%d]: %s", i, 728 bnxt_rx_sw_stats_str[j]); 729 buf += ETH_GSTRING_LEN; 730 } 731 } 732 num_str = NUM_RING_CMN_SW_STATS; 733 for (j = 0; j < num_str; j++) { 734 sprintf(buf, "[%d]: %s", i, 735 bnxt_cmn_sw_stats_str[j]); 736 buf += ETH_GSTRING_LEN; 737 } 738 } 739 for (i = 0; i < BNXT_NUM_SW_FUNC_STATS; i++) { 740 strcpy(buf, bnxt_sw_func_stats[i].string); 741 buf += ETH_GSTRING_LEN; 742 } 743 744 if (bp->flags & BNXT_FLAG_PORT_STATS) { 745 for (i = 0; i < BNXT_NUM_PORT_STATS; i++) { 746 strcpy(buf, bnxt_port_stats_arr[i].string); 747 buf += ETH_GSTRING_LEN; 748 } 749 } 750 if (bp->flags & BNXT_FLAG_PORT_STATS_EXT) { 751 for (i = 0; i < bp->fw_rx_stats_ext_size; i++) { 752 strcpy(buf, bnxt_port_stats_ext_arr[i].string); 753 buf += ETH_GSTRING_LEN; 754 } 755 for (i = 0; i < bp->fw_tx_stats_ext_size; i++) { 756 strcpy(buf, 757 bnxt_tx_port_stats_ext_arr[i].string); 758 buf += ETH_GSTRING_LEN; 759 } 760 if (bp->pri2cos_valid) { 761 for (i = 0; i < 8; i++) { 762 strcpy(buf, 763 bnxt_rx_bytes_pri_arr[i].string); 764 buf += ETH_GSTRING_LEN; 765 } 766 for (i = 0; i < 8; i++) { 767 strcpy(buf, 768 bnxt_rx_pkts_pri_arr[i].string); 769 buf += ETH_GSTRING_LEN; 770 } 771 for (i = 0; i < 8; i++) { 772 strcpy(buf, 773 bnxt_tx_bytes_pri_arr[i].string); 774 buf += ETH_GSTRING_LEN; 775 } 776 for (i = 0; i < 8; i++) { 777 strcpy(buf, 778 bnxt_tx_pkts_pri_arr[i].string); 779 buf += ETH_GSTRING_LEN; 780 } 781 } 782 } 783 break; 784 case ETH_SS_TEST: 785 if (bp->num_tests) 786 memcpy(buf, bp->test_info->string, 787 bp->num_tests * ETH_GSTRING_LEN); 788 break; 789 default: 790 netdev_err(bp->dev, "bnxt_get_strings invalid request %x\n", 791 stringset); 792 break; 793 } 794 } 795 796 static void bnxt_get_ringparam(struct net_device *dev, 797 struct ethtool_ringparam *ering, 798 struct kernel_ethtool_ringparam *kernel_ering, 799 struct netlink_ext_ack *extack) 800 { 801 struct bnxt *bp = netdev_priv(dev); 802 803 if (bp->flags & BNXT_FLAG_AGG_RINGS) { 804 ering->rx_max_pending = BNXT_MAX_RX_DESC_CNT_JUM_ENA; 805 ering->rx_jumbo_max_pending = BNXT_MAX_RX_JUM_DESC_CNT; 806 } else { 807 ering->rx_max_pending = BNXT_MAX_RX_DESC_CNT; 808 ering->rx_jumbo_max_pending = 0; 809 } 810 ering->tx_max_pending = BNXT_MAX_TX_DESC_CNT; 811 812 ering->rx_pending = bp->rx_ring_size; 813 ering->rx_jumbo_pending = bp->rx_agg_ring_size; 814 ering->tx_pending = bp->tx_ring_size; 815 } 816 817 static int bnxt_set_ringparam(struct net_device *dev, 818 struct ethtool_ringparam *ering, 819 struct kernel_ethtool_ringparam *kernel_ering, 820 struct netlink_ext_ack *extack) 821 { 822 struct bnxt *bp = netdev_priv(dev); 823 824 if ((ering->rx_pending > BNXT_MAX_RX_DESC_CNT) || 825 (ering->tx_pending > BNXT_MAX_TX_DESC_CNT) || 826 (ering->tx_pending < BNXT_MIN_TX_DESC_CNT)) 827 return -EINVAL; 828 829 if (netif_running(dev)) 830 bnxt_close_nic(bp, false, false); 831 832 bp->rx_ring_size = ering->rx_pending; 833 bp->tx_ring_size = ering->tx_pending; 834 bnxt_set_ring_params(bp); 835 836 if (netif_running(dev)) 837 return bnxt_open_nic(bp, false, false); 838 839 return 0; 840 } 841 842 static void bnxt_get_channels(struct net_device *dev, 843 struct ethtool_channels *channel) 844 { 845 struct bnxt *bp = netdev_priv(dev); 846 struct bnxt_hw_resc *hw_resc = &bp->hw_resc; 847 int max_rx_rings, max_tx_rings, tcs; 848 int max_tx_sch_inputs, tx_grps; 849 850 /* Get the most up-to-date max_tx_sch_inputs. */ 851 if (netif_running(dev) && BNXT_NEW_RM(bp)) 852 bnxt_hwrm_func_resc_qcaps(bp, false); 853 max_tx_sch_inputs = hw_resc->max_tx_sch_inputs; 854 855 bnxt_get_max_rings(bp, &max_rx_rings, &max_tx_rings, true); 856 if (max_tx_sch_inputs) 857 max_tx_rings = min_t(int, max_tx_rings, max_tx_sch_inputs); 858 859 tcs = netdev_get_num_tc(dev); 860 tx_grps = max(tcs, 1); 861 if (bp->tx_nr_rings_xdp) 862 tx_grps++; 863 max_tx_rings /= tx_grps; 864 channel->max_combined = min_t(int, max_rx_rings, max_tx_rings); 865 866 if (bnxt_get_max_rings(bp, &max_rx_rings, &max_tx_rings, false)) { 867 max_rx_rings = 0; 868 max_tx_rings = 0; 869 } 870 if (max_tx_sch_inputs) 871 max_tx_rings = min_t(int, max_tx_rings, max_tx_sch_inputs); 872 873 if (tcs > 1) 874 max_tx_rings /= tcs; 875 876 channel->max_rx = max_rx_rings; 877 channel->max_tx = max_tx_rings; 878 channel->max_other = 0; 879 if (bp->flags & BNXT_FLAG_SHARED_RINGS) { 880 channel->combined_count = bp->rx_nr_rings; 881 if (BNXT_CHIP_TYPE_NITRO_A0(bp)) 882 channel->combined_count--; 883 } else { 884 if (!BNXT_CHIP_TYPE_NITRO_A0(bp)) { 885 channel->rx_count = bp->rx_nr_rings; 886 channel->tx_count = bp->tx_nr_rings_per_tc; 887 } 888 } 889 } 890 891 static int bnxt_set_channels(struct net_device *dev, 892 struct ethtool_channels *channel) 893 { 894 struct bnxt *bp = netdev_priv(dev); 895 int req_tx_rings, req_rx_rings, tcs; 896 bool sh = false; 897 int tx_xdp = 0; 898 int rc = 0; 899 900 if (channel->other_count) 901 return -EINVAL; 902 903 if (!channel->combined_count && 904 (!channel->rx_count || !channel->tx_count)) 905 return -EINVAL; 906 907 if (channel->combined_count && 908 (channel->rx_count || channel->tx_count)) 909 return -EINVAL; 910 911 if (BNXT_CHIP_TYPE_NITRO_A0(bp) && (channel->rx_count || 912 channel->tx_count)) 913 return -EINVAL; 914 915 if (channel->combined_count) 916 sh = true; 917 918 tcs = netdev_get_num_tc(dev); 919 920 req_tx_rings = sh ? channel->combined_count : channel->tx_count; 921 req_rx_rings = sh ? channel->combined_count : channel->rx_count; 922 if (bp->tx_nr_rings_xdp) { 923 if (!sh) { 924 netdev_err(dev, "Only combined mode supported when XDP is enabled.\n"); 925 return -EINVAL; 926 } 927 tx_xdp = req_rx_rings; 928 } 929 rc = bnxt_check_rings(bp, req_tx_rings, req_rx_rings, sh, tcs, tx_xdp); 930 if (rc) { 931 netdev_warn(dev, "Unable to allocate the requested rings\n"); 932 return rc; 933 } 934 935 if (bnxt_get_nr_rss_ctxs(bp, req_rx_rings) != 936 bnxt_get_nr_rss_ctxs(bp, bp->rx_nr_rings) && 937 netif_is_rxfh_configured(dev)) { 938 netdev_warn(dev, "RSS table size change required, RSS table entries must be default to proceed\n"); 939 return -EINVAL; 940 } 941 942 if (netif_running(dev)) { 943 if (BNXT_PF(bp)) { 944 /* TODO CHIMP_FW: Send message to all VF's 945 * before PF unload 946 */ 947 } 948 rc = bnxt_close_nic(bp, true, false); 949 if (rc) { 950 netdev_err(bp->dev, "Set channel failure rc :%x\n", 951 rc); 952 return rc; 953 } 954 } 955 956 if (sh) { 957 bp->flags |= BNXT_FLAG_SHARED_RINGS; 958 bp->rx_nr_rings = channel->combined_count; 959 bp->tx_nr_rings_per_tc = channel->combined_count; 960 } else { 961 bp->flags &= ~BNXT_FLAG_SHARED_RINGS; 962 bp->rx_nr_rings = channel->rx_count; 963 bp->tx_nr_rings_per_tc = channel->tx_count; 964 } 965 bp->tx_nr_rings_xdp = tx_xdp; 966 bp->tx_nr_rings = bp->tx_nr_rings_per_tc + tx_xdp; 967 if (tcs > 1) 968 bp->tx_nr_rings = bp->tx_nr_rings_per_tc * tcs + tx_xdp; 969 970 bp->cp_nr_rings = sh ? max_t(int, bp->tx_nr_rings, bp->rx_nr_rings) : 971 bp->tx_nr_rings + bp->rx_nr_rings; 972 973 /* After changing number of rx channels, update NTUPLE feature. */ 974 netdev_update_features(dev); 975 if (netif_running(dev)) { 976 rc = bnxt_open_nic(bp, true, false); 977 if ((!rc) && BNXT_PF(bp)) { 978 /* TODO CHIMP_FW: Send message to all VF's 979 * to renable 980 */ 981 } 982 } else { 983 rc = bnxt_reserve_rings(bp, true); 984 } 985 986 return rc; 987 } 988 989 #ifdef CONFIG_RFS_ACCEL 990 static int bnxt_grxclsrlall(struct bnxt *bp, struct ethtool_rxnfc *cmd, 991 u32 *rule_locs) 992 { 993 int i, j = 0; 994 995 cmd->data = bp->ntp_fltr_count; 996 for (i = 0; i < BNXT_NTP_FLTR_HASH_SIZE; i++) { 997 struct hlist_head *head; 998 struct bnxt_ntuple_filter *fltr; 999 1000 head = &bp->ntp_fltr_hash_tbl[i]; 1001 rcu_read_lock(); 1002 hlist_for_each_entry_rcu(fltr, head, hash) { 1003 if (j == cmd->rule_cnt) 1004 break; 1005 rule_locs[j++] = fltr->sw_id; 1006 } 1007 rcu_read_unlock(); 1008 if (j == cmd->rule_cnt) 1009 break; 1010 } 1011 cmd->rule_cnt = j; 1012 return 0; 1013 } 1014 1015 static int bnxt_grxclsrule(struct bnxt *bp, struct ethtool_rxnfc *cmd) 1016 { 1017 struct ethtool_rx_flow_spec *fs = 1018 (struct ethtool_rx_flow_spec *)&cmd->fs; 1019 struct bnxt_ntuple_filter *fltr; 1020 struct flow_keys *fkeys; 1021 int i, rc = -EINVAL; 1022 1023 if (fs->location >= BNXT_NTP_FLTR_MAX_FLTR) 1024 return rc; 1025 1026 for (i = 0; i < BNXT_NTP_FLTR_HASH_SIZE; i++) { 1027 struct hlist_head *head; 1028 1029 head = &bp->ntp_fltr_hash_tbl[i]; 1030 rcu_read_lock(); 1031 hlist_for_each_entry_rcu(fltr, head, hash) { 1032 if (fltr->sw_id == fs->location) 1033 goto fltr_found; 1034 } 1035 rcu_read_unlock(); 1036 } 1037 return rc; 1038 1039 fltr_found: 1040 fkeys = &fltr->fkeys; 1041 if (fkeys->basic.n_proto == htons(ETH_P_IP)) { 1042 if (fkeys->basic.ip_proto == IPPROTO_TCP) 1043 fs->flow_type = TCP_V4_FLOW; 1044 else if (fkeys->basic.ip_proto == IPPROTO_UDP) 1045 fs->flow_type = UDP_V4_FLOW; 1046 else 1047 goto fltr_err; 1048 1049 fs->h_u.tcp_ip4_spec.ip4src = fkeys->addrs.v4addrs.src; 1050 fs->m_u.tcp_ip4_spec.ip4src = cpu_to_be32(~0); 1051 1052 fs->h_u.tcp_ip4_spec.ip4dst = fkeys->addrs.v4addrs.dst; 1053 fs->m_u.tcp_ip4_spec.ip4dst = cpu_to_be32(~0); 1054 1055 fs->h_u.tcp_ip4_spec.psrc = fkeys->ports.src; 1056 fs->m_u.tcp_ip4_spec.psrc = cpu_to_be16(~0); 1057 1058 fs->h_u.tcp_ip4_spec.pdst = fkeys->ports.dst; 1059 fs->m_u.tcp_ip4_spec.pdst = cpu_to_be16(~0); 1060 } else { 1061 int i; 1062 1063 if (fkeys->basic.ip_proto == IPPROTO_TCP) 1064 fs->flow_type = TCP_V6_FLOW; 1065 else if (fkeys->basic.ip_proto == IPPROTO_UDP) 1066 fs->flow_type = UDP_V6_FLOW; 1067 else 1068 goto fltr_err; 1069 1070 *(struct in6_addr *)&fs->h_u.tcp_ip6_spec.ip6src[0] = 1071 fkeys->addrs.v6addrs.src; 1072 *(struct in6_addr *)&fs->h_u.tcp_ip6_spec.ip6dst[0] = 1073 fkeys->addrs.v6addrs.dst; 1074 for (i = 0; i < 4; i++) { 1075 fs->m_u.tcp_ip6_spec.ip6src[i] = cpu_to_be32(~0); 1076 fs->m_u.tcp_ip6_spec.ip6dst[i] = cpu_to_be32(~0); 1077 } 1078 fs->h_u.tcp_ip6_spec.psrc = fkeys->ports.src; 1079 fs->m_u.tcp_ip6_spec.psrc = cpu_to_be16(~0); 1080 1081 fs->h_u.tcp_ip6_spec.pdst = fkeys->ports.dst; 1082 fs->m_u.tcp_ip6_spec.pdst = cpu_to_be16(~0); 1083 } 1084 1085 fs->ring_cookie = fltr->rxq; 1086 rc = 0; 1087 1088 fltr_err: 1089 rcu_read_unlock(); 1090 1091 return rc; 1092 } 1093 #endif 1094 1095 static u64 get_ethtool_ipv4_rss(struct bnxt *bp) 1096 { 1097 if (bp->rss_hash_cfg & VNIC_RSS_CFG_REQ_HASH_TYPE_IPV4) 1098 return RXH_IP_SRC | RXH_IP_DST; 1099 return 0; 1100 } 1101 1102 static u64 get_ethtool_ipv6_rss(struct bnxt *bp) 1103 { 1104 if (bp->rss_hash_cfg & VNIC_RSS_CFG_REQ_HASH_TYPE_IPV6) 1105 return RXH_IP_SRC | RXH_IP_DST; 1106 return 0; 1107 } 1108 1109 static int bnxt_grxfh(struct bnxt *bp, struct ethtool_rxnfc *cmd) 1110 { 1111 cmd->data = 0; 1112 switch (cmd->flow_type) { 1113 case TCP_V4_FLOW: 1114 if (bp->rss_hash_cfg & VNIC_RSS_CFG_REQ_HASH_TYPE_TCP_IPV4) 1115 cmd->data |= RXH_IP_SRC | RXH_IP_DST | 1116 RXH_L4_B_0_1 | RXH_L4_B_2_3; 1117 cmd->data |= get_ethtool_ipv4_rss(bp); 1118 break; 1119 case UDP_V4_FLOW: 1120 if (bp->rss_hash_cfg & VNIC_RSS_CFG_REQ_HASH_TYPE_UDP_IPV4) 1121 cmd->data |= RXH_IP_SRC | RXH_IP_DST | 1122 RXH_L4_B_0_1 | RXH_L4_B_2_3; 1123 fallthrough; 1124 case SCTP_V4_FLOW: 1125 case AH_ESP_V4_FLOW: 1126 case AH_V4_FLOW: 1127 case ESP_V4_FLOW: 1128 case IPV4_FLOW: 1129 cmd->data |= get_ethtool_ipv4_rss(bp); 1130 break; 1131 1132 case TCP_V6_FLOW: 1133 if (bp->rss_hash_cfg & VNIC_RSS_CFG_REQ_HASH_TYPE_TCP_IPV6) 1134 cmd->data |= RXH_IP_SRC | RXH_IP_DST | 1135 RXH_L4_B_0_1 | RXH_L4_B_2_3; 1136 cmd->data |= get_ethtool_ipv6_rss(bp); 1137 break; 1138 case UDP_V6_FLOW: 1139 if (bp->rss_hash_cfg & VNIC_RSS_CFG_REQ_HASH_TYPE_UDP_IPV6) 1140 cmd->data |= RXH_IP_SRC | RXH_IP_DST | 1141 RXH_L4_B_0_1 | RXH_L4_B_2_3; 1142 fallthrough; 1143 case SCTP_V6_FLOW: 1144 case AH_ESP_V6_FLOW: 1145 case AH_V6_FLOW: 1146 case ESP_V6_FLOW: 1147 case IPV6_FLOW: 1148 cmd->data |= get_ethtool_ipv6_rss(bp); 1149 break; 1150 } 1151 return 0; 1152 } 1153 1154 #define RXH_4TUPLE (RXH_IP_SRC | RXH_IP_DST | RXH_L4_B_0_1 | RXH_L4_B_2_3) 1155 #define RXH_2TUPLE (RXH_IP_SRC | RXH_IP_DST) 1156 1157 static int bnxt_srxfh(struct bnxt *bp, struct ethtool_rxnfc *cmd) 1158 { 1159 u32 rss_hash_cfg = bp->rss_hash_cfg; 1160 int tuple, rc = 0; 1161 1162 if (cmd->data == RXH_4TUPLE) 1163 tuple = 4; 1164 else if (cmd->data == RXH_2TUPLE) 1165 tuple = 2; 1166 else if (!cmd->data) 1167 tuple = 0; 1168 else 1169 return -EINVAL; 1170 1171 if (cmd->flow_type == TCP_V4_FLOW) { 1172 rss_hash_cfg &= ~VNIC_RSS_CFG_REQ_HASH_TYPE_TCP_IPV4; 1173 if (tuple == 4) 1174 rss_hash_cfg |= VNIC_RSS_CFG_REQ_HASH_TYPE_TCP_IPV4; 1175 } else if (cmd->flow_type == UDP_V4_FLOW) { 1176 if (tuple == 4 && !(bp->flags & BNXT_FLAG_UDP_RSS_CAP)) 1177 return -EINVAL; 1178 rss_hash_cfg &= ~VNIC_RSS_CFG_REQ_HASH_TYPE_UDP_IPV4; 1179 if (tuple == 4) 1180 rss_hash_cfg |= VNIC_RSS_CFG_REQ_HASH_TYPE_UDP_IPV4; 1181 } else if (cmd->flow_type == TCP_V6_FLOW) { 1182 rss_hash_cfg &= ~VNIC_RSS_CFG_REQ_HASH_TYPE_TCP_IPV6; 1183 if (tuple == 4) 1184 rss_hash_cfg |= VNIC_RSS_CFG_REQ_HASH_TYPE_TCP_IPV6; 1185 } else if (cmd->flow_type == UDP_V6_FLOW) { 1186 if (tuple == 4 && !(bp->flags & BNXT_FLAG_UDP_RSS_CAP)) 1187 return -EINVAL; 1188 rss_hash_cfg &= ~VNIC_RSS_CFG_REQ_HASH_TYPE_UDP_IPV6; 1189 if (tuple == 4) 1190 rss_hash_cfg |= VNIC_RSS_CFG_REQ_HASH_TYPE_UDP_IPV6; 1191 } else if (tuple == 4) { 1192 return -EINVAL; 1193 } 1194 1195 switch (cmd->flow_type) { 1196 case TCP_V4_FLOW: 1197 case UDP_V4_FLOW: 1198 case SCTP_V4_FLOW: 1199 case AH_ESP_V4_FLOW: 1200 case AH_V4_FLOW: 1201 case ESP_V4_FLOW: 1202 case IPV4_FLOW: 1203 if (tuple == 2) 1204 rss_hash_cfg |= VNIC_RSS_CFG_REQ_HASH_TYPE_IPV4; 1205 else if (!tuple) 1206 rss_hash_cfg &= ~VNIC_RSS_CFG_REQ_HASH_TYPE_IPV4; 1207 break; 1208 1209 case TCP_V6_FLOW: 1210 case UDP_V6_FLOW: 1211 case SCTP_V6_FLOW: 1212 case AH_ESP_V6_FLOW: 1213 case AH_V6_FLOW: 1214 case ESP_V6_FLOW: 1215 case IPV6_FLOW: 1216 if (tuple == 2) 1217 rss_hash_cfg |= VNIC_RSS_CFG_REQ_HASH_TYPE_IPV6; 1218 else if (!tuple) 1219 rss_hash_cfg &= ~VNIC_RSS_CFG_REQ_HASH_TYPE_IPV6; 1220 break; 1221 } 1222 1223 if (bp->rss_hash_cfg == rss_hash_cfg) 1224 return 0; 1225 1226 bp->rss_hash_cfg = rss_hash_cfg; 1227 if (netif_running(bp->dev)) { 1228 bnxt_close_nic(bp, false, false); 1229 rc = bnxt_open_nic(bp, false, false); 1230 } 1231 return rc; 1232 } 1233 1234 static int bnxt_get_rxnfc(struct net_device *dev, struct ethtool_rxnfc *cmd, 1235 u32 *rule_locs) 1236 { 1237 struct bnxt *bp = netdev_priv(dev); 1238 int rc = 0; 1239 1240 switch (cmd->cmd) { 1241 #ifdef CONFIG_RFS_ACCEL 1242 case ETHTOOL_GRXRINGS: 1243 cmd->data = bp->rx_nr_rings; 1244 break; 1245 1246 case ETHTOOL_GRXCLSRLCNT: 1247 cmd->rule_cnt = bp->ntp_fltr_count; 1248 cmd->data = BNXT_NTP_FLTR_MAX_FLTR; 1249 break; 1250 1251 case ETHTOOL_GRXCLSRLALL: 1252 rc = bnxt_grxclsrlall(bp, cmd, (u32 *)rule_locs); 1253 break; 1254 1255 case ETHTOOL_GRXCLSRULE: 1256 rc = bnxt_grxclsrule(bp, cmd); 1257 break; 1258 #endif 1259 1260 case ETHTOOL_GRXFH: 1261 rc = bnxt_grxfh(bp, cmd); 1262 break; 1263 1264 default: 1265 rc = -EOPNOTSUPP; 1266 break; 1267 } 1268 1269 return rc; 1270 } 1271 1272 static int bnxt_set_rxnfc(struct net_device *dev, struct ethtool_rxnfc *cmd) 1273 { 1274 struct bnxt *bp = netdev_priv(dev); 1275 int rc; 1276 1277 switch (cmd->cmd) { 1278 case ETHTOOL_SRXFH: 1279 rc = bnxt_srxfh(bp, cmd); 1280 break; 1281 1282 default: 1283 rc = -EOPNOTSUPP; 1284 break; 1285 } 1286 return rc; 1287 } 1288 1289 u32 bnxt_get_rxfh_indir_size(struct net_device *dev) 1290 { 1291 struct bnxt *bp = netdev_priv(dev); 1292 1293 if (bp->flags & BNXT_FLAG_CHIP_P5) 1294 return ALIGN(bp->rx_nr_rings, BNXT_RSS_TABLE_ENTRIES_P5); 1295 return HW_HASH_INDEX_SIZE; 1296 } 1297 1298 static u32 bnxt_get_rxfh_key_size(struct net_device *dev) 1299 { 1300 return HW_HASH_KEY_SIZE; 1301 } 1302 1303 static int bnxt_get_rxfh(struct net_device *dev, u32 *indir, u8 *key, 1304 u8 *hfunc) 1305 { 1306 struct bnxt *bp = netdev_priv(dev); 1307 struct bnxt_vnic_info *vnic; 1308 u32 i, tbl_size; 1309 1310 if (hfunc) 1311 *hfunc = ETH_RSS_HASH_TOP; 1312 1313 if (!bp->vnic_info) 1314 return 0; 1315 1316 vnic = &bp->vnic_info[0]; 1317 if (indir && bp->rss_indir_tbl) { 1318 tbl_size = bnxt_get_rxfh_indir_size(dev); 1319 for (i = 0; i < tbl_size; i++) 1320 indir[i] = bp->rss_indir_tbl[i]; 1321 } 1322 1323 if (key && vnic->rss_hash_key) 1324 memcpy(key, vnic->rss_hash_key, HW_HASH_KEY_SIZE); 1325 1326 return 0; 1327 } 1328 1329 static int bnxt_set_rxfh(struct net_device *dev, const u32 *indir, 1330 const u8 *key, const u8 hfunc) 1331 { 1332 struct bnxt *bp = netdev_priv(dev); 1333 int rc = 0; 1334 1335 if (hfunc && hfunc != ETH_RSS_HASH_TOP) 1336 return -EOPNOTSUPP; 1337 1338 if (key) 1339 return -EOPNOTSUPP; 1340 1341 if (indir) { 1342 u32 i, pad, tbl_size = bnxt_get_rxfh_indir_size(dev); 1343 1344 for (i = 0; i < tbl_size; i++) 1345 bp->rss_indir_tbl[i] = indir[i]; 1346 pad = bp->rss_indir_tbl_entries - tbl_size; 1347 if (pad) 1348 memset(&bp->rss_indir_tbl[i], 0, pad * sizeof(u16)); 1349 } 1350 1351 if (netif_running(bp->dev)) { 1352 bnxt_close_nic(bp, false, false); 1353 rc = bnxt_open_nic(bp, false, false); 1354 } 1355 return rc; 1356 } 1357 1358 static void bnxt_get_drvinfo(struct net_device *dev, 1359 struct ethtool_drvinfo *info) 1360 { 1361 struct bnxt *bp = netdev_priv(dev); 1362 1363 strlcpy(info->driver, DRV_MODULE_NAME, sizeof(info->driver)); 1364 strlcpy(info->fw_version, bp->fw_ver_str, sizeof(info->fw_version)); 1365 strlcpy(info->bus_info, pci_name(bp->pdev), sizeof(info->bus_info)); 1366 info->n_stats = bnxt_get_num_stats(bp); 1367 info->testinfo_len = bp->num_tests; 1368 /* TODO CHIMP_FW: eeprom dump details */ 1369 info->eedump_len = 0; 1370 /* TODO CHIMP FW: reg dump details */ 1371 info->regdump_len = 0; 1372 } 1373 1374 static int bnxt_get_regs_len(struct net_device *dev) 1375 { 1376 struct bnxt *bp = netdev_priv(dev); 1377 int reg_len; 1378 1379 if (!BNXT_PF(bp)) 1380 return -EOPNOTSUPP; 1381 1382 reg_len = BNXT_PXP_REG_LEN; 1383 1384 if (bp->fw_cap & BNXT_FW_CAP_PCIE_STATS_SUPPORTED) 1385 reg_len += sizeof(struct pcie_ctx_hw_stats); 1386 1387 return reg_len; 1388 } 1389 1390 static void bnxt_get_regs(struct net_device *dev, struct ethtool_regs *regs, 1391 void *_p) 1392 { 1393 struct pcie_ctx_hw_stats *hw_pcie_stats; 1394 struct hwrm_pcie_qstats_input *req; 1395 struct bnxt *bp = netdev_priv(dev); 1396 dma_addr_t hw_pcie_stats_addr; 1397 int rc; 1398 1399 regs->version = 0; 1400 bnxt_dbg_hwrm_rd_reg(bp, 0, BNXT_PXP_REG_LEN / 4, _p); 1401 1402 if (!(bp->fw_cap & BNXT_FW_CAP_PCIE_STATS_SUPPORTED)) 1403 return; 1404 1405 if (hwrm_req_init(bp, req, HWRM_PCIE_QSTATS)) 1406 return; 1407 1408 hw_pcie_stats = hwrm_req_dma_slice(bp, req, sizeof(*hw_pcie_stats), 1409 &hw_pcie_stats_addr); 1410 if (!hw_pcie_stats) { 1411 hwrm_req_drop(bp, req); 1412 return; 1413 } 1414 1415 regs->version = 1; 1416 hwrm_req_hold(bp, req); /* hold on to slice */ 1417 req->pcie_stat_size = cpu_to_le16(sizeof(*hw_pcie_stats)); 1418 req->pcie_stat_host_addr = cpu_to_le64(hw_pcie_stats_addr); 1419 rc = hwrm_req_send(bp, req); 1420 if (!rc) { 1421 __le64 *src = (__le64 *)hw_pcie_stats; 1422 u64 *dst = (u64 *)(_p + BNXT_PXP_REG_LEN); 1423 int i; 1424 1425 for (i = 0; i < sizeof(*hw_pcie_stats) / sizeof(__le64); i++) 1426 dst[i] = le64_to_cpu(src[i]); 1427 } 1428 hwrm_req_drop(bp, req); 1429 } 1430 1431 static void bnxt_get_wol(struct net_device *dev, struct ethtool_wolinfo *wol) 1432 { 1433 struct bnxt *bp = netdev_priv(dev); 1434 1435 wol->supported = 0; 1436 wol->wolopts = 0; 1437 memset(&wol->sopass, 0, sizeof(wol->sopass)); 1438 if (bp->flags & BNXT_FLAG_WOL_CAP) { 1439 wol->supported = WAKE_MAGIC; 1440 if (bp->wol) 1441 wol->wolopts = WAKE_MAGIC; 1442 } 1443 } 1444 1445 static int bnxt_set_wol(struct net_device *dev, struct ethtool_wolinfo *wol) 1446 { 1447 struct bnxt *bp = netdev_priv(dev); 1448 1449 if (wol->wolopts & ~WAKE_MAGIC) 1450 return -EINVAL; 1451 1452 if (wol->wolopts & WAKE_MAGIC) { 1453 if (!(bp->flags & BNXT_FLAG_WOL_CAP)) 1454 return -EINVAL; 1455 if (!bp->wol) { 1456 if (bnxt_hwrm_alloc_wol_fltr(bp)) 1457 return -EBUSY; 1458 bp->wol = 1; 1459 } 1460 } else { 1461 if (bp->wol) { 1462 if (bnxt_hwrm_free_wol_fltr(bp)) 1463 return -EBUSY; 1464 bp->wol = 0; 1465 } 1466 } 1467 return 0; 1468 } 1469 1470 u32 _bnxt_fw_to_ethtool_adv_spds(u16 fw_speeds, u8 fw_pause) 1471 { 1472 u32 speed_mask = 0; 1473 1474 /* TODO: support 25GB, 40GB, 50GB with different cable type */ 1475 /* set the advertised speeds */ 1476 if (fw_speeds & BNXT_LINK_SPEED_MSK_100MB) 1477 speed_mask |= ADVERTISED_100baseT_Full; 1478 if (fw_speeds & BNXT_LINK_SPEED_MSK_1GB) 1479 speed_mask |= ADVERTISED_1000baseT_Full; 1480 if (fw_speeds & BNXT_LINK_SPEED_MSK_2_5GB) 1481 speed_mask |= ADVERTISED_2500baseX_Full; 1482 if (fw_speeds & BNXT_LINK_SPEED_MSK_10GB) 1483 speed_mask |= ADVERTISED_10000baseT_Full; 1484 if (fw_speeds & BNXT_LINK_SPEED_MSK_40GB) 1485 speed_mask |= ADVERTISED_40000baseCR4_Full; 1486 1487 if ((fw_pause & BNXT_LINK_PAUSE_BOTH) == BNXT_LINK_PAUSE_BOTH) 1488 speed_mask |= ADVERTISED_Pause; 1489 else if (fw_pause & BNXT_LINK_PAUSE_TX) 1490 speed_mask |= ADVERTISED_Asym_Pause; 1491 else if (fw_pause & BNXT_LINK_PAUSE_RX) 1492 speed_mask |= ADVERTISED_Pause | ADVERTISED_Asym_Pause; 1493 1494 return speed_mask; 1495 } 1496 1497 #define BNXT_FW_TO_ETHTOOL_SPDS(fw_speeds, fw_pause, lk_ksettings, name)\ 1498 { \ 1499 if ((fw_speeds) & BNXT_LINK_SPEED_MSK_100MB) \ 1500 ethtool_link_ksettings_add_link_mode(lk_ksettings, name,\ 1501 100baseT_Full); \ 1502 if ((fw_speeds) & BNXT_LINK_SPEED_MSK_1GB) \ 1503 ethtool_link_ksettings_add_link_mode(lk_ksettings, name,\ 1504 1000baseT_Full); \ 1505 if ((fw_speeds) & BNXT_LINK_SPEED_MSK_10GB) \ 1506 ethtool_link_ksettings_add_link_mode(lk_ksettings, name,\ 1507 10000baseT_Full); \ 1508 if ((fw_speeds) & BNXT_LINK_SPEED_MSK_25GB) \ 1509 ethtool_link_ksettings_add_link_mode(lk_ksettings, name,\ 1510 25000baseCR_Full); \ 1511 if ((fw_speeds) & BNXT_LINK_SPEED_MSK_40GB) \ 1512 ethtool_link_ksettings_add_link_mode(lk_ksettings, name,\ 1513 40000baseCR4_Full);\ 1514 if ((fw_speeds) & BNXT_LINK_SPEED_MSK_50GB) \ 1515 ethtool_link_ksettings_add_link_mode(lk_ksettings, name,\ 1516 50000baseCR2_Full);\ 1517 if ((fw_speeds) & BNXT_LINK_SPEED_MSK_100GB) \ 1518 ethtool_link_ksettings_add_link_mode(lk_ksettings, name,\ 1519 100000baseCR4_Full);\ 1520 if ((fw_pause) & BNXT_LINK_PAUSE_RX) { \ 1521 ethtool_link_ksettings_add_link_mode(lk_ksettings, name,\ 1522 Pause); \ 1523 if (!((fw_pause) & BNXT_LINK_PAUSE_TX)) \ 1524 ethtool_link_ksettings_add_link_mode( \ 1525 lk_ksettings, name, Asym_Pause);\ 1526 } else if ((fw_pause) & BNXT_LINK_PAUSE_TX) { \ 1527 ethtool_link_ksettings_add_link_mode(lk_ksettings, name,\ 1528 Asym_Pause); \ 1529 } \ 1530 } 1531 1532 #define BNXT_ETHTOOL_TO_FW_SPDS(fw_speeds, lk_ksettings, name) \ 1533 { \ 1534 if (ethtool_link_ksettings_test_link_mode(lk_ksettings, name, \ 1535 100baseT_Full) || \ 1536 ethtool_link_ksettings_test_link_mode(lk_ksettings, name, \ 1537 100baseT_Half)) \ 1538 (fw_speeds) |= BNXT_LINK_SPEED_MSK_100MB; \ 1539 if (ethtool_link_ksettings_test_link_mode(lk_ksettings, name, \ 1540 1000baseT_Full) || \ 1541 ethtool_link_ksettings_test_link_mode(lk_ksettings, name, \ 1542 1000baseT_Half)) \ 1543 (fw_speeds) |= BNXT_LINK_SPEED_MSK_1GB; \ 1544 if (ethtool_link_ksettings_test_link_mode(lk_ksettings, name, \ 1545 10000baseT_Full)) \ 1546 (fw_speeds) |= BNXT_LINK_SPEED_MSK_10GB; \ 1547 if (ethtool_link_ksettings_test_link_mode(lk_ksettings, name, \ 1548 25000baseCR_Full)) \ 1549 (fw_speeds) |= BNXT_LINK_SPEED_MSK_25GB; \ 1550 if (ethtool_link_ksettings_test_link_mode(lk_ksettings, name, \ 1551 40000baseCR4_Full)) \ 1552 (fw_speeds) |= BNXT_LINK_SPEED_MSK_40GB; \ 1553 if (ethtool_link_ksettings_test_link_mode(lk_ksettings, name, \ 1554 50000baseCR2_Full)) \ 1555 (fw_speeds) |= BNXT_LINK_SPEED_MSK_50GB; \ 1556 if (ethtool_link_ksettings_test_link_mode(lk_ksettings, name, \ 1557 100000baseCR4_Full)) \ 1558 (fw_speeds) |= BNXT_LINK_SPEED_MSK_100GB; \ 1559 } 1560 1561 #define BNXT_FW_TO_ETHTOOL_PAM4_SPDS(fw_speeds, lk_ksettings, name) \ 1562 { \ 1563 if ((fw_speeds) & BNXT_LINK_PAM4_SPEED_MSK_50GB) \ 1564 ethtool_link_ksettings_add_link_mode(lk_ksettings, name,\ 1565 50000baseCR_Full); \ 1566 if ((fw_speeds) & BNXT_LINK_PAM4_SPEED_MSK_100GB) \ 1567 ethtool_link_ksettings_add_link_mode(lk_ksettings, name,\ 1568 100000baseCR2_Full);\ 1569 if ((fw_speeds) & BNXT_LINK_PAM4_SPEED_MSK_200GB) \ 1570 ethtool_link_ksettings_add_link_mode(lk_ksettings, name,\ 1571 200000baseCR4_Full);\ 1572 } 1573 1574 #define BNXT_ETHTOOL_TO_FW_PAM4_SPDS(fw_speeds, lk_ksettings, name) \ 1575 { \ 1576 if (ethtool_link_ksettings_test_link_mode(lk_ksettings, name, \ 1577 50000baseCR_Full)) \ 1578 (fw_speeds) |= BNXT_LINK_PAM4_SPEED_MSK_50GB; \ 1579 if (ethtool_link_ksettings_test_link_mode(lk_ksettings, name, \ 1580 100000baseCR2_Full)) \ 1581 (fw_speeds) |= BNXT_LINK_PAM4_SPEED_MSK_100GB; \ 1582 if (ethtool_link_ksettings_test_link_mode(lk_ksettings, name, \ 1583 200000baseCR4_Full)) \ 1584 (fw_speeds) |= BNXT_LINK_PAM4_SPEED_MSK_200GB; \ 1585 } 1586 1587 static void bnxt_fw_to_ethtool_advertised_fec(struct bnxt_link_info *link_info, 1588 struct ethtool_link_ksettings *lk_ksettings) 1589 { 1590 u16 fec_cfg = link_info->fec_cfg; 1591 1592 if ((fec_cfg & BNXT_FEC_NONE) || !(fec_cfg & BNXT_FEC_AUTONEG)) { 1593 linkmode_set_bit(ETHTOOL_LINK_MODE_FEC_NONE_BIT, 1594 lk_ksettings->link_modes.advertising); 1595 return; 1596 } 1597 if (fec_cfg & BNXT_FEC_ENC_BASE_R) 1598 linkmode_set_bit(ETHTOOL_LINK_MODE_FEC_BASER_BIT, 1599 lk_ksettings->link_modes.advertising); 1600 if (fec_cfg & BNXT_FEC_ENC_RS) 1601 linkmode_set_bit(ETHTOOL_LINK_MODE_FEC_RS_BIT, 1602 lk_ksettings->link_modes.advertising); 1603 if (fec_cfg & BNXT_FEC_ENC_LLRS) 1604 linkmode_set_bit(ETHTOOL_LINK_MODE_FEC_LLRS_BIT, 1605 lk_ksettings->link_modes.advertising); 1606 } 1607 1608 static void bnxt_fw_to_ethtool_advertised_spds(struct bnxt_link_info *link_info, 1609 struct ethtool_link_ksettings *lk_ksettings) 1610 { 1611 u16 fw_speeds = link_info->advertising; 1612 u8 fw_pause = 0; 1613 1614 if (link_info->autoneg & BNXT_AUTONEG_FLOW_CTRL) 1615 fw_pause = link_info->auto_pause_setting; 1616 1617 BNXT_FW_TO_ETHTOOL_SPDS(fw_speeds, fw_pause, lk_ksettings, advertising); 1618 fw_speeds = link_info->advertising_pam4; 1619 BNXT_FW_TO_ETHTOOL_PAM4_SPDS(fw_speeds, lk_ksettings, advertising); 1620 bnxt_fw_to_ethtool_advertised_fec(link_info, lk_ksettings); 1621 } 1622 1623 static void bnxt_fw_to_ethtool_lp_adv(struct bnxt_link_info *link_info, 1624 struct ethtool_link_ksettings *lk_ksettings) 1625 { 1626 u16 fw_speeds = link_info->lp_auto_link_speeds; 1627 u8 fw_pause = 0; 1628 1629 if (link_info->autoneg & BNXT_AUTONEG_FLOW_CTRL) 1630 fw_pause = link_info->lp_pause; 1631 1632 BNXT_FW_TO_ETHTOOL_SPDS(fw_speeds, fw_pause, lk_ksettings, 1633 lp_advertising); 1634 fw_speeds = link_info->lp_auto_pam4_link_speeds; 1635 BNXT_FW_TO_ETHTOOL_PAM4_SPDS(fw_speeds, lk_ksettings, lp_advertising); 1636 } 1637 1638 static void bnxt_fw_to_ethtool_support_fec(struct bnxt_link_info *link_info, 1639 struct ethtool_link_ksettings *lk_ksettings) 1640 { 1641 u16 fec_cfg = link_info->fec_cfg; 1642 1643 if (fec_cfg & BNXT_FEC_NONE) { 1644 linkmode_set_bit(ETHTOOL_LINK_MODE_FEC_NONE_BIT, 1645 lk_ksettings->link_modes.supported); 1646 return; 1647 } 1648 if (fec_cfg & BNXT_FEC_ENC_BASE_R_CAP) 1649 linkmode_set_bit(ETHTOOL_LINK_MODE_FEC_BASER_BIT, 1650 lk_ksettings->link_modes.supported); 1651 if (fec_cfg & BNXT_FEC_ENC_RS_CAP) 1652 linkmode_set_bit(ETHTOOL_LINK_MODE_FEC_RS_BIT, 1653 lk_ksettings->link_modes.supported); 1654 if (fec_cfg & BNXT_FEC_ENC_LLRS_CAP) 1655 linkmode_set_bit(ETHTOOL_LINK_MODE_FEC_LLRS_BIT, 1656 lk_ksettings->link_modes.supported); 1657 } 1658 1659 static void bnxt_fw_to_ethtool_support_spds(struct bnxt_link_info *link_info, 1660 struct ethtool_link_ksettings *lk_ksettings) 1661 { 1662 u16 fw_speeds = link_info->support_speeds; 1663 1664 BNXT_FW_TO_ETHTOOL_SPDS(fw_speeds, 0, lk_ksettings, supported); 1665 fw_speeds = link_info->support_pam4_speeds; 1666 BNXT_FW_TO_ETHTOOL_PAM4_SPDS(fw_speeds, lk_ksettings, supported); 1667 1668 ethtool_link_ksettings_add_link_mode(lk_ksettings, supported, Pause); 1669 ethtool_link_ksettings_add_link_mode(lk_ksettings, supported, 1670 Asym_Pause); 1671 1672 if (link_info->support_auto_speeds || 1673 link_info->support_pam4_auto_speeds) 1674 ethtool_link_ksettings_add_link_mode(lk_ksettings, supported, 1675 Autoneg); 1676 bnxt_fw_to_ethtool_support_fec(link_info, lk_ksettings); 1677 } 1678 1679 u32 bnxt_fw_to_ethtool_speed(u16 fw_link_speed) 1680 { 1681 switch (fw_link_speed) { 1682 case BNXT_LINK_SPEED_100MB: 1683 return SPEED_100; 1684 case BNXT_LINK_SPEED_1GB: 1685 return SPEED_1000; 1686 case BNXT_LINK_SPEED_2_5GB: 1687 return SPEED_2500; 1688 case BNXT_LINK_SPEED_10GB: 1689 return SPEED_10000; 1690 case BNXT_LINK_SPEED_20GB: 1691 return SPEED_20000; 1692 case BNXT_LINK_SPEED_25GB: 1693 return SPEED_25000; 1694 case BNXT_LINK_SPEED_40GB: 1695 return SPEED_40000; 1696 case BNXT_LINK_SPEED_50GB: 1697 return SPEED_50000; 1698 case BNXT_LINK_SPEED_100GB: 1699 return SPEED_100000; 1700 default: 1701 return SPEED_UNKNOWN; 1702 } 1703 } 1704 1705 static int bnxt_get_link_ksettings(struct net_device *dev, 1706 struct ethtool_link_ksettings *lk_ksettings) 1707 { 1708 struct bnxt *bp = netdev_priv(dev); 1709 struct bnxt_link_info *link_info = &bp->link_info; 1710 struct ethtool_link_settings *base = &lk_ksettings->base; 1711 u32 ethtool_speed; 1712 1713 ethtool_link_ksettings_zero_link_mode(lk_ksettings, supported); 1714 mutex_lock(&bp->link_lock); 1715 bnxt_fw_to_ethtool_support_spds(link_info, lk_ksettings); 1716 1717 ethtool_link_ksettings_zero_link_mode(lk_ksettings, advertising); 1718 if (link_info->autoneg) { 1719 bnxt_fw_to_ethtool_advertised_spds(link_info, lk_ksettings); 1720 ethtool_link_ksettings_add_link_mode(lk_ksettings, 1721 advertising, Autoneg); 1722 base->autoneg = AUTONEG_ENABLE; 1723 base->duplex = DUPLEX_UNKNOWN; 1724 if (link_info->phy_link_status == BNXT_LINK_LINK) { 1725 bnxt_fw_to_ethtool_lp_adv(link_info, lk_ksettings); 1726 if (link_info->duplex & BNXT_LINK_DUPLEX_FULL) 1727 base->duplex = DUPLEX_FULL; 1728 else 1729 base->duplex = DUPLEX_HALF; 1730 } 1731 ethtool_speed = bnxt_fw_to_ethtool_speed(link_info->link_speed); 1732 } else { 1733 base->autoneg = AUTONEG_DISABLE; 1734 ethtool_speed = 1735 bnxt_fw_to_ethtool_speed(link_info->req_link_speed); 1736 base->duplex = DUPLEX_HALF; 1737 if (link_info->req_duplex == BNXT_LINK_DUPLEX_FULL) 1738 base->duplex = DUPLEX_FULL; 1739 } 1740 base->speed = ethtool_speed; 1741 1742 base->port = PORT_NONE; 1743 if (link_info->media_type == PORT_PHY_QCFG_RESP_MEDIA_TYPE_TP) { 1744 base->port = PORT_TP; 1745 ethtool_link_ksettings_add_link_mode(lk_ksettings, supported, 1746 TP); 1747 ethtool_link_ksettings_add_link_mode(lk_ksettings, advertising, 1748 TP); 1749 } else { 1750 ethtool_link_ksettings_add_link_mode(lk_ksettings, supported, 1751 FIBRE); 1752 ethtool_link_ksettings_add_link_mode(lk_ksettings, advertising, 1753 FIBRE); 1754 1755 if (link_info->media_type == PORT_PHY_QCFG_RESP_MEDIA_TYPE_DAC) 1756 base->port = PORT_DA; 1757 else if (link_info->media_type == 1758 PORT_PHY_QCFG_RESP_MEDIA_TYPE_FIBRE) 1759 base->port = PORT_FIBRE; 1760 } 1761 base->phy_address = link_info->phy_addr; 1762 mutex_unlock(&bp->link_lock); 1763 1764 return 0; 1765 } 1766 1767 static int bnxt_force_link_speed(struct net_device *dev, u32 ethtool_speed) 1768 { 1769 struct bnxt *bp = netdev_priv(dev); 1770 struct bnxt_link_info *link_info = &bp->link_info; 1771 u16 support_pam4_spds = link_info->support_pam4_speeds; 1772 u16 support_spds = link_info->support_speeds; 1773 u8 sig_mode = BNXT_SIG_MODE_NRZ; 1774 u16 fw_speed = 0; 1775 1776 switch (ethtool_speed) { 1777 case SPEED_100: 1778 if (support_spds & BNXT_LINK_SPEED_MSK_100MB) 1779 fw_speed = PORT_PHY_CFG_REQ_FORCE_LINK_SPEED_100MB; 1780 break; 1781 case SPEED_1000: 1782 if (support_spds & BNXT_LINK_SPEED_MSK_1GB) 1783 fw_speed = PORT_PHY_CFG_REQ_FORCE_LINK_SPEED_1GB; 1784 break; 1785 case SPEED_2500: 1786 if (support_spds & BNXT_LINK_SPEED_MSK_2_5GB) 1787 fw_speed = PORT_PHY_CFG_REQ_FORCE_LINK_SPEED_2_5GB; 1788 break; 1789 case SPEED_10000: 1790 if (support_spds & BNXT_LINK_SPEED_MSK_10GB) 1791 fw_speed = PORT_PHY_CFG_REQ_FORCE_LINK_SPEED_10GB; 1792 break; 1793 case SPEED_20000: 1794 if (support_spds & BNXT_LINK_SPEED_MSK_20GB) 1795 fw_speed = PORT_PHY_CFG_REQ_FORCE_LINK_SPEED_20GB; 1796 break; 1797 case SPEED_25000: 1798 if (support_spds & BNXT_LINK_SPEED_MSK_25GB) 1799 fw_speed = PORT_PHY_CFG_REQ_FORCE_LINK_SPEED_25GB; 1800 break; 1801 case SPEED_40000: 1802 if (support_spds & BNXT_LINK_SPEED_MSK_40GB) 1803 fw_speed = PORT_PHY_CFG_REQ_FORCE_LINK_SPEED_40GB; 1804 break; 1805 case SPEED_50000: 1806 if (support_spds & BNXT_LINK_SPEED_MSK_50GB) { 1807 fw_speed = PORT_PHY_CFG_REQ_FORCE_LINK_SPEED_50GB; 1808 } else if (support_pam4_spds & BNXT_LINK_PAM4_SPEED_MSK_50GB) { 1809 fw_speed = PORT_PHY_CFG_REQ_FORCE_PAM4_LINK_SPEED_50GB; 1810 sig_mode = BNXT_SIG_MODE_PAM4; 1811 } 1812 break; 1813 case SPEED_100000: 1814 if (support_spds & BNXT_LINK_SPEED_MSK_100GB) { 1815 fw_speed = PORT_PHY_CFG_REQ_FORCE_LINK_SPEED_100GB; 1816 } else if (support_pam4_spds & BNXT_LINK_PAM4_SPEED_MSK_100GB) { 1817 fw_speed = PORT_PHY_CFG_REQ_FORCE_PAM4_LINK_SPEED_100GB; 1818 sig_mode = BNXT_SIG_MODE_PAM4; 1819 } 1820 break; 1821 case SPEED_200000: 1822 if (support_pam4_spds & BNXT_LINK_PAM4_SPEED_MSK_200GB) { 1823 fw_speed = PORT_PHY_CFG_REQ_FORCE_PAM4_LINK_SPEED_200GB; 1824 sig_mode = BNXT_SIG_MODE_PAM4; 1825 } 1826 break; 1827 } 1828 1829 if (!fw_speed) { 1830 netdev_err(dev, "unsupported speed!\n"); 1831 return -EINVAL; 1832 } 1833 1834 if (link_info->req_link_speed == fw_speed && 1835 link_info->req_signal_mode == sig_mode && 1836 link_info->autoneg == 0) 1837 return -EALREADY; 1838 1839 link_info->req_link_speed = fw_speed; 1840 link_info->req_signal_mode = sig_mode; 1841 link_info->req_duplex = BNXT_LINK_DUPLEX_FULL; 1842 link_info->autoneg = 0; 1843 link_info->advertising = 0; 1844 link_info->advertising_pam4 = 0; 1845 1846 return 0; 1847 } 1848 1849 u16 bnxt_get_fw_auto_link_speeds(u32 advertising) 1850 { 1851 u16 fw_speed_mask = 0; 1852 1853 /* only support autoneg at speed 100, 1000, and 10000 */ 1854 if (advertising & (ADVERTISED_100baseT_Full | 1855 ADVERTISED_100baseT_Half)) { 1856 fw_speed_mask |= BNXT_LINK_SPEED_MSK_100MB; 1857 } 1858 if (advertising & (ADVERTISED_1000baseT_Full | 1859 ADVERTISED_1000baseT_Half)) { 1860 fw_speed_mask |= BNXT_LINK_SPEED_MSK_1GB; 1861 } 1862 if (advertising & ADVERTISED_10000baseT_Full) 1863 fw_speed_mask |= BNXT_LINK_SPEED_MSK_10GB; 1864 1865 if (advertising & ADVERTISED_40000baseCR4_Full) 1866 fw_speed_mask |= BNXT_LINK_SPEED_MSK_40GB; 1867 1868 return fw_speed_mask; 1869 } 1870 1871 static int bnxt_set_link_ksettings(struct net_device *dev, 1872 const struct ethtool_link_ksettings *lk_ksettings) 1873 { 1874 struct bnxt *bp = netdev_priv(dev); 1875 struct bnxt_link_info *link_info = &bp->link_info; 1876 const struct ethtool_link_settings *base = &lk_ksettings->base; 1877 bool set_pause = false; 1878 u32 speed; 1879 int rc = 0; 1880 1881 if (!BNXT_PHY_CFG_ABLE(bp)) 1882 return -EOPNOTSUPP; 1883 1884 mutex_lock(&bp->link_lock); 1885 if (base->autoneg == AUTONEG_ENABLE) { 1886 link_info->advertising = 0; 1887 link_info->advertising_pam4 = 0; 1888 BNXT_ETHTOOL_TO_FW_SPDS(link_info->advertising, lk_ksettings, 1889 advertising); 1890 BNXT_ETHTOOL_TO_FW_PAM4_SPDS(link_info->advertising_pam4, 1891 lk_ksettings, advertising); 1892 link_info->autoneg |= BNXT_AUTONEG_SPEED; 1893 if (!link_info->advertising && !link_info->advertising_pam4) { 1894 link_info->advertising = link_info->support_auto_speeds; 1895 link_info->advertising_pam4 = 1896 link_info->support_pam4_auto_speeds; 1897 } 1898 /* any change to autoneg will cause link change, therefore the 1899 * driver should put back the original pause setting in autoneg 1900 */ 1901 set_pause = true; 1902 } else { 1903 u8 phy_type = link_info->phy_type; 1904 1905 if (phy_type == PORT_PHY_QCFG_RESP_PHY_TYPE_BASET || 1906 phy_type == PORT_PHY_QCFG_RESP_PHY_TYPE_BASETE || 1907 link_info->media_type == PORT_PHY_QCFG_RESP_MEDIA_TYPE_TP) { 1908 netdev_err(dev, "10GBase-T devices must autoneg\n"); 1909 rc = -EINVAL; 1910 goto set_setting_exit; 1911 } 1912 if (base->duplex == DUPLEX_HALF) { 1913 netdev_err(dev, "HALF DUPLEX is not supported!\n"); 1914 rc = -EINVAL; 1915 goto set_setting_exit; 1916 } 1917 speed = base->speed; 1918 rc = bnxt_force_link_speed(dev, speed); 1919 if (rc) { 1920 if (rc == -EALREADY) 1921 rc = 0; 1922 goto set_setting_exit; 1923 } 1924 } 1925 1926 if (netif_running(dev)) 1927 rc = bnxt_hwrm_set_link_setting(bp, set_pause, false); 1928 1929 set_setting_exit: 1930 mutex_unlock(&bp->link_lock); 1931 return rc; 1932 } 1933 1934 static int bnxt_get_fecparam(struct net_device *dev, 1935 struct ethtool_fecparam *fec) 1936 { 1937 struct bnxt *bp = netdev_priv(dev); 1938 struct bnxt_link_info *link_info; 1939 u8 active_fec; 1940 u16 fec_cfg; 1941 1942 link_info = &bp->link_info; 1943 fec_cfg = link_info->fec_cfg; 1944 active_fec = link_info->active_fec_sig_mode & 1945 PORT_PHY_QCFG_RESP_ACTIVE_FEC_MASK; 1946 if (fec_cfg & BNXT_FEC_NONE) { 1947 fec->fec = ETHTOOL_FEC_NONE; 1948 fec->active_fec = ETHTOOL_FEC_NONE; 1949 return 0; 1950 } 1951 if (fec_cfg & BNXT_FEC_AUTONEG) 1952 fec->fec |= ETHTOOL_FEC_AUTO; 1953 if (fec_cfg & BNXT_FEC_ENC_BASE_R) 1954 fec->fec |= ETHTOOL_FEC_BASER; 1955 if (fec_cfg & BNXT_FEC_ENC_RS) 1956 fec->fec |= ETHTOOL_FEC_RS; 1957 if (fec_cfg & BNXT_FEC_ENC_LLRS) 1958 fec->fec |= ETHTOOL_FEC_LLRS; 1959 1960 switch (active_fec) { 1961 case PORT_PHY_QCFG_RESP_ACTIVE_FEC_FEC_CLAUSE74_ACTIVE: 1962 fec->active_fec |= ETHTOOL_FEC_BASER; 1963 break; 1964 case PORT_PHY_QCFG_RESP_ACTIVE_FEC_FEC_CLAUSE91_ACTIVE: 1965 case PORT_PHY_QCFG_RESP_ACTIVE_FEC_FEC_RS544_1XN_ACTIVE: 1966 case PORT_PHY_QCFG_RESP_ACTIVE_FEC_FEC_RS544_IEEE_ACTIVE: 1967 fec->active_fec |= ETHTOOL_FEC_RS; 1968 break; 1969 case PORT_PHY_QCFG_RESP_ACTIVE_FEC_FEC_RS272_1XN_ACTIVE: 1970 case PORT_PHY_QCFG_RESP_ACTIVE_FEC_FEC_RS272_IEEE_ACTIVE: 1971 fec->active_fec |= ETHTOOL_FEC_LLRS; 1972 break; 1973 case PORT_PHY_QCFG_RESP_ACTIVE_FEC_FEC_NONE_ACTIVE: 1974 fec->active_fec |= ETHTOOL_FEC_OFF; 1975 break; 1976 } 1977 return 0; 1978 } 1979 1980 static void bnxt_get_fec_stats(struct net_device *dev, 1981 struct ethtool_fec_stats *fec_stats) 1982 { 1983 struct bnxt *bp = netdev_priv(dev); 1984 u64 *rx; 1985 1986 if (BNXT_VF(bp) || !(bp->flags & BNXT_FLAG_PORT_STATS_EXT)) 1987 return; 1988 1989 rx = bp->rx_port_stats_ext.sw_stats; 1990 fec_stats->corrected_bits.total = 1991 *(rx + BNXT_RX_STATS_EXT_OFFSET(rx_corrected_bits)); 1992 } 1993 1994 static u32 bnxt_ethtool_forced_fec_to_fw(struct bnxt_link_info *link_info, 1995 u32 fec) 1996 { 1997 u32 fw_fec = PORT_PHY_CFG_REQ_FLAGS_FEC_AUTONEG_DISABLE; 1998 1999 if (fec & ETHTOOL_FEC_BASER) 2000 fw_fec |= BNXT_FEC_BASE_R_ON(link_info); 2001 else if (fec & ETHTOOL_FEC_RS) 2002 fw_fec |= BNXT_FEC_RS_ON(link_info); 2003 else if (fec & ETHTOOL_FEC_LLRS) 2004 fw_fec |= BNXT_FEC_LLRS_ON; 2005 return fw_fec; 2006 } 2007 2008 static int bnxt_set_fecparam(struct net_device *dev, 2009 struct ethtool_fecparam *fecparam) 2010 { 2011 struct hwrm_port_phy_cfg_input *req; 2012 struct bnxt *bp = netdev_priv(dev); 2013 struct bnxt_link_info *link_info; 2014 u32 new_cfg, fec = fecparam->fec; 2015 u16 fec_cfg; 2016 int rc; 2017 2018 link_info = &bp->link_info; 2019 fec_cfg = link_info->fec_cfg; 2020 if (fec_cfg & BNXT_FEC_NONE) 2021 return -EOPNOTSUPP; 2022 2023 if (fec & ETHTOOL_FEC_OFF) { 2024 new_cfg = PORT_PHY_CFG_REQ_FLAGS_FEC_AUTONEG_DISABLE | 2025 BNXT_FEC_ALL_OFF(link_info); 2026 goto apply_fec; 2027 } 2028 if (((fec & ETHTOOL_FEC_AUTO) && !(fec_cfg & BNXT_FEC_AUTONEG_CAP)) || 2029 ((fec & ETHTOOL_FEC_RS) && !(fec_cfg & BNXT_FEC_ENC_RS_CAP)) || 2030 ((fec & ETHTOOL_FEC_LLRS) && !(fec_cfg & BNXT_FEC_ENC_LLRS_CAP)) || 2031 ((fec & ETHTOOL_FEC_BASER) && !(fec_cfg & BNXT_FEC_ENC_BASE_R_CAP))) 2032 return -EINVAL; 2033 2034 if (fec & ETHTOOL_FEC_AUTO) { 2035 if (!link_info->autoneg) 2036 return -EINVAL; 2037 new_cfg = PORT_PHY_CFG_REQ_FLAGS_FEC_AUTONEG_ENABLE; 2038 } else { 2039 new_cfg = bnxt_ethtool_forced_fec_to_fw(link_info, fec); 2040 } 2041 2042 apply_fec: 2043 rc = hwrm_req_init(bp, req, HWRM_PORT_PHY_CFG); 2044 if (rc) 2045 return rc; 2046 req->flags = cpu_to_le32(new_cfg | PORT_PHY_CFG_REQ_FLAGS_RESET_PHY); 2047 rc = hwrm_req_send(bp, req); 2048 /* update current settings */ 2049 if (!rc) { 2050 mutex_lock(&bp->link_lock); 2051 bnxt_update_link(bp, false); 2052 mutex_unlock(&bp->link_lock); 2053 } 2054 return rc; 2055 } 2056 2057 static void bnxt_get_pauseparam(struct net_device *dev, 2058 struct ethtool_pauseparam *epause) 2059 { 2060 struct bnxt *bp = netdev_priv(dev); 2061 struct bnxt_link_info *link_info = &bp->link_info; 2062 2063 if (BNXT_VF(bp)) 2064 return; 2065 epause->autoneg = !!(link_info->autoneg & BNXT_AUTONEG_FLOW_CTRL); 2066 epause->rx_pause = !!(link_info->req_flow_ctrl & BNXT_LINK_PAUSE_RX); 2067 epause->tx_pause = !!(link_info->req_flow_ctrl & BNXT_LINK_PAUSE_TX); 2068 } 2069 2070 static void bnxt_get_pause_stats(struct net_device *dev, 2071 struct ethtool_pause_stats *epstat) 2072 { 2073 struct bnxt *bp = netdev_priv(dev); 2074 u64 *rx, *tx; 2075 2076 if (BNXT_VF(bp) || !(bp->flags & BNXT_FLAG_PORT_STATS)) 2077 return; 2078 2079 rx = bp->port_stats.sw_stats; 2080 tx = bp->port_stats.sw_stats + BNXT_TX_PORT_STATS_BYTE_OFFSET / 8; 2081 2082 epstat->rx_pause_frames = BNXT_GET_RX_PORT_STATS64(rx, rx_pause_frames); 2083 epstat->tx_pause_frames = BNXT_GET_TX_PORT_STATS64(tx, tx_pause_frames); 2084 } 2085 2086 static int bnxt_set_pauseparam(struct net_device *dev, 2087 struct ethtool_pauseparam *epause) 2088 { 2089 int rc = 0; 2090 struct bnxt *bp = netdev_priv(dev); 2091 struct bnxt_link_info *link_info = &bp->link_info; 2092 2093 if (!BNXT_PHY_CFG_ABLE(bp)) 2094 return -EOPNOTSUPP; 2095 2096 mutex_lock(&bp->link_lock); 2097 if (epause->autoneg) { 2098 if (!(link_info->autoneg & BNXT_AUTONEG_SPEED)) { 2099 rc = -EINVAL; 2100 goto pause_exit; 2101 } 2102 2103 link_info->autoneg |= BNXT_AUTONEG_FLOW_CTRL; 2104 if (bp->hwrm_spec_code >= 0x10201) 2105 link_info->req_flow_ctrl = 2106 PORT_PHY_CFG_REQ_AUTO_PAUSE_AUTONEG_PAUSE; 2107 } else { 2108 /* when transition from auto pause to force pause, 2109 * force a link change 2110 */ 2111 if (link_info->autoneg & BNXT_AUTONEG_FLOW_CTRL) 2112 link_info->force_link_chng = true; 2113 link_info->autoneg &= ~BNXT_AUTONEG_FLOW_CTRL; 2114 link_info->req_flow_ctrl = 0; 2115 } 2116 if (epause->rx_pause) 2117 link_info->req_flow_ctrl |= BNXT_LINK_PAUSE_RX; 2118 2119 if (epause->tx_pause) 2120 link_info->req_flow_ctrl |= BNXT_LINK_PAUSE_TX; 2121 2122 if (netif_running(dev)) 2123 rc = bnxt_hwrm_set_pause(bp); 2124 2125 pause_exit: 2126 mutex_unlock(&bp->link_lock); 2127 return rc; 2128 } 2129 2130 static u32 bnxt_get_link(struct net_device *dev) 2131 { 2132 struct bnxt *bp = netdev_priv(dev); 2133 2134 /* TODO: handle MF, VF, driver close case */ 2135 return bp->link_info.link_up; 2136 } 2137 2138 int bnxt_hwrm_nvm_get_dev_info(struct bnxt *bp, 2139 struct hwrm_nvm_get_dev_info_output *nvm_dev_info) 2140 { 2141 struct hwrm_nvm_get_dev_info_output *resp; 2142 struct hwrm_nvm_get_dev_info_input *req; 2143 int rc; 2144 2145 if (BNXT_VF(bp)) 2146 return -EOPNOTSUPP; 2147 2148 rc = hwrm_req_init(bp, req, HWRM_NVM_GET_DEV_INFO); 2149 if (rc) 2150 return rc; 2151 2152 resp = hwrm_req_hold(bp, req); 2153 rc = hwrm_req_send(bp, req); 2154 if (!rc) 2155 memcpy(nvm_dev_info, resp, sizeof(*resp)); 2156 hwrm_req_drop(bp, req); 2157 return rc; 2158 } 2159 2160 static void bnxt_print_admin_err(struct bnxt *bp) 2161 { 2162 netdev_info(bp->dev, "PF does not have admin privileges to flash or reset the device\n"); 2163 } 2164 2165 static int bnxt_find_nvram_item(struct net_device *dev, u16 type, u16 ordinal, 2166 u16 ext, u16 *index, u32 *item_length, 2167 u32 *data_length); 2168 2169 static int bnxt_flash_nvram(struct net_device *dev, u16 dir_type, 2170 u16 dir_ordinal, u16 dir_ext, u16 dir_attr, 2171 u32 dir_item_len, const u8 *data, 2172 size_t data_len) 2173 { 2174 struct bnxt *bp = netdev_priv(dev); 2175 struct hwrm_nvm_write_input *req; 2176 int rc; 2177 2178 rc = hwrm_req_init(bp, req, HWRM_NVM_WRITE); 2179 if (rc) 2180 return rc; 2181 2182 if (data_len && data) { 2183 dma_addr_t dma_handle; 2184 u8 *kmem; 2185 2186 kmem = hwrm_req_dma_slice(bp, req, data_len, &dma_handle); 2187 if (!kmem) { 2188 hwrm_req_drop(bp, req); 2189 return -ENOMEM; 2190 } 2191 2192 req->dir_data_length = cpu_to_le32(data_len); 2193 2194 memcpy(kmem, data, data_len); 2195 req->host_src_addr = cpu_to_le64(dma_handle); 2196 } 2197 2198 hwrm_req_timeout(bp, req, bp->hwrm_cmd_max_timeout); 2199 req->dir_type = cpu_to_le16(dir_type); 2200 req->dir_ordinal = cpu_to_le16(dir_ordinal); 2201 req->dir_ext = cpu_to_le16(dir_ext); 2202 req->dir_attr = cpu_to_le16(dir_attr); 2203 req->dir_item_length = cpu_to_le32(dir_item_len); 2204 rc = hwrm_req_send(bp, req); 2205 2206 if (rc == -EACCES) 2207 bnxt_print_admin_err(bp); 2208 return rc; 2209 } 2210 2211 int bnxt_hwrm_firmware_reset(struct net_device *dev, u8 proc_type, 2212 u8 self_reset, u8 flags) 2213 { 2214 struct bnxt *bp = netdev_priv(dev); 2215 struct hwrm_fw_reset_input *req; 2216 int rc; 2217 2218 if (!bnxt_hwrm_reset_permitted(bp)) { 2219 netdev_warn(bp->dev, "Reset denied by firmware, it may be inhibited by remote driver"); 2220 return -EPERM; 2221 } 2222 2223 rc = hwrm_req_init(bp, req, HWRM_FW_RESET); 2224 if (rc) 2225 return rc; 2226 2227 req->embedded_proc_type = proc_type; 2228 req->selfrst_status = self_reset; 2229 req->flags = flags; 2230 2231 if (proc_type == FW_RESET_REQ_EMBEDDED_PROC_TYPE_AP) { 2232 rc = hwrm_req_send_silent(bp, req); 2233 } else { 2234 rc = hwrm_req_send(bp, req); 2235 if (rc == -EACCES) 2236 bnxt_print_admin_err(bp); 2237 } 2238 return rc; 2239 } 2240 2241 static int bnxt_firmware_reset(struct net_device *dev, 2242 enum bnxt_nvm_directory_type dir_type) 2243 { 2244 u8 self_reset = FW_RESET_REQ_SELFRST_STATUS_SELFRSTNONE; 2245 u8 proc_type, flags = 0; 2246 2247 /* TODO: Address self-reset of APE/KONG/BONO/TANG or ungraceful reset */ 2248 /* (e.g. when firmware isn't already running) */ 2249 switch (dir_type) { 2250 case BNX_DIR_TYPE_CHIMP_PATCH: 2251 case BNX_DIR_TYPE_BOOTCODE: 2252 case BNX_DIR_TYPE_BOOTCODE_2: 2253 proc_type = FW_RESET_REQ_EMBEDDED_PROC_TYPE_BOOT; 2254 /* Self-reset ChiMP upon next PCIe reset: */ 2255 self_reset = FW_RESET_REQ_SELFRST_STATUS_SELFRSTPCIERST; 2256 break; 2257 case BNX_DIR_TYPE_APE_FW: 2258 case BNX_DIR_TYPE_APE_PATCH: 2259 proc_type = FW_RESET_REQ_EMBEDDED_PROC_TYPE_MGMT; 2260 /* Self-reset APE upon next PCIe reset: */ 2261 self_reset = FW_RESET_REQ_SELFRST_STATUS_SELFRSTPCIERST; 2262 break; 2263 case BNX_DIR_TYPE_KONG_FW: 2264 case BNX_DIR_TYPE_KONG_PATCH: 2265 proc_type = FW_RESET_REQ_EMBEDDED_PROC_TYPE_NETCTRL; 2266 break; 2267 case BNX_DIR_TYPE_BONO_FW: 2268 case BNX_DIR_TYPE_BONO_PATCH: 2269 proc_type = FW_RESET_REQ_EMBEDDED_PROC_TYPE_ROCE; 2270 break; 2271 default: 2272 return -EINVAL; 2273 } 2274 2275 return bnxt_hwrm_firmware_reset(dev, proc_type, self_reset, flags); 2276 } 2277 2278 static int bnxt_firmware_reset_chip(struct net_device *dev) 2279 { 2280 struct bnxt *bp = netdev_priv(dev); 2281 u8 flags = 0; 2282 2283 if (bp->fw_cap & BNXT_FW_CAP_HOT_RESET) 2284 flags = FW_RESET_REQ_FLAGS_RESET_GRACEFUL; 2285 2286 return bnxt_hwrm_firmware_reset(dev, 2287 FW_RESET_REQ_EMBEDDED_PROC_TYPE_CHIP, 2288 FW_RESET_REQ_SELFRST_STATUS_SELFRSTASAP, 2289 flags); 2290 } 2291 2292 static int bnxt_firmware_reset_ap(struct net_device *dev) 2293 { 2294 return bnxt_hwrm_firmware_reset(dev, FW_RESET_REQ_EMBEDDED_PROC_TYPE_AP, 2295 FW_RESET_REQ_SELFRST_STATUS_SELFRSTNONE, 2296 0); 2297 } 2298 2299 static int bnxt_flash_firmware(struct net_device *dev, 2300 u16 dir_type, 2301 const u8 *fw_data, 2302 size_t fw_size) 2303 { 2304 int rc = 0; 2305 u16 code_type; 2306 u32 stored_crc; 2307 u32 calculated_crc; 2308 struct bnxt_fw_header *header = (struct bnxt_fw_header *)fw_data; 2309 2310 switch (dir_type) { 2311 case BNX_DIR_TYPE_BOOTCODE: 2312 case BNX_DIR_TYPE_BOOTCODE_2: 2313 code_type = CODE_BOOT; 2314 break; 2315 case BNX_DIR_TYPE_CHIMP_PATCH: 2316 code_type = CODE_CHIMP_PATCH; 2317 break; 2318 case BNX_DIR_TYPE_APE_FW: 2319 code_type = CODE_MCTP_PASSTHRU; 2320 break; 2321 case BNX_DIR_TYPE_APE_PATCH: 2322 code_type = CODE_APE_PATCH; 2323 break; 2324 case BNX_DIR_TYPE_KONG_FW: 2325 code_type = CODE_KONG_FW; 2326 break; 2327 case BNX_DIR_TYPE_KONG_PATCH: 2328 code_type = CODE_KONG_PATCH; 2329 break; 2330 case BNX_DIR_TYPE_BONO_FW: 2331 code_type = CODE_BONO_FW; 2332 break; 2333 case BNX_DIR_TYPE_BONO_PATCH: 2334 code_type = CODE_BONO_PATCH; 2335 break; 2336 default: 2337 netdev_err(dev, "Unsupported directory entry type: %u\n", 2338 dir_type); 2339 return -EINVAL; 2340 } 2341 if (fw_size < sizeof(struct bnxt_fw_header)) { 2342 netdev_err(dev, "Invalid firmware file size: %u\n", 2343 (unsigned int)fw_size); 2344 return -EINVAL; 2345 } 2346 if (header->signature != cpu_to_le32(BNXT_FIRMWARE_BIN_SIGNATURE)) { 2347 netdev_err(dev, "Invalid firmware signature: %08X\n", 2348 le32_to_cpu(header->signature)); 2349 return -EINVAL; 2350 } 2351 if (header->code_type != code_type) { 2352 netdev_err(dev, "Expected firmware type: %d, read: %d\n", 2353 code_type, header->code_type); 2354 return -EINVAL; 2355 } 2356 if (header->device != DEVICE_CUMULUS_FAMILY) { 2357 netdev_err(dev, "Expected firmware device family %d, read: %d\n", 2358 DEVICE_CUMULUS_FAMILY, header->device); 2359 return -EINVAL; 2360 } 2361 /* Confirm the CRC32 checksum of the file: */ 2362 stored_crc = le32_to_cpu(*(__le32 *)(fw_data + fw_size - 2363 sizeof(stored_crc))); 2364 calculated_crc = ~crc32(~0, fw_data, fw_size - sizeof(stored_crc)); 2365 if (calculated_crc != stored_crc) { 2366 netdev_err(dev, "Firmware file CRC32 checksum (%08lX) does not match calculated checksum (%08lX)\n", 2367 (unsigned long)stored_crc, 2368 (unsigned long)calculated_crc); 2369 return -EINVAL; 2370 } 2371 rc = bnxt_flash_nvram(dev, dir_type, BNX_DIR_ORDINAL_FIRST, 2372 0, 0, 0, fw_data, fw_size); 2373 if (rc == 0) /* Firmware update successful */ 2374 rc = bnxt_firmware_reset(dev, dir_type); 2375 2376 return rc; 2377 } 2378 2379 static int bnxt_flash_microcode(struct net_device *dev, 2380 u16 dir_type, 2381 const u8 *fw_data, 2382 size_t fw_size) 2383 { 2384 struct bnxt_ucode_trailer *trailer; 2385 u32 calculated_crc; 2386 u32 stored_crc; 2387 int rc = 0; 2388 2389 if (fw_size < sizeof(struct bnxt_ucode_trailer)) { 2390 netdev_err(dev, "Invalid microcode file size: %u\n", 2391 (unsigned int)fw_size); 2392 return -EINVAL; 2393 } 2394 trailer = (struct bnxt_ucode_trailer *)(fw_data + (fw_size - 2395 sizeof(*trailer))); 2396 if (trailer->sig != cpu_to_le32(BNXT_UCODE_TRAILER_SIGNATURE)) { 2397 netdev_err(dev, "Invalid microcode trailer signature: %08X\n", 2398 le32_to_cpu(trailer->sig)); 2399 return -EINVAL; 2400 } 2401 if (le16_to_cpu(trailer->dir_type) != dir_type) { 2402 netdev_err(dev, "Expected microcode type: %d, read: %d\n", 2403 dir_type, le16_to_cpu(trailer->dir_type)); 2404 return -EINVAL; 2405 } 2406 if (le16_to_cpu(trailer->trailer_length) < 2407 sizeof(struct bnxt_ucode_trailer)) { 2408 netdev_err(dev, "Invalid microcode trailer length: %d\n", 2409 le16_to_cpu(trailer->trailer_length)); 2410 return -EINVAL; 2411 } 2412 2413 /* Confirm the CRC32 checksum of the file: */ 2414 stored_crc = le32_to_cpu(*(__le32 *)(fw_data + fw_size - 2415 sizeof(stored_crc))); 2416 calculated_crc = ~crc32(~0, fw_data, fw_size - sizeof(stored_crc)); 2417 if (calculated_crc != stored_crc) { 2418 netdev_err(dev, 2419 "CRC32 (%08lX) does not match calculated: %08lX\n", 2420 (unsigned long)stored_crc, 2421 (unsigned long)calculated_crc); 2422 return -EINVAL; 2423 } 2424 rc = bnxt_flash_nvram(dev, dir_type, BNX_DIR_ORDINAL_FIRST, 2425 0, 0, 0, fw_data, fw_size); 2426 2427 return rc; 2428 } 2429 2430 static bool bnxt_dir_type_is_ape_bin_format(u16 dir_type) 2431 { 2432 switch (dir_type) { 2433 case BNX_DIR_TYPE_CHIMP_PATCH: 2434 case BNX_DIR_TYPE_BOOTCODE: 2435 case BNX_DIR_TYPE_BOOTCODE_2: 2436 case BNX_DIR_TYPE_APE_FW: 2437 case BNX_DIR_TYPE_APE_PATCH: 2438 case BNX_DIR_TYPE_KONG_FW: 2439 case BNX_DIR_TYPE_KONG_PATCH: 2440 case BNX_DIR_TYPE_BONO_FW: 2441 case BNX_DIR_TYPE_BONO_PATCH: 2442 return true; 2443 } 2444 2445 return false; 2446 } 2447 2448 static bool bnxt_dir_type_is_other_exec_format(u16 dir_type) 2449 { 2450 switch (dir_type) { 2451 case BNX_DIR_TYPE_AVS: 2452 case BNX_DIR_TYPE_EXP_ROM_MBA: 2453 case BNX_DIR_TYPE_PCIE: 2454 case BNX_DIR_TYPE_TSCF_UCODE: 2455 case BNX_DIR_TYPE_EXT_PHY: 2456 case BNX_DIR_TYPE_CCM: 2457 case BNX_DIR_TYPE_ISCSI_BOOT: 2458 case BNX_DIR_TYPE_ISCSI_BOOT_IPV6: 2459 case BNX_DIR_TYPE_ISCSI_BOOT_IPV4N6: 2460 return true; 2461 } 2462 2463 return false; 2464 } 2465 2466 static bool bnxt_dir_type_is_executable(u16 dir_type) 2467 { 2468 return bnxt_dir_type_is_ape_bin_format(dir_type) || 2469 bnxt_dir_type_is_other_exec_format(dir_type); 2470 } 2471 2472 static int bnxt_flash_firmware_from_file(struct net_device *dev, 2473 u16 dir_type, 2474 const char *filename) 2475 { 2476 const struct firmware *fw; 2477 int rc; 2478 2479 rc = request_firmware(&fw, filename, &dev->dev); 2480 if (rc != 0) { 2481 netdev_err(dev, "Error %d requesting firmware file: %s\n", 2482 rc, filename); 2483 return rc; 2484 } 2485 if (bnxt_dir_type_is_ape_bin_format(dir_type)) 2486 rc = bnxt_flash_firmware(dev, dir_type, fw->data, fw->size); 2487 else if (bnxt_dir_type_is_other_exec_format(dir_type)) 2488 rc = bnxt_flash_microcode(dev, dir_type, fw->data, fw->size); 2489 else 2490 rc = bnxt_flash_nvram(dev, dir_type, BNX_DIR_ORDINAL_FIRST, 2491 0, 0, 0, fw->data, fw->size); 2492 release_firmware(fw); 2493 return rc; 2494 } 2495 2496 #define BNXT_PKG_DMA_SIZE 0x40000 2497 #define BNXT_NVM_MORE_FLAG (cpu_to_le16(NVM_MODIFY_REQ_FLAGS_BATCH_MODE)) 2498 #define BNXT_NVM_LAST_FLAG (cpu_to_le16(NVM_MODIFY_REQ_FLAGS_BATCH_LAST)) 2499 2500 int bnxt_flash_package_from_fw_obj(struct net_device *dev, const struct firmware *fw, 2501 u32 install_type) 2502 { 2503 struct hwrm_nvm_install_update_input *install; 2504 struct hwrm_nvm_install_update_output *resp; 2505 struct hwrm_nvm_modify_input *modify; 2506 struct bnxt *bp = netdev_priv(dev); 2507 bool defrag_attempted = false; 2508 dma_addr_t dma_handle; 2509 u8 *kmem = NULL; 2510 u32 modify_len; 2511 u32 item_len; 2512 u16 index; 2513 int rc; 2514 2515 bnxt_hwrm_fw_set_time(bp); 2516 2517 rc = hwrm_req_init(bp, modify, HWRM_NVM_MODIFY); 2518 if (rc) 2519 return rc; 2520 2521 /* Try allocating a large DMA buffer first. Older fw will 2522 * cause excessive NVRAM erases when using small blocks. 2523 */ 2524 modify_len = roundup_pow_of_two(fw->size); 2525 modify_len = min_t(u32, modify_len, BNXT_PKG_DMA_SIZE); 2526 while (1) { 2527 kmem = hwrm_req_dma_slice(bp, modify, modify_len, &dma_handle); 2528 if (!kmem && modify_len > PAGE_SIZE) 2529 modify_len /= 2; 2530 else 2531 break; 2532 } 2533 if (!kmem) { 2534 hwrm_req_drop(bp, modify); 2535 return -ENOMEM; 2536 } 2537 2538 rc = hwrm_req_init(bp, install, HWRM_NVM_INSTALL_UPDATE); 2539 if (rc) { 2540 hwrm_req_drop(bp, modify); 2541 return rc; 2542 } 2543 2544 hwrm_req_timeout(bp, modify, bp->hwrm_cmd_max_timeout); 2545 hwrm_req_timeout(bp, install, bp->hwrm_cmd_max_timeout); 2546 2547 hwrm_req_hold(bp, modify); 2548 modify->host_src_addr = cpu_to_le64(dma_handle); 2549 2550 resp = hwrm_req_hold(bp, install); 2551 if ((install_type & 0xffff) == 0) 2552 install_type >>= 16; 2553 install->install_type = cpu_to_le32(install_type); 2554 2555 do { 2556 u32 copied = 0, len = modify_len; 2557 2558 rc = bnxt_find_nvram_item(dev, BNX_DIR_TYPE_UPDATE, 2559 BNX_DIR_ORDINAL_FIRST, 2560 BNX_DIR_EXT_NONE, 2561 &index, &item_len, NULL); 2562 if (rc) { 2563 netdev_err(dev, "PKG update area not created in nvram\n"); 2564 break; 2565 } 2566 if (fw->size > item_len) { 2567 netdev_err(dev, "PKG insufficient update area in nvram: %lu\n", 2568 (unsigned long)fw->size); 2569 rc = -EFBIG; 2570 break; 2571 } 2572 2573 modify->dir_idx = cpu_to_le16(index); 2574 2575 if (fw->size > modify_len) 2576 modify->flags = BNXT_NVM_MORE_FLAG; 2577 while (copied < fw->size) { 2578 u32 balance = fw->size - copied; 2579 2580 if (balance <= modify_len) { 2581 len = balance; 2582 if (copied) 2583 modify->flags |= BNXT_NVM_LAST_FLAG; 2584 } 2585 memcpy(kmem, fw->data + copied, len); 2586 modify->len = cpu_to_le32(len); 2587 modify->offset = cpu_to_le32(copied); 2588 rc = hwrm_req_send(bp, modify); 2589 if (rc) 2590 goto pkg_abort; 2591 copied += len; 2592 } 2593 2594 rc = hwrm_req_send_silent(bp, install); 2595 2596 if (defrag_attempted) { 2597 /* We have tried to defragment already in the previous 2598 * iteration. Return with the result for INSTALL_UPDATE 2599 */ 2600 break; 2601 } 2602 2603 if (rc && ((struct hwrm_err_output *)resp)->cmd_err == 2604 NVM_INSTALL_UPDATE_CMD_ERR_CODE_FRAG_ERR) { 2605 install->flags = 2606 cpu_to_le16(NVM_INSTALL_UPDATE_REQ_FLAGS_ALLOWED_TO_DEFRAG); 2607 2608 rc = hwrm_req_send_silent(bp, install); 2609 2610 if (rc && ((struct hwrm_err_output *)resp)->cmd_err == 2611 NVM_INSTALL_UPDATE_CMD_ERR_CODE_NO_SPACE) { 2612 /* FW has cleared NVM area, driver will create 2613 * UPDATE directory and try the flash again 2614 */ 2615 defrag_attempted = true; 2616 install->flags = 0; 2617 rc = bnxt_flash_nvram(bp->dev, 2618 BNX_DIR_TYPE_UPDATE, 2619 BNX_DIR_ORDINAL_FIRST, 2620 0, 0, item_len, NULL, 0); 2621 } else if (rc) { 2622 netdev_err(dev, "HWRM_NVM_INSTALL_UPDATE failure rc :%x\n", rc); 2623 } 2624 } else if (rc) { 2625 netdev_err(dev, "HWRM_NVM_INSTALL_UPDATE failure rc :%x\n", rc); 2626 } 2627 } while (defrag_attempted && !rc); 2628 2629 pkg_abort: 2630 hwrm_req_drop(bp, modify); 2631 hwrm_req_drop(bp, install); 2632 2633 if (resp->result) { 2634 netdev_err(dev, "PKG install error = %d, problem_item = %d\n", 2635 (s8)resp->result, (int)resp->problem_item); 2636 rc = -ENOPKG; 2637 } 2638 if (rc == -EACCES) 2639 bnxt_print_admin_err(bp); 2640 return rc; 2641 } 2642 2643 static int bnxt_flash_package_from_file(struct net_device *dev, const char *filename, 2644 u32 install_type) 2645 { 2646 const struct firmware *fw; 2647 int rc; 2648 2649 rc = request_firmware(&fw, filename, &dev->dev); 2650 if (rc != 0) { 2651 netdev_err(dev, "PKG error %d requesting file: %s\n", 2652 rc, filename); 2653 return rc; 2654 } 2655 2656 rc = bnxt_flash_package_from_fw_obj(dev, fw, install_type); 2657 2658 release_firmware(fw); 2659 2660 return rc; 2661 } 2662 2663 static int bnxt_flash_device(struct net_device *dev, 2664 struct ethtool_flash *flash) 2665 { 2666 if (!BNXT_PF((struct bnxt *)netdev_priv(dev))) { 2667 netdev_err(dev, "flashdev not supported from a virtual function\n"); 2668 return -EINVAL; 2669 } 2670 2671 if (flash->region == ETHTOOL_FLASH_ALL_REGIONS || 2672 flash->region > 0xffff) 2673 return bnxt_flash_package_from_file(dev, flash->data, 2674 flash->region); 2675 2676 return bnxt_flash_firmware_from_file(dev, flash->region, flash->data); 2677 } 2678 2679 static int nvm_get_dir_info(struct net_device *dev, u32 *entries, u32 *length) 2680 { 2681 struct hwrm_nvm_get_dir_info_output *output; 2682 struct hwrm_nvm_get_dir_info_input *req; 2683 struct bnxt *bp = netdev_priv(dev); 2684 int rc; 2685 2686 rc = hwrm_req_init(bp, req, HWRM_NVM_GET_DIR_INFO); 2687 if (rc) 2688 return rc; 2689 2690 output = hwrm_req_hold(bp, req); 2691 rc = hwrm_req_send(bp, req); 2692 if (!rc) { 2693 *entries = le32_to_cpu(output->entries); 2694 *length = le32_to_cpu(output->entry_length); 2695 } 2696 hwrm_req_drop(bp, req); 2697 return rc; 2698 } 2699 2700 static int bnxt_get_eeprom_len(struct net_device *dev) 2701 { 2702 struct bnxt *bp = netdev_priv(dev); 2703 2704 if (BNXT_VF(bp)) 2705 return 0; 2706 2707 /* The -1 return value allows the entire 32-bit range of offsets to be 2708 * passed via the ethtool command-line utility. 2709 */ 2710 return -1; 2711 } 2712 2713 static int bnxt_get_nvram_directory(struct net_device *dev, u32 len, u8 *data) 2714 { 2715 struct bnxt *bp = netdev_priv(dev); 2716 int rc; 2717 u32 dir_entries; 2718 u32 entry_length; 2719 u8 *buf; 2720 size_t buflen; 2721 dma_addr_t dma_handle; 2722 struct hwrm_nvm_get_dir_entries_input *req; 2723 2724 rc = nvm_get_dir_info(dev, &dir_entries, &entry_length); 2725 if (rc != 0) 2726 return rc; 2727 2728 if (!dir_entries || !entry_length) 2729 return -EIO; 2730 2731 /* Insert 2 bytes of directory info (count and size of entries) */ 2732 if (len < 2) 2733 return -EINVAL; 2734 2735 *data++ = dir_entries; 2736 *data++ = entry_length; 2737 len -= 2; 2738 memset(data, 0xff, len); 2739 2740 rc = hwrm_req_init(bp, req, HWRM_NVM_GET_DIR_ENTRIES); 2741 if (rc) 2742 return rc; 2743 2744 buflen = dir_entries * entry_length; 2745 buf = hwrm_req_dma_slice(bp, req, buflen, &dma_handle); 2746 if (!buf) { 2747 hwrm_req_drop(bp, req); 2748 return -ENOMEM; 2749 } 2750 req->host_dest_addr = cpu_to_le64(dma_handle); 2751 2752 hwrm_req_hold(bp, req); /* hold the slice */ 2753 rc = hwrm_req_send(bp, req); 2754 if (rc == 0) 2755 memcpy(data, buf, len > buflen ? buflen : len); 2756 hwrm_req_drop(bp, req); 2757 return rc; 2758 } 2759 2760 static int bnxt_get_nvram_item(struct net_device *dev, u32 index, u32 offset, 2761 u32 length, u8 *data) 2762 { 2763 struct bnxt *bp = netdev_priv(dev); 2764 int rc; 2765 u8 *buf; 2766 dma_addr_t dma_handle; 2767 struct hwrm_nvm_read_input *req; 2768 2769 if (!length) 2770 return -EINVAL; 2771 2772 rc = hwrm_req_init(bp, req, HWRM_NVM_READ); 2773 if (rc) 2774 return rc; 2775 2776 buf = hwrm_req_dma_slice(bp, req, length, &dma_handle); 2777 if (!buf) { 2778 hwrm_req_drop(bp, req); 2779 return -ENOMEM; 2780 } 2781 2782 req->host_dest_addr = cpu_to_le64(dma_handle); 2783 req->dir_idx = cpu_to_le16(index); 2784 req->offset = cpu_to_le32(offset); 2785 req->len = cpu_to_le32(length); 2786 2787 hwrm_req_hold(bp, req); /* hold the slice */ 2788 rc = hwrm_req_send(bp, req); 2789 if (rc == 0) 2790 memcpy(data, buf, length); 2791 hwrm_req_drop(bp, req); 2792 return rc; 2793 } 2794 2795 static int bnxt_find_nvram_item(struct net_device *dev, u16 type, u16 ordinal, 2796 u16 ext, u16 *index, u32 *item_length, 2797 u32 *data_length) 2798 { 2799 struct hwrm_nvm_find_dir_entry_output *output; 2800 struct hwrm_nvm_find_dir_entry_input *req; 2801 struct bnxt *bp = netdev_priv(dev); 2802 int rc; 2803 2804 rc = hwrm_req_init(bp, req, HWRM_NVM_FIND_DIR_ENTRY); 2805 if (rc) 2806 return rc; 2807 2808 req->enables = 0; 2809 req->dir_idx = 0; 2810 req->dir_type = cpu_to_le16(type); 2811 req->dir_ordinal = cpu_to_le16(ordinal); 2812 req->dir_ext = cpu_to_le16(ext); 2813 req->opt_ordinal = NVM_FIND_DIR_ENTRY_REQ_OPT_ORDINAL_EQ; 2814 output = hwrm_req_hold(bp, req); 2815 rc = hwrm_req_send_silent(bp, req); 2816 if (rc == 0) { 2817 if (index) 2818 *index = le16_to_cpu(output->dir_idx); 2819 if (item_length) 2820 *item_length = le32_to_cpu(output->dir_item_length); 2821 if (data_length) 2822 *data_length = le32_to_cpu(output->dir_data_length); 2823 } 2824 hwrm_req_drop(bp, req); 2825 return rc; 2826 } 2827 2828 static char *bnxt_parse_pkglog(int desired_field, u8 *data, size_t datalen) 2829 { 2830 char *retval = NULL; 2831 char *p; 2832 char *value; 2833 int field = 0; 2834 2835 if (datalen < 1) 2836 return NULL; 2837 /* null-terminate the log data (removing last '\n'): */ 2838 data[datalen - 1] = 0; 2839 for (p = data; *p != 0; p++) { 2840 field = 0; 2841 retval = NULL; 2842 while (*p != 0 && *p != '\n') { 2843 value = p; 2844 while (*p != 0 && *p != '\t' && *p != '\n') 2845 p++; 2846 if (field == desired_field) 2847 retval = value; 2848 if (*p != '\t') 2849 break; 2850 *p = 0; 2851 field++; 2852 p++; 2853 } 2854 if (*p == 0) 2855 break; 2856 *p = 0; 2857 } 2858 return retval; 2859 } 2860 2861 int bnxt_get_pkginfo(struct net_device *dev, char *ver, int size) 2862 { 2863 struct bnxt *bp = netdev_priv(dev); 2864 u16 index = 0; 2865 char *pkgver; 2866 u32 pkglen; 2867 u8 *pkgbuf; 2868 int rc; 2869 2870 rc = bnxt_find_nvram_item(dev, BNX_DIR_TYPE_PKG_LOG, 2871 BNX_DIR_ORDINAL_FIRST, BNX_DIR_EXT_NONE, 2872 &index, NULL, &pkglen); 2873 if (rc) 2874 return rc; 2875 2876 pkgbuf = kzalloc(pkglen, GFP_KERNEL); 2877 if (!pkgbuf) { 2878 dev_err(&bp->pdev->dev, "Unable to allocate memory for pkg version, length = %u\n", 2879 pkglen); 2880 return -ENOMEM; 2881 } 2882 2883 rc = bnxt_get_nvram_item(dev, index, 0, pkglen, pkgbuf); 2884 if (rc) 2885 goto err; 2886 2887 pkgver = bnxt_parse_pkglog(BNX_PKG_LOG_FIELD_IDX_PKG_VERSION, pkgbuf, 2888 pkglen); 2889 if (pkgver && *pkgver != 0 && isdigit(*pkgver)) 2890 strscpy(ver, pkgver, size); 2891 else 2892 rc = -ENOENT; 2893 2894 err: 2895 kfree(pkgbuf); 2896 2897 return rc; 2898 } 2899 2900 static void bnxt_get_pkgver(struct net_device *dev) 2901 { 2902 struct bnxt *bp = netdev_priv(dev); 2903 char buf[FW_VER_STR_LEN]; 2904 int len; 2905 2906 if (!bnxt_get_pkginfo(dev, buf, sizeof(buf))) { 2907 len = strlen(bp->fw_ver_str); 2908 snprintf(bp->fw_ver_str + len, FW_VER_STR_LEN - len - 1, 2909 "/pkg %s", buf); 2910 } 2911 } 2912 2913 static int bnxt_get_eeprom(struct net_device *dev, 2914 struct ethtool_eeprom *eeprom, 2915 u8 *data) 2916 { 2917 u32 index; 2918 u32 offset; 2919 2920 if (eeprom->offset == 0) /* special offset value to get directory */ 2921 return bnxt_get_nvram_directory(dev, eeprom->len, data); 2922 2923 index = eeprom->offset >> 24; 2924 offset = eeprom->offset & 0xffffff; 2925 2926 if (index == 0) { 2927 netdev_err(dev, "unsupported index value: %d\n", index); 2928 return -EINVAL; 2929 } 2930 2931 return bnxt_get_nvram_item(dev, index - 1, offset, eeprom->len, data); 2932 } 2933 2934 static int bnxt_erase_nvram_directory(struct net_device *dev, u8 index) 2935 { 2936 struct hwrm_nvm_erase_dir_entry_input *req; 2937 struct bnxt *bp = netdev_priv(dev); 2938 int rc; 2939 2940 rc = hwrm_req_init(bp, req, HWRM_NVM_ERASE_DIR_ENTRY); 2941 if (rc) 2942 return rc; 2943 2944 req->dir_idx = cpu_to_le16(index); 2945 return hwrm_req_send(bp, req); 2946 } 2947 2948 static int bnxt_set_eeprom(struct net_device *dev, 2949 struct ethtool_eeprom *eeprom, 2950 u8 *data) 2951 { 2952 struct bnxt *bp = netdev_priv(dev); 2953 u8 index, dir_op; 2954 u16 type, ext, ordinal, attr; 2955 2956 if (!BNXT_PF(bp)) { 2957 netdev_err(dev, "NVM write not supported from a virtual function\n"); 2958 return -EINVAL; 2959 } 2960 2961 type = eeprom->magic >> 16; 2962 2963 if (type == 0xffff) { /* special value for directory operations */ 2964 index = eeprom->magic & 0xff; 2965 dir_op = eeprom->magic >> 8; 2966 if (index == 0) 2967 return -EINVAL; 2968 switch (dir_op) { 2969 case 0x0e: /* erase */ 2970 if (eeprom->offset != ~eeprom->magic) 2971 return -EINVAL; 2972 return bnxt_erase_nvram_directory(dev, index - 1); 2973 default: 2974 return -EINVAL; 2975 } 2976 } 2977 2978 /* Create or re-write an NVM item: */ 2979 if (bnxt_dir_type_is_executable(type)) 2980 return -EOPNOTSUPP; 2981 ext = eeprom->magic & 0xffff; 2982 ordinal = eeprom->offset >> 16; 2983 attr = eeprom->offset & 0xffff; 2984 2985 return bnxt_flash_nvram(dev, type, ordinal, ext, attr, 0, data, 2986 eeprom->len); 2987 } 2988 2989 static int bnxt_set_eee(struct net_device *dev, struct ethtool_eee *edata) 2990 { 2991 struct bnxt *bp = netdev_priv(dev); 2992 struct ethtool_eee *eee = &bp->eee; 2993 struct bnxt_link_info *link_info = &bp->link_info; 2994 u32 advertising; 2995 int rc = 0; 2996 2997 if (!BNXT_PHY_CFG_ABLE(bp)) 2998 return -EOPNOTSUPP; 2999 3000 if (!(bp->phy_flags & BNXT_PHY_FL_EEE_CAP)) 3001 return -EOPNOTSUPP; 3002 3003 mutex_lock(&bp->link_lock); 3004 advertising = _bnxt_fw_to_ethtool_adv_spds(link_info->advertising, 0); 3005 if (!edata->eee_enabled) 3006 goto eee_ok; 3007 3008 if (!(link_info->autoneg & BNXT_AUTONEG_SPEED)) { 3009 netdev_warn(dev, "EEE requires autoneg\n"); 3010 rc = -EINVAL; 3011 goto eee_exit; 3012 } 3013 if (edata->tx_lpi_enabled) { 3014 if (bp->lpi_tmr_hi && (edata->tx_lpi_timer > bp->lpi_tmr_hi || 3015 edata->tx_lpi_timer < bp->lpi_tmr_lo)) { 3016 netdev_warn(dev, "Valid LPI timer range is %d and %d microsecs\n", 3017 bp->lpi_tmr_lo, bp->lpi_tmr_hi); 3018 rc = -EINVAL; 3019 goto eee_exit; 3020 } else if (!bp->lpi_tmr_hi) { 3021 edata->tx_lpi_timer = eee->tx_lpi_timer; 3022 } 3023 } 3024 if (!edata->advertised) { 3025 edata->advertised = advertising & eee->supported; 3026 } else if (edata->advertised & ~advertising) { 3027 netdev_warn(dev, "EEE advertised %x must be a subset of autoneg advertised speeds %x\n", 3028 edata->advertised, advertising); 3029 rc = -EINVAL; 3030 goto eee_exit; 3031 } 3032 3033 eee->advertised = edata->advertised; 3034 eee->tx_lpi_enabled = edata->tx_lpi_enabled; 3035 eee->tx_lpi_timer = edata->tx_lpi_timer; 3036 eee_ok: 3037 eee->eee_enabled = edata->eee_enabled; 3038 3039 if (netif_running(dev)) 3040 rc = bnxt_hwrm_set_link_setting(bp, false, true); 3041 3042 eee_exit: 3043 mutex_unlock(&bp->link_lock); 3044 return rc; 3045 } 3046 3047 static int bnxt_get_eee(struct net_device *dev, struct ethtool_eee *edata) 3048 { 3049 struct bnxt *bp = netdev_priv(dev); 3050 3051 if (!(bp->phy_flags & BNXT_PHY_FL_EEE_CAP)) 3052 return -EOPNOTSUPP; 3053 3054 *edata = bp->eee; 3055 if (!bp->eee.eee_enabled) { 3056 /* Preserve tx_lpi_timer so that the last value will be used 3057 * by default when it is re-enabled. 3058 */ 3059 edata->advertised = 0; 3060 edata->tx_lpi_enabled = 0; 3061 } 3062 3063 if (!bp->eee.eee_active) 3064 edata->lp_advertised = 0; 3065 3066 return 0; 3067 } 3068 3069 static int bnxt_read_sfp_module_eeprom_info(struct bnxt *bp, u16 i2c_addr, 3070 u16 page_number, u16 start_addr, 3071 u16 data_length, u8 *buf) 3072 { 3073 struct hwrm_port_phy_i2c_read_output *output; 3074 struct hwrm_port_phy_i2c_read_input *req; 3075 int rc, byte_offset = 0; 3076 3077 rc = hwrm_req_init(bp, req, HWRM_PORT_PHY_I2C_READ); 3078 if (rc) 3079 return rc; 3080 3081 output = hwrm_req_hold(bp, req); 3082 req->i2c_slave_addr = i2c_addr; 3083 req->page_number = cpu_to_le16(page_number); 3084 req->port_id = cpu_to_le16(bp->pf.port_id); 3085 do { 3086 u16 xfer_size; 3087 3088 xfer_size = min_t(u16, data_length, BNXT_MAX_PHY_I2C_RESP_SIZE); 3089 data_length -= xfer_size; 3090 req->page_offset = cpu_to_le16(start_addr + byte_offset); 3091 req->data_length = xfer_size; 3092 req->enables = cpu_to_le32(start_addr + byte_offset ? 3093 PORT_PHY_I2C_READ_REQ_ENABLES_PAGE_OFFSET : 0); 3094 rc = hwrm_req_send(bp, req); 3095 if (!rc) 3096 memcpy(buf + byte_offset, output->data, xfer_size); 3097 byte_offset += xfer_size; 3098 } while (!rc && data_length > 0); 3099 hwrm_req_drop(bp, req); 3100 3101 return rc; 3102 } 3103 3104 static int bnxt_get_module_info(struct net_device *dev, 3105 struct ethtool_modinfo *modinfo) 3106 { 3107 u8 data[SFF_DIAG_SUPPORT_OFFSET + 1]; 3108 struct bnxt *bp = netdev_priv(dev); 3109 int rc; 3110 3111 /* No point in going further if phy status indicates 3112 * module is not inserted or if it is powered down or 3113 * if it is of type 10GBase-T 3114 */ 3115 if (bp->link_info.module_status > 3116 PORT_PHY_QCFG_RESP_MODULE_STATUS_WARNINGMSG) 3117 return -EOPNOTSUPP; 3118 3119 /* This feature is not supported in older firmware versions */ 3120 if (bp->hwrm_spec_code < 0x10202) 3121 return -EOPNOTSUPP; 3122 3123 rc = bnxt_read_sfp_module_eeprom_info(bp, I2C_DEV_ADDR_A0, 0, 0, 3124 SFF_DIAG_SUPPORT_OFFSET + 1, 3125 data); 3126 if (!rc) { 3127 u8 module_id = data[0]; 3128 u8 diag_supported = data[SFF_DIAG_SUPPORT_OFFSET]; 3129 3130 switch (module_id) { 3131 case SFF_MODULE_ID_SFP: 3132 modinfo->type = ETH_MODULE_SFF_8472; 3133 modinfo->eeprom_len = ETH_MODULE_SFF_8472_LEN; 3134 if (!diag_supported) 3135 modinfo->eeprom_len = ETH_MODULE_SFF_8436_LEN; 3136 break; 3137 case SFF_MODULE_ID_QSFP: 3138 case SFF_MODULE_ID_QSFP_PLUS: 3139 modinfo->type = ETH_MODULE_SFF_8436; 3140 modinfo->eeprom_len = ETH_MODULE_SFF_8436_LEN; 3141 break; 3142 case SFF_MODULE_ID_QSFP28: 3143 modinfo->type = ETH_MODULE_SFF_8636; 3144 modinfo->eeprom_len = ETH_MODULE_SFF_8636_LEN; 3145 break; 3146 default: 3147 rc = -EOPNOTSUPP; 3148 break; 3149 } 3150 } 3151 return rc; 3152 } 3153 3154 static int bnxt_get_module_eeprom(struct net_device *dev, 3155 struct ethtool_eeprom *eeprom, 3156 u8 *data) 3157 { 3158 struct bnxt *bp = netdev_priv(dev); 3159 u16 start = eeprom->offset, length = eeprom->len; 3160 int rc = 0; 3161 3162 memset(data, 0, eeprom->len); 3163 3164 /* Read A0 portion of the EEPROM */ 3165 if (start < ETH_MODULE_SFF_8436_LEN) { 3166 if (start + eeprom->len > ETH_MODULE_SFF_8436_LEN) 3167 length = ETH_MODULE_SFF_8436_LEN - start; 3168 rc = bnxt_read_sfp_module_eeprom_info(bp, I2C_DEV_ADDR_A0, 0, 3169 start, length, data); 3170 if (rc) 3171 return rc; 3172 start += length; 3173 data += length; 3174 length = eeprom->len - length; 3175 } 3176 3177 /* Read A2 portion of the EEPROM */ 3178 if (length) { 3179 start -= ETH_MODULE_SFF_8436_LEN; 3180 rc = bnxt_read_sfp_module_eeprom_info(bp, I2C_DEV_ADDR_A2, 0, 3181 start, length, data); 3182 } 3183 return rc; 3184 } 3185 3186 static int bnxt_nway_reset(struct net_device *dev) 3187 { 3188 int rc = 0; 3189 3190 struct bnxt *bp = netdev_priv(dev); 3191 struct bnxt_link_info *link_info = &bp->link_info; 3192 3193 if (!BNXT_PHY_CFG_ABLE(bp)) 3194 return -EOPNOTSUPP; 3195 3196 if (!(link_info->autoneg & BNXT_AUTONEG_SPEED)) 3197 return -EINVAL; 3198 3199 if (netif_running(dev)) 3200 rc = bnxt_hwrm_set_link_setting(bp, true, false); 3201 3202 return rc; 3203 } 3204 3205 static int bnxt_set_phys_id(struct net_device *dev, 3206 enum ethtool_phys_id_state state) 3207 { 3208 struct hwrm_port_led_cfg_input *req; 3209 struct bnxt *bp = netdev_priv(dev); 3210 struct bnxt_pf_info *pf = &bp->pf; 3211 struct bnxt_led_cfg *led_cfg; 3212 u8 led_state; 3213 __le16 duration; 3214 int rc, i; 3215 3216 if (!bp->num_leds || BNXT_VF(bp)) 3217 return -EOPNOTSUPP; 3218 3219 if (state == ETHTOOL_ID_ACTIVE) { 3220 led_state = PORT_LED_CFG_REQ_LED0_STATE_BLINKALT; 3221 duration = cpu_to_le16(500); 3222 } else if (state == ETHTOOL_ID_INACTIVE) { 3223 led_state = PORT_LED_CFG_REQ_LED1_STATE_DEFAULT; 3224 duration = cpu_to_le16(0); 3225 } else { 3226 return -EINVAL; 3227 } 3228 rc = hwrm_req_init(bp, req, HWRM_PORT_LED_CFG); 3229 if (rc) 3230 return rc; 3231 3232 req->port_id = cpu_to_le16(pf->port_id); 3233 req->num_leds = bp->num_leds; 3234 led_cfg = (struct bnxt_led_cfg *)&req->led0_id; 3235 for (i = 0; i < bp->num_leds; i++, led_cfg++) { 3236 req->enables |= BNXT_LED_DFLT_ENABLES(i); 3237 led_cfg->led_id = bp->leds[i].led_id; 3238 led_cfg->led_state = led_state; 3239 led_cfg->led_blink_on = duration; 3240 led_cfg->led_blink_off = duration; 3241 led_cfg->led_group_id = bp->leds[i].led_group_id; 3242 } 3243 return hwrm_req_send(bp, req); 3244 } 3245 3246 static int bnxt_hwrm_selftest_irq(struct bnxt *bp, u16 cmpl_ring) 3247 { 3248 struct hwrm_selftest_irq_input *req; 3249 int rc; 3250 3251 rc = hwrm_req_init(bp, req, HWRM_SELFTEST_IRQ); 3252 if (rc) 3253 return rc; 3254 3255 req->cmpl_ring = cpu_to_le16(cmpl_ring); 3256 return hwrm_req_send(bp, req); 3257 } 3258 3259 static int bnxt_test_irq(struct bnxt *bp) 3260 { 3261 int i; 3262 3263 for (i = 0; i < bp->cp_nr_rings; i++) { 3264 u16 cmpl_ring = bp->grp_info[i].cp_fw_ring_id; 3265 int rc; 3266 3267 rc = bnxt_hwrm_selftest_irq(bp, cmpl_ring); 3268 if (rc) 3269 return rc; 3270 } 3271 return 0; 3272 } 3273 3274 static int bnxt_hwrm_mac_loopback(struct bnxt *bp, bool enable) 3275 { 3276 struct hwrm_port_mac_cfg_input *req; 3277 int rc; 3278 3279 rc = hwrm_req_init(bp, req, HWRM_PORT_MAC_CFG); 3280 if (rc) 3281 return rc; 3282 3283 req->enables = cpu_to_le32(PORT_MAC_CFG_REQ_ENABLES_LPBK); 3284 if (enable) 3285 req->lpbk = PORT_MAC_CFG_REQ_LPBK_LOCAL; 3286 else 3287 req->lpbk = PORT_MAC_CFG_REQ_LPBK_NONE; 3288 return hwrm_req_send(bp, req); 3289 } 3290 3291 static int bnxt_query_force_speeds(struct bnxt *bp, u16 *force_speeds) 3292 { 3293 struct hwrm_port_phy_qcaps_output *resp; 3294 struct hwrm_port_phy_qcaps_input *req; 3295 int rc; 3296 3297 rc = hwrm_req_init(bp, req, HWRM_PORT_PHY_QCAPS); 3298 if (rc) 3299 return rc; 3300 3301 resp = hwrm_req_hold(bp, req); 3302 rc = hwrm_req_send(bp, req); 3303 if (!rc) 3304 *force_speeds = le16_to_cpu(resp->supported_speeds_force_mode); 3305 3306 hwrm_req_drop(bp, req); 3307 return rc; 3308 } 3309 3310 static int bnxt_disable_an_for_lpbk(struct bnxt *bp, 3311 struct hwrm_port_phy_cfg_input *req) 3312 { 3313 struct bnxt_link_info *link_info = &bp->link_info; 3314 u16 fw_advertising; 3315 u16 fw_speed; 3316 int rc; 3317 3318 if (!link_info->autoneg || 3319 (bp->phy_flags & BNXT_PHY_FL_AN_PHY_LPBK)) 3320 return 0; 3321 3322 rc = bnxt_query_force_speeds(bp, &fw_advertising); 3323 if (rc) 3324 return rc; 3325 3326 fw_speed = PORT_PHY_CFG_REQ_FORCE_LINK_SPEED_1GB; 3327 if (bp->link_info.link_up) 3328 fw_speed = bp->link_info.link_speed; 3329 else if (fw_advertising & BNXT_LINK_SPEED_MSK_10GB) 3330 fw_speed = PORT_PHY_CFG_REQ_FORCE_LINK_SPEED_10GB; 3331 else if (fw_advertising & BNXT_LINK_SPEED_MSK_25GB) 3332 fw_speed = PORT_PHY_CFG_REQ_FORCE_LINK_SPEED_25GB; 3333 else if (fw_advertising & BNXT_LINK_SPEED_MSK_40GB) 3334 fw_speed = PORT_PHY_CFG_REQ_FORCE_LINK_SPEED_40GB; 3335 else if (fw_advertising & BNXT_LINK_SPEED_MSK_50GB) 3336 fw_speed = PORT_PHY_CFG_REQ_FORCE_LINK_SPEED_50GB; 3337 3338 req->force_link_speed = cpu_to_le16(fw_speed); 3339 req->flags |= cpu_to_le32(PORT_PHY_CFG_REQ_FLAGS_FORCE | 3340 PORT_PHY_CFG_REQ_FLAGS_RESET_PHY); 3341 rc = hwrm_req_send(bp, req); 3342 req->flags = 0; 3343 req->force_link_speed = cpu_to_le16(0); 3344 return rc; 3345 } 3346 3347 static int bnxt_hwrm_phy_loopback(struct bnxt *bp, bool enable, bool ext) 3348 { 3349 struct hwrm_port_phy_cfg_input *req; 3350 int rc; 3351 3352 rc = hwrm_req_init(bp, req, HWRM_PORT_PHY_CFG); 3353 if (rc) 3354 return rc; 3355 3356 /* prevent bnxt_disable_an_for_lpbk() from consuming the request */ 3357 hwrm_req_hold(bp, req); 3358 3359 if (enable) { 3360 bnxt_disable_an_for_lpbk(bp, req); 3361 if (ext) 3362 req->lpbk = PORT_PHY_CFG_REQ_LPBK_EXTERNAL; 3363 else 3364 req->lpbk = PORT_PHY_CFG_REQ_LPBK_LOCAL; 3365 } else { 3366 req->lpbk = PORT_PHY_CFG_REQ_LPBK_NONE; 3367 } 3368 req->enables = cpu_to_le32(PORT_PHY_CFG_REQ_ENABLES_LPBK); 3369 rc = hwrm_req_send(bp, req); 3370 hwrm_req_drop(bp, req); 3371 return rc; 3372 } 3373 3374 static int bnxt_rx_loopback(struct bnxt *bp, struct bnxt_cp_ring_info *cpr, 3375 u32 raw_cons, int pkt_size) 3376 { 3377 struct bnxt_napi *bnapi = cpr->bnapi; 3378 struct bnxt_rx_ring_info *rxr; 3379 struct bnxt_sw_rx_bd *rx_buf; 3380 struct rx_cmp *rxcmp; 3381 u16 cp_cons, cons; 3382 u8 *data; 3383 u32 len; 3384 int i; 3385 3386 rxr = bnapi->rx_ring; 3387 cp_cons = RING_CMP(raw_cons); 3388 rxcmp = (struct rx_cmp *) 3389 &cpr->cp_desc_ring[CP_RING(cp_cons)][CP_IDX(cp_cons)]; 3390 cons = rxcmp->rx_cmp_opaque; 3391 rx_buf = &rxr->rx_buf_ring[cons]; 3392 data = rx_buf->data_ptr; 3393 len = le32_to_cpu(rxcmp->rx_cmp_len_flags_type) >> RX_CMP_LEN_SHIFT; 3394 if (len != pkt_size) 3395 return -EIO; 3396 i = ETH_ALEN; 3397 if (!ether_addr_equal(data + i, bnapi->bp->dev->dev_addr)) 3398 return -EIO; 3399 i += ETH_ALEN; 3400 for ( ; i < pkt_size; i++) { 3401 if (data[i] != (u8)(i & 0xff)) 3402 return -EIO; 3403 } 3404 return 0; 3405 } 3406 3407 static int bnxt_poll_loopback(struct bnxt *bp, struct bnxt_cp_ring_info *cpr, 3408 int pkt_size) 3409 { 3410 struct tx_cmp *txcmp; 3411 int rc = -EIO; 3412 u32 raw_cons; 3413 u32 cons; 3414 int i; 3415 3416 raw_cons = cpr->cp_raw_cons; 3417 for (i = 0; i < 200; i++) { 3418 cons = RING_CMP(raw_cons); 3419 txcmp = &cpr->cp_desc_ring[CP_RING(cons)][CP_IDX(cons)]; 3420 3421 if (!TX_CMP_VALID(txcmp, raw_cons)) { 3422 udelay(5); 3423 continue; 3424 } 3425 3426 /* The valid test of the entry must be done first before 3427 * reading any further. 3428 */ 3429 dma_rmb(); 3430 if (TX_CMP_TYPE(txcmp) == CMP_TYPE_RX_L2_CMP) { 3431 rc = bnxt_rx_loopback(bp, cpr, raw_cons, pkt_size); 3432 raw_cons = NEXT_RAW_CMP(raw_cons); 3433 raw_cons = NEXT_RAW_CMP(raw_cons); 3434 break; 3435 } 3436 raw_cons = NEXT_RAW_CMP(raw_cons); 3437 } 3438 cpr->cp_raw_cons = raw_cons; 3439 return rc; 3440 } 3441 3442 static int bnxt_run_loopback(struct bnxt *bp) 3443 { 3444 struct bnxt_tx_ring_info *txr = &bp->tx_ring[0]; 3445 struct bnxt_rx_ring_info *rxr = &bp->rx_ring[0]; 3446 struct bnxt_cp_ring_info *cpr; 3447 int pkt_size, i = 0; 3448 struct sk_buff *skb; 3449 dma_addr_t map; 3450 u8 *data; 3451 int rc; 3452 3453 cpr = &rxr->bnapi->cp_ring; 3454 if (bp->flags & BNXT_FLAG_CHIP_P5) 3455 cpr = cpr->cp_ring_arr[BNXT_RX_HDL]; 3456 pkt_size = min(bp->dev->mtu + ETH_HLEN, bp->rx_copy_thresh); 3457 skb = netdev_alloc_skb(bp->dev, pkt_size); 3458 if (!skb) 3459 return -ENOMEM; 3460 data = skb_put(skb, pkt_size); 3461 ether_addr_copy(&data[i], bp->dev->dev_addr); 3462 i += ETH_ALEN; 3463 ether_addr_copy(&data[i], bp->dev->dev_addr); 3464 i += ETH_ALEN; 3465 for ( ; i < pkt_size; i++) 3466 data[i] = (u8)(i & 0xff); 3467 3468 map = dma_map_single(&bp->pdev->dev, skb->data, pkt_size, 3469 DMA_TO_DEVICE); 3470 if (dma_mapping_error(&bp->pdev->dev, map)) { 3471 dev_kfree_skb(skb); 3472 return -EIO; 3473 } 3474 bnxt_xmit_bd(bp, txr, map, pkt_size); 3475 3476 /* Sync BD data before updating doorbell */ 3477 wmb(); 3478 3479 bnxt_db_write(bp, &txr->tx_db, txr->tx_prod); 3480 rc = bnxt_poll_loopback(bp, cpr, pkt_size); 3481 3482 dma_unmap_single(&bp->pdev->dev, map, pkt_size, DMA_TO_DEVICE); 3483 dev_kfree_skb(skb); 3484 return rc; 3485 } 3486 3487 static int bnxt_run_fw_tests(struct bnxt *bp, u8 test_mask, u8 *test_results) 3488 { 3489 struct hwrm_selftest_exec_output *resp; 3490 struct hwrm_selftest_exec_input *req; 3491 int rc; 3492 3493 rc = hwrm_req_init(bp, req, HWRM_SELFTEST_EXEC); 3494 if (rc) 3495 return rc; 3496 3497 hwrm_req_timeout(bp, req, bp->test_info->timeout); 3498 req->flags = test_mask; 3499 3500 resp = hwrm_req_hold(bp, req); 3501 rc = hwrm_req_send(bp, req); 3502 *test_results = resp->test_success; 3503 hwrm_req_drop(bp, req); 3504 return rc; 3505 } 3506 3507 #define BNXT_DRV_TESTS 4 3508 #define BNXT_MACLPBK_TEST_IDX (bp->num_tests - BNXT_DRV_TESTS) 3509 #define BNXT_PHYLPBK_TEST_IDX (BNXT_MACLPBK_TEST_IDX + 1) 3510 #define BNXT_EXTLPBK_TEST_IDX (BNXT_MACLPBK_TEST_IDX + 2) 3511 #define BNXT_IRQ_TEST_IDX (BNXT_MACLPBK_TEST_IDX + 3) 3512 3513 static void bnxt_self_test(struct net_device *dev, struct ethtool_test *etest, 3514 u64 *buf) 3515 { 3516 struct bnxt *bp = netdev_priv(dev); 3517 bool do_ext_lpbk = false; 3518 bool offline = false; 3519 u8 test_results = 0; 3520 u8 test_mask = 0; 3521 int rc = 0, i; 3522 3523 if (!bp->num_tests || !BNXT_PF(bp)) 3524 return; 3525 memset(buf, 0, sizeof(u64) * bp->num_tests); 3526 if (!netif_running(dev)) { 3527 etest->flags |= ETH_TEST_FL_FAILED; 3528 return; 3529 } 3530 3531 if ((etest->flags & ETH_TEST_FL_EXTERNAL_LB) && 3532 (bp->phy_flags & BNXT_PHY_FL_EXT_LPBK)) 3533 do_ext_lpbk = true; 3534 3535 if (etest->flags & ETH_TEST_FL_OFFLINE) { 3536 if (bp->pf.active_vfs || !BNXT_SINGLE_PF(bp)) { 3537 etest->flags |= ETH_TEST_FL_FAILED; 3538 netdev_warn(dev, "Offline tests cannot be run with active VFs or on shared PF\n"); 3539 return; 3540 } 3541 offline = true; 3542 } 3543 3544 for (i = 0; i < bp->num_tests - BNXT_DRV_TESTS; i++) { 3545 u8 bit_val = 1 << i; 3546 3547 if (!(bp->test_info->offline_mask & bit_val)) 3548 test_mask |= bit_val; 3549 else if (offline) 3550 test_mask |= bit_val; 3551 } 3552 if (!offline) { 3553 bnxt_run_fw_tests(bp, test_mask, &test_results); 3554 } else { 3555 bnxt_ulp_stop(bp); 3556 rc = bnxt_close_nic(bp, true, false); 3557 if (rc) { 3558 bnxt_ulp_start(bp, rc); 3559 return; 3560 } 3561 bnxt_run_fw_tests(bp, test_mask, &test_results); 3562 3563 buf[BNXT_MACLPBK_TEST_IDX] = 1; 3564 bnxt_hwrm_mac_loopback(bp, true); 3565 msleep(250); 3566 rc = bnxt_half_open_nic(bp); 3567 if (rc) { 3568 bnxt_hwrm_mac_loopback(bp, false); 3569 etest->flags |= ETH_TEST_FL_FAILED; 3570 bnxt_ulp_start(bp, rc); 3571 return; 3572 } 3573 if (bnxt_run_loopback(bp)) 3574 etest->flags |= ETH_TEST_FL_FAILED; 3575 else 3576 buf[BNXT_MACLPBK_TEST_IDX] = 0; 3577 3578 bnxt_hwrm_mac_loopback(bp, false); 3579 bnxt_hwrm_phy_loopback(bp, true, false); 3580 msleep(1000); 3581 if (bnxt_run_loopback(bp)) { 3582 buf[BNXT_PHYLPBK_TEST_IDX] = 1; 3583 etest->flags |= ETH_TEST_FL_FAILED; 3584 } 3585 if (do_ext_lpbk) { 3586 etest->flags |= ETH_TEST_FL_EXTERNAL_LB_DONE; 3587 bnxt_hwrm_phy_loopback(bp, true, true); 3588 msleep(1000); 3589 if (bnxt_run_loopback(bp)) { 3590 buf[BNXT_EXTLPBK_TEST_IDX] = 1; 3591 etest->flags |= ETH_TEST_FL_FAILED; 3592 } 3593 } 3594 bnxt_hwrm_phy_loopback(bp, false, false); 3595 bnxt_half_close_nic(bp); 3596 rc = bnxt_open_nic(bp, true, true); 3597 bnxt_ulp_start(bp, rc); 3598 } 3599 if (rc || bnxt_test_irq(bp)) { 3600 buf[BNXT_IRQ_TEST_IDX] = 1; 3601 etest->flags |= ETH_TEST_FL_FAILED; 3602 } 3603 for (i = 0; i < bp->num_tests - BNXT_DRV_TESTS; i++) { 3604 u8 bit_val = 1 << i; 3605 3606 if ((test_mask & bit_val) && !(test_results & bit_val)) { 3607 buf[i] = 1; 3608 etest->flags |= ETH_TEST_FL_FAILED; 3609 } 3610 } 3611 } 3612 3613 static int bnxt_reset(struct net_device *dev, u32 *flags) 3614 { 3615 struct bnxt *bp = netdev_priv(dev); 3616 bool reload = false; 3617 u32 req = *flags; 3618 3619 if (!req) 3620 return -EINVAL; 3621 3622 if (!BNXT_PF(bp)) { 3623 netdev_err(dev, "Reset is not supported from a VF\n"); 3624 return -EOPNOTSUPP; 3625 } 3626 3627 if (pci_vfs_assigned(bp->pdev) && 3628 !(bp->fw_cap & BNXT_FW_CAP_HOT_RESET)) { 3629 netdev_err(dev, 3630 "Reset not allowed when VFs are assigned to VMs\n"); 3631 return -EBUSY; 3632 } 3633 3634 if ((req & BNXT_FW_RESET_CHIP) == BNXT_FW_RESET_CHIP) { 3635 /* This feature is not supported in older firmware versions */ 3636 if (bp->hwrm_spec_code >= 0x10803) { 3637 if (!bnxt_firmware_reset_chip(dev)) { 3638 netdev_info(dev, "Firmware reset request successful.\n"); 3639 if (!(bp->fw_cap & BNXT_FW_CAP_HOT_RESET)) 3640 reload = true; 3641 *flags &= ~BNXT_FW_RESET_CHIP; 3642 } 3643 } else if (req == BNXT_FW_RESET_CHIP) { 3644 return -EOPNOTSUPP; /* only request, fail hard */ 3645 } 3646 } 3647 3648 if (req & BNXT_FW_RESET_AP) { 3649 /* This feature is not supported in older firmware versions */ 3650 if (bp->hwrm_spec_code >= 0x10803) { 3651 if (!bnxt_firmware_reset_ap(dev)) { 3652 netdev_info(dev, "Reset application processor successful.\n"); 3653 reload = true; 3654 *flags &= ~BNXT_FW_RESET_AP; 3655 } 3656 } else if (req == BNXT_FW_RESET_AP) { 3657 return -EOPNOTSUPP; /* only request, fail hard */ 3658 } 3659 } 3660 3661 if (reload) 3662 netdev_info(dev, "Reload driver to complete reset\n"); 3663 3664 return 0; 3665 } 3666 3667 static int bnxt_set_dump(struct net_device *dev, struct ethtool_dump *dump) 3668 { 3669 struct bnxt *bp = netdev_priv(dev); 3670 3671 if (dump->flag > BNXT_DUMP_CRASH) { 3672 netdev_info(dev, "Supports only Live(0) and Crash(1) dumps.\n"); 3673 return -EINVAL; 3674 } 3675 3676 if (!IS_ENABLED(CONFIG_TEE_BNXT_FW) && dump->flag == BNXT_DUMP_CRASH) { 3677 netdev_info(dev, "Cannot collect crash dump as TEE_BNXT_FW config option is not enabled.\n"); 3678 return -EOPNOTSUPP; 3679 } 3680 3681 bp->dump_flag = dump->flag; 3682 return 0; 3683 } 3684 3685 static int bnxt_get_dump_flag(struct net_device *dev, struct ethtool_dump *dump) 3686 { 3687 struct bnxt *bp = netdev_priv(dev); 3688 3689 if (bp->hwrm_spec_code < 0x10801) 3690 return -EOPNOTSUPP; 3691 3692 dump->version = bp->ver_resp.hwrm_fw_maj_8b << 24 | 3693 bp->ver_resp.hwrm_fw_min_8b << 16 | 3694 bp->ver_resp.hwrm_fw_bld_8b << 8 | 3695 bp->ver_resp.hwrm_fw_rsvd_8b; 3696 3697 dump->flag = bp->dump_flag; 3698 dump->len = bnxt_get_coredump_length(bp, bp->dump_flag); 3699 return 0; 3700 } 3701 3702 static int bnxt_get_dump_data(struct net_device *dev, struct ethtool_dump *dump, 3703 void *buf) 3704 { 3705 struct bnxt *bp = netdev_priv(dev); 3706 3707 if (bp->hwrm_spec_code < 0x10801) 3708 return -EOPNOTSUPP; 3709 3710 memset(buf, 0, dump->len); 3711 3712 dump->flag = bp->dump_flag; 3713 return bnxt_get_coredump(bp, dump->flag, buf, &dump->len); 3714 } 3715 3716 static int bnxt_get_ts_info(struct net_device *dev, 3717 struct ethtool_ts_info *info) 3718 { 3719 struct bnxt *bp = netdev_priv(dev); 3720 struct bnxt_ptp_cfg *ptp; 3721 3722 ptp = bp->ptp_cfg; 3723 info->so_timestamping = SOF_TIMESTAMPING_TX_SOFTWARE | 3724 SOF_TIMESTAMPING_RX_SOFTWARE | 3725 SOF_TIMESTAMPING_SOFTWARE; 3726 3727 info->phc_index = -1; 3728 if (!ptp) 3729 return 0; 3730 3731 info->so_timestamping |= SOF_TIMESTAMPING_TX_HARDWARE | 3732 SOF_TIMESTAMPING_RX_HARDWARE | 3733 SOF_TIMESTAMPING_RAW_HARDWARE; 3734 if (ptp->ptp_clock) 3735 info->phc_index = ptp_clock_index(ptp->ptp_clock); 3736 3737 info->tx_types = (1 << HWTSTAMP_TX_OFF) | (1 << HWTSTAMP_TX_ON); 3738 3739 info->rx_filters = (1 << HWTSTAMP_FILTER_NONE) | 3740 (1 << HWTSTAMP_FILTER_PTP_V2_L2_EVENT) | 3741 (1 << HWTSTAMP_FILTER_PTP_V2_L4_EVENT); 3742 return 0; 3743 } 3744 3745 void bnxt_ethtool_init(struct bnxt *bp) 3746 { 3747 struct hwrm_selftest_qlist_output *resp; 3748 struct hwrm_selftest_qlist_input *req; 3749 struct bnxt_test_info *test_info; 3750 struct net_device *dev = bp->dev; 3751 int i, rc; 3752 3753 if (!(bp->fw_cap & BNXT_FW_CAP_PKG_VER)) 3754 bnxt_get_pkgver(dev); 3755 3756 bp->num_tests = 0; 3757 if (bp->hwrm_spec_code < 0x10704 || !BNXT_PF(bp)) 3758 return; 3759 3760 test_info = bp->test_info; 3761 if (!test_info) { 3762 test_info = kzalloc(sizeof(*bp->test_info), GFP_KERNEL); 3763 if (!test_info) 3764 return; 3765 bp->test_info = test_info; 3766 } 3767 3768 if (hwrm_req_init(bp, req, HWRM_SELFTEST_QLIST)) 3769 return; 3770 3771 resp = hwrm_req_hold(bp, req); 3772 rc = hwrm_req_send_silent(bp, req); 3773 if (rc) 3774 goto ethtool_init_exit; 3775 3776 bp->num_tests = resp->num_tests + BNXT_DRV_TESTS; 3777 if (bp->num_tests > BNXT_MAX_TEST) 3778 bp->num_tests = BNXT_MAX_TEST; 3779 3780 test_info->offline_mask = resp->offline_tests; 3781 test_info->timeout = le16_to_cpu(resp->test_timeout); 3782 if (!test_info->timeout) 3783 test_info->timeout = HWRM_CMD_TIMEOUT; 3784 for (i = 0; i < bp->num_tests; i++) { 3785 char *str = test_info->string[i]; 3786 char *fw_str = resp->test0_name + i * 32; 3787 3788 if (i == BNXT_MACLPBK_TEST_IDX) { 3789 strcpy(str, "Mac loopback test (offline)"); 3790 } else if (i == BNXT_PHYLPBK_TEST_IDX) { 3791 strcpy(str, "Phy loopback test (offline)"); 3792 } else if (i == BNXT_EXTLPBK_TEST_IDX) { 3793 strcpy(str, "Ext loopback test (offline)"); 3794 } else if (i == BNXT_IRQ_TEST_IDX) { 3795 strcpy(str, "Interrupt_test (offline)"); 3796 } else { 3797 strlcpy(str, fw_str, ETH_GSTRING_LEN); 3798 strncat(str, " test", ETH_GSTRING_LEN - strlen(str)); 3799 if (test_info->offline_mask & (1 << i)) 3800 strncat(str, " (offline)", 3801 ETH_GSTRING_LEN - strlen(str)); 3802 else 3803 strncat(str, " (online)", 3804 ETH_GSTRING_LEN - strlen(str)); 3805 } 3806 } 3807 3808 ethtool_init_exit: 3809 hwrm_req_drop(bp, req); 3810 } 3811 3812 static void bnxt_get_eth_phy_stats(struct net_device *dev, 3813 struct ethtool_eth_phy_stats *phy_stats) 3814 { 3815 struct bnxt *bp = netdev_priv(dev); 3816 u64 *rx; 3817 3818 if (BNXT_VF(bp) || !(bp->flags & BNXT_FLAG_PORT_STATS_EXT)) 3819 return; 3820 3821 rx = bp->rx_port_stats_ext.sw_stats; 3822 phy_stats->SymbolErrorDuringCarrier = 3823 *(rx + BNXT_RX_STATS_EXT_OFFSET(rx_pcs_symbol_err)); 3824 } 3825 3826 static void bnxt_get_eth_mac_stats(struct net_device *dev, 3827 struct ethtool_eth_mac_stats *mac_stats) 3828 { 3829 struct bnxt *bp = netdev_priv(dev); 3830 u64 *rx, *tx; 3831 3832 if (BNXT_VF(bp) || !(bp->flags & BNXT_FLAG_PORT_STATS)) 3833 return; 3834 3835 rx = bp->port_stats.sw_stats; 3836 tx = bp->port_stats.sw_stats + BNXT_TX_PORT_STATS_BYTE_OFFSET / 8; 3837 3838 mac_stats->FramesReceivedOK = 3839 BNXT_GET_RX_PORT_STATS64(rx, rx_good_frames); 3840 mac_stats->FramesTransmittedOK = 3841 BNXT_GET_TX_PORT_STATS64(tx, tx_good_frames); 3842 mac_stats->FrameCheckSequenceErrors = 3843 BNXT_GET_RX_PORT_STATS64(rx, rx_fcs_err_frames); 3844 mac_stats->AlignmentErrors = 3845 BNXT_GET_RX_PORT_STATS64(rx, rx_align_err_frames); 3846 mac_stats->OutOfRangeLengthField = 3847 BNXT_GET_RX_PORT_STATS64(rx, rx_oor_len_frames); 3848 } 3849 3850 static void bnxt_get_eth_ctrl_stats(struct net_device *dev, 3851 struct ethtool_eth_ctrl_stats *ctrl_stats) 3852 { 3853 struct bnxt *bp = netdev_priv(dev); 3854 u64 *rx; 3855 3856 if (BNXT_VF(bp) || !(bp->flags & BNXT_FLAG_PORT_STATS)) 3857 return; 3858 3859 rx = bp->port_stats.sw_stats; 3860 ctrl_stats->MACControlFramesReceived = 3861 BNXT_GET_RX_PORT_STATS64(rx, rx_ctrl_frames); 3862 } 3863 3864 static const struct ethtool_rmon_hist_range bnxt_rmon_ranges[] = { 3865 { 0, 64 }, 3866 { 65, 127 }, 3867 { 128, 255 }, 3868 { 256, 511 }, 3869 { 512, 1023 }, 3870 { 1024, 1518 }, 3871 { 1519, 2047 }, 3872 { 2048, 4095 }, 3873 { 4096, 9216 }, 3874 { 9217, 16383 }, 3875 {} 3876 }; 3877 3878 static void bnxt_get_rmon_stats(struct net_device *dev, 3879 struct ethtool_rmon_stats *rmon_stats, 3880 const struct ethtool_rmon_hist_range **ranges) 3881 { 3882 struct bnxt *bp = netdev_priv(dev); 3883 u64 *rx, *tx; 3884 3885 if (BNXT_VF(bp) || !(bp->flags & BNXT_FLAG_PORT_STATS)) 3886 return; 3887 3888 rx = bp->port_stats.sw_stats; 3889 tx = bp->port_stats.sw_stats + BNXT_TX_PORT_STATS_BYTE_OFFSET / 8; 3890 3891 rmon_stats->jabbers = 3892 BNXT_GET_RX_PORT_STATS64(rx, rx_jbr_frames); 3893 rmon_stats->oversize_pkts = 3894 BNXT_GET_RX_PORT_STATS64(rx, rx_ovrsz_frames); 3895 rmon_stats->undersize_pkts = 3896 BNXT_GET_RX_PORT_STATS64(rx, rx_undrsz_frames); 3897 3898 rmon_stats->hist[0] = BNXT_GET_RX_PORT_STATS64(rx, rx_64b_frames); 3899 rmon_stats->hist[1] = BNXT_GET_RX_PORT_STATS64(rx, rx_65b_127b_frames); 3900 rmon_stats->hist[2] = BNXT_GET_RX_PORT_STATS64(rx, rx_128b_255b_frames); 3901 rmon_stats->hist[3] = BNXT_GET_RX_PORT_STATS64(rx, rx_256b_511b_frames); 3902 rmon_stats->hist[4] = 3903 BNXT_GET_RX_PORT_STATS64(rx, rx_512b_1023b_frames); 3904 rmon_stats->hist[5] = 3905 BNXT_GET_RX_PORT_STATS64(rx, rx_1024b_1518b_frames); 3906 rmon_stats->hist[6] = 3907 BNXT_GET_RX_PORT_STATS64(rx, rx_1519b_2047b_frames); 3908 rmon_stats->hist[7] = 3909 BNXT_GET_RX_PORT_STATS64(rx, rx_2048b_4095b_frames); 3910 rmon_stats->hist[8] = 3911 BNXT_GET_RX_PORT_STATS64(rx, rx_4096b_9216b_frames); 3912 rmon_stats->hist[9] = 3913 BNXT_GET_RX_PORT_STATS64(rx, rx_9217b_16383b_frames); 3914 3915 rmon_stats->hist_tx[0] = 3916 BNXT_GET_TX_PORT_STATS64(tx, tx_64b_frames); 3917 rmon_stats->hist_tx[1] = 3918 BNXT_GET_TX_PORT_STATS64(tx, tx_65b_127b_frames); 3919 rmon_stats->hist_tx[2] = 3920 BNXT_GET_TX_PORT_STATS64(tx, tx_128b_255b_frames); 3921 rmon_stats->hist_tx[3] = 3922 BNXT_GET_TX_PORT_STATS64(tx, tx_256b_511b_frames); 3923 rmon_stats->hist_tx[4] = 3924 BNXT_GET_TX_PORT_STATS64(tx, tx_512b_1023b_frames); 3925 rmon_stats->hist_tx[5] = 3926 BNXT_GET_TX_PORT_STATS64(tx, tx_1024b_1518b_frames); 3927 rmon_stats->hist_tx[6] = 3928 BNXT_GET_TX_PORT_STATS64(tx, tx_1519b_2047b_frames); 3929 rmon_stats->hist_tx[7] = 3930 BNXT_GET_TX_PORT_STATS64(tx, tx_2048b_4095b_frames); 3931 rmon_stats->hist_tx[8] = 3932 BNXT_GET_TX_PORT_STATS64(tx, tx_4096b_9216b_frames); 3933 rmon_stats->hist_tx[9] = 3934 BNXT_GET_TX_PORT_STATS64(tx, tx_9217b_16383b_frames); 3935 3936 *ranges = bnxt_rmon_ranges; 3937 } 3938 3939 void bnxt_ethtool_free(struct bnxt *bp) 3940 { 3941 kfree(bp->test_info); 3942 bp->test_info = NULL; 3943 } 3944 3945 const struct ethtool_ops bnxt_ethtool_ops = { 3946 .supported_coalesce_params = ETHTOOL_COALESCE_USECS | 3947 ETHTOOL_COALESCE_MAX_FRAMES | 3948 ETHTOOL_COALESCE_USECS_IRQ | 3949 ETHTOOL_COALESCE_MAX_FRAMES_IRQ | 3950 ETHTOOL_COALESCE_STATS_BLOCK_USECS | 3951 ETHTOOL_COALESCE_USE_ADAPTIVE_RX | 3952 ETHTOOL_COALESCE_USE_CQE, 3953 .get_link_ksettings = bnxt_get_link_ksettings, 3954 .set_link_ksettings = bnxt_set_link_ksettings, 3955 .get_fec_stats = bnxt_get_fec_stats, 3956 .get_fecparam = bnxt_get_fecparam, 3957 .set_fecparam = bnxt_set_fecparam, 3958 .get_pause_stats = bnxt_get_pause_stats, 3959 .get_pauseparam = bnxt_get_pauseparam, 3960 .set_pauseparam = bnxt_set_pauseparam, 3961 .get_drvinfo = bnxt_get_drvinfo, 3962 .get_regs_len = bnxt_get_regs_len, 3963 .get_regs = bnxt_get_regs, 3964 .get_wol = bnxt_get_wol, 3965 .set_wol = bnxt_set_wol, 3966 .get_coalesce = bnxt_get_coalesce, 3967 .set_coalesce = bnxt_set_coalesce, 3968 .get_msglevel = bnxt_get_msglevel, 3969 .set_msglevel = bnxt_set_msglevel, 3970 .get_sset_count = bnxt_get_sset_count, 3971 .get_strings = bnxt_get_strings, 3972 .get_ethtool_stats = bnxt_get_ethtool_stats, 3973 .set_ringparam = bnxt_set_ringparam, 3974 .get_ringparam = bnxt_get_ringparam, 3975 .get_channels = bnxt_get_channels, 3976 .set_channels = bnxt_set_channels, 3977 .get_rxnfc = bnxt_get_rxnfc, 3978 .set_rxnfc = bnxt_set_rxnfc, 3979 .get_rxfh_indir_size = bnxt_get_rxfh_indir_size, 3980 .get_rxfh_key_size = bnxt_get_rxfh_key_size, 3981 .get_rxfh = bnxt_get_rxfh, 3982 .set_rxfh = bnxt_set_rxfh, 3983 .flash_device = bnxt_flash_device, 3984 .get_eeprom_len = bnxt_get_eeprom_len, 3985 .get_eeprom = bnxt_get_eeprom, 3986 .set_eeprom = bnxt_set_eeprom, 3987 .get_link = bnxt_get_link, 3988 .get_eee = bnxt_get_eee, 3989 .set_eee = bnxt_set_eee, 3990 .get_module_info = bnxt_get_module_info, 3991 .get_module_eeprom = bnxt_get_module_eeprom, 3992 .nway_reset = bnxt_nway_reset, 3993 .set_phys_id = bnxt_set_phys_id, 3994 .self_test = bnxt_self_test, 3995 .get_ts_info = bnxt_get_ts_info, 3996 .reset = bnxt_reset, 3997 .set_dump = bnxt_set_dump, 3998 .get_dump_flag = bnxt_get_dump_flag, 3999 .get_dump_data = bnxt_get_dump_data, 4000 .get_eth_phy_stats = bnxt_get_eth_phy_stats, 4001 .get_eth_mac_stats = bnxt_get_eth_mac_stats, 4002 .get_eth_ctrl_stats = bnxt_get_eth_ctrl_stats, 4003 .get_rmon_stats = bnxt_get_rmon_stats, 4004 }; 4005