1 /* Broadcom NetXtreme-C/E network driver. 2 * 3 * Copyright (c) 2014-2016 Broadcom Corporation 4 * Copyright (c) 2016-2017 Broadcom Limited 5 * 6 * This program is free software; you can redistribute it and/or modify 7 * it under the terms of the GNU General Public License as published by 8 * the Free Software Foundation. 9 */ 10 11 #include <linux/bitops.h> 12 #include <linux/ctype.h> 13 #include <linux/stringify.h> 14 #include <linux/ethtool.h> 15 #include <linux/ethtool_netlink.h> 16 #include <linux/linkmode.h> 17 #include <linux/interrupt.h> 18 #include <linux/pci.h> 19 #include <linux/etherdevice.h> 20 #include <linux/crc32.h> 21 #include <linux/firmware.h> 22 #include <linux/utsname.h> 23 #include <linux/time.h> 24 #include <linux/ptp_clock_kernel.h> 25 #include <linux/net_tstamp.h> 26 #include <linux/timecounter.h> 27 #include <net/netlink.h> 28 #include "bnxt_hsi.h" 29 #include "bnxt.h" 30 #include "bnxt_hwrm.h" 31 #include "bnxt_ulp.h" 32 #include "bnxt_xdp.h" 33 #include "bnxt_ptp.h" 34 #include "bnxt_ethtool.h" 35 #include "bnxt_nvm_defs.h" /* NVRAM content constant and structure defs */ 36 #include "bnxt_fw_hdr.h" /* Firmware hdr constant and structure defs */ 37 #include "bnxt_coredump.h" 38 39 #define BNXT_NVM_ERR_MSG(dev, extack, msg) \ 40 do { \ 41 if (extack) \ 42 NL_SET_ERR_MSG_MOD(extack, msg); \ 43 netdev_err(dev, "%s\n", msg); \ 44 } while (0) 45 46 static u32 bnxt_get_msglevel(struct net_device *dev) 47 { 48 struct bnxt *bp = netdev_priv(dev); 49 50 return bp->msg_enable; 51 } 52 53 static void bnxt_set_msglevel(struct net_device *dev, u32 value) 54 { 55 struct bnxt *bp = netdev_priv(dev); 56 57 bp->msg_enable = value; 58 } 59 60 static int bnxt_get_coalesce(struct net_device *dev, 61 struct ethtool_coalesce *coal, 62 struct kernel_ethtool_coalesce *kernel_coal, 63 struct netlink_ext_ack *extack) 64 { 65 struct bnxt *bp = netdev_priv(dev); 66 struct bnxt_coal *hw_coal; 67 u16 mult; 68 69 memset(coal, 0, sizeof(*coal)); 70 71 coal->use_adaptive_rx_coalesce = bp->flags & BNXT_FLAG_DIM; 72 73 hw_coal = &bp->rx_coal; 74 mult = hw_coal->bufs_per_record; 75 coal->rx_coalesce_usecs = hw_coal->coal_ticks; 76 coal->rx_max_coalesced_frames = hw_coal->coal_bufs / mult; 77 coal->rx_coalesce_usecs_irq = hw_coal->coal_ticks_irq; 78 coal->rx_max_coalesced_frames_irq = hw_coal->coal_bufs_irq / mult; 79 if (hw_coal->flags & 80 RING_CMPL_RING_CFG_AGGINT_PARAMS_REQ_FLAGS_TIMER_RESET) 81 kernel_coal->use_cqe_mode_rx = true; 82 83 hw_coal = &bp->tx_coal; 84 mult = hw_coal->bufs_per_record; 85 coal->tx_coalesce_usecs = hw_coal->coal_ticks; 86 coal->tx_max_coalesced_frames = hw_coal->coal_bufs / mult; 87 coal->tx_coalesce_usecs_irq = hw_coal->coal_ticks_irq; 88 coal->tx_max_coalesced_frames_irq = hw_coal->coal_bufs_irq / mult; 89 if (hw_coal->flags & 90 RING_CMPL_RING_CFG_AGGINT_PARAMS_REQ_FLAGS_TIMER_RESET) 91 kernel_coal->use_cqe_mode_tx = true; 92 93 coal->stats_block_coalesce_usecs = bp->stats_coal_ticks; 94 95 return 0; 96 } 97 98 static int bnxt_set_coalesce(struct net_device *dev, 99 struct ethtool_coalesce *coal, 100 struct kernel_ethtool_coalesce *kernel_coal, 101 struct netlink_ext_ack *extack) 102 { 103 struct bnxt *bp = netdev_priv(dev); 104 bool update_stats = false; 105 struct bnxt_coal *hw_coal; 106 int rc = 0; 107 u16 mult; 108 109 if (coal->use_adaptive_rx_coalesce) { 110 bp->flags |= BNXT_FLAG_DIM; 111 } else { 112 if (bp->flags & BNXT_FLAG_DIM) { 113 bp->flags &= ~(BNXT_FLAG_DIM); 114 goto reset_coalesce; 115 } 116 } 117 118 if ((kernel_coal->use_cqe_mode_rx || kernel_coal->use_cqe_mode_tx) && 119 !(bp->coal_cap.cmpl_params & 120 RING_AGGINT_QCAPS_RESP_CMPL_PARAMS_TIMER_RESET)) 121 return -EOPNOTSUPP; 122 123 hw_coal = &bp->rx_coal; 124 mult = hw_coal->bufs_per_record; 125 hw_coal->coal_ticks = coal->rx_coalesce_usecs; 126 hw_coal->coal_bufs = coal->rx_max_coalesced_frames * mult; 127 hw_coal->coal_ticks_irq = coal->rx_coalesce_usecs_irq; 128 hw_coal->coal_bufs_irq = coal->rx_max_coalesced_frames_irq * mult; 129 hw_coal->flags &= 130 ~RING_CMPL_RING_CFG_AGGINT_PARAMS_REQ_FLAGS_TIMER_RESET; 131 if (kernel_coal->use_cqe_mode_rx) 132 hw_coal->flags |= 133 RING_CMPL_RING_CFG_AGGINT_PARAMS_REQ_FLAGS_TIMER_RESET; 134 135 hw_coal = &bp->tx_coal; 136 mult = hw_coal->bufs_per_record; 137 hw_coal->coal_ticks = coal->tx_coalesce_usecs; 138 hw_coal->coal_bufs = coal->tx_max_coalesced_frames * mult; 139 hw_coal->coal_ticks_irq = coal->tx_coalesce_usecs_irq; 140 hw_coal->coal_bufs_irq = coal->tx_max_coalesced_frames_irq * mult; 141 hw_coal->flags &= 142 ~RING_CMPL_RING_CFG_AGGINT_PARAMS_REQ_FLAGS_TIMER_RESET; 143 if (kernel_coal->use_cqe_mode_tx) 144 hw_coal->flags |= 145 RING_CMPL_RING_CFG_AGGINT_PARAMS_REQ_FLAGS_TIMER_RESET; 146 147 if (bp->stats_coal_ticks != coal->stats_block_coalesce_usecs) { 148 u32 stats_ticks = coal->stats_block_coalesce_usecs; 149 150 /* Allow 0, which means disable. */ 151 if (stats_ticks) 152 stats_ticks = clamp_t(u32, stats_ticks, 153 BNXT_MIN_STATS_COAL_TICKS, 154 BNXT_MAX_STATS_COAL_TICKS); 155 stats_ticks = rounddown(stats_ticks, BNXT_MIN_STATS_COAL_TICKS); 156 bp->stats_coal_ticks = stats_ticks; 157 if (bp->stats_coal_ticks) 158 bp->current_interval = 159 bp->stats_coal_ticks * HZ / 1000000; 160 else 161 bp->current_interval = BNXT_TIMER_INTERVAL; 162 update_stats = true; 163 } 164 165 reset_coalesce: 166 if (test_bit(BNXT_STATE_OPEN, &bp->state)) { 167 if (update_stats) { 168 bnxt_close_nic(bp, true, false); 169 rc = bnxt_open_nic(bp, true, false); 170 } else { 171 rc = bnxt_hwrm_set_coal(bp); 172 } 173 } 174 175 return rc; 176 } 177 178 static const char * const bnxt_ring_rx_stats_str[] = { 179 "rx_ucast_packets", 180 "rx_mcast_packets", 181 "rx_bcast_packets", 182 "rx_discards", 183 "rx_errors", 184 "rx_ucast_bytes", 185 "rx_mcast_bytes", 186 "rx_bcast_bytes", 187 }; 188 189 static const char * const bnxt_ring_tx_stats_str[] = { 190 "tx_ucast_packets", 191 "tx_mcast_packets", 192 "tx_bcast_packets", 193 "tx_errors", 194 "tx_discards", 195 "tx_ucast_bytes", 196 "tx_mcast_bytes", 197 "tx_bcast_bytes", 198 }; 199 200 static const char * const bnxt_ring_tpa_stats_str[] = { 201 "tpa_packets", 202 "tpa_bytes", 203 "tpa_events", 204 "tpa_aborts", 205 }; 206 207 static const char * const bnxt_ring_tpa2_stats_str[] = { 208 "rx_tpa_eligible_pkt", 209 "rx_tpa_eligible_bytes", 210 "rx_tpa_pkt", 211 "rx_tpa_bytes", 212 "rx_tpa_errors", 213 "rx_tpa_events", 214 }; 215 216 static const char * const bnxt_rx_sw_stats_str[] = { 217 "rx_l4_csum_errors", 218 "rx_resets", 219 "rx_buf_errors", 220 }; 221 222 static const char * const bnxt_cmn_sw_stats_str[] = { 223 "missed_irqs", 224 }; 225 226 #define BNXT_RX_STATS_ENTRY(counter) \ 227 { BNXT_RX_STATS_OFFSET(counter), __stringify(counter) } 228 229 #define BNXT_TX_STATS_ENTRY(counter) \ 230 { BNXT_TX_STATS_OFFSET(counter), __stringify(counter) } 231 232 #define BNXT_RX_STATS_EXT_ENTRY(counter) \ 233 { BNXT_RX_STATS_EXT_OFFSET(counter), __stringify(counter) } 234 235 #define BNXT_TX_STATS_EXT_ENTRY(counter) \ 236 { BNXT_TX_STATS_EXT_OFFSET(counter), __stringify(counter) } 237 238 #define BNXT_RX_STATS_EXT_PFC_ENTRY(n) \ 239 BNXT_RX_STATS_EXT_ENTRY(pfc_pri##n##_rx_duration_us), \ 240 BNXT_RX_STATS_EXT_ENTRY(pfc_pri##n##_rx_transitions) 241 242 #define BNXT_TX_STATS_EXT_PFC_ENTRY(n) \ 243 BNXT_TX_STATS_EXT_ENTRY(pfc_pri##n##_tx_duration_us), \ 244 BNXT_TX_STATS_EXT_ENTRY(pfc_pri##n##_tx_transitions) 245 246 #define BNXT_RX_STATS_EXT_PFC_ENTRIES \ 247 BNXT_RX_STATS_EXT_PFC_ENTRY(0), \ 248 BNXT_RX_STATS_EXT_PFC_ENTRY(1), \ 249 BNXT_RX_STATS_EXT_PFC_ENTRY(2), \ 250 BNXT_RX_STATS_EXT_PFC_ENTRY(3), \ 251 BNXT_RX_STATS_EXT_PFC_ENTRY(4), \ 252 BNXT_RX_STATS_EXT_PFC_ENTRY(5), \ 253 BNXT_RX_STATS_EXT_PFC_ENTRY(6), \ 254 BNXT_RX_STATS_EXT_PFC_ENTRY(7) 255 256 #define BNXT_TX_STATS_EXT_PFC_ENTRIES \ 257 BNXT_TX_STATS_EXT_PFC_ENTRY(0), \ 258 BNXT_TX_STATS_EXT_PFC_ENTRY(1), \ 259 BNXT_TX_STATS_EXT_PFC_ENTRY(2), \ 260 BNXT_TX_STATS_EXT_PFC_ENTRY(3), \ 261 BNXT_TX_STATS_EXT_PFC_ENTRY(4), \ 262 BNXT_TX_STATS_EXT_PFC_ENTRY(5), \ 263 BNXT_TX_STATS_EXT_PFC_ENTRY(6), \ 264 BNXT_TX_STATS_EXT_PFC_ENTRY(7) 265 266 #define BNXT_RX_STATS_EXT_COS_ENTRY(n) \ 267 BNXT_RX_STATS_EXT_ENTRY(rx_bytes_cos##n), \ 268 BNXT_RX_STATS_EXT_ENTRY(rx_packets_cos##n) 269 270 #define BNXT_TX_STATS_EXT_COS_ENTRY(n) \ 271 BNXT_TX_STATS_EXT_ENTRY(tx_bytes_cos##n), \ 272 BNXT_TX_STATS_EXT_ENTRY(tx_packets_cos##n) 273 274 #define BNXT_RX_STATS_EXT_COS_ENTRIES \ 275 BNXT_RX_STATS_EXT_COS_ENTRY(0), \ 276 BNXT_RX_STATS_EXT_COS_ENTRY(1), \ 277 BNXT_RX_STATS_EXT_COS_ENTRY(2), \ 278 BNXT_RX_STATS_EXT_COS_ENTRY(3), \ 279 BNXT_RX_STATS_EXT_COS_ENTRY(4), \ 280 BNXT_RX_STATS_EXT_COS_ENTRY(5), \ 281 BNXT_RX_STATS_EXT_COS_ENTRY(6), \ 282 BNXT_RX_STATS_EXT_COS_ENTRY(7) \ 283 284 #define BNXT_TX_STATS_EXT_COS_ENTRIES \ 285 BNXT_TX_STATS_EXT_COS_ENTRY(0), \ 286 BNXT_TX_STATS_EXT_COS_ENTRY(1), \ 287 BNXT_TX_STATS_EXT_COS_ENTRY(2), \ 288 BNXT_TX_STATS_EXT_COS_ENTRY(3), \ 289 BNXT_TX_STATS_EXT_COS_ENTRY(4), \ 290 BNXT_TX_STATS_EXT_COS_ENTRY(5), \ 291 BNXT_TX_STATS_EXT_COS_ENTRY(6), \ 292 BNXT_TX_STATS_EXT_COS_ENTRY(7) \ 293 294 #define BNXT_RX_STATS_EXT_DISCARD_COS_ENTRY(n) \ 295 BNXT_RX_STATS_EXT_ENTRY(rx_discard_bytes_cos##n), \ 296 BNXT_RX_STATS_EXT_ENTRY(rx_discard_packets_cos##n) 297 298 #define BNXT_RX_STATS_EXT_DISCARD_COS_ENTRIES \ 299 BNXT_RX_STATS_EXT_DISCARD_COS_ENTRY(0), \ 300 BNXT_RX_STATS_EXT_DISCARD_COS_ENTRY(1), \ 301 BNXT_RX_STATS_EXT_DISCARD_COS_ENTRY(2), \ 302 BNXT_RX_STATS_EXT_DISCARD_COS_ENTRY(3), \ 303 BNXT_RX_STATS_EXT_DISCARD_COS_ENTRY(4), \ 304 BNXT_RX_STATS_EXT_DISCARD_COS_ENTRY(5), \ 305 BNXT_RX_STATS_EXT_DISCARD_COS_ENTRY(6), \ 306 BNXT_RX_STATS_EXT_DISCARD_COS_ENTRY(7) 307 308 #define BNXT_RX_STATS_PRI_ENTRY(counter, n) \ 309 { BNXT_RX_STATS_EXT_OFFSET(counter##_cos0), \ 310 __stringify(counter##_pri##n) } 311 312 #define BNXT_TX_STATS_PRI_ENTRY(counter, n) \ 313 { BNXT_TX_STATS_EXT_OFFSET(counter##_cos0), \ 314 __stringify(counter##_pri##n) } 315 316 #define BNXT_RX_STATS_PRI_ENTRIES(counter) \ 317 BNXT_RX_STATS_PRI_ENTRY(counter, 0), \ 318 BNXT_RX_STATS_PRI_ENTRY(counter, 1), \ 319 BNXT_RX_STATS_PRI_ENTRY(counter, 2), \ 320 BNXT_RX_STATS_PRI_ENTRY(counter, 3), \ 321 BNXT_RX_STATS_PRI_ENTRY(counter, 4), \ 322 BNXT_RX_STATS_PRI_ENTRY(counter, 5), \ 323 BNXT_RX_STATS_PRI_ENTRY(counter, 6), \ 324 BNXT_RX_STATS_PRI_ENTRY(counter, 7) 325 326 #define BNXT_TX_STATS_PRI_ENTRIES(counter) \ 327 BNXT_TX_STATS_PRI_ENTRY(counter, 0), \ 328 BNXT_TX_STATS_PRI_ENTRY(counter, 1), \ 329 BNXT_TX_STATS_PRI_ENTRY(counter, 2), \ 330 BNXT_TX_STATS_PRI_ENTRY(counter, 3), \ 331 BNXT_TX_STATS_PRI_ENTRY(counter, 4), \ 332 BNXT_TX_STATS_PRI_ENTRY(counter, 5), \ 333 BNXT_TX_STATS_PRI_ENTRY(counter, 6), \ 334 BNXT_TX_STATS_PRI_ENTRY(counter, 7) 335 336 enum { 337 RX_TOTAL_DISCARDS, 338 TX_TOTAL_DISCARDS, 339 RX_NETPOLL_DISCARDS, 340 }; 341 342 static const char *const bnxt_ring_err_stats_arr[] = { 343 "rx_total_l4_csum_errors", 344 "rx_total_resets", 345 "rx_total_buf_errors", 346 "rx_total_oom_discards", 347 "rx_total_netpoll_discards", 348 "rx_total_ring_discards", 349 "tx_total_resets", 350 "tx_total_ring_discards", 351 "total_missed_irqs", 352 }; 353 354 #define NUM_RING_RX_SW_STATS ARRAY_SIZE(bnxt_rx_sw_stats_str) 355 #define NUM_RING_CMN_SW_STATS ARRAY_SIZE(bnxt_cmn_sw_stats_str) 356 #define NUM_RING_RX_HW_STATS ARRAY_SIZE(bnxt_ring_rx_stats_str) 357 #define NUM_RING_TX_HW_STATS ARRAY_SIZE(bnxt_ring_tx_stats_str) 358 359 static const struct { 360 long offset; 361 char string[ETH_GSTRING_LEN]; 362 } bnxt_port_stats_arr[] = { 363 BNXT_RX_STATS_ENTRY(rx_64b_frames), 364 BNXT_RX_STATS_ENTRY(rx_65b_127b_frames), 365 BNXT_RX_STATS_ENTRY(rx_128b_255b_frames), 366 BNXT_RX_STATS_ENTRY(rx_256b_511b_frames), 367 BNXT_RX_STATS_ENTRY(rx_512b_1023b_frames), 368 BNXT_RX_STATS_ENTRY(rx_1024b_1518b_frames), 369 BNXT_RX_STATS_ENTRY(rx_good_vlan_frames), 370 BNXT_RX_STATS_ENTRY(rx_1519b_2047b_frames), 371 BNXT_RX_STATS_ENTRY(rx_2048b_4095b_frames), 372 BNXT_RX_STATS_ENTRY(rx_4096b_9216b_frames), 373 BNXT_RX_STATS_ENTRY(rx_9217b_16383b_frames), 374 BNXT_RX_STATS_ENTRY(rx_total_frames), 375 BNXT_RX_STATS_ENTRY(rx_ucast_frames), 376 BNXT_RX_STATS_ENTRY(rx_mcast_frames), 377 BNXT_RX_STATS_ENTRY(rx_bcast_frames), 378 BNXT_RX_STATS_ENTRY(rx_fcs_err_frames), 379 BNXT_RX_STATS_ENTRY(rx_ctrl_frames), 380 BNXT_RX_STATS_ENTRY(rx_pause_frames), 381 BNXT_RX_STATS_ENTRY(rx_pfc_frames), 382 BNXT_RX_STATS_ENTRY(rx_align_err_frames), 383 BNXT_RX_STATS_ENTRY(rx_ovrsz_frames), 384 BNXT_RX_STATS_ENTRY(rx_jbr_frames), 385 BNXT_RX_STATS_ENTRY(rx_mtu_err_frames), 386 BNXT_RX_STATS_ENTRY(rx_tagged_frames), 387 BNXT_RX_STATS_ENTRY(rx_double_tagged_frames), 388 BNXT_RX_STATS_ENTRY(rx_good_frames), 389 BNXT_RX_STATS_ENTRY(rx_pfc_ena_frames_pri0), 390 BNXT_RX_STATS_ENTRY(rx_pfc_ena_frames_pri1), 391 BNXT_RX_STATS_ENTRY(rx_pfc_ena_frames_pri2), 392 BNXT_RX_STATS_ENTRY(rx_pfc_ena_frames_pri3), 393 BNXT_RX_STATS_ENTRY(rx_pfc_ena_frames_pri4), 394 BNXT_RX_STATS_ENTRY(rx_pfc_ena_frames_pri5), 395 BNXT_RX_STATS_ENTRY(rx_pfc_ena_frames_pri6), 396 BNXT_RX_STATS_ENTRY(rx_pfc_ena_frames_pri7), 397 BNXT_RX_STATS_ENTRY(rx_undrsz_frames), 398 BNXT_RX_STATS_ENTRY(rx_eee_lpi_events), 399 BNXT_RX_STATS_ENTRY(rx_eee_lpi_duration), 400 BNXT_RX_STATS_ENTRY(rx_bytes), 401 BNXT_RX_STATS_ENTRY(rx_runt_bytes), 402 BNXT_RX_STATS_ENTRY(rx_runt_frames), 403 BNXT_RX_STATS_ENTRY(rx_stat_discard), 404 BNXT_RX_STATS_ENTRY(rx_stat_err), 405 406 BNXT_TX_STATS_ENTRY(tx_64b_frames), 407 BNXT_TX_STATS_ENTRY(tx_65b_127b_frames), 408 BNXT_TX_STATS_ENTRY(tx_128b_255b_frames), 409 BNXT_TX_STATS_ENTRY(tx_256b_511b_frames), 410 BNXT_TX_STATS_ENTRY(tx_512b_1023b_frames), 411 BNXT_TX_STATS_ENTRY(tx_1024b_1518b_frames), 412 BNXT_TX_STATS_ENTRY(tx_good_vlan_frames), 413 BNXT_TX_STATS_ENTRY(tx_1519b_2047b_frames), 414 BNXT_TX_STATS_ENTRY(tx_2048b_4095b_frames), 415 BNXT_TX_STATS_ENTRY(tx_4096b_9216b_frames), 416 BNXT_TX_STATS_ENTRY(tx_9217b_16383b_frames), 417 BNXT_TX_STATS_ENTRY(tx_good_frames), 418 BNXT_TX_STATS_ENTRY(tx_total_frames), 419 BNXT_TX_STATS_ENTRY(tx_ucast_frames), 420 BNXT_TX_STATS_ENTRY(tx_mcast_frames), 421 BNXT_TX_STATS_ENTRY(tx_bcast_frames), 422 BNXT_TX_STATS_ENTRY(tx_pause_frames), 423 BNXT_TX_STATS_ENTRY(tx_pfc_frames), 424 BNXT_TX_STATS_ENTRY(tx_jabber_frames), 425 BNXT_TX_STATS_ENTRY(tx_fcs_err_frames), 426 BNXT_TX_STATS_ENTRY(tx_err), 427 BNXT_TX_STATS_ENTRY(tx_fifo_underruns), 428 BNXT_TX_STATS_ENTRY(tx_pfc_ena_frames_pri0), 429 BNXT_TX_STATS_ENTRY(tx_pfc_ena_frames_pri1), 430 BNXT_TX_STATS_ENTRY(tx_pfc_ena_frames_pri2), 431 BNXT_TX_STATS_ENTRY(tx_pfc_ena_frames_pri3), 432 BNXT_TX_STATS_ENTRY(tx_pfc_ena_frames_pri4), 433 BNXT_TX_STATS_ENTRY(tx_pfc_ena_frames_pri5), 434 BNXT_TX_STATS_ENTRY(tx_pfc_ena_frames_pri6), 435 BNXT_TX_STATS_ENTRY(tx_pfc_ena_frames_pri7), 436 BNXT_TX_STATS_ENTRY(tx_eee_lpi_events), 437 BNXT_TX_STATS_ENTRY(tx_eee_lpi_duration), 438 BNXT_TX_STATS_ENTRY(tx_total_collisions), 439 BNXT_TX_STATS_ENTRY(tx_bytes), 440 BNXT_TX_STATS_ENTRY(tx_xthol_frames), 441 BNXT_TX_STATS_ENTRY(tx_stat_discard), 442 BNXT_TX_STATS_ENTRY(tx_stat_error), 443 }; 444 445 static const struct { 446 long offset; 447 char string[ETH_GSTRING_LEN]; 448 } bnxt_port_stats_ext_arr[] = { 449 BNXT_RX_STATS_EXT_ENTRY(link_down_events), 450 BNXT_RX_STATS_EXT_ENTRY(continuous_pause_events), 451 BNXT_RX_STATS_EXT_ENTRY(resume_pause_events), 452 BNXT_RX_STATS_EXT_ENTRY(continuous_roce_pause_events), 453 BNXT_RX_STATS_EXT_ENTRY(resume_roce_pause_events), 454 BNXT_RX_STATS_EXT_COS_ENTRIES, 455 BNXT_RX_STATS_EXT_PFC_ENTRIES, 456 BNXT_RX_STATS_EXT_ENTRY(rx_bits), 457 BNXT_RX_STATS_EXT_ENTRY(rx_buffer_passed_threshold), 458 BNXT_RX_STATS_EXT_ENTRY(rx_pcs_symbol_err), 459 BNXT_RX_STATS_EXT_ENTRY(rx_corrected_bits), 460 BNXT_RX_STATS_EXT_DISCARD_COS_ENTRIES, 461 BNXT_RX_STATS_EXT_ENTRY(rx_fec_corrected_blocks), 462 BNXT_RX_STATS_EXT_ENTRY(rx_fec_uncorrectable_blocks), 463 BNXT_RX_STATS_EXT_ENTRY(rx_filter_miss), 464 }; 465 466 static const struct { 467 long offset; 468 char string[ETH_GSTRING_LEN]; 469 } bnxt_tx_port_stats_ext_arr[] = { 470 BNXT_TX_STATS_EXT_COS_ENTRIES, 471 BNXT_TX_STATS_EXT_PFC_ENTRIES, 472 }; 473 474 static const struct { 475 long base_off; 476 char string[ETH_GSTRING_LEN]; 477 } bnxt_rx_bytes_pri_arr[] = { 478 BNXT_RX_STATS_PRI_ENTRIES(rx_bytes), 479 }; 480 481 static const struct { 482 long base_off; 483 char string[ETH_GSTRING_LEN]; 484 } bnxt_rx_pkts_pri_arr[] = { 485 BNXT_RX_STATS_PRI_ENTRIES(rx_packets), 486 }; 487 488 static const struct { 489 long base_off; 490 char string[ETH_GSTRING_LEN]; 491 } bnxt_tx_bytes_pri_arr[] = { 492 BNXT_TX_STATS_PRI_ENTRIES(tx_bytes), 493 }; 494 495 static const struct { 496 long base_off; 497 char string[ETH_GSTRING_LEN]; 498 } bnxt_tx_pkts_pri_arr[] = { 499 BNXT_TX_STATS_PRI_ENTRIES(tx_packets), 500 }; 501 502 #define BNXT_NUM_RING_ERR_STATS ARRAY_SIZE(bnxt_ring_err_stats_arr) 503 #define BNXT_NUM_PORT_STATS ARRAY_SIZE(bnxt_port_stats_arr) 504 #define BNXT_NUM_STATS_PRI \ 505 (ARRAY_SIZE(bnxt_rx_bytes_pri_arr) + \ 506 ARRAY_SIZE(bnxt_rx_pkts_pri_arr) + \ 507 ARRAY_SIZE(bnxt_tx_bytes_pri_arr) + \ 508 ARRAY_SIZE(bnxt_tx_pkts_pri_arr)) 509 510 static int bnxt_get_num_tpa_ring_stats(struct bnxt *bp) 511 { 512 if (BNXT_SUPPORTS_TPA(bp)) { 513 if (bp->max_tpa_v2) { 514 if (BNXT_CHIP_P5(bp)) 515 return BNXT_NUM_TPA_RING_STATS_P5; 516 return BNXT_NUM_TPA_RING_STATS_P7; 517 } 518 return BNXT_NUM_TPA_RING_STATS; 519 } 520 return 0; 521 } 522 523 static int bnxt_get_num_ring_stats(struct bnxt *bp) 524 { 525 int rx, tx, cmn; 526 527 rx = NUM_RING_RX_HW_STATS + NUM_RING_RX_SW_STATS + 528 bnxt_get_num_tpa_ring_stats(bp); 529 tx = NUM_RING_TX_HW_STATS; 530 cmn = NUM_RING_CMN_SW_STATS; 531 return rx * bp->rx_nr_rings + 532 tx * (bp->tx_nr_rings_xdp + bp->tx_nr_rings_per_tc) + 533 cmn * bp->cp_nr_rings; 534 } 535 536 static int bnxt_get_num_stats(struct bnxt *bp) 537 { 538 int num_stats = bnxt_get_num_ring_stats(bp); 539 int len; 540 541 num_stats += BNXT_NUM_RING_ERR_STATS; 542 543 if (bp->flags & BNXT_FLAG_PORT_STATS) 544 num_stats += BNXT_NUM_PORT_STATS; 545 546 if (bp->flags & BNXT_FLAG_PORT_STATS_EXT) { 547 len = min_t(int, bp->fw_rx_stats_ext_size, 548 ARRAY_SIZE(bnxt_port_stats_ext_arr)); 549 num_stats += len; 550 len = min_t(int, bp->fw_tx_stats_ext_size, 551 ARRAY_SIZE(bnxt_tx_port_stats_ext_arr)); 552 num_stats += len; 553 if (bp->pri2cos_valid) 554 num_stats += BNXT_NUM_STATS_PRI; 555 } 556 557 return num_stats; 558 } 559 560 static int bnxt_get_sset_count(struct net_device *dev, int sset) 561 { 562 struct bnxt *bp = netdev_priv(dev); 563 564 switch (sset) { 565 case ETH_SS_STATS: 566 return bnxt_get_num_stats(bp); 567 case ETH_SS_TEST: 568 if (!bp->num_tests) 569 return -EOPNOTSUPP; 570 return bp->num_tests; 571 default: 572 return -EOPNOTSUPP; 573 } 574 } 575 576 static bool is_rx_ring(struct bnxt *bp, int ring_num) 577 { 578 return ring_num < bp->rx_nr_rings; 579 } 580 581 static bool is_tx_ring(struct bnxt *bp, int ring_num) 582 { 583 int tx_base = 0; 584 585 if (!(bp->flags & BNXT_FLAG_SHARED_RINGS)) 586 tx_base = bp->rx_nr_rings; 587 588 if (ring_num >= tx_base && ring_num < (tx_base + bp->tx_nr_rings)) 589 return true; 590 return false; 591 } 592 593 static void bnxt_get_ethtool_stats(struct net_device *dev, 594 struct ethtool_stats *stats, u64 *buf) 595 { 596 struct bnxt_total_ring_err_stats ring_err_stats = {0}; 597 struct bnxt *bp = netdev_priv(dev); 598 u64 *curr, *prev; 599 u32 tpa_stats; 600 u32 i, j = 0; 601 602 if (!bp->bnapi) { 603 j += bnxt_get_num_ring_stats(bp); 604 goto skip_ring_stats; 605 } 606 607 tpa_stats = bnxt_get_num_tpa_ring_stats(bp); 608 for (i = 0; i < bp->cp_nr_rings; i++) { 609 struct bnxt_napi *bnapi = bp->bnapi[i]; 610 struct bnxt_cp_ring_info *cpr = &bnapi->cp_ring; 611 u64 *sw_stats = cpr->stats.sw_stats; 612 u64 *sw; 613 int k; 614 615 if (is_rx_ring(bp, i)) { 616 for (k = 0; k < NUM_RING_RX_HW_STATS; j++, k++) 617 buf[j] = sw_stats[k]; 618 } 619 if (is_tx_ring(bp, i)) { 620 k = NUM_RING_RX_HW_STATS; 621 for (; k < NUM_RING_RX_HW_STATS + NUM_RING_TX_HW_STATS; 622 j++, k++) 623 buf[j] = sw_stats[k]; 624 } 625 if (!tpa_stats || !is_rx_ring(bp, i)) 626 goto skip_tpa_ring_stats; 627 628 k = NUM_RING_RX_HW_STATS + NUM_RING_TX_HW_STATS; 629 for (; k < NUM_RING_RX_HW_STATS + NUM_RING_TX_HW_STATS + 630 tpa_stats; j++, k++) 631 buf[j] = sw_stats[k]; 632 633 skip_tpa_ring_stats: 634 sw = (u64 *)&cpr->sw_stats->rx; 635 if (is_rx_ring(bp, i)) { 636 for (k = 0; k < NUM_RING_RX_SW_STATS; j++, k++) 637 buf[j] = sw[k]; 638 } 639 640 sw = (u64 *)&cpr->sw_stats->cmn; 641 for (k = 0; k < NUM_RING_CMN_SW_STATS; j++, k++) 642 buf[j] = sw[k]; 643 } 644 645 bnxt_get_ring_err_stats(bp, &ring_err_stats); 646 647 skip_ring_stats: 648 curr = &ring_err_stats.rx_total_l4_csum_errors; 649 prev = &bp->ring_err_stats_prev.rx_total_l4_csum_errors; 650 for (i = 0; i < BNXT_NUM_RING_ERR_STATS; i++, j++, curr++, prev++) 651 buf[j] = *curr + *prev; 652 653 if (bp->flags & BNXT_FLAG_PORT_STATS) { 654 u64 *port_stats = bp->port_stats.sw_stats; 655 656 for (i = 0; i < BNXT_NUM_PORT_STATS; i++, j++) 657 buf[j] = *(port_stats + bnxt_port_stats_arr[i].offset); 658 } 659 if (bp->flags & BNXT_FLAG_PORT_STATS_EXT) { 660 u64 *rx_port_stats_ext = bp->rx_port_stats_ext.sw_stats; 661 u64 *tx_port_stats_ext = bp->tx_port_stats_ext.sw_stats; 662 u32 len; 663 664 len = min_t(u32, bp->fw_rx_stats_ext_size, 665 ARRAY_SIZE(bnxt_port_stats_ext_arr)); 666 for (i = 0; i < len; i++, j++) { 667 buf[j] = *(rx_port_stats_ext + 668 bnxt_port_stats_ext_arr[i].offset); 669 } 670 len = min_t(u32, bp->fw_tx_stats_ext_size, 671 ARRAY_SIZE(bnxt_tx_port_stats_ext_arr)); 672 for (i = 0; i < len; i++, j++) { 673 buf[j] = *(tx_port_stats_ext + 674 bnxt_tx_port_stats_ext_arr[i].offset); 675 } 676 if (bp->pri2cos_valid) { 677 for (i = 0; i < 8; i++, j++) { 678 long n = bnxt_rx_bytes_pri_arr[i].base_off + 679 bp->pri2cos_idx[i]; 680 681 buf[j] = *(rx_port_stats_ext + n); 682 } 683 for (i = 0; i < 8; i++, j++) { 684 long n = bnxt_rx_pkts_pri_arr[i].base_off + 685 bp->pri2cos_idx[i]; 686 687 buf[j] = *(rx_port_stats_ext + n); 688 } 689 for (i = 0; i < 8; i++, j++) { 690 long n = bnxt_tx_bytes_pri_arr[i].base_off + 691 bp->pri2cos_idx[i]; 692 693 buf[j] = *(tx_port_stats_ext + n); 694 } 695 for (i = 0; i < 8; i++, j++) { 696 long n = bnxt_tx_pkts_pri_arr[i].base_off + 697 bp->pri2cos_idx[i]; 698 699 buf[j] = *(tx_port_stats_ext + n); 700 } 701 } 702 } 703 } 704 705 static void bnxt_get_strings(struct net_device *dev, u32 stringset, u8 *buf) 706 { 707 struct bnxt *bp = netdev_priv(dev); 708 static const char * const *str; 709 u32 i, j, num_str; 710 711 switch (stringset) { 712 case ETH_SS_STATS: 713 for (i = 0; i < bp->cp_nr_rings; i++) { 714 if (is_rx_ring(bp, i)) { 715 num_str = NUM_RING_RX_HW_STATS; 716 for (j = 0; j < num_str; j++) { 717 sprintf(buf, "[%d]: %s", i, 718 bnxt_ring_rx_stats_str[j]); 719 buf += ETH_GSTRING_LEN; 720 } 721 } 722 if (is_tx_ring(bp, i)) { 723 num_str = NUM_RING_TX_HW_STATS; 724 for (j = 0; j < num_str; j++) { 725 sprintf(buf, "[%d]: %s", i, 726 bnxt_ring_tx_stats_str[j]); 727 buf += ETH_GSTRING_LEN; 728 } 729 } 730 num_str = bnxt_get_num_tpa_ring_stats(bp); 731 if (!num_str || !is_rx_ring(bp, i)) 732 goto skip_tpa_stats; 733 734 if (bp->max_tpa_v2) 735 str = bnxt_ring_tpa2_stats_str; 736 else 737 str = bnxt_ring_tpa_stats_str; 738 739 for (j = 0; j < num_str; j++) { 740 sprintf(buf, "[%d]: %s", i, str[j]); 741 buf += ETH_GSTRING_LEN; 742 } 743 skip_tpa_stats: 744 if (is_rx_ring(bp, i)) { 745 num_str = NUM_RING_RX_SW_STATS; 746 for (j = 0; j < num_str; j++) { 747 sprintf(buf, "[%d]: %s", i, 748 bnxt_rx_sw_stats_str[j]); 749 buf += ETH_GSTRING_LEN; 750 } 751 } 752 num_str = NUM_RING_CMN_SW_STATS; 753 for (j = 0; j < num_str; j++) { 754 sprintf(buf, "[%d]: %s", i, 755 bnxt_cmn_sw_stats_str[j]); 756 buf += ETH_GSTRING_LEN; 757 } 758 } 759 for (i = 0; i < BNXT_NUM_RING_ERR_STATS; i++) { 760 strscpy(buf, bnxt_ring_err_stats_arr[i], ETH_GSTRING_LEN); 761 buf += ETH_GSTRING_LEN; 762 } 763 764 if (bp->flags & BNXT_FLAG_PORT_STATS) { 765 for (i = 0; i < BNXT_NUM_PORT_STATS; i++) { 766 strcpy(buf, bnxt_port_stats_arr[i].string); 767 buf += ETH_GSTRING_LEN; 768 } 769 } 770 if (bp->flags & BNXT_FLAG_PORT_STATS_EXT) { 771 u32 len; 772 773 len = min_t(u32, bp->fw_rx_stats_ext_size, 774 ARRAY_SIZE(bnxt_port_stats_ext_arr)); 775 for (i = 0; i < len; i++) { 776 strcpy(buf, bnxt_port_stats_ext_arr[i].string); 777 buf += ETH_GSTRING_LEN; 778 } 779 len = min_t(u32, bp->fw_tx_stats_ext_size, 780 ARRAY_SIZE(bnxt_tx_port_stats_ext_arr)); 781 for (i = 0; i < len; i++) { 782 strcpy(buf, 783 bnxt_tx_port_stats_ext_arr[i].string); 784 buf += ETH_GSTRING_LEN; 785 } 786 if (bp->pri2cos_valid) { 787 for (i = 0; i < 8; i++) { 788 strcpy(buf, 789 bnxt_rx_bytes_pri_arr[i].string); 790 buf += ETH_GSTRING_LEN; 791 } 792 for (i = 0; i < 8; i++) { 793 strcpy(buf, 794 bnxt_rx_pkts_pri_arr[i].string); 795 buf += ETH_GSTRING_LEN; 796 } 797 for (i = 0; i < 8; i++) { 798 strcpy(buf, 799 bnxt_tx_bytes_pri_arr[i].string); 800 buf += ETH_GSTRING_LEN; 801 } 802 for (i = 0; i < 8; i++) { 803 strcpy(buf, 804 bnxt_tx_pkts_pri_arr[i].string); 805 buf += ETH_GSTRING_LEN; 806 } 807 } 808 } 809 break; 810 case ETH_SS_TEST: 811 if (bp->num_tests) 812 memcpy(buf, bp->test_info->string, 813 bp->num_tests * ETH_GSTRING_LEN); 814 break; 815 default: 816 netdev_err(bp->dev, "bnxt_get_strings invalid request %x\n", 817 stringset); 818 break; 819 } 820 } 821 822 static void bnxt_get_ringparam(struct net_device *dev, 823 struct ethtool_ringparam *ering, 824 struct kernel_ethtool_ringparam *kernel_ering, 825 struct netlink_ext_ack *extack) 826 { 827 struct bnxt *bp = netdev_priv(dev); 828 829 if (bp->flags & BNXT_FLAG_AGG_RINGS) { 830 ering->rx_max_pending = BNXT_MAX_RX_DESC_CNT_JUM_ENA; 831 ering->rx_jumbo_max_pending = BNXT_MAX_RX_JUM_DESC_CNT; 832 kernel_ering->tcp_data_split = ETHTOOL_TCP_DATA_SPLIT_ENABLED; 833 } else { 834 ering->rx_max_pending = BNXT_MAX_RX_DESC_CNT; 835 ering->rx_jumbo_max_pending = 0; 836 kernel_ering->tcp_data_split = ETHTOOL_TCP_DATA_SPLIT_DISABLED; 837 } 838 ering->tx_max_pending = BNXT_MAX_TX_DESC_CNT; 839 840 ering->rx_pending = bp->rx_ring_size; 841 ering->rx_jumbo_pending = bp->rx_agg_ring_size; 842 ering->tx_pending = bp->tx_ring_size; 843 } 844 845 static int bnxt_set_ringparam(struct net_device *dev, 846 struct ethtool_ringparam *ering, 847 struct kernel_ethtool_ringparam *kernel_ering, 848 struct netlink_ext_ack *extack) 849 { 850 struct bnxt *bp = netdev_priv(dev); 851 852 if ((ering->rx_pending > BNXT_MAX_RX_DESC_CNT) || 853 (ering->tx_pending > BNXT_MAX_TX_DESC_CNT) || 854 (ering->tx_pending < BNXT_MIN_TX_DESC_CNT)) 855 return -EINVAL; 856 857 if (netif_running(dev)) 858 bnxt_close_nic(bp, false, false); 859 860 bp->rx_ring_size = ering->rx_pending; 861 bp->tx_ring_size = ering->tx_pending; 862 bnxt_set_ring_params(bp); 863 864 if (netif_running(dev)) 865 return bnxt_open_nic(bp, false, false); 866 867 return 0; 868 } 869 870 static void bnxt_get_channels(struct net_device *dev, 871 struct ethtool_channels *channel) 872 { 873 struct bnxt *bp = netdev_priv(dev); 874 struct bnxt_hw_resc *hw_resc = &bp->hw_resc; 875 int max_rx_rings, max_tx_rings, tcs; 876 int max_tx_sch_inputs, tx_grps; 877 878 /* Get the most up-to-date max_tx_sch_inputs. */ 879 if (netif_running(dev) && BNXT_NEW_RM(bp)) 880 bnxt_hwrm_func_resc_qcaps(bp, false); 881 max_tx_sch_inputs = hw_resc->max_tx_sch_inputs; 882 883 bnxt_get_max_rings(bp, &max_rx_rings, &max_tx_rings, true); 884 if (max_tx_sch_inputs) 885 max_tx_rings = min_t(int, max_tx_rings, max_tx_sch_inputs); 886 887 tcs = bp->num_tc; 888 tx_grps = max(tcs, 1); 889 if (bp->tx_nr_rings_xdp) 890 tx_grps++; 891 max_tx_rings /= tx_grps; 892 channel->max_combined = min_t(int, max_rx_rings, max_tx_rings); 893 894 if (bnxt_get_max_rings(bp, &max_rx_rings, &max_tx_rings, false)) { 895 max_rx_rings = 0; 896 max_tx_rings = 0; 897 } 898 if (max_tx_sch_inputs) 899 max_tx_rings = min_t(int, max_tx_rings, max_tx_sch_inputs); 900 901 if (tcs > 1) 902 max_tx_rings /= tcs; 903 904 channel->max_rx = max_rx_rings; 905 channel->max_tx = max_tx_rings; 906 channel->max_other = 0; 907 if (bp->flags & BNXT_FLAG_SHARED_RINGS) { 908 channel->combined_count = bp->rx_nr_rings; 909 if (BNXT_CHIP_TYPE_NITRO_A0(bp)) 910 channel->combined_count--; 911 } else { 912 if (!BNXT_CHIP_TYPE_NITRO_A0(bp)) { 913 channel->rx_count = bp->rx_nr_rings; 914 channel->tx_count = bp->tx_nr_rings_per_tc; 915 } 916 } 917 } 918 919 static int bnxt_set_channels(struct net_device *dev, 920 struct ethtool_channels *channel) 921 { 922 struct bnxt *bp = netdev_priv(dev); 923 int req_tx_rings, req_rx_rings, tcs; 924 bool sh = false; 925 int tx_xdp = 0; 926 int rc = 0; 927 int tx_cp; 928 929 if (channel->other_count) 930 return -EINVAL; 931 932 if (!channel->combined_count && 933 (!channel->rx_count || !channel->tx_count)) 934 return -EINVAL; 935 936 if (channel->combined_count && 937 (channel->rx_count || channel->tx_count)) 938 return -EINVAL; 939 940 if (BNXT_CHIP_TYPE_NITRO_A0(bp) && (channel->rx_count || 941 channel->tx_count)) 942 return -EINVAL; 943 944 if (channel->combined_count) 945 sh = true; 946 947 tcs = bp->num_tc; 948 949 req_tx_rings = sh ? channel->combined_count : channel->tx_count; 950 req_rx_rings = sh ? channel->combined_count : channel->rx_count; 951 if (bp->tx_nr_rings_xdp) { 952 if (!sh) { 953 netdev_err(dev, "Only combined mode supported when XDP is enabled.\n"); 954 return -EINVAL; 955 } 956 tx_xdp = req_rx_rings; 957 } 958 rc = bnxt_check_rings(bp, req_tx_rings, req_rx_rings, sh, tcs, tx_xdp); 959 if (rc) { 960 netdev_warn(dev, "Unable to allocate the requested rings\n"); 961 return rc; 962 } 963 964 if (bnxt_get_nr_rss_ctxs(bp, req_rx_rings) != 965 bnxt_get_nr_rss_ctxs(bp, bp->rx_nr_rings) && 966 netif_is_rxfh_configured(dev)) { 967 netdev_warn(dev, "RSS table size change required, RSS table entries must be default to proceed\n"); 968 return -EINVAL; 969 } 970 971 if (netif_running(dev)) { 972 if (BNXT_PF(bp)) { 973 /* TODO CHIMP_FW: Send message to all VF's 974 * before PF unload 975 */ 976 } 977 bnxt_close_nic(bp, true, false); 978 } 979 980 if (sh) { 981 bp->flags |= BNXT_FLAG_SHARED_RINGS; 982 bp->rx_nr_rings = channel->combined_count; 983 bp->tx_nr_rings_per_tc = channel->combined_count; 984 } else { 985 bp->flags &= ~BNXT_FLAG_SHARED_RINGS; 986 bp->rx_nr_rings = channel->rx_count; 987 bp->tx_nr_rings_per_tc = channel->tx_count; 988 } 989 bp->tx_nr_rings_xdp = tx_xdp; 990 bp->tx_nr_rings = bp->tx_nr_rings_per_tc + tx_xdp; 991 if (tcs > 1) 992 bp->tx_nr_rings = bp->tx_nr_rings_per_tc * tcs + tx_xdp; 993 994 tx_cp = bnxt_num_tx_to_cp(bp, bp->tx_nr_rings); 995 bp->cp_nr_rings = sh ? max_t(int, tx_cp, bp->rx_nr_rings) : 996 tx_cp + bp->rx_nr_rings; 997 998 /* After changing number of rx channels, update NTUPLE feature. */ 999 netdev_update_features(dev); 1000 if (netif_running(dev)) { 1001 rc = bnxt_open_nic(bp, true, false); 1002 if ((!rc) && BNXT_PF(bp)) { 1003 /* TODO CHIMP_FW: Send message to all VF's 1004 * to renable 1005 */ 1006 } 1007 } else { 1008 rc = bnxt_reserve_rings(bp, true); 1009 } 1010 1011 return rc; 1012 } 1013 1014 static u32 bnxt_get_all_fltr_ids_rcu(struct bnxt *bp, struct hlist_head tbl[], 1015 int tbl_size, u32 *ids, u32 start, 1016 u32 id_cnt) 1017 { 1018 int i, j = start; 1019 1020 if (j >= id_cnt) 1021 return j; 1022 for (i = 0; i < tbl_size; i++) { 1023 struct hlist_head *head; 1024 struct bnxt_filter_base *fltr; 1025 1026 head = &tbl[i]; 1027 hlist_for_each_entry_rcu(fltr, head, hash) { 1028 if (!fltr->flags || 1029 test_bit(BNXT_FLTR_FW_DELETED, &fltr->state)) 1030 continue; 1031 ids[j++] = fltr->sw_id; 1032 if (j == id_cnt) 1033 return j; 1034 } 1035 } 1036 return j; 1037 } 1038 1039 static struct bnxt_filter_base *bnxt_get_one_fltr_rcu(struct bnxt *bp, 1040 struct hlist_head tbl[], 1041 int tbl_size, u32 id) 1042 { 1043 int i; 1044 1045 for (i = 0; i < tbl_size; i++) { 1046 struct hlist_head *head; 1047 struct bnxt_filter_base *fltr; 1048 1049 head = &tbl[i]; 1050 hlist_for_each_entry_rcu(fltr, head, hash) { 1051 if (fltr->flags && fltr->sw_id == id) 1052 return fltr; 1053 } 1054 } 1055 return NULL; 1056 } 1057 1058 static int bnxt_grxclsrlall(struct bnxt *bp, struct ethtool_rxnfc *cmd, 1059 u32 *rule_locs) 1060 { 1061 u32 count; 1062 1063 cmd->data = bp->ntp_fltr_count; 1064 rcu_read_lock(); 1065 count = bnxt_get_all_fltr_ids_rcu(bp, bp->l2_fltr_hash_tbl, 1066 BNXT_L2_FLTR_HASH_SIZE, rule_locs, 0, 1067 cmd->rule_cnt); 1068 cmd->rule_cnt = bnxt_get_all_fltr_ids_rcu(bp, bp->ntp_fltr_hash_tbl, 1069 BNXT_NTP_FLTR_HASH_SIZE, 1070 rule_locs, count, 1071 cmd->rule_cnt); 1072 rcu_read_unlock(); 1073 1074 return 0; 1075 } 1076 1077 static int bnxt_grxclsrule(struct bnxt *bp, struct ethtool_rxnfc *cmd) 1078 { 1079 struct ethtool_rx_flow_spec *fs = 1080 (struct ethtool_rx_flow_spec *)&cmd->fs; 1081 struct bnxt_filter_base *fltr_base; 1082 struct bnxt_ntuple_filter *fltr; 1083 struct bnxt_flow_masks *fmasks; 1084 struct flow_keys *fkeys; 1085 int rc = -EINVAL; 1086 1087 if (fs->location >= bp->max_fltr) 1088 return rc; 1089 1090 rcu_read_lock(); 1091 fltr_base = bnxt_get_one_fltr_rcu(bp, bp->l2_fltr_hash_tbl, 1092 BNXT_L2_FLTR_HASH_SIZE, 1093 fs->location); 1094 if (fltr_base) { 1095 struct ethhdr *h_ether = &fs->h_u.ether_spec; 1096 struct ethhdr *m_ether = &fs->m_u.ether_spec; 1097 struct bnxt_l2_filter *l2_fltr; 1098 struct bnxt_l2_key *l2_key; 1099 1100 l2_fltr = container_of(fltr_base, struct bnxt_l2_filter, base); 1101 l2_key = &l2_fltr->l2_key; 1102 fs->flow_type = ETHER_FLOW; 1103 ether_addr_copy(h_ether->h_dest, l2_key->dst_mac_addr); 1104 eth_broadcast_addr(m_ether->h_dest); 1105 if (l2_key->vlan) { 1106 struct ethtool_flow_ext *m_ext = &fs->m_ext; 1107 struct ethtool_flow_ext *h_ext = &fs->h_ext; 1108 1109 fs->flow_type |= FLOW_EXT; 1110 m_ext->vlan_tci = htons(0xfff); 1111 h_ext->vlan_tci = htons(l2_key->vlan); 1112 } 1113 if (fltr_base->flags & BNXT_ACT_RING_DST) 1114 fs->ring_cookie = fltr_base->rxq; 1115 if (fltr_base->flags & BNXT_ACT_FUNC_DST) 1116 fs->ring_cookie = (u64)(fltr_base->vf_idx + 1) << 1117 ETHTOOL_RX_FLOW_SPEC_RING_VF_OFF; 1118 rcu_read_unlock(); 1119 return 0; 1120 } 1121 fltr_base = bnxt_get_one_fltr_rcu(bp, bp->ntp_fltr_hash_tbl, 1122 BNXT_NTP_FLTR_HASH_SIZE, 1123 fs->location); 1124 if (!fltr_base) { 1125 rcu_read_unlock(); 1126 return rc; 1127 } 1128 fltr = container_of(fltr_base, struct bnxt_ntuple_filter, base); 1129 1130 fkeys = &fltr->fkeys; 1131 fmasks = &fltr->fmasks; 1132 if (fkeys->basic.n_proto == htons(ETH_P_IP)) { 1133 if (fkeys->basic.ip_proto == IPPROTO_ICMP || 1134 fkeys->basic.ip_proto == IPPROTO_RAW) { 1135 fs->flow_type = IP_USER_FLOW; 1136 fs->h_u.usr_ip4_spec.ip_ver = ETH_RX_NFC_IP4; 1137 if (fkeys->basic.ip_proto == IPPROTO_ICMP) 1138 fs->h_u.usr_ip4_spec.proto = IPPROTO_ICMP; 1139 else 1140 fs->h_u.usr_ip4_spec.proto = IPPROTO_RAW; 1141 fs->m_u.usr_ip4_spec.proto = BNXT_IP_PROTO_FULL_MASK; 1142 } else if (fkeys->basic.ip_proto == IPPROTO_TCP) { 1143 fs->flow_type = TCP_V4_FLOW; 1144 } else if (fkeys->basic.ip_proto == IPPROTO_UDP) { 1145 fs->flow_type = UDP_V4_FLOW; 1146 } else { 1147 goto fltr_err; 1148 } 1149 1150 fs->h_u.tcp_ip4_spec.ip4src = fkeys->addrs.v4addrs.src; 1151 fs->m_u.tcp_ip4_spec.ip4src = fmasks->addrs.v4addrs.src; 1152 fs->h_u.tcp_ip4_spec.ip4dst = fkeys->addrs.v4addrs.dst; 1153 fs->m_u.tcp_ip4_spec.ip4dst = fmasks->addrs.v4addrs.dst; 1154 if (fs->flow_type == TCP_V4_FLOW || 1155 fs->flow_type == UDP_V4_FLOW) { 1156 fs->h_u.tcp_ip4_spec.psrc = fkeys->ports.src; 1157 fs->m_u.tcp_ip4_spec.psrc = fmasks->ports.src; 1158 fs->h_u.tcp_ip4_spec.pdst = fkeys->ports.dst; 1159 fs->m_u.tcp_ip4_spec.pdst = fmasks->ports.dst; 1160 } 1161 } else { 1162 if (fkeys->basic.ip_proto == IPPROTO_ICMPV6 || 1163 fkeys->basic.ip_proto == IPPROTO_RAW) { 1164 fs->flow_type = IPV6_USER_FLOW; 1165 if (fkeys->basic.ip_proto == IPPROTO_ICMPV6) 1166 fs->h_u.usr_ip6_spec.l4_proto = IPPROTO_ICMPV6; 1167 else 1168 fs->h_u.usr_ip6_spec.l4_proto = IPPROTO_RAW; 1169 fs->m_u.usr_ip6_spec.l4_proto = BNXT_IP_PROTO_FULL_MASK; 1170 } else if (fkeys->basic.ip_proto == IPPROTO_TCP) { 1171 fs->flow_type = TCP_V6_FLOW; 1172 } else if (fkeys->basic.ip_proto == IPPROTO_UDP) { 1173 fs->flow_type = UDP_V6_FLOW; 1174 } else { 1175 goto fltr_err; 1176 } 1177 1178 *(struct in6_addr *)&fs->h_u.tcp_ip6_spec.ip6src[0] = 1179 fkeys->addrs.v6addrs.src; 1180 *(struct in6_addr *)&fs->m_u.tcp_ip6_spec.ip6src[0] = 1181 fmasks->addrs.v6addrs.src; 1182 *(struct in6_addr *)&fs->h_u.tcp_ip6_spec.ip6dst[0] = 1183 fkeys->addrs.v6addrs.dst; 1184 *(struct in6_addr *)&fs->m_u.tcp_ip6_spec.ip6dst[0] = 1185 fmasks->addrs.v6addrs.dst; 1186 if (fs->flow_type == TCP_V6_FLOW || 1187 fs->flow_type == UDP_V6_FLOW) { 1188 fs->h_u.tcp_ip6_spec.psrc = fkeys->ports.src; 1189 fs->m_u.tcp_ip6_spec.psrc = fmasks->ports.src; 1190 fs->h_u.tcp_ip6_spec.pdst = fkeys->ports.dst; 1191 fs->m_u.tcp_ip6_spec.pdst = fmasks->ports.dst; 1192 } 1193 } 1194 1195 if (fltr->base.flags & BNXT_ACT_DROP) 1196 fs->ring_cookie = RX_CLS_FLOW_DISC; 1197 else 1198 fs->ring_cookie = fltr->base.rxq; 1199 rc = 0; 1200 1201 fltr_err: 1202 rcu_read_unlock(); 1203 1204 return rc; 1205 } 1206 1207 static struct bnxt_rss_ctx *bnxt_get_rss_ctx_from_index(struct bnxt *bp, 1208 u32 index) 1209 { 1210 struct ethtool_rxfh_context *ctx; 1211 1212 ctx = xa_load(&bp->dev->ethtool->rss_ctx, index); 1213 if (!ctx) 1214 return NULL; 1215 return ethtool_rxfh_context_priv(ctx); 1216 } 1217 1218 static int bnxt_alloc_vnic_rss_table(struct bnxt *bp, 1219 struct bnxt_vnic_info *vnic) 1220 { 1221 int size = L1_CACHE_ALIGN(BNXT_MAX_RSS_TABLE_SIZE_P5); 1222 1223 vnic->rss_table_size = size + HW_HASH_KEY_SIZE; 1224 vnic->rss_table = dma_alloc_coherent(&bp->pdev->dev, 1225 vnic->rss_table_size, 1226 &vnic->rss_table_dma_addr, 1227 GFP_KERNEL); 1228 if (!vnic->rss_table) 1229 return -ENOMEM; 1230 1231 vnic->rss_hash_key = ((void *)vnic->rss_table) + size; 1232 vnic->rss_hash_key_dma_addr = vnic->rss_table_dma_addr + size; 1233 return 0; 1234 } 1235 1236 static int bnxt_add_l2_cls_rule(struct bnxt *bp, 1237 struct ethtool_rx_flow_spec *fs) 1238 { 1239 u32 ring = ethtool_get_flow_spec_ring(fs->ring_cookie); 1240 u8 vf = ethtool_get_flow_spec_ring_vf(fs->ring_cookie); 1241 struct ethhdr *h_ether = &fs->h_u.ether_spec; 1242 struct ethhdr *m_ether = &fs->m_u.ether_spec; 1243 struct bnxt_l2_filter *fltr; 1244 struct bnxt_l2_key key; 1245 u16 vnic_id; 1246 u8 flags; 1247 int rc; 1248 1249 if (BNXT_CHIP_P5_PLUS(bp)) 1250 return -EOPNOTSUPP; 1251 1252 if (!is_broadcast_ether_addr(m_ether->h_dest)) 1253 return -EINVAL; 1254 ether_addr_copy(key.dst_mac_addr, h_ether->h_dest); 1255 key.vlan = 0; 1256 if (fs->flow_type & FLOW_EXT) { 1257 struct ethtool_flow_ext *m_ext = &fs->m_ext; 1258 struct ethtool_flow_ext *h_ext = &fs->h_ext; 1259 1260 if (m_ext->vlan_tci != htons(0xfff) || !h_ext->vlan_tci) 1261 return -EINVAL; 1262 key.vlan = ntohs(h_ext->vlan_tci); 1263 } 1264 1265 if (vf) { 1266 flags = BNXT_ACT_FUNC_DST; 1267 vnic_id = 0xffff; 1268 vf--; 1269 } else { 1270 flags = BNXT_ACT_RING_DST; 1271 vnic_id = bp->vnic_info[ring + 1].fw_vnic_id; 1272 } 1273 fltr = bnxt_alloc_new_l2_filter(bp, &key, flags); 1274 if (IS_ERR(fltr)) 1275 return PTR_ERR(fltr); 1276 1277 fltr->base.fw_vnic_id = vnic_id; 1278 fltr->base.rxq = ring; 1279 fltr->base.vf_idx = vf; 1280 rc = bnxt_hwrm_l2_filter_alloc(bp, fltr); 1281 if (rc) 1282 bnxt_del_l2_filter(bp, fltr); 1283 else 1284 fs->location = fltr->base.sw_id; 1285 return rc; 1286 } 1287 1288 static bool bnxt_verify_ntuple_ip4_flow(struct ethtool_usrip4_spec *ip_spec, 1289 struct ethtool_usrip4_spec *ip_mask) 1290 { 1291 if (ip_mask->l4_4_bytes || ip_mask->tos || 1292 ip_spec->ip_ver != ETH_RX_NFC_IP4 || 1293 ip_mask->proto != BNXT_IP_PROTO_FULL_MASK || 1294 (ip_spec->proto != IPPROTO_RAW && ip_spec->proto != IPPROTO_ICMP)) 1295 return false; 1296 return true; 1297 } 1298 1299 static bool bnxt_verify_ntuple_ip6_flow(struct ethtool_usrip6_spec *ip_spec, 1300 struct ethtool_usrip6_spec *ip_mask) 1301 { 1302 if (ip_mask->l4_4_bytes || ip_mask->tclass || 1303 ip_mask->l4_proto != BNXT_IP_PROTO_FULL_MASK || 1304 (ip_spec->l4_proto != IPPROTO_RAW && 1305 ip_spec->l4_proto != IPPROTO_ICMPV6)) 1306 return false; 1307 return true; 1308 } 1309 1310 static int bnxt_add_ntuple_cls_rule(struct bnxt *bp, 1311 struct ethtool_rxnfc *cmd) 1312 { 1313 struct ethtool_rx_flow_spec *fs = &cmd->fs; 1314 struct bnxt_ntuple_filter *new_fltr, *fltr; 1315 u32 flow_type = fs->flow_type & 0xff; 1316 struct bnxt_l2_filter *l2_fltr; 1317 struct bnxt_flow_masks *fmasks; 1318 struct flow_keys *fkeys; 1319 u32 idx, ring; 1320 int rc; 1321 u8 vf; 1322 1323 if (!bp->vnic_info) 1324 return -EAGAIN; 1325 1326 vf = ethtool_get_flow_spec_ring_vf(fs->ring_cookie); 1327 ring = ethtool_get_flow_spec_ring(fs->ring_cookie); 1328 if ((fs->flow_type & (FLOW_MAC_EXT | FLOW_EXT)) || vf) 1329 return -EOPNOTSUPP; 1330 1331 if (flow_type == IP_USER_FLOW) { 1332 if (!bnxt_verify_ntuple_ip4_flow(&fs->h_u.usr_ip4_spec, 1333 &fs->m_u.usr_ip4_spec)) 1334 return -EOPNOTSUPP; 1335 } 1336 1337 if (flow_type == IPV6_USER_FLOW) { 1338 if (!bnxt_verify_ntuple_ip6_flow(&fs->h_u.usr_ip6_spec, 1339 &fs->m_u.usr_ip6_spec)) 1340 return -EOPNOTSUPP; 1341 } 1342 1343 new_fltr = kzalloc(sizeof(*new_fltr), GFP_KERNEL); 1344 if (!new_fltr) 1345 return -ENOMEM; 1346 1347 l2_fltr = bp->vnic_info[BNXT_VNIC_DEFAULT].l2_filters[0]; 1348 atomic_inc(&l2_fltr->refcnt); 1349 new_fltr->l2_fltr = l2_fltr; 1350 fmasks = &new_fltr->fmasks; 1351 fkeys = &new_fltr->fkeys; 1352 1353 rc = -EOPNOTSUPP; 1354 switch (flow_type) { 1355 case IP_USER_FLOW: { 1356 struct ethtool_usrip4_spec *ip_spec = &fs->h_u.usr_ip4_spec; 1357 struct ethtool_usrip4_spec *ip_mask = &fs->m_u.usr_ip4_spec; 1358 1359 fkeys->basic.ip_proto = ip_spec->proto; 1360 fkeys->basic.n_proto = htons(ETH_P_IP); 1361 fkeys->addrs.v4addrs.src = ip_spec->ip4src; 1362 fmasks->addrs.v4addrs.src = ip_mask->ip4src; 1363 fkeys->addrs.v4addrs.dst = ip_spec->ip4dst; 1364 fmasks->addrs.v4addrs.dst = ip_mask->ip4dst; 1365 break; 1366 } 1367 case TCP_V4_FLOW: 1368 case UDP_V4_FLOW: { 1369 struct ethtool_tcpip4_spec *ip_spec = &fs->h_u.tcp_ip4_spec; 1370 struct ethtool_tcpip4_spec *ip_mask = &fs->m_u.tcp_ip4_spec; 1371 1372 fkeys->basic.ip_proto = IPPROTO_TCP; 1373 if (flow_type == UDP_V4_FLOW) 1374 fkeys->basic.ip_proto = IPPROTO_UDP; 1375 fkeys->basic.n_proto = htons(ETH_P_IP); 1376 fkeys->addrs.v4addrs.src = ip_spec->ip4src; 1377 fmasks->addrs.v4addrs.src = ip_mask->ip4src; 1378 fkeys->addrs.v4addrs.dst = ip_spec->ip4dst; 1379 fmasks->addrs.v4addrs.dst = ip_mask->ip4dst; 1380 fkeys->ports.src = ip_spec->psrc; 1381 fmasks->ports.src = ip_mask->psrc; 1382 fkeys->ports.dst = ip_spec->pdst; 1383 fmasks->ports.dst = ip_mask->pdst; 1384 break; 1385 } 1386 case IPV6_USER_FLOW: { 1387 struct ethtool_usrip6_spec *ip_spec = &fs->h_u.usr_ip6_spec; 1388 struct ethtool_usrip6_spec *ip_mask = &fs->m_u.usr_ip6_spec; 1389 1390 fkeys->basic.ip_proto = ip_spec->l4_proto; 1391 fkeys->basic.n_proto = htons(ETH_P_IPV6); 1392 fkeys->addrs.v6addrs.src = *(struct in6_addr *)&ip_spec->ip6src; 1393 fmasks->addrs.v6addrs.src = *(struct in6_addr *)&ip_mask->ip6src; 1394 fkeys->addrs.v6addrs.dst = *(struct in6_addr *)&ip_spec->ip6dst; 1395 fmasks->addrs.v6addrs.dst = *(struct in6_addr *)&ip_mask->ip6dst; 1396 break; 1397 } 1398 case TCP_V6_FLOW: 1399 case UDP_V6_FLOW: { 1400 struct ethtool_tcpip6_spec *ip_spec = &fs->h_u.tcp_ip6_spec; 1401 struct ethtool_tcpip6_spec *ip_mask = &fs->m_u.tcp_ip6_spec; 1402 1403 fkeys->basic.ip_proto = IPPROTO_TCP; 1404 if (flow_type == UDP_V6_FLOW) 1405 fkeys->basic.ip_proto = IPPROTO_UDP; 1406 fkeys->basic.n_proto = htons(ETH_P_IPV6); 1407 1408 fkeys->addrs.v6addrs.src = *(struct in6_addr *)&ip_spec->ip6src; 1409 fmasks->addrs.v6addrs.src = *(struct in6_addr *)&ip_mask->ip6src; 1410 fkeys->addrs.v6addrs.dst = *(struct in6_addr *)&ip_spec->ip6dst; 1411 fmasks->addrs.v6addrs.dst = *(struct in6_addr *)&ip_mask->ip6dst; 1412 fkeys->ports.src = ip_spec->psrc; 1413 fmasks->ports.src = ip_mask->psrc; 1414 fkeys->ports.dst = ip_spec->pdst; 1415 fmasks->ports.dst = ip_mask->pdst; 1416 break; 1417 } 1418 default: 1419 rc = -EOPNOTSUPP; 1420 goto ntuple_err; 1421 } 1422 if (!memcmp(&BNXT_FLOW_MASK_NONE, fmasks, sizeof(*fmasks))) 1423 goto ntuple_err; 1424 1425 idx = bnxt_get_ntp_filter_idx(bp, fkeys, NULL); 1426 rcu_read_lock(); 1427 fltr = bnxt_lookup_ntp_filter_from_idx(bp, new_fltr, idx); 1428 if (fltr) { 1429 rcu_read_unlock(); 1430 rc = -EEXIST; 1431 goto ntuple_err; 1432 } 1433 rcu_read_unlock(); 1434 1435 new_fltr->base.flags = BNXT_ACT_NO_AGING; 1436 if (fs->flow_type & FLOW_RSS) { 1437 struct bnxt_rss_ctx *rss_ctx; 1438 1439 new_fltr->base.fw_vnic_id = 0; 1440 new_fltr->base.flags |= BNXT_ACT_RSS_CTX; 1441 rss_ctx = bnxt_get_rss_ctx_from_index(bp, cmd->rss_context); 1442 if (rss_ctx) { 1443 new_fltr->base.fw_vnic_id = rss_ctx->index; 1444 } else { 1445 rc = -EINVAL; 1446 goto ntuple_err; 1447 } 1448 } 1449 if (fs->ring_cookie == RX_CLS_FLOW_DISC) 1450 new_fltr->base.flags |= BNXT_ACT_DROP; 1451 else 1452 new_fltr->base.rxq = ring; 1453 __set_bit(BNXT_FLTR_VALID, &new_fltr->base.state); 1454 rc = bnxt_insert_ntp_filter(bp, new_fltr, idx); 1455 if (!rc) { 1456 rc = bnxt_hwrm_cfa_ntuple_filter_alloc(bp, new_fltr); 1457 if (rc) { 1458 bnxt_del_ntp_filter(bp, new_fltr); 1459 return rc; 1460 } 1461 fs->location = new_fltr->base.sw_id; 1462 return 0; 1463 } 1464 1465 ntuple_err: 1466 atomic_dec(&l2_fltr->refcnt); 1467 kfree(new_fltr); 1468 return rc; 1469 } 1470 1471 static int bnxt_srxclsrlins(struct bnxt *bp, struct ethtool_rxnfc *cmd) 1472 { 1473 struct ethtool_rx_flow_spec *fs = &cmd->fs; 1474 u32 ring, flow_type; 1475 int rc; 1476 u8 vf; 1477 1478 if (!netif_running(bp->dev)) 1479 return -EAGAIN; 1480 if (!(bp->flags & BNXT_FLAG_RFS)) 1481 return -EPERM; 1482 if (fs->location != RX_CLS_LOC_ANY) 1483 return -EINVAL; 1484 1485 flow_type = fs->flow_type; 1486 if ((flow_type == IP_USER_FLOW || 1487 flow_type == IPV6_USER_FLOW) && 1488 !(bp->fw_cap & BNXT_FW_CAP_CFA_NTUPLE_RX_EXT_IP_PROTO)) 1489 return -EOPNOTSUPP; 1490 if (flow_type & FLOW_MAC_EXT) 1491 return -EINVAL; 1492 flow_type &= ~FLOW_EXT; 1493 1494 if (fs->ring_cookie == RX_CLS_FLOW_DISC && flow_type != ETHER_FLOW) 1495 return bnxt_add_ntuple_cls_rule(bp, cmd); 1496 1497 ring = ethtool_get_flow_spec_ring(fs->ring_cookie); 1498 vf = ethtool_get_flow_spec_ring_vf(fs->ring_cookie); 1499 if (BNXT_VF(bp) && vf) 1500 return -EINVAL; 1501 if (BNXT_PF(bp) && vf > bp->pf.active_vfs) 1502 return -EINVAL; 1503 if (!vf && ring >= bp->rx_nr_rings) 1504 return -EINVAL; 1505 1506 if (flow_type == ETHER_FLOW) 1507 rc = bnxt_add_l2_cls_rule(bp, fs); 1508 else 1509 rc = bnxt_add_ntuple_cls_rule(bp, cmd); 1510 return rc; 1511 } 1512 1513 static int bnxt_srxclsrldel(struct bnxt *bp, struct ethtool_rxnfc *cmd) 1514 { 1515 struct ethtool_rx_flow_spec *fs = &cmd->fs; 1516 struct bnxt_filter_base *fltr_base; 1517 struct bnxt_ntuple_filter *fltr; 1518 u32 id = fs->location; 1519 1520 rcu_read_lock(); 1521 fltr_base = bnxt_get_one_fltr_rcu(bp, bp->l2_fltr_hash_tbl, 1522 BNXT_L2_FLTR_HASH_SIZE, id); 1523 if (fltr_base) { 1524 struct bnxt_l2_filter *l2_fltr; 1525 1526 l2_fltr = container_of(fltr_base, struct bnxt_l2_filter, base); 1527 rcu_read_unlock(); 1528 bnxt_hwrm_l2_filter_free(bp, l2_fltr); 1529 bnxt_del_l2_filter(bp, l2_fltr); 1530 return 0; 1531 } 1532 fltr_base = bnxt_get_one_fltr_rcu(bp, bp->ntp_fltr_hash_tbl, 1533 BNXT_NTP_FLTR_HASH_SIZE, id); 1534 if (!fltr_base) { 1535 rcu_read_unlock(); 1536 return -ENOENT; 1537 } 1538 1539 fltr = container_of(fltr_base, struct bnxt_ntuple_filter, base); 1540 if (!(fltr->base.flags & BNXT_ACT_NO_AGING)) { 1541 rcu_read_unlock(); 1542 return -EINVAL; 1543 } 1544 rcu_read_unlock(); 1545 bnxt_hwrm_cfa_ntuple_filter_free(bp, fltr); 1546 bnxt_del_ntp_filter(bp, fltr); 1547 return 0; 1548 } 1549 1550 static u64 get_ethtool_ipv4_rss(struct bnxt *bp) 1551 { 1552 if (bp->rss_hash_cfg & VNIC_RSS_CFG_REQ_HASH_TYPE_IPV4) 1553 return RXH_IP_SRC | RXH_IP_DST; 1554 return 0; 1555 } 1556 1557 static u64 get_ethtool_ipv6_rss(struct bnxt *bp) 1558 { 1559 if (bp->rss_hash_cfg & VNIC_RSS_CFG_REQ_HASH_TYPE_IPV6) 1560 return RXH_IP_SRC | RXH_IP_DST; 1561 return 0; 1562 } 1563 1564 static int bnxt_grxfh(struct bnxt *bp, struct ethtool_rxnfc *cmd) 1565 { 1566 cmd->data = 0; 1567 switch (cmd->flow_type) { 1568 case TCP_V4_FLOW: 1569 if (bp->rss_hash_cfg & VNIC_RSS_CFG_REQ_HASH_TYPE_TCP_IPV4) 1570 cmd->data |= RXH_IP_SRC | RXH_IP_DST | 1571 RXH_L4_B_0_1 | RXH_L4_B_2_3; 1572 cmd->data |= get_ethtool_ipv4_rss(bp); 1573 break; 1574 case UDP_V4_FLOW: 1575 if (bp->rss_hash_cfg & VNIC_RSS_CFG_REQ_HASH_TYPE_UDP_IPV4) 1576 cmd->data |= RXH_IP_SRC | RXH_IP_DST | 1577 RXH_L4_B_0_1 | RXH_L4_B_2_3; 1578 fallthrough; 1579 case AH_ESP_V4_FLOW: 1580 if (bp->rss_hash_cfg & 1581 (VNIC_RSS_CFG_REQ_HASH_TYPE_AH_SPI_IPV4 | 1582 VNIC_RSS_CFG_REQ_HASH_TYPE_ESP_SPI_IPV4)) 1583 cmd->data |= RXH_IP_SRC | RXH_IP_DST | 1584 RXH_L4_B_0_1 | RXH_L4_B_2_3; 1585 fallthrough; 1586 case SCTP_V4_FLOW: 1587 case AH_V4_FLOW: 1588 case ESP_V4_FLOW: 1589 case IPV4_FLOW: 1590 cmd->data |= get_ethtool_ipv4_rss(bp); 1591 break; 1592 1593 case TCP_V6_FLOW: 1594 if (bp->rss_hash_cfg & VNIC_RSS_CFG_REQ_HASH_TYPE_TCP_IPV6) 1595 cmd->data |= RXH_IP_SRC | RXH_IP_DST | 1596 RXH_L4_B_0_1 | RXH_L4_B_2_3; 1597 cmd->data |= get_ethtool_ipv6_rss(bp); 1598 break; 1599 case UDP_V6_FLOW: 1600 if (bp->rss_hash_cfg & VNIC_RSS_CFG_REQ_HASH_TYPE_UDP_IPV6) 1601 cmd->data |= RXH_IP_SRC | RXH_IP_DST | 1602 RXH_L4_B_0_1 | RXH_L4_B_2_3; 1603 fallthrough; 1604 case AH_ESP_V6_FLOW: 1605 if (bp->rss_hash_cfg & 1606 (VNIC_RSS_CFG_REQ_HASH_TYPE_AH_SPI_IPV6 | 1607 VNIC_RSS_CFG_REQ_HASH_TYPE_ESP_SPI_IPV6)) 1608 cmd->data |= RXH_IP_SRC | RXH_IP_DST | 1609 RXH_L4_B_0_1 | RXH_L4_B_2_3; 1610 fallthrough; 1611 case SCTP_V6_FLOW: 1612 case AH_V6_FLOW: 1613 case ESP_V6_FLOW: 1614 case IPV6_FLOW: 1615 cmd->data |= get_ethtool_ipv6_rss(bp); 1616 break; 1617 } 1618 return 0; 1619 } 1620 1621 #define RXH_4TUPLE (RXH_IP_SRC | RXH_IP_DST | RXH_L4_B_0_1 | RXH_L4_B_2_3) 1622 #define RXH_2TUPLE (RXH_IP_SRC | RXH_IP_DST) 1623 1624 static int bnxt_srxfh(struct bnxt *bp, struct ethtool_rxnfc *cmd) 1625 { 1626 u32 rss_hash_cfg = bp->rss_hash_cfg; 1627 int tuple, rc = 0; 1628 1629 if (cmd->data == RXH_4TUPLE) 1630 tuple = 4; 1631 else if (cmd->data == RXH_2TUPLE) 1632 tuple = 2; 1633 else if (!cmd->data) 1634 tuple = 0; 1635 else 1636 return -EINVAL; 1637 1638 if (cmd->flow_type == TCP_V4_FLOW) { 1639 rss_hash_cfg &= ~VNIC_RSS_CFG_REQ_HASH_TYPE_TCP_IPV4; 1640 if (tuple == 4) 1641 rss_hash_cfg |= VNIC_RSS_CFG_REQ_HASH_TYPE_TCP_IPV4; 1642 } else if (cmd->flow_type == UDP_V4_FLOW) { 1643 if (tuple == 4 && !(bp->rss_cap & BNXT_RSS_CAP_UDP_RSS_CAP)) 1644 return -EINVAL; 1645 rss_hash_cfg &= ~VNIC_RSS_CFG_REQ_HASH_TYPE_UDP_IPV4; 1646 if (tuple == 4) 1647 rss_hash_cfg |= VNIC_RSS_CFG_REQ_HASH_TYPE_UDP_IPV4; 1648 } else if (cmd->flow_type == TCP_V6_FLOW) { 1649 rss_hash_cfg &= ~VNIC_RSS_CFG_REQ_HASH_TYPE_TCP_IPV6; 1650 if (tuple == 4) 1651 rss_hash_cfg |= VNIC_RSS_CFG_REQ_HASH_TYPE_TCP_IPV6; 1652 } else if (cmd->flow_type == UDP_V6_FLOW) { 1653 if (tuple == 4 && !(bp->rss_cap & BNXT_RSS_CAP_UDP_RSS_CAP)) 1654 return -EINVAL; 1655 rss_hash_cfg &= ~VNIC_RSS_CFG_REQ_HASH_TYPE_UDP_IPV6; 1656 if (tuple == 4) 1657 rss_hash_cfg |= VNIC_RSS_CFG_REQ_HASH_TYPE_UDP_IPV6; 1658 } else if (cmd->flow_type == AH_ESP_V4_FLOW) { 1659 if (tuple == 4 && (!(bp->rss_cap & BNXT_RSS_CAP_AH_V4_RSS_CAP) || 1660 !(bp->rss_cap & BNXT_RSS_CAP_ESP_V4_RSS_CAP))) 1661 return -EINVAL; 1662 rss_hash_cfg &= ~(VNIC_RSS_CFG_REQ_HASH_TYPE_AH_SPI_IPV4 | 1663 VNIC_RSS_CFG_REQ_HASH_TYPE_ESP_SPI_IPV4); 1664 if (tuple == 4) 1665 rss_hash_cfg |= VNIC_RSS_CFG_REQ_HASH_TYPE_AH_SPI_IPV4 | 1666 VNIC_RSS_CFG_REQ_HASH_TYPE_ESP_SPI_IPV4; 1667 } else if (cmd->flow_type == AH_ESP_V6_FLOW) { 1668 if (tuple == 4 && (!(bp->rss_cap & BNXT_RSS_CAP_AH_V6_RSS_CAP) || 1669 !(bp->rss_cap & BNXT_RSS_CAP_ESP_V6_RSS_CAP))) 1670 return -EINVAL; 1671 rss_hash_cfg &= ~(VNIC_RSS_CFG_REQ_HASH_TYPE_AH_SPI_IPV6 | 1672 VNIC_RSS_CFG_REQ_HASH_TYPE_ESP_SPI_IPV6); 1673 if (tuple == 4) 1674 rss_hash_cfg |= VNIC_RSS_CFG_REQ_HASH_TYPE_AH_SPI_IPV6 | 1675 VNIC_RSS_CFG_REQ_HASH_TYPE_ESP_SPI_IPV6; 1676 } else if (tuple == 4) { 1677 return -EINVAL; 1678 } 1679 1680 switch (cmd->flow_type) { 1681 case TCP_V4_FLOW: 1682 case UDP_V4_FLOW: 1683 case SCTP_V4_FLOW: 1684 case AH_ESP_V4_FLOW: 1685 case AH_V4_FLOW: 1686 case ESP_V4_FLOW: 1687 case IPV4_FLOW: 1688 if (tuple == 2) 1689 rss_hash_cfg |= VNIC_RSS_CFG_REQ_HASH_TYPE_IPV4; 1690 else if (!tuple) 1691 rss_hash_cfg &= ~VNIC_RSS_CFG_REQ_HASH_TYPE_IPV4; 1692 break; 1693 1694 case TCP_V6_FLOW: 1695 case UDP_V6_FLOW: 1696 case SCTP_V6_FLOW: 1697 case AH_ESP_V6_FLOW: 1698 case AH_V6_FLOW: 1699 case ESP_V6_FLOW: 1700 case IPV6_FLOW: 1701 if (tuple == 2) 1702 rss_hash_cfg |= VNIC_RSS_CFG_REQ_HASH_TYPE_IPV6; 1703 else if (!tuple) 1704 rss_hash_cfg &= ~VNIC_RSS_CFG_REQ_HASH_TYPE_IPV6; 1705 break; 1706 } 1707 1708 if (bp->rss_hash_cfg == rss_hash_cfg) 1709 return 0; 1710 1711 if (bp->rss_cap & BNXT_RSS_CAP_RSS_HASH_TYPE_DELTA) 1712 bp->rss_hash_delta = bp->rss_hash_cfg ^ rss_hash_cfg; 1713 bp->rss_hash_cfg = rss_hash_cfg; 1714 if (netif_running(bp->dev)) { 1715 bnxt_close_nic(bp, false, false); 1716 rc = bnxt_open_nic(bp, false, false); 1717 } 1718 return rc; 1719 } 1720 1721 static int bnxt_get_rxnfc(struct net_device *dev, struct ethtool_rxnfc *cmd, 1722 u32 *rule_locs) 1723 { 1724 struct bnxt *bp = netdev_priv(dev); 1725 int rc = 0; 1726 1727 switch (cmd->cmd) { 1728 case ETHTOOL_GRXRINGS: 1729 cmd->data = bp->rx_nr_rings; 1730 break; 1731 1732 case ETHTOOL_GRXCLSRLCNT: 1733 cmd->rule_cnt = bp->ntp_fltr_count; 1734 cmd->data = bp->max_fltr | RX_CLS_LOC_SPECIAL; 1735 break; 1736 1737 case ETHTOOL_GRXCLSRLALL: 1738 rc = bnxt_grxclsrlall(bp, cmd, (u32 *)rule_locs); 1739 break; 1740 1741 case ETHTOOL_GRXCLSRULE: 1742 rc = bnxt_grxclsrule(bp, cmd); 1743 break; 1744 1745 case ETHTOOL_GRXFH: 1746 rc = bnxt_grxfh(bp, cmd); 1747 break; 1748 1749 default: 1750 rc = -EOPNOTSUPP; 1751 break; 1752 } 1753 1754 return rc; 1755 } 1756 1757 static int bnxt_set_rxnfc(struct net_device *dev, struct ethtool_rxnfc *cmd) 1758 { 1759 struct bnxt *bp = netdev_priv(dev); 1760 int rc; 1761 1762 switch (cmd->cmd) { 1763 case ETHTOOL_SRXFH: 1764 rc = bnxt_srxfh(bp, cmd); 1765 break; 1766 1767 case ETHTOOL_SRXCLSRLINS: 1768 rc = bnxt_srxclsrlins(bp, cmd); 1769 break; 1770 1771 case ETHTOOL_SRXCLSRLDEL: 1772 rc = bnxt_srxclsrldel(bp, cmd); 1773 break; 1774 1775 default: 1776 rc = -EOPNOTSUPP; 1777 break; 1778 } 1779 return rc; 1780 } 1781 1782 u32 bnxt_get_rxfh_indir_size(struct net_device *dev) 1783 { 1784 struct bnxt *bp = netdev_priv(dev); 1785 1786 if (bp->flags & BNXT_FLAG_CHIP_P5_PLUS) 1787 return bnxt_get_nr_rss_ctxs(bp, bp->rx_nr_rings) * 1788 BNXT_RSS_TABLE_ENTRIES_P5; 1789 return HW_HASH_INDEX_SIZE; 1790 } 1791 1792 static u32 bnxt_get_rxfh_key_size(struct net_device *dev) 1793 { 1794 return HW_HASH_KEY_SIZE; 1795 } 1796 1797 static int bnxt_get_rxfh(struct net_device *dev, 1798 struct ethtool_rxfh_param *rxfh) 1799 { 1800 struct bnxt_rss_ctx *rss_ctx = NULL; 1801 struct bnxt *bp = netdev_priv(dev); 1802 u32 *indir_tbl = bp->rss_indir_tbl; 1803 struct bnxt_vnic_info *vnic; 1804 u32 i, tbl_size; 1805 1806 rxfh->hfunc = ETH_RSS_HASH_TOP; 1807 1808 if (!bp->vnic_info) 1809 return 0; 1810 1811 vnic = &bp->vnic_info[BNXT_VNIC_DEFAULT]; 1812 if (rxfh->rss_context) { 1813 struct ethtool_rxfh_context *ctx; 1814 1815 ctx = xa_load(&bp->dev->ethtool->rss_ctx, rxfh->rss_context); 1816 if (!ctx) 1817 return -EINVAL; 1818 indir_tbl = ethtool_rxfh_context_indir(ctx); 1819 rss_ctx = ethtool_rxfh_context_priv(ctx); 1820 vnic = &rss_ctx->vnic; 1821 } 1822 1823 if (rxfh->indir && indir_tbl) { 1824 tbl_size = bnxt_get_rxfh_indir_size(dev); 1825 for (i = 0; i < tbl_size; i++) 1826 rxfh->indir[i] = indir_tbl[i]; 1827 } 1828 1829 if (rxfh->key && vnic->rss_hash_key) 1830 memcpy(rxfh->key, vnic->rss_hash_key, HW_HASH_KEY_SIZE); 1831 1832 return 0; 1833 } 1834 1835 static void bnxt_modify_rss(struct bnxt *bp, struct ethtool_rxfh_context *ctx, 1836 struct bnxt_rss_ctx *rss_ctx, 1837 const struct ethtool_rxfh_param *rxfh) 1838 { 1839 if (rxfh->key) { 1840 if (rss_ctx) { 1841 memcpy(rss_ctx->vnic.rss_hash_key, rxfh->key, 1842 HW_HASH_KEY_SIZE); 1843 } else { 1844 memcpy(bp->rss_hash_key, rxfh->key, HW_HASH_KEY_SIZE); 1845 bp->rss_hash_key_updated = true; 1846 } 1847 } 1848 if (rxfh->indir) { 1849 u32 i, pad, tbl_size = bnxt_get_rxfh_indir_size(bp->dev); 1850 u32 *indir_tbl = bp->rss_indir_tbl; 1851 1852 if (rss_ctx) 1853 indir_tbl = ethtool_rxfh_context_indir(ctx); 1854 for (i = 0; i < tbl_size; i++) 1855 indir_tbl[i] = rxfh->indir[i]; 1856 pad = bp->rss_indir_tbl_entries - tbl_size; 1857 if (pad) 1858 memset(&indir_tbl[i], 0, pad * sizeof(*indir_tbl)); 1859 } 1860 } 1861 1862 static int bnxt_rxfh_context_check(struct bnxt *bp, 1863 const struct ethtool_rxfh_param *rxfh, 1864 struct netlink_ext_ack *extack) 1865 { 1866 if (rxfh->hfunc && rxfh->hfunc != ETH_RSS_HASH_TOP) { 1867 NL_SET_ERR_MSG_MOD(extack, "RSS hash function not supported"); 1868 return -EOPNOTSUPP; 1869 } 1870 1871 if (!BNXT_SUPPORTS_MULTI_RSS_CTX(bp)) { 1872 NL_SET_ERR_MSG_MOD(extack, "RSS contexts not supported"); 1873 return -EOPNOTSUPP; 1874 } 1875 1876 if (!netif_running(bp->dev)) { 1877 NL_SET_ERR_MSG_MOD(extack, "Unable to set RSS contexts when interface is down"); 1878 return -EAGAIN; 1879 } 1880 1881 return 0; 1882 } 1883 1884 static int bnxt_create_rxfh_context(struct net_device *dev, 1885 struct ethtool_rxfh_context *ctx, 1886 const struct ethtool_rxfh_param *rxfh, 1887 struct netlink_ext_ack *extack) 1888 { 1889 struct bnxt *bp = netdev_priv(dev); 1890 struct bnxt_rss_ctx *rss_ctx; 1891 struct bnxt_vnic_info *vnic; 1892 int rc; 1893 1894 rc = bnxt_rxfh_context_check(bp, rxfh, extack); 1895 if (rc) 1896 return rc; 1897 1898 if (bp->num_rss_ctx >= BNXT_MAX_ETH_RSS_CTX) { 1899 NL_SET_ERR_MSG_FMT_MOD(extack, "Out of RSS contexts, maximum %u", 1900 BNXT_MAX_ETH_RSS_CTX); 1901 return -EINVAL; 1902 } 1903 1904 if (!bnxt_rfs_capable(bp, true)) { 1905 NL_SET_ERR_MSG_MOD(extack, "Out hardware resources"); 1906 return -ENOMEM; 1907 } 1908 1909 rss_ctx = ethtool_rxfh_context_priv(ctx); 1910 1911 bp->num_rss_ctx++; 1912 1913 vnic = &rss_ctx->vnic; 1914 vnic->rss_ctx = ctx; 1915 vnic->flags |= BNXT_VNIC_RSSCTX_FLAG; 1916 vnic->vnic_id = BNXT_VNIC_ID_INVALID; 1917 rc = bnxt_alloc_vnic_rss_table(bp, vnic); 1918 if (rc) 1919 goto out; 1920 1921 /* Populate defaults in the context */ 1922 bnxt_set_dflt_rss_indir_tbl(bp, ctx); 1923 ctx->hfunc = ETH_RSS_HASH_TOP; 1924 memcpy(vnic->rss_hash_key, bp->rss_hash_key, HW_HASH_KEY_SIZE); 1925 memcpy(ethtool_rxfh_context_key(ctx), 1926 bp->rss_hash_key, HW_HASH_KEY_SIZE); 1927 1928 rc = bnxt_hwrm_vnic_alloc(bp, vnic, 0, bp->rx_nr_rings); 1929 if (rc) { 1930 NL_SET_ERR_MSG_MOD(extack, "Unable to allocate VNIC"); 1931 goto out; 1932 } 1933 1934 rc = bnxt_hwrm_vnic_set_tpa(bp, vnic, bp->flags & BNXT_FLAG_TPA); 1935 if (rc) { 1936 NL_SET_ERR_MSG_MOD(extack, "Unable to setup TPA"); 1937 goto out; 1938 } 1939 bnxt_modify_rss(bp, ctx, rss_ctx, rxfh); 1940 1941 rc = __bnxt_setup_vnic_p5(bp, vnic); 1942 if (rc) { 1943 NL_SET_ERR_MSG_MOD(extack, "Unable to setup TPA"); 1944 goto out; 1945 } 1946 1947 rss_ctx->index = rxfh->rss_context; 1948 return 0; 1949 out: 1950 bnxt_del_one_rss_ctx(bp, rss_ctx, true); 1951 return rc; 1952 } 1953 1954 static int bnxt_modify_rxfh_context(struct net_device *dev, 1955 struct ethtool_rxfh_context *ctx, 1956 const struct ethtool_rxfh_param *rxfh, 1957 struct netlink_ext_ack *extack) 1958 { 1959 struct bnxt *bp = netdev_priv(dev); 1960 struct bnxt_rss_ctx *rss_ctx; 1961 int rc; 1962 1963 rc = bnxt_rxfh_context_check(bp, rxfh, extack); 1964 if (rc) 1965 return rc; 1966 1967 rss_ctx = ethtool_rxfh_context_priv(ctx); 1968 1969 bnxt_modify_rss(bp, ctx, rss_ctx, rxfh); 1970 1971 return bnxt_hwrm_vnic_rss_cfg_p5(bp, &rss_ctx->vnic); 1972 } 1973 1974 static int bnxt_remove_rxfh_context(struct net_device *dev, 1975 struct ethtool_rxfh_context *ctx, 1976 u32 rss_context, 1977 struct netlink_ext_ack *extack) 1978 { 1979 struct bnxt *bp = netdev_priv(dev); 1980 struct bnxt_rss_ctx *rss_ctx; 1981 1982 rss_ctx = ethtool_rxfh_context_priv(ctx); 1983 1984 bnxt_del_one_rss_ctx(bp, rss_ctx, true); 1985 return 0; 1986 } 1987 1988 static int bnxt_set_rxfh(struct net_device *dev, 1989 struct ethtool_rxfh_param *rxfh, 1990 struct netlink_ext_ack *extack) 1991 { 1992 struct bnxt *bp = netdev_priv(dev); 1993 int rc = 0; 1994 1995 if (rxfh->hfunc && rxfh->hfunc != ETH_RSS_HASH_TOP) 1996 return -EOPNOTSUPP; 1997 1998 bnxt_modify_rss(bp, NULL, NULL, rxfh); 1999 2000 if (netif_running(bp->dev)) { 2001 bnxt_close_nic(bp, false, false); 2002 rc = bnxt_open_nic(bp, false, false); 2003 } 2004 return rc; 2005 } 2006 2007 static void bnxt_get_drvinfo(struct net_device *dev, 2008 struct ethtool_drvinfo *info) 2009 { 2010 struct bnxt *bp = netdev_priv(dev); 2011 2012 strscpy(info->driver, DRV_MODULE_NAME, sizeof(info->driver)); 2013 strscpy(info->fw_version, bp->fw_ver_str, sizeof(info->fw_version)); 2014 strscpy(info->bus_info, pci_name(bp->pdev), sizeof(info->bus_info)); 2015 info->n_stats = bnxt_get_num_stats(bp); 2016 info->testinfo_len = bp->num_tests; 2017 /* TODO CHIMP_FW: eeprom dump details */ 2018 info->eedump_len = 0; 2019 /* TODO CHIMP FW: reg dump details */ 2020 info->regdump_len = 0; 2021 } 2022 2023 static int bnxt_get_regs_len(struct net_device *dev) 2024 { 2025 struct bnxt *bp = netdev_priv(dev); 2026 int reg_len; 2027 2028 if (!BNXT_PF(bp)) 2029 return -EOPNOTSUPP; 2030 2031 reg_len = BNXT_PXP_REG_LEN; 2032 2033 if (bp->fw_cap & BNXT_FW_CAP_PCIE_STATS_SUPPORTED) 2034 reg_len += sizeof(struct pcie_ctx_hw_stats); 2035 2036 return reg_len; 2037 } 2038 2039 static void bnxt_get_regs(struct net_device *dev, struct ethtool_regs *regs, 2040 void *_p) 2041 { 2042 struct pcie_ctx_hw_stats *hw_pcie_stats; 2043 struct hwrm_pcie_qstats_input *req; 2044 struct bnxt *bp = netdev_priv(dev); 2045 dma_addr_t hw_pcie_stats_addr; 2046 int rc; 2047 2048 regs->version = 0; 2049 bnxt_dbg_hwrm_rd_reg(bp, 0, BNXT_PXP_REG_LEN / 4, _p); 2050 2051 if (!(bp->fw_cap & BNXT_FW_CAP_PCIE_STATS_SUPPORTED)) 2052 return; 2053 2054 if (hwrm_req_init(bp, req, HWRM_PCIE_QSTATS)) 2055 return; 2056 2057 hw_pcie_stats = hwrm_req_dma_slice(bp, req, sizeof(*hw_pcie_stats), 2058 &hw_pcie_stats_addr); 2059 if (!hw_pcie_stats) { 2060 hwrm_req_drop(bp, req); 2061 return; 2062 } 2063 2064 regs->version = 1; 2065 hwrm_req_hold(bp, req); /* hold on to slice */ 2066 req->pcie_stat_size = cpu_to_le16(sizeof(*hw_pcie_stats)); 2067 req->pcie_stat_host_addr = cpu_to_le64(hw_pcie_stats_addr); 2068 rc = hwrm_req_send(bp, req); 2069 if (!rc) { 2070 __le64 *src = (__le64 *)hw_pcie_stats; 2071 u64 *dst = (u64 *)(_p + BNXT_PXP_REG_LEN); 2072 int i; 2073 2074 for (i = 0; i < sizeof(*hw_pcie_stats) / sizeof(__le64); i++) 2075 dst[i] = le64_to_cpu(src[i]); 2076 } 2077 hwrm_req_drop(bp, req); 2078 } 2079 2080 static void bnxt_get_wol(struct net_device *dev, struct ethtool_wolinfo *wol) 2081 { 2082 struct bnxt *bp = netdev_priv(dev); 2083 2084 wol->supported = 0; 2085 wol->wolopts = 0; 2086 memset(&wol->sopass, 0, sizeof(wol->sopass)); 2087 if (bp->flags & BNXT_FLAG_WOL_CAP) { 2088 wol->supported = WAKE_MAGIC; 2089 if (bp->wol) 2090 wol->wolopts = WAKE_MAGIC; 2091 } 2092 } 2093 2094 static int bnxt_set_wol(struct net_device *dev, struct ethtool_wolinfo *wol) 2095 { 2096 struct bnxt *bp = netdev_priv(dev); 2097 2098 if (wol->wolopts & ~WAKE_MAGIC) 2099 return -EINVAL; 2100 2101 if (wol->wolopts & WAKE_MAGIC) { 2102 if (!(bp->flags & BNXT_FLAG_WOL_CAP)) 2103 return -EINVAL; 2104 if (!bp->wol) { 2105 if (bnxt_hwrm_alloc_wol_fltr(bp)) 2106 return -EBUSY; 2107 bp->wol = 1; 2108 } 2109 } else { 2110 if (bp->wol) { 2111 if (bnxt_hwrm_free_wol_fltr(bp)) 2112 return -EBUSY; 2113 bp->wol = 0; 2114 } 2115 } 2116 return 0; 2117 } 2118 2119 /* TODO: support 25GB, 40GB, 50GB with different cable type */ 2120 void _bnxt_fw_to_linkmode(unsigned long *mode, u16 fw_speeds) 2121 { 2122 linkmode_zero(mode); 2123 2124 if (fw_speeds & BNXT_LINK_SPEED_MSK_100MB) 2125 linkmode_set_bit(ETHTOOL_LINK_MODE_100baseT_Full_BIT, mode); 2126 if (fw_speeds & BNXT_LINK_SPEED_MSK_1GB) 2127 linkmode_set_bit(ETHTOOL_LINK_MODE_1000baseT_Full_BIT, mode); 2128 if (fw_speeds & BNXT_LINK_SPEED_MSK_2_5GB) 2129 linkmode_set_bit(ETHTOOL_LINK_MODE_2500baseX_Full_BIT, mode); 2130 if (fw_speeds & BNXT_LINK_SPEED_MSK_10GB) 2131 linkmode_set_bit(ETHTOOL_LINK_MODE_10000baseT_Full_BIT, mode); 2132 if (fw_speeds & BNXT_LINK_SPEED_MSK_40GB) 2133 linkmode_set_bit(ETHTOOL_LINK_MODE_40000baseCR4_Full_BIT, mode); 2134 } 2135 2136 enum bnxt_media_type { 2137 BNXT_MEDIA_UNKNOWN = 0, 2138 BNXT_MEDIA_TP, 2139 BNXT_MEDIA_CR, 2140 BNXT_MEDIA_SR, 2141 BNXT_MEDIA_LR_ER_FR, 2142 BNXT_MEDIA_KR, 2143 BNXT_MEDIA_KX, 2144 BNXT_MEDIA_X, 2145 __BNXT_MEDIA_END, 2146 }; 2147 2148 static const enum bnxt_media_type bnxt_phy_types[] = { 2149 [PORT_PHY_QCFG_RESP_PHY_TYPE_BASECR] = BNXT_MEDIA_CR, 2150 [PORT_PHY_QCFG_RESP_PHY_TYPE_BASEKR4] = BNXT_MEDIA_KR, 2151 [PORT_PHY_QCFG_RESP_PHY_TYPE_BASELR] = BNXT_MEDIA_LR_ER_FR, 2152 [PORT_PHY_QCFG_RESP_PHY_TYPE_BASESR] = BNXT_MEDIA_SR, 2153 [PORT_PHY_QCFG_RESP_PHY_TYPE_BASEKR2] = BNXT_MEDIA_KR, 2154 [PORT_PHY_QCFG_RESP_PHY_TYPE_BASEKX] = BNXT_MEDIA_KX, 2155 [PORT_PHY_QCFG_RESP_PHY_TYPE_BASEKR] = BNXT_MEDIA_KR, 2156 [PORT_PHY_QCFG_RESP_PHY_TYPE_BASET] = BNXT_MEDIA_TP, 2157 [PORT_PHY_QCFG_RESP_PHY_TYPE_BASETE] = BNXT_MEDIA_TP, 2158 [PORT_PHY_QCFG_RESP_PHY_TYPE_25G_BASECR_CA_L] = BNXT_MEDIA_CR, 2159 [PORT_PHY_QCFG_RESP_PHY_TYPE_25G_BASECR_CA_S] = BNXT_MEDIA_CR, 2160 [PORT_PHY_QCFG_RESP_PHY_TYPE_25G_BASECR_CA_N] = BNXT_MEDIA_CR, 2161 [PORT_PHY_QCFG_RESP_PHY_TYPE_25G_BASESR] = BNXT_MEDIA_SR, 2162 [PORT_PHY_QCFG_RESP_PHY_TYPE_100G_BASECR4] = BNXT_MEDIA_CR, 2163 [PORT_PHY_QCFG_RESP_PHY_TYPE_100G_BASESR4] = BNXT_MEDIA_SR, 2164 [PORT_PHY_QCFG_RESP_PHY_TYPE_100G_BASELR4] = BNXT_MEDIA_LR_ER_FR, 2165 [PORT_PHY_QCFG_RESP_PHY_TYPE_100G_BASEER4] = BNXT_MEDIA_LR_ER_FR, 2166 [PORT_PHY_QCFG_RESP_PHY_TYPE_100G_BASESR10] = BNXT_MEDIA_SR, 2167 [PORT_PHY_QCFG_RESP_PHY_TYPE_40G_BASECR4] = BNXT_MEDIA_CR, 2168 [PORT_PHY_QCFG_RESP_PHY_TYPE_40G_BASESR4] = BNXT_MEDIA_SR, 2169 [PORT_PHY_QCFG_RESP_PHY_TYPE_40G_BASELR4] = BNXT_MEDIA_LR_ER_FR, 2170 [PORT_PHY_QCFG_RESP_PHY_TYPE_40G_BASEER4] = BNXT_MEDIA_LR_ER_FR, 2171 [PORT_PHY_QCFG_RESP_PHY_TYPE_40G_ACTIVE_CABLE] = BNXT_MEDIA_SR, 2172 [PORT_PHY_QCFG_RESP_PHY_TYPE_1G_BASET] = BNXT_MEDIA_TP, 2173 [PORT_PHY_QCFG_RESP_PHY_TYPE_1G_BASESX] = BNXT_MEDIA_X, 2174 [PORT_PHY_QCFG_RESP_PHY_TYPE_1G_BASECX] = BNXT_MEDIA_X, 2175 [PORT_PHY_QCFG_RESP_PHY_TYPE_200G_BASECR4] = BNXT_MEDIA_CR, 2176 [PORT_PHY_QCFG_RESP_PHY_TYPE_200G_BASESR4] = BNXT_MEDIA_SR, 2177 [PORT_PHY_QCFG_RESP_PHY_TYPE_200G_BASELR4] = BNXT_MEDIA_LR_ER_FR, 2178 [PORT_PHY_QCFG_RESP_PHY_TYPE_200G_BASEER4] = BNXT_MEDIA_LR_ER_FR, 2179 [PORT_PHY_QCFG_RESP_PHY_TYPE_50G_BASECR] = BNXT_MEDIA_CR, 2180 [PORT_PHY_QCFG_RESP_PHY_TYPE_50G_BASESR] = BNXT_MEDIA_SR, 2181 [PORT_PHY_QCFG_RESP_PHY_TYPE_50G_BASELR] = BNXT_MEDIA_LR_ER_FR, 2182 [PORT_PHY_QCFG_RESP_PHY_TYPE_50G_BASEER] = BNXT_MEDIA_LR_ER_FR, 2183 [PORT_PHY_QCFG_RESP_PHY_TYPE_100G_BASECR2] = BNXT_MEDIA_CR, 2184 [PORT_PHY_QCFG_RESP_PHY_TYPE_100G_BASESR2] = BNXT_MEDIA_SR, 2185 [PORT_PHY_QCFG_RESP_PHY_TYPE_100G_BASELR2] = BNXT_MEDIA_LR_ER_FR, 2186 [PORT_PHY_QCFG_RESP_PHY_TYPE_100G_BASEER2] = BNXT_MEDIA_LR_ER_FR, 2187 [PORT_PHY_QCFG_RESP_PHY_TYPE_100G_BASECR] = BNXT_MEDIA_CR, 2188 [PORT_PHY_QCFG_RESP_PHY_TYPE_100G_BASESR] = BNXT_MEDIA_SR, 2189 [PORT_PHY_QCFG_RESP_PHY_TYPE_100G_BASELR] = BNXT_MEDIA_LR_ER_FR, 2190 [PORT_PHY_QCFG_RESP_PHY_TYPE_100G_BASEER] = BNXT_MEDIA_LR_ER_FR, 2191 [PORT_PHY_QCFG_RESP_PHY_TYPE_200G_BASECR2] = BNXT_MEDIA_CR, 2192 [PORT_PHY_QCFG_RESP_PHY_TYPE_200G_BASESR2] = BNXT_MEDIA_SR, 2193 [PORT_PHY_QCFG_RESP_PHY_TYPE_200G_BASELR2] = BNXT_MEDIA_LR_ER_FR, 2194 [PORT_PHY_QCFG_RESP_PHY_TYPE_200G_BASEER2] = BNXT_MEDIA_LR_ER_FR, 2195 [PORT_PHY_QCFG_RESP_PHY_TYPE_400G_BASECR8] = BNXT_MEDIA_CR, 2196 [PORT_PHY_QCFG_RESP_PHY_TYPE_400G_BASESR8] = BNXT_MEDIA_SR, 2197 [PORT_PHY_QCFG_RESP_PHY_TYPE_400G_BASELR8] = BNXT_MEDIA_LR_ER_FR, 2198 [PORT_PHY_QCFG_RESP_PHY_TYPE_400G_BASEER8] = BNXT_MEDIA_LR_ER_FR, 2199 [PORT_PHY_QCFG_RESP_PHY_TYPE_400G_BASECR4] = BNXT_MEDIA_CR, 2200 [PORT_PHY_QCFG_RESP_PHY_TYPE_400G_BASESR4] = BNXT_MEDIA_SR, 2201 [PORT_PHY_QCFG_RESP_PHY_TYPE_400G_BASELR4] = BNXT_MEDIA_LR_ER_FR, 2202 [PORT_PHY_QCFG_RESP_PHY_TYPE_400G_BASEER4] = BNXT_MEDIA_LR_ER_FR, 2203 }; 2204 2205 static enum bnxt_media_type 2206 bnxt_get_media(struct bnxt_link_info *link_info) 2207 { 2208 switch (link_info->media_type) { 2209 case PORT_PHY_QCFG_RESP_MEDIA_TYPE_TP: 2210 return BNXT_MEDIA_TP; 2211 case PORT_PHY_QCFG_RESP_MEDIA_TYPE_DAC: 2212 return BNXT_MEDIA_CR; 2213 default: 2214 if (link_info->phy_type < ARRAY_SIZE(bnxt_phy_types)) 2215 return bnxt_phy_types[link_info->phy_type]; 2216 return BNXT_MEDIA_UNKNOWN; 2217 } 2218 } 2219 2220 enum bnxt_link_speed_indices { 2221 BNXT_LINK_SPEED_UNKNOWN = 0, 2222 BNXT_LINK_SPEED_100MB_IDX, 2223 BNXT_LINK_SPEED_1GB_IDX, 2224 BNXT_LINK_SPEED_10GB_IDX, 2225 BNXT_LINK_SPEED_25GB_IDX, 2226 BNXT_LINK_SPEED_40GB_IDX, 2227 BNXT_LINK_SPEED_50GB_IDX, 2228 BNXT_LINK_SPEED_100GB_IDX, 2229 BNXT_LINK_SPEED_200GB_IDX, 2230 BNXT_LINK_SPEED_400GB_IDX, 2231 __BNXT_LINK_SPEED_END 2232 }; 2233 2234 static enum bnxt_link_speed_indices bnxt_fw_speed_idx(u16 speed) 2235 { 2236 switch (speed) { 2237 case BNXT_LINK_SPEED_100MB: return BNXT_LINK_SPEED_100MB_IDX; 2238 case BNXT_LINK_SPEED_1GB: return BNXT_LINK_SPEED_1GB_IDX; 2239 case BNXT_LINK_SPEED_10GB: return BNXT_LINK_SPEED_10GB_IDX; 2240 case BNXT_LINK_SPEED_25GB: return BNXT_LINK_SPEED_25GB_IDX; 2241 case BNXT_LINK_SPEED_40GB: return BNXT_LINK_SPEED_40GB_IDX; 2242 case BNXT_LINK_SPEED_50GB: 2243 case BNXT_LINK_SPEED_50GB_PAM4: 2244 return BNXT_LINK_SPEED_50GB_IDX; 2245 case BNXT_LINK_SPEED_100GB: 2246 case BNXT_LINK_SPEED_100GB_PAM4: 2247 case BNXT_LINK_SPEED_100GB_PAM4_112: 2248 return BNXT_LINK_SPEED_100GB_IDX; 2249 case BNXT_LINK_SPEED_200GB: 2250 case BNXT_LINK_SPEED_200GB_PAM4: 2251 case BNXT_LINK_SPEED_200GB_PAM4_112: 2252 return BNXT_LINK_SPEED_200GB_IDX; 2253 case BNXT_LINK_SPEED_400GB: 2254 case BNXT_LINK_SPEED_400GB_PAM4: 2255 case BNXT_LINK_SPEED_400GB_PAM4_112: 2256 return BNXT_LINK_SPEED_400GB_IDX; 2257 default: return BNXT_LINK_SPEED_UNKNOWN; 2258 } 2259 } 2260 2261 static const enum ethtool_link_mode_bit_indices 2262 bnxt_link_modes[__BNXT_LINK_SPEED_END][BNXT_SIG_MODE_MAX][__BNXT_MEDIA_END] = { 2263 [BNXT_LINK_SPEED_100MB_IDX] = { 2264 { 2265 [BNXT_MEDIA_TP] = ETHTOOL_LINK_MODE_100baseT_Full_BIT, 2266 }, 2267 }, 2268 [BNXT_LINK_SPEED_1GB_IDX] = { 2269 { 2270 [BNXT_MEDIA_TP] = ETHTOOL_LINK_MODE_1000baseT_Full_BIT, 2271 /* historically baseT, but DAC is more correctly baseX */ 2272 [BNXT_MEDIA_CR] = ETHTOOL_LINK_MODE_1000baseX_Full_BIT, 2273 [BNXT_MEDIA_KX] = ETHTOOL_LINK_MODE_1000baseKX_Full_BIT, 2274 [BNXT_MEDIA_X] = ETHTOOL_LINK_MODE_1000baseX_Full_BIT, 2275 [BNXT_MEDIA_KR] = ETHTOOL_LINK_MODE_1000baseKX_Full_BIT, 2276 }, 2277 }, 2278 [BNXT_LINK_SPEED_10GB_IDX] = { 2279 { 2280 [BNXT_MEDIA_TP] = ETHTOOL_LINK_MODE_10000baseT_Full_BIT, 2281 [BNXT_MEDIA_CR] = ETHTOOL_LINK_MODE_10000baseCR_Full_BIT, 2282 [BNXT_MEDIA_SR] = ETHTOOL_LINK_MODE_10000baseSR_Full_BIT, 2283 [BNXT_MEDIA_LR_ER_FR] = ETHTOOL_LINK_MODE_10000baseLR_Full_BIT, 2284 [BNXT_MEDIA_KR] = ETHTOOL_LINK_MODE_10000baseKR_Full_BIT, 2285 [BNXT_MEDIA_KX] = ETHTOOL_LINK_MODE_10000baseKX4_Full_BIT, 2286 }, 2287 }, 2288 [BNXT_LINK_SPEED_25GB_IDX] = { 2289 { 2290 [BNXT_MEDIA_CR] = ETHTOOL_LINK_MODE_25000baseCR_Full_BIT, 2291 [BNXT_MEDIA_SR] = ETHTOOL_LINK_MODE_25000baseSR_Full_BIT, 2292 [BNXT_MEDIA_KR] = ETHTOOL_LINK_MODE_25000baseKR_Full_BIT, 2293 }, 2294 }, 2295 [BNXT_LINK_SPEED_40GB_IDX] = { 2296 { 2297 [BNXT_MEDIA_CR] = ETHTOOL_LINK_MODE_40000baseCR4_Full_BIT, 2298 [BNXT_MEDIA_SR] = ETHTOOL_LINK_MODE_40000baseSR4_Full_BIT, 2299 [BNXT_MEDIA_LR_ER_FR] = ETHTOOL_LINK_MODE_40000baseLR4_Full_BIT, 2300 [BNXT_MEDIA_KR] = ETHTOOL_LINK_MODE_40000baseKR4_Full_BIT, 2301 }, 2302 }, 2303 [BNXT_LINK_SPEED_50GB_IDX] = { 2304 [BNXT_SIG_MODE_NRZ] = { 2305 [BNXT_MEDIA_CR] = ETHTOOL_LINK_MODE_50000baseCR2_Full_BIT, 2306 [BNXT_MEDIA_SR] = ETHTOOL_LINK_MODE_50000baseSR2_Full_BIT, 2307 [BNXT_MEDIA_KR] = ETHTOOL_LINK_MODE_50000baseKR2_Full_BIT, 2308 }, 2309 [BNXT_SIG_MODE_PAM4] = { 2310 [BNXT_MEDIA_CR] = ETHTOOL_LINK_MODE_50000baseCR_Full_BIT, 2311 [BNXT_MEDIA_SR] = ETHTOOL_LINK_MODE_50000baseSR_Full_BIT, 2312 [BNXT_MEDIA_LR_ER_FR] = ETHTOOL_LINK_MODE_50000baseLR_ER_FR_Full_BIT, 2313 [BNXT_MEDIA_KR] = ETHTOOL_LINK_MODE_50000baseKR_Full_BIT, 2314 }, 2315 }, 2316 [BNXT_LINK_SPEED_100GB_IDX] = { 2317 [BNXT_SIG_MODE_NRZ] = { 2318 [BNXT_MEDIA_CR] = ETHTOOL_LINK_MODE_100000baseCR4_Full_BIT, 2319 [BNXT_MEDIA_SR] = ETHTOOL_LINK_MODE_100000baseSR4_Full_BIT, 2320 [BNXT_MEDIA_LR_ER_FR] = ETHTOOL_LINK_MODE_100000baseLR4_ER4_Full_BIT, 2321 [BNXT_MEDIA_KR] = ETHTOOL_LINK_MODE_100000baseKR4_Full_BIT, 2322 }, 2323 [BNXT_SIG_MODE_PAM4] = { 2324 [BNXT_MEDIA_CR] = ETHTOOL_LINK_MODE_100000baseCR2_Full_BIT, 2325 [BNXT_MEDIA_SR] = ETHTOOL_LINK_MODE_100000baseSR2_Full_BIT, 2326 [BNXT_MEDIA_LR_ER_FR] = ETHTOOL_LINK_MODE_100000baseLR2_ER2_FR2_Full_BIT, 2327 [BNXT_MEDIA_KR] = ETHTOOL_LINK_MODE_100000baseKR2_Full_BIT, 2328 }, 2329 [BNXT_SIG_MODE_PAM4_112] = { 2330 [BNXT_MEDIA_CR] = ETHTOOL_LINK_MODE_100000baseCR_Full_BIT, 2331 [BNXT_MEDIA_SR] = ETHTOOL_LINK_MODE_100000baseSR_Full_BIT, 2332 [BNXT_MEDIA_KR] = ETHTOOL_LINK_MODE_100000baseKR_Full_BIT, 2333 [BNXT_MEDIA_LR_ER_FR] = ETHTOOL_LINK_MODE_100000baseLR_ER_FR_Full_BIT, 2334 }, 2335 }, 2336 [BNXT_LINK_SPEED_200GB_IDX] = { 2337 [BNXT_SIG_MODE_PAM4] = { 2338 [BNXT_MEDIA_CR] = ETHTOOL_LINK_MODE_200000baseCR4_Full_BIT, 2339 [BNXT_MEDIA_SR] = ETHTOOL_LINK_MODE_200000baseSR4_Full_BIT, 2340 [BNXT_MEDIA_LR_ER_FR] = ETHTOOL_LINK_MODE_200000baseLR4_ER4_FR4_Full_BIT, 2341 [BNXT_MEDIA_KR] = ETHTOOL_LINK_MODE_200000baseKR4_Full_BIT, 2342 }, 2343 [BNXT_SIG_MODE_PAM4_112] = { 2344 [BNXT_MEDIA_CR] = ETHTOOL_LINK_MODE_200000baseCR2_Full_BIT, 2345 [BNXT_MEDIA_KR] = ETHTOOL_LINK_MODE_200000baseKR2_Full_BIT, 2346 [BNXT_MEDIA_SR] = ETHTOOL_LINK_MODE_200000baseSR2_Full_BIT, 2347 [BNXT_MEDIA_LR_ER_FR] = ETHTOOL_LINK_MODE_200000baseLR2_ER2_FR2_Full_BIT, 2348 }, 2349 }, 2350 [BNXT_LINK_SPEED_400GB_IDX] = { 2351 [BNXT_SIG_MODE_PAM4] = { 2352 [BNXT_MEDIA_CR] = ETHTOOL_LINK_MODE_400000baseCR8_Full_BIT, 2353 [BNXT_MEDIA_KR] = ETHTOOL_LINK_MODE_400000baseKR8_Full_BIT, 2354 [BNXT_MEDIA_SR] = ETHTOOL_LINK_MODE_400000baseSR8_Full_BIT, 2355 [BNXT_MEDIA_LR_ER_FR] = ETHTOOL_LINK_MODE_400000baseLR8_ER8_FR8_Full_BIT, 2356 }, 2357 [BNXT_SIG_MODE_PAM4_112] = { 2358 [BNXT_MEDIA_CR] = ETHTOOL_LINK_MODE_400000baseCR4_Full_BIT, 2359 [BNXT_MEDIA_KR] = ETHTOOL_LINK_MODE_400000baseKR4_Full_BIT, 2360 [BNXT_MEDIA_SR] = ETHTOOL_LINK_MODE_400000baseSR4_Full_BIT, 2361 [BNXT_MEDIA_LR_ER_FR] = ETHTOOL_LINK_MODE_400000baseLR4_ER4_FR4_Full_BIT, 2362 }, 2363 }, 2364 }; 2365 2366 #define BNXT_LINK_MODE_UNKNOWN -1 2367 2368 static enum ethtool_link_mode_bit_indices 2369 bnxt_get_link_mode(struct bnxt_link_info *link_info) 2370 { 2371 enum ethtool_link_mode_bit_indices link_mode; 2372 enum bnxt_link_speed_indices speed; 2373 enum bnxt_media_type media; 2374 u8 sig_mode; 2375 2376 if (link_info->phy_link_status != BNXT_LINK_LINK) 2377 return BNXT_LINK_MODE_UNKNOWN; 2378 2379 media = bnxt_get_media(link_info); 2380 if (BNXT_AUTO_MODE(link_info->auto_mode)) { 2381 speed = bnxt_fw_speed_idx(link_info->link_speed); 2382 sig_mode = link_info->active_fec_sig_mode & 2383 PORT_PHY_QCFG_RESP_SIGNAL_MODE_MASK; 2384 } else { 2385 speed = bnxt_fw_speed_idx(link_info->req_link_speed); 2386 sig_mode = link_info->req_signal_mode; 2387 } 2388 if (sig_mode >= BNXT_SIG_MODE_MAX) 2389 return BNXT_LINK_MODE_UNKNOWN; 2390 2391 /* Note ETHTOOL_LINK_MODE_10baseT_Half_BIT == 0 is a legal Linux 2392 * link mode, but since no such devices exist, the zeroes in the 2393 * map can be conveniently used to represent unknown link modes. 2394 */ 2395 link_mode = bnxt_link_modes[speed][sig_mode][media]; 2396 if (!link_mode) 2397 return BNXT_LINK_MODE_UNKNOWN; 2398 2399 switch (link_mode) { 2400 case ETHTOOL_LINK_MODE_100baseT_Full_BIT: 2401 if (~link_info->duplex & BNXT_LINK_DUPLEX_FULL) 2402 link_mode = ETHTOOL_LINK_MODE_100baseT_Half_BIT; 2403 break; 2404 case ETHTOOL_LINK_MODE_1000baseT_Full_BIT: 2405 if (~link_info->duplex & BNXT_LINK_DUPLEX_FULL) 2406 link_mode = ETHTOOL_LINK_MODE_1000baseT_Half_BIT; 2407 break; 2408 default: 2409 break; 2410 } 2411 2412 return link_mode; 2413 } 2414 2415 static void bnxt_get_ethtool_modes(struct bnxt_link_info *link_info, 2416 struct ethtool_link_ksettings *lk_ksettings) 2417 { 2418 struct bnxt *bp = container_of(link_info, struct bnxt, link_info); 2419 2420 if (!(bp->phy_flags & BNXT_PHY_FL_NO_PAUSE)) { 2421 linkmode_set_bit(ETHTOOL_LINK_MODE_Pause_BIT, 2422 lk_ksettings->link_modes.supported); 2423 linkmode_set_bit(ETHTOOL_LINK_MODE_Asym_Pause_BIT, 2424 lk_ksettings->link_modes.supported); 2425 } 2426 2427 if (link_info->support_auto_speeds || link_info->support_auto_speeds2 || 2428 link_info->support_pam4_auto_speeds) 2429 linkmode_set_bit(ETHTOOL_LINK_MODE_Autoneg_BIT, 2430 lk_ksettings->link_modes.supported); 2431 2432 if (~link_info->autoneg & BNXT_AUTONEG_FLOW_CTRL) 2433 return; 2434 2435 if (link_info->auto_pause_setting & BNXT_LINK_PAUSE_RX) 2436 linkmode_set_bit(ETHTOOL_LINK_MODE_Pause_BIT, 2437 lk_ksettings->link_modes.advertising); 2438 if (hweight8(link_info->auto_pause_setting & BNXT_LINK_PAUSE_BOTH) == 1) 2439 linkmode_set_bit(ETHTOOL_LINK_MODE_Asym_Pause_BIT, 2440 lk_ksettings->link_modes.advertising); 2441 if (link_info->lp_pause & BNXT_LINK_PAUSE_RX) 2442 linkmode_set_bit(ETHTOOL_LINK_MODE_Pause_BIT, 2443 lk_ksettings->link_modes.lp_advertising); 2444 if (hweight8(link_info->lp_pause & BNXT_LINK_PAUSE_BOTH) == 1) 2445 linkmode_set_bit(ETHTOOL_LINK_MODE_Asym_Pause_BIT, 2446 lk_ksettings->link_modes.lp_advertising); 2447 } 2448 2449 static const u16 bnxt_nrz_speed_masks[] = { 2450 [BNXT_LINK_SPEED_100MB_IDX] = BNXT_LINK_SPEED_MSK_100MB, 2451 [BNXT_LINK_SPEED_1GB_IDX] = BNXT_LINK_SPEED_MSK_1GB, 2452 [BNXT_LINK_SPEED_10GB_IDX] = BNXT_LINK_SPEED_MSK_10GB, 2453 [BNXT_LINK_SPEED_25GB_IDX] = BNXT_LINK_SPEED_MSK_25GB, 2454 [BNXT_LINK_SPEED_40GB_IDX] = BNXT_LINK_SPEED_MSK_40GB, 2455 [BNXT_LINK_SPEED_50GB_IDX] = BNXT_LINK_SPEED_MSK_50GB, 2456 [BNXT_LINK_SPEED_100GB_IDX] = BNXT_LINK_SPEED_MSK_100GB, 2457 [__BNXT_LINK_SPEED_END - 1] = 0 /* make any legal speed a valid index */ 2458 }; 2459 2460 static const u16 bnxt_pam4_speed_masks[] = { 2461 [BNXT_LINK_SPEED_50GB_IDX] = BNXT_LINK_PAM4_SPEED_MSK_50GB, 2462 [BNXT_LINK_SPEED_100GB_IDX] = BNXT_LINK_PAM4_SPEED_MSK_100GB, 2463 [BNXT_LINK_SPEED_200GB_IDX] = BNXT_LINK_PAM4_SPEED_MSK_200GB, 2464 [__BNXT_LINK_SPEED_END - 1] = 0 /* make any legal speed a valid index */ 2465 }; 2466 2467 static const u16 bnxt_nrz_speeds2_masks[] = { 2468 [BNXT_LINK_SPEED_1GB_IDX] = BNXT_LINK_SPEEDS2_MSK_1GB, 2469 [BNXT_LINK_SPEED_10GB_IDX] = BNXT_LINK_SPEEDS2_MSK_10GB, 2470 [BNXT_LINK_SPEED_25GB_IDX] = BNXT_LINK_SPEEDS2_MSK_25GB, 2471 [BNXT_LINK_SPEED_40GB_IDX] = BNXT_LINK_SPEEDS2_MSK_40GB, 2472 [BNXT_LINK_SPEED_50GB_IDX] = BNXT_LINK_SPEEDS2_MSK_50GB, 2473 [BNXT_LINK_SPEED_100GB_IDX] = BNXT_LINK_SPEEDS2_MSK_100GB, 2474 [__BNXT_LINK_SPEED_END - 1] = 0 /* make any legal speed a valid index */ 2475 }; 2476 2477 static const u16 bnxt_pam4_speeds2_masks[] = { 2478 [BNXT_LINK_SPEED_50GB_IDX] = BNXT_LINK_SPEEDS2_MSK_50GB_PAM4, 2479 [BNXT_LINK_SPEED_100GB_IDX] = BNXT_LINK_SPEEDS2_MSK_100GB_PAM4, 2480 [BNXT_LINK_SPEED_200GB_IDX] = BNXT_LINK_SPEEDS2_MSK_200GB_PAM4, 2481 [BNXT_LINK_SPEED_400GB_IDX] = BNXT_LINK_SPEEDS2_MSK_400GB_PAM4, 2482 }; 2483 2484 static const u16 bnxt_pam4_112_speeds2_masks[] = { 2485 [BNXT_LINK_SPEED_100GB_IDX] = BNXT_LINK_SPEEDS2_MSK_100GB_PAM4_112, 2486 [BNXT_LINK_SPEED_200GB_IDX] = BNXT_LINK_SPEEDS2_MSK_200GB_PAM4_112, 2487 [BNXT_LINK_SPEED_400GB_IDX] = BNXT_LINK_SPEEDS2_MSK_400GB_PAM4_112, 2488 }; 2489 2490 static enum bnxt_link_speed_indices 2491 bnxt_encoding_speed_idx(u8 sig_mode, u16 phy_flags, u16 speed_msk) 2492 { 2493 const u16 *speeds; 2494 int idx, len; 2495 2496 switch (sig_mode) { 2497 case BNXT_SIG_MODE_NRZ: 2498 if (phy_flags & BNXT_PHY_FL_SPEEDS2) { 2499 speeds = bnxt_nrz_speeds2_masks; 2500 len = ARRAY_SIZE(bnxt_nrz_speeds2_masks); 2501 } else { 2502 speeds = bnxt_nrz_speed_masks; 2503 len = ARRAY_SIZE(bnxt_nrz_speed_masks); 2504 } 2505 break; 2506 case BNXT_SIG_MODE_PAM4: 2507 if (phy_flags & BNXT_PHY_FL_SPEEDS2) { 2508 speeds = bnxt_pam4_speeds2_masks; 2509 len = ARRAY_SIZE(bnxt_pam4_speeds2_masks); 2510 } else { 2511 speeds = bnxt_pam4_speed_masks; 2512 len = ARRAY_SIZE(bnxt_pam4_speed_masks); 2513 } 2514 break; 2515 case BNXT_SIG_MODE_PAM4_112: 2516 speeds = bnxt_pam4_112_speeds2_masks; 2517 len = ARRAY_SIZE(bnxt_pam4_112_speeds2_masks); 2518 break; 2519 default: 2520 return BNXT_LINK_SPEED_UNKNOWN; 2521 } 2522 2523 for (idx = 0; idx < len; idx++) { 2524 if (speeds[idx] == speed_msk) 2525 return idx; 2526 } 2527 2528 return BNXT_LINK_SPEED_UNKNOWN; 2529 } 2530 2531 #define BNXT_FW_SPEED_MSK_BITS 16 2532 2533 static void 2534 __bnxt_get_ethtool_speeds(unsigned long fw_mask, enum bnxt_media_type media, 2535 u8 sig_mode, u16 phy_flags, unsigned long *et_mask) 2536 { 2537 enum ethtool_link_mode_bit_indices link_mode; 2538 enum bnxt_link_speed_indices speed; 2539 u8 bit; 2540 2541 for_each_set_bit(bit, &fw_mask, BNXT_FW_SPEED_MSK_BITS) { 2542 speed = bnxt_encoding_speed_idx(sig_mode, phy_flags, 1 << bit); 2543 if (!speed) 2544 continue; 2545 2546 link_mode = bnxt_link_modes[speed][sig_mode][media]; 2547 if (!link_mode) 2548 continue; 2549 2550 linkmode_set_bit(link_mode, et_mask); 2551 } 2552 } 2553 2554 static void 2555 bnxt_get_ethtool_speeds(unsigned long fw_mask, enum bnxt_media_type media, 2556 u8 sig_mode, u16 phy_flags, unsigned long *et_mask) 2557 { 2558 if (media) { 2559 __bnxt_get_ethtool_speeds(fw_mask, media, sig_mode, phy_flags, 2560 et_mask); 2561 return; 2562 } 2563 2564 /* list speeds for all media if unknown */ 2565 for (media = 1; media < __BNXT_MEDIA_END; media++) 2566 __bnxt_get_ethtool_speeds(fw_mask, media, sig_mode, phy_flags, 2567 et_mask); 2568 } 2569 2570 static void 2571 bnxt_get_all_ethtool_support_speeds(struct bnxt_link_info *link_info, 2572 enum bnxt_media_type media, 2573 struct ethtool_link_ksettings *lk_ksettings) 2574 { 2575 struct bnxt *bp = container_of(link_info, struct bnxt, link_info); 2576 u16 sp_nrz, sp_pam4, sp_pam4_112 = 0; 2577 u16 phy_flags = bp->phy_flags; 2578 2579 if (phy_flags & BNXT_PHY_FL_SPEEDS2) { 2580 sp_nrz = link_info->support_speeds2; 2581 sp_pam4 = link_info->support_speeds2; 2582 sp_pam4_112 = link_info->support_speeds2; 2583 } else { 2584 sp_nrz = link_info->support_speeds; 2585 sp_pam4 = link_info->support_pam4_speeds; 2586 } 2587 bnxt_get_ethtool_speeds(sp_nrz, media, BNXT_SIG_MODE_NRZ, phy_flags, 2588 lk_ksettings->link_modes.supported); 2589 bnxt_get_ethtool_speeds(sp_pam4, media, BNXT_SIG_MODE_PAM4, phy_flags, 2590 lk_ksettings->link_modes.supported); 2591 bnxt_get_ethtool_speeds(sp_pam4_112, media, BNXT_SIG_MODE_PAM4_112, 2592 phy_flags, lk_ksettings->link_modes.supported); 2593 } 2594 2595 static void 2596 bnxt_get_all_ethtool_adv_speeds(struct bnxt_link_info *link_info, 2597 enum bnxt_media_type media, 2598 struct ethtool_link_ksettings *lk_ksettings) 2599 { 2600 struct bnxt *bp = container_of(link_info, struct bnxt, link_info); 2601 u16 sp_nrz, sp_pam4, sp_pam4_112 = 0; 2602 u16 phy_flags = bp->phy_flags; 2603 2604 sp_nrz = link_info->advertising; 2605 if (phy_flags & BNXT_PHY_FL_SPEEDS2) { 2606 sp_pam4 = link_info->advertising; 2607 sp_pam4_112 = link_info->advertising; 2608 } else { 2609 sp_pam4 = link_info->advertising_pam4; 2610 } 2611 bnxt_get_ethtool_speeds(sp_nrz, media, BNXT_SIG_MODE_NRZ, phy_flags, 2612 lk_ksettings->link_modes.advertising); 2613 bnxt_get_ethtool_speeds(sp_pam4, media, BNXT_SIG_MODE_PAM4, phy_flags, 2614 lk_ksettings->link_modes.advertising); 2615 bnxt_get_ethtool_speeds(sp_pam4_112, media, BNXT_SIG_MODE_PAM4_112, 2616 phy_flags, lk_ksettings->link_modes.advertising); 2617 } 2618 2619 static void 2620 bnxt_get_all_ethtool_lp_speeds(struct bnxt_link_info *link_info, 2621 enum bnxt_media_type media, 2622 struct ethtool_link_ksettings *lk_ksettings) 2623 { 2624 struct bnxt *bp = container_of(link_info, struct bnxt, link_info); 2625 u16 phy_flags = bp->phy_flags; 2626 2627 bnxt_get_ethtool_speeds(link_info->lp_auto_link_speeds, media, 2628 BNXT_SIG_MODE_NRZ, phy_flags, 2629 lk_ksettings->link_modes.lp_advertising); 2630 bnxt_get_ethtool_speeds(link_info->lp_auto_pam4_link_speeds, media, 2631 BNXT_SIG_MODE_PAM4, phy_flags, 2632 lk_ksettings->link_modes.lp_advertising); 2633 } 2634 2635 static void bnxt_update_speed(u32 *delta, bool installed_media, u16 *speeds, 2636 u16 speed_msk, const unsigned long *et_mask, 2637 enum ethtool_link_mode_bit_indices mode) 2638 { 2639 bool mode_desired = linkmode_test_bit(mode, et_mask); 2640 2641 if (!mode) 2642 return; 2643 2644 /* enabled speeds for installed media should override */ 2645 if (installed_media && mode_desired) { 2646 *speeds |= speed_msk; 2647 *delta |= speed_msk; 2648 return; 2649 } 2650 2651 /* many to one mapping, only allow one change per fw_speed bit */ 2652 if (!(*delta & speed_msk) && (mode_desired == !(*speeds & speed_msk))) { 2653 *speeds ^= speed_msk; 2654 *delta |= speed_msk; 2655 } 2656 } 2657 2658 static void bnxt_set_ethtool_speeds(struct bnxt_link_info *link_info, 2659 const unsigned long *et_mask) 2660 { 2661 struct bnxt *bp = container_of(link_info, struct bnxt, link_info); 2662 u16 const *sp_msks, *sp_pam4_msks, *sp_pam4_112_msks; 2663 enum bnxt_media_type media = bnxt_get_media(link_info); 2664 u16 *adv, *adv_pam4, *adv_pam4_112 = NULL; 2665 u32 delta_pam4_112 = 0; 2666 u32 delta_pam4 = 0; 2667 u32 delta_nrz = 0; 2668 int i, m; 2669 2670 adv = &link_info->advertising; 2671 if (bp->phy_flags & BNXT_PHY_FL_SPEEDS2) { 2672 adv_pam4 = &link_info->advertising; 2673 adv_pam4_112 = &link_info->advertising; 2674 sp_msks = bnxt_nrz_speeds2_masks; 2675 sp_pam4_msks = bnxt_pam4_speeds2_masks; 2676 sp_pam4_112_msks = bnxt_pam4_112_speeds2_masks; 2677 } else { 2678 adv_pam4 = &link_info->advertising_pam4; 2679 sp_msks = bnxt_nrz_speed_masks; 2680 sp_pam4_msks = bnxt_pam4_speed_masks; 2681 } 2682 for (i = 1; i < __BNXT_LINK_SPEED_END; i++) { 2683 /* accept any legal media from user */ 2684 for (m = 1; m < __BNXT_MEDIA_END; m++) { 2685 bnxt_update_speed(&delta_nrz, m == media, 2686 adv, sp_msks[i], et_mask, 2687 bnxt_link_modes[i][BNXT_SIG_MODE_NRZ][m]); 2688 bnxt_update_speed(&delta_pam4, m == media, 2689 adv_pam4, sp_pam4_msks[i], et_mask, 2690 bnxt_link_modes[i][BNXT_SIG_MODE_PAM4][m]); 2691 if (!adv_pam4_112) 2692 continue; 2693 2694 bnxt_update_speed(&delta_pam4_112, m == media, 2695 adv_pam4_112, sp_pam4_112_msks[i], et_mask, 2696 bnxt_link_modes[i][BNXT_SIG_MODE_PAM4_112][m]); 2697 } 2698 } 2699 } 2700 2701 static void bnxt_fw_to_ethtool_advertised_fec(struct bnxt_link_info *link_info, 2702 struct ethtool_link_ksettings *lk_ksettings) 2703 { 2704 u16 fec_cfg = link_info->fec_cfg; 2705 2706 if ((fec_cfg & BNXT_FEC_NONE) || !(fec_cfg & BNXT_FEC_AUTONEG)) { 2707 linkmode_set_bit(ETHTOOL_LINK_MODE_FEC_NONE_BIT, 2708 lk_ksettings->link_modes.advertising); 2709 return; 2710 } 2711 if (fec_cfg & BNXT_FEC_ENC_BASE_R) 2712 linkmode_set_bit(ETHTOOL_LINK_MODE_FEC_BASER_BIT, 2713 lk_ksettings->link_modes.advertising); 2714 if (fec_cfg & BNXT_FEC_ENC_RS) 2715 linkmode_set_bit(ETHTOOL_LINK_MODE_FEC_RS_BIT, 2716 lk_ksettings->link_modes.advertising); 2717 if (fec_cfg & BNXT_FEC_ENC_LLRS) 2718 linkmode_set_bit(ETHTOOL_LINK_MODE_FEC_LLRS_BIT, 2719 lk_ksettings->link_modes.advertising); 2720 } 2721 2722 static void bnxt_fw_to_ethtool_support_fec(struct bnxt_link_info *link_info, 2723 struct ethtool_link_ksettings *lk_ksettings) 2724 { 2725 u16 fec_cfg = link_info->fec_cfg; 2726 2727 if (fec_cfg & BNXT_FEC_NONE) { 2728 linkmode_set_bit(ETHTOOL_LINK_MODE_FEC_NONE_BIT, 2729 lk_ksettings->link_modes.supported); 2730 return; 2731 } 2732 if (fec_cfg & BNXT_FEC_ENC_BASE_R_CAP) 2733 linkmode_set_bit(ETHTOOL_LINK_MODE_FEC_BASER_BIT, 2734 lk_ksettings->link_modes.supported); 2735 if (fec_cfg & BNXT_FEC_ENC_RS_CAP) 2736 linkmode_set_bit(ETHTOOL_LINK_MODE_FEC_RS_BIT, 2737 lk_ksettings->link_modes.supported); 2738 if (fec_cfg & BNXT_FEC_ENC_LLRS_CAP) 2739 linkmode_set_bit(ETHTOOL_LINK_MODE_FEC_LLRS_BIT, 2740 lk_ksettings->link_modes.supported); 2741 } 2742 2743 u32 bnxt_fw_to_ethtool_speed(u16 fw_link_speed) 2744 { 2745 switch (fw_link_speed) { 2746 case BNXT_LINK_SPEED_100MB: 2747 return SPEED_100; 2748 case BNXT_LINK_SPEED_1GB: 2749 return SPEED_1000; 2750 case BNXT_LINK_SPEED_2_5GB: 2751 return SPEED_2500; 2752 case BNXT_LINK_SPEED_10GB: 2753 return SPEED_10000; 2754 case BNXT_LINK_SPEED_20GB: 2755 return SPEED_20000; 2756 case BNXT_LINK_SPEED_25GB: 2757 return SPEED_25000; 2758 case BNXT_LINK_SPEED_40GB: 2759 return SPEED_40000; 2760 case BNXT_LINK_SPEED_50GB: 2761 case BNXT_LINK_SPEED_50GB_PAM4: 2762 return SPEED_50000; 2763 case BNXT_LINK_SPEED_100GB: 2764 case BNXT_LINK_SPEED_100GB_PAM4: 2765 case BNXT_LINK_SPEED_100GB_PAM4_112: 2766 return SPEED_100000; 2767 case BNXT_LINK_SPEED_200GB: 2768 case BNXT_LINK_SPEED_200GB_PAM4: 2769 case BNXT_LINK_SPEED_200GB_PAM4_112: 2770 return SPEED_200000; 2771 case BNXT_LINK_SPEED_400GB: 2772 case BNXT_LINK_SPEED_400GB_PAM4: 2773 case BNXT_LINK_SPEED_400GB_PAM4_112: 2774 return SPEED_400000; 2775 default: 2776 return SPEED_UNKNOWN; 2777 } 2778 } 2779 2780 static void bnxt_get_default_speeds(struct ethtool_link_ksettings *lk_ksettings, 2781 struct bnxt_link_info *link_info) 2782 { 2783 struct ethtool_link_settings *base = &lk_ksettings->base; 2784 2785 if (link_info->link_state == BNXT_LINK_STATE_UP) { 2786 base->speed = bnxt_fw_to_ethtool_speed(link_info->link_speed); 2787 base->duplex = DUPLEX_HALF; 2788 if (link_info->duplex & BNXT_LINK_DUPLEX_FULL) 2789 base->duplex = DUPLEX_FULL; 2790 lk_ksettings->lanes = link_info->active_lanes; 2791 } else if (!link_info->autoneg) { 2792 base->speed = bnxt_fw_to_ethtool_speed(link_info->req_link_speed); 2793 base->duplex = DUPLEX_HALF; 2794 if (link_info->req_duplex == BNXT_LINK_DUPLEX_FULL) 2795 base->duplex = DUPLEX_FULL; 2796 } 2797 } 2798 2799 static int bnxt_get_link_ksettings(struct net_device *dev, 2800 struct ethtool_link_ksettings *lk_ksettings) 2801 { 2802 struct ethtool_link_settings *base = &lk_ksettings->base; 2803 enum ethtool_link_mode_bit_indices link_mode; 2804 struct bnxt *bp = netdev_priv(dev); 2805 struct bnxt_link_info *link_info; 2806 enum bnxt_media_type media; 2807 2808 ethtool_link_ksettings_zero_link_mode(lk_ksettings, lp_advertising); 2809 ethtool_link_ksettings_zero_link_mode(lk_ksettings, advertising); 2810 ethtool_link_ksettings_zero_link_mode(lk_ksettings, supported); 2811 base->duplex = DUPLEX_UNKNOWN; 2812 base->speed = SPEED_UNKNOWN; 2813 link_info = &bp->link_info; 2814 2815 mutex_lock(&bp->link_lock); 2816 bnxt_get_ethtool_modes(link_info, lk_ksettings); 2817 media = bnxt_get_media(link_info); 2818 bnxt_get_all_ethtool_support_speeds(link_info, media, lk_ksettings); 2819 bnxt_fw_to_ethtool_support_fec(link_info, lk_ksettings); 2820 link_mode = bnxt_get_link_mode(link_info); 2821 if (link_mode != BNXT_LINK_MODE_UNKNOWN) 2822 ethtool_params_from_link_mode(lk_ksettings, link_mode); 2823 else 2824 bnxt_get_default_speeds(lk_ksettings, link_info); 2825 2826 if (link_info->autoneg) { 2827 bnxt_fw_to_ethtool_advertised_fec(link_info, lk_ksettings); 2828 linkmode_set_bit(ETHTOOL_LINK_MODE_Autoneg_BIT, 2829 lk_ksettings->link_modes.advertising); 2830 base->autoneg = AUTONEG_ENABLE; 2831 bnxt_get_all_ethtool_adv_speeds(link_info, media, lk_ksettings); 2832 if (link_info->phy_link_status == BNXT_LINK_LINK) 2833 bnxt_get_all_ethtool_lp_speeds(link_info, media, 2834 lk_ksettings); 2835 } else { 2836 base->autoneg = AUTONEG_DISABLE; 2837 } 2838 2839 base->port = PORT_NONE; 2840 if (link_info->media_type == PORT_PHY_QCFG_RESP_MEDIA_TYPE_TP) { 2841 base->port = PORT_TP; 2842 linkmode_set_bit(ETHTOOL_LINK_MODE_TP_BIT, 2843 lk_ksettings->link_modes.supported); 2844 linkmode_set_bit(ETHTOOL_LINK_MODE_TP_BIT, 2845 lk_ksettings->link_modes.advertising); 2846 } else { 2847 linkmode_set_bit(ETHTOOL_LINK_MODE_FIBRE_BIT, 2848 lk_ksettings->link_modes.supported); 2849 linkmode_set_bit(ETHTOOL_LINK_MODE_FIBRE_BIT, 2850 lk_ksettings->link_modes.advertising); 2851 2852 if (link_info->media_type == PORT_PHY_QCFG_RESP_MEDIA_TYPE_DAC) 2853 base->port = PORT_DA; 2854 else 2855 base->port = PORT_FIBRE; 2856 } 2857 base->phy_address = link_info->phy_addr; 2858 mutex_unlock(&bp->link_lock); 2859 2860 return 0; 2861 } 2862 2863 static int 2864 bnxt_force_link_speed(struct net_device *dev, u32 ethtool_speed, u32 lanes) 2865 { 2866 struct bnxt *bp = netdev_priv(dev); 2867 struct bnxt_link_info *link_info = &bp->link_info; 2868 u16 support_pam4_spds = link_info->support_pam4_speeds; 2869 u16 support_spds2 = link_info->support_speeds2; 2870 u16 support_spds = link_info->support_speeds; 2871 u8 sig_mode = BNXT_SIG_MODE_NRZ; 2872 u32 lanes_needed = 1; 2873 u16 fw_speed = 0; 2874 2875 switch (ethtool_speed) { 2876 case SPEED_100: 2877 if (support_spds & BNXT_LINK_SPEED_MSK_100MB) 2878 fw_speed = PORT_PHY_CFG_REQ_FORCE_LINK_SPEED_100MB; 2879 break; 2880 case SPEED_1000: 2881 if ((support_spds & BNXT_LINK_SPEED_MSK_1GB) || 2882 (support_spds2 & BNXT_LINK_SPEEDS2_MSK_1GB)) 2883 fw_speed = PORT_PHY_CFG_REQ_FORCE_LINK_SPEED_1GB; 2884 break; 2885 case SPEED_2500: 2886 if (support_spds & BNXT_LINK_SPEED_MSK_2_5GB) 2887 fw_speed = PORT_PHY_CFG_REQ_FORCE_LINK_SPEED_2_5GB; 2888 break; 2889 case SPEED_10000: 2890 if ((support_spds & BNXT_LINK_SPEED_MSK_10GB) || 2891 (support_spds2 & BNXT_LINK_SPEEDS2_MSK_10GB)) 2892 fw_speed = PORT_PHY_CFG_REQ_FORCE_LINK_SPEED_10GB; 2893 break; 2894 case SPEED_20000: 2895 if (support_spds & BNXT_LINK_SPEED_MSK_20GB) { 2896 fw_speed = PORT_PHY_CFG_REQ_FORCE_LINK_SPEED_20GB; 2897 lanes_needed = 2; 2898 } 2899 break; 2900 case SPEED_25000: 2901 if ((support_spds & BNXT_LINK_SPEED_MSK_25GB) || 2902 (support_spds2 & BNXT_LINK_SPEEDS2_MSK_25GB)) 2903 fw_speed = PORT_PHY_CFG_REQ_FORCE_LINK_SPEED_25GB; 2904 break; 2905 case SPEED_40000: 2906 if ((support_spds & BNXT_LINK_SPEED_MSK_40GB) || 2907 (support_spds2 & BNXT_LINK_SPEEDS2_MSK_40GB)) { 2908 fw_speed = PORT_PHY_CFG_REQ_FORCE_LINK_SPEED_40GB; 2909 lanes_needed = 4; 2910 } 2911 break; 2912 case SPEED_50000: 2913 if (((support_spds & BNXT_LINK_SPEED_MSK_50GB) || 2914 (support_spds2 & BNXT_LINK_SPEEDS2_MSK_50GB)) && 2915 lanes != 1) { 2916 fw_speed = PORT_PHY_CFG_REQ_FORCE_LINK_SPEED_50GB; 2917 lanes_needed = 2; 2918 } else if (support_pam4_spds & BNXT_LINK_PAM4_SPEED_MSK_50GB) { 2919 fw_speed = PORT_PHY_CFG_REQ_FORCE_PAM4_LINK_SPEED_50GB; 2920 sig_mode = BNXT_SIG_MODE_PAM4; 2921 } else if (support_spds2 & BNXT_LINK_SPEEDS2_MSK_50GB_PAM4) { 2922 fw_speed = BNXT_LINK_SPEED_50GB_PAM4; 2923 sig_mode = BNXT_SIG_MODE_PAM4; 2924 } 2925 break; 2926 case SPEED_100000: 2927 if (((support_spds & BNXT_LINK_SPEED_MSK_100GB) || 2928 (support_spds2 & BNXT_LINK_SPEEDS2_MSK_100GB)) && 2929 lanes != 2 && lanes != 1) { 2930 fw_speed = PORT_PHY_CFG_REQ_FORCE_LINK_SPEED_100GB; 2931 lanes_needed = 4; 2932 } else if (support_pam4_spds & BNXT_LINK_PAM4_SPEED_MSK_100GB) { 2933 fw_speed = PORT_PHY_CFG_REQ_FORCE_PAM4_LINK_SPEED_100GB; 2934 sig_mode = BNXT_SIG_MODE_PAM4; 2935 lanes_needed = 2; 2936 } else if ((support_spds2 & BNXT_LINK_SPEEDS2_MSK_100GB_PAM4) && 2937 lanes != 1) { 2938 fw_speed = BNXT_LINK_SPEED_100GB_PAM4; 2939 sig_mode = BNXT_SIG_MODE_PAM4; 2940 lanes_needed = 2; 2941 } else if (support_spds2 & BNXT_LINK_SPEEDS2_MSK_100GB_PAM4_112) { 2942 fw_speed = BNXT_LINK_SPEED_100GB_PAM4_112; 2943 sig_mode = BNXT_SIG_MODE_PAM4_112; 2944 } 2945 break; 2946 case SPEED_200000: 2947 if (support_pam4_spds & BNXT_LINK_PAM4_SPEED_MSK_200GB) { 2948 fw_speed = PORT_PHY_CFG_REQ_FORCE_PAM4_LINK_SPEED_200GB; 2949 sig_mode = BNXT_SIG_MODE_PAM4; 2950 lanes_needed = 4; 2951 } else if ((support_spds2 & BNXT_LINK_SPEEDS2_MSK_200GB_PAM4) && 2952 lanes != 2) { 2953 fw_speed = BNXT_LINK_SPEED_200GB_PAM4; 2954 sig_mode = BNXT_SIG_MODE_PAM4; 2955 lanes_needed = 4; 2956 } else if (support_spds2 & BNXT_LINK_SPEEDS2_MSK_200GB_PAM4_112) { 2957 fw_speed = BNXT_LINK_SPEED_200GB_PAM4_112; 2958 sig_mode = BNXT_SIG_MODE_PAM4_112; 2959 lanes_needed = 2; 2960 } 2961 break; 2962 case SPEED_400000: 2963 if ((support_spds2 & BNXT_LINK_SPEEDS2_MSK_400GB_PAM4) && 2964 lanes != 4) { 2965 fw_speed = BNXT_LINK_SPEED_400GB_PAM4; 2966 sig_mode = BNXT_SIG_MODE_PAM4; 2967 lanes_needed = 8; 2968 } else if (support_spds2 & BNXT_LINK_SPEEDS2_MSK_400GB_PAM4_112) { 2969 fw_speed = BNXT_LINK_SPEED_400GB_PAM4_112; 2970 sig_mode = BNXT_SIG_MODE_PAM4_112; 2971 lanes_needed = 4; 2972 } 2973 break; 2974 } 2975 2976 if (!fw_speed) { 2977 netdev_err(dev, "unsupported speed!\n"); 2978 return -EINVAL; 2979 } 2980 2981 if (lanes && lanes != lanes_needed) { 2982 netdev_err(dev, "unsupported number of lanes for speed\n"); 2983 return -EINVAL; 2984 } 2985 2986 if (link_info->req_link_speed == fw_speed && 2987 link_info->req_signal_mode == sig_mode && 2988 link_info->autoneg == 0) 2989 return -EALREADY; 2990 2991 link_info->req_link_speed = fw_speed; 2992 link_info->req_signal_mode = sig_mode; 2993 link_info->req_duplex = BNXT_LINK_DUPLEX_FULL; 2994 link_info->autoneg = 0; 2995 link_info->advertising = 0; 2996 link_info->advertising_pam4 = 0; 2997 2998 return 0; 2999 } 3000 3001 u16 bnxt_get_fw_auto_link_speeds(const unsigned long *mode) 3002 { 3003 u16 fw_speed_mask = 0; 3004 3005 if (linkmode_test_bit(ETHTOOL_LINK_MODE_100baseT_Full_BIT, mode) || 3006 linkmode_test_bit(ETHTOOL_LINK_MODE_100baseT_Half_BIT, mode)) 3007 fw_speed_mask |= BNXT_LINK_SPEED_MSK_100MB; 3008 3009 if (linkmode_test_bit(ETHTOOL_LINK_MODE_1000baseT_Full_BIT, mode) || 3010 linkmode_test_bit(ETHTOOL_LINK_MODE_1000baseT_Half_BIT, mode)) 3011 fw_speed_mask |= BNXT_LINK_SPEED_MSK_1GB; 3012 3013 if (linkmode_test_bit(ETHTOOL_LINK_MODE_10000baseT_Full_BIT, mode)) 3014 fw_speed_mask |= BNXT_LINK_SPEED_MSK_10GB; 3015 3016 if (linkmode_test_bit(ETHTOOL_LINK_MODE_40000baseCR4_Full_BIT, mode)) 3017 fw_speed_mask |= BNXT_LINK_SPEED_MSK_40GB; 3018 3019 return fw_speed_mask; 3020 } 3021 3022 static int bnxt_set_link_ksettings(struct net_device *dev, 3023 const struct ethtool_link_ksettings *lk_ksettings) 3024 { 3025 struct bnxt *bp = netdev_priv(dev); 3026 struct bnxt_link_info *link_info = &bp->link_info; 3027 const struct ethtool_link_settings *base = &lk_ksettings->base; 3028 bool set_pause = false; 3029 u32 speed, lanes = 0; 3030 int rc = 0; 3031 3032 if (!BNXT_PHY_CFG_ABLE(bp)) 3033 return -EOPNOTSUPP; 3034 3035 mutex_lock(&bp->link_lock); 3036 if (base->autoneg == AUTONEG_ENABLE) { 3037 bnxt_set_ethtool_speeds(link_info, 3038 lk_ksettings->link_modes.advertising); 3039 link_info->autoneg |= BNXT_AUTONEG_SPEED; 3040 if (!link_info->advertising && !link_info->advertising_pam4) { 3041 link_info->advertising = link_info->support_auto_speeds; 3042 link_info->advertising_pam4 = 3043 link_info->support_pam4_auto_speeds; 3044 } 3045 /* any change to autoneg will cause link change, therefore the 3046 * driver should put back the original pause setting in autoneg 3047 */ 3048 if (!(bp->phy_flags & BNXT_PHY_FL_NO_PAUSE)) 3049 set_pause = true; 3050 } else { 3051 u8 phy_type = link_info->phy_type; 3052 3053 if (phy_type == PORT_PHY_QCFG_RESP_PHY_TYPE_BASET || 3054 phy_type == PORT_PHY_QCFG_RESP_PHY_TYPE_BASETE || 3055 link_info->media_type == PORT_PHY_QCFG_RESP_MEDIA_TYPE_TP) { 3056 netdev_err(dev, "10GBase-T devices must autoneg\n"); 3057 rc = -EINVAL; 3058 goto set_setting_exit; 3059 } 3060 if (base->duplex == DUPLEX_HALF) { 3061 netdev_err(dev, "HALF DUPLEX is not supported!\n"); 3062 rc = -EINVAL; 3063 goto set_setting_exit; 3064 } 3065 speed = base->speed; 3066 lanes = lk_ksettings->lanes; 3067 rc = bnxt_force_link_speed(dev, speed, lanes); 3068 if (rc) { 3069 if (rc == -EALREADY) 3070 rc = 0; 3071 goto set_setting_exit; 3072 } 3073 } 3074 3075 if (netif_running(dev)) 3076 rc = bnxt_hwrm_set_link_setting(bp, set_pause, false); 3077 3078 set_setting_exit: 3079 mutex_unlock(&bp->link_lock); 3080 return rc; 3081 } 3082 3083 static int bnxt_get_fecparam(struct net_device *dev, 3084 struct ethtool_fecparam *fec) 3085 { 3086 struct bnxt *bp = netdev_priv(dev); 3087 struct bnxt_link_info *link_info; 3088 u8 active_fec; 3089 u16 fec_cfg; 3090 3091 link_info = &bp->link_info; 3092 fec_cfg = link_info->fec_cfg; 3093 active_fec = link_info->active_fec_sig_mode & 3094 PORT_PHY_QCFG_RESP_ACTIVE_FEC_MASK; 3095 if (fec_cfg & BNXT_FEC_NONE) { 3096 fec->fec = ETHTOOL_FEC_NONE; 3097 fec->active_fec = ETHTOOL_FEC_NONE; 3098 return 0; 3099 } 3100 if (fec_cfg & BNXT_FEC_AUTONEG) 3101 fec->fec |= ETHTOOL_FEC_AUTO; 3102 if (fec_cfg & BNXT_FEC_ENC_BASE_R) 3103 fec->fec |= ETHTOOL_FEC_BASER; 3104 if (fec_cfg & BNXT_FEC_ENC_RS) 3105 fec->fec |= ETHTOOL_FEC_RS; 3106 if (fec_cfg & BNXT_FEC_ENC_LLRS) 3107 fec->fec |= ETHTOOL_FEC_LLRS; 3108 3109 switch (active_fec) { 3110 case PORT_PHY_QCFG_RESP_ACTIVE_FEC_FEC_CLAUSE74_ACTIVE: 3111 fec->active_fec |= ETHTOOL_FEC_BASER; 3112 break; 3113 case PORT_PHY_QCFG_RESP_ACTIVE_FEC_FEC_CLAUSE91_ACTIVE: 3114 case PORT_PHY_QCFG_RESP_ACTIVE_FEC_FEC_RS544_1XN_ACTIVE: 3115 case PORT_PHY_QCFG_RESP_ACTIVE_FEC_FEC_RS544_IEEE_ACTIVE: 3116 fec->active_fec |= ETHTOOL_FEC_RS; 3117 break; 3118 case PORT_PHY_QCFG_RESP_ACTIVE_FEC_FEC_RS272_1XN_ACTIVE: 3119 case PORT_PHY_QCFG_RESP_ACTIVE_FEC_FEC_RS272_IEEE_ACTIVE: 3120 fec->active_fec |= ETHTOOL_FEC_LLRS; 3121 break; 3122 case PORT_PHY_QCFG_RESP_ACTIVE_FEC_FEC_NONE_ACTIVE: 3123 fec->active_fec |= ETHTOOL_FEC_OFF; 3124 break; 3125 } 3126 return 0; 3127 } 3128 3129 static void bnxt_get_fec_stats(struct net_device *dev, 3130 struct ethtool_fec_stats *fec_stats) 3131 { 3132 struct bnxt *bp = netdev_priv(dev); 3133 u64 *rx; 3134 3135 if (BNXT_VF(bp) || !(bp->flags & BNXT_FLAG_PORT_STATS_EXT)) 3136 return; 3137 3138 rx = bp->rx_port_stats_ext.sw_stats; 3139 fec_stats->corrected_bits.total = 3140 *(rx + BNXT_RX_STATS_EXT_OFFSET(rx_corrected_bits)); 3141 3142 if (bp->fw_rx_stats_ext_size <= BNXT_RX_STATS_EXT_NUM_LEGACY) 3143 return; 3144 3145 fec_stats->corrected_blocks.total = 3146 *(rx + BNXT_RX_STATS_EXT_OFFSET(rx_fec_corrected_blocks)); 3147 fec_stats->uncorrectable_blocks.total = 3148 *(rx + BNXT_RX_STATS_EXT_OFFSET(rx_fec_uncorrectable_blocks)); 3149 } 3150 3151 static u32 bnxt_ethtool_forced_fec_to_fw(struct bnxt_link_info *link_info, 3152 u32 fec) 3153 { 3154 u32 fw_fec = PORT_PHY_CFG_REQ_FLAGS_FEC_AUTONEG_DISABLE; 3155 3156 if (fec & ETHTOOL_FEC_BASER) 3157 fw_fec |= BNXT_FEC_BASE_R_ON(link_info); 3158 else if (fec & ETHTOOL_FEC_RS) 3159 fw_fec |= BNXT_FEC_RS_ON(link_info); 3160 else if (fec & ETHTOOL_FEC_LLRS) 3161 fw_fec |= BNXT_FEC_LLRS_ON; 3162 return fw_fec; 3163 } 3164 3165 static int bnxt_set_fecparam(struct net_device *dev, 3166 struct ethtool_fecparam *fecparam) 3167 { 3168 struct hwrm_port_phy_cfg_input *req; 3169 struct bnxt *bp = netdev_priv(dev); 3170 struct bnxt_link_info *link_info; 3171 u32 new_cfg, fec = fecparam->fec; 3172 u16 fec_cfg; 3173 int rc; 3174 3175 link_info = &bp->link_info; 3176 fec_cfg = link_info->fec_cfg; 3177 if (fec_cfg & BNXT_FEC_NONE) 3178 return -EOPNOTSUPP; 3179 3180 if (fec & ETHTOOL_FEC_OFF) { 3181 new_cfg = PORT_PHY_CFG_REQ_FLAGS_FEC_AUTONEG_DISABLE | 3182 BNXT_FEC_ALL_OFF(link_info); 3183 goto apply_fec; 3184 } 3185 if (((fec & ETHTOOL_FEC_AUTO) && !(fec_cfg & BNXT_FEC_AUTONEG_CAP)) || 3186 ((fec & ETHTOOL_FEC_RS) && !(fec_cfg & BNXT_FEC_ENC_RS_CAP)) || 3187 ((fec & ETHTOOL_FEC_LLRS) && !(fec_cfg & BNXT_FEC_ENC_LLRS_CAP)) || 3188 ((fec & ETHTOOL_FEC_BASER) && !(fec_cfg & BNXT_FEC_ENC_BASE_R_CAP))) 3189 return -EINVAL; 3190 3191 if (fec & ETHTOOL_FEC_AUTO) { 3192 if (!link_info->autoneg) 3193 return -EINVAL; 3194 new_cfg = PORT_PHY_CFG_REQ_FLAGS_FEC_AUTONEG_ENABLE; 3195 } else { 3196 new_cfg = bnxt_ethtool_forced_fec_to_fw(link_info, fec); 3197 } 3198 3199 apply_fec: 3200 rc = hwrm_req_init(bp, req, HWRM_PORT_PHY_CFG); 3201 if (rc) 3202 return rc; 3203 req->flags = cpu_to_le32(new_cfg | PORT_PHY_CFG_REQ_FLAGS_RESET_PHY); 3204 rc = hwrm_req_send(bp, req); 3205 /* update current settings */ 3206 if (!rc) { 3207 mutex_lock(&bp->link_lock); 3208 bnxt_update_link(bp, false); 3209 mutex_unlock(&bp->link_lock); 3210 } 3211 return rc; 3212 } 3213 3214 static void bnxt_get_pauseparam(struct net_device *dev, 3215 struct ethtool_pauseparam *epause) 3216 { 3217 struct bnxt *bp = netdev_priv(dev); 3218 struct bnxt_link_info *link_info = &bp->link_info; 3219 3220 if (BNXT_VF(bp)) 3221 return; 3222 epause->autoneg = !!(link_info->autoneg & BNXT_AUTONEG_FLOW_CTRL); 3223 epause->rx_pause = !!(link_info->req_flow_ctrl & BNXT_LINK_PAUSE_RX); 3224 epause->tx_pause = !!(link_info->req_flow_ctrl & BNXT_LINK_PAUSE_TX); 3225 } 3226 3227 static void bnxt_get_pause_stats(struct net_device *dev, 3228 struct ethtool_pause_stats *epstat) 3229 { 3230 struct bnxt *bp = netdev_priv(dev); 3231 u64 *rx, *tx; 3232 3233 if (BNXT_VF(bp) || !(bp->flags & BNXT_FLAG_PORT_STATS)) 3234 return; 3235 3236 rx = bp->port_stats.sw_stats; 3237 tx = bp->port_stats.sw_stats + BNXT_TX_PORT_STATS_BYTE_OFFSET / 8; 3238 3239 epstat->rx_pause_frames = BNXT_GET_RX_PORT_STATS64(rx, rx_pause_frames); 3240 epstat->tx_pause_frames = BNXT_GET_TX_PORT_STATS64(tx, tx_pause_frames); 3241 } 3242 3243 static int bnxt_set_pauseparam(struct net_device *dev, 3244 struct ethtool_pauseparam *epause) 3245 { 3246 int rc = 0; 3247 struct bnxt *bp = netdev_priv(dev); 3248 struct bnxt_link_info *link_info = &bp->link_info; 3249 3250 if (!BNXT_PHY_CFG_ABLE(bp) || (bp->phy_flags & BNXT_PHY_FL_NO_PAUSE)) 3251 return -EOPNOTSUPP; 3252 3253 mutex_lock(&bp->link_lock); 3254 if (epause->autoneg) { 3255 if (!(link_info->autoneg & BNXT_AUTONEG_SPEED)) { 3256 rc = -EINVAL; 3257 goto pause_exit; 3258 } 3259 3260 link_info->autoneg |= BNXT_AUTONEG_FLOW_CTRL; 3261 link_info->req_flow_ctrl = 0; 3262 } else { 3263 /* when transition from auto pause to force pause, 3264 * force a link change 3265 */ 3266 if (link_info->autoneg & BNXT_AUTONEG_FLOW_CTRL) 3267 link_info->force_link_chng = true; 3268 link_info->autoneg &= ~BNXT_AUTONEG_FLOW_CTRL; 3269 link_info->req_flow_ctrl = 0; 3270 } 3271 if (epause->rx_pause) 3272 link_info->req_flow_ctrl |= BNXT_LINK_PAUSE_RX; 3273 3274 if (epause->tx_pause) 3275 link_info->req_flow_ctrl |= BNXT_LINK_PAUSE_TX; 3276 3277 if (netif_running(dev)) 3278 rc = bnxt_hwrm_set_pause(bp); 3279 3280 pause_exit: 3281 mutex_unlock(&bp->link_lock); 3282 return rc; 3283 } 3284 3285 static u32 bnxt_get_link(struct net_device *dev) 3286 { 3287 struct bnxt *bp = netdev_priv(dev); 3288 3289 /* TODO: handle MF, VF, driver close case */ 3290 return BNXT_LINK_IS_UP(bp); 3291 } 3292 3293 int bnxt_hwrm_nvm_get_dev_info(struct bnxt *bp, 3294 struct hwrm_nvm_get_dev_info_output *nvm_dev_info) 3295 { 3296 struct hwrm_nvm_get_dev_info_output *resp; 3297 struct hwrm_nvm_get_dev_info_input *req; 3298 int rc; 3299 3300 if (BNXT_VF(bp)) 3301 return -EOPNOTSUPP; 3302 3303 rc = hwrm_req_init(bp, req, HWRM_NVM_GET_DEV_INFO); 3304 if (rc) 3305 return rc; 3306 3307 resp = hwrm_req_hold(bp, req); 3308 rc = hwrm_req_send(bp, req); 3309 if (!rc) 3310 memcpy(nvm_dev_info, resp, sizeof(*resp)); 3311 hwrm_req_drop(bp, req); 3312 return rc; 3313 } 3314 3315 static void bnxt_print_admin_err(struct bnxt *bp) 3316 { 3317 netdev_info(bp->dev, "PF does not have admin privileges to flash or reset the device\n"); 3318 } 3319 3320 int bnxt_find_nvram_item(struct net_device *dev, u16 type, u16 ordinal, 3321 u16 ext, u16 *index, u32 *item_length, 3322 u32 *data_length); 3323 3324 int bnxt_flash_nvram(struct net_device *dev, u16 dir_type, 3325 u16 dir_ordinal, u16 dir_ext, u16 dir_attr, 3326 u32 dir_item_len, const u8 *data, 3327 size_t data_len) 3328 { 3329 struct bnxt *bp = netdev_priv(dev); 3330 struct hwrm_nvm_write_input *req; 3331 int rc; 3332 3333 rc = hwrm_req_init(bp, req, HWRM_NVM_WRITE); 3334 if (rc) 3335 return rc; 3336 3337 if (data_len && data) { 3338 dma_addr_t dma_handle; 3339 u8 *kmem; 3340 3341 kmem = hwrm_req_dma_slice(bp, req, data_len, &dma_handle); 3342 if (!kmem) { 3343 hwrm_req_drop(bp, req); 3344 return -ENOMEM; 3345 } 3346 3347 req->dir_data_length = cpu_to_le32(data_len); 3348 3349 memcpy(kmem, data, data_len); 3350 req->host_src_addr = cpu_to_le64(dma_handle); 3351 } 3352 3353 hwrm_req_timeout(bp, req, bp->hwrm_cmd_max_timeout); 3354 req->dir_type = cpu_to_le16(dir_type); 3355 req->dir_ordinal = cpu_to_le16(dir_ordinal); 3356 req->dir_ext = cpu_to_le16(dir_ext); 3357 req->dir_attr = cpu_to_le16(dir_attr); 3358 req->dir_item_length = cpu_to_le32(dir_item_len); 3359 rc = hwrm_req_send(bp, req); 3360 3361 if (rc == -EACCES) 3362 bnxt_print_admin_err(bp); 3363 return rc; 3364 } 3365 3366 int bnxt_hwrm_firmware_reset(struct net_device *dev, u8 proc_type, 3367 u8 self_reset, u8 flags) 3368 { 3369 struct bnxt *bp = netdev_priv(dev); 3370 struct hwrm_fw_reset_input *req; 3371 int rc; 3372 3373 if (!bnxt_hwrm_reset_permitted(bp)) { 3374 netdev_warn(bp->dev, "Reset denied by firmware, it may be inhibited by remote driver"); 3375 return -EPERM; 3376 } 3377 3378 rc = hwrm_req_init(bp, req, HWRM_FW_RESET); 3379 if (rc) 3380 return rc; 3381 3382 req->embedded_proc_type = proc_type; 3383 req->selfrst_status = self_reset; 3384 req->flags = flags; 3385 3386 if (proc_type == FW_RESET_REQ_EMBEDDED_PROC_TYPE_AP) { 3387 rc = hwrm_req_send_silent(bp, req); 3388 } else { 3389 rc = hwrm_req_send(bp, req); 3390 if (rc == -EACCES) 3391 bnxt_print_admin_err(bp); 3392 } 3393 return rc; 3394 } 3395 3396 static int bnxt_firmware_reset(struct net_device *dev, 3397 enum bnxt_nvm_directory_type dir_type) 3398 { 3399 u8 self_reset = FW_RESET_REQ_SELFRST_STATUS_SELFRSTNONE; 3400 u8 proc_type, flags = 0; 3401 3402 /* TODO: Address self-reset of APE/KONG/BONO/TANG or ungraceful reset */ 3403 /* (e.g. when firmware isn't already running) */ 3404 switch (dir_type) { 3405 case BNX_DIR_TYPE_CHIMP_PATCH: 3406 case BNX_DIR_TYPE_BOOTCODE: 3407 case BNX_DIR_TYPE_BOOTCODE_2: 3408 proc_type = FW_RESET_REQ_EMBEDDED_PROC_TYPE_BOOT; 3409 /* Self-reset ChiMP upon next PCIe reset: */ 3410 self_reset = FW_RESET_REQ_SELFRST_STATUS_SELFRSTPCIERST; 3411 break; 3412 case BNX_DIR_TYPE_APE_FW: 3413 case BNX_DIR_TYPE_APE_PATCH: 3414 proc_type = FW_RESET_REQ_EMBEDDED_PROC_TYPE_MGMT; 3415 /* Self-reset APE upon next PCIe reset: */ 3416 self_reset = FW_RESET_REQ_SELFRST_STATUS_SELFRSTPCIERST; 3417 break; 3418 case BNX_DIR_TYPE_KONG_FW: 3419 case BNX_DIR_TYPE_KONG_PATCH: 3420 proc_type = FW_RESET_REQ_EMBEDDED_PROC_TYPE_NETCTRL; 3421 break; 3422 case BNX_DIR_TYPE_BONO_FW: 3423 case BNX_DIR_TYPE_BONO_PATCH: 3424 proc_type = FW_RESET_REQ_EMBEDDED_PROC_TYPE_ROCE; 3425 break; 3426 default: 3427 return -EINVAL; 3428 } 3429 3430 return bnxt_hwrm_firmware_reset(dev, proc_type, self_reset, flags); 3431 } 3432 3433 static int bnxt_firmware_reset_chip(struct net_device *dev) 3434 { 3435 struct bnxt *bp = netdev_priv(dev); 3436 u8 flags = 0; 3437 3438 if (bp->fw_cap & BNXT_FW_CAP_HOT_RESET) 3439 flags = FW_RESET_REQ_FLAGS_RESET_GRACEFUL; 3440 3441 return bnxt_hwrm_firmware_reset(dev, 3442 FW_RESET_REQ_EMBEDDED_PROC_TYPE_CHIP, 3443 FW_RESET_REQ_SELFRST_STATUS_SELFRSTASAP, 3444 flags); 3445 } 3446 3447 static int bnxt_firmware_reset_ap(struct net_device *dev) 3448 { 3449 return bnxt_hwrm_firmware_reset(dev, FW_RESET_REQ_EMBEDDED_PROC_TYPE_AP, 3450 FW_RESET_REQ_SELFRST_STATUS_SELFRSTNONE, 3451 0); 3452 } 3453 3454 static int bnxt_flash_firmware(struct net_device *dev, 3455 u16 dir_type, 3456 const u8 *fw_data, 3457 size_t fw_size) 3458 { 3459 int rc = 0; 3460 u16 code_type; 3461 u32 stored_crc; 3462 u32 calculated_crc; 3463 struct bnxt_fw_header *header = (struct bnxt_fw_header *)fw_data; 3464 3465 switch (dir_type) { 3466 case BNX_DIR_TYPE_BOOTCODE: 3467 case BNX_DIR_TYPE_BOOTCODE_2: 3468 code_type = CODE_BOOT; 3469 break; 3470 case BNX_DIR_TYPE_CHIMP_PATCH: 3471 code_type = CODE_CHIMP_PATCH; 3472 break; 3473 case BNX_DIR_TYPE_APE_FW: 3474 code_type = CODE_MCTP_PASSTHRU; 3475 break; 3476 case BNX_DIR_TYPE_APE_PATCH: 3477 code_type = CODE_APE_PATCH; 3478 break; 3479 case BNX_DIR_TYPE_KONG_FW: 3480 code_type = CODE_KONG_FW; 3481 break; 3482 case BNX_DIR_TYPE_KONG_PATCH: 3483 code_type = CODE_KONG_PATCH; 3484 break; 3485 case BNX_DIR_TYPE_BONO_FW: 3486 code_type = CODE_BONO_FW; 3487 break; 3488 case BNX_DIR_TYPE_BONO_PATCH: 3489 code_type = CODE_BONO_PATCH; 3490 break; 3491 default: 3492 netdev_err(dev, "Unsupported directory entry type: %u\n", 3493 dir_type); 3494 return -EINVAL; 3495 } 3496 if (fw_size < sizeof(struct bnxt_fw_header)) { 3497 netdev_err(dev, "Invalid firmware file size: %u\n", 3498 (unsigned int)fw_size); 3499 return -EINVAL; 3500 } 3501 if (header->signature != cpu_to_le32(BNXT_FIRMWARE_BIN_SIGNATURE)) { 3502 netdev_err(dev, "Invalid firmware signature: %08X\n", 3503 le32_to_cpu(header->signature)); 3504 return -EINVAL; 3505 } 3506 if (header->code_type != code_type) { 3507 netdev_err(dev, "Expected firmware type: %d, read: %d\n", 3508 code_type, header->code_type); 3509 return -EINVAL; 3510 } 3511 if (header->device != DEVICE_CUMULUS_FAMILY) { 3512 netdev_err(dev, "Expected firmware device family %d, read: %d\n", 3513 DEVICE_CUMULUS_FAMILY, header->device); 3514 return -EINVAL; 3515 } 3516 /* Confirm the CRC32 checksum of the file: */ 3517 stored_crc = le32_to_cpu(*(__le32 *)(fw_data + fw_size - 3518 sizeof(stored_crc))); 3519 calculated_crc = ~crc32(~0, fw_data, fw_size - sizeof(stored_crc)); 3520 if (calculated_crc != stored_crc) { 3521 netdev_err(dev, "Firmware file CRC32 checksum (%08lX) does not match calculated checksum (%08lX)\n", 3522 (unsigned long)stored_crc, 3523 (unsigned long)calculated_crc); 3524 return -EINVAL; 3525 } 3526 rc = bnxt_flash_nvram(dev, dir_type, BNX_DIR_ORDINAL_FIRST, 3527 0, 0, 0, fw_data, fw_size); 3528 if (rc == 0) /* Firmware update successful */ 3529 rc = bnxt_firmware_reset(dev, dir_type); 3530 3531 return rc; 3532 } 3533 3534 static int bnxt_flash_microcode(struct net_device *dev, 3535 u16 dir_type, 3536 const u8 *fw_data, 3537 size_t fw_size) 3538 { 3539 struct bnxt_ucode_trailer *trailer; 3540 u32 calculated_crc; 3541 u32 stored_crc; 3542 int rc = 0; 3543 3544 if (fw_size < sizeof(struct bnxt_ucode_trailer)) { 3545 netdev_err(dev, "Invalid microcode file size: %u\n", 3546 (unsigned int)fw_size); 3547 return -EINVAL; 3548 } 3549 trailer = (struct bnxt_ucode_trailer *)(fw_data + (fw_size - 3550 sizeof(*trailer))); 3551 if (trailer->sig != cpu_to_le32(BNXT_UCODE_TRAILER_SIGNATURE)) { 3552 netdev_err(dev, "Invalid microcode trailer signature: %08X\n", 3553 le32_to_cpu(trailer->sig)); 3554 return -EINVAL; 3555 } 3556 if (le16_to_cpu(trailer->dir_type) != dir_type) { 3557 netdev_err(dev, "Expected microcode type: %d, read: %d\n", 3558 dir_type, le16_to_cpu(trailer->dir_type)); 3559 return -EINVAL; 3560 } 3561 if (le16_to_cpu(trailer->trailer_length) < 3562 sizeof(struct bnxt_ucode_trailer)) { 3563 netdev_err(dev, "Invalid microcode trailer length: %d\n", 3564 le16_to_cpu(trailer->trailer_length)); 3565 return -EINVAL; 3566 } 3567 3568 /* Confirm the CRC32 checksum of the file: */ 3569 stored_crc = le32_to_cpu(*(__le32 *)(fw_data + fw_size - 3570 sizeof(stored_crc))); 3571 calculated_crc = ~crc32(~0, fw_data, fw_size - sizeof(stored_crc)); 3572 if (calculated_crc != stored_crc) { 3573 netdev_err(dev, 3574 "CRC32 (%08lX) does not match calculated: %08lX\n", 3575 (unsigned long)stored_crc, 3576 (unsigned long)calculated_crc); 3577 return -EINVAL; 3578 } 3579 rc = bnxt_flash_nvram(dev, dir_type, BNX_DIR_ORDINAL_FIRST, 3580 0, 0, 0, fw_data, fw_size); 3581 3582 return rc; 3583 } 3584 3585 static bool bnxt_dir_type_is_ape_bin_format(u16 dir_type) 3586 { 3587 switch (dir_type) { 3588 case BNX_DIR_TYPE_CHIMP_PATCH: 3589 case BNX_DIR_TYPE_BOOTCODE: 3590 case BNX_DIR_TYPE_BOOTCODE_2: 3591 case BNX_DIR_TYPE_APE_FW: 3592 case BNX_DIR_TYPE_APE_PATCH: 3593 case BNX_DIR_TYPE_KONG_FW: 3594 case BNX_DIR_TYPE_KONG_PATCH: 3595 case BNX_DIR_TYPE_BONO_FW: 3596 case BNX_DIR_TYPE_BONO_PATCH: 3597 return true; 3598 } 3599 3600 return false; 3601 } 3602 3603 static bool bnxt_dir_type_is_other_exec_format(u16 dir_type) 3604 { 3605 switch (dir_type) { 3606 case BNX_DIR_TYPE_AVS: 3607 case BNX_DIR_TYPE_EXP_ROM_MBA: 3608 case BNX_DIR_TYPE_PCIE: 3609 case BNX_DIR_TYPE_TSCF_UCODE: 3610 case BNX_DIR_TYPE_EXT_PHY: 3611 case BNX_DIR_TYPE_CCM: 3612 case BNX_DIR_TYPE_ISCSI_BOOT: 3613 case BNX_DIR_TYPE_ISCSI_BOOT_IPV6: 3614 case BNX_DIR_TYPE_ISCSI_BOOT_IPV4N6: 3615 return true; 3616 } 3617 3618 return false; 3619 } 3620 3621 static bool bnxt_dir_type_is_executable(u16 dir_type) 3622 { 3623 return bnxt_dir_type_is_ape_bin_format(dir_type) || 3624 bnxt_dir_type_is_other_exec_format(dir_type); 3625 } 3626 3627 static int bnxt_flash_firmware_from_file(struct net_device *dev, 3628 u16 dir_type, 3629 const char *filename) 3630 { 3631 const struct firmware *fw; 3632 int rc; 3633 3634 rc = request_firmware(&fw, filename, &dev->dev); 3635 if (rc != 0) { 3636 netdev_err(dev, "Error %d requesting firmware file: %s\n", 3637 rc, filename); 3638 return rc; 3639 } 3640 if (bnxt_dir_type_is_ape_bin_format(dir_type)) 3641 rc = bnxt_flash_firmware(dev, dir_type, fw->data, fw->size); 3642 else if (bnxt_dir_type_is_other_exec_format(dir_type)) 3643 rc = bnxt_flash_microcode(dev, dir_type, fw->data, fw->size); 3644 else 3645 rc = bnxt_flash_nvram(dev, dir_type, BNX_DIR_ORDINAL_FIRST, 3646 0, 0, 0, fw->data, fw->size); 3647 release_firmware(fw); 3648 return rc; 3649 } 3650 3651 #define MSG_INTEGRITY_ERR "PKG install error : Data integrity on NVM" 3652 #define MSG_INVALID_PKG "PKG install error : Invalid package" 3653 #define MSG_AUTHENTICATION_ERR "PKG install error : Authentication error" 3654 #define MSG_INVALID_DEV "PKG install error : Invalid device" 3655 #define MSG_INTERNAL_ERR "PKG install error : Internal error" 3656 #define MSG_NO_PKG_UPDATE_AREA_ERR "PKG update area not created in nvram" 3657 #define MSG_NO_SPACE_ERR "PKG insufficient update area in nvram" 3658 #define MSG_RESIZE_UPDATE_ERR "Resize UPDATE entry error" 3659 #define MSG_ANTI_ROLLBACK_ERR "HWRM_NVM_INSTALL_UPDATE failure due to Anti-rollback detected" 3660 #define MSG_GENERIC_FAILURE_ERR "HWRM_NVM_INSTALL_UPDATE failure" 3661 3662 static int nvm_update_err_to_stderr(struct net_device *dev, u8 result, 3663 struct netlink_ext_ack *extack) 3664 { 3665 switch (result) { 3666 case NVM_INSTALL_UPDATE_RESP_RESULT_INVALID_TYPE_PARAMETER: 3667 case NVM_INSTALL_UPDATE_RESP_RESULT_INVALID_INDEX_PARAMETER: 3668 case NVM_INSTALL_UPDATE_RESP_RESULT_INSTALL_DATA_ERROR: 3669 case NVM_INSTALL_UPDATE_RESP_RESULT_INSTALL_CHECKSUM_ERROR: 3670 case NVM_INSTALL_UPDATE_RESP_RESULT_ITEM_NOT_FOUND: 3671 case NVM_INSTALL_UPDATE_RESP_RESULT_ITEM_LOCKED: 3672 BNXT_NVM_ERR_MSG(dev, extack, MSG_INTEGRITY_ERR); 3673 return -EINVAL; 3674 case NVM_INSTALL_UPDATE_RESP_RESULT_INVALID_PREREQUISITE: 3675 case NVM_INSTALL_UPDATE_RESP_RESULT_INVALID_FILE_HEADER: 3676 case NVM_INSTALL_UPDATE_RESP_RESULT_INVALID_SIGNATURE: 3677 case NVM_INSTALL_UPDATE_RESP_RESULT_INVALID_PROP_STREAM: 3678 case NVM_INSTALL_UPDATE_RESP_RESULT_INVALID_PROP_LENGTH: 3679 case NVM_INSTALL_UPDATE_RESP_RESULT_INVALID_MANIFEST: 3680 case NVM_INSTALL_UPDATE_RESP_RESULT_INVALID_TRAILER: 3681 case NVM_INSTALL_UPDATE_RESP_RESULT_INVALID_CHECKSUM: 3682 case NVM_INSTALL_UPDATE_RESP_RESULT_INVALID_ITEM_CHECKSUM: 3683 case NVM_INSTALL_UPDATE_RESP_RESULT_INVALID_DATA_LENGTH: 3684 case NVM_INSTALL_UPDATE_RESP_RESULT_INVALID_DIRECTIVE: 3685 case NVM_INSTALL_UPDATE_RESP_RESULT_DUPLICATE_ITEM: 3686 case NVM_INSTALL_UPDATE_RESP_RESULT_ZERO_LENGTH_ITEM: 3687 BNXT_NVM_ERR_MSG(dev, extack, MSG_INVALID_PKG); 3688 return -ENOPKG; 3689 case NVM_INSTALL_UPDATE_RESP_RESULT_INSTALL_AUTHENTICATION_ERROR: 3690 BNXT_NVM_ERR_MSG(dev, extack, MSG_AUTHENTICATION_ERR); 3691 return -EPERM; 3692 case NVM_INSTALL_UPDATE_RESP_RESULT_UNSUPPORTED_CHIP_REV: 3693 case NVM_INSTALL_UPDATE_RESP_RESULT_UNSUPPORTED_DEVICE_ID: 3694 case NVM_INSTALL_UPDATE_RESP_RESULT_UNSUPPORTED_SUBSYS_VENDOR: 3695 case NVM_INSTALL_UPDATE_RESP_RESULT_UNSUPPORTED_SUBSYS_ID: 3696 case NVM_INSTALL_UPDATE_RESP_RESULT_UNSUPPORTED_PLATFORM: 3697 BNXT_NVM_ERR_MSG(dev, extack, MSG_INVALID_DEV); 3698 return -EOPNOTSUPP; 3699 default: 3700 BNXT_NVM_ERR_MSG(dev, extack, MSG_INTERNAL_ERR); 3701 return -EIO; 3702 } 3703 } 3704 3705 #define BNXT_PKG_DMA_SIZE 0x40000 3706 #define BNXT_NVM_MORE_FLAG (cpu_to_le16(NVM_MODIFY_REQ_FLAGS_BATCH_MODE)) 3707 #define BNXT_NVM_LAST_FLAG (cpu_to_le16(NVM_MODIFY_REQ_FLAGS_BATCH_LAST)) 3708 3709 static int bnxt_resize_update_entry(struct net_device *dev, size_t fw_size, 3710 struct netlink_ext_ack *extack) 3711 { 3712 u32 item_len; 3713 int rc; 3714 3715 rc = bnxt_find_nvram_item(dev, BNX_DIR_TYPE_UPDATE, 3716 BNX_DIR_ORDINAL_FIRST, BNX_DIR_EXT_NONE, NULL, 3717 &item_len, NULL); 3718 if (rc) { 3719 BNXT_NVM_ERR_MSG(dev, extack, MSG_NO_PKG_UPDATE_AREA_ERR); 3720 return rc; 3721 } 3722 3723 if (fw_size > item_len) { 3724 rc = bnxt_flash_nvram(dev, BNX_DIR_TYPE_UPDATE, 3725 BNX_DIR_ORDINAL_FIRST, 0, 1, 3726 round_up(fw_size, 4096), NULL, 0); 3727 if (rc) { 3728 BNXT_NVM_ERR_MSG(dev, extack, MSG_RESIZE_UPDATE_ERR); 3729 return rc; 3730 } 3731 } 3732 return 0; 3733 } 3734 3735 int bnxt_flash_package_from_fw_obj(struct net_device *dev, const struct firmware *fw, 3736 u32 install_type, struct netlink_ext_ack *extack) 3737 { 3738 struct hwrm_nvm_install_update_input *install; 3739 struct hwrm_nvm_install_update_output *resp; 3740 struct hwrm_nvm_modify_input *modify; 3741 struct bnxt *bp = netdev_priv(dev); 3742 bool defrag_attempted = false; 3743 dma_addr_t dma_handle; 3744 u8 *kmem = NULL; 3745 u32 modify_len; 3746 u32 item_len; 3747 u8 cmd_err; 3748 u16 index; 3749 int rc; 3750 3751 /* resize before flashing larger image than available space */ 3752 rc = bnxt_resize_update_entry(dev, fw->size, extack); 3753 if (rc) 3754 return rc; 3755 3756 bnxt_hwrm_fw_set_time(bp); 3757 3758 rc = hwrm_req_init(bp, modify, HWRM_NVM_MODIFY); 3759 if (rc) 3760 return rc; 3761 3762 /* Try allocating a large DMA buffer first. Older fw will 3763 * cause excessive NVRAM erases when using small blocks. 3764 */ 3765 modify_len = roundup_pow_of_two(fw->size); 3766 modify_len = min_t(u32, modify_len, BNXT_PKG_DMA_SIZE); 3767 while (1) { 3768 kmem = hwrm_req_dma_slice(bp, modify, modify_len, &dma_handle); 3769 if (!kmem && modify_len > PAGE_SIZE) 3770 modify_len /= 2; 3771 else 3772 break; 3773 } 3774 if (!kmem) { 3775 hwrm_req_drop(bp, modify); 3776 return -ENOMEM; 3777 } 3778 3779 rc = hwrm_req_init(bp, install, HWRM_NVM_INSTALL_UPDATE); 3780 if (rc) { 3781 hwrm_req_drop(bp, modify); 3782 return rc; 3783 } 3784 3785 hwrm_req_timeout(bp, modify, bp->hwrm_cmd_max_timeout); 3786 hwrm_req_timeout(bp, install, bp->hwrm_cmd_max_timeout); 3787 3788 hwrm_req_hold(bp, modify); 3789 modify->host_src_addr = cpu_to_le64(dma_handle); 3790 3791 resp = hwrm_req_hold(bp, install); 3792 if ((install_type & 0xffff) == 0) 3793 install_type >>= 16; 3794 install->install_type = cpu_to_le32(install_type); 3795 3796 do { 3797 u32 copied = 0, len = modify_len; 3798 3799 rc = bnxt_find_nvram_item(dev, BNX_DIR_TYPE_UPDATE, 3800 BNX_DIR_ORDINAL_FIRST, 3801 BNX_DIR_EXT_NONE, 3802 &index, &item_len, NULL); 3803 if (rc) { 3804 BNXT_NVM_ERR_MSG(dev, extack, MSG_NO_PKG_UPDATE_AREA_ERR); 3805 break; 3806 } 3807 if (fw->size > item_len) { 3808 BNXT_NVM_ERR_MSG(dev, extack, MSG_NO_SPACE_ERR); 3809 rc = -EFBIG; 3810 break; 3811 } 3812 3813 modify->dir_idx = cpu_to_le16(index); 3814 3815 if (fw->size > modify_len) 3816 modify->flags = BNXT_NVM_MORE_FLAG; 3817 while (copied < fw->size) { 3818 u32 balance = fw->size - copied; 3819 3820 if (balance <= modify_len) { 3821 len = balance; 3822 if (copied) 3823 modify->flags |= BNXT_NVM_LAST_FLAG; 3824 } 3825 memcpy(kmem, fw->data + copied, len); 3826 modify->len = cpu_to_le32(len); 3827 modify->offset = cpu_to_le32(copied); 3828 rc = hwrm_req_send(bp, modify); 3829 if (rc) 3830 goto pkg_abort; 3831 copied += len; 3832 } 3833 3834 rc = hwrm_req_send_silent(bp, install); 3835 if (!rc) 3836 break; 3837 3838 if (defrag_attempted) { 3839 /* We have tried to defragment already in the previous 3840 * iteration. Return with the result for INSTALL_UPDATE 3841 */ 3842 break; 3843 } 3844 3845 cmd_err = ((struct hwrm_err_output *)resp)->cmd_err; 3846 3847 switch (cmd_err) { 3848 case NVM_INSTALL_UPDATE_CMD_ERR_CODE_ANTI_ROLLBACK: 3849 BNXT_NVM_ERR_MSG(dev, extack, MSG_ANTI_ROLLBACK_ERR); 3850 rc = -EALREADY; 3851 break; 3852 case NVM_INSTALL_UPDATE_CMD_ERR_CODE_FRAG_ERR: 3853 install->flags = 3854 cpu_to_le16(NVM_INSTALL_UPDATE_REQ_FLAGS_ALLOWED_TO_DEFRAG); 3855 3856 rc = hwrm_req_send_silent(bp, install); 3857 if (!rc) 3858 break; 3859 3860 cmd_err = ((struct hwrm_err_output *)resp)->cmd_err; 3861 3862 if (cmd_err == NVM_INSTALL_UPDATE_CMD_ERR_CODE_NO_SPACE) { 3863 /* FW has cleared NVM area, driver will create 3864 * UPDATE directory and try the flash again 3865 */ 3866 defrag_attempted = true; 3867 install->flags = 0; 3868 rc = bnxt_flash_nvram(bp->dev, 3869 BNX_DIR_TYPE_UPDATE, 3870 BNX_DIR_ORDINAL_FIRST, 3871 0, 0, item_len, NULL, 0); 3872 if (!rc) 3873 break; 3874 } 3875 fallthrough; 3876 default: 3877 BNXT_NVM_ERR_MSG(dev, extack, MSG_GENERIC_FAILURE_ERR); 3878 } 3879 } while (defrag_attempted && !rc); 3880 3881 pkg_abort: 3882 hwrm_req_drop(bp, modify); 3883 hwrm_req_drop(bp, install); 3884 3885 if (resp->result) { 3886 netdev_err(dev, "PKG install error = %d, problem_item = %d\n", 3887 (s8)resp->result, (int)resp->problem_item); 3888 rc = nvm_update_err_to_stderr(dev, resp->result, extack); 3889 } 3890 if (rc == -EACCES) 3891 bnxt_print_admin_err(bp); 3892 return rc; 3893 } 3894 3895 static int bnxt_flash_package_from_file(struct net_device *dev, const char *filename, 3896 u32 install_type, struct netlink_ext_ack *extack) 3897 { 3898 const struct firmware *fw; 3899 int rc; 3900 3901 rc = request_firmware(&fw, filename, &dev->dev); 3902 if (rc != 0) { 3903 netdev_err(dev, "PKG error %d requesting file: %s\n", 3904 rc, filename); 3905 return rc; 3906 } 3907 3908 rc = bnxt_flash_package_from_fw_obj(dev, fw, install_type, extack); 3909 3910 release_firmware(fw); 3911 3912 return rc; 3913 } 3914 3915 static int bnxt_flash_device(struct net_device *dev, 3916 struct ethtool_flash *flash) 3917 { 3918 if (!BNXT_PF((struct bnxt *)netdev_priv(dev))) { 3919 netdev_err(dev, "flashdev not supported from a virtual function\n"); 3920 return -EINVAL; 3921 } 3922 3923 if (flash->region == ETHTOOL_FLASH_ALL_REGIONS || 3924 flash->region > 0xffff) 3925 return bnxt_flash_package_from_file(dev, flash->data, 3926 flash->region, NULL); 3927 3928 return bnxt_flash_firmware_from_file(dev, flash->region, flash->data); 3929 } 3930 3931 static int nvm_get_dir_info(struct net_device *dev, u32 *entries, u32 *length) 3932 { 3933 struct hwrm_nvm_get_dir_info_output *output; 3934 struct hwrm_nvm_get_dir_info_input *req; 3935 struct bnxt *bp = netdev_priv(dev); 3936 int rc; 3937 3938 rc = hwrm_req_init(bp, req, HWRM_NVM_GET_DIR_INFO); 3939 if (rc) 3940 return rc; 3941 3942 output = hwrm_req_hold(bp, req); 3943 rc = hwrm_req_send(bp, req); 3944 if (!rc) { 3945 *entries = le32_to_cpu(output->entries); 3946 *length = le32_to_cpu(output->entry_length); 3947 } 3948 hwrm_req_drop(bp, req); 3949 return rc; 3950 } 3951 3952 static int bnxt_get_eeprom_len(struct net_device *dev) 3953 { 3954 struct bnxt *bp = netdev_priv(dev); 3955 3956 if (BNXT_VF(bp)) 3957 return 0; 3958 3959 /* The -1 return value allows the entire 32-bit range of offsets to be 3960 * passed via the ethtool command-line utility. 3961 */ 3962 return -1; 3963 } 3964 3965 static int bnxt_get_nvram_directory(struct net_device *dev, u32 len, u8 *data) 3966 { 3967 struct bnxt *bp = netdev_priv(dev); 3968 int rc; 3969 u32 dir_entries; 3970 u32 entry_length; 3971 u8 *buf; 3972 size_t buflen; 3973 dma_addr_t dma_handle; 3974 struct hwrm_nvm_get_dir_entries_input *req; 3975 3976 rc = nvm_get_dir_info(dev, &dir_entries, &entry_length); 3977 if (rc != 0) 3978 return rc; 3979 3980 if (!dir_entries || !entry_length) 3981 return -EIO; 3982 3983 /* Insert 2 bytes of directory info (count and size of entries) */ 3984 if (len < 2) 3985 return -EINVAL; 3986 3987 *data++ = dir_entries; 3988 *data++ = entry_length; 3989 len -= 2; 3990 memset(data, 0xff, len); 3991 3992 rc = hwrm_req_init(bp, req, HWRM_NVM_GET_DIR_ENTRIES); 3993 if (rc) 3994 return rc; 3995 3996 buflen = mul_u32_u32(dir_entries, entry_length); 3997 buf = hwrm_req_dma_slice(bp, req, buflen, &dma_handle); 3998 if (!buf) { 3999 hwrm_req_drop(bp, req); 4000 return -ENOMEM; 4001 } 4002 req->host_dest_addr = cpu_to_le64(dma_handle); 4003 4004 hwrm_req_hold(bp, req); /* hold the slice */ 4005 rc = hwrm_req_send(bp, req); 4006 if (rc == 0) 4007 memcpy(data, buf, len > buflen ? buflen : len); 4008 hwrm_req_drop(bp, req); 4009 return rc; 4010 } 4011 4012 int bnxt_get_nvram_item(struct net_device *dev, u32 index, u32 offset, 4013 u32 length, u8 *data) 4014 { 4015 struct bnxt *bp = netdev_priv(dev); 4016 int rc; 4017 u8 *buf; 4018 dma_addr_t dma_handle; 4019 struct hwrm_nvm_read_input *req; 4020 4021 if (!length) 4022 return -EINVAL; 4023 4024 rc = hwrm_req_init(bp, req, HWRM_NVM_READ); 4025 if (rc) 4026 return rc; 4027 4028 buf = hwrm_req_dma_slice(bp, req, length, &dma_handle); 4029 if (!buf) { 4030 hwrm_req_drop(bp, req); 4031 return -ENOMEM; 4032 } 4033 4034 req->host_dest_addr = cpu_to_le64(dma_handle); 4035 req->dir_idx = cpu_to_le16(index); 4036 req->offset = cpu_to_le32(offset); 4037 req->len = cpu_to_le32(length); 4038 4039 hwrm_req_hold(bp, req); /* hold the slice */ 4040 rc = hwrm_req_send(bp, req); 4041 if (rc == 0) 4042 memcpy(data, buf, length); 4043 hwrm_req_drop(bp, req); 4044 return rc; 4045 } 4046 4047 int bnxt_find_nvram_item(struct net_device *dev, u16 type, u16 ordinal, 4048 u16 ext, u16 *index, u32 *item_length, 4049 u32 *data_length) 4050 { 4051 struct hwrm_nvm_find_dir_entry_output *output; 4052 struct hwrm_nvm_find_dir_entry_input *req; 4053 struct bnxt *bp = netdev_priv(dev); 4054 int rc; 4055 4056 rc = hwrm_req_init(bp, req, HWRM_NVM_FIND_DIR_ENTRY); 4057 if (rc) 4058 return rc; 4059 4060 req->enables = 0; 4061 req->dir_idx = 0; 4062 req->dir_type = cpu_to_le16(type); 4063 req->dir_ordinal = cpu_to_le16(ordinal); 4064 req->dir_ext = cpu_to_le16(ext); 4065 req->opt_ordinal = NVM_FIND_DIR_ENTRY_REQ_OPT_ORDINAL_EQ; 4066 output = hwrm_req_hold(bp, req); 4067 rc = hwrm_req_send_silent(bp, req); 4068 if (rc == 0) { 4069 if (index) 4070 *index = le16_to_cpu(output->dir_idx); 4071 if (item_length) 4072 *item_length = le32_to_cpu(output->dir_item_length); 4073 if (data_length) 4074 *data_length = le32_to_cpu(output->dir_data_length); 4075 } 4076 hwrm_req_drop(bp, req); 4077 return rc; 4078 } 4079 4080 static char *bnxt_parse_pkglog(int desired_field, u8 *data, size_t datalen) 4081 { 4082 char *retval = NULL; 4083 char *p; 4084 char *value; 4085 int field = 0; 4086 4087 if (datalen < 1) 4088 return NULL; 4089 /* null-terminate the log data (removing last '\n'): */ 4090 data[datalen - 1] = 0; 4091 for (p = data; *p != 0; p++) { 4092 field = 0; 4093 retval = NULL; 4094 while (*p != 0 && *p != '\n') { 4095 value = p; 4096 while (*p != 0 && *p != '\t' && *p != '\n') 4097 p++; 4098 if (field == desired_field) 4099 retval = value; 4100 if (*p != '\t') 4101 break; 4102 *p = 0; 4103 field++; 4104 p++; 4105 } 4106 if (*p == 0) 4107 break; 4108 *p = 0; 4109 } 4110 return retval; 4111 } 4112 4113 int bnxt_get_pkginfo(struct net_device *dev, char *ver, int size) 4114 { 4115 struct bnxt *bp = netdev_priv(dev); 4116 u16 index = 0; 4117 char *pkgver; 4118 u32 pkglen; 4119 u8 *pkgbuf; 4120 int rc; 4121 4122 rc = bnxt_find_nvram_item(dev, BNX_DIR_TYPE_PKG_LOG, 4123 BNX_DIR_ORDINAL_FIRST, BNX_DIR_EXT_NONE, 4124 &index, NULL, &pkglen); 4125 if (rc) 4126 return rc; 4127 4128 pkgbuf = kzalloc(pkglen, GFP_KERNEL); 4129 if (!pkgbuf) { 4130 dev_err(&bp->pdev->dev, "Unable to allocate memory for pkg version, length = %u\n", 4131 pkglen); 4132 return -ENOMEM; 4133 } 4134 4135 rc = bnxt_get_nvram_item(dev, index, 0, pkglen, pkgbuf); 4136 if (rc) 4137 goto err; 4138 4139 pkgver = bnxt_parse_pkglog(BNX_PKG_LOG_FIELD_IDX_PKG_VERSION, pkgbuf, 4140 pkglen); 4141 if (pkgver && *pkgver != 0 && isdigit(*pkgver)) 4142 strscpy(ver, pkgver, size); 4143 else 4144 rc = -ENOENT; 4145 4146 err: 4147 kfree(pkgbuf); 4148 4149 return rc; 4150 } 4151 4152 static void bnxt_get_pkgver(struct net_device *dev) 4153 { 4154 struct bnxt *bp = netdev_priv(dev); 4155 char buf[FW_VER_STR_LEN]; 4156 int len; 4157 4158 if (!bnxt_get_pkginfo(dev, buf, sizeof(buf))) { 4159 len = strlen(bp->fw_ver_str); 4160 snprintf(bp->fw_ver_str + len, FW_VER_STR_LEN - len - 1, 4161 "/pkg %s", buf); 4162 } 4163 } 4164 4165 static int bnxt_get_eeprom(struct net_device *dev, 4166 struct ethtool_eeprom *eeprom, 4167 u8 *data) 4168 { 4169 u32 index; 4170 u32 offset; 4171 4172 if (eeprom->offset == 0) /* special offset value to get directory */ 4173 return bnxt_get_nvram_directory(dev, eeprom->len, data); 4174 4175 index = eeprom->offset >> 24; 4176 offset = eeprom->offset & 0xffffff; 4177 4178 if (index == 0) { 4179 netdev_err(dev, "unsupported index value: %d\n", index); 4180 return -EINVAL; 4181 } 4182 4183 return bnxt_get_nvram_item(dev, index - 1, offset, eeprom->len, data); 4184 } 4185 4186 static int bnxt_erase_nvram_directory(struct net_device *dev, u8 index) 4187 { 4188 struct hwrm_nvm_erase_dir_entry_input *req; 4189 struct bnxt *bp = netdev_priv(dev); 4190 int rc; 4191 4192 rc = hwrm_req_init(bp, req, HWRM_NVM_ERASE_DIR_ENTRY); 4193 if (rc) 4194 return rc; 4195 4196 req->dir_idx = cpu_to_le16(index); 4197 return hwrm_req_send(bp, req); 4198 } 4199 4200 static int bnxt_set_eeprom(struct net_device *dev, 4201 struct ethtool_eeprom *eeprom, 4202 u8 *data) 4203 { 4204 struct bnxt *bp = netdev_priv(dev); 4205 u8 index, dir_op; 4206 u16 type, ext, ordinal, attr; 4207 4208 if (!BNXT_PF(bp)) { 4209 netdev_err(dev, "NVM write not supported from a virtual function\n"); 4210 return -EINVAL; 4211 } 4212 4213 type = eeprom->magic >> 16; 4214 4215 if (type == 0xffff) { /* special value for directory operations */ 4216 index = eeprom->magic & 0xff; 4217 dir_op = eeprom->magic >> 8; 4218 if (index == 0) 4219 return -EINVAL; 4220 switch (dir_op) { 4221 case 0x0e: /* erase */ 4222 if (eeprom->offset != ~eeprom->magic) 4223 return -EINVAL; 4224 return bnxt_erase_nvram_directory(dev, index - 1); 4225 default: 4226 return -EINVAL; 4227 } 4228 } 4229 4230 /* Create or re-write an NVM item: */ 4231 if (bnxt_dir_type_is_executable(type)) 4232 return -EOPNOTSUPP; 4233 ext = eeprom->magic & 0xffff; 4234 ordinal = eeprom->offset >> 16; 4235 attr = eeprom->offset & 0xffff; 4236 4237 return bnxt_flash_nvram(dev, type, ordinal, ext, attr, 0, data, 4238 eeprom->len); 4239 } 4240 4241 static int bnxt_set_eee(struct net_device *dev, struct ethtool_keee *edata) 4242 { 4243 __ETHTOOL_DECLARE_LINK_MODE_MASK(advertising); 4244 __ETHTOOL_DECLARE_LINK_MODE_MASK(tmp); 4245 struct bnxt *bp = netdev_priv(dev); 4246 struct ethtool_keee *eee = &bp->eee; 4247 struct bnxt_link_info *link_info = &bp->link_info; 4248 int rc = 0; 4249 4250 if (!BNXT_PHY_CFG_ABLE(bp)) 4251 return -EOPNOTSUPP; 4252 4253 if (!(bp->phy_flags & BNXT_PHY_FL_EEE_CAP)) 4254 return -EOPNOTSUPP; 4255 4256 mutex_lock(&bp->link_lock); 4257 _bnxt_fw_to_linkmode(advertising, link_info->advertising); 4258 if (!edata->eee_enabled) 4259 goto eee_ok; 4260 4261 if (!(link_info->autoneg & BNXT_AUTONEG_SPEED)) { 4262 netdev_warn(dev, "EEE requires autoneg\n"); 4263 rc = -EINVAL; 4264 goto eee_exit; 4265 } 4266 if (edata->tx_lpi_enabled) { 4267 if (bp->lpi_tmr_hi && (edata->tx_lpi_timer > bp->lpi_tmr_hi || 4268 edata->tx_lpi_timer < bp->lpi_tmr_lo)) { 4269 netdev_warn(dev, "Valid LPI timer range is %d and %d microsecs\n", 4270 bp->lpi_tmr_lo, bp->lpi_tmr_hi); 4271 rc = -EINVAL; 4272 goto eee_exit; 4273 } else if (!bp->lpi_tmr_hi) { 4274 edata->tx_lpi_timer = eee->tx_lpi_timer; 4275 } 4276 } 4277 if (linkmode_empty(edata->advertised)) { 4278 linkmode_and(edata->advertised, advertising, eee->supported); 4279 } else if (linkmode_andnot(tmp, edata->advertised, advertising)) { 4280 netdev_warn(dev, "EEE advertised must be a subset of autoneg advertised speeds\n"); 4281 rc = -EINVAL; 4282 goto eee_exit; 4283 } 4284 4285 linkmode_copy(eee->advertised, edata->advertised); 4286 eee->tx_lpi_enabled = edata->tx_lpi_enabled; 4287 eee->tx_lpi_timer = edata->tx_lpi_timer; 4288 eee_ok: 4289 eee->eee_enabled = edata->eee_enabled; 4290 4291 if (netif_running(dev)) 4292 rc = bnxt_hwrm_set_link_setting(bp, false, true); 4293 4294 eee_exit: 4295 mutex_unlock(&bp->link_lock); 4296 return rc; 4297 } 4298 4299 static int bnxt_get_eee(struct net_device *dev, struct ethtool_keee *edata) 4300 { 4301 struct bnxt *bp = netdev_priv(dev); 4302 4303 if (!(bp->phy_flags & BNXT_PHY_FL_EEE_CAP)) 4304 return -EOPNOTSUPP; 4305 4306 *edata = bp->eee; 4307 if (!bp->eee.eee_enabled) { 4308 /* Preserve tx_lpi_timer so that the last value will be used 4309 * by default when it is re-enabled. 4310 */ 4311 linkmode_zero(edata->advertised); 4312 edata->tx_lpi_enabled = 0; 4313 } 4314 4315 if (!bp->eee.eee_active) 4316 linkmode_zero(edata->lp_advertised); 4317 4318 return 0; 4319 } 4320 4321 static int bnxt_read_sfp_module_eeprom_info(struct bnxt *bp, u16 i2c_addr, 4322 u16 page_number, u8 bank, 4323 u16 start_addr, u16 data_length, 4324 u8 *buf) 4325 { 4326 struct hwrm_port_phy_i2c_read_output *output; 4327 struct hwrm_port_phy_i2c_read_input *req; 4328 int rc, byte_offset = 0; 4329 4330 rc = hwrm_req_init(bp, req, HWRM_PORT_PHY_I2C_READ); 4331 if (rc) 4332 return rc; 4333 4334 output = hwrm_req_hold(bp, req); 4335 req->i2c_slave_addr = i2c_addr; 4336 req->page_number = cpu_to_le16(page_number); 4337 req->port_id = cpu_to_le16(bp->pf.port_id); 4338 do { 4339 u16 xfer_size; 4340 4341 xfer_size = min_t(u16, data_length, BNXT_MAX_PHY_I2C_RESP_SIZE); 4342 data_length -= xfer_size; 4343 req->page_offset = cpu_to_le16(start_addr + byte_offset); 4344 req->data_length = xfer_size; 4345 req->enables = 4346 cpu_to_le32((start_addr + byte_offset ? 4347 PORT_PHY_I2C_READ_REQ_ENABLES_PAGE_OFFSET : 4348 0) | 4349 (bank ? 4350 PORT_PHY_I2C_READ_REQ_ENABLES_BANK_NUMBER : 4351 0)); 4352 rc = hwrm_req_send(bp, req); 4353 if (!rc) 4354 memcpy(buf + byte_offset, output->data, xfer_size); 4355 byte_offset += xfer_size; 4356 } while (!rc && data_length > 0); 4357 hwrm_req_drop(bp, req); 4358 4359 return rc; 4360 } 4361 4362 static int bnxt_get_module_info(struct net_device *dev, 4363 struct ethtool_modinfo *modinfo) 4364 { 4365 u8 data[SFF_DIAG_SUPPORT_OFFSET + 1]; 4366 struct bnxt *bp = netdev_priv(dev); 4367 int rc; 4368 4369 /* No point in going further if phy status indicates 4370 * module is not inserted or if it is powered down or 4371 * if it is of type 10GBase-T 4372 */ 4373 if (bp->link_info.module_status > 4374 PORT_PHY_QCFG_RESP_MODULE_STATUS_WARNINGMSG) 4375 return -EOPNOTSUPP; 4376 4377 /* This feature is not supported in older firmware versions */ 4378 if (bp->hwrm_spec_code < 0x10202) 4379 return -EOPNOTSUPP; 4380 4381 rc = bnxt_read_sfp_module_eeprom_info(bp, I2C_DEV_ADDR_A0, 0, 0, 0, 4382 SFF_DIAG_SUPPORT_OFFSET + 1, 4383 data); 4384 if (!rc) { 4385 u8 module_id = data[0]; 4386 u8 diag_supported = data[SFF_DIAG_SUPPORT_OFFSET]; 4387 4388 switch (module_id) { 4389 case SFF_MODULE_ID_SFP: 4390 modinfo->type = ETH_MODULE_SFF_8472; 4391 modinfo->eeprom_len = ETH_MODULE_SFF_8472_LEN; 4392 if (!diag_supported) 4393 modinfo->eeprom_len = ETH_MODULE_SFF_8436_LEN; 4394 break; 4395 case SFF_MODULE_ID_QSFP: 4396 case SFF_MODULE_ID_QSFP_PLUS: 4397 modinfo->type = ETH_MODULE_SFF_8436; 4398 modinfo->eeprom_len = ETH_MODULE_SFF_8436_LEN; 4399 break; 4400 case SFF_MODULE_ID_QSFP28: 4401 modinfo->type = ETH_MODULE_SFF_8636; 4402 modinfo->eeprom_len = ETH_MODULE_SFF_8636_LEN; 4403 break; 4404 default: 4405 rc = -EOPNOTSUPP; 4406 break; 4407 } 4408 } 4409 return rc; 4410 } 4411 4412 static int bnxt_get_module_eeprom(struct net_device *dev, 4413 struct ethtool_eeprom *eeprom, 4414 u8 *data) 4415 { 4416 struct bnxt *bp = netdev_priv(dev); 4417 u16 start = eeprom->offset, length = eeprom->len; 4418 int rc = 0; 4419 4420 memset(data, 0, eeprom->len); 4421 4422 /* Read A0 portion of the EEPROM */ 4423 if (start < ETH_MODULE_SFF_8436_LEN) { 4424 if (start + eeprom->len > ETH_MODULE_SFF_8436_LEN) 4425 length = ETH_MODULE_SFF_8436_LEN - start; 4426 rc = bnxt_read_sfp_module_eeprom_info(bp, I2C_DEV_ADDR_A0, 0, 0, 4427 start, length, data); 4428 if (rc) 4429 return rc; 4430 start += length; 4431 data += length; 4432 length = eeprom->len - length; 4433 } 4434 4435 /* Read A2 portion of the EEPROM */ 4436 if (length) { 4437 start -= ETH_MODULE_SFF_8436_LEN; 4438 rc = bnxt_read_sfp_module_eeprom_info(bp, I2C_DEV_ADDR_A2, 0, 0, 4439 start, length, data); 4440 } 4441 return rc; 4442 } 4443 4444 static int bnxt_get_module_status(struct bnxt *bp, struct netlink_ext_ack *extack) 4445 { 4446 if (bp->link_info.module_status <= 4447 PORT_PHY_QCFG_RESP_MODULE_STATUS_WARNINGMSG) 4448 return 0; 4449 4450 switch (bp->link_info.module_status) { 4451 case PORT_PHY_QCFG_RESP_MODULE_STATUS_PWRDOWN: 4452 NL_SET_ERR_MSG_MOD(extack, "Transceiver module is powering down"); 4453 break; 4454 case PORT_PHY_QCFG_RESP_MODULE_STATUS_NOTINSERTED: 4455 NL_SET_ERR_MSG_MOD(extack, "Transceiver module not inserted"); 4456 break; 4457 case PORT_PHY_QCFG_RESP_MODULE_STATUS_CURRENTFAULT: 4458 NL_SET_ERR_MSG_MOD(extack, "Transceiver module disabled due to current fault"); 4459 break; 4460 default: 4461 NL_SET_ERR_MSG_MOD(extack, "Unknown error"); 4462 break; 4463 } 4464 return -EINVAL; 4465 } 4466 4467 static int bnxt_get_module_eeprom_by_page(struct net_device *dev, 4468 const struct ethtool_module_eeprom *page_data, 4469 struct netlink_ext_ack *extack) 4470 { 4471 struct bnxt *bp = netdev_priv(dev); 4472 int rc; 4473 4474 rc = bnxt_get_module_status(bp, extack); 4475 if (rc) 4476 return rc; 4477 4478 if (bp->hwrm_spec_code < 0x10202) { 4479 NL_SET_ERR_MSG_MOD(extack, "Firmware version too old"); 4480 return -EINVAL; 4481 } 4482 4483 if (page_data->bank && !(bp->phy_flags & BNXT_PHY_FL_BANK_SEL)) { 4484 NL_SET_ERR_MSG_MOD(extack, "Firmware not capable for bank selection"); 4485 return -EINVAL; 4486 } 4487 4488 rc = bnxt_read_sfp_module_eeprom_info(bp, page_data->i2c_address << 1, 4489 page_data->page, page_data->bank, 4490 page_data->offset, 4491 page_data->length, 4492 page_data->data); 4493 if (rc) { 4494 NL_SET_ERR_MSG_MOD(extack, "Module`s eeprom read failed"); 4495 return rc; 4496 } 4497 return page_data->length; 4498 } 4499 4500 static int bnxt_nway_reset(struct net_device *dev) 4501 { 4502 int rc = 0; 4503 4504 struct bnxt *bp = netdev_priv(dev); 4505 struct bnxt_link_info *link_info = &bp->link_info; 4506 4507 if (!BNXT_PHY_CFG_ABLE(bp)) 4508 return -EOPNOTSUPP; 4509 4510 if (!(link_info->autoneg & BNXT_AUTONEG_SPEED)) 4511 return -EINVAL; 4512 4513 if (netif_running(dev)) 4514 rc = bnxt_hwrm_set_link_setting(bp, true, false); 4515 4516 return rc; 4517 } 4518 4519 static int bnxt_set_phys_id(struct net_device *dev, 4520 enum ethtool_phys_id_state state) 4521 { 4522 struct hwrm_port_led_cfg_input *req; 4523 struct bnxt *bp = netdev_priv(dev); 4524 struct bnxt_pf_info *pf = &bp->pf; 4525 struct bnxt_led_cfg *led_cfg; 4526 u8 led_state; 4527 __le16 duration; 4528 int rc, i; 4529 4530 if (!bp->num_leds || BNXT_VF(bp)) 4531 return -EOPNOTSUPP; 4532 4533 if (state == ETHTOOL_ID_ACTIVE) { 4534 led_state = PORT_LED_CFG_REQ_LED0_STATE_BLINKALT; 4535 duration = cpu_to_le16(500); 4536 } else if (state == ETHTOOL_ID_INACTIVE) { 4537 led_state = PORT_LED_CFG_REQ_LED1_STATE_DEFAULT; 4538 duration = cpu_to_le16(0); 4539 } else { 4540 return -EINVAL; 4541 } 4542 rc = hwrm_req_init(bp, req, HWRM_PORT_LED_CFG); 4543 if (rc) 4544 return rc; 4545 4546 req->port_id = cpu_to_le16(pf->port_id); 4547 req->num_leds = bp->num_leds; 4548 led_cfg = (struct bnxt_led_cfg *)&req->led0_id; 4549 for (i = 0; i < bp->num_leds; i++, led_cfg++) { 4550 req->enables |= BNXT_LED_DFLT_ENABLES(i); 4551 led_cfg->led_id = bp->leds[i].led_id; 4552 led_cfg->led_state = led_state; 4553 led_cfg->led_blink_on = duration; 4554 led_cfg->led_blink_off = duration; 4555 led_cfg->led_group_id = bp->leds[i].led_group_id; 4556 } 4557 return hwrm_req_send(bp, req); 4558 } 4559 4560 static int bnxt_hwrm_selftest_irq(struct bnxt *bp, u16 cmpl_ring) 4561 { 4562 struct hwrm_selftest_irq_input *req; 4563 int rc; 4564 4565 rc = hwrm_req_init(bp, req, HWRM_SELFTEST_IRQ); 4566 if (rc) 4567 return rc; 4568 4569 req->cmpl_ring = cpu_to_le16(cmpl_ring); 4570 return hwrm_req_send(bp, req); 4571 } 4572 4573 static int bnxt_test_irq(struct bnxt *bp) 4574 { 4575 int i; 4576 4577 for (i = 0; i < bp->cp_nr_rings; i++) { 4578 u16 cmpl_ring = bp->grp_info[i].cp_fw_ring_id; 4579 int rc; 4580 4581 rc = bnxt_hwrm_selftest_irq(bp, cmpl_ring); 4582 if (rc) 4583 return rc; 4584 } 4585 return 0; 4586 } 4587 4588 static int bnxt_hwrm_mac_loopback(struct bnxt *bp, bool enable) 4589 { 4590 struct hwrm_port_mac_cfg_input *req; 4591 int rc; 4592 4593 rc = hwrm_req_init(bp, req, HWRM_PORT_MAC_CFG); 4594 if (rc) 4595 return rc; 4596 4597 req->enables = cpu_to_le32(PORT_MAC_CFG_REQ_ENABLES_LPBK); 4598 if (enable) 4599 req->lpbk = PORT_MAC_CFG_REQ_LPBK_LOCAL; 4600 else 4601 req->lpbk = PORT_MAC_CFG_REQ_LPBK_NONE; 4602 return hwrm_req_send(bp, req); 4603 } 4604 4605 static int bnxt_query_force_speeds(struct bnxt *bp, u16 *force_speeds) 4606 { 4607 struct hwrm_port_phy_qcaps_output *resp; 4608 struct hwrm_port_phy_qcaps_input *req; 4609 int rc; 4610 4611 rc = hwrm_req_init(bp, req, HWRM_PORT_PHY_QCAPS); 4612 if (rc) 4613 return rc; 4614 4615 resp = hwrm_req_hold(bp, req); 4616 rc = hwrm_req_send(bp, req); 4617 if (!rc) 4618 *force_speeds = le16_to_cpu(resp->supported_speeds_force_mode); 4619 4620 hwrm_req_drop(bp, req); 4621 return rc; 4622 } 4623 4624 static int bnxt_disable_an_for_lpbk(struct bnxt *bp, 4625 struct hwrm_port_phy_cfg_input *req) 4626 { 4627 struct bnxt_link_info *link_info = &bp->link_info; 4628 u16 fw_advertising; 4629 u16 fw_speed; 4630 int rc; 4631 4632 if (!link_info->autoneg || 4633 (bp->phy_flags & BNXT_PHY_FL_AN_PHY_LPBK)) 4634 return 0; 4635 4636 rc = bnxt_query_force_speeds(bp, &fw_advertising); 4637 if (rc) 4638 return rc; 4639 4640 fw_speed = PORT_PHY_CFG_REQ_FORCE_LINK_SPEED_1GB; 4641 if (BNXT_LINK_IS_UP(bp)) 4642 fw_speed = bp->link_info.link_speed; 4643 else if (fw_advertising & BNXT_LINK_SPEED_MSK_10GB) 4644 fw_speed = PORT_PHY_CFG_REQ_FORCE_LINK_SPEED_10GB; 4645 else if (fw_advertising & BNXT_LINK_SPEED_MSK_25GB) 4646 fw_speed = PORT_PHY_CFG_REQ_FORCE_LINK_SPEED_25GB; 4647 else if (fw_advertising & BNXT_LINK_SPEED_MSK_40GB) 4648 fw_speed = PORT_PHY_CFG_REQ_FORCE_LINK_SPEED_40GB; 4649 else if (fw_advertising & BNXT_LINK_SPEED_MSK_50GB) 4650 fw_speed = PORT_PHY_CFG_REQ_FORCE_LINK_SPEED_50GB; 4651 4652 req->force_link_speed = cpu_to_le16(fw_speed); 4653 req->flags |= cpu_to_le32(PORT_PHY_CFG_REQ_FLAGS_FORCE | 4654 PORT_PHY_CFG_REQ_FLAGS_RESET_PHY); 4655 rc = hwrm_req_send(bp, req); 4656 req->flags = 0; 4657 req->force_link_speed = cpu_to_le16(0); 4658 return rc; 4659 } 4660 4661 static int bnxt_hwrm_phy_loopback(struct bnxt *bp, bool enable, bool ext) 4662 { 4663 struct hwrm_port_phy_cfg_input *req; 4664 int rc; 4665 4666 rc = hwrm_req_init(bp, req, HWRM_PORT_PHY_CFG); 4667 if (rc) 4668 return rc; 4669 4670 /* prevent bnxt_disable_an_for_lpbk() from consuming the request */ 4671 hwrm_req_hold(bp, req); 4672 4673 if (enable) { 4674 bnxt_disable_an_for_lpbk(bp, req); 4675 if (ext) 4676 req->lpbk = PORT_PHY_CFG_REQ_LPBK_EXTERNAL; 4677 else 4678 req->lpbk = PORT_PHY_CFG_REQ_LPBK_LOCAL; 4679 } else { 4680 req->lpbk = PORT_PHY_CFG_REQ_LPBK_NONE; 4681 } 4682 req->enables = cpu_to_le32(PORT_PHY_CFG_REQ_ENABLES_LPBK); 4683 rc = hwrm_req_send(bp, req); 4684 hwrm_req_drop(bp, req); 4685 return rc; 4686 } 4687 4688 static int bnxt_rx_loopback(struct bnxt *bp, struct bnxt_cp_ring_info *cpr, 4689 u32 raw_cons, int pkt_size) 4690 { 4691 struct bnxt_napi *bnapi = cpr->bnapi; 4692 struct bnxt_rx_ring_info *rxr; 4693 struct bnxt_sw_rx_bd *rx_buf; 4694 struct rx_cmp *rxcmp; 4695 u16 cp_cons, cons; 4696 u8 *data; 4697 u32 len; 4698 int i; 4699 4700 rxr = bnapi->rx_ring; 4701 cp_cons = RING_CMP(raw_cons); 4702 rxcmp = (struct rx_cmp *) 4703 &cpr->cp_desc_ring[CP_RING(cp_cons)][CP_IDX(cp_cons)]; 4704 cons = rxcmp->rx_cmp_opaque; 4705 rx_buf = &rxr->rx_buf_ring[cons]; 4706 data = rx_buf->data_ptr; 4707 len = le32_to_cpu(rxcmp->rx_cmp_len_flags_type) >> RX_CMP_LEN_SHIFT; 4708 if (len != pkt_size) 4709 return -EIO; 4710 i = ETH_ALEN; 4711 if (!ether_addr_equal(data + i, bnapi->bp->dev->dev_addr)) 4712 return -EIO; 4713 i += ETH_ALEN; 4714 for ( ; i < pkt_size; i++) { 4715 if (data[i] != (u8)(i & 0xff)) 4716 return -EIO; 4717 } 4718 return 0; 4719 } 4720 4721 static int bnxt_poll_loopback(struct bnxt *bp, struct bnxt_cp_ring_info *cpr, 4722 int pkt_size) 4723 { 4724 struct tx_cmp *txcmp; 4725 int rc = -EIO; 4726 u32 raw_cons; 4727 u32 cons; 4728 int i; 4729 4730 raw_cons = cpr->cp_raw_cons; 4731 for (i = 0; i < 200; i++) { 4732 cons = RING_CMP(raw_cons); 4733 txcmp = &cpr->cp_desc_ring[CP_RING(cons)][CP_IDX(cons)]; 4734 4735 if (!TX_CMP_VALID(txcmp, raw_cons)) { 4736 udelay(5); 4737 continue; 4738 } 4739 4740 /* The valid test of the entry must be done first before 4741 * reading any further. 4742 */ 4743 dma_rmb(); 4744 if (TX_CMP_TYPE(txcmp) == CMP_TYPE_RX_L2_CMP || 4745 TX_CMP_TYPE(txcmp) == CMP_TYPE_RX_L2_V3_CMP) { 4746 rc = bnxt_rx_loopback(bp, cpr, raw_cons, pkt_size); 4747 raw_cons = NEXT_RAW_CMP(raw_cons); 4748 raw_cons = NEXT_RAW_CMP(raw_cons); 4749 break; 4750 } 4751 raw_cons = NEXT_RAW_CMP(raw_cons); 4752 } 4753 cpr->cp_raw_cons = raw_cons; 4754 return rc; 4755 } 4756 4757 static int bnxt_run_loopback(struct bnxt *bp) 4758 { 4759 struct bnxt_tx_ring_info *txr = &bp->tx_ring[0]; 4760 struct bnxt_rx_ring_info *rxr = &bp->rx_ring[0]; 4761 struct bnxt_cp_ring_info *cpr; 4762 int pkt_size, i = 0; 4763 struct sk_buff *skb; 4764 dma_addr_t map; 4765 u8 *data; 4766 int rc; 4767 4768 cpr = &rxr->bnapi->cp_ring; 4769 if (bp->flags & BNXT_FLAG_CHIP_P5_PLUS) 4770 cpr = rxr->rx_cpr; 4771 pkt_size = min(bp->dev->mtu + ETH_HLEN, bp->rx_copy_thresh); 4772 skb = netdev_alloc_skb(bp->dev, pkt_size); 4773 if (!skb) 4774 return -ENOMEM; 4775 data = skb_put(skb, pkt_size); 4776 ether_addr_copy(&data[i], bp->dev->dev_addr); 4777 i += ETH_ALEN; 4778 ether_addr_copy(&data[i], bp->dev->dev_addr); 4779 i += ETH_ALEN; 4780 for ( ; i < pkt_size; i++) 4781 data[i] = (u8)(i & 0xff); 4782 4783 map = dma_map_single(&bp->pdev->dev, skb->data, pkt_size, 4784 DMA_TO_DEVICE); 4785 if (dma_mapping_error(&bp->pdev->dev, map)) { 4786 dev_kfree_skb(skb); 4787 return -EIO; 4788 } 4789 bnxt_xmit_bd(bp, txr, map, pkt_size, NULL); 4790 4791 /* Sync BD data before updating doorbell */ 4792 wmb(); 4793 4794 bnxt_db_write(bp, &txr->tx_db, txr->tx_prod); 4795 rc = bnxt_poll_loopback(bp, cpr, pkt_size); 4796 4797 dma_unmap_single(&bp->pdev->dev, map, pkt_size, DMA_TO_DEVICE); 4798 dev_kfree_skb(skb); 4799 return rc; 4800 } 4801 4802 static int bnxt_run_fw_tests(struct bnxt *bp, u8 test_mask, u8 *test_results) 4803 { 4804 struct hwrm_selftest_exec_output *resp; 4805 struct hwrm_selftest_exec_input *req; 4806 int rc; 4807 4808 rc = hwrm_req_init(bp, req, HWRM_SELFTEST_EXEC); 4809 if (rc) 4810 return rc; 4811 4812 hwrm_req_timeout(bp, req, bp->test_info->timeout); 4813 req->flags = test_mask; 4814 4815 resp = hwrm_req_hold(bp, req); 4816 rc = hwrm_req_send(bp, req); 4817 *test_results = resp->test_success; 4818 hwrm_req_drop(bp, req); 4819 return rc; 4820 } 4821 4822 #define BNXT_DRV_TESTS 4 4823 #define BNXT_MACLPBK_TEST_IDX (bp->num_tests - BNXT_DRV_TESTS) 4824 #define BNXT_PHYLPBK_TEST_IDX (BNXT_MACLPBK_TEST_IDX + 1) 4825 #define BNXT_EXTLPBK_TEST_IDX (BNXT_MACLPBK_TEST_IDX + 2) 4826 #define BNXT_IRQ_TEST_IDX (BNXT_MACLPBK_TEST_IDX + 3) 4827 4828 static void bnxt_self_test(struct net_device *dev, struct ethtool_test *etest, 4829 u64 *buf) 4830 { 4831 struct bnxt *bp = netdev_priv(dev); 4832 bool do_ext_lpbk = false; 4833 bool offline = false; 4834 u8 test_results = 0; 4835 u8 test_mask = 0; 4836 int rc = 0, i; 4837 4838 if (!bp->num_tests || !BNXT_PF(bp)) 4839 return; 4840 4841 if (etest->flags & ETH_TEST_FL_OFFLINE && 4842 bnxt_ulp_registered(bp->edev)) { 4843 etest->flags |= ETH_TEST_FL_FAILED; 4844 netdev_warn(dev, "Offline tests cannot be run with RoCE driver loaded\n"); 4845 return; 4846 } 4847 4848 memset(buf, 0, sizeof(u64) * bp->num_tests); 4849 if (!netif_running(dev)) { 4850 etest->flags |= ETH_TEST_FL_FAILED; 4851 return; 4852 } 4853 4854 if ((etest->flags & ETH_TEST_FL_EXTERNAL_LB) && 4855 (bp->phy_flags & BNXT_PHY_FL_EXT_LPBK)) 4856 do_ext_lpbk = true; 4857 4858 if (etest->flags & ETH_TEST_FL_OFFLINE) { 4859 if (bp->pf.active_vfs || !BNXT_SINGLE_PF(bp)) { 4860 etest->flags |= ETH_TEST_FL_FAILED; 4861 netdev_warn(dev, "Offline tests cannot be run with active VFs or on shared PF\n"); 4862 return; 4863 } 4864 offline = true; 4865 } 4866 4867 for (i = 0; i < bp->num_tests - BNXT_DRV_TESTS; i++) { 4868 u8 bit_val = 1 << i; 4869 4870 if (!(bp->test_info->offline_mask & bit_val)) 4871 test_mask |= bit_val; 4872 else if (offline) 4873 test_mask |= bit_val; 4874 } 4875 if (!offline) { 4876 bnxt_run_fw_tests(bp, test_mask, &test_results); 4877 } else { 4878 bnxt_close_nic(bp, true, false); 4879 bnxt_run_fw_tests(bp, test_mask, &test_results); 4880 4881 buf[BNXT_MACLPBK_TEST_IDX] = 1; 4882 bnxt_hwrm_mac_loopback(bp, true); 4883 msleep(250); 4884 rc = bnxt_half_open_nic(bp); 4885 if (rc) { 4886 bnxt_hwrm_mac_loopback(bp, false); 4887 etest->flags |= ETH_TEST_FL_FAILED; 4888 return; 4889 } 4890 if (bnxt_run_loopback(bp)) 4891 etest->flags |= ETH_TEST_FL_FAILED; 4892 else 4893 buf[BNXT_MACLPBK_TEST_IDX] = 0; 4894 4895 bnxt_hwrm_mac_loopback(bp, false); 4896 bnxt_hwrm_phy_loopback(bp, true, false); 4897 msleep(1000); 4898 if (bnxt_run_loopback(bp)) { 4899 buf[BNXT_PHYLPBK_TEST_IDX] = 1; 4900 etest->flags |= ETH_TEST_FL_FAILED; 4901 } 4902 if (do_ext_lpbk) { 4903 etest->flags |= ETH_TEST_FL_EXTERNAL_LB_DONE; 4904 bnxt_hwrm_phy_loopback(bp, true, true); 4905 msleep(1000); 4906 if (bnxt_run_loopback(bp)) { 4907 buf[BNXT_EXTLPBK_TEST_IDX] = 1; 4908 etest->flags |= ETH_TEST_FL_FAILED; 4909 } 4910 } 4911 bnxt_hwrm_phy_loopback(bp, false, false); 4912 bnxt_half_close_nic(bp); 4913 rc = bnxt_open_nic(bp, true, true); 4914 } 4915 if (rc || bnxt_test_irq(bp)) { 4916 buf[BNXT_IRQ_TEST_IDX] = 1; 4917 etest->flags |= ETH_TEST_FL_FAILED; 4918 } 4919 for (i = 0; i < bp->num_tests - BNXT_DRV_TESTS; i++) { 4920 u8 bit_val = 1 << i; 4921 4922 if ((test_mask & bit_val) && !(test_results & bit_val)) { 4923 buf[i] = 1; 4924 etest->flags |= ETH_TEST_FL_FAILED; 4925 } 4926 } 4927 } 4928 4929 static int bnxt_reset(struct net_device *dev, u32 *flags) 4930 { 4931 struct bnxt *bp = netdev_priv(dev); 4932 bool reload = false; 4933 u32 req = *flags; 4934 4935 if (!req) 4936 return -EINVAL; 4937 4938 if (!BNXT_PF(bp)) { 4939 netdev_err(dev, "Reset is not supported from a VF\n"); 4940 return -EOPNOTSUPP; 4941 } 4942 4943 if (pci_vfs_assigned(bp->pdev) && 4944 !(bp->fw_cap & BNXT_FW_CAP_HOT_RESET)) { 4945 netdev_err(dev, 4946 "Reset not allowed when VFs are assigned to VMs\n"); 4947 return -EBUSY; 4948 } 4949 4950 if ((req & BNXT_FW_RESET_CHIP) == BNXT_FW_RESET_CHIP) { 4951 /* This feature is not supported in older firmware versions */ 4952 if (bp->hwrm_spec_code >= 0x10803) { 4953 if (!bnxt_firmware_reset_chip(dev)) { 4954 netdev_info(dev, "Firmware reset request successful.\n"); 4955 if (!(bp->fw_cap & BNXT_FW_CAP_HOT_RESET)) 4956 reload = true; 4957 *flags &= ~BNXT_FW_RESET_CHIP; 4958 } 4959 } else if (req == BNXT_FW_RESET_CHIP) { 4960 return -EOPNOTSUPP; /* only request, fail hard */ 4961 } 4962 } 4963 4964 if (!BNXT_CHIP_P4_PLUS(bp) && (req & BNXT_FW_RESET_AP)) { 4965 /* This feature is not supported in older firmware versions */ 4966 if (bp->hwrm_spec_code >= 0x10803) { 4967 if (!bnxt_firmware_reset_ap(dev)) { 4968 netdev_info(dev, "Reset application processor successful.\n"); 4969 reload = true; 4970 *flags &= ~BNXT_FW_RESET_AP; 4971 } 4972 } else if (req == BNXT_FW_RESET_AP) { 4973 return -EOPNOTSUPP; /* only request, fail hard */ 4974 } 4975 } 4976 4977 if (reload) 4978 netdev_info(dev, "Reload driver to complete reset\n"); 4979 4980 return 0; 4981 } 4982 4983 static int bnxt_set_dump(struct net_device *dev, struct ethtool_dump *dump) 4984 { 4985 struct bnxt *bp = netdev_priv(dev); 4986 4987 if (dump->flag > BNXT_DUMP_CRASH) { 4988 netdev_info(dev, "Supports only Live(0) and Crash(1) dumps.\n"); 4989 return -EINVAL; 4990 } 4991 4992 if (!IS_ENABLED(CONFIG_TEE_BNXT_FW) && dump->flag == BNXT_DUMP_CRASH) { 4993 netdev_info(dev, "Cannot collect crash dump as TEE_BNXT_FW config option is not enabled.\n"); 4994 return -EOPNOTSUPP; 4995 } 4996 4997 bp->dump_flag = dump->flag; 4998 return 0; 4999 } 5000 5001 static int bnxt_get_dump_flag(struct net_device *dev, struct ethtool_dump *dump) 5002 { 5003 struct bnxt *bp = netdev_priv(dev); 5004 5005 if (bp->hwrm_spec_code < 0x10801) 5006 return -EOPNOTSUPP; 5007 5008 dump->version = bp->ver_resp.hwrm_fw_maj_8b << 24 | 5009 bp->ver_resp.hwrm_fw_min_8b << 16 | 5010 bp->ver_resp.hwrm_fw_bld_8b << 8 | 5011 bp->ver_resp.hwrm_fw_rsvd_8b; 5012 5013 dump->flag = bp->dump_flag; 5014 dump->len = bnxt_get_coredump_length(bp, bp->dump_flag); 5015 return 0; 5016 } 5017 5018 static int bnxt_get_dump_data(struct net_device *dev, struct ethtool_dump *dump, 5019 void *buf) 5020 { 5021 struct bnxt *bp = netdev_priv(dev); 5022 5023 if (bp->hwrm_spec_code < 0x10801) 5024 return -EOPNOTSUPP; 5025 5026 memset(buf, 0, dump->len); 5027 5028 dump->flag = bp->dump_flag; 5029 return bnxt_get_coredump(bp, dump->flag, buf, &dump->len); 5030 } 5031 5032 static int bnxt_get_ts_info(struct net_device *dev, 5033 struct kernel_ethtool_ts_info *info) 5034 { 5035 struct bnxt *bp = netdev_priv(dev); 5036 struct bnxt_ptp_cfg *ptp; 5037 5038 ptp = bp->ptp_cfg; 5039 info->so_timestamping = SOF_TIMESTAMPING_TX_SOFTWARE | 5040 SOF_TIMESTAMPING_RX_SOFTWARE | 5041 SOF_TIMESTAMPING_SOFTWARE; 5042 5043 info->phc_index = -1; 5044 if (!ptp) 5045 return 0; 5046 5047 info->so_timestamping |= SOF_TIMESTAMPING_TX_HARDWARE | 5048 SOF_TIMESTAMPING_RX_HARDWARE | 5049 SOF_TIMESTAMPING_RAW_HARDWARE; 5050 if (ptp->ptp_clock) 5051 info->phc_index = ptp_clock_index(ptp->ptp_clock); 5052 5053 info->tx_types = (1 << HWTSTAMP_TX_OFF) | (1 << HWTSTAMP_TX_ON); 5054 5055 info->rx_filters = (1 << HWTSTAMP_FILTER_NONE) | 5056 (1 << HWTSTAMP_FILTER_PTP_V2_L2_EVENT) | 5057 (1 << HWTSTAMP_FILTER_PTP_V2_L4_EVENT); 5058 5059 if (bp->fw_cap & BNXT_FW_CAP_RX_ALL_PKT_TS) 5060 info->rx_filters |= (1 << HWTSTAMP_FILTER_ALL); 5061 return 0; 5062 } 5063 5064 void bnxt_ethtool_init(struct bnxt *bp) 5065 { 5066 struct hwrm_selftest_qlist_output *resp; 5067 struct hwrm_selftest_qlist_input *req; 5068 struct bnxt_test_info *test_info; 5069 struct net_device *dev = bp->dev; 5070 int i, rc; 5071 5072 if (!(bp->fw_cap & BNXT_FW_CAP_PKG_VER)) 5073 bnxt_get_pkgver(dev); 5074 5075 bp->num_tests = 0; 5076 if (bp->hwrm_spec_code < 0x10704 || !BNXT_PF(bp)) 5077 return; 5078 5079 test_info = bp->test_info; 5080 if (!test_info) { 5081 test_info = kzalloc(sizeof(*bp->test_info), GFP_KERNEL); 5082 if (!test_info) 5083 return; 5084 bp->test_info = test_info; 5085 } 5086 5087 if (hwrm_req_init(bp, req, HWRM_SELFTEST_QLIST)) 5088 return; 5089 5090 resp = hwrm_req_hold(bp, req); 5091 rc = hwrm_req_send_silent(bp, req); 5092 if (rc) 5093 goto ethtool_init_exit; 5094 5095 bp->num_tests = resp->num_tests + BNXT_DRV_TESTS; 5096 if (bp->num_tests > BNXT_MAX_TEST) 5097 bp->num_tests = BNXT_MAX_TEST; 5098 5099 test_info->offline_mask = resp->offline_tests; 5100 test_info->timeout = le16_to_cpu(resp->test_timeout); 5101 if (!test_info->timeout) 5102 test_info->timeout = HWRM_CMD_TIMEOUT; 5103 for (i = 0; i < bp->num_tests; i++) { 5104 char *str = test_info->string[i]; 5105 char *fw_str = resp->test_name[i]; 5106 5107 if (i == BNXT_MACLPBK_TEST_IDX) { 5108 strcpy(str, "Mac loopback test (offline)"); 5109 } else if (i == BNXT_PHYLPBK_TEST_IDX) { 5110 strcpy(str, "Phy loopback test (offline)"); 5111 } else if (i == BNXT_EXTLPBK_TEST_IDX) { 5112 strcpy(str, "Ext loopback test (offline)"); 5113 } else if (i == BNXT_IRQ_TEST_IDX) { 5114 strcpy(str, "Interrupt_test (offline)"); 5115 } else { 5116 snprintf(str, ETH_GSTRING_LEN, "%s test (%s)", 5117 fw_str, test_info->offline_mask & (1 << i) ? 5118 "offline" : "online"); 5119 } 5120 } 5121 5122 ethtool_init_exit: 5123 hwrm_req_drop(bp, req); 5124 } 5125 5126 static void bnxt_get_eth_phy_stats(struct net_device *dev, 5127 struct ethtool_eth_phy_stats *phy_stats) 5128 { 5129 struct bnxt *bp = netdev_priv(dev); 5130 u64 *rx; 5131 5132 if (BNXT_VF(bp) || !(bp->flags & BNXT_FLAG_PORT_STATS_EXT)) 5133 return; 5134 5135 rx = bp->rx_port_stats_ext.sw_stats; 5136 phy_stats->SymbolErrorDuringCarrier = 5137 *(rx + BNXT_RX_STATS_EXT_OFFSET(rx_pcs_symbol_err)); 5138 } 5139 5140 static void bnxt_get_eth_mac_stats(struct net_device *dev, 5141 struct ethtool_eth_mac_stats *mac_stats) 5142 { 5143 struct bnxt *bp = netdev_priv(dev); 5144 u64 *rx, *tx; 5145 5146 if (BNXT_VF(bp) || !(bp->flags & BNXT_FLAG_PORT_STATS)) 5147 return; 5148 5149 rx = bp->port_stats.sw_stats; 5150 tx = bp->port_stats.sw_stats + BNXT_TX_PORT_STATS_BYTE_OFFSET / 8; 5151 5152 mac_stats->FramesReceivedOK = 5153 BNXT_GET_RX_PORT_STATS64(rx, rx_good_frames); 5154 mac_stats->FramesTransmittedOK = 5155 BNXT_GET_TX_PORT_STATS64(tx, tx_good_frames); 5156 mac_stats->FrameCheckSequenceErrors = 5157 BNXT_GET_RX_PORT_STATS64(rx, rx_fcs_err_frames); 5158 mac_stats->AlignmentErrors = 5159 BNXT_GET_RX_PORT_STATS64(rx, rx_align_err_frames); 5160 mac_stats->OutOfRangeLengthField = 5161 BNXT_GET_RX_PORT_STATS64(rx, rx_oor_len_frames); 5162 } 5163 5164 static void bnxt_get_eth_ctrl_stats(struct net_device *dev, 5165 struct ethtool_eth_ctrl_stats *ctrl_stats) 5166 { 5167 struct bnxt *bp = netdev_priv(dev); 5168 u64 *rx; 5169 5170 if (BNXT_VF(bp) || !(bp->flags & BNXT_FLAG_PORT_STATS)) 5171 return; 5172 5173 rx = bp->port_stats.sw_stats; 5174 ctrl_stats->MACControlFramesReceived = 5175 BNXT_GET_RX_PORT_STATS64(rx, rx_ctrl_frames); 5176 } 5177 5178 static const struct ethtool_rmon_hist_range bnxt_rmon_ranges[] = { 5179 { 0, 64 }, 5180 { 65, 127 }, 5181 { 128, 255 }, 5182 { 256, 511 }, 5183 { 512, 1023 }, 5184 { 1024, 1518 }, 5185 { 1519, 2047 }, 5186 { 2048, 4095 }, 5187 { 4096, 9216 }, 5188 { 9217, 16383 }, 5189 {} 5190 }; 5191 5192 static void bnxt_get_rmon_stats(struct net_device *dev, 5193 struct ethtool_rmon_stats *rmon_stats, 5194 const struct ethtool_rmon_hist_range **ranges) 5195 { 5196 struct bnxt *bp = netdev_priv(dev); 5197 u64 *rx, *tx; 5198 5199 if (BNXT_VF(bp) || !(bp->flags & BNXT_FLAG_PORT_STATS)) 5200 return; 5201 5202 rx = bp->port_stats.sw_stats; 5203 tx = bp->port_stats.sw_stats + BNXT_TX_PORT_STATS_BYTE_OFFSET / 8; 5204 5205 rmon_stats->jabbers = 5206 BNXT_GET_RX_PORT_STATS64(rx, rx_jbr_frames); 5207 rmon_stats->oversize_pkts = 5208 BNXT_GET_RX_PORT_STATS64(rx, rx_ovrsz_frames); 5209 rmon_stats->undersize_pkts = 5210 BNXT_GET_RX_PORT_STATS64(rx, rx_undrsz_frames); 5211 5212 rmon_stats->hist[0] = BNXT_GET_RX_PORT_STATS64(rx, rx_64b_frames); 5213 rmon_stats->hist[1] = BNXT_GET_RX_PORT_STATS64(rx, rx_65b_127b_frames); 5214 rmon_stats->hist[2] = BNXT_GET_RX_PORT_STATS64(rx, rx_128b_255b_frames); 5215 rmon_stats->hist[3] = BNXT_GET_RX_PORT_STATS64(rx, rx_256b_511b_frames); 5216 rmon_stats->hist[4] = 5217 BNXT_GET_RX_PORT_STATS64(rx, rx_512b_1023b_frames); 5218 rmon_stats->hist[5] = 5219 BNXT_GET_RX_PORT_STATS64(rx, rx_1024b_1518b_frames); 5220 rmon_stats->hist[6] = 5221 BNXT_GET_RX_PORT_STATS64(rx, rx_1519b_2047b_frames); 5222 rmon_stats->hist[7] = 5223 BNXT_GET_RX_PORT_STATS64(rx, rx_2048b_4095b_frames); 5224 rmon_stats->hist[8] = 5225 BNXT_GET_RX_PORT_STATS64(rx, rx_4096b_9216b_frames); 5226 rmon_stats->hist[9] = 5227 BNXT_GET_RX_PORT_STATS64(rx, rx_9217b_16383b_frames); 5228 5229 rmon_stats->hist_tx[0] = 5230 BNXT_GET_TX_PORT_STATS64(tx, tx_64b_frames); 5231 rmon_stats->hist_tx[1] = 5232 BNXT_GET_TX_PORT_STATS64(tx, tx_65b_127b_frames); 5233 rmon_stats->hist_tx[2] = 5234 BNXT_GET_TX_PORT_STATS64(tx, tx_128b_255b_frames); 5235 rmon_stats->hist_tx[3] = 5236 BNXT_GET_TX_PORT_STATS64(tx, tx_256b_511b_frames); 5237 rmon_stats->hist_tx[4] = 5238 BNXT_GET_TX_PORT_STATS64(tx, tx_512b_1023b_frames); 5239 rmon_stats->hist_tx[5] = 5240 BNXT_GET_TX_PORT_STATS64(tx, tx_1024b_1518b_frames); 5241 rmon_stats->hist_tx[6] = 5242 BNXT_GET_TX_PORT_STATS64(tx, tx_1519b_2047b_frames); 5243 rmon_stats->hist_tx[7] = 5244 BNXT_GET_TX_PORT_STATS64(tx, tx_2048b_4095b_frames); 5245 rmon_stats->hist_tx[8] = 5246 BNXT_GET_TX_PORT_STATS64(tx, tx_4096b_9216b_frames); 5247 rmon_stats->hist_tx[9] = 5248 BNXT_GET_TX_PORT_STATS64(tx, tx_9217b_16383b_frames); 5249 5250 *ranges = bnxt_rmon_ranges; 5251 } 5252 5253 static void bnxt_get_ptp_stats(struct net_device *dev, 5254 struct ethtool_ts_stats *ts_stats) 5255 { 5256 struct bnxt *bp = netdev_priv(dev); 5257 struct bnxt_ptp_cfg *ptp = bp->ptp_cfg; 5258 5259 if (ptp) { 5260 ts_stats->pkts = ptp->stats.ts_pkts; 5261 ts_stats->lost = ptp->stats.ts_lost; 5262 ts_stats->err = atomic64_read(&ptp->stats.ts_err); 5263 } 5264 } 5265 5266 static void bnxt_get_link_ext_stats(struct net_device *dev, 5267 struct ethtool_link_ext_stats *stats) 5268 { 5269 struct bnxt *bp = netdev_priv(dev); 5270 u64 *rx; 5271 5272 if (BNXT_VF(bp) || !(bp->flags & BNXT_FLAG_PORT_STATS_EXT)) 5273 return; 5274 5275 rx = bp->rx_port_stats_ext.sw_stats; 5276 stats->link_down_events = 5277 *(rx + BNXT_RX_STATS_EXT_OFFSET(link_down_events)); 5278 } 5279 5280 void bnxt_ethtool_free(struct bnxt *bp) 5281 { 5282 kfree(bp->test_info); 5283 bp->test_info = NULL; 5284 } 5285 5286 const struct ethtool_ops bnxt_ethtool_ops = { 5287 .cap_link_lanes_supported = 1, 5288 .cap_rss_ctx_supported = 1, 5289 .rxfh_max_num_contexts = BNXT_MAX_ETH_RSS_CTX + 1, 5290 .rxfh_indir_space = BNXT_MAX_RSS_TABLE_ENTRIES_P5, 5291 .rxfh_priv_size = sizeof(struct bnxt_rss_ctx), 5292 .supported_coalesce_params = ETHTOOL_COALESCE_USECS | 5293 ETHTOOL_COALESCE_MAX_FRAMES | 5294 ETHTOOL_COALESCE_USECS_IRQ | 5295 ETHTOOL_COALESCE_MAX_FRAMES_IRQ | 5296 ETHTOOL_COALESCE_STATS_BLOCK_USECS | 5297 ETHTOOL_COALESCE_USE_ADAPTIVE_RX | 5298 ETHTOOL_COALESCE_USE_CQE, 5299 .get_link_ksettings = bnxt_get_link_ksettings, 5300 .set_link_ksettings = bnxt_set_link_ksettings, 5301 .get_fec_stats = bnxt_get_fec_stats, 5302 .get_fecparam = bnxt_get_fecparam, 5303 .set_fecparam = bnxt_set_fecparam, 5304 .get_pause_stats = bnxt_get_pause_stats, 5305 .get_pauseparam = bnxt_get_pauseparam, 5306 .set_pauseparam = bnxt_set_pauseparam, 5307 .get_drvinfo = bnxt_get_drvinfo, 5308 .get_regs_len = bnxt_get_regs_len, 5309 .get_regs = bnxt_get_regs, 5310 .get_wol = bnxt_get_wol, 5311 .set_wol = bnxt_set_wol, 5312 .get_coalesce = bnxt_get_coalesce, 5313 .set_coalesce = bnxt_set_coalesce, 5314 .get_msglevel = bnxt_get_msglevel, 5315 .set_msglevel = bnxt_set_msglevel, 5316 .get_sset_count = bnxt_get_sset_count, 5317 .get_strings = bnxt_get_strings, 5318 .get_ethtool_stats = bnxt_get_ethtool_stats, 5319 .set_ringparam = bnxt_set_ringparam, 5320 .get_ringparam = bnxt_get_ringparam, 5321 .get_channels = bnxt_get_channels, 5322 .set_channels = bnxt_set_channels, 5323 .get_rxnfc = bnxt_get_rxnfc, 5324 .set_rxnfc = bnxt_set_rxnfc, 5325 .get_rxfh_indir_size = bnxt_get_rxfh_indir_size, 5326 .get_rxfh_key_size = bnxt_get_rxfh_key_size, 5327 .get_rxfh = bnxt_get_rxfh, 5328 .set_rxfh = bnxt_set_rxfh, 5329 .create_rxfh_context = bnxt_create_rxfh_context, 5330 .modify_rxfh_context = bnxt_modify_rxfh_context, 5331 .remove_rxfh_context = bnxt_remove_rxfh_context, 5332 .flash_device = bnxt_flash_device, 5333 .get_eeprom_len = bnxt_get_eeprom_len, 5334 .get_eeprom = bnxt_get_eeprom, 5335 .set_eeprom = bnxt_set_eeprom, 5336 .get_link = bnxt_get_link, 5337 .get_link_ext_stats = bnxt_get_link_ext_stats, 5338 .get_eee = bnxt_get_eee, 5339 .set_eee = bnxt_set_eee, 5340 .get_module_info = bnxt_get_module_info, 5341 .get_module_eeprom = bnxt_get_module_eeprom, 5342 .get_module_eeprom_by_page = bnxt_get_module_eeprom_by_page, 5343 .nway_reset = bnxt_nway_reset, 5344 .set_phys_id = bnxt_set_phys_id, 5345 .self_test = bnxt_self_test, 5346 .get_ts_info = bnxt_get_ts_info, 5347 .reset = bnxt_reset, 5348 .set_dump = bnxt_set_dump, 5349 .get_dump_flag = bnxt_get_dump_flag, 5350 .get_dump_data = bnxt_get_dump_data, 5351 .get_eth_phy_stats = bnxt_get_eth_phy_stats, 5352 .get_eth_mac_stats = bnxt_get_eth_mac_stats, 5353 .get_eth_ctrl_stats = bnxt_get_eth_ctrl_stats, 5354 .get_rmon_stats = bnxt_get_rmon_stats, 5355 .get_ts_stats = bnxt_get_ptp_stats, 5356 }; 5357