1 /* Broadcom NetXtreme-C/E network driver. 2 * 3 * Copyright (c) 2014-2016 Broadcom Corporation 4 * Copyright (c) 2016-2017 Broadcom Limited 5 * 6 * This program is free software; you can redistribute it and/or modify 7 * it under the terms of the GNU General Public License as published by 8 * the Free Software Foundation. 9 */ 10 11 #include <linux/ctype.h> 12 #include <linux/stringify.h> 13 #include <linux/ethtool.h> 14 #include <linux/ethtool_netlink.h> 15 #include <linux/linkmode.h> 16 #include <linux/interrupt.h> 17 #include <linux/pci.h> 18 #include <linux/etherdevice.h> 19 #include <linux/crc32.h> 20 #include <linux/firmware.h> 21 #include <linux/utsname.h> 22 #include <linux/time.h> 23 #include <linux/ptp_clock_kernel.h> 24 #include <linux/net_tstamp.h> 25 #include <linux/timecounter.h> 26 #include "bnxt_hsi.h" 27 #include "bnxt.h" 28 #include "bnxt_hwrm.h" 29 #include "bnxt_xdp.h" 30 #include "bnxt_ptp.h" 31 #include "bnxt_ethtool.h" 32 #include "bnxt_nvm_defs.h" /* NVRAM content constant and structure defs */ 33 #include "bnxt_fw_hdr.h" /* Firmware hdr constant and structure defs */ 34 #include "bnxt_coredump.h" 35 36 static u32 bnxt_get_msglevel(struct net_device *dev) 37 { 38 struct bnxt *bp = netdev_priv(dev); 39 40 return bp->msg_enable; 41 } 42 43 static void bnxt_set_msglevel(struct net_device *dev, u32 value) 44 { 45 struct bnxt *bp = netdev_priv(dev); 46 47 bp->msg_enable = value; 48 } 49 50 static int bnxt_get_coalesce(struct net_device *dev, 51 struct ethtool_coalesce *coal, 52 struct kernel_ethtool_coalesce *kernel_coal, 53 struct netlink_ext_ack *extack) 54 { 55 struct bnxt *bp = netdev_priv(dev); 56 struct bnxt_coal *hw_coal; 57 u16 mult; 58 59 memset(coal, 0, sizeof(*coal)); 60 61 coal->use_adaptive_rx_coalesce = bp->flags & BNXT_FLAG_DIM; 62 63 hw_coal = &bp->rx_coal; 64 mult = hw_coal->bufs_per_record; 65 coal->rx_coalesce_usecs = hw_coal->coal_ticks; 66 coal->rx_max_coalesced_frames = hw_coal->coal_bufs / mult; 67 coal->rx_coalesce_usecs_irq = hw_coal->coal_ticks_irq; 68 coal->rx_max_coalesced_frames_irq = hw_coal->coal_bufs_irq / mult; 69 if (hw_coal->flags & 70 RING_CMPL_RING_CFG_AGGINT_PARAMS_REQ_FLAGS_TIMER_RESET) 71 kernel_coal->use_cqe_mode_rx = true; 72 73 hw_coal = &bp->tx_coal; 74 mult = hw_coal->bufs_per_record; 75 coal->tx_coalesce_usecs = hw_coal->coal_ticks; 76 coal->tx_max_coalesced_frames = hw_coal->coal_bufs / mult; 77 coal->tx_coalesce_usecs_irq = hw_coal->coal_ticks_irq; 78 coal->tx_max_coalesced_frames_irq = hw_coal->coal_bufs_irq / mult; 79 if (hw_coal->flags & 80 RING_CMPL_RING_CFG_AGGINT_PARAMS_REQ_FLAGS_TIMER_RESET) 81 kernel_coal->use_cqe_mode_tx = true; 82 83 coal->stats_block_coalesce_usecs = bp->stats_coal_ticks; 84 85 return 0; 86 } 87 88 static int bnxt_set_coalesce(struct net_device *dev, 89 struct ethtool_coalesce *coal, 90 struct kernel_ethtool_coalesce *kernel_coal, 91 struct netlink_ext_ack *extack) 92 { 93 struct bnxt *bp = netdev_priv(dev); 94 bool update_stats = false; 95 struct bnxt_coal *hw_coal; 96 int rc = 0; 97 u16 mult; 98 99 if (coal->use_adaptive_rx_coalesce) { 100 bp->flags |= BNXT_FLAG_DIM; 101 } else { 102 if (bp->flags & BNXT_FLAG_DIM) { 103 bp->flags &= ~(BNXT_FLAG_DIM); 104 goto reset_coalesce; 105 } 106 } 107 108 if ((kernel_coal->use_cqe_mode_rx || kernel_coal->use_cqe_mode_tx) && 109 !(bp->coal_cap.cmpl_params & 110 RING_AGGINT_QCAPS_RESP_CMPL_PARAMS_TIMER_RESET)) 111 return -EOPNOTSUPP; 112 113 hw_coal = &bp->rx_coal; 114 mult = hw_coal->bufs_per_record; 115 hw_coal->coal_ticks = coal->rx_coalesce_usecs; 116 hw_coal->coal_bufs = coal->rx_max_coalesced_frames * mult; 117 hw_coal->coal_ticks_irq = coal->rx_coalesce_usecs_irq; 118 hw_coal->coal_bufs_irq = coal->rx_max_coalesced_frames_irq * mult; 119 hw_coal->flags &= 120 ~RING_CMPL_RING_CFG_AGGINT_PARAMS_REQ_FLAGS_TIMER_RESET; 121 if (kernel_coal->use_cqe_mode_rx) 122 hw_coal->flags |= 123 RING_CMPL_RING_CFG_AGGINT_PARAMS_REQ_FLAGS_TIMER_RESET; 124 125 hw_coal = &bp->tx_coal; 126 mult = hw_coal->bufs_per_record; 127 hw_coal->coal_ticks = coal->tx_coalesce_usecs; 128 hw_coal->coal_bufs = coal->tx_max_coalesced_frames * mult; 129 hw_coal->coal_ticks_irq = coal->tx_coalesce_usecs_irq; 130 hw_coal->coal_bufs_irq = coal->tx_max_coalesced_frames_irq * mult; 131 hw_coal->flags &= 132 ~RING_CMPL_RING_CFG_AGGINT_PARAMS_REQ_FLAGS_TIMER_RESET; 133 if (kernel_coal->use_cqe_mode_tx) 134 hw_coal->flags |= 135 RING_CMPL_RING_CFG_AGGINT_PARAMS_REQ_FLAGS_TIMER_RESET; 136 137 if (bp->stats_coal_ticks != coal->stats_block_coalesce_usecs) { 138 u32 stats_ticks = coal->stats_block_coalesce_usecs; 139 140 /* Allow 0, which means disable. */ 141 if (stats_ticks) 142 stats_ticks = clamp_t(u32, stats_ticks, 143 BNXT_MIN_STATS_COAL_TICKS, 144 BNXT_MAX_STATS_COAL_TICKS); 145 stats_ticks = rounddown(stats_ticks, BNXT_MIN_STATS_COAL_TICKS); 146 bp->stats_coal_ticks = stats_ticks; 147 if (bp->stats_coal_ticks) 148 bp->current_interval = 149 bp->stats_coal_ticks * HZ / 1000000; 150 else 151 bp->current_interval = BNXT_TIMER_INTERVAL; 152 update_stats = true; 153 } 154 155 reset_coalesce: 156 if (netif_running(dev)) { 157 if (update_stats) { 158 rc = bnxt_close_nic(bp, true, false); 159 if (!rc) 160 rc = bnxt_open_nic(bp, true, false); 161 } else { 162 rc = bnxt_hwrm_set_coal(bp); 163 } 164 } 165 166 return rc; 167 } 168 169 static const char * const bnxt_ring_rx_stats_str[] = { 170 "rx_ucast_packets", 171 "rx_mcast_packets", 172 "rx_bcast_packets", 173 "rx_discards", 174 "rx_errors", 175 "rx_ucast_bytes", 176 "rx_mcast_bytes", 177 "rx_bcast_bytes", 178 }; 179 180 static const char * const bnxt_ring_tx_stats_str[] = { 181 "tx_ucast_packets", 182 "tx_mcast_packets", 183 "tx_bcast_packets", 184 "tx_errors", 185 "tx_discards", 186 "tx_ucast_bytes", 187 "tx_mcast_bytes", 188 "tx_bcast_bytes", 189 }; 190 191 static const char * const bnxt_ring_tpa_stats_str[] = { 192 "tpa_packets", 193 "tpa_bytes", 194 "tpa_events", 195 "tpa_aborts", 196 }; 197 198 static const char * const bnxt_ring_tpa2_stats_str[] = { 199 "rx_tpa_eligible_pkt", 200 "rx_tpa_eligible_bytes", 201 "rx_tpa_pkt", 202 "rx_tpa_bytes", 203 "rx_tpa_errors", 204 "rx_tpa_events", 205 }; 206 207 static const char * const bnxt_rx_sw_stats_str[] = { 208 "rx_l4_csum_errors", 209 "rx_resets", 210 "rx_buf_errors", 211 }; 212 213 static const char * const bnxt_cmn_sw_stats_str[] = { 214 "missed_irqs", 215 }; 216 217 #define BNXT_RX_STATS_ENTRY(counter) \ 218 { BNXT_RX_STATS_OFFSET(counter), __stringify(counter) } 219 220 #define BNXT_TX_STATS_ENTRY(counter) \ 221 { BNXT_TX_STATS_OFFSET(counter), __stringify(counter) } 222 223 #define BNXT_RX_STATS_EXT_ENTRY(counter) \ 224 { BNXT_RX_STATS_EXT_OFFSET(counter), __stringify(counter) } 225 226 #define BNXT_TX_STATS_EXT_ENTRY(counter) \ 227 { BNXT_TX_STATS_EXT_OFFSET(counter), __stringify(counter) } 228 229 #define BNXT_RX_STATS_EXT_PFC_ENTRY(n) \ 230 BNXT_RX_STATS_EXT_ENTRY(pfc_pri##n##_rx_duration_us), \ 231 BNXT_RX_STATS_EXT_ENTRY(pfc_pri##n##_rx_transitions) 232 233 #define BNXT_TX_STATS_EXT_PFC_ENTRY(n) \ 234 BNXT_TX_STATS_EXT_ENTRY(pfc_pri##n##_tx_duration_us), \ 235 BNXT_TX_STATS_EXT_ENTRY(pfc_pri##n##_tx_transitions) 236 237 #define BNXT_RX_STATS_EXT_PFC_ENTRIES \ 238 BNXT_RX_STATS_EXT_PFC_ENTRY(0), \ 239 BNXT_RX_STATS_EXT_PFC_ENTRY(1), \ 240 BNXT_RX_STATS_EXT_PFC_ENTRY(2), \ 241 BNXT_RX_STATS_EXT_PFC_ENTRY(3), \ 242 BNXT_RX_STATS_EXT_PFC_ENTRY(4), \ 243 BNXT_RX_STATS_EXT_PFC_ENTRY(5), \ 244 BNXT_RX_STATS_EXT_PFC_ENTRY(6), \ 245 BNXT_RX_STATS_EXT_PFC_ENTRY(7) 246 247 #define BNXT_TX_STATS_EXT_PFC_ENTRIES \ 248 BNXT_TX_STATS_EXT_PFC_ENTRY(0), \ 249 BNXT_TX_STATS_EXT_PFC_ENTRY(1), \ 250 BNXT_TX_STATS_EXT_PFC_ENTRY(2), \ 251 BNXT_TX_STATS_EXT_PFC_ENTRY(3), \ 252 BNXT_TX_STATS_EXT_PFC_ENTRY(4), \ 253 BNXT_TX_STATS_EXT_PFC_ENTRY(5), \ 254 BNXT_TX_STATS_EXT_PFC_ENTRY(6), \ 255 BNXT_TX_STATS_EXT_PFC_ENTRY(7) 256 257 #define BNXT_RX_STATS_EXT_COS_ENTRY(n) \ 258 BNXT_RX_STATS_EXT_ENTRY(rx_bytes_cos##n), \ 259 BNXT_RX_STATS_EXT_ENTRY(rx_packets_cos##n) 260 261 #define BNXT_TX_STATS_EXT_COS_ENTRY(n) \ 262 BNXT_TX_STATS_EXT_ENTRY(tx_bytes_cos##n), \ 263 BNXT_TX_STATS_EXT_ENTRY(tx_packets_cos##n) 264 265 #define BNXT_RX_STATS_EXT_COS_ENTRIES \ 266 BNXT_RX_STATS_EXT_COS_ENTRY(0), \ 267 BNXT_RX_STATS_EXT_COS_ENTRY(1), \ 268 BNXT_RX_STATS_EXT_COS_ENTRY(2), \ 269 BNXT_RX_STATS_EXT_COS_ENTRY(3), \ 270 BNXT_RX_STATS_EXT_COS_ENTRY(4), \ 271 BNXT_RX_STATS_EXT_COS_ENTRY(5), \ 272 BNXT_RX_STATS_EXT_COS_ENTRY(6), \ 273 BNXT_RX_STATS_EXT_COS_ENTRY(7) \ 274 275 #define BNXT_TX_STATS_EXT_COS_ENTRIES \ 276 BNXT_TX_STATS_EXT_COS_ENTRY(0), \ 277 BNXT_TX_STATS_EXT_COS_ENTRY(1), \ 278 BNXT_TX_STATS_EXT_COS_ENTRY(2), \ 279 BNXT_TX_STATS_EXT_COS_ENTRY(3), \ 280 BNXT_TX_STATS_EXT_COS_ENTRY(4), \ 281 BNXT_TX_STATS_EXT_COS_ENTRY(5), \ 282 BNXT_TX_STATS_EXT_COS_ENTRY(6), \ 283 BNXT_TX_STATS_EXT_COS_ENTRY(7) \ 284 285 #define BNXT_RX_STATS_EXT_DISCARD_COS_ENTRY(n) \ 286 BNXT_RX_STATS_EXT_ENTRY(rx_discard_bytes_cos##n), \ 287 BNXT_RX_STATS_EXT_ENTRY(rx_discard_packets_cos##n) 288 289 #define BNXT_RX_STATS_EXT_DISCARD_COS_ENTRIES \ 290 BNXT_RX_STATS_EXT_DISCARD_COS_ENTRY(0), \ 291 BNXT_RX_STATS_EXT_DISCARD_COS_ENTRY(1), \ 292 BNXT_RX_STATS_EXT_DISCARD_COS_ENTRY(2), \ 293 BNXT_RX_STATS_EXT_DISCARD_COS_ENTRY(3), \ 294 BNXT_RX_STATS_EXT_DISCARD_COS_ENTRY(4), \ 295 BNXT_RX_STATS_EXT_DISCARD_COS_ENTRY(5), \ 296 BNXT_RX_STATS_EXT_DISCARD_COS_ENTRY(6), \ 297 BNXT_RX_STATS_EXT_DISCARD_COS_ENTRY(7) 298 299 #define BNXT_RX_STATS_PRI_ENTRY(counter, n) \ 300 { BNXT_RX_STATS_EXT_OFFSET(counter##_cos0), \ 301 __stringify(counter##_pri##n) } 302 303 #define BNXT_TX_STATS_PRI_ENTRY(counter, n) \ 304 { BNXT_TX_STATS_EXT_OFFSET(counter##_cos0), \ 305 __stringify(counter##_pri##n) } 306 307 #define BNXT_RX_STATS_PRI_ENTRIES(counter) \ 308 BNXT_RX_STATS_PRI_ENTRY(counter, 0), \ 309 BNXT_RX_STATS_PRI_ENTRY(counter, 1), \ 310 BNXT_RX_STATS_PRI_ENTRY(counter, 2), \ 311 BNXT_RX_STATS_PRI_ENTRY(counter, 3), \ 312 BNXT_RX_STATS_PRI_ENTRY(counter, 4), \ 313 BNXT_RX_STATS_PRI_ENTRY(counter, 5), \ 314 BNXT_RX_STATS_PRI_ENTRY(counter, 6), \ 315 BNXT_RX_STATS_PRI_ENTRY(counter, 7) 316 317 #define BNXT_TX_STATS_PRI_ENTRIES(counter) \ 318 BNXT_TX_STATS_PRI_ENTRY(counter, 0), \ 319 BNXT_TX_STATS_PRI_ENTRY(counter, 1), \ 320 BNXT_TX_STATS_PRI_ENTRY(counter, 2), \ 321 BNXT_TX_STATS_PRI_ENTRY(counter, 3), \ 322 BNXT_TX_STATS_PRI_ENTRY(counter, 4), \ 323 BNXT_TX_STATS_PRI_ENTRY(counter, 5), \ 324 BNXT_TX_STATS_PRI_ENTRY(counter, 6), \ 325 BNXT_TX_STATS_PRI_ENTRY(counter, 7) 326 327 enum { 328 RX_TOTAL_DISCARDS, 329 TX_TOTAL_DISCARDS, 330 RX_NETPOLL_DISCARDS, 331 }; 332 333 static struct { 334 u64 counter; 335 char string[ETH_GSTRING_LEN]; 336 } bnxt_sw_func_stats[] = { 337 {0, "rx_total_discard_pkts"}, 338 {0, "tx_total_discard_pkts"}, 339 {0, "rx_total_netpoll_discards"}, 340 }; 341 342 #define NUM_RING_RX_SW_STATS ARRAY_SIZE(bnxt_rx_sw_stats_str) 343 #define NUM_RING_CMN_SW_STATS ARRAY_SIZE(bnxt_cmn_sw_stats_str) 344 #define NUM_RING_RX_HW_STATS ARRAY_SIZE(bnxt_ring_rx_stats_str) 345 #define NUM_RING_TX_HW_STATS ARRAY_SIZE(bnxt_ring_tx_stats_str) 346 347 static const struct { 348 long offset; 349 char string[ETH_GSTRING_LEN]; 350 } bnxt_port_stats_arr[] = { 351 BNXT_RX_STATS_ENTRY(rx_64b_frames), 352 BNXT_RX_STATS_ENTRY(rx_65b_127b_frames), 353 BNXT_RX_STATS_ENTRY(rx_128b_255b_frames), 354 BNXT_RX_STATS_ENTRY(rx_256b_511b_frames), 355 BNXT_RX_STATS_ENTRY(rx_512b_1023b_frames), 356 BNXT_RX_STATS_ENTRY(rx_1024b_1518b_frames), 357 BNXT_RX_STATS_ENTRY(rx_good_vlan_frames), 358 BNXT_RX_STATS_ENTRY(rx_1519b_2047b_frames), 359 BNXT_RX_STATS_ENTRY(rx_2048b_4095b_frames), 360 BNXT_RX_STATS_ENTRY(rx_4096b_9216b_frames), 361 BNXT_RX_STATS_ENTRY(rx_9217b_16383b_frames), 362 BNXT_RX_STATS_ENTRY(rx_total_frames), 363 BNXT_RX_STATS_ENTRY(rx_ucast_frames), 364 BNXT_RX_STATS_ENTRY(rx_mcast_frames), 365 BNXT_RX_STATS_ENTRY(rx_bcast_frames), 366 BNXT_RX_STATS_ENTRY(rx_fcs_err_frames), 367 BNXT_RX_STATS_ENTRY(rx_ctrl_frames), 368 BNXT_RX_STATS_ENTRY(rx_pause_frames), 369 BNXT_RX_STATS_ENTRY(rx_pfc_frames), 370 BNXT_RX_STATS_ENTRY(rx_align_err_frames), 371 BNXT_RX_STATS_ENTRY(rx_ovrsz_frames), 372 BNXT_RX_STATS_ENTRY(rx_jbr_frames), 373 BNXT_RX_STATS_ENTRY(rx_mtu_err_frames), 374 BNXT_RX_STATS_ENTRY(rx_tagged_frames), 375 BNXT_RX_STATS_ENTRY(rx_double_tagged_frames), 376 BNXT_RX_STATS_ENTRY(rx_good_frames), 377 BNXT_RX_STATS_ENTRY(rx_pfc_ena_frames_pri0), 378 BNXT_RX_STATS_ENTRY(rx_pfc_ena_frames_pri1), 379 BNXT_RX_STATS_ENTRY(rx_pfc_ena_frames_pri2), 380 BNXT_RX_STATS_ENTRY(rx_pfc_ena_frames_pri3), 381 BNXT_RX_STATS_ENTRY(rx_pfc_ena_frames_pri4), 382 BNXT_RX_STATS_ENTRY(rx_pfc_ena_frames_pri5), 383 BNXT_RX_STATS_ENTRY(rx_pfc_ena_frames_pri6), 384 BNXT_RX_STATS_ENTRY(rx_pfc_ena_frames_pri7), 385 BNXT_RX_STATS_ENTRY(rx_undrsz_frames), 386 BNXT_RX_STATS_ENTRY(rx_eee_lpi_events), 387 BNXT_RX_STATS_ENTRY(rx_eee_lpi_duration), 388 BNXT_RX_STATS_ENTRY(rx_bytes), 389 BNXT_RX_STATS_ENTRY(rx_runt_bytes), 390 BNXT_RX_STATS_ENTRY(rx_runt_frames), 391 BNXT_RX_STATS_ENTRY(rx_stat_discard), 392 BNXT_RX_STATS_ENTRY(rx_stat_err), 393 394 BNXT_TX_STATS_ENTRY(tx_64b_frames), 395 BNXT_TX_STATS_ENTRY(tx_65b_127b_frames), 396 BNXT_TX_STATS_ENTRY(tx_128b_255b_frames), 397 BNXT_TX_STATS_ENTRY(tx_256b_511b_frames), 398 BNXT_TX_STATS_ENTRY(tx_512b_1023b_frames), 399 BNXT_TX_STATS_ENTRY(tx_1024b_1518b_frames), 400 BNXT_TX_STATS_ENTRY(tx_good_vlan_frames), 401 BNXT_TX_STATS_ENTRY(tx_1519b_2047b_frames), 402 BNXT_TX_STATS_ENTRY(tx_2048b_4095b_frames), 403 BNXT_TX_STATS_ENTRY(tx_4096b_9216b_frames), 404 BNXT_TX_STATS_ENTRY(tx_9217b_16383b_frames), 405 BNXT_TX_STATS_ENTRY(tx_good_frames), 406 BNXT_TX_STATS_ENTRY(tx_total_frames), 407 BNXT_TX_STATS_ENTRY(tx_ucast_frames), 408 BNXT_TX_STATS_ENTRY(tx_mcast_frames), 409 BNXT_TX_STATS_ENTRY(tx_bcast_frames), 410 BNXT_TX_STATS_ENTRY(tx_pause_frames), 411 BNXT_TX_STATS_ENTRY(tx_pfc_frames), 412 BNXT_TX_STATS_ENTRY(tx_jabber_frames), 413 BNXT_TX_STATS_ENTRY(tx_fcs_err_frames), 414 BNXT_TX_STATS_ENTRY(tx_err), 415 BNXT_TX_STATS_ENTRY(tx_fifo_underruns), 416 BNXT_TX_STATS_ENTRY(tx_pfc_ena_frames_pri0), 417 BNXT_TX_STATS_ENTRY(tx_pfc_ena_frames_pri1), 418 BNXT_TX_STATS_ENTRY(tx_pfc_ena_frames_pri2), 419 BNXT_TX_STATS_ENTRY(tx_pfc_ena_frames_pri3), 420 BNXT_TX_STATS_ENTRY(tx_pfc_ena_frames_pri4), 421 BNXT_TX_STATS_ENTRY(tx_pfc_ena_frames_pri5), 422 BNXT_TX_STATS_ENTRY(tx_pfc_ena_frames_pri6), 423 BNXT_TX_STATS_ENTRY(tx_pfc_ena_frames_pri7), 424 BNXT_TX_STATS_ENTRY(tx_eee_lpi_events), 425 BNXT_TX_STATS_ENTRY(tx_eee_lpi_duration), 426 BNXT_TX_STATS_ENTRY(tx_total_collisions), 427 BNXT_TX_STATS_ENTRY(tx_bytes), 428 BNXT_TX_STATS_ENTRY(tx_xthol_frames), 429 BNXT_TX_STATS_ENTRY(tx_stat_discard), 430 BNXT_TX_STATS_ENTRY(tx_stat_error), 431 }; 432 433 static const struct { 434 long offset; 435 char string[ETH_GSTRING_LEN]; 436 } bnxt_port_stats_ext_arr[] = { 437 BNXT_RX_STATS_EXT_ENTRY(link_down_events), 438 BNXT_RX_STATS_EXT_ENTRY(continuous_pause_events), 439 BNXT_RX_STATS_EXT_ENTRY(resume_pause_events), 440 BNXT_RX_STATS_EXT_ENTRY(continuous_roce_pause_events), 441 BNXT_RX_STATS_EXT_ENTRY(resume_roce_pause_events), 442 BNXT_RX_STATS_EXT_COS_ENTRIES, 443 BNXT_RX_STATS_EXT_PFC_ENTRIES, 444 BNXT_RX_STATS_EXT_ENTRY(rx_bits), 445 BNXT_RX_STATS_EXT_ENTRY(rx_buffer_passed_threshold), 446 BNXT_RX_STATS_EXT_ENTRY(rx_pcs_symbol_err), 447 BNXT_RX_STATS_EXT_ENTRY(rx_corrected_bits), 448 BNXT_RX_STATS_EXT_DISCARD_COS_ENTRIES, 449 BNXT_RX_STATS_EXT_ENTRY(rx_fec_corrected_blocks), 450 BNXT_RX_STATS_EXT_ENTRY(rx_fec_uncorrectable_blocks), 451 }; 452 453 static const struct { 454 long offset; 455 char string[ETH_GSTRING_LEN]; 456 } bnxt_tx_port_stats_ext_arr[] = { 457 BNXT_TX_STATS_EXT_COS_ENTRIES, 458 BNXT_TX_STATS_EXT_PFC_ENTRIES, 459 }; 460 461 static const struct { 462 long base_off; 463 char string[ETH_GSTRING_LEN]; 464 } bnxt_rx_bytes_pri_arr[] = { 465 BNXT_RX_STATS_PRI_ENTRIES(rx_bytes), 466 }; 467 468 static const struct { 469 long base_off; 470 char string[ETH_GSTRING_LEN]; 471 } bnxt_rx_pkts_pri_arr[] = { 472 BNXT_RX_STATS_PRI_ENTRIES(rx_packets), 473 }; 474 475 static const struct { 476 long base_off; 477 char string[ETH_GSTRING_LEN]; 478 } bnxt_tx_bytes_pri_arr[] = { 479 BNXT_TX_STATS_PRI_ENTRIES(tx_bytes), 480 }; 481 482 static const struct { 483 long base_off; 484 char string[ETH_GSTRING_LEN]; 485 } bnxt_tx_pkts_pri_arr[] = { 486 BNXT_TX_STATS_PRI_ENTRIES(tx_packets), 487 }; 488 489 #define BNXT_NUM_SW_FUNC_STATS ARRAY_SIZE(bnxt_sw_func_stats) 490 #define BNXT_NUM_PORT_STATS ARRAY_SIZE(bnxt_port_stats_arr) 491 #define BNXT_NUM_STATS_PRI \ 492 (ARRAY_SIZE(bnxt_rx_bytes_pri_arr) + \ 493 ARRAY_SIZE(bnxt_rx_pkts_pri_arr) + \ 494 ARRAY_SIZE(bnxt_tx_bytes_pri_arr) + \ 495 ARRAY_SIZE(bnxt_tx_pkts_pri_arr)) 496 497 static int bnxt_get_num_tpa_ring_stats(struct bnxt *bp) 498 { 499 if (BNXT_SUPPORTS_TPA(bp)) { 500 if (bp->max_tpa_v2) { 501 if (BNXT_CHIP_P5_THOR(bp)) 502 return BNXT_NUM_TPA_RING_STATS_P5; 503 return BNXT_NUM_TPA_RING_STATS_P5_SR2; 504 } 505 return BNXT_NUM_TPA_RING_STATS; 506 } 507 return 0; 508 } 509 510 static int bnxt_get_num_ring_stats(struct bnxt *bp) 511 { 512 int rx, tx, cmn; 513 514 rx = NUM_RING_RX_HW_STATS + NUM_RING_RX_SW_STATS + 515 bnxt_get_num_tpa_ring_stats(bp); 516 tx = NUM_RING_TX_HW_STATS; 517 cmn = NUM_RING_CMN_SW_STATS; 518 return rx * bp->rx_nr_rings + tx * bp->tx_nr_rings + 519 cmn * bp->cp_nr_rings; 520 } 521 522 static int bnxt_get_num_stats(struct bnxt *bp) 523 { 524 int num_stats = bnxt_get_num_ring_stats(bp); 525 526 num_stats += BNXT_NUM_SW_FUNC_STATS; 527 528 if (bp->flags & BNXT_FLAG_PORT_STATS) 529 num_stats += BNXT_NUM_PORT_STATS; 530 531 if (bp->flags & BNXT_FLAG_PORT_STATS_EXT) { 532 num_stats += bp->fw_rx_stats_ext_size + 533 bp->fw_tx_stats_ext_size; 534 if (bp->pri2cos_valid) 535 num_stats += BNXT_NUM_STATS_PRI; 536 } 537 538 return num_stats; 539 } 540 541 static int bnxt_get_sset_count(struct net_device *dev, int sset) 542 { 543 struct bnxt *bp = netdev_priv(dev); 544 545 switch (sset) { 546 case ETH_SS_STATS: 547 return bnxt_get_num_stats(bp); 548 case ETH_SS_TEST: 549 if (!bp->num_tests) 550 return -EOPNOTSUPP; 551 return bp->num_tests; 552 default: 553 return -EOPNOTSUPP; 554 } 555 } 556 557 static bool is_rx_ring(struct bnxt *bp, int ring_num) 558 { 559 return ring_num < bp->rx_nr_rings; 560 } 561 562 static bool is_tx_ring(struct bnxt *bp, int ring_num) 563 { 564 int tx_base = 0; 565 566 if (!(bp->flags & BNXT_FLAG_SHARED_RINGS)) 567 tx_base = bp->rx_nr_rings; 568 569 if (ring_num >= tx_base && ring_num < (tx_base + bp->tx_nr_rings)) 570 return true; 571 return false; 572 } 573 574 static void bnxt_get_ethtool_stats(struct net_device *dev, 575 struct ethtool_stats *stats, u64 *buf) 576 { 577 u32 i, j = 0; 578 struct bnxt *bp = netdev_priv(dev); 579 u32 tpa_stats; 580 581 if (!bp->bnapi) { 582 j += bnxt_get_num_ring_stats(bp) + BNXT_NUM_SW_FUNC_STATS; 583 goto skip_ring_stats; 584 } 585 586 for (i = 0; i < BNXT_NUM_SW_FUNC_STATS; i++) 587 bnxt_sw_func_stats[i].counter = 0; 588 589 tpa_stats = bnxt_get_num_tpa_ring_stats(bp); 590 for (i = 0; i < bp->cp_nr_rings; i++) { 591 struct bnxt_napi *bnapi = bp->bnapi[i]; 592 struct bnxt_cp_ring_info *cpr = &bnapi->cp_ring; 593 u64 *sw_stats = cpr->stats.sw_stats; 594 u64 *sw; 595 int k; 596 597 if (is_rx_ring(bp, i)) { 598 for (k = 0; k < NUM_RING_RX_HW_STATS; j++, k++) 599 buf[j] = sw_stats[k]; 600 } 601 if (is_tx_ring(bp, i)) { 602 k = NUM_RING_RX_HW_STATS; 603 for (; k < NUM_RING_RX_HW_STATS + NUM_RING_TX_HW_STATS; 604 j++, k++) 605 buf[j] = sw_stats[k]; 606 } 607 if (!tpa_stats || !is_rx_ring(bp, i)) 608 goto skip_tpa_ring_stats; 609 610 k = NUM_RING_RX_HW_STATS + NUM_RING_TX_HW_STATS; 611 for (; k < NUM_RING_RX_HW_STATS + NUM_RING_TX_HW_STATS + 612 tpa_stats; j++, k++) 613 buf[j] = sw_stats[k]; 614 615 skip_tpa_ring_stats: 616 sw = (u64 *)&cpr->sw_stats.rx; 617 if (is_rx_ring(bp, i)) { 618 for (k = 0; k < NUM_RING_RX_SW_STATS; j++, k++) 619 buf[j] = sw[k]; 620 } 621 622 sw = (u64 *)&cpr->sw_stats.cmn; 623 for (k = 0; k < NUM_RING_CMN_SW_STATS; j++, k++) 624 buf[j] = sw[k]; 625 626 bnxt_sw_func_stats[RX_TOTAL_DISCARDS].counter += 627 BNXT_GET_RING_STATS64(sw_stats, rx_discard_pkts); 628 bnxt_sw_func_stats[TX_TOTAL_DISCARDS].counter += 629 BNXT_GET_RING_STATS64(sw_stats, tx_discard_pkts); 630 bnxt_sw_func_stats[RX_NETPOLL_DISCARDS].counter += 631 cpr->sw_stats.rx.rx_netpoll_discards; 632 } 633 634 for (i = 0; i < BNXT_NUM_SW_FUNC_STATS; i++, j++) 635 buf[j] = bnxt_sw_func_stats[i].counter; 636 637 skip_ring_stats: 638 if (bp->flags & BNXT_FLAG_PORT_STATS) { 639 u64 *port_stats = bp->port_stats.sw_stats; 640 641 for (i = 0; i < BNXT_NUM_PORT_STATS; i++, j++) 642 buf[j] = *(port_stats + bnxt_port_stats_arr[i].offset); 643 } 644 if (bp->flags & BNXT_FLAG_PORT_STATS_EXT) { 645 u64 *rx_port_stats_ext = bp->rx_port_stats_ext.sw_stats; 646 u64 *tx_port_stats_ext = bp->tx_port_stats_ext.sw_stats; 647 648 for (i = 0; i < bp->fw_rx_stats_ext_size; i++, j++) { 649 buf[j] = *(rx_port_stats_ext + 650 bnxt_port_stats_ext_arr[i].offset); 651 } 652 for (i = 0; i < bp->fw_tx_stats_ext_size; i++, j++) { 653 buf[j] = *(tx_port_stats_ext + 654 bnxt_tx_port_stats_ext_arr[i].offset); 655 } 656 if (bp->pri2cos_valid) { 657 for (i = 0; i < 8; i++, j++) { 658 long n = bnxt_rx_bytes_pri_arr[i].base_off + 659 bp->pri2cos_idx[i]; 660 661 buf[j] = *(rx_port_stats_ext + n); 662 } 663 for (i = 0; i < 8; i++, j++) { 664 long n = bnxt_rx_pkts_pri_arr[i].base_off + 665 bp->pri2cos_idx[i]; 666 667 buf[j] = *(rx_port_stats_ext + n); 668 } 669 for (i = 0; i < 8; i++, j++) { 670 long n = bnxt_tx_bytes_pri_arr[i].base_off + 671 bp->pri2cos_idx[i]; 672 673 buf[j] = *(tx_port_stats_ext + n); 674 } 675 for (i = 0; i < 8; i++, j++) { 676 long n = bnxt_tx_pkts_pri_arr[i].base_off + 677 bp->pri2cos_idx[i]; 678 679 buf[j] = *(tx_port_stats_ext + n); 680 } 681 } 682 } 683 } 684 685 static void bnxt_get_strings(struct net_device *dev, u32 stringset, u8 *buf) 686 { 687 struct bnxt *bp = netdev_priv(dev); 688 static const char * const *str; 689 u32 i, j, num_str; 690 691 switch (stringset) { 692 case ETH_SS_STATS: 693 for (i = 0; i < bp->cp_nr_rings; i++) { 694 if (is_rx_ring(bp, i)) { 695 num_str = NUM_RING_RX_HW_STATS; 696 for (j = 0; j < num_str; j++) { 697 sprintf(buf, "[%d]: %s", i, 698 bnxt_ring_rx_stats_str[j]); 699 buf += ETH_GSTRING_LEN; 700 } 701 } 702 if (is_tx_ring(bp, i)) { 703 num_str = NUM_RING_TX_HW_STATS; 704 for (j = 0; j < num_str; j++) { 705 sprintf(buf, "[%d]: %s", i, 706 bnxt_ring_tx_stats_str[j]); 707 buf += ETH_GSTRING_LEN; 708 } 709 } 710 num_str = bnxt_get_num_tpa_ring_stats(bp); 711 if (!num_str || !is_rx_ring(bp, i)) 712 goto skip_tpa_stats; 713 714 if (bp->max_tpa_v2) 715 str = bnxt_ring_tpa2_stats_str; 716 else 717 str = bnxt_ring_tpa_stats_str; 718 719 for (j = 0; j < num_str; j++) { 720 sprintf(buf, "[%d]: %s", i, str[j]); 721 buf += ETH_GSTRING_LEN; 722 } 723 skip_tpa_stats: 724 if (is_rx_ring(bp, i)) { 725 num_str = NUM_RING_RX_SW_STATS; 726 for (j = 0; j < num_str; j++) { 727 sprintf(buf, "[%d]: %s", i, 728 bnxt_rx_sw_stats_str[j]); 729 buf += ETH_GSTRING_LEN; 730 } 731 } 732 num_str = NUM_RING_CMN_SW_STATS; 733 for (j = 0; j < num_str; j++) { 734 sprintf(buf, "[%d]: %s", i, 735 bnxt_cmn_sw_stats_str[j]); 736 buf += ETH_GSTRING_LEN; 737 } 738 } 739 for (i = 0; i < BNXT_NUM_SW_FUNC_STATS; i++) { 740 strcpy(buf, bnxt_sw_func_stats[i].string); 741 buf += ETH_GSTRING_LEN; 742 } 743 744 if (bp->flags & BNXT_FLAG_PORT_STATS) { 745 for (i = 0; i < BNXT_NUM_PORT_STATS; i++) { 746 strcpy(buf, bnxt_port_stats_arr[i].string); 747 buf += ETH_GSTRING_LEN; 748 } 749 } 750 if (bp->flags & BNXT_FLAG_PORT_STATS_EXT) { 751 for (i = 0; i < bp->fw_rx_stats_ext_size; i++) { 752 strcpy(buf, bnxt_port_stats_ext_arr[i].string); 753 buf += ETH_GSTRING_LEN; 754 } 755 for (i = 0; i < bp->fw_tx_stats_ext_size; i++) { 756 strcpy(buf, 757 bnxt_tx_port_stats_ext_arr[i].string); 758 buf += ETH_GSTRING_LEN; 759 } 760 if (bp->pri2cos_valid) { 761 for (i = 0; i < 8; i++) { 762 strcpy(buf, 763 bnxt_rx_bytes_pri_arr[i].string); 764 buf += ETH_GSTRING_LEN; 765 } 766 for (i = 0; i < 8; i++) { 767 strcpy(buf, 768 bnxt_rx_pkts_pri_arr[i].string); 769 buf += ETH_GSTRING_LEN; 770 } 771 for (i = 0; i < 8; i++) { 772 strcpy(buf, 773 bnxt_tx_bytes_pri_arr[i].string); 774 buf += ETH_GSTRING_LEN; 775 } 776 for (i = 0; i < 8; i++) { 777 strcpy(buf, 778 bnxt_tx_pkts_pri_arr[i].string); 779 buf += ETH_GSTRING_LEN; 780 } 781 } 782 } 783 break; 784 case ETH_SS_TEST: 785 if (bp->num_tests) 786 memcpy(buf, bp->test_info->string, 787 bp->num_tests * ETH_GSTRING_LEN); 788 break; 789 default: 790 netdev_err(bp->dev, "bnxt_get_strings invalid request %x\n", 791 stringset); 792 break; 793 } 794 } 795 796 static void bnxt_get_ringparam(struct net_device *dev, 797 struct ethtool_ringparam *ering, 798 struct kernel_ethtool_ringparam *kernel_ering, 799 struct netlink_ext_ack *extack) 800 { 801 struct bnxt *bp = netdev_priv(dev); 802 803 if (bp->flags & BNXT_FLAG_AGG_RINGS) { 804 ering->rx_max_pending = BNXT_MAX_RX_DESC_CNT_JUM_ENA; 805 ering->rx_jumbo_max_pending = BNXT_MAX_RX_JUM_DESC_CNT; 806 kernel_ering->tcp_data_split = ETHTOOL_TCP_DATA_SPLIT_ENABLED; 807 } else { 808 ering->rx_max_pending = BNXT_MAX_RX_DESC_CNT; 809 ering->rx_jumbo_max_pending = 0; 810 kernel_ering->tcp_data_split = ETHTOOL_TCP_DATA_SPLIT_DISABLED; 811 } 812 ering->tx_max_pending = BNXT_MAX_TX_DESC_CNT; 813 814 ering->rx_pending = bp->rx_ring_size; 815 ering->rx_jumbo_pending = bp->rx_agg_ring_size; 816 ering->tx_pending = bp->tx_ring_size; 817 } 818 819 static int bnxt_set_ringparam(struct net_device *dev, 820 struct ethtool_ringparam *ering, 821 struct kernel_ethtool_ringparam *kernel_ering, 822 struct netlink_ext_ack *extack) 823 { 824 struct bnxt *bp = netdev_priv(dev); 825 826 if ((ering->rx_pending > BNXT_MAX_RX_DESC_CNT) || 827 (ering->tx_pending > BNXT_MAX_TX_DESC_CNT) || 828 (ering->tx_pending < BNXT_MIN_TX_DESC_CNT)) 829 return -EINVAL; 830 831 if (netif_running(dev)) 832 bnxt_close_nic(bp, false, false); 833 834 bp->rx_ring_size = ering->rx_pending; 835 bp->tx_ring_size = ering->tx_pending; 836 bnxt_set_ring_params(bp); 837 838 if (netif_running(dev)) 839 return bnxt_open_nic(bp, false, false); 840 841 return 0; 842 } 843 844 static void bnxt_get_channels(struct net_device *dev, 845 struct ethtool_channels *channel) 846 { 847 struct bnxt *bp = netdev_priv(dev); 848 struct bnxt_hw_resc *hw_resc = &bp->hw_resc; 849 int max_rx_rings, max_tx_rings, tcs; 850 int max_tx_sch_inputs, tx_grps; 851 852 /* Get the most up-to-date max_tx_sch_inputs. */ 853 if (netif_running(dev) && BNXT_NEW_RM(bp)) 854 bnxt_hwrm_func_resc_qcaps(bp, false); 855 max_tx_sch_inputs = hw_resc->max_tx_sch_inputs; 856 857 bnxt_get_max_rings(bp, &max_rx_rings, &max_tx_rings, true); 858 if (max_tx_sch_inputs) 859 max_tx_rings = min_t(int, max_tx_rings, max_tx_sch_inputs); 860 861 tcs = netdev_get_num_tc(dev); 862 tx_grps = max(tcs, 1); 863 if (bp->tx_nr_rings_xdp) 864 tx_grps++; 865 max_tx_rings /= tx_grps; 866 channel->max_combined = min_t(int, max_rx_rings, max_tx_rings); 867 868 if (bnxt_get_max_rings(bp, &max_rx_rings, &max_tx_rings, false)) { 869 max_rx_rings = 0; 870 max_tx_rings = 0; 871 } 872 if (max_tx_sch_inputs) 873 max_tx_rings = min_t(int, max_tx_rings, max_tx_sch_inputs); 874 875 if (tcs > 1) 876 max_tx_rings /= tcs; 877 878 channel->max_rx = max_rx_rings; 879 channel->max_tx = max_tx_rings; 880 channel->max_other = 0; 881 if (bp->flags & BNXT_FLAG_SHARED_RINGS) { 882 channel->combined_count = bp->rx_nr_rings; 883 if (BNXT_CHIP_TYPE_NITRO_A0(bp)) 884 channel->combined_count--; 885 } else { 886 if (!BNXT_CHIP_TYPE_NITRO_A0(bp)) { 887 channel->rx_count = bp->rx_nr_rings; 888 channel->tx_count = bp->tx_nr_rings_per_tc; 889 } 890 } 891 } 892 893 static int bnxt_set_channels(struct net_device *dev, 894 struct ethtool_channels *channel) 895 { 896 struct bnxt *bp = netdev_priv(dev); 897 int req_tx_rings, req_rx_rings, tcs; 898 bool sh = false; 899 int tx_xdp = 0; 900 int rc = 0; 901 902 if (channel->other_count) 903 return -EINVAL; 904 905 if (!channel->combined_count && 906 (!channel->rx_count || !channel->tx_count)) 907 return -EINVAL; 908 909 if (channel->combined_count && 910 (channel->rx_count || channel->tx_count)) 911 return -EINVAL; 912 913 if (BNXT_CHIP_TYPE_NITRO_A0(bp) && (channel->rx_count || 914 channel->tx_count)) 915 return -EINVAL; 916 917 if (channel->combined_count) 918 sh = true; 919 920 tcs = netdev_get_num_tc(dev); 921 922 req_tx_rings = sh ? channel->combined_count : channel->tx_count; 923 req_rx_rings = sh ? channel->combined_count : channel->rx_count; 924 if (bp->tx_nr_rings_xdp) { 925 if (!sh) { 926 netdev_err(dev, "Only combined mode supported when XDP is enabled.\n"); 927 return -EINVAL; 928 } 929 tx_xdp = req_rx_rings; 930 } 931 rc = bnxt_check_rings(bp, req_tx_rings, req_rx_rings, sh, tcs, tx_xdp); 932 if (rc) { 933 netdev_warn(dev, "Unable to allocate the requested rings\n"); 934 return rc; 935 } 936 937 if (bnxt_get_nr_rss_ctxs(bp, req_rx_rings) != 938 bnxt_get_nr_rss_ctxs(bp, bp->rx_nr_rings) && 939 netif_is_rxfh_configured(dev)) { 940 netdev_warn(dev, "RSS table size change required, RSS table entries must be default to proceed\n"); 941 return -EINVAL; 942 } 943 944 if (netif_running(dev)) { 945 if (BNXT_PF(bp)) { 946 /* TODO CHIMP_FW: Send message to all VF's 947 * before PF unload 948 */ 949 } 950 rc = bnxt_close_nic(bp, true, false); 951 if (rc) { 952 netdev_err(bp->dev, "Set channel failure rc :%x\n", 953 rc); 954 return rc; 955 } 956 } 957 958 if (sh) { 959 bp->flags |= BNXT_FLAG_SHARED_RINGS; 960 bp->rx_nr_rings = channel->combined_count; 961 bp->tx_nr_rings_per_tc = channel->combined_count; 962 } else { 963 bp->flags &= ~BNXT_FLAG_SHARED_RINGS; 964 bp->rx_nr_rings = channel->rx_count; 965 bp->tx_nr_rings_per_tc = channel->tx_count; 966 } 967 bp->tx_nr_rings_xdp = tx_xdp; 968 bp->tx_nr_rings = bp->tx_nr_rings_per_tc + tx_xdp; 969 if (tcs > 1) 970 bp->tx_nr_rings = bp->tx_nr_rings_per_tc * tcs + tx_xdp; 971 972 bp->cp_nr_rings = sh ? max_t(int, bp->tx_nr_rings, bp->rx_nr_rings) : 973 bp->tx_nr_rings + bp->rx_nr_rings; 974 975 /* After changing number of rx channels, update NTUPLE feature. */ 976 netdev_update_features(dev); 977 if (netif_running(dev)) { 978 rc = bnxt_open_nic(bp, true, false); 979 if ((!rc) && BNXT_PF(bp)) { 980 /* TODO CHIMP_FW: Send message to all VF's 981 * to renable 982 */ 983 } 984 } else { 985 rc = bnxt_reserve_rings(bp, true); 986 } 987 988 return rc; 989 } 990 991 #ifdef CONFIG_RFS_ACCEL 992 static int bnxt_grxclsrlall(struct bnxt *bp, struct ethtool_rxnfc *cmd, 993 u32 *rule_locs) 994 { 995 int i, j = 0; 996 997 cmd->data = bp->ntp_fltr_count; 998 for (i = 0; i < BNXT_NTP_FLTR_HASH_SIZE; i++) { 999 struct hlist_head *head; 1000 struct bnxt_ntuple_filter *fltr; 1001 1002 head = &bp->ntp_fltr_hash_tbl[i]; 1003 rcu_read_lock(); 1004 hlist_for_each_entry_rcu(fltr, head, hash) { 1005 if (j == cmd->rule_cnt) 1006 break; 1007 rule_locs[j++] = fltr->sw_id; 1008 } 1009 rcu_read_unlock(); 1010 if (j == cmd->rule_cnt) 1011 break; 1012 } 1013 cmd->rule_cnt = j; 1014 return 0; 1015 } 1016 1017 static int bnxt_grxclsrule(struct bnxt *bp, struct ethtool_rxnfc *cmd) 1018 { 1019 struct ethtool_rx_flow_spec *fs = 1020 (struct ethtool_rx_flow_spec *)&cmd->fs; 1021 struct bnxt_ntuple_filter *fltr; 1022 struct flow_keys *fkeys; 1023 int i, rc = -EINVAL; 1024 1025 if (fs->location >= BNXT_NTP_FLTR_MAX_FLTR) 1026 return rc; 1027 1028 for (i = 0; i < BNXT_NTP_FLTR_HASH_SIZE; i++) { 1029 struct hlist_head *head; 1030 1031 head = &bp->ntp_fltr_hash_tbl[i]; 1032 rcu_read_lock(); 1033 hlist_for_each_entry_rcu(fltr, head, hash) { 1034 if (fltr->sw_id == fs->location) 1035 goto fltr_found; 1036 } 1037 rcu_read_unlock(); 1038 } 1039 return rc; 1040 1041 fltr_found: 1042 fkeys = &fltr->fkeys; 1043 if (fkeys->basic.n_proto == htons(ETH_P_IP)) { 1044 if (fkeys->basic.ip_proto == IPPROTO_TCP) 1045 fs->flow_type = TCP_V4_FLOW; 1046 else if (fkeys->basic.ip_proto == IPPROTO_UDP) 1047 fs->flow_type = UDP_V4_FLOW; 1048 else 1049 goto fltr_err; 1050 1051 fs->h_u.tcp_ip4_spec.ip4src = fkeys->addrs.v4addrs.src; 1052 fs->m_u.tcp_ip4_spec.ip4src = cpu_to_be32(~0); 1053 1054 fs->h_u.tcp_ip4_spec.ip4dst = fkeys->addrs.v4addrs.dst; 1055 fs->m_u.tcp_ip4_spec.ip4dst = cpu_to_be32(~0); 1056 1057 fs->h_u.tcp_ip4_spec.psrc = fkeys->ports.src; 1058 fs->m_u.tcp_ip4_spec.psrc = cpu_to_be16(~0); 1059 1060 fs->h_u.tcp_ip4_spec.pdst = fkeys->ports.dst; 1061 fs->m_u.tcp_ip4_spec.pdst = cpu_to_be16(~0); 1062 } else { 1063 int i; 1064 1065 if (fkeys->basic.ip_proto == IPPROTO_TCP) 1066 fs->flow_type = TCP_V6_FLOW; 1067 else if (fkeys->basic.ip_proto == IPPROTO_UDP) 1068 fs->flow_type = UDP_V6_FLOW; 1069 else 1070 goto fltr_err; 1071 1072 *(struct in6_addr *)&fs->h_u.tcp_ip6_spec.ip6src[0] = 1073 fkeys->addrs.v6addrs.src; 1074 *(struct in6_addr *)&fs->h_u.tcp_ip6_spec.ip6dst[0] = 1075 fkeys->addrs.v6addrs.dst; 1076 for (i = 0; i < 4; i++) { 1077 fs->m_u.tcp_ip6_spec.ip6src[i] = cpu_to_be32(~0); 1078 fs->m_u.tcp_ip6_spec.ip6dst[i] = cpu_to_be32(~0); 1079 } 1080 fs->h_u.tcp_ip6_spec.psrc = fkeys->ports.src; 1081 fs->m_u.tcp_ip6_spec.psrc = cpu_to_be16(~0); 1082 1083 fs->h_u.tcp_ip6_spec.pdst = fkeys->ports.dst; 1084 fs->m_u.tcp_ip6_spec.pdst = cpu_to_be16(~0); 1085 } 1086 1087 fs->ring_cookie = fltr->rxq; 1088 rc = 0; 1089 1090 fltr_err: 1091 rcu_read_unlock(); 1092 1093 return rc; 1094 } 1095 #endif 1096 1097 static u64 get_ethtool_ipv4_rss(struct bnxt *bp) 1098 { 1099 if (bp->rss_hash_cfg & VNIC_RSS_CFG_REQ_HASH_TYPE_IPV4) 1100 return RXH_IP_SRC | RXH_IP_DST; 1101 return 0; 1102 } 1103 1104 static u64 get_ethtool_ipv6_rss(struct bnxt *bp) 1105 { 1106 if (bp->rss_hash_cfg & VNIC_RSS_CFG_REQ_HASH_TYPE_IPV6) 1107 return RXH_IP_SRC | RXH_IP_DST; 1108 return 0; 1109 } 1110 1111 static int bnxt_grxfh(struct bnxt *bp, struct ethtool_rxnfc *cmd) 1112 { 1113 cmd->data = 0; 1114 switch (cmd->flow_type) { 1115 case TCP_V4_FLOW: 1116 if (bp->rss_hash_cfg & VNIC_RSS_CFG_REQ_HASH_TYPE_TCP_IPV4) 1117 cmd->data |= RXH_IP_SRC | RXH_IP_DST | 1118 RXH_L4_B_0_1 | RXH_L4_B_2_3; 1119 cmd->data |= get_ethtool_ipv4_rss(bp); 1120 break; 1121 case UDP_V4_FLOW: 1122 if (bp->rss_hash_cfg & VNIC_RSS_CFG_REQ_HASH_TYPE_UDP_IPV4) 1123 cmd->data |= RXH_IP_SRC | RXH_IP_DST | 1124 RXH_L4_B_0_1 | RXH_L4_B_2_3; 1125 fallthrough; 1126 case SCTP_V4_FLOW: 1127 case AH_ESP_V4_FLOW: 1128 case AH_V4_FLOW: 1129 case ESP_V4_FLOW: 1130 case IPV4_FLOW: 1131 cmd->data |= get_ethtool_ipv4_rss(bp); 1132 break; 1133 1134 case TCP_V6_FLOW: 1135 if (bp->rss_hash_cfg & VNIC_RSS_CFG_REQ_HASH_TYPE_TCP_IPV6) 1136 cmd->data |= RXH_IP_SRC | RXH_IP_DST | 1137 RXH_L4_B_0_1 | RXH_L4_B_2_3; 1138 cmd->data |= get_ethtool_ipv6_rss(bp); 1139 break; 1140 case UDP_V6_FLOW: 1141 if (bp->rss_hash_cfg & VNIC_RSS_CFG_REQ_HASH_TYPE_UDP_IPV6) 1142 cmd->data |= RXH_IP_SRC | RXH_IP_DST | 1143 RXH_L4_B_0_1 | RXH_L4_B_2_3; 1144 fallthrough; 1145 case SCTP_V6_FLOW: 1146 case AH_ESP_V6_FLOW: 1147 case AH_V6_FLOW: 1148 case ESP_V6_FLOW: 1149 case IPV6_FLOW: 1150 cmd->data |= get_ethtool_ipv6_rss(bp); 1151 break; 1152 } 1153 return 0; 1154 } 1155 1156 #define RXH_4TUPLE (RXH_IP_SRC | RXH_IP_DST | RXH_L4_B_0_1 | RXH_L4_B_2_3) 1157 #define RXH_2TUPLE (RXH_IP_SRC | RXH_IP_DST) 1158 1159 static int bnxt_srxfh(struct bnxt *bp, struct ethtool_rxnfc *cmd) 1160 { 1161 u32 rss_hash_cfg = bp->rss_hash_cfg; 1162 int tuple, rc = 0; 1163 1164 if (cmd->data == RXH_4TUPLE) 1165 tuple = 4; 1166 else if (cmd->data == RXH_2TUPLE) 1167 tuple = 2; 1168 else if (!cmd->data) 1169 tuple = 0; 1170 else 1171 return -EINVAL; 1172 1173 if (cmd->flow_type == TCP_V4_FLOW) { 1174 rss_hash_cfg &= ~VNIC_RSS_CFG_REQ_HASH_TYPE_TCP_IPV4; 1175 if (tuple == 4) 1176 rss_hash_cfg |= VNIC_RSS_CFG_REQ_HASH_TYPE_TCP_IPV4; 1177 } else if (cmd->flow_type == UDP_V4_FLOW) { 1178 if (tuple == 4 && !(bp->flags & BNXT_FLAG_UDP_RSS_CAP)) 1179 return -EINVAL; 1180 rss_hash_cfg &= ~VNIC_RSS_CFG_REQ_HASH_TYPE_UDP_IPV4; 1181 if (tuple == 4) 1182 rss_hash_cfg |= VNIC_RSS_CFG_REQ_HASH_TYPE_UDP_IPV4; 1183 } else if (cmd->flow_type == TCP_V6_FLOW) { 1184 rss_hash_cfg &= ~VNIC_RSS_CFG_REQ_HASH_TYPE_TCP_IPV6; 1185 if (tuple == 4) 1186 rss_hash_cfg |= VNIC_RSS_CFG_REQ_HASH_TYPE_TCP_IPV6; 1187 } else if (cmd->flow_type == UDP_V6_FLOW) { 1188 if (tuple == 4 && !(bp->flags & BNXT_FLAG_UDP_RSS_CAP)) 1189 return -EINVAL; 1190 rss_hash_cfg &= ~VNIC_RSS_CFG_REQ_HASH_TYPE_UDP_IPV6; 1191 if (tuple == 4) 1192 rss_hash_cfg |= VNIC_RSS_CFG_REQ_HASH_TYPE_UDP_IPV6; 1193 } else if (tuple == 4) { 1194 return -EINVAL; 1195 } 1196 1197 switch (cmd->flow_type) { 1198 case TCP_V4_FLOW: 1199 case UDP_V4_FLOW: 1200 case SCTP_V4_FLOW: 1201 case AH_ESP_V4_FLOW: 1202 case AH_V4_FLOW: 1203 case ESP_V4_FLOW: 1204 case IPV4_FLOW: 1205 if (tuple == 2) 1206 rss_hash_cfg |= VNIC_RSS_CFG_REQ_HASH_TYPE_IPV4; 1207 else if (!tuple) 1208 rss_hash_cfg &= ~VNIC_RSS_CFG_REQ_HASH_TYPE_IPV4; 1209 break; 1210 1211 case TCP_V6_FLOW: 1212 case UDP_V6_FLOW: 1213 case SCTP_V6_FLOW: 1214 case AH_ESP_V6_FLOW: 1215 case AH_V6_FLOW: 1216 case ESP_V6_FLOW: 1217 case IPV6_FLOW: 1218 if (tuple == 2) 1219 rss_hash_cfg |= VNIC_RSS_CFG_REQ_HASH_TYPE_IPV6; 1220 else if (!tuple) 1221 rss_hash_cfg &= ~VNIC_RSS_CFG_REQ_HASH_TYPE_IPV6; 1222 break; 1223 } 1224 1225 if (bp->rss_hash_cfg == rss_hash_cfg) 1226 return 0; 1227 1228 bp->rss_hash_cfg = rss_hash_cfg; 1229 if (netif_running(bp->dev)) { 1230 bnxt_close_nic(bp, false, false); 1231 rc = bnxt_open_nic(bp, false, false); 1232 } 1233 return rc; 1234 } 1235 1236 static int bnxt_get_rxnfc(struct net_device *dev, struct ethtool_rxnfc *cmd, 1237 u32 *rule_locs) 1238 { 1239 struct bnxt *bp = netdev_priv(dev); 1240 int rc = 0; 1241 1242 switch (cmd->cmd) { 1243 #ifdef CONFIG_RFS_ACCEL 1244 case ETHTOOL_GRXRINGS: 1245 cmd->data = bp->rx_nr_rings; 1246 break; 1247 1248 case ETHTOOL_GRXCLSRLCNT: 1249 cmd->rule_cnt = bp->ntp_fltr_count; 1250 cmd->data = BNXT_NTP_FLTR_MAX_FLTR; 1251 break; 1252 1253 case ETHTOOL_GRXCLSRLALL: 1254 rc = bnxt_grxclsrlall(bp, cmd, (u32 *)rule_locs); 1255 break; 1256 1257 case ETHTOOL_GRXCLSRULE: 1258 rc = bnxt_grxclsrule(bp, cmd); 1259 break; 1260 #endif 1261 1262 case ETHTOOL_GRXFH: 1263 rc = bnxt_grxfh(bp, cmd); 1264 break; 1265 1266 default: 1267 rc = -EOPNOTSUPP; 1268 break; 1269 } 1270 1271 return rc; 1272 } 1273 1274 static int bnxt_set_rxnfc(struct net_device *dev, struct ethtool_rxnfc *cmd) 1275 { 1276 struct bnxt *bp = netdev_priv(dev); 1277 int rc; 1278 1279 switch (cmd->cmd) { 1280 case ETHTOOL_SRXFH: 1281 rc = bnxt_srxfh(bp, cmd); 1282 break; 1283 1284 default: 1285 rc = -EOPNOTSUPP; 1286 break; 1287 } 1288 return rc; 1289 } 1290 1291 u32 bnxt_get_rxfh_indir_size(struct net_device *dev) 1292 { 1293 struct bnxt *bp = netdev_priv(dev); 1294 1295 if (bp->flags & BNXT_FLAG_CHIP_P5) 1296 return ALIGN(bp->rx_nr_rings, BNXT_RSS_TABLE_ENTRIES_P5); 1297 return HW_HASH_INDEX_SIZE; 1298 } 1299 1300 static u32 bnxt_get_rxfh_key_size(struct net_device *dev) 1301 { 1302 return HW_HASH_KEY_SIZE; 1303 } 1304 1305 static int bnxt_get_rxfh(struct net_device *dev, u32 *indir, u8 *key, 1306 u8 *hfunc) 1307 { 1308 struct bnxt *bp = netdev_priv(dev); 1309 struct bnxt_vnic_info *vnic; 1310 u32 i, tbl_size; 1311 1312 if (hfunc) 1313 *hfunc = ETH_RSS_HASH_TOP; 1314 1315 if (!bp->vnic_info) 1316 return 0; 1317 1318 vnic = &bp->vnic_info[0]; 1319 if (indir && bp->rss_indir_tbl) { 1320 tbl_size = bnxt_get_rxfh_indir_size(dev); 1321 for (i = 0; i < tbl_size; i++) 1322 indir[i] = bp->rss_indir_tbl[i]; 1323 } 1324 1325 if (key && vnic->rss_hash_key) 1326 memcpy(key, vnic->rss_hash_key, HW_HASH_KEY_SIZE); 1327 1328 return 0; 1329 } 1330 1331 static int bnxt_set_rxfh(struct net_device *dev, const u32 *indir, 1332 const u8 *key, const u8 hfunc) 1333 { 1334 struct bnxt *bp = netdev_priv(dev); 1335 int rc = 0; 1336 1337 if (hfunc && hfunc != ETH_RSS_HASH_TOP) 1338 return -EOPNOTSUPP; 1339 1340 if (key) 1341 return -EOPNOTSUPP; 1342 1343 if (indir) { 1344 u32 i, pad, tbl_size = bnxt_get_rxfh_indir_size(dev); 1345 1346 for (i = 0; i < tbl_size; i++) 1347 bp->rss_indir_tbl[i] = indir[i]; 1348 pad = bp->rss_indir_tbl_entries - tbl_size; 1349 if (pad) 1350 memset(&bp->rss_indir_tbl[i], 0, pad * sizeof(u16)); 1351 } 1352 1353 if (netif_running(bp->dev)) { 1354 bnxt_close_nic(bp, false, false); 1355 rc = bnxt_open_nic(bp, false, false); 1356 } 1357 return rc; 1358 } 1359 1360 static void bnxt_get_drvinfo(struct net_device *dev, 1361 struct ethtool_drvinfo *info) 1362 { 1363 struct bnxt *bp = netdev_priv(dev); 1364 1365 strlcpy(info->driver, DRV_MODULE_NAME, sizeof(info->driver)); 1366 strlcpy(info->fw_version, bp->fw_ver_str, sizeof(info->fw_version)); 1367 strlcpy(info->bus_info, pci_name(bp->pdev), sizeof(info->bus_info)); 1368 info->n_stats = bnxt_get_num_stats(bp); 1369 info->testinfo_len = bp->num_tests; 1370 /* TODO CHIMP_FW: eeprom dump details */ 1371 info->eedump_len = 0; 1372 /* TODO CHIMP FW: reg dump details */ 1373 info->regdump_len = 0; 1374 } 1375 1376 static int bnxt_get_regs_len(struct net_device *dev) 1377 { 1378 struct bnxt *bp = netdev_priv(dev); 1379 int reg_len; 1380 1381 if (!BNXT_PF(bp)) 1382 return -EOPNOTSUPP; 1383 1384 reg_len = BNXT_PXP_REG_LEN; 1385 1386 if (bp->fw_cap & BNXT_FW_CAP_PCIE_STATS_SUPPORTED) 1387 reg_len += sizeof(struct pcie_ctx_hw_stats); 1388 1389 return reg_len; 1390 } 1391 1392 static void bnxt_get_regs(struct net_device *dev, struct ethtool_regs *regs, 1393 void *_p) 1394 { 1395 struct pcie_ctx_hw_stats *hw_pcie_stats; 1396 struct hwrm_pcie_qstats_input *req; 1397 struct bnxt *bp = netdev_priv(dev); 1398 dma_addr_t hw_pcie_stats_addr; 1399 int rc; 1400 1401 regs->version = 0; 1402 bnxt_dbg_hwrm_rd_reg(bp, 0, BNXT_PXP_REG_LEN / 4, _p); 1403 1404 if (!(bp->fw_cap & BNXT_FW_CAP_PCIE_STATS_SUPPORTED)) 1405 return; 1406 1407 if (hwrm_req_init(bp, req, HWRM_PCIE_QSTATS)) 1408 return; 1409 1410 hw_pcie_stats = hwrm_req_dma_slice(bp, req, sizeof(*hw_pcie_stats), 1411 &hw_pcie_stats_addr); 1412 if (!hw_pcie_stats) { 1413 hwrm_req_drop(bp, req); 1414 return; 1415 } 1416 1417 regs->version = 1; 1418 hwrm_req_hold(bp, req); /* hold on to slice */ 1419 req->pcie_stat_size = cpu_to_le16(sizeof(*hw_pcie_stats)); 1420 req->pcie_stat_host_addr = cpu_to_le64(hw_pcie_stats_addr); 1421 rc = hwrm_req_send(bp, req); 1422 if (!rc) { 1423 __le64 *src = (__le64 *)hw_pcie_stats; 1424 u64 *dst = (u64 *)(_p + BNXT_PXP_REG_LEN); 1425 int i; 1426 1427 for (i = 0; i < sizeof(*hw_pcie_stats) / sizeof(__le64); i++) 1428 dst[i] = le64_to_cpu(src[i]); 1429 } 1430 hwrm_req_drop(bp, req); 1431 } 1432 1433 static void bnxt_get_wol(struct net_device *dev, struct ethtool_wolinfo *wol) 1434 { 1435 struct bnxt *bp = netdev_priv(dev); 1436 1437 wol->supported = 0; 1438 wol->wolopts = 0; 1439 memset(&wol->sopass, 0, sizeof(wol->sopass)); 1440 if (bp->flags & BNXT_FLAG_WOL_CAP) { 1441 wol->supported = WAKE_MAGIC; 1442 if (bp->wol) 1443 wol->wolopts = WAKE_MAGIC; 1444 } 1445 } 1446 1447 static int bnxt_set_wol(struct net_device *dev, struct ethtool_wolinfo *wol) 1448 { 1449 struct bnxt *bp = netdev_priv(dev); 1450 1451 if (wol->wolopts & ~WAKE_MAGIC) 1452 return -EINVAL; 1453 1454 if (wol->wolopts & WAKE_MAGIC) { 1455 if (!(bp->flags & BNXT_FLAG_WOL_CAP)) 1456 return -EINVAL; 1457 if (!bp->wol) { 1458 if (bnxt_hwrm_alloc_wol_fltr(bp)) 1459 return -EBUSY; 1460 bp->wol = 1; 1461 } 1462 } else { 1463 if (bp->wol) { 1464 if (bnxt_hwrm_free_wol_fltr(bp)) 1465 return -EBUSY; 1466 bp->wol = 0; 1467 } 1468 } 1469 return 0; 1470 } 1471 1472 u32 _bnxt_fw_to_ethtool_adv_spds(u16 fw_speeds, u8 fw_pause) 1473 { 1474 u32 speed_mask = 0; 1475 1476 /* TODO: support 25GB, 40GB, 50GB with different cable type */ 1477 /* set the advertised speeds */ 1478 if (fw_speeds & BNXT_LINK_SPEED_MSK_100MB) 1479 speed_mask |= ADVERTISED_100baseT_Full; 1480 if (fw_speeds & BNXT_LINK_SPEED_MSK_1GB) 1481 speed_mask |= ADVERTISED_1000baseT_Full; 1482 if (fw_speeds & BNXT_LINK_SPEED_MSK_2_5GB) 1483 speed_mask |= ADVERTISED_2500baseX_Full; 1484 if (fw_speeds & BNXT_LINK_SPEED_MSK_10GB) 1485 speed_mask |= ADVERTISED_10000baseT_Full; 1486 if (fw_speeds & BNXT_LINK_SPEED_MSK_40GB) 1487 speed_mask |= ADVERTISED_40000baseCR4_Full; 1488 1489 if ((fw_pause & BNXT_LINK_PAUSE_BOTH) == BNXT_LINK_PAUSE_BOTH) 1490 speed_mask |= ADVERTISED_Pause; 1491 else if (fw_pause & BNXT_LINK_PAUSE_TX) 1492 speed_mask |= ADVERTISED_Asym_Pause; 1493 else if (fw_pause & BNXT_LINK_PAUSE_RX) 1494 speed_mask |= ADVERTISED_Pause | ADVERTISED_Asym_Pause; 1495 1496 return speed_mask; 1497 } 1498 1499 #define BNXT_FW_TO_ETHTOOL_SPDS(fw_speeds, fw_pause, lk_ksettings, name)\ 1500 { \ 1501 if ((fw_speeds) & BNXT_LINK_SPEED_MSK_100MB) \ 1502 ethtool_link_ksettings_add_link_mode(lk_ksettings, name,\ 1503 100baseT_Full); \ 1504 if ((fw_speeds) & BNXT_LINK_SPEED_MSK_1GB) \ 1505 ethtool_link_ksettings_add_link_mode(lk_ksettings, name,\ 1506 1000baseT_Full); \ 1507 if ((fw_speeds) & BNXT_LINK_SPEED_MSK_10GB) \ 1508 ethtool_link_ksettings_add_link_mode(lk_ksettings, name,\ 1509 10000baseT_Full); \ 1510 if ((fw_speeds) & BNXT_LINK_SPEED_MSK_25GB) \ 1511 ethtool_link_ksettings_add_link_mode(lk_ksettings, name,\ 1512 25000baseCR_Full); \ 1513 if ((fw_speeds) & BNXT_LINK_SPEED_MSK_40GB) \ 1514 ethtool_link_ksettings_add_link_mode(lk_ksettings, name,\ 1515 40000baseCR4_Full);\ 1516 if ((fw_speeds) & BNXT_LINK_SPEED_MSK_50GB) \ 1517 ethtool_link_ksettings_add_link_mode(lk_ksettings, name,\ 1518 50000baseCR2_Full);\ 1519 if ((fw_speeds) & BNXT_LINK_SPEED_MSK_100GB) \ 1520 ethtool_link_ksettings_add_link_mode(lk_ksettings, name,\ 1521 100000baseCR4_Full);\ 1522 if ((fw_pause) & BNXT_LINK_PAUSE_RX) { \ 1523 ethtool_link_ksettings_add_link_mode(lk_ksettings, name,\ 1524 Pause); \ 1525 if (!((fw_pause) & BNXT_LINK_PAUSE_TX)) \ 1526 ethtool_link_ksettings_add_link_mode( \ 1527 lk_ksettings, name, Asym_Pause);\ 1528 } else if ((fw_pause) & BNXT_LINK_PAUSE_TX) { \ 1529 ethtool_link_ksettings_add_link_mode(lk_ksettings, name,\ 1530 Asym_Pause); \ 1531 } \ 1532 } 1533 1534 #define BNXT_ETHTOOL_TO_FW_SPDS(fw_speeds, lk_ksettings, name) \ 1535 { \ 1536 if (ethtool_link_ksettings_test_link_mode(lk_ksettings, name, \ 1537 100baseT_Full) || \ 1538 ethtool_link_ksettings_test_link_mode(lk_ksettings, name, \ 1539 100baseT_Half)) \ 1540 (fw_speeds) |= BNXT_LINK_SPEED_MSK_100MB; \ 1541 if (ethtool_link_ksettings_test_link_mode(lk_ksettings, name, \ 1542 1000baseT_Full) || \ 1543 ethtool_link_ksettings_test_link_mode(lk_ksettings, name, \ 1544 1000baseT_Half)) \ 1545 (fw_speeds) |= BNXT_LINK_SPEED_MSK_1GB; \ 1546 if (ethtool_link_ksettings_test_link_mode(lk_ksettings, name, \ 1547 10000baseT_Full)) \ 1548 (fw_speeds) |= BNXT_LINK_SPEED_MSK_10GB; \ 1549 if (ethtool_link_ksettings_test_link_mode(lk_ksettings, name, \ 1550 25000baseCR_Full)) \ 1551 (fw_speeds) |= BNXT_LINK_SPEED_MSK_25GB; \ 1552 if (ethtool_link_ksettings_test_link_mode(lk_ksettings, name, \ 1553 40000baseCR4_Full)) \ 1554 (fw_speeds) |= BNXT_LINK_SPEED_MSK_40GB; \ 1555 if (ethtool_link_ksettings_test_link_mode(lk_ksettings, name, \ 1556 50000baseCR2_Full)) \ 1557 (fw_speeds) |= BNXT_LINK_SPEED_MSK_50GB; \ 1558 if (ethtool_link_ksettings_test_link_mode(lk_ksettings, name, \ 1559 100000baseCR4_Full)) \ 1560 (fw_speeds) |= BNXT_LINK_SPEED_MSK_100GB; \ 1561 } 1562 1563 #define BNXT_FW_TO_ETHTOOL_PAM4_SPDS(fw_speeds, lk_ksettings, name) \ 1564 { \ 1565 if ((fw_speeds) & BNXT_LINK_PAM4_SPEED_MSK_50GB) \ 1566 ethtool_link_ksettings_add_link_mode(lk_ksettings, name,\ 1567 50000baseCR_Full); \ 1568 if ((fw_speeds) & BNXT_LINK_PAM4_SPEED_MSK_100GB) \ 1569 ethtool_link_ksettings_add_link_mode(lk_ksettings, name,\ 1570 100000baseCR2_Full);\ 1571 if ((fw_speeds) & BNXT_LINK_PAM4_SPEED_MSK_200GB) \ 1572 ethtool_link_ksettings_add_link_mode(lk_ksettings, name,\ 1573 200000baseCR4_Full);\ 1574 } 1575 1576 #define BNXT_ETHTOOL_TO_FW_PAM4_SPDS(fw_speeds, lk_ksettings, name) \ 1577 { \ 1578 if (ethtool_link_ksettings_test_link_mode(lk_ksettings, name, \ 1579 50000baseCR_Full)) \ 1580 (fw_speeds) |= BNXT_LINK_PAM4_SPEED_MSK_50GB; \ 1581 if (ethtool_link_ksettings_test_link_mode(lk_ksettings, name, \ 1582 100000baseCR2_Full)) \ 1583 (fw_speeds) |= BNXT_LINK_PAM4_SPEED_MSK_100GB; \ 1584 if (ethtool_link_ksettings_test_link_mode(lk_ksettings, name, \ 1585 200000baseCR4_Full)) \ 1586 (fw_speeds) |= BNXT_LINK_PAM4_SPEED_MSK_200GB; \ 1587 } 1588 1589 static void bnxt_fw_to_ethtool_advertised_fec(struct bnxt_link_info *link_info, 1590 struct ethtool_link_ksettings *lk_ksettings) 1591 { 1592 u16 fec_cfg = link_info->fec_cfg; 1593 1594 if ((fec_cfg & BNXT_FEC_NONE) || !(fec_cfg & BNXT_FEC_AUTONEG)) { 1595 linkmode_set_bit(ETHTOOL_LINK_MODE_FEC_NONE_BIT, 1596 lk_ksettings->link_modes.advertising); 1597 return; 1598 } 1599 if (fec_cfg & BNXT_FEC_ENC_BASE_R) 1600 linkmode_set_bit(ETHTOOL_LINK_MODE_FEC_BASER_BIT, 1601 lk_ksettings->link_modes.advertising); 1602 if (fec_cfg & BNXT_FEC_ENC_RS) 1603 linkmode_set_bit(ETHTOOL_LINK_MODE_FEC_RS_BIT, 1604 lk_ksettings->link_modes.advertising); 1605 if (fec_cfg & BNXT_FEC_ENC_LLRS) 1606 linkmode_set_bit(ETHTOOL_LINK_MODE_FEC_LLRS_BIT, 1607 lk_ksettings->link_modes.advertising); 1608 } 1609 1610 static void bnxt_fw_to_ethtool_advertised_spds(struct bnxt_link_info *link_info, 1611 struct ethtool_link_ksettings *lk_ksettings) 1612 { 1613 u16 fw_speeds = link_info->advertising; 1614 u8 fw_pause = 0; 1615 1616 if (link_info->autoneg & BNXT_AUTONEG_FLOW_CTRL) 1617 fw_pause = link_info->auto_pause_setting; 1618 1619 BNXT_FW_TO_ETHTOOL_SPDS(fw_speeds, fw_pause, lk_ksettings, advertising); 1620 fw_speeds = link_info->advertising_pam4; 1621 BNXT_FW_TO_ETHTOOL_PAM4_SPDS(fw_speeds, lk_ksettings, advertising); 1622 bnxt_fw_to_ethtool_advertised_fec(link_info, lk_ksettings); 1623 } 1624 1625 static void bnxt_fw_to_ethtool_lp_adv(struct bnxt_link_info *link_info, 1626 struct ethtool_link_ksettings *lk_ksettings) 1627 { 1628 u16 fw_speeds = link_info->lp_auto_link_speeds; 1629 u8 fw_pause = 0; 1630 1631 if (link_info->autoneg & BNXT_AUTONEG_FLOW_CTRL) 1632 fw_pause = link_info->lp_pause; 1633 1634 BNXT_FW_TO_ETHTOOL_SPDS(fw_speeds, fw_pause, lk_ksettings, 1635 lp_advertising); 1636 fw_speeds = link_info->lp_auto_pam4_link_speeds; 1637 BNXT_FW_TO_ETHTOOL_PAM4_SPDS(fw_speeds, lk_ksettings, lp_advertising); 1638 } 1639 1640 static void bnxt_fw_to_ethtool_support_fec(struct bnxt_link_info *link_info, 1641 struct ethtool_link_ksettings *lk_ksettings) 1642 { 1643 u16 fec_cfg = link_info->fec_cfg; 1644 1645 if (fec_cfg & BNXT_FEC_NONE) { 1646 linkmode_set_bit(ETHTOOL_LINK_MODE_FEC_NONE_BIT, 1647 lk_ksettings->link_modes.supported); 1648 return; 1649 } 1650 if (fec_cfg & BNXT_FEC_ENC_BASE_R_CAP) 1651 linkmode_set_bit(ETHTOOL_LINK_MODE_FEC_BASER_BIT, 1652 lk_ksettings->link_modes.supported); 1653 if (fec_cfg & BNXT_FEC_ENC_RS_CAP) 1654 linkmode_set_bit(ETHTOOL_LINK_MODE_FEC_RS_BIT, 1655 lk_ksettings->link_modes.supported); 1656 if (fec_cfg & BNXT_FEC_ENC_LLRS_CAP) 1657 linkmode_set_bit(ETHTOOL_LINK_MODE_FEC_LLRS_BIT, 1658 lk_ksettings->link_modes.supported); 1659 } 1660 1661 static void bnxt_fw_to_ethtool_support_spds(struct bnxt_link_info *link_info, 1662 struct ethtool_link_ksettings *lk_ksettings) 1663 { 1664 u16 fw_speeds = link_info->support_speeds; 1665 1666 BNXT_FW_TO_ETHTOOL_SPDS(fw_speeds, 0, lk_ksettings, supported); 1667 fw_speeds = link_info->support_pam4_speeds; 1668 BNXT_FW_TO_ETHTOOL_PAM4_SPDS(fw_speeds, lk_ksettings, supported); 1669 1670 ethtool_link_ksettings_add_link_mode(lk_ksettings, supported, Pause); 1671 ethtool_link_ksettings_add_link_mode(lk_ksettings, supported, 1672 Asym_Pause); 1673 1674 if (link_info->support_auto_speeds || 1675 link_info->support_pam4_auto_speeds) 1676 ethtool_link_ksettings_add_link_mode(lk_ksettings, supported, 1677 Autoneg); 1678 bnxt_fw_to_ethtool_support_fec(link_info, lk_ksettings); 1679 } 1680 1681 u32 bnxt_fw_to_ethtool_speed(u16 fw_link_speed) 1682 { 1683 switch (fw_link_speed) { 1684 case BNXT_LINK_SPEED_100MB: 1685 return SPEED_100; 1686 case BNXT_LINK_SPEED_1GB: 1687 return SPEED_1000; 1688 case BNXT_LINK_SPEED_2_5GB: 1689 return SPEED_2500; 1690 case BNXT_LINK_SPEED_10GB: 1691 return SPEED_10000; 1692 case BNXT_LINK_SPEED_20GB: 1693 return SPEED_20000; 1694 case BNXT_LINK_SPEED_25GB: 1695 return SPEED_25000; 1696 case BNXT_LINK_SPEED_40GB: 1697 return SPEED_40000; 1698 case BNXT_LINK_SPEED_50GB: 1699 return SPEED_50000; 1700 case BNXT_LINK_SPEED_100GB: 1701 return SPEED_100000; 1702 default: 1703 return SPEED_UNKNOWN; 1704 } 1705 } 1706 1707 static int bnxt_get_link_ksettings(struct net_device *dev, 1708 struct ethtool_link_ksettings *lk_ksettings) 1709 { 1710 struct bnxt *bp = netdev_priv(dev); 1711 struct bnxt_link_info *link_info = &bp->link_info; 1712 struct ethtool_link_settings *base = &lk_ksettings->base; 1713 u32 ethtool_speed; 1714 1715 ethtool_link_ksettings_zero_link_mode(lk_ksettings, supported); 1716 mutex_lock(&bp->link_lock); 1717 bnxt_fw_to_ethtool_support_spds(link_info, lk_ksettings); 1718 1719 ethtool_link_ksettings_zero_link_mode(lk_ksettings, advertising); 1720 if (link_info->autoneg) { 1721 bnxt_fw_to_ethtool_advertised_spds(link_info, lk_ksettings); 1722 ethtool_link_ksettings_add_link_mode(lk_ksettings, 1723 advertising, Autoneg); 1724 base->autoneg = AUTONEG_ENABLE; 1725 base->duplex = DUPLEX_UNKNOWN; 1726 if (link_info->phy_link_status == BNXT_LINK_LINK) { 1727 bnxt_fw_to_ethtool_lp_adv(link_info, lk_ksettings); 1728 if (link_info->duplex & BNXT_LINK_DUPLEX_FULL) 1729 base->duplex = DUPLEX_FULL; 1730 else 1731 base->duplex = DUPLEX_HALF; 1732 } 1733 ethtool_speed = bnxt_fw_to_ethtool_speed(link_info->link_speed); 1734 } else { 1735 base->autoneg = AUTONEG_DISABLE; 1736 ethtool_speed = 1737 bnxt_fw_to_ethtool_speed(link_info->req_link_speed); 1738 base->duplex = DUPLEX_HALF; 1739 if (link_info->req_duplex == BNXT_LINK_DUPLEX_FULL) 1740 base->duplex = DUPLEX_FULL; 1741 } 1742 base->speed = ethtool_speed; 1743 1744 base->port = PORT_NONE; 1745 if (link_info->media_type == PORT_PHY_QCFG_RESP_MEDIA_TYPE_TP) { 1746 base->port = PORT_TP; 1747 ethtool_link_ksettings_add_link_mode(lk_ksettings, supported, 1748 TP); 1749 ethtool_link_ksettings_add_link_mode(lk_ksettings, advertising, 1750 TP); 1751 } else { 1752 ethtool_link_ksettings_add_link_mode(lk_ksettings, supported, 1753 FIBRE); 1754 ethtool_link_ksettings_add_link_mode(lk_ksettings, advertising, 1755 FIBRE); 1756 1757 if (link_info->media_type == PORT_PHY_QCFG_RESP_MEDIA_TYPE_DAC) 1758 base->port = PORT_DA; 1759 else if (link_info->media_type == 1760 PORT_PHY_QCFG_RESP_MEDIA_TYPE_FIBRE) 1761 base->port = PORT_FIBRE; 1762 } 1763 base->phy_address = link_info->phy_addr; 1764 mutex_unlock(&bp->link_lock); 1765 1766 return 0; 1767 } 1768 1769 static int bnxt_force_link_speed(struct net_device *dev, u32 ethtool_speed) 1770 { 1771 struct bnxt *bp = netdev_priv(dev); 1772 struct bnxt_link_info *link_info = &bp->link_info; 1773 u16 support_pam4_spds = link_info->support_pam4_speeds; 1774 u16 support_spds = link_info->support_speeds; 1775 u8 sig_mode = BNXT_SIG_MODE_NRZ; 1776 u16 fw_speed = 0; 1777 1778 switch (ethtool_speed) { 1779 case SPEED_100: 1780 if (support_spds & BNXT_LINK_SPEED_MSK_100MB) 1781 fw_speed = PORT_PHY_CFG_REQ_FORCE_LINK_SPEED_100MB; 1782 break; 1783 case SPEED_1000: 1784 if (support_spds & BNXT_LINK_SPEED_MSK_1GB) 1785 fw_speed = PORT_PHY_CFG_REQ_FORCE_LINK_SPEED_1GB; 1786 break; 1787 case SPEED_2500: 1788 if (support_spds & BNXT_LINK_SPEED_MSK_2_5GB) 1789 fw_speed = PORT_PHY_CFG_REQ_FORCE_LINK_SPEED_2_5GB; 1790 break; 1791 case SPEED_10000: 1792 if (support_spds & BNXT_LINK_SPEED_MSK_10GB) 1793 fw_speed = PORT_PHY_CFG_REQ_FORCE_LINK_SPEED_10GB; 1794 break; 1795 case SPEED_20000: 1796 if (support_spds & BNXT_LINK_SPEED_MSK_20GB) 1797 fw_speed = PORT_PHY_CFG_REQ_FORCE_LINK_SPEED_20GB; 1798 break; 1799 case SPEED_25000: 1800 if (support_spds & BNXT_LINK_SPEED_MSK_25GB) 1801 fw_speed = PORT_PHY_CFG_REQ_FORCE_LINK_SPEED_25GB; 1802 break; 1803 case SPEED_40000: 1804 if (support_spds & BNXT_LINK_SPEED_MSK_40GB) 1805 fw_speed = PORT_PHY_CFG_REQ_FORCE_LINK_SPEED_40GB; 1806 break; 1807 case SPEED_50000: 1808 if (support_spds & BNXT_LINK_SPEED_MSK_50GB) { 1809 fw_speed = PORT_PHY_CFG_REQ_FORCE_LINK_SPEED_50GB; 1810 } else if (support_pam4_spds & BNXT_LINK_PAM4_SPEED_MSK_50GB) { 1811 fw_speed = PORT_PHY_CFG_REQ_FORCE_PAM4_LINK_SPEED_50GB; 1812 sig_mode = BNXT_SIG_MODE_PAM4; 1813 } 1814 break; 1815 case SPEED_100000: 1816 if (support_spds & BNXT_LINK_SPEED_MSK_100GB) { 1817 fw_speed = PORT_PHY_CFG_REQ_FORCE_LINK_SPEED_100GB; 1818 } else if (support_pam4_spds & BNXT_LINK_PAM4_SPEED_MSK_100GB) { 1819 fw_speed = PORT_PHY_CFG_REQ_FORCE_PAM4_LINK_SPEED_100GB; 1820 sig_mode = BNXT_SIG_MODE_PAM4; 1821 } 1822 break; 1823 case SPEED_200000: 1824 if (support_pam4_spds & BNXT_LINK_PAM4_SPEED_MSK_200GB) { 1825 fw_speed = PORT_PHY_CFG_REQ_FORCE_PAM4_LINK_SPEED_200GB; 1826 sig_mode = BNXT_SIG_MODE_PAM4; 1827 } 1828 break; 1829 } 1830 1831 if (!fw_speed) { 1832 netdev_err(dev, "unsupported speed!\n"); 1833 return -EINVAL; 1834 } 1835 1836 if (link_info->req_link_speed == fw_speed && 1837 link_info->req_signal_mode == sig_mode && 1838 link_info->autoneg == 0) 1839 return -EALREADY; 1840 1841 link_info->req_link_speed = fw_speed; 1842 link_info->req_signal_mode = sig_mode; 1843 link_info->req_duplex = BNXT_LINK_DUPLEX_FULL; 1844 link_info->autoneg = 0; 1845 link_info->advertising = 0; 1846 link_info->advertising_pam4 = 0; 1847 1848 return 0; 1849 } 1850 1851 u16 bnxt_get_fw_auto_link_speeds(u32 advertising) 1852 { 1853 u16 fw_speed_mask = 0; 1854 1855 /* only support autoneg at speed 100, 1000, and 10000 */ 1856 if (advertising & (ADVERTISED_100baseT_Full | 1857 ADVERTISED_100baseT_Half)) { 1858 fw_speed_mask |= BNXT_LINK_SPEED_MSK_100MB; 1859 } 1860 if (advertising & (ADVERTISED_1000baseT_Full | 1861 ADVERTISED_1000baseT_Half)) { 1862 fw_speed_mask |= BNXT_LINK_SPEED_MSK_1GB; 1863 } 1864 if (advertising & ADVERTISED_10000baseT_Full) 1865 fw_speed_mask |= BNXT_LINK_SPEED_MSK_10GB; 1866 1867 if (advertising & ADVERTISED_40000baseCR4_Full) 1868 fw_speed_mask |= BNXT_LINK_SPEED_MSK_40GB; 1869 1870 return fw_speed_mask; 1871 } 1872 1873 static int bnxt_set_link_ksettings(struct net_device *dev, 1874 const struct ethtool_link_ksettings *lk_ksettings) 1875 { 1876 struct bnxt *bp = netdev_priv(dev); 1877 struct bnxt_link_info *link_info = &bp->link_info; 1878 const struct ethtool_link_settings *base = &lk_ksettings->base; 1879 bool set_pause = false; 1880 u32 speed; 1881 int rc = 0; 1882 1883 if (!BNXT_PHY_CFG_ABLE(bp)) 1884 return -EOPNOTSUPP; 1885 1886 mutex_lock(&bp->link_lock); 1887 if (base->autoneg == AUTONEG_ENABLE) { 1888 link_info->advertising = 0; 1889 link_info->advertising_pam4 = 0; 1890 BNXT_ETHTOOL_TO_FW_SPDS(link_info->advertising, lk_ksettings, 1891 advertising); 1892 BNXT_ETHTOOL_TO_FW_PAM4_SPDS(link_info->advertising_pam4, 1893 lk_ksettings, advertising); 1894 link_info->autoneg |= BNXT_AUTONEG_SPEED; 1895 if (!link_info->advertising && !link_info->advertising_pam4) { 1896 link_info->advertising = link_info->support_auto_speeds; 1897 link_info->advertising_pam4 = 1898 link_info->support_pam4_auto_speeds; 1899 } 1900 /* any change to autoneg will cause link change, therefore the 1901 * driver should put back the original pause setting in autoneg 1902 */ 1903 set_pause = true; 1904 } else { 1905 u8 phy_type = link_info->phy_type; 1906 1907 if (phy_type == PORT_PHY_QCFG_RESP_PHY_TYPE_BASET || 1908 phy_type == PORT_PHY_QCFG_RESP_PHY_TYPE_BASETE || 1909 link_info->media_type == PORT_PHY_QCFG_RESP_MEDIA_TYPE_TP) { 1910 netdev_err(dev, "10GBase-T devices must autoneg\n"); 1911 rc = -EINVAL; 1912 goto set_setting_exit; 1913 } 1914 if (base->duplex == DUPLEX_HALF) { 1915 netdev_err(dev, "HALF DUPLEX is not supported!\n"); 1916 rc = -EINVAL; 1917 goto set_setting_exit; 1918 } 1919 speed = base->speed; 1920 rc = bnxt_force_link_speed(dev, speed); 1921 if (rc) { 1922 if (rc == -EALREADY) 1923 rc = 0; 1924 goto set_setting_exit; 1925 } 1926 } 1927 1928 if (netif_running(dev)) 1929 rc = bnxt_hwrm_set_link_setting(bp, set_pause, false); 1930 1931 set_setting_exit: 1932 mutex_unlock(&bp->link_lock); 1933 return rc; 1934 } 1935 1936 static int bnxt_get_fecparam(struct net_device *dev, 1937 struct ethtool_fecparam *fec) 1938 { 1939 struct bnxt *bp = netdev_priv(dev); 1940 struct bnxt_link_info *link_info; 1941 u8 active_fec; 1942 u16 fec_cfg; 1943 1944 link_info = &bp->link_info; 1945 fec_cfg = link_info->fec_cfg; 1946 active_fec = link_info->active_fec_sig_mode & 1947 PORT_PHY_QCFG_RESP_ACTIVE_FEC_MASK; 1948 if (fec_cfg & BNXT_FEC_NONE) { 1949 fec->fec = ETHTOOL_FEC_NONE; 1950 fec->active_fec = ETHTOOL_FEC_NONE; 1951 return 0; 1952 } 1953 if (fec_cfg & BNXT_FEC_AUTONEG) 1954 fec->fec |= ETHTOOL_FEC_AUTO; 1955 if (fec_cfg & BNXT_FEC_ENC_BASE_R) 1956 fec->fec |= ETHTOOL_FEC_BASER; 1957 if (fec_cfg & BNXT_FEC_ENC_RS) 1958 fec->fec |= ETHTOOL_FEC_RS; 1959 if (fec_cfg & BNXT_FEC_ENC_LLRS) 1960 fec->fec |= ETHTOOL_FEC_LLRS; 1961 1962 switch (active_fec) { 1963 case PORT_PHY_QCFG_RESP_ACTIVE_FEC_FEC_CLAUSE74_ACTIVE: 1964 fec->active_fec |= ETHTOOL_FEC_BASER; 1965 break; 1966 case PORT_PHY_QCFG_RESP_ACTIVE_FEC_FEC_CLAUSE91_ACTIVE: 1967 case PORT_PHY_QCFG_RESP_ACTIVE_FEC_FEC_RS544_1XN_ACTIVE: 1968 case PORT_PHY_QCFG_RESP_ACTIVE_FEC_FEC_RS544_IEEE_ACTIVE: 1969 fec->active_fec |= ETHTOOL_FEC_RS; 1970 break; 1971 case PORT_PHY_QCFG_RESP_ACTIVE_FEC_FEC_RS272_1XN_ACTIVE: 1972 case PORT_PHY_QCFG_RESP_ACTIVE_FEC_FEC_RS272_IEEE_ACTIVE: 1973 fec->active_fec |= ETHTOOL_FEC_LLRS; 1974 break; 1975 } 1976 return 0; 1977 } 1978 1979 static void bnxt_get_fec_stats(struct net_device *dev, 1980 struct ethtool_fec_stats *fec_stats) 1981 { 1982 struct bnxt *bp = netdev_priv(dev); 1983 u64 *rx; 1984 1985 if (BNXT_VF(bp) || !(bp->flags & BNXT_FLAG_PORT_STATS_EXT)) 1986 return; 1987 1988 rx = bp->rx_port_stats_ext.sw_stats; 1989 fec_stats->corrected_bits.total = 1990 *(rx + BNXT_RX_STATS_EXT_OFFSET(rx_corrected_bits)); 1991 } 1992 1993 static u32 bnxt_ethtool_forced_fec_to_fw(struct bnxt_link_info *link_info, 1994 u32 fec) 1995 { 1996 u32 fw_fec = PORT_PHY_CFG_REQ_FLAGS_FEC_AUTONEG_DISABLE; 1997 1998 if (fec & ETHTOOL_FEC_BASER) 1999 fw_fec |= BNXT_FEC_BASE_R_ON(link_info); 2000 else if (fec & ETHTOOL_FEC_RS) 2001 fw_fec |= BNXT_FEC_RS_ON(link_info); 2002 else if (fec & ETHTOOL_FEC_LLRS) 2003 fw_fec |= BNXT_FEC_LLRS_ON; 2004 return fw_fec; 2005 } 2006 2007 static int bnxt_set_fecparam(struct net_device *dev, 2008 struct ethtool_fecparam *fecparam) 2009 { 2010 struct hwrm_port_phy_cfg_input *req; 2011 struct bnxt *bp = netdev_priv(dev); 2012 struct bnxt_link_info *link_info; 2013 u32 new_cfg, fec = fecparam->fec; 2014 u16 fec_cfg; 2015 int rc; 2016 2017 link_info = &bp->link_info; 2018 fec_cfg = link_info->fec_cfg; 2019 if (fec_cfg & BNXT_FEC_NONE) 2020 return -EOPNOTSUPP; 2021 2022 if (fec & ETHTOOL_FEC_OFF) { 2023 new_cfg = PORT_PHY_CFG_REQ_FLAGS_FEC_AUTONEG_DISABLE | 2024 BNXT_FEC_ALL_OFF(link_info); 2025 goto apply_fec; 2026 } 2027 if (((fec & ETHTOOL_FEC_AUTO) && !(fec_cfg & BNXT_FEC_AUTONEG_CAP)) || 2028 ((fec & ETHTOOL_FEC_RS) && !(fec_cfg & BNXT_FEC_ENC_RS_CAP)) || 2029 ((fec & ETHTOOL_FEC_LLRS) && !(fec_cfg & BNXT_FEC_ENC_LLRS_CAP)) || 2030 ((fec & ETHTOOL_FEC_BASER) && !(fec_cfg & BNXT_FEC_ENC_BASE_R_CAP))) 2031 return -EINVAL; 2032 2033 if (fec & ETHTOOL_FEC_AUTO) { 2034 if (!link_info->autoneg) 2035 return -EINVAL; 2036 new_cfg = PORT_PHY_CFG_REQ_FLAGS_FEC_AUTONEG_ENABLE; 2037 } else { 2038 new_cfg = bnxt_ethtool_forced_fec_to_fw(link_info, fec); 2039 } 2040 2041 apply_fec: 2042 rc = hwrm_req_init(bp, req, HWRM_PORT_PHY_CFG); 2043 if (rc) 2044 return rc; 2045 req->flags = cpu_to_le32(new_cfg | PORT_PHY_CFG_REQ_FLAGS_RESET_PHY); 2046 rc = hwrm_req_send(bp, req); 2047 /* update current settings */ 2048 if (!rc) { 2049 mutex_lock(&bp->link_lock); 2050 bnxt_update_link(bp, false); 2051 mutex_unlock(&bp->link_lock); 2052 } 2053 return rc; 2054 } 2055 2056 static void bnxt_get_pauseparam(struct net_device *dev, 2057 struct ethtool_pauseparam *epause) 2058 { 2059 struct bnxt *bp = netdev_priv(dev); 2060 struct bnxt_link_info *link_info = &bp->link_info; 2061 2062 if (BNXT_VF(bp)) 2063 return; 2064 epause->autoneg = !!(link_info->autoneg & BNXT_AUTONEG_FLOW_CTRL); 2065 epause->rx_pause = !!(link_info->req_flow_ctrl & BNXT_LINK_PAUSE_RX); 2066 epause->tx_pause = !!(link_info->req_flow_ctrl & BNXT_LINK_PAUSE_TX); 2067 } 2068 2069 static void bnxt_get_pause_stats(struct net_device *dev, 2070 struct ethtool_pause_stats *epstat) 2071 { 2072 struct bnxt *bp = netdev_priv(dev); 2073 u64 *rx, *tx; 2074 2075 if (BNXT_VF(bp) || !(bp->flags & BNXT_FLAG_PORT_STATS)) 2076 return; 2077 2078 rx = bp->port_stats.sw_stats; 2079 tx = bp->port_stats.sw_stats + BNXT_TX_PORT_STATS_BYTE_OFFSET / 8; 2080 2081 epstat->rx_pause_frames = BNXT_GET_RX_PORT_STATS64(rx, rx_pause_frames); 2082 epstat->tx_pause_frames = BNXT_GET_TX_PORT_STATS64(tx, tx_pause_frames); 2083 } 2084 2085 static int bnxt_set_pauseparam(struct net_device *dev, 2086 struct ethtool_pauseparam *epause) 2087 { 2088 int rc = 0; 2089 struct bnxt *bp = netdev_priv(dev); 2090 struct bnxt_link_info *link_info = &bp->link_info; 2091 2092 if (!BNXT_PHY_CFG_ABLE(bp)) 2093 return -EOPNOTSUPP; 2094 2095 mutex_lock(&bp->link_lock); 2096 if (epause->autoneg) { 2097 if (!(link_info->autoneg & BNXT_AUTONEG_SPEED)) { 2098 rc = -EINVAL; 2099 goto pause_exit; 2100 } 2101 2102 link_info->autoneg |= BNXT_AUTONEG_FLOW_CTRL; 2103 if (bp->hwrm_spec_code >= 0x10201) 2104 link_info->req_flow_ctrl = 2105 PORT_PHY_CFG_REQ_AUTO_PAUSE_AUTONEG_PAUSE; 2106 } else { 2107 /* when transition from auto pause to force pause, 2108 * force a link change 2109 */ 2110 if (link_info->autoneg & BNXT_AUTONEG_FLOW_CTRL) 2111 link_info->force_link_chng = true; 2112 link_info->autoneg &= ~BNXT_AUTONEG_FLOW_CTRL; 2113 link_info->req_flow_ctrl = 0; 2114 } 2115 if (epause->rx_pause) 2116 link_info->req_flow_ctrl |= BNXT_LINK_PAUSE_RX; 2117 2118 if (epause->tx_pause) 2119 link_info->req_flow_ctrl |= BNXT_LINK_PAUSE_TX; 2120 2121 if (netif_running(dev)) 2122 rc = bnxt_hwrm_set_pause(bp); 2123 2124 pause_exit: 2125 mutex_unlock(&bp->link_lock); 2126 return rc; 2127 } 2128 2129 static u32 bnxt_get_link(struct net_device *dev) 2130 { 2131 struct bnxt *bp = netdev_priv(dev); 2132 2133 /* TODO: handle MF, VF, driver close case */ 2134 return bp->link_info.link_up; 2135 } 2136 2137 int bnxt_hwrm_nvm_get_dev_info(struct bnxt *bp, 2138 struct hwrm_nvm_get_dev_info_output *nvm_dev_info) 2139 { 2140 struct hwrm_nvm_get_dev_info_output *resp; 2141 struct hwrm_nvm_get_dev_info_input *req; 2142 int rc; 2143 2144 if (BNXT_VF(bp)) 2145 return -EOPNOTSUPP; 2146 2147 rc = hwrm_req_init(bp, req, HWRM_NVM_GET_DEV_INFO); 2148 if (rc) 2149 return rc; 2150 2151 resp = hwrm_req_hold(bp, req); 2152 rc = hwrm_req_send(bp, req); 2153 if (!rc) 2154 memcpy(nvm_dev_info, resp, sizeof(*resp)); 2155 hwrm_req_drop(bp, req); 2156 return rc; 2157 } 2158 2159 static void bnxt_print_admin_err(struct bnxt *bp) 2160 { 2161 netdev_info(bp->dev, "PF does not have admin privileges to flash or reset the device\n"); 2162 } 2163 2164 static int bnxt_find_nvram_item(struct net_device *dev, u16 type, u16 ordinal, 2165 u16 ext, u16 *index, u32 *item_length, 2166 u32 *data_length); 2167 2168 static int bnxt_flash_nvram(struct net_device *dev, u16 dir_type, 2169 u16 dir_ordinal, u16 dir_ext, u16 dir_attr, 2170 u32 dir_item_len, const u8 *data, 2171 size_t data_len) 2172 { 2173 struct bnxt *bp = netdev_priv(dev); 2174 struct hwrm_nvm_write_input *req; 2175 int rc; 2176 2177 rc = hwrm_req_init(bp, req, HWRM_NVM_WRITE); 2178 if (rc) 2179 return rc; 2180 2181 if (data_len && data) { 2182 dma_addr_t dma_handle; 2183 u8 *kmem; 2184 2185 kmem = hwrm_req_dma_slice(bp, req, data_len, &dma_handle); 2186 if (!kmem) { 2187 hwrm_req_drop(bp, req); 2188 return -ENOMEM; 2189 } 2190 2191 req->dir_data_length = cpu_to_le32(data_len); 2192 2193 memcpy(kmem, data, data_len); 2194 req->host_src_addr = cpu_to_le64(dma_handle); 2195 } 2196 2197 hwrm_req_timeout(bp, req, bp->hwrm_cmd_max_timeout); 2198 req->dir_type = cpu_to_le16(dir_type); 2199 req->dir_ordinal = cpu_to_le16(dir_ordinal); 2200 req->dir_ext = cpu_to_le16(dir_ext); 2201 req->dir_attr = cpu_to_le16(dir_attr); 2202 req->dir_item_length = cpu_to_le32(dir_item_len); 2203 rc = hwrm_req_send(bp, req); 2204 2205 if (rc == -EACCES) 2206 bnxt_print_admin_err(bp); 2207 return rc; 2208 } 2209 2210 int bnxt_hwrm_firmware_reset(struct net_device *dev, u8 proc_type, 2211 u8 self_reset, u8 flags) 2212 { 2213 struct bnxt *bp = netdev_priv(dev); 2214 struct hwrm_fw_reset_input *req; 2215 int rc; 2216 2217 if (!bnxt_hwrm_reset_permitted(bp)) { 2218 netdev_warn(bp->dev, "Reset denied by firmware, it may be inhibited by remote driver"); 2219 return -EPERM; 2220 } 2221 2222 rc = hwrm_req_init(bp, req, HWRM_FW_RESET); 2223 if (rc) 2224 return rc; 2225 2226 req->embedded_proc_type = proc_type; 2227 req->selfrst_status = self_reset; 2228 req->flags = flags; 2229 2230 if (proc_type == FW_RESET_REQ_EMBEDDED_PROC_TYPE_AP) { 2231 rc = hwrm_req_send_silent(bp, req); 2232 } else { 2233 rc = hwrm_req_send(bp, req); 2234 if (rc == -EACCES) 2235 bnxt_print_admin_err(bp); 2236 } 2237 return rc; 2238 } 2239 2240 static int bnxt_firmware_reset(struct net_device *dev, 2241 enum bnxt_nvm_directory_type dir_type) 2242 { 2243 u8 self_reset = FW_RESET_REQ_SELFRST_STATUS_SELFRSTNONE; 2244 u8 proc_type, flags = 0; 2245 2246 /* TODO: Address self-reset of APE/KONG/BONO/TANG or ungraceful reset */ 2247 /* (e.g. when firmware isn't already running) */ 2248 switch (dir_type) { 2249 case BNX_DIR_TYPE_CHIMP_PATCH: 2250 case BNX_DIR_TYPE_BOOTCODE: 2251 case BNX_DIR_TYPE_BOOTCODE_2: 2252 proc_type = FW_RESET_REQ_EMBEDDED_PROC_TYPE_BOOT; 2253 /* Self-reset ChiMP upon next PCIe reset: */ 2254 self_reset = FW_RESET_REQ_SELFRST_STATUS_SELFRSTPCIERST; 2255 break; 2256 case BNX_DIR_TYPE_APE_FW: 2257 case BNX_DIR_TYPE_APE_PATCH: 2258 proc_type = FW_RESET_REQ_EMBEDDED_PROC_TYPE_MGMT; 2259 /* Self-reset APE upon next PCIe reset: */ 2260 self_reset = FW_RESET_REQ_SELFRST_STATUS_SELFRSTPCIERST; 2261 break; 2262 case BNX_DIR_TYPE_KONG_FW: 2263 case BNX_DIR_TYPE_KONG_PATCH: 2264 proc_type = FW_RESET_REQ_EMBEDDED_PROC_TYPE_NETCTRL; 2265 break; 2266 case BNX_DIR_TYPE_BONO_FW: 2267 case BNX_DIR_TYPE_BONO_PATCH: 2268 proc_type = FW_RESET_REQ_EMBEDDED_PROC_TYPE_ROCE; 2269 break; 2270 default: 2271 return -EINVAL; 2272 } 2273 2274 return bnxt_hwrm_firmware_reset(dev, proc_type, self_reset, flags); 2275 } 2276 2277 static int bnxt_firmware_reset_chip(struct net_device *dev) 2278 { 2279 struct bnxt *bp = netdev_priv(dev); 2280 u8 flags = 0; 2281 2282 if (bp->fw_cap & BNXT_FW_CAP_HOT_RESET) 2283 flags = FW_RESET_REQ_FLAGS_RESET_GRACEFUL; 2284 2285 return bnxt_hwrm_firmware_reset(dev, 2286 FW_RESET_REQ_EMBEDDED_PROC_TYPE_CHIP, 2287 FW_RESET_REQ_SELFRST_STATUS_SELFRSTASAP, 2288 flags); 2289 } 2290 2291 static int bnxt_firmware_reset_ap(struct net_device *dev) 2292 { 2293 return bnxt_hwrm_firmware_reset(dev, FW_RESET_REQ_EMBEDDED_PROC_TYPE_AP, 2294 FW_RESET_REQ_SELFRST_STATUS_SELFRSTNONE, 2295 0); 2296 } 2297 2298 static int bnxt_flash_firmware(struct net_device *dev, 2299 u16 dir_type, 2300 const u8 *fw_data, 2301 size_t fw_size) 2302 { 2303 int rc = 0; 2304 u16 code_type; 2305 u32 stored_crc; 2306 u32 calculated_crc; 2307 struct bnxt_fw_header *header = (struct bnxt_fw_header *)fw_data; 2308 2309 switch (dir_type) { 2310 case BNX_DIR_TYPE_BOOTCODE: 2311 case BNX_DIR_TYPE_BOOTCODE_2: 2312 code_type = CODE_BOOT; 2313 break; 2314 case BNX_DIR_TYPE_CHIMP_PATCH: 2315 code_type = CODE_CHIMP_PATCH; 2316 break; 2317 case BNX_DIR_TYPE_APE_FW: 2318 code_type = CODE_MCTP_PASSTHRU; 2319 break; 2320 case BNX_DIR_TYPE_APE_PATCH: 2321 code_type = CODE_APE_PATCH; 2322 break; 2323 case BNX_DIR_TYPE_KONG_FW: 2324 code_type = CODE_KONG_FW; 2325 break; 2326 case BNX_DIR_TYPE_KONG_PATCH: 2327 code_type = CODE_KONG_PATCH; 2328 break; 2329 case BNX_DIR_TYPE_BONO_FW: 2330 code_type = CODE_BONO_FW; 2331 break; 2332 case BNX_DIR_TYPE_BONO_PATCH: 2333 code_type = CODE_BONO_PATCH; 2334 break; 2335 default: 2336 netdev_err(dev, "Unsupported directory entry type: %u\n", 2337 dir_type); 2338 return -EINVAL; 2339 } 2340 if (fw_size < sizeof(struct bnxt_fw_header)) { 2341 netdev_err(dev, "Invalid firmware file size: %u\n", 2342 (unsigned int)fw_size); 2343 return -EINVAL; 2344 } 2345 if (header->signature != cpu_to_le32(BNXT_FIRMWARE_BIN_SIGNATURE)) { 2346 netdev_err(dev, "Invalid firmware signature: %08X\n", 2347 le32_to_cpu(header->signature)); 2348 return -EINVAL; 2349 } 2350 if (header->code_type != code_type) { 2351 netdev_err(dev, "Expected firmware type: %d, read: %d\n", 2352 code_type, header->code_type); 2353 return -EINVAL; 2354 } 2355 if (header->device != DEVICE_CUMULUS_FAMILY) { 2356 netdev_err(dev, "Expected firmware device family %d, read: %d\n", 2357 DEVICE_CUMULUS_FAMILY, header->device); 2358 return -EINVAL; 2359 } 2360 /* Confirm the CRC32 checksum of the file: */ 2361 stored_crc = le32_to_cpu(*(__le32 *)(fw_data + fw_size - 2362 sizeof(stored_crc))); 2363 calculated_crc = ~crc32(~0, fw_data, fw_size - sizeof(stored_crc)); 2364 if (calculated_crc != stored_crc) { 2365 netdev_err(dev, "Firmware file CRC32 checksum (%08lX) does not match calculated checksum (%08lX)\n", 2366 (unsigned long)stored_crc, 2367 (unsigned long)calculated_crc); 2368 return -EINVAL; 2369 } 2370 rc = bnxt_flash_nvram(dev, dir_type, BNX_DIR_ORDINAL_FIRST, 2371 0, 0, 0, fw_data, fw_size); 2372 if (rc == 0) /* Firmware update successful */ 2373 rc = bnxt_firmware_reset(dev, dir_type); 2374 2375 return rc; 2376 } 2377 2378 static int bnxt_flash_microcode(struct net_device *dev, 2379 u16 dir_type, 2380 const u8 *fw_data, 2381 size_t fw_size) 2382 { 2383 struct bnxt_ucode_trailer *trailer; 2384 u32 calculated_crc; 2385 u32 stored_crc; 2386 int rc = 0; 2387 2388 if (fw_size < sizeof(struct bnxt_ucode_trailer)) { 2389 netdev_err(dev, "Invalid microcode file size: %u\n", 2390 (unsigned int)fw_size); 2391 return -EINVAL; 2392 } 2393 trailer = (struct bnxt_ucode_trailer *)(fw_data + (fw_size - 2394 sizeof(*trailer))); 2395 if (trailer->sig != cpu_to_le32(BNXT_UCODE_TRAILER_SIGNATURE)) { 2396 netdev_err(dev, "Invalid microcode trailer signature: %08X\n", 2397 le32_to_cpu(trailer->sig)); 2398 return -EINVAL; 2399 } 2400 if (le16_to_cpu(trailer->dir_type) != dir_type) { 2401 netdev_err(dev, "Expected microcode type: %d, read: %d\n", 2402 dir_type, le16_to_cpu(trailer->dir_type)); 2403 return -EINVAL; 2404 } 2405 if (le16_to_cpu(trailer->trailer_length) < 2406 sizeof(struct bnxt_ucode_trailer)) { 2407 netdev_err(dev, "Invalid microcode trailer length: %d\n", 2408 le16_to_cpu(trailer->trailer_length)); 2409 return -EINVAL; 2410 } 2411 2412 /* Confirm the CRC32 checksum of the file: */ 2413 stored_crc = le32_to_cpu(*(__le32 *)(fw_data + fw_size - 2414 sizeof(stored_crc))); 2415 calculated_crc = ~crc32(~0, fw_data, fw_size - sizeof(stored_crc)); 2416 if (calculated_crc != stored_crc) { 2417 netdev_err(dev, 2418 "CRC32 (%08lX) does not match calculated: %08lX\n", 2419 (unsigned long)stored_crc, 2420 (unsigned long)calculated_crc); 2421 return -EINVAL; 2422 } 2423 rc = bnxt_flash_nvram(dev, dir_type, BNX_DIR_ORDINAL_FIRST, 2424 0, 0, 0, fw_data, fw_size); 2425 2426 return rc; 2427 } 2428 2429 static bool bnxt_dir_type_is_ape_bin_format(u16 dir_type) 2430 { 2431 switch (dir_type) { 2432 case BNX_DIR_TYPE_CHIMP_PATCH: 2433 case BNX_DIR_TYPE_BOOTCODE: 2434 case BNX_DIR_TYPE_BOOTCODE_2: 2435 case BNX_DIR_TYPE_APE_FW: 2436 case BNX_DIR_TYPE_APE_PATCH: 2437 case BNX_DIR_TYPE_KONG_FW: 2438 case BNX_DIR_TYPE_KONG_PATCH: 2439 case BNX_DIR_TYPE_BONO_FW: 2440 case BNX_DIR_TYPE_BONO_PATCH: 2441 return true; 2442 } 2443 2444 return false; 2445 } 2446 2447 static bool bnxt_dir_type_is_other_exec_format(u16 dir_type) 2448 { 2449 switch (dir_type) { 2450 case BNX_DIR_TYPE_AVS: 2451 case BNX_DIR_TYPE_EXP_ROM_MBA: 2452 case BNX_DIR_TYPE_PCIE: 2453 case BNX_DIR_TYPE_TSCF_UCODE: 2454 case BNX_DIR_TYPE_EXT_PHY: 2455 case BNX_DIR_TYPE_CCM: 2456 case BNX_DIR_TYPE_ISCSI_BOOT: 2457 case BNX_DIR_TYPE_ISCSI_BOOT_IPV6: 2458 case BNX_DIR_TYPE_ISCSI_BOOT_IPV4N6: 2459 return true; 2460 } 2461 2462 return false; 2463 } 2464 2465 static bool bnxt_dir_type_is_executable(u16 dir_type) 2466 { 2467 return bnxt_dir_type_is_ape_bin_format(dir_type) || 2468 bnxt_dir_type_is_other_exec_format(dir_type); 2469 } 2470 2471 static int bnxt_flash_firmware_from_file(struct net_device *dev, 2472 u16 dir_type, 2473 const char *filename) 2474 { 2475 const struct firmware *fw; 2476 int rc; 2477 2478 rc = request_firmware(&fw, filename, &dev->dev); 2479 if (rc != 0) { 2480 netdev_err(dev, "Error %d requesting firmware file: %s\n", 2481 rc, filename); 2482 return rc; 2483 } 2484 if (bnxt_dir_type_is_ape_bin_format(dir_type)) 2485 rc = bnxt_flash_firmware(dev, dir_type, fw->data, fw->size); 2486 else if (bnxt_dir_type_is_other_exec_format(dir_type)) 2487 rc = bnxt_flash_microcode(dev, dir_type, fw->data, fw->size); 2488 else 2489 rc = bnxt_flash_nvram(dev, dir_type, BNX_DIR_ORDINAL_FIRST, 2490 0, 0, 0, fw->data, fw->size); 2491 release_firmware(fw); 2492 return rc; 2493 } 2494 2495 #define BNXT_PKG_DMA_SIZE 0x40000 2496 #define BNXT_NVM_MORE_FLAG (cpu_to_le16(NVM_MODIFY_REQ_FLAGS_BATCH_MODE)) 2497 #define BNXT_NVM_LAST_FLAG (cpu_to_le16(NVM_MODIFY_REQ_FLAGS_BATCH_LAST)) 2498 2499 int bnxt_flash_package_from_fw_obj(struct net_device *dev, const struct firmware *fw, 2500 u32 install_type) 2501 { 2502 struct hwrm_nvm_install_update_input *install; 2503 struct hwrm_nvm_install_update_output *resp; 2504 struct hwrm_nvm_modify_input *modify; 2505 struct bnxt *bp = netdev_priv(dev); 2506 bool defrag_attempted = false; 2507 dma_addr_t dma_handle; 2508 u8 *kmem = NULL; 2509 u32 modify_len; 2510 u32 item_len; 2511 u16 index; 2512 int rc; 2513 2514 bnxt_hwrm_fw_set_time(bp); 2515 2516 rc = hwrm_req_init(bp, modify, HWRM_NVM_MODIFY); 2517 if (rc) 2518 return rc; 2519 2520 /* Try allocating a large DMA buffer first. Older fw will 2521 * cause excessive NVRAM erases when using small blocks. 2522 */ 2523 modify_len = roundup_pow_of_two(fw->size); 2524 modify_len = min_t(u32, modify_len, BNXT_PKG_DMA_SIZE); 2525 while (1) { 2526 kmem = hwrm_req_dma_slice(bp, modify, modify_len, &dma_handle); 2527 if (!kmem && modify_len > PAGE_SIZE) 2528 modify_len /= 2; 2529 else 2530 break; 2531 } 2532 if (!kmem) { 2533 hwrm_req_drop(bp, modify); 2534 return -ENOMEM; 2535 } 2536 2537 rc = hwrm_req_init(bp, install, HWRM_NVM_INSTALL_UPDATE); 2538 if (rc) { 2539 hwrm_req_drop(bp, modify); 2540 return rc; 2541 } 2542 2543 hwrm_req_timeout(bp, modify, bp->hwrm_cmd_max_timeout); 2544 hwrm_req_timeout(bp, install, bp->hwrm_cmd_max_timeout); 2545 2546 hwrm_req_hold(bp, modify); 2547 modify->host_src_addr = cpu_to_le64(dma_handle); 2548 2549 resp = hwrm_req_hold(bp, install); 2550 if ((install_type & 0xffff) == 0) 2551 install_type >>= 16; 2552 install->install_type = cpu_to_le32(install_type); 2553 2554 do { 2555 u32 copied = 0, len = modify_len; 2556 2557 rc = bnxt_find_nvram_item(dev, BNX_DIR_TYPE_UPDATE, 2558 BNX_DIR_ORDINAL_FIRST, 2559 BNX_DIR_EXT_NONE, 2560 &index, &item_len, NULL); 2561 if (rc) { 2562 netdev_err(dev, "PKG update area not created in nvram\n"); 2563 break; 2564 } 2565 if (fw->size > item_len) { 2566 netdev_err(dev, "PKG insufficient update area in nvram: %lu\n", 2567 (unsigned long)fw->size); 2568 rc = -EFBIG; 2569 break; 2570 } 2571 2572 modify->dir_idx = cpu_to_le16(index); 2573 2574 if (fw->size > modify_len) 2575 modify->flags = BNXT_NVM_MORE_FLAG; 2576 while (copied < fw->size) { 2577 u32 balance = fw->size - copied; 2578 2579 if (balance <= modify_len) { 2580 len = balance; 2581 if (copied) 2582 modify->flags |= BNXT_NVM_LAST_FLAG; 2583 } 2584 memcpy(kmem, fw->data + copied, len); 2585 modify->len = cpu_to_le32(len); 2586 modify->offset = cpu_to_le32(copied); 2587 rc = hwrm_req_send(bp, modify); 2588 if (rc) 2589 goto pkg_abort; 2590 copied += len; 2591 } 2592 2593 rc = hwrm_req_send_silent(bp, install); 2594 2595 if (defrag_attempted) { 2596 /* We have tried to defragment already in the previous 2597 * iteration. Return with the result for INSTALL_UPDATE 2598 */ 2599 break; 2600 } 2601 2602 if (rc && ((struct hwrm_err_output *)resp)->cmd_err == 2603 NVM_INSTALL_UPDATE_CMD_ERR_CODE_FRAG_ERR) { 2604 install->flags = 2605 cpu_to_le16(NVM_INSTALL_UPDATE_REQ_FLAGS_ALLOWED_TO_DEFRAG); 2606 2607 rc = hwrm_req_send_silent(bp, install); 2608 2609 if (rc && ((struct hwrm_err_output *)resp)->cmd_err == 2610 NVM_INSTALL_UPDATE_CMD_ERR_CODE_NO_SPACE) { 2611 /* FW has cleared NVM area, driver will create 2612 * UPDATE directory and try the flash again 2613 */ 2614 defrag_attempted = true; 2615 install->flags = 0; 2616 rc = bnxt_flash_nvram(bp->dev, 2617 BNX_DIR_TYPE_UPDATE, 2618 BNX_DIR_ORDINAL_FIRST, 2619 0, 0, item_len, NULL, 0); 2620 } else if (rc) { 2621 netdev_err(dev, "HWRM_NVM_INSTALL_UPDATE failure rc :%x\n", rc); 2622 } 2623 } else if (rc) { 2624 netdev_err(dev, "HWRM_NVM_INSTALL_UPDATE failure rc :%x\n", rc); 2625 } 2626 } while (defrag_attempted && !rc); 2627 2628 pkg_abort: 2629 hwrm_req_drop(bp, modify); 2630 hwrm_req_drop(bp, install); 2631 2632 if (resp->result) { 2633 netdev_err(dev, "PKG install error = %d, problem_item = %d\n", 2634 (s8)resp->result, (int)resp->problem_item); 2635 rc = -ENOPKG; 2636 } 2637 if (rc == -EACCES) 2638 bnxt_print_admin_err(bp); 2639 return rc; 2640 } 2641 2642 static int bnxt_flash_package_from_file(struct net_device *dev, const char *filename, 2643 u32 install_type) 2644 { 2645 const struct firmware *fw; 2646 int rc; 2647 2648 rc = request_firmware(&fw, filename, &dev->dev); 2649 if (rc != 0) { 2650 netdev_err(dev, "PKG error %d requesting file: %s\n", 2651 rc, filename); 2652 return rc; 2653 } 2654 2655 rc = bnxt_flash_package_from_fw_obj(dev, fw, install_type); 2656 2657 release_firmware(fw); 2658 2659 return rc; 2660 } 2661 2662 static int bnxt_flash_device(struct net_device *dev, 2663 struct ethtool_flash *flash) 2664 { 2665 if (!BNXT_PF((struct bnxt *)netdev_priv(dev))) { 2666 netdev_err(dev, "flashdev not supported from a virtual function\n"); 2667 return -EINVAL; 2668 } 2669 2670 if (flash->region == ETHTOOL_FLASH_ALL_REGIONS || 2671 flash->region > 0xffff) 2672 return bnxt_flash_package_from_file(dev, flash->data, 2673 flash->region); 2674 2675 return bnxt_flash_firmware_from_file(dev, flash->region, flash->data); 2676 } 2677 2678 static int nvm_get_dir_info(struct net_device *dev, u32 *entries, u32 *length) 2679 { 2680 struct hwrm_nvm_get_dir_info_output *output; 2681 struct hwrm_nvm_get_dir_info_input *req; 2682 struct bnxt *bp = netdev_priv(dev); 2683 int rc; 2684 2685 rc = hwrm_req_init(bp, req, HWRM_NVM_GET_DIR_INFO); 2686 if (rc) 2687 return rc; 2688 2689 output = hwrm_req_hold(bp, req); 2690 rc = hwrm_req_send(bp, req); 2691 if (!rc) { 2692 *entries = le32_to_cpu(output->entries); 2693 *length = le32_to_cpu(output->entry_length); 2694 } 2695 hwrm_req_drop(bp, req); 2696 return rc; 2697 } 2698 2699 static int bnxt_get_eeprom_len(struct net_device *dev) 2700 { 2701 struct bnxt *bp = netdev_priv(dev); 2702 2703 if (BNXT_VF(bp)) 2704 return 0; 2705 2706 /* The -1 return value allows the entire 32-bit range of offsets to be 2707 * passed via the ethtool command-line utility. 2708 */ 2709 return -1; 2710 } 2711 2712 static int bnxt_get_nvram_directory(struct net_device *dev, u32 len, u8 *data) 2713 { 2714 struct bnxt *bp = netdev_priv(dev); 2715 int rc; 2716 u32 dir_entries; 2717 u32 entry_length; 2718 u8 *buf; 2719 size_t buflen; 2720 dma_addr_t dma_handle; 2721 struct hwrm_nvm_get_dir_entries_input *req; 2722 2723 rc = nvm_get_dir_info(dev, &dir_entries, &entry_length); 2724 if (rc != 0) 2725 return rc; 2726 2727 if (!dir_entries || !entry_length) 2728 return -EIO; 2729 2730 /* Insert 2 bytes of directory info (count and size of entries) */ 2731 if (len < 2) 2732 return -EINVAL; 2733 2734 *data++ = dir_entries; 2735 *data++ = entry_length; 2736 len -= 2; 2737 memset(data, 0xff, len); 2738 2739 rc = hwrm_req_init(bp, req, HWRM_NVM_GET_DIR_ENTRIES); 2740 if (rc) 2741 return rc; 2742 2743 buflen = dir_entries * entry_length; 2744 buf = hwrm_req_dma_slice(bp, req, buflen, &dma_handle); 2745 if (!buf) { 2746 hwrm_req_drop(bp, req); 2747 return -ENOMEM; 2748 } 2749 req->host_dest_addr = cpu_to_le64(dma_handle); 2750 2751 hwrm_req_hold(bp, req); /* hold the slice */ 2752 rc = hwrm_req_send(bp, req); 2753 if (rc == 0) 2754 memcpy(data, buf, len > buflen ? buflen : len); 2755 hwrm_req_drop(bp, req); 2756 return rc; 2757 } 2758 2759 static int bnxt_get_nvram_item(struct net_device *dev, u32 index, u32 offset, 2760 u32 length, u8 *data) 2761 { 2762 struct bnxt *bp = netdev_priv(dev); 2763 int rc; 2764 u8 *buf; 2765 dma_addr_t dma_handle; 2766 struct hwrm_nvm_read_input *req; 2767 2768 if (!length) 2769 return -EINVAL; 2770 2771 rc = hwrm_req_init(bp, req, HWRM_NVM_READ); 2772 if (rc) 2773 return rc; 2774 2775 buf = hwrm_req_dma_slice(bp, req, length, &dma_handle); 2776 if (!buf) { 2777 hwrm_req_drop(bp, req); 2778 return -ENOMEM; 2779 } 2780 2781 req->host_dest_addr = cpu_to_le64(dma_handle); 2782 req->dir_idx = cpu_to_le16(index); 2783 req->offset = cpu_to_le32(offset); 2784 req->len = cpu_to_le32(length); 2785 2786 hwrm_req_hold(bp, req); /* hold the slice */ 2787 rc = hwrm_req_send(bp, req); 2788 if (rc == 0) 2789 memcpy(data, buf, length); 2790 hwrm_req_drop(bp, req); 2791 return rc; 2792 } 2793 2794 static int bnxt_find_nvram_item(struct net_device *dev, u16 type, u16 ordinal, 2795 u16 ext, u16 *index, u32 *item_length, 2796 u32 *data_length) 2797 { 2798 struct hwrm_nvm_find_dir_entry_output *output; 2799 struct hwrm_nvm_find_dir_entry_input *req; 2800 struct bnxt *bp = netdev_priv(dev); 2801 int rc; 2802 2803 rc = hwrm_req_init(bp, req, HWRM_NVM_FIND_DIR_ENTRY); 2804 if (rc) 2805 return rc; 2806 2807 req->enables = 0; 2808 req->dir_idx = 0; 2809 req->dir_type = cpu_to_le16(type); 2810 req->dir_ordinal = cpu_to_le16(ordinal); 2811 req->dir_ext = cpu_to_le16(ext); 2812 req->opt_ordinal = NVM_FIND_DIR_ENTRY_REQ_OPT_ORDINAL_EQ; 2813 output = hwrm_req_hold(bp, req); 2814 rc = hwrm_req_send_silent(bp, req); 2815 if (rc == 0) { 2816 if (index) 2817 *index = le16_to_cpu(output->dir_idx); 2818 if (item_length) 2819 *item_length = le32_to_cpu(output->dir_item_length); 2820 if (data_length) 2821 *data_length = le32_to_cpu(output->dir_data_length); 2822 } 2823 hwrm_req_drop(bp, req); 2824 return rc; 2825 } 2826 2827 static char *bnxt_parse_pkglog(int desired_field, u8 *data, size_t datalen) 2828 { 2829 char *retval = NULL; 2830 char *p; 2831 char *value; 2832 int field = 0; 2833 2834 if (datalen < 1) 2835 return NULL; 2836 /* null-terminate the log data (removing last '\n'): */ 2837 data[datalen - 1] = 0; 2838 for (p = data; *p != 0; p++) { 2839 field = 0; 2840 retval = NULL; 2841 while (*p != 0 && *p != '\n') { 2842 value = p; 2843 while (*p != 0 && *p != '\t' && *p != '\n') 2844 p++; 2845 if (field == desired_field) 2846 retval = value; 2847 if (*p != '\t') 2848 break; 2849 *p = 0; 2850 field++; 2851 p++; 2852 } 2853 if (*p == 0) 2854 break; 2855 *p = 0; 2856 } 2857 return retval; 2858 } 2859 2860 int bnxt_get_pkginfo(struct net_device *dev, char *ver, int size) 2861 { 2862 struct bnxt *bp = netdev_priv(dev); 2863 u16 index = 0; 2864 char *pkgver; 2865 u32 pkglen; 2866 u8 *pkgbuf; 2867 int rc; 2868 2869 rc = bnxt_find_nvram_item(dev, BNX_DIR_TYPE_PKG_LOG, 2870 BNX_DIR_ORDINAL_FIRST, BNX_DIR_EXT_NONE, 2871 &index, NULL, &pkglen); 2872 if (rc) 2873 return rc; 2874 2875 pkgbuf = kzalloc(pkglen, GFP_KERNEL); 2876 if (!pkgbuf) { 2877 dev_err(&bp->pdev->dev, "Unable to allocate memory for pkg version, length = %u\n", 2878 pkglen); 2879 return -ENOMEM; 2880 } 2881 2882 rc = bnxt_get_nvram_item(dev, index, 0, pkglen, pkgbuf); 2883 if (rc) 2884 goto err; 2885 2886 pkgver = bnxt_parse_pkglog(BNX_PKG_LOG_FIELD_IDX_PKG_VERSION, pkgbuf, 2887 pkglen); 2888 if (pkgver && *pkgver != 0 && isdigit(*pkgver)) 2889 strscpy(ver, pkgver, size); 2890 else 2891 rc = -ENOENT; 2892 2893 err: 2894 kfree(pkgbuf); 2895 2896 return rc; 2897 } 2898 2899 static void bnxt_get_pkgver(struct net_device *dev) 2900 { 2901 struct bnxt *bp = netdev_priv(dev); 2902 char buf[FW_VER_STR_LEN]; 2903 int len; 2904 2905 if (!bnxt_get_pkginfo(dev, buf, sizeof(buf))) { 2906 len = strlen(bp->fw_ver_str); 2907 snprintf(bp->fw_ver_str + len, FW_VER_STR_LEN - len - 1, 2908 "/pkg %s", buf); 2909 } 2910 } 2911 2912 static int bnxt_get_eeprom(struct net_device *dev, 2913 struct ethtool_eeprom *eeprom, 2914 u8 *data) 2915 { 2916 u32 index; 2917 u32 offset; 2918 2919 if (eeprom->offset == 0) /* special offset value to get directory */ 2920 return bnxt_get_nvram_directory(dev, eeprom->len, data); 2921 2922 index = eeprom->offset >> 24; 2923 offset = eeprom->offset & 0xffffff; 2924 2925 if (index == 0) { 2926 netdev_err(dev, "unsupported index value: %d\n", index); 2927 return -EINVAL; 2928 } 2929 2930 return bnxt_get_nvram_item(dev, index - 1, offset, eeprom->len, data); 2931 } 2932 2933 static int bnxt_erase_nvram_directory(struct net_device *dev, u8 index) 2934 { 2935 struct hwrm_nvm_erase_dir_entry_input *req; 2936 struct bnxt *bp = netdev_priv(dev); 2937 int rc; 2938 2939 rc = hwrm_req_init(bp, req, HWRM_NVM_ERASE_DIR_ENTRY); 2940 if (rc) 2941 return rc; 2942 2943 req->dir_idx = cpu_to_le16(index); 2944 return hwrm_req_send(bp, req); 2945 } 2946 2947 static int bnxt_set_eeprom(struct net_device *dev, 2948 struct ethtool_eeprom *eeprom, 2949 u8 *data) 2950 { 2951 struct bnxt *bp = netdev_priv(dev); 2952 u8 index, dir_op; 2953 u16 type, ext, ordinal, attr; 2954 2955 if (!BNXT_PF(bp)) { 2956 netdev_err(dev, "NVM write not supported from a virtual function\n"); 2957 return -EINVAL; 2958 } 2959 2960 type = eeprom->magic >> 16; 2961 2962 if (type == 0xffff) { /* special value for directory operations */ 2963 index = eeprom->magic & 0xff; 2964 dir_op = eeprom->magic >> 8; 2965 if (index == 0) 2966 return -EINVAL; 2967 switch (dir_op) { 2968 case 0x0e: /* erase */ 2969 if (eeprom->offset != ~eeprom->magic) 2970 return -EINVAL; 2971 return bnxt_erase_nvram_directory(dev, index - 1); 2972 default: 2973 return -EINVAL; 2974 } 2975 } 2976 2977 /* Create or re-write an NVM item: */ 2978 if (bnxt_dir_type_is_executable(type)) 2979 return -EOPNOTSUPP; 2980 ext = eeprom->magic & 0xffff; 2981 ordinal = eeprom->offset >> 16; 2982 attr = eeprom->offset & 0xffff; 2983 2984 return bnxt_flash_nvram(dev, type, ordinal, ext, attr, 0, data, 2985 eeprom->len); 2986 } 2987 2988 static int bnxt_set_eee(struct net_device *dev, struct ethtool_eee *edata) 2989 { 2990 struct bnxt *bp = netdev_priv(dev); 2991 struct ethtool_eee *eee = &bp->eee; 2992 struct bnxt_link_info *link_info = &bp->link_info; 2993 u32 advertising; 2994 int rc = 0; 2995 2996 if (!BNXT_PHY_CFG_ABLE(bp)) 2997 return -EOPNOTSUPP; 2998 2999 if (!(bp->phy_flags & BNXT_PHY_FL_EEE_CAP)) 3000 return -EOPNOTSUPP; 3001 3002 mutex_lock(&bp->link_lock); 3003 advertising = _bnxt_fw_to_ethtool_adv_spds(link_info->advertising, 0); 3004 if (!edata->eee_enabled) 3005 goto eee_ok; 3006 3007 if (!(link_info->autoneg & BNXT_AUTONEG_SPEED)) { 3008 netdev_warn(dev, "EEE requires autoneg\n"); 3009 rc = -EINVAL; 3010 goto eee_exit; 3011 } 3012 if (edata->tx_lpi_enabled) { 3013 if (bp->lpi_tmr_hi && (edata->tx_lpi_timer > bp->lpi_tmr_hi || 3014 edata->tx_lpi_timer < bp->lpi_tmr_lo)) { 3015 netdev_warn(dev, "Valid LPI timer range is %d and %d microsecs\n", 3016 bp->lpi_tmr_lo, bp->lpi_tmr_hi); 3017 rc = -EINVAL; 3018 goto eee_exit; 3019 } else if (!bp->lpi_tmr_hi) { 3020 edata->tx_lpi_timer = eee->tx_lpi_timer; 3021 } 3022 } 3023 if (!edata->advertised) { 3024 edata->advertised = advertising & eee->supported; 3025 } else if (edata->advertised & ~advertising) { 3026 netdev_warn(dev, "EEE advertised %x must be a subset of autoneg advertised speeds %x\n", 3027 edata->advertised, advertising); 3028 rc = -EINVAL; 3029 goto eee_exit; 3030 } 3031 3032 eee->advertised = edata->advertised; 3033 eee->tx_lpi_enabled = edata->tx_lpi_enabled; 3034 eee->tx_lpi_timer = edata->tx_lpi_timer; 3035 eee_ok: 3036 eee->eee_enabled = edata->eee_enabled; 3037 3038 if (netif_running(dev)) 3039 rc = bnxt_hwrm_set_link_setting(bp, false, true); 3040 3041 eee_exit: 3042 mutex_unlock(&bp->link_lock); 3043 return rc; 3044 } 3045 3046 static int bnxt_get_eee(struct net_device *dev, struct ethtool_eee *edata) 3047 { 3048 struct bnxt *bp = netdev_priv(dev); 3049 3050 if (!(bp->phy_flags & BNXT_PHY_FL_EEE_CAP)) 3051 return -EOPNOTSUPP; 3052 3053 *edata = bp->eee; 3054 if (!bp->eee.eee_enabled) { 3055 /* Preserve tx_lpi_timer so that the last value will be used 3056 * by default when it is re-enabled. 3057 */ 3058 edata->advertised = 0; 3059 edata->tx_lpi_enabled = 0; 3060 } 3061 3062 if (!bp->eee.eee_active) 3063 edata->lp_advertised = 0; 3064 3065 return 0; 3066 } 3067 3068 static int bnxt_read_sfp_module_eeprom_info(struct bnxt *bp, u16 i2c_addr, 3069 u16 page_number, u16 start_addr, 3070 u16 data_length, u8 *buf) 3071 { 3072 struct hwrm_port_phy_i2c_read_output *output; 3073 struct hwrm_port_phy_i2c_read_input *req; 3074 int rc, byte_offset = 0; 3075 3076 rc = hwrm_req_init(bp, req, HWRM_PORT_PHY_I2C_READ); 3077 if (rc) 3078 return rc; 3079 3080 output = hwrm_req_hold(bp, req); 3081 req->i2c_slave_addr = i2c_addr; 3082 req->page_number = cpu_to_le16(page_number); 3083 req->port_id = cpu_to_le16(bp->pf.port_id); 3084 do { 3085 u16 xfer_size; 3086 3087 xfer_size = min_t(u16, data_length, BNXT_MAX_PHY_I2C_RESP_SIZE); 3088 data_length -= xfer_size; 3089 req->page_offset = cpu_to_le16(start_addr + byte_offset); 3090 req->data_length = xfer_size; 3091 req->enables = cpu_to_le32(start_addr + byte_offset ? 3092 PORT_PHY_I2C_READ_REQ_ENABLES_PAGE_OFFSET : 0); 3093 rc = hwrm_req_send(bp, req); 3094 if (!rc) 3095 memcpy(buf + byte_offset, output->data, xfer_size); 3096 byte_offset += xfer_size; 3097 } while (!rc && data_length > 0); 3098 hwrm_req_drop(bp, req); 3099 3100 return rc; 3101 } 3102 3103 static int bnxt_get_module_info(struct net_device *dev, 3104 struct ethtool_modinfo *modinfo) 3105 { 3106 u8 data[SFF_DIAG_SUPPORT_OFFSET + 1]; 3107 struct bnxt *bp = netdev_priv(dev); 3108 int rc; 3109 3110 /* No point in going further if phy status indicates 3111 * module is not inserted or if it is powered down or 3112 * if it is of type 10GBase-T 3113 */ 3114 if (bp->link_info.module_status > 3115 PORT_PHY_QCFG_RESP_MODULE_STATUS_WARNINGMSG) 3116 return -EOPNOTSUPP; 3117 3118 /* This feature is not supported in older firmware versions */ 3119 if (bp->hwrm_spec_code < 0x10202) 3120 return -EOPNOTSUPP; 3121 3122 rc = bnxt_read_sfp_module_eeprom_info(bp, I2C_DEV_ADDR_A0, 0, 0, 3123 SFF_DIAG_SUPPORT_OFFSET + 1, 3124 data); 3125 if (!rc) { 3126 u8 module_id = data[0]; 3127 u8 diag_supported = data[SFF_DIAG_SUPPORT_OFFSET]; 3128 3129 switch (module_id) { 3130 case SFF_MODULE_ID_SFP: 3131 modinfo->type = ETH_MODULE_SFF_8472; 3132 modinfo->eeprom_len = ETH_MODULE_SFF_8472_LEN; 3133 if (!diag_supported) 3134 modinfo->eeprom_len = ETH_MODULE_SFF_8436_LEN; 3135 break; 3136 case SFF_MODULE_ID_QSFP: 3137 case SFF_MODULE_ID_QSFP_PLUS: 3138 modinfo->type = ETH_MODULE_SFF_8436; 3139 modinfo->eeprom_len = ETH_MODULE_SFF_8436_LEN; 3140 break; 3141 case SFF_MODULE_ID_QSFP28: 3142 modinfo->type = ETH_MODULE_SFF_8636; 3143 modinfo->eeprom_len = ETH_MODULE_SFF_8636_LEN; 3144 break; 3145 default: 3146 rc = -EOPNOTSUPP; 3147 break; 3148 } 3149 } 3150 return rc; 3151 } 3152 3153 static int bnxt_get_module_eeprom(struct net_device *dev, 3154 struct ethtool_eeprom *eeprom, 3155 u8 *data) 3156 { 3157 struct bnxt *bp = netdev_priv(dev); 3158 u16 start = eeprom->offset, length = eeprom->len; 3159 int rc = 0; 3160 3161 memset(data, 0, eeprom->len); 3162 3163 /* Read A0 portion of the EEPROM */ 3164 if (start < ETH_MODULE_SFF_8436_LEN) { 3165 if (start + eeprom->len > ETH_MODULE_SFF_8436_LEN) 3166 length = ETH_MODULE_SFF_8436_LEN - start; 3167 rc = bnxt_read_sfp_module_eeprom_info(bp, I2C_DEV_ADDR_A0, 0, 3168 start, length, data); 3169 if (rc) 3170 return rc; 3171 start += length; 3172 data += length; 3173 length = eeprom->len - length; 3174 } 3175 3176 /* Read A2 portion of the EEPROM */ 3177 if (length) { 3178 start -= ETH_MODULE_SFF_8436_LEN; 3179 rc = bnxt_read_sfp_module_eeprom_info(bp, I2C_DEV_ADDR_A2, 0, 3180 start, length, data); 3181 } 3182 return rc; 3183 } 3184 3185 static int bnxt_nway_reset(struct net_device *dev) 3186 { 3187 int rc = 0; 3188 3189 struct bnxt *bp = netdev_priv(dev); 3190 struct bnxt_link_info *link_info = &bp->link_info; 3191 3192 if (!BNXT_PHY_CFG_ABLE(bp)) 3193 return -EOPNOTSUPP; 3194 3195 if (!(link_info->autoneg & BNXT_AUTONEG_SPEED)) 3196 return -EINVAL; 3197 3198 if (netif_running(dev)) 3199 rc = bnxt_hwrm_set_link_setting(bp, true, false); 3200 3201 return rc; 3202 } 3203 3204 static int bnxt_set_phys_id(struct net_device *dev, 3205 enum ethtool_phys_id_state state) 3206 { 3207 struct hwrm_port_led_cfg_input *req; 3208 struct bnxt *bp = netdev_priv(dev); 3209 struct bnxt_pf_info *pf = &bp->pf; 3210 struct bnxt_led_cfg *led_cfg; 3211 u8 led_state; 3212 __le16 duration; 3213 int rc, i; 3214 3215 if (!bp->num_leds || BNXT_VF(bp)) 3216 return -EOPNOTSUPP; 3217 3218 if (state == ETHTOOL_ID_ACTIVE) { 3219 led_state = PORT_LED_CFG_REQ_LED0_STATE_BLINKALT; 3220 duration = cpu_to_le16(500); 3221 } else if (state == ETHTOOL_ID_INACTIVE) { 3222 led_state = PORT_LED_CFG_REQ_LED1_STATE_DEFAULT; 3223 duration = cpu_to_le16(0); 3224 } else { 3225 return -EINVAL; 3226 } 3227 rc = hwrm_req_init(bp, req, HWRM_PORT_LED_CFG); 3228 if (rc) 3229 return rc; 3230 3231 req->port_id = cpu_to_le16(pf->port_id); 3232 req->num_leds = bp->num_leds; 3233 led_cfg = (struct bnxt_led_cfg *)&req->led0_id; 3234 for (i = 0; i < bp->num_leds; i++, led_cfg++) { 3235 req->enables |= BNXT_LED_DFLT_ENABLES(i); 3236 led_cfg->led_id = bp->leds[i].led_id; 3237 led_cfg->led_state = led_state; 3238 led_cfg->led_blink_on = duration; 3239 led_cfg->led_blink_off = duration; 3240 led_cfg->led_group_id = bp->leds[i].led_group_id; 3241 } 3242 return hwrm_req_send(bp, req); 3243 } 3244 3245 static int bnxt_hwrm_selftest_irq(struct bnxt *bp, u16 cmpl_ring) 3246 { 3247 struct hwrm_selftest_irq_input *req; 3248 int rc; 3249 3250 rc = hwrm_req_init(bp, req, HWRM_SELFTEST_IRQ); 3251 if (rc) 3252 return rc; 3253 3254 req->cmpl_ring = cpu_to_le16(cmpl_ring); 3255 return hwrm_req_send(bp, req); 3256 } 3257 3258 static int bnxt_test_irq(struct bnxt *bp) 3259 { 3260 int i; 3261 3262 for (i = 0; i < bp->cp_nr_rings; i++) { 3263 u16 cmpl_ring = bp->grp_info[i].cp_fw_ring_id; 3264 int rc; 3265 3266 rc = bnxt_hwrm_selftest_irq(bp, cmpl_ring); 3267 if (rc) 3268 return rc; 3269 } 3270 return 0; 3271 } 3272 3273 static int bnxt_hwrm_mac_loopback(struct bnxt *bp, bool enable) 3274 { 3275 struct hwrm_port_mac_cfg_input *req; 3276 int rc; 3277 3278 rc = hwrm_req_init(bp, req, HWRM_PORT_MAC_CFG); 3279 if (rc) 3280 return rc; 3281 3282 req->enables = cpu_to_le32(PORT_MAC_CFG_REQ_ENABLES_LPBK); 3283 if (enable) 3284 req->lpbk = PORT_MAC_CFG_REQ_LPBK_LOCAL; 3285 else 3286 req->lpbk = PORT_MAC_CFG_REQ_LPBK_NONE; 3287 return hwrm_req_send(bp, req); 3288 } 3289 3290 static int bnxt_query_force_speeds(struct bnxt *bp, u16 *force_speeds) 3291 { 3292 struct hwrm_port_phy_qcaps_output *resp; 3293 struct hwrm_port_phy_qcaps_input *req; 3294 int rc; 3295 3296 rc = hwrm_req_init(bp, req, HWRM_PORT_PHY_QCAPS); 3297 if (rc) 3298 return rc; 3299 3300 resp = hwrm_req_hold(bp, req); 3301 rc = hwrm_req_send(bp, req); 3302 if (!rc) 3303 *force_speeds = le16_to_cpu(resp->supported_speeds_force_mode); 3304 3305 hwrm_req_drop(bp, req); 3306 return rc; 3307 } 3308 3309 static int bnxt_disable_an_for_lpbk(struct bnxt *bp, 3310 struct hwrm_port_phy_cfg_input *req) 3311 { 3312 struct bnxt_link_info *link_info = &bp->link_info; 3313 u16 fw_advertising; 3314 u16 fw_speed; 3315 int rc; 3316 3317 if (!link_info->autoneg || 3318 (bp->phy_flags & BNXT_PHY_FL_AN_PHY_LPBK)) 3319 return 0; 3320 3321 rc = bnxt_query_force_speeds(bp, &fw_advertising); 3322 if (rc) 3323 return rc; 3324 3325 fw_speed = PORT_PHY_CFG_REQ_FORCE_LINK_SPEED_1GB; 3326 if (bp->link_info.link_up) 3327 fw_speed = bp->link_info.link_speed; 3328 else if (fw_advertising & BNXT_LINK_SPEED_MSK_10GB) 3329 fw_speed = PORT_PHY_CFG_REQ_FORCE_LINK_SPEED_10GB; 3330 else if (fw_advertising & BNXT_LINK_SPEED_MSK_25GB) 3331 fw_speed = PORT_PHY_CFG_REQ_FORCE_LINK_SPEED_25GB; 3332 else if (fw_advertising & BNXT_LINK_SPEED_MSK_40GB) 3333 fw_speed = PORT_PHY_CFG_REQ_FORCE_LINK_SPEED_40GB; 3334 else if (fw_advertising & BNXT_LINK_SPEED_MSK_50GB) 3335 fw_speed = PORT_PHY_CFG_REQ_FORCE_LINK_SPEED_50GB; 3336 3337 req->force_link_speed = cpu_to_le16(fw_speed); 3338 req->flags |= cpu_to_le32(PORT_PHY_CFG_REQ_FLAGS_FORCE | 3339 PORT_PHY_CFG_REQ_FLAGS_RESET_PHY); 3340 rc = hwrm_req_send(bp, req); 3341 req->flags = 0; 3342 req->force_link_speed = cpu_to_le16(0); 3343 return rc; 3344 } 3345 3346 static int bnxt_hwrm_phy_loopback(struct bnxt *bp, bool enable, bool ext) 3347 { 3348 struct hwrm_port_phy_cfg_input *req; 3349 int rc; 3350 3351 rc = hwrm_req_init(bp, req, HWRM_PORT_PHY_CFG); 3352 if (rc) 3353 return rc; 3354 3355 /* prevent bnxt_disable_an_for_lpbk() from consuming the request */ 3356 hwrm_req_hold(bp, req); 3357 3358 if (enable) { 3359 bnxt_disable_an_for_lpbk(bp, req); 3360 if (ext) 3361 req->lpbk = PORT_PHY_CFG_REQ_LPBK_EXTERNAL; 3362 else 3363 req->lpbk = PORT_PHY_CFG_REQ_LPBK_LOCAL; 3364 } else { 3365 req->lpbk = PORT_PHY_CFG_REQ_LPBK_NONE; 3366 } 3367 req->enables = cpu_to_le32(PORT_PHY_CFG_REQ_ENABLES_LPBK); 3368 rc = hwrm_req_send(bp, req); 3369 hwrm_req_drop(bp, req); 3370 return rc; 3371 } 3372 3373 static int bnxt_rx_loopback(struct bnxt *bp, struct bnxt_cp_ring_info *cpr, 3374 u32 raw_cons, int pkt_size) 3375 { 3376 struct bnxt_napi *bnapi = cpr->bnapi; 3377 struct bnxt_rx_ring_info *rxr; 3378 struct bnxt_sw_rx_bd *rx_buf; 3379 struct rx_cmp *rxcmp; 3380 u16 cp_cons, cons; 3381 u8 *data; 3382 u32 len; 3383 int i; 3384 3385 rxr = bnapi->rx_ring; 3386 cp_cons = RING_CMP(raw_cons); 3387 rxcmp = (struct rx_cmp *) 3388 &cpr->cp_desc_ring[CP_RING(cp_cons)][CP_IDX(cp_cons)]; 3389 cons = rxcmp->rx_cmp_opaque; 3390 rx_buf = &rxr->rx_buf_ring[cons]; 3391 data = rx_buf->data_ptr; 3392 len = le32_to_cpu(rxcmp->rx_cmp_len_flags_type) >> RX_CMP_LEN_SHIFT; 3393 if (len != pkt_size) 3394 return -EIO; 3395 i = ETH_ALEN; 3396 if (!ether_addr_equal(data + i, bnapi->bp->dev->dev_addr)) 3397 return -EIO; 3398 i += ETH_ALEN; 3399 for ( ; i < pkt_size; i++) { 3400 if (data[i] != (u8)(i & 0xff)) 3401 return -EIO; 3402 } 3403 return 0; 3404 } 3405 3406 static int bnxt_poll_loopback(struct bnxt *bp, struct bnxt_cp_ring_info *cpr, 3407 int pkt_size) 3408 { 3409 struct tx_cmp *txcmp; 3410 int rc = -EIO; 3411 u32 raw_cons; 3412 u32 cons; 3413 int i; 3414 3415 raw_cons = cpr->cp_raw_cons; 3416 for (i = 0; i < 200; i++) { 3417 cons = RING_CMP(raw_cons); 3418 txcmp = &cpr->cp_desc_ring[CP_RING(cons)][CP_IDX(cons)]; 3419 3420 if (!TX_CMP_VALID(txcmp, raw_cons)) { 3421 udelay(5); 3422 continue; 3423 } 3424 3425 /* The valid test of the entry must be done first before 3426 * reading any further. 3427 */ 3428 dma_rmb(); 3429 if (TX_CMP_TYPE(txcmp) == CMP_TYPE_RX_L2_CMP) { 3430 rc = bnxt_rx_loopback(bp, cpr, raw_cons, pkt_size); 3431 raw_cons = NEXT_RAW_CMP(raw_cons); 3432 raw_cons = NEXT_RAW_CMP(raw_cons); 3433 break; 3434 } 3435 raw_cons = NEXT_RAW_CMP(raw_cons); 3436 } 3437 cpr->cp_raw_cons = raw_cons; 3438 return rc; 3439 } 3440 3441 static int bnxt_run_loopback(struct bnxt *bp) 3442 { 3443 struct bnxt_tx_ring_info *txr = &bp->tx_ring[0]; 3444 struct bnxt_rx_ring_info *rxr = &bp->rx_ring[0]; 3445 struct bnxt_cp_ring_info *cpr; 3446 int pkt_size, i = 0; 3447 struct sk_buff *skb; 3448 dma_addr_t map; 3449 u8 *data; 3450 int rc; 3451 3452 cpr = &rxr->bnapi->cp_ring; 3453 if (bp->flags & BNXT_FLAG_CHIP_P5) 3454 cpr = cpr->cp_ring_arr[BNXT_RX_HDL]; 3455 pkt_size = min(bp->dev->mtu + ETH_HLEN, bp->rx_copy_thresh); 3456 skb = netdev_alloc_skb(bp->dev, pkt_size); 3457 if (!skb) 3458 return -ENOMEM; 3459 data = skb_put(skb, pkt_size); 3460 eth_broadcast_addr(data); 3461 i += ETH_ALEN; 3462 ether_addr_copy(&data[i], bp->dev->dev_addr); 3463 i += ETH_ALEN; 3464 for ( ; i < pkt_size; i++) 3465 data[i] = (u8)(i & 0xff); 3466 3467 map = dma_map_single(&bp->pdev->dev, skb->data, pkt_size, 3468 DMA_TO_DEVICE); 3469 if (dma_mapping_error(&bp->pdev->dev, map)) { 3470 dev_kfree_skb(skb); 3471 return -EIO; 3472 } 3473 bnxt_xmit_bd(bp, txr, map, pkt_size); 3474 3475 /* Sync BD data before updating doorbell */ 3476 wmb(); 3477 3478 bnxt_db_write(bp, &txr->tx_db, txr->tx_prod); 3479 rc = bnxt_poll_loopback(bp, cpr, pkt_size); 3480 3481 dma_unmap_single(&bp->pdev->dev, map, pkt_size, DMA_TO_DEVICE); 3482 dev_kfree_skb(skb); 3483 return rc; 3484 } 3485 3486 static int bnxt_run_fw_tests(struct bnxt *bp, u8 test_mask, u8 *test_results) 3487 { 3488 struct hwrm_selftest_exec_output *resp; 3489 struct hwrm_selftest_exec_input *req; 3490 int rc; 3491 3492 rc = hwrm_req_init(bp, req, HWRM_SELFTEST_EXEC); 3493 if (rc) 3494 return rc; 3495 3496 hwrm_req_timeout(bp, req, bp->test_info->timeout); 3497 req->flags = test_mask; 3498 3499 resp = hwrm_req_hold(bp, req); 3500 rc = hwrm_req_send(bp, req); 3501 *test_results = resp->test_success; 3502 hwrm_req_drop(bp, req); 3503 return rc; 3504 } 3505 3506 #define BNXT_DRV_TESTS 4 3507 #define BNXT_MACLPBK_TEST_IDX (bp->num_tests - BNXT_DRV_TESTS) 3508 #define BNXT_PHYLPBK_TEST_IDX (BNXT_MACLPBK_TEST_IDX + 1) 3509 #define BNXT_EXTLPBK_TEST_IDX (BNXT_MACLPBK_TEST_IDX + 2) 3510 #define BNXT_IRQ_TEST_IDX (BNXT_MACLPBK_TEST_IDX + 3) 3511 3512 static void bnxt_self_test(struct net_device *dev, struct ethtool_test *etest, 3513 u64 *buf) 3514 { 3515 struct bnxt *bp = netdev_priv(dev); 3516 bool do_ext_lpbk = false; 3517 bool offline = false; 3518 u8 test_results = 0; 3519 u8 test_mask = 0; 3520 int rc = 0, i; 3521 3522 if (!bp->num_tests || !BNXT_PF(bp)) 3523 return; 3524 memset(buf, 0, sizeof(u64) * bp->num_tests); 3525 if (!netif_running(dev)) { 3526 etest->flags |= ETH_TEST_FL_FAILED; 3527 return; 3528 } 3529 3530 if ((etest->flags & ETH_TEST_FL_EXTERNAL_LB) && 3531 (bp->phy_flags & BNXT_PHY_FL_EXT_LPBK)) 3532 do_ext_lpbk = true; 3533 3534 if (etest->flags & ETH_TEST_FL_OFFLINE) { 3535 if (bp->pf.active_vfs || !BNXT_SINGLE_PF(bp)) { 3536 etest->flags |= ETH_TEST_FL_FAILED; 3537 netdev_warn(dev, "Offline tests cannot be run with active VFs or on shared PF\n"); 3538 return; 3539 } 3540 offline = true; 3541 } 3542 3543 for (i = 0; i < bp->num_tests - BNXT_DRV_TESTS; i++) { 3544 u8 bit_val = 1 << i; 3545 3546 if (!(bp->test_info->offline_mask & bit_val)) 3547 test_mask |= bit_val; 3548 else if (offline) 3549 test_mask |= bit_val; 3550 } 3551 if (!offline) { 3552 bnxt_run_fw_tests(bp, test_mask, &test_results); 3553 } else { 3554 rc = bnxt_close_nic(bp, false, false); 3555 if (rc) 3556 return; 3557 bnxt_run_fw_tests(bp, test_mask, &test_results); 3558 3559 buf[BNXT_MACLPBK_TEST_IDX] = 1; 3560 bnxt_hwrm_mac_loopback(bp, true); 3561 msleep(250); 3562 rc = bnxt_half_open_nic(bp); 3563 if (rc) { 3564 bnxt_hwrm_mac_loopback(bp, false); 3565 etest->flags |= ETH_TEST_FL_FAILED; 3566 return; 3567 } 3568 if (bnxt_run_loopback(bp)) 3569 etest->flags |= ETH_TEST_FL_FAILED; 3570 else 3571 buf[BNXT_MACLPBK_TEST_IDX] = 0; 3572 3573 bnxt_hwrm_mac_loopback(bp, false); 3574 bnxt_hwrm_phy_loopback(bp, true, false); 3575 msleep(1000); 3576 if (bnxt_run_loopback(bp)) { 3577 buf[BNXT_PHYLPBK_TEST_IDX] = 1; 3578 etest->flags |= ETH_TEST_FL_FAILED; 3579 } 3580 if (do_ext_lpbk) { 3581 etest->flags |= ETH_TEST_FL_EXTERNAL_LB_DONE; 3582 bnxt_hwrm_phy_loopback(bp, true, true); 3583 msleep(1000); 3584 if (bnxt_run_loopback(bp)) { 3585 buf[BNXT_EXTLPBK_TEST_IDX] = 1; 3586 etest->flags |= ETH_TEST_FL_FAILED; 3587 } 3588 } 3589 bnxt_hwrm_phy_loopback(bp, false, false); 3590 bnxt_half_close_nic(bp); 3591 rc = bnxt_open_nic(bp, false, true); 3592 } 3593 if (rc || bnxt_test_irq(bp)) { 3594 buf[BNXT_IRQ_TEST_IDX] = 1; 3595 etest->flags |= ETH_TEST_FL_FAILED; 3596 } 3597 for (i = 0; i < bp->num_tests - BNXT_DRV_TESTS; i++) { 3598 u8 bit_val = 1 << i; 3599 3600 if ((test_mask & bit_val) && !(test_results & bit_val)) { 3601 buf[i] = 1; 3602 etest->flags |= ETH_TEST_FL_FAILED; 3603 } 3604 } 3605 } 3606 3607 static int bnxt_reset(struct net_device *dev, u32 *flags) 3608 { 3609 struct bnxt *bp = netdev_priv(dev); 3610 bool reload = false; 3611 u32 req = *flags; 3612 3613 if (!req) 3614 return -EINVAL; 3615 3616 if (!BNXT_PF(bp)) { 3617 netdev_err(dev, "Reset is not supported from a VF\n"); 3618 return -EOPNOTSUPP; 3619 } 3620 3621 if (pci_vfs_assigned(bp->pdev) && 3622 !(bp->fw_cap & BNXT_FW_CAP_HOT_RESET)) { 3623 netdev_err(dev, 3624 "Reset not allowed when VFs are assigned to VMs\n"); 3625 return -EBUSY; 3626 } 3627 3628 if ((req & BNXT_FW_RESET_CHIP) == BNXT_FW_RESET_CHIP) { 3629 /* This feature is not supported in older firmware versions */ 3630 if (bp->hwrm_spec_code >= 0x10803) { 3631 if (!bnxt_firmware_reset_chip(dev)) { 3632 netdev_info(dev, "Firmware reset request successful.\n"); 3633 if (!(bp->fw_cap & BNXT_FW_CAP_HOT_RESET)) 3634 reload = true; 3635 *flags &= ~BNXT_FW_RESET_CHIP; 3636 } 3637 } else if (req == BNXT_FW_RESET_CHIP) { 3638 return -EOPNOTSUPP; /* only request, fail hard */ 3639 } 3640 } 3641 3642 if (req & BNXT_FW_RESET_AP) { 3643 /* This feature is not supported in older firmware versions */ 3644 if (bp->hwrm_spec_code >= 0x10803) { 3645 if (!bnxt_firmware_reset_ap(dev)) { 3646 netdev_info(dev, "Reset application processor successful.\n"); 3647 reload = true; 3648 *flags &= ~BNXT_FW_RESET_AP; 3649 } 3650 } else if (req == BNXT_FW_RESET_AP) { 3651 return -EOPNOTSUPP; /* only request, fail hard */ 3652 } 3653 } 3654 3655 if (reload) 3656 netdev_info(dev, "Reload driver to complete reset\n"); 3657 3658 return 0; 3659 } 3660 3661 static int bnxt_set_dump(struct net_device *dev, struct ethtool_dump *dump) 3662 { 3663 struct bnxt *bp = netdev_priv(dev); 3664 3665 if (dump->flag > BNXT_DUMP_CRASH) { 3666 netdev_info(dev, "Supports only Live(0) and Crash(1) dumps.\n"); 3667 return -EINVAL; 3668 } 3669 3670 if (!IS_ENABLED(CONFIG_TEE_BNXT_FW) && dump->flag == BNXT_DUMP_CRASH) { 3671 netdev_info(dev, "Cannot collect crash dump as TEE_BNXT_FW config option is not enabled.\n"); 3672 return -EOPNOTSUPP; 3673 } 3674 3675 bp->dump_flag = dump->flag; 3676 return 0; 3677 } 3678 3679 static int bnxt_get_dump_flag(struct net_device *dev, struct ethtool_dump *dump) 3680 { 3681 struct bnxt *bp = netdev_priv(dev); 3682 3683 if (bp->hwrm_spec_code < 0x10801) 3684 return -EOPNOTSUPP; 3685 3686 dump->version = bp->ver_resp.hwrm_fw_maj_8b << 24 | 3687 bp->ver_resp.hwrm_fw_min_8b << 16 | 3688 bp->ver_resp.hwrm_fw_bld_8b << 8 | 3689 bp->ver_resp.hwrm_fw_rsvd_8b; 3690 3691 dump->flag = bp->dump_flag; 3692 dump->len = bnxt_get_coredump_length(bp, bp->dump_flag); 3693 return 0; 3694 } 3695 3696 static int bnxt_get_dump_data(struct net_device *dev, struct ethtool_dump *dump, 3697 void *buf) 3698 { 3699 struct bnxt *bp = netdev_priv(dev); 3700 3701 if (bp->hwrm_spec_code < 0x10801) 3702 return -EOPNOTSUPP; 3703 3704 memset(buf, 0, dump->len); 3705 3706 dump->flag = bp->dump_flag; 3707 return bnxt_get_coredump(bp, dump->flag, buf, &dump->len); 3708 } 3709 3710 static int bnxt_get_ts_info(struct net_device *dev, 3711 struct ethtool_ts_info *info) 3712 { 3713 struct bnxt *bp = netdev_priv(dev); 3714 struct bnxt_ptp_cfg *ptp; 3715 3716 ptp = bp->ptp_cfg; 3717 info->so_timestamping = SOF_TIMESTAMPING_TX_SOFTWARE | 3718 SOF_TIMESTAMPING_RX_SOFTWARE | 3719 SOF_TIMESTAMPING_SOFTWARE; 3720 3721 info->phc_index = -1; 3722 if (!ptp) 3723 return 0; 3724 3725 info->so_timestamping |= SOF_TIMESTAMPING_TX_HARDWARE | 3726 SOF_TIMESTAMPING_RX_HARDWARE | 3727 SOF_TIMESTAMPING_RAW_HARDWARE; 3728 if (ptp->ptp_clock) 3729 info->phc_index = ptp_clock_index(ptp->ptp_clock); 3730 3731 info->tx_types = (1 << HWTSTAMP_TX_OFF) | (1 << HWTSTAMP_TX_ON); 3732 3733 info->rx_filters = (1 << HWTSTAMP_FILTER_NONE) | 3734 (1 << HWTSTAMP_FILTER_PTP_V2_L2_EVENT) | 3735 (1 << HWTSTAMP_FILTER_PTP_V2_L4_EVENT); 3736 return 0; 3737 } 3738 3739 void bnxt_ethtool_init(struct bnxt *bp) 3740 { 3741 struct hwrm_selftest_qlist_output *resp; 3742 struct hwrm_selftest_qlist_input *req; 3743 struct bnxt_test_info *test_info; 3744 struct net_device *dev = bp->dev; 3745 int i, rc; 3746 3747 if (!(bp->fw_cap & BNXT_FW_CAP_PKG_VER)) 3748 bnxt_get_pkgver(dev); 3749 3750 bp->num_tests = 0; 3751 if (bp->hwrm_spec_code < 0x10704 || !BNXT_PF(bp)) 3752 return; 3753 3754 test_info = bp->test_info; 3755 if (!test_info) { 3756 test_info = kzalloc(sizeof(*bp->test_info), GFP_KERNEL); 3757 if (!test_info) 3758 return; 3759 bp->test_info = test_info; 3760 } 3761 3762 if (hwrm_req_init(bp, req, HWRM_SELFTEST_QLIST)) 3763 return; 3764 3765 resp = hwrm_req_hold(bp, req); 3766 rc = hwrm_req_send_silent(bp, req); 3767 if (rc) 3768 goto ethtool_init_exit; 3769 3770 bp->num_tests = resp->num_tests + BNXT_DRV_TESTS; 3771 if (bp->num_tests > BNXT_MAX_TEST) 3772 bp->num_tests = BNXT_MAX_TEST; 3773 3774 test_info->offline_mask = resp->offline_tests; 3775 test_info->timeout = le16_to_cpu(resp->test_timeout); 3776 if (!test_info->timeout) 3777 test_info->timeout = HWRM_CMD_TIMEOUT; 3778 for (i = 0; i < bp->num_tests; i++) { 3779 char *str = test_info->string[i]; 3780 char *fw_str = resp->test0_name + i * 32; 3781 3782 if (i == BNXT_MACLPBK_TEST_IDX) { 3783 strcpy(str, "Mac loopback test (offline)"); 3784 } else if (i == BNXT_PHYLPBK_TEST_IDX) { 3785 strcpy(str, "Phy loopback test (offline)"); 3786 } else if (i == BNXT_EXTLPBK_TEST_IDX) { 3787 strcpy(str, "Ext loopback test (offline)"); 3788 } else if (i == BNXT_IRQ_TEST_IDX) { 3789 strcpy(str, "Interrupt_test (offline)"); 3790 } else { 3791 strlcpy(str, fw_str, ETH_GSTRING_LEN); 3792 strncat(str, " test", ETH_GSTRING_LEN - strlen(str)); 3793 if (test_info->offline_mask & (1 << i)) 3794 strncat(str, " (offline)", 3795 ETH_GSTRING_LEN - strlen(str)); 3796 else 3797 strncat(str, " (online)", 3798 ETH_GSTRING_LEN - strlen(str)); 3799 } 3800 } 3801 3802 ethtool_init_exit: 3803 hwrm_req_drop(bp, req); 3804 } 3805 3806 static void bnxt_get_eth_phy_stats(struct net_device *dev, 3807 struct ethtool_eth_phy_stats *phy_stats) 3808 { 3809 struct bnxt *bp = netdev_priv(dev); 3810 u64 *rx; 3811 3812 if (BNXT_VF(bp) || !(bp->flags & BNXT_FLAG_PORT_STATS_EXT)) 3813 return; 3814 3815 rx = bp->rx_port_stats_ext.sw_stats; 3816 phy_stats->SymbolErrorDuringCarrier = 3817 *(rx + BNXT_RX_STATS_EXT_OFFSET(rx_pcs_symbol_err)); 3818 } 3819 3820 static void bnxt_get_eth_mac_stats(struct net_device *dev, 3821 struct ethtool_eth_mac_stats *mac_stats) 3822 { 3823 struct bnxt *bp = netdev_priv(dev); 3824 u64 *rx, *tx; 3825 3826 if (BNXT_VF(bp) || !(bp->flags & BNXT_FLAG_PORT_STATS)) 3827 return; 3828 3829 rx = bp->port_stats.sw_stats; 3830 tx = bp->port_stats.sw_stats + BNXT_TX_PORT_STATS_BYTE_OFFSET / 8; 3831 3832 mac_stats->FramesReceivedOK = 3833 BNXT_GET_RX_PORT_STATS64(rx, rx_good_frames); 3834 mac_stats->FramesTransmittedOK = 3835 BNXT_GET_TX_PORT_STATS64(tx, tx_good_frames); 3836 mac_stats->FrameCheckSequenceErrors = 3837 BNXT_GET_RX_PORT_STATS64(rx, rx_fcs_err_frames); 3838 mac_stats->AlignmentErrors = 3839 BNXT_GET_RX_PORT_STATS64(rx, rx_align_err_frames); 3840 mac_stats->OutOfRangeLengthField = 3841 BNXT_GET_RX_PORT_STATS64(rx, rx_oor_len_frames); 3842 } 3843 3844 static void bnxt_get_eth_ctrl_stats(struct net_device *dev, 3845 struct ethtool_eth_ctrl_stats *ctrl_stats) 3846 { 3847 struct bnxt *bp = netdev_priv(dev); 3848 u64 *rx; 3849 3850 if (BNXT_VF(bp) || !(bp->flags & BNXT_FLAG_PORT_STATS)) 3851 return; 3852 3853 rx = bp->port_stats.sw_stats; 3854 ctrl_stats->MACControlFramesReceived = 3855 BNXT_GET_RX_PORT_STATS64(rx, rx_ctrl_frames); 3856 } 3857 3858 static const struct ethtool_rmon_hist_range bnxt_rmon_ranges[] = { 3859 { 0, 64 }, 3860 { 65, 127 }, 3861 { 128, 255 }, 3862 { 256, 511 }, 3863 { 512, 1023 }, 3864 { 1024, 1518 }, 3865 { 1519, 2047 }, 3866 { 2048, 4095 }, 3867 { 4096, 9216 }, 3868 { 9217, 16383 }, 3869 {} 3870 }; 3871 3872 static void bnxt_get_rmon_stats(struct net_device *dev, 3873 struct ethtool_rmon_stats *rmon_stats, 3874 const struct ethtool_rmon_hist_range **ranges) 3875 { 3876 struct bnxt *bp = netdev_priv(dev); 3877 u64 *rx, *tx; 3878 3879 if (BNXT_VF(bp) || !(bp->flags & BNXT_FLAG_PORT_STATS)) 3880 return; 3881 3882 rx = bp->port_stats.sw_stats; 3883 tx = bp->port_stats.sw_stats + BNXT_TX_PORT_STATS_BYTE_OFFSET / 8; 3884 3885 rmon_stats->jabbers = 3886 BNXT_GET_RX_PORT_STATS64(rx, rx_jbr_frames); 3887 rmon_stats->oversize_pkts = 3888 BNXT_GET_RX_PORT_STATS64(rx, rx_ovrsz_frames); 3889 rmon_stats->undersize_pkts = 3890 BNXT_GET_RX_PORT_STATS64(rx, rx_undrsz_frames); 3891 3892 rmon_stats->hist[0] = BNXT_GET_RX_PORT_STATS64(rx, rx_64b_frames); 3893 rmon_stats->hist[1] = BNXT_GET_RX_PORT_STATS64(rx, rx_65b_127b_frames); 3894 rmon_stats->hist[2] = BNXT_GET_RX_PORT_STATS64(rx, rx_128b_255b_frames); 3895 rmon_stats->hist[3] = BNXT_GET_RX_PORT_STATS64(rx, rx_256b_511b_frames); 3896 rmon_stats->hist[4] = 3897 BNXT_GET_RX_PORT_STATS64(rx, rx_512b_1023b_frames); 3898 rmon_stats->hist[5] = 3899 BNXT_GET_RX_PORT_STATS64(rx, rx_1024b_1518b_frames); 3900 rmon_stats->hist[6] = 3901 BNXT_GET_RX_PORT_STATS64(rx, rx_1519b_2047b_frames); 3902 rmon_stats->hist[7] = 3903 BNXT_GET_RX_PORT_STATS64(rx, rx_2048b_4095b_frames); 3904 rmon_stats->hist[8] = 3905 BNXT_GET_RX_PORT_STATS64(rx, rx_4096b_9216b_frames); 3906 rmon_stats->hist[9] = 3907 BNXT_GET_RX_PORT_STATS64(rx, rx_9217b_16383b_frames); 3908 3909 rmon_stats->hist_tx[0] = 3910 BNXT_GET_TX_PORT_STATS64(tx, tx_64b_frames); 3911 rmon_stats->hist_tx[1] = 3912 BNXT_GET_TX_PORT_STATS64(tx, tx_65b_127b_frames); 3913 rmon_stats->hist_tx[2] = 3914 BNXT_GET_TX_PORT_STATS64(tx, tx_128b_255b_frames); 3915 rmon_stats->hist_tx[3] = 3916 BNXT_GET_TX_PORT_STATS64(tx, tx_256b_511b_frames); 3917 rmon_stats->hist_tx[4] = 3918 BNXT_GET_TX_PORT_STATS64(tx, tx_512b_1023b_frames); 3919 rmon_stats->hist_tx[5] = 3920 BNXT_GET_TX_PORT_STATS64(tx, tx_1024b_1518b_frames); 3921 rmon_stats->hist_tx[6] = 3922 BNXT_GET_TX_PORT_STATS64(tx, tx_1519b_2047b_frames); 3923 rmon_stats->hist_tx[7] = 3924 BNXT_GET_TX_PORT_STATS64(tx, tx_2048b_4095b_frames); 3925 rmon_stats->hist_tx[8] = 3926 BNXT_GET_TX_PORT_STATS64(tx, tx_4096b_9216b_frames); 3927 rmon_stats->hist_tx[9] = 3928 BNXT_GET_TX_PORT_STATS64(tx, tx_9217b_16383b_frames); 3929 3930 *ranges = bnxt_rmon_ranges; 3931 } 3932 3933 void bnxt_ethtool_free(struct bnxt *bp) 3934 { 3935 kfree(bp->test_info); 3936 bp->test_info = NULL; 3937 } 3938 3939 const struct ethtool_ops bnxt_ethtool_ops = { 3940 .supported_coalesce_params = ETHTOOL_COALESCE_USECS | 3941 ETHTOOL_COALESCE_MAX_FRAMES | 3942 ETHTOOL_COALESCE_USECS_IRQ | 3943 ETHTOOL_COALESCE_MAX_FRAMES_IRQ | 3944 ETHTOOL_COALESCE_STATS_BLOCK_USECS | 3945 ETHTOOL_COALESCE_USE_ADAPTIVE_RX | 3946 ETHTOOL_COALESCE_USE_CQE, 3947 .get_link_ksettings = bnxt_get_link_ksettings, 3948 .set_link_ksettings = bnxt_set_link_ksettings, 3949 .get_fec_stats = bnxt_get_fec_stats, 3950 .get_fecparam = bnxt_get_fecparam, 3951 .set_fecparam = bnxt_set_fecparam, 3952 .get_pause_stats = bnxt_get_pause_stats, 3953 .get_pauseparam = bnxt_get_pauseparam, 3954 .set_pauseparam = bnxt_set_pauseparam, 3955 .get_drvinfo = bnxt_get_drvinfo, 3956 .get_regs_len = bnxt_get_regs_len, 3957 .get_regs = bnxt_get_regs, 3958 .get_wol = bnxt_get_wol, 3959 .set_wol = bnxt_set_wol, 3960 .get_coalesce = bnxt_get_coalesce, 3961 .set_coalesce = bnxt_set_coalesce, 3962 .get_msglevel = bnxt_get_msglevel, 3963 .set_msglevel = bnxt_set_msglevel, 3964 .get_sset_count = bnxt_get_sset_count, 3965 .get_strings = bnxt_get_strings, 3966 .get_ethtool_stats = bnxt_get_ethtool_stats, 3967 .set_ringparam = bnxt_set_ringparam, 3968 .get_ringparam = bnxt_get_ringparam, 3969 .get_channels = bnxt_get_channels, 3970 .set_channels = bnxt_set_channels, 3971 .get_rxnfc = bnxt_get_rxnfc, 3972 .set_rxnfc = bnxt_set_rxnfc, 3973 .get_rxfh_indir_size = bnxt_get_rxfh_indir_size, 3974 .get_rxfh_key_size = bnxt_get_rxfh_key_size, 3975 .get_rxfh = bnxt_get_rxfh, 3976 .set_rxfh = bnxt_set_rxfh, 3977 .flash_device = bnxt_flash_device, 3978 .get_eeprom_len = bnxt_get_eeprom_len, 3979 .get_eeprom = bnxt_get_eeprom, 3980 .set_eeprom = bnxt_set_eeprom, 3981 .get_link = bnxt_get_link, 3982 .get_eee = bnxt_get_eee, 3983 .set_eee = bnxt_set_eee, 3984 .get_module_info = bnxt_get_module_info, 3985 .get_module_eeprom = bnxt_get_module_eeprom, 3986 .nway_reset = bnxt_nway_reset, 3987 .set_phys_id = bnxt_set_phys_id, 3988 .self_test = bnxt_self_test, 3989 .get_ts_info = bnxt_get_ts_info, 3990 .reset = bnxt_reset, 3991 .set_dump = bnxt_set_dump, 3992 .get_dump_flag = bnxt_get_dump_flag, 3993 .get_dump_data = bnxt_get_dump_data, 3994 .get_eth_phy_stats = bnxt_get_eth_phy_stats, 3995 .get_eth_mac_stats = bnxt_get_eth_mac_stats, 3996 .get_eth_ctrl_stats = bnxt_get_eth_ctrl_stats, 3997 .get_rmon_stats = bnxt_get_rmon_stats, 3998 }; 3999