1 /* bnx2x_sp.h: Broadcom Everest network driver. 2 * 3 * Copyright 2011 Broadcom Corporation 4 * 5 * Unless you and Broadcom execute a separate written software license 6 * agreement governing use of this software, this software is licensed to you 7 * under the terms of the GNU General Public License version 2, available 8 * at http://www.gnu.org/licenses/old-licenses/gpl-2.0.html (the "GPL"). 9 * 10 * Notwithstanding the above, under no circumstances may you combine this 11 * software in any way with any other Broadcom software provided under a 12 * license other than the GPL, without Broadcom's express prior written 13 * consent. 14 * 15 * Maintained by: Eilon Greenstein <eilong@broadcom.com> 16 * Written by: Vladislav Zolotarov 17 * 18 */ 19 #ifndef BNX2X_SP_VERBS 20 #define BNX2X_SP_VERBS 21 22 struct bnx2x; 23 struct eth_context; 24 25 /* Bits representing general command's configuration */ 26 enum { 27 RAMROD_TX, 28 RAMROD_RX, 29 /* Wait until all pending commands complete */ 30 RAMROD_COMP_WAIT, 31 /* Don't send a ramrod, only update a registry */ 32 RAMROD_DRV_CLR_ONLY, 33 /* Configure HW according to the current object state */ 34 RAMROD_RESTORE, 35 /* Execute the next command now */ 36 RAMROD_EXEC, 37 /* 38 * Don't add a new command and continue execution of posponed 39 * commands. If not set a new command will be added to the 40 * pending commands list. 41 */ 42 RAMROD_CONT, 43 }; 44 45 typedef enum { 46 BNX2X_OBJ_TYPE_RX, 47 BNX2X_OBJ_TYPE_TX, 48 BNX2X_OBJ_TYPE_RX_TX, 49 } bnx2x_obj_type; 50 51 /* Filtering states */ 52 enum { 53 BNX2X_FILTER_MAC_PENDING, 54 BNX2X_FILTER_VLAN_PENDING, 55 BNX2X_FILTER_VLAN_MAC_PENDING, 56 BNX2X_FILTER_RX_MODE_PENDING, 57 BNX2X_FILTER_RX_MODE_SCHED, 58 BNX2X_FILTER_ISCSI_ETH_START_SCHED, 59 BNX2X_FILTER_ISCSI_ETH_STOP_SCHED, 60 BNX2X_FILTER_FCOE_ETH_START_SCHED, 61 BNX2X_FILTER_FCOE_ETH_STOP_SCHED, 62 BNX2X_FILTER_MCAST_PENDING, 63 BNX2X_FILTER_MCAST_SCHED, 64 BNX2X_FILTER_RSS_CONF_PENDING, 65 }; 66 67 struct bnx2x_raw_obj { 68 u8 func_id; 69 70 /* Queue params */ 71 u8 cl_id; 72 u32 cid; 73 74 /* Ramrod data buffer params */ 75 void *rdata; 76 dma_addr_t rdata_mapping; 77 78 /* Ramrod state params */ 79 int state; /* "ramrod is pending" state bit */ 80 unsigned long *pstate; /* pointer to state buffer */ 81 82 bnx2x_obj_type obj_type; 83 84 int (*wait_comp)(struct bnx2x *bp, 85 struct bnx2x_raw_obj *o); 86 87 bool (*check_pending)(struct bnx2x_raw_obj *o); 88 void (*clear_pending)(struct bnx2x_raw_obj *o); 89 void (*set_pending)(struct bnx2x_raw_obj *o); 90 }; 91 92 /************************* VLAN-MAC commands related parameters ***************/ 93 struct bnx2x_mac_ramrod_data { 94 u8 mac[ETH_ALEN]; 95 }; 96 97 struct bnx2x_vlan_ramrod_data { 98 u16 vlan; 99 }; 100 101 struct bnx2x_vlan_mac_ramrod_data { 102 u8 mac[ETH_ALEN]; 103 u16 vlan; 104 }; 105 106 union bnx2x_classification_ramrod_data { 107 struct bnx2x_mac_ramrod_data mac; 108 struct bnx2x_vlan_ramrod_data vlan; 109 struct bnx2x_vlan_mac_ramrod_data vlan_mac; 110 }; 111 112 /* VLAN_MAC commands */ 113 enum bnx2x_vlan_mac_cmd { 114 BNX2X_VLAN_MAC_ADD, 115 BNX2X_VLAN_MAC_DEL, 116 BNX2X_VLAN_MAC_MOVE, 117 }; 118 119 struct bnx2x_vlan_mac_data { 120 /* Requested command: BNX2X_VLAN_MAC_XX */ 121 enum bnx2x_vlan_mac_cmd cmd; 122 /* 123 * used to contain the data related vlan_mac_flags bits from 124 * ramrod parameters. 125 */ 126 unsigned long vlan_mac_flags; 127 128 /* Needed for MOVE command */ 129 struct bnx2x_vlan_mac_obj *target_obj; 130 131 union bnx2x_classification_ramrod_data u; 132 }; 133 134 /*************************** Exe Queue obj ************************************/ 135 union bnx2x_exe_queue_cmd_data { 136 struct bnx2x_vlan_mac_data vlan_mac; 137 138 struct { 139 /* TODO */ 140 } mcast; 141 }; 142 143 struct bnx2x_exeq_elem { 144 struct list_head link; 145 146 /* Length of this element in the exe_chunk. */ 147 int cmd_len; 148 149 union bnx2x_exe_queue_cmd_data cmd_data; 150 }; 151 152 union bnx2x_qable_obj; 153 154 union bnx2x_exeq_comp_elem { 155 union event_ring_elem *elem; 156 }; 157 158 struct bnx2x_exe_queue_obj; 159 160 typedef int (*exe_q_validate)(struct bnx2x *bp, 161 union bnx2x_qable_obj *o, 162 struct bnx2x_exeq_elem *elem); 163 164 /** 165 * @return positive is entry was optimized, 0 - if not, negative 166 * in case of an error. 167 */ 168 typedef int (*exe_q_optimize)(struct bnx2x *bp, 169 union bnx2x_qable_obj *o, 170 struct bnx2x_exeq_elem *elem); 171 typedef int (*exe_q_execute)(struct bnx2x *bp, 172 union bnx2x_qable_obj *o, 173 struct list_head *exe_chunk, 174 unsigned long *ramrod_flags); 175 typedef struct bnx2x_exeq_elem * 176 (*exe_q_get)(struct bnx2x_exe_queue_obj *o, 177 struct bnx2x_exeq_elem *elem); 178 179 struct bnx2x_exe_queue_obj { 180 /* 181 * Commands pending for an execution. 182 */ 183 struct list_head exe_queue; 184 185 /* 186 * Commands pending for an completion. 187 */ 188 struct list_head pending_comp; 189 190 spinlock_t lock; 191 192 /* Maximum length of commands' list for one execution */ 193 int exe_chunk_len; 194 195 union bnx2x_qable_obj *owner; 196 197 /****** Virtual functions ******/ 198 /** 199 * Called before commands execution for commands that are really 200 * going to be executed (after 'optimize'). 201 * 202 * Must run under exe_queue->lock 203 */ 204 exe_q_validate validate; 205 206 207 /** 208 * This will try to cancel the current pending commands list 209 * considering the new command. 210 * 211 * Must run under exe_queue->lock 212 */ 213 exe_q_optimize optimize; 214 215 /** 216 * Run the next commands chunk (owner specific). 217 */ 218 exe_q_execute execute; 219 220 /** 221 * Return the exe_queue element containing the specific command 222 * if any. Otherwise return NULL. 223 */ 224 exe_q_get get; 225 }; 226 /***************** Classification verbs: Set/Del MAC/VLAN/VLAN-MAC ************/ 227 /* 228 * Element in the VLAN_MAC registry list having all currenty configured 229 * rules. 230 */ 231 struct bnx2x_vlan_mac_registry_elem { 232 struct list_head link; 233 234 /* 235 * Used to store the cam offset used for the mac/vlan/vlan-mac. 236 * Relevant for 57710 and 57711 only. VLANs and MACs share the 237 * same CAM for these chips. 238 */ 239 int cam_offset; 240 241 /* Needed for DEL and RESTORE flows */ 242 unsigned long vlan_mac_flags; 243 244 union bnx2x_classification_ramrod_data u; 245 }; 246 247 /* Bits representing VLAN_MAC commands specific flags */ 248 enum { 249 BNX2X_UC_LIST_MAC, 250 BNX2X_ETH_MAC, 251 BNX2X_ISCSI_ETH_MAC, 252 BNX2X_NETQ_ETH_MAC, 253 BNX2X_DONT_CONSUME_CAM_CREDIT, 254 BNX2X_DONT_CONSUME_CAM_CREDIT_DEST, 255 }; 256 257 struct bnx2x_vlan_mac_ramrod_params { 258 /* Object to run the command from */ 259 struct bnx2x_vlan_mac_obj *vlan_mac_obj; 260 261 /* General command flags: COMP_WAIT, etc. */ 262 unsigned long ramrod_flags; 263 264 /* Command specific configuration request */ 265 struct bnx2x_vlan_mac_data user_req; 266 }; 267 268 struct bnx2x_vlan_mac_obj { 269 struct bnx2x_raw_obj raw; 270 271 /* Bookkeeping list: will prevent the addition of already existing 272 * entries. 273 */ 274 struct list_head head; 275 276 /* TODO: Add it's initialization in the init functions */ 277 struct bnx2x_exe_queue_obj exe_queue; 278 279 /* MACs credit pool */ 280 struct bnx2x_credit_pool_obj *macs_pool; 281 282 /* VLANs credit pool */ 283 struct bnx2x_credit_pool_obj *vlans_pool; 284 285 /* RAMROD command to be used */ 286 int ramrod_cmd; 287 288 /* copy first n elements onto preallocated buffer 289 * 290 * @param n number of elements to get 291 * @param buf buffer preallocated by caller into which elements 292 * will be copied. Note elements are 4-byte aligned 293 * so buffer size must be able to accomodate the 294 * aligned elements. 295 * 296 * @return number of copied bytes 297 */ 298 int (*get_n_elements)(struct bnx2x *bp, struct bnx2x_vlan_mac_obj *o, 299 int n, u8 *buf); 300 301 /** 302 * Checks if ADD-ramrod with the given params may be performed. 303 * 304 * @return zero if the element may be added 305 */ 306 307 int (*check_add)(struct bnx2x_vlan_mac_obj *o, 308 union bnx2x_classification_ramrod_data *data); 309 310 /** 311 * Checks if DEL-ramrod with the given params may be performed. 312 * 313 * @return true if the element may be deleted 314 */ 315 struct bnx2x_vlan_mac_registry_elem * 316 (*check_del)(struct bnx2x_vlan_mac_obj *o, 317 union bnx2x_classification_ramrod_data *data); 318 319 /** 320 * Checks if DEL-ramrod with the given params may be performed. 321 * 322 * @return true if the element may be deleted 323 */ 324 bool (*check_move)(struct bnx2x_vlan_mac_obj *src_o, 325 struct bnx2x_vlan_mac_obj *dst_o, 326 union bnx2x_classification_ramrod_data *data); 327 328 /** 329 * Update the relevant credit object(s) (consume/return 330 * correspondingly). 331 */ 332 bool (*get_credit)(struct bnx2x_vlan_mac_obj *o); 333 bool (*put_credit)(struct bnx2x_vlan_mac_obj *o); 334 bool (*get_cam_offset)(struct bnx2x_vlan_mac_obj *o, int *offset); 335 bool (*put_cam_offset)(struct bnx2x_vlan_mac_obj *o, int offset); 336 337 /** 338 * Configures one rule in the ramrod data buffer. 339 */ 340 void (*set_one_rule)(struct bnx2x *bp, 341 struct bnx2x_vlan_mac_obj *o, 342 struct bnx2x_exeq_elem *elem, int rule_idx, 343 int cam_offset); 344 345 /** 346 * Delete all configured elements having the given 347 * vlan_mac_flags specification. Assumes no pending for 348 * execution commands. Will schedule all all currently 349 * configured MACs/VLANs/VLAN-MACs matching the vlan_mac_flags 350 * specification for deletion and will use the given 351 * ramrod_flags for the last DEL operation. 352 * 353 * @param bp 354 * @param o 355 * @param ramrod_flags RAMROD_XX flags 356 * 357 * @return 0 if the last operation has completed successfully 358 * and there are no more elements left, positive value 359 * if there are pending for completion commands, 360 * negative value in case of failure. 361 */ 362 int (*delete_all)(struct bnx2x *bp, 363 struct bnx2x_vlan_mac_obj *o, 364 unsigned long *vlan_mac_flags, 365 unsigned long *ramrod_flags); 366 367 /** 368 * Reconfigures the next MAC/VLAN/VLAN-MAC element from the previously 369 * configured elements list. 370 * 371 * @param bp 372 * @param p Command parameters (RAMROD_COMP_WAIT bit in 373 * ramrod_flags is only taken into an account) 374 * @param ppos a pointer to the cooky that should be given back in the 375 * next call to make function handle the next element. If 376 * *ppos is set to NULL it will restart the iterator. 377 * If returned *ppos == NULL this means that the last 378 * element has been handled. 379 * 380 * @return int 381 */ 382 int (*restore)(struct bnx2x *bp, 383 struct bnx2x_vlan_mac_ramrod_params *p, 384 struct bnx2x_vlan_mac_registry_elem **ppos); 385 386 /** 387 * Should be called on a completion arival. 388 * 389 * @param bp 390 * @param o 391 * @param cqe Completion element we are handling 392 * @param ramrod_flags if RAMROD_CONT is set the next bulk of 393 * pending commands will be executed. 394 * RAMROD_DRV_CLR_ONLY and RAMROD_RESTORE 395 * may also be set if needed. 396 * 397 * @return 0 if there are neither pending nor waiting for 398 * completion commands. Positive value if there are 399 * pending for execution or for completion commands. 400 * Negative value in case of an error (including an 401 * error in the cqe). 402 */ 403 int (*complete)(struct bnx2x *bp, struct bnx2x_vlan_mac_obj *o, 404 union event_ring_elem *cqe, 405 unsigned long *ramrod_flags); 406 407 /** 408 * Wait for completion of all commands. Don't schedule new ones, 409 * just wait. It assumes that the completion code will schedule 410 * for new commands. 411 */ 412 int (*wait)(struct bnx2x *bp, struct bnx2x_vlan_mac_obj *o); 413 }; 414 415 /** RX_MODE verbs:DROP_ALL/ACCEPT_ALL/ACCEPT_ALL_MULTI/ACCEPT_ALL_VLAN/NORMAL */ 416 417 /* RX_MODE ramrod spesial flags: set in rx_mode_flags field in 418 * a bnx2x_rx_mode_ramrod_params. 419 */ 420 enum { 421 BNX2X_RX_MODE_FCOE_ETH, 422 BNX2X_RX_MODE_ISCSI_ETH, 423 }; 424 425 enum { 426 BNX2X_ACCEPT_UNICAST, 427 BNX2X_ACCEPT_MULTICAST, 428 BNX2X_ACCEPT_ALL_UNICAST, 429 BNX2X_ACCEPT_ALL_MULTICAST, 430 BNX2X_ACCEPT_BROADCAST, 431 BNX2X_ACCEPT_UNMATCHED, 432 BNX2X_ACCEPT_ANY_VLAN 433 }; 434 435 struct bnx2x_rx_mode_ramrod_params { 436 struct bnx2x_rx_mode_obj *rx_mode_obj; 437 unsigned long *pstate; 438 int state; 439 u8 cl_id; 440 u32 cid; 441 u8 func_id; 442 unsigned long ramrod_flags; 443 unsigned long rx_mode_flags; 444 445 /* 446 * rdata is either a pointer to eth_filter_rules_ramrod_data(e2) or to 447 * a tstorm_eth_mac_filter_config (e1x). 448 */ 449 void *rdata; 450 dma_addr_t rdata_mapping; 451 452 /* Rx mode settings */ 453 unsigned long rx_accept_flags; 454 455 /* internal switching settings */ 456 unsigned long tx_accept_flags; 457 }; 458 459 struct bnx2x_rx_mode_obj { 460 int (*config_rx_mode)(struct bnx2x *bp, 461 struct bnx2x_rx_mode_ramrod_params *p); 462 463 int (*wait_comp)(struct bnx2x *bp, 464 struct bnx2x_rx_mode_ramrod_params *p); 465 }; 466 467 /********************** Set multicast group ***********************************/ 468 469 struct bnx2x_mcast_list_elem { 470 struct list_head link; 471 u8 *mac; 472 }; 473 474 union bnx2x_mcast_config_data { 475 u8 *mac; 476 u8 bin; /* used in a RESTORE flow */ 477 }; 478 479 struct bnx2x_mcast_ramrod_params { 480 struct bnx2x_mcast_obj *mcast_obj; 481 482 /* Relevant options are RAMROD_COMP_WAIT and RAMROD_DRV_CLR_ONLY */ 483 unsigned long ramrod_flags; 484 485 struct list_head mcast_list; /* list of struct bnx2x_mcast_list_elem */ 486 /** TODO: 487 * - rename it to macs_num. 488 * - Add a new command type for handling pending commands 489 * (remove "zero semantics"). 490 * 491 * Length of mcast_list. If zero and ADD_CONT command - post 492 * pending commands. 493 */ 494 int mcast_list_len; 495 }; 496 497 enum { 498 BNX2X_MCAST_CMD_ADD, 499 BNX2X_MCAST_CMD_CONT, 500 BNX2X_MCAST_CMD_DEL, 501 BNX2X_MCAST_CMD_RESTORE, 502 }; 503 504 struct bnx2x_mcast_obj { 505 struct bnx2x_raw_obj raw; 506 507 union { 508 struct { 509 #define BNX2X_MCAST_BINS_NUM 256 510 #define BNX2X_MCAST_VEC_SZ (BNX2X_MCAST_BINS_NUM / 64) 511 u64 vec[BNX2X_MCAST_VEC_SZ]; 512 513 /** Number of BINs to clear. Should be updated 514 * immediately when a command arrives in order to 515 * properly create DEL commands. 516 */ 517 int num_bins_set; 518 } aprox_match; 519 520 struct { 521 struct list_head macs; 522 int num_macs_set; 523 } exact_match; 524 } registry; 525 526 /* Pending commands */ 527 struct list_head pending_cmds_head; 528 529 /* A state that is set in raw.pstate, when there are pending commands */ 530 int sched_state; 531 532 /* Maximal number of mcast MACs configured in one command */ 533 int max_cmd_len; 534 535 /* Total number of currently pending MACs to configure: both 536 * in the pending commands list and in the current command. 537 */ 538 int total_pending_num; 539 540 u8 engine_id; 541 542 /** 543 * @param cmd command to execute (BNX2X_MCAST_CMD_X, see above) 544 */ 545 int (*config_mcast)(struct bnx2x *bp, 546 struct bnx2x_mcast_ramrod_params *p, int cmd); 547 548 /** 549 * Fills the ramrod data during the RESTORE flow. 550 * 551 * @param bp 552 * @param o 553 * @param start_idx Registry index to start from 554 * @param rdata_idx Index in the ramrod data to start from 555 * 556 * @return -1 if we handled the whole registry or index of the last 557 * handled registry element. 558 */ 559 int (*hdl_restore)(struct bnx2x *bp, struct bnx2x_mcast_obj *o, 560 int start_bin, int *rdata_idx); 561 562 int (*enqueue_cmd)(struct bnx2x *bp, struct bnx2x_mcast_obj *o, 563 struct bnx2x_mcast_ramrod_params *p, int cmd); 564 565 void (*set_one_rule)(struct bnx2x *bp, 566 struct bnx2x_mcast_obj *o, int idx, 567 union bnx2x_mcast_config_data *cfg_data, int cmd); 568 569 /** Checks if there are more mcast MACs to be set or a previous 570 * command is still pending. 571 */ 572 bool (*check_pending)(struct bnx2x_mcast_obj *o); 573 574 /** 575 * Set/Clear/Check SCHEDULED state of the object 576 */ 577 void (*set_sched)(struct bnx2x_mcast_obj *o); 578 void (*clear_sched)(struct bnx2x_mcast_obj *o); 579 bool (*check_sched)(struct bnx2x_mcast_obj *o); 580 581 /* Wait until all pending commands complete */ 582 int (*wait_comp)(struct bnx2x *bp, struct bnx2x_mcast_obj *o); 583 584 /** 585 * Handle the internal object counters needed for proper 586 * commands handling. Checks that the provided parameters are 587 * feasible. 588 */ 589 int (*validate)(struct bnx2x *bp, 590 struct bnx2x_mcast_ramrod_params *p, int cmd); 591 592 /** 593 * Restore the values of internal counters in case of a failure. 594 */ 595 void (*revert)(struct bnx2x *bp, 596 struct bnx2x_mcast_ramrod_params *p, 597 int old_num_bins); 598 599 int (*get_registry_size)(struct bnx2x_mcast_obj *o); 600 void (*set_registry_size)(struct bnx2x_mcast_obj *o, int n); 601 }; 602 603 /*************************** Credit handling **********************************/ 604 struct bnx2x_credit_pool_obj { 605 606 /* Current amount of credit in the pool */ 607 atomic_t credit; 608 609 /* Maximum allowed credit. put() will check against it. */ 610 int pool_sz; 611 612 /* 613 * Allocate a pool table statically. 614 * 615 * Currently the mamimum allowed size is MAX_MAC_CREDIT_E2(272) 616 * 617 * The set bit in the table will mean that the entry is available. 618 */ 619 #define BNX2X_POOL_VEC_SIZE (MAX_MAC_CREDIT_E2 / 64) 620 u64 pool_mirror[BNX2X_POOL_VEC_SIZE]; 621 622 /* Base pool offset (initialized differently */ 623 int base_pool_offset; 624 625 /** 626 * Get the next free pool entry. 627 * 628 * @return true if there was a free entry in the pool 629 */ 630 bool (*get_entry)(struct bnx2x_credit_pool_obj *o, int *entry); 631 632 /** 633 * Return the entry back to the pool. 634 * 635 * @return true if entry is legal and has been successfully 636 * returned to the pool. 637 */ 638 bool (*put_entry)(struct bnx2x_credit_pool_obj *o, int entry); 639 640 /** 641 * Get the requested amount of credit from the pool. 642 * 643 * @param cnt Amount of requested credit 644 * @return true if the operation is successful 645 */ 646 bool (*get)(struct bnx2x_credit_pool_obj *o, int cnt); 647 648 /** 649 * Returns the credit to the pool. 650 * 651 * @param cnt Amount of credit to return 652 * @return true if the operation is successful 653 */ 654 bool (*put)(struct bnx2x_credit_pool_obj *o, int cnt); 655 656 /** 657 * Reads the current amount of credit. 658 */ 659 int (*check)(struct bnx2x_credit_pool_obj *o); 660 }; 661 662 /*************************** RSS configuration ********************************/ 663 enum { 664 /* RSS_MODE bits are mutually exclusive */ 665 BNX2X_RSS_MODE_DISABLED, 666 BNX2X_RSS_MODE_REGULAR, 667 BNX2X_RSS_MODE_VLAN_PRI, 668 BNX2X_RSS_MODE_E1HOV_PRI, 669 BNX2X_RSS_MODE_IP_DSCP, 670 671 BNX2X_RSS_SET_SRCH, /* Setup searcher, E1x specific flag */ 672 673 BNX2X_RSS_IPV4, 674 BNX2X_RSS_IPV4_TCP, 675 BNX2X_RSS_IPV6, 676 BNX2X_RSS_IPV6_TCP, 677 }; 678 679 struct bnx2x_config_rss_params { 680 struct bnx2x_rss_config_obj *rss_obj; 681 682 /* may have RAMROD_COMP_WAIT set only */ 683 unsigned long ramrod_flags; 684 685 /* BNX2X_RSS_X bits */ 686 unsigned long rss_flags; 687 688 /* Number hash bits to take into an account */ 689 u8 rss_result_mask; 690 691 /* Indirection table */ 692 u8 ind_table[T_ETH_INDIRECTION_TABLE_SIZE]; 693 694 /* RSS hash values */ 695 u32 rss_key[10]; 696 697 /* valid only iff BNX2X_RSS_UPDATE_TOE is set */ 698 u16 toe_rss_bitmap; 699 }; 700 701 struct bnx2x_rss_config_obj { 702 struct bnx2x_raw_obj raw; 703 704 /* RSS engine to use */ 705 u8 engine_id; 706 707 /* Last configured indirection table */ 708 u8 ind_table[T_ETH_INDIRECTION_TABLE_SIZE]; 709 710 int (*config_rss)(struct bnx2x *bp, 711 struct bnx2x_config_rss_params *p); 712 }; 713 714 /*********************** Queue state update ***********************************/ 715 716 /* UPDATE command options */ 717 enum { 718 BNX2X_Q_UPDATE_IN_VLAN_REM, 719 BNX2X_Q_UPDATE_IN_VLAN_REM_CHNG, 720 BNX2X_Q_UPDATE_OUT_VLAN_REM, 721 BNX2X_Q_UPDATE_OUT_VLAN_REM_CHNG, 722 BNX2X_Q_UPDATE_ANTI_SPOOF, 723 BNX2X_Q_UPDATE_ANTI_SPOOF_CHNG, 724 BNX2X_Q_UPDATE_ACTIVATE, 725 BNX2X_Q_UPDATE_ACTIVATE_CHNG, 726 BNX2X_Q_UPDATE_DEF_VLAN_EN, 727 BNX2X_Q_UPDATE_DEF_VLAN_EN_CHNG, 728 BNX2X_Q_UPDATE_SILENT_VLAN_REM_CHNG, 729 BNX2X_Q_UPDATE_SILENT_VLAN_REM 730 }; 731 732 /* Allowed Queue states */ 733 enum bnx2x_q_state { 734 BNX2X_Q_STATE_RESET, 735 BNX2X_Q_STATE_INITIALIZED, 736 BNX2X_Q_STATE_ACTIVE, 737 BNX2X_Q_STATE_MULTI_COS, 738 BNX2X_Q_STATE_MCOS_TERMINATED, 739 BNX2X_Q_STATE_INACTIVE, 740 BNX2X_Q_STATE_STOPPED, 741 BNX2X_Q_STATE_TERMINATED, 742 BNX2X_Q_STATE_FLRED, 743 BNX2X_Q_STATE_MAX, 744 }; 745 746 /* Allowed commands */ 747 enum bnx2x_queue_cmd { 748 BNX2X_Q_CMD_INIT, 749 BNX2X_Q_CMD_SETUP, 750 BNX2X_Q_CMD_SETUP_TX_ONLY, 751 BNX2X_Q_CMD_DEACTIVATE, 752 BNX2X_Q_CMD_ACTIVATE, 753 BNX2X_Q_CMD_UPDATE, 754 BNX2X_Q_CMD_UPDATE_TPA, 755 BNX2X_Q_CMD_HALT, 756 BNX2X_Q_CMD_CFC_DEL, 757 BNX2X_Q_CMD_TERMINATE, 758 BNX2X_Q_CMD_EMPTY, 759 BNX2X_Q_CMD_MAX, 760 }; 761 762 /* queue SETUP + INIT flags */ 763 enum { 764 BNX2X_Q_FLG_TPA, 765 BNX2X_Q_FLG_TPA_IPV6, 766 BNX2X_Q_FLG_STATS, 767 BNX2X_Q_FLG_ZERO_STATS, 768 BNX2X_Q_FLG_ACTIVE, 769 BNX2X_Q_FLG_OV, 770 BNX2X_Q_FLG_VLAN, 771 BNX2X_Q_FLG_COS, 772 BNX2X_Q_FLG_HC, 773 BNX2X_Q_FLG_HC_EN, 774 BNX2X_Q_FLG_DHC, 775 BNX2X_Q_FLG_FCOE, 776 BNX2X_Q_FLG_LEADING_RSS, 777 BNX2X_Q_FLG_MCAST, 778 BNX2X_Q_FLG_DEF_VLAN, 779 BNX2X_Q_FLG_TX_SWITCH, 780 BNX2X_Q_FLG_TX_SEC, 781 BNX2X_Q_FLG_ANTI_SPOOF, 782 BNX2X_Q_FLG_SILENT_VLAN_REM 783 }; 784 785 /* Queue type options: queue type may be a compination of below. */ 786 enum bnx2x_q_type { 787 /** TODO: Consider moving both these flags into the init() 788 * ramrod params. 789 */ 790 BNX2X_Q_TYPE_HAS_RX, 791 BNX2X_Q_TYPE_HAS_TX, 792 }; 793 794 #define BNX2X_PRIMARY_CID_INDEX 0 795 #define BNX2X_MULTI_TX_COS_E1X 1 796 #define BNX2X_MULTI_TX_COS_E2_E3A0 2 797 #define BNX2X_MULTI_TX_COS_E3B0 3 798 #define BNX2X_MULTI_TX_COS BNX2X_MULTI_TX_COS_E3B0 799 800 801 struct bnx2x_queue_init_params { 802 struct { 803 unsigned long flags; 804 u16 hc_rate; 805 u8 fw_sb_id; 806 u8 sb_cq_index; 807 } tx; 808 809 struct { 810 unsigned long flags; 811 u16 hc_rate; 812 u8 fw_sb_id; 813 u8 sb_cq_index; 814 } rx; 815 816 /* CID context in the host memory */ 817 struct eth_context *cxts[BNX2X_MULTI_TX_COS]; 818 819 /* maximum number of cos supported by hardware */ 820 u8 max_cos; 821 }; 822 823 struct bnx2x_queue_terminate_params { 824 /* index within the tx_only cids of this queue object */ 825 u8 cid_index; 826 }; 827 828 struct bnx2x_queue_cfc_del_params { 829 /* index within the tx_only cids of this queue object */ 830 u8 cid_index; 831 }; 832 833 struct bnx2x_queue_update_params { 834 unsigned long update_flags; /* BNX2X_Q_UPDATE_XX bits */ 835 u16 def_vlan; 836 u16 silent_removal_value; 837 u16 silent_removal_mask; 838 /* index within the tx_only cids of this queue object */ 839 u8 cid_index; 840 }; 841 842 struct rxq_pause_params { 843 u16 bd_th_lo; 844 u16 bd_th_hi; 845 u16 rcq_th_lo; 846 u16 rcq_th_hi; 847 u16 sge_th_lo; /* valid iff BNX2X_Q_FLG_TPA */ 848 u16 sge_th_hi; /* valid iff BNX2X_Q_FLG_TPA */ 849 u16 pri_map; 850 }; 851 852 /* general */ 853 struct bnx2x_general_setup_params { 854 /* valid iff BNX2X_Q_FLG_STATS */ 855 u8 stat_id; 856 857 u8 spcl_id; 858 u16 mtu; 859 u8 cos; 860 }; 861 862 struct bnx2x_rxq_setup_params { 863 /* dma */ 864 dma_addr_t dscr_map; 865 dma_addr_t sge_map; 866 dma_addr_t rcq_map; 867 dma_addr_t rcq_np_map; 868 869 u16 drop_flags; 870 u16 buf_sz; 871 u8 fw_sb_id; 872 u8 cl_qzone_id; 873 874 /* valid iff BNX2X_Q_FLG_TPA */ 875 u16 tpa_agg_sz; 876 u16 sge_buf_sz; 877 u8 max_sges_pkt; 878 u8 max_tpa_queues; 879 u8 rss_engine_id; 880 881 u8 cache_line_log; 882 883 u8 sb_cq_index; 884 885 /* valid iff BXN2X_Q_FLG_SILENT_VLAN_REM */ 886 u16 silent_removal_value; 887 u16 silent_removal_mask; 888 }; 889 890 struct bnx2x_txq_setup_params { 891 /* dma */ 892 dma_addr_t dscr_map; 893 894 u8 fw_sb_id; 895 u8 sb_cq_index; 896 u8 cos; /* valid iff BNX2X_Q_FLG_COS */ 897 u16 traffic_type; 898 /* equals to the leading rss client id, used for TX classification*/ 899 u8 tss_leading_cl_id; 900 901 /* valid iff BNX2X_Q_FLG_DEF_VLAN */ 902 u16 default_vlan; 903 }; 904 905 struct bnx2x_queue_setup_params { 906 struct bnx2x_general_setup_params gen_params; 907 struct bnx2x_txq_setup_params txq_params; 908 struct bnx2x_rxq_setup_params rxq_params; 909 struct rxq_pause_params pause_params; 910 unsigned long flags; 911 }; 912 913 struct bnx2x_queue_setup_tx_only_params { 914 struct bnx2x_general_setup_params gen_params; 915 struct bnx2x_txq_setup_params txq_params; 916 unsigned long flags; 917 /* index within the tx_only cids of this queue object */ 918 u8 cid_index; 919 }; 920 921 struct bnx2x_queue_state_params { 922 struct bnx2x_queue_sp_obj *q_obj; 923 924 /* Current command */ 925 enum bnx2x_queue_cmd cmd; 926 927 /* may have RAMROD_COMP_WAIT set only */ 928 unsigned long ramrod_flags; 929 930 /* Params according to the current command */ 931 union { 932 struct bnx2x_queue_update_params update; 933 struct bnx2x_queue_setup_params setup; 934 struct bnx2x_queue_init_params init; 935 struct bnx2x_queue_setup_tx_only_params tx_only; 936 struct bnx2x_queue_terminate_params terminate; 937 struct bnx2x_queue_cfc_del_params cfc_del; 938 } params; 939 }; 940 941 struct bnx2x_queue_sp_obj { 942 u32 cids[BNX2X_MULTI_TX_COS]; 943 u8 cl_id; 944 u8 func_id; 945 946 /* 947 * number of traffic classes supported by queue. 948 * The primary connection of the queue suppotrs the first traffic 949 * class. Any further traffic class is suppoted by a tx-only 950 * connection. 951 * 952 * Therefore max_cos is also a number of valid entries in the cids 953 * array. 954 */ 955 u8 max_cos; 956 u8 num_tx_only, next_tx_only; 957 958 enum bnx2x_q_state state, next_state; 959 960 /* bits from enum bnx2x_q_type */ 961 unsigned long type; 962 963 /* BNX2X_Q_CMD_XX bits. This object implements "one 964 * pending" paradigm but for debug and tracing purposes it's 965 * more convinient to have different bits for different 966 * commands. 967 */ 968 unsigned long pending; 969 970 /* Buffer to use as a ramrod data and its mapping */ 971 void *rdata; 972 dma_addr_t rdata_mapping; 973 974 /** 975 * Performs one state change according to the given parameters. 976 * 977 * @return 0 in case of success and negative value otherwise. 978 */ 979 int (*send_cmd)(struct bnx2x *bp, 980 struct bnx2x_queue_state_params *params); 981 982 /** 983 * Sets the pending bit according to the requested transition. 984 */ 985 int (*set_pending)(struct bnx2x_queue_sp_obj *o, 986 struct bnx2x_queue_state_params *params); 987 988 /** 989 * Checks that the requested state transition is legal. 990 */ 991 int (*check_transition)(struct bnx2x *bp, 992 struct bnx2x_queue_sp_obj *o, 993 struct bnx2x_queue_state_params *params); 994 995 /** 996 * Completes the pending command. 997 */ 998 int (*complete_cmd)(struct bnx2x *bp, 999 struct bnx2x_queue_sp_obj *o, 1000 enum bnx2x_queue_cmd); 1001 1002 int (*wait_comp)(struct bnx2x *bp, 1003 struct bnx2x_queue_sp_obj *o, 1004 enum bnx2x_queue_cmd cmd); 1005 }; 1006 1007 /********************** Function state update *********************************/ 1008 /* Allowed Function states */ 1009 enum bnx2x_func_state { 1010 BNX2X_F_STATE_RESET, 1011 BNX2X_F_STATE_INITIALIZED, 1012 BNX2X_F_STATE_STARTED, 1013 BNX2X_F_STATE_TX_STOPPED, 1014 BNX2X_F_STATE_MAX, 1015 }; 1016 1017 /* Allowed Function commands */ 1018 enum bnx2x_func_cmd { 1019 BNX2X_F_CMD_HW_INIT, 1020 BNX2X_F_CMD_START, 1021 BNX2X_F_CMD_STOP, 1022 BNX2X_F_CMD_HW_RESET, 1023 BNX2X_F_CMD_TX_STOP, 1024 BNX2X_F_CMD_TX_START, 1025 BNX2X_F_CMD_MAX, 1026 }; 1027 1028 struct bnx2x_func_hw_init_params { 1029 /* A load phase returned by MCP. 1030 * 1031 * May be: 1032 * FW_MSG_CODE_DRV_LOAD_COMMON_CHIP 1033 * FW_MSG_CODE_DRV_LOAD_COMMON 1034 * FW_MSG_CODE_DRV_LOAD_PORT 1035 * FW_MSG_CODE_DRV_LOAD_FUNCTION 1036 */ 1037 u32 load_phase; 1038 }; 1039 1040 struct bnx2x_func_hw_reset_params { 1041 /* A load phase returned by MCP. 1042 * 1043 * May be: 1044 * FW_MSG_CODE_DRV_LOAD_COMMON_CHIP 1045 * FW_MSG_CODE_DRV_LOAD_COMMON 1046 * FW_MSG_CODE_DRV_LOAD_PORT 1047 * FW_MSG_CODE_DRV_LOAD_FUNCTION 1048 */ 1049 u32 reset_phase; 1050 }; 1051 1052 struct bnx2x_func_start_params { 1053 /* Multi Function mode: 1054 * - Single Function 1055 * - Switch Dependent 1056 * - Switch Independent 1057 */ 1058 u16 mf_mode; 1059 1060 /* Switch Dependent mode outer VLAN tag */ 1061 u16 sd_vlan_tag; 1062 1063 /* Function cos mode */ 1064 u8 network_cos_mode; 1065 }; 1066 1067 struct bnx2x_func_tx_start_params { 1068 struct priority_cos traffic_type_to_priority_cos[MAX_TRAFFIC_TYPES]; 1069 u8 dcb_enabled; 1070 u8 dcb_version; 1071 u8 dont_add_pri_0_en; 1072 }; 1073 1074 struct bnx2x_func_state_params { 1075 struct bnx2x_func_sp_obj *f_obj; 1076 1077 /* Current command */ 1078 enum bnx2x_func_cmd cmd; 1079 1080 /* may have RAMROD_COMP_WAIT set only */ 1081 unsigned long ramrod_flags; 1082 1083 /* Params according to the current command */ 1084 union { 1085 struct bnx2x_func_hw_init_params hw_init; 1086 struct bnx2x_func_hw_reset_params hw_reset; 1087 struct bnx2x_func_start_params start; 1088 struct bnx2x_func_tx_start_params tx_start; 1089 } params; 1090 }; 1091 1092 struct bnx2x_func_sp_drv_ops { 1093 /* Init tool + runtime initialization: 1094 * - Common Chip 1095 * - Common (per Path) 1096 * - Port 1097 * - Function phases 1098 */ 1099 int (*init_hw_cmn_chip)(struct bnx2x *bp); 1100 int (*init_hw_cmn)(struct bnx2x *bp); 1101 int (*init_hw_port)(struct bnx2x *bp); 1102 int (*init_hw_func)(struct bnx2x *bp); 1103 1104 /* Reset Function HW: Common, Port, Function phases. */ 1105 void (*reset_hw_cmn)(struct bnx2x *bp); 1106 void (*reset_hw_port)(struct bnx2x *bp); 1107 void (*reset_hw_func)(struct bnx2x *bp); 1108 1109 /* Init/Free GUNZIP resources */ 1110 int (*gunzip_init)(struct bnx2x *bp); 1111 void (*gunzip_end)(struct bnx2x *bp); 1112 1113 /* Prepare/Release FW resources */ 1114 int (*init_fw)(struct bnx2x *bp); 1115 void (*release_fw)(struct bnx2x *bp); 1116 }; 1117 1118 struct bnx2x_func_sp_obj { 1119 enum bnx2x_func_state state, next_state; 1120 1121 /* BNX2X_FUNC_CMD_XX bits. This object implements "one 1122 * pending" paradigm but for debug and tracing purposes it's 1123 * more convinient to have different bits for different 1124 * commands. 1125 */ 1126 unsigned long pending; 1127 1128 /* Buffer to use as a ramrod data and its mapping */ 1129 void *rdata; 1130 dma_addr_t rdata_mapping; 1131 1132 /* this mutex validates that when pending flag is taken, the next 1133 * ramrod to be sent will be the one set the pending bit 1134 */ 1135 struct mutex one_pending_mutex; 1136 1137 /* Driver interface */ 1138 struct bnx2x_func_sp_drv_ops *drv; 1139 1140 /** 1141 * Performs one state change according to the given parameters. 1142 * 1143 * @return 0 in case of success and negative value otherwise. 1144 */ 1145 int (*send_cmd)(struct bnx2x *bp, 1146 struct bnx2x_func_state_params *params); 1147 1148 /** 1149 * Checks that the requested state transition is legal. 1150 */ 1151 int (*check_transition)(struct bnx2x *bp, 1152 struct bnx2x_func_sp_obj *o, 1153 struct bnx2x_func_state_params *params); 1154 1155 /** 1156 * Completes the pending command. 1157 */ 1158 int (*complete_cmd)(struct bnx2x *bp, 1159 struct bnx2x_func_sp_obj *o, 1160 enum bnx2x_func_cmd cmd); 1161 1162 int (*wait_comp)(struct bnx2x *bp, struct bnx2x_func_sp_obj *o, 1163 enum bnx2x_func_cmd cmd); 1164 }; 1165 1166 /********************** Interfaces ********************************************/ 1167 /* Queueable objects set */ 1168 union bnx2x_qable_obj { 1169 struct bnx2x_vlan_mac_obj vlan_mac; 1170 }; 1171 /************** Function state update *********/ 1172 void bnx2x_init_func_obj(struct bnx2x *bp, 1173 struct bnx2x_func_sp_obj *obj, 1174 void *rdata, dma_addr_t rdata_mapping, 1175 struct bnx2x_func_sp_drv_ops *drv_iface); 1176 1177 int bnx2x_func_state_change(struct bnx2x *bp, 1178 struct bnx2x_func_state_params *params); 1179 1180 enum bnx2x_func_state bnx2x_func_get_state(struct bnx2x *bp, 1181 struct bnx2x_func_sp_obj *o); 1182 /******************* Queue State **************/ 1183 void bnx2x_init_queue_obj(struct bnx2x *bp, 1184 struct bnx2x_queue_sp_obj *obj, u8 cl_id, u32 *cids, 1185 u8 cid_cnt, u8 func_id, void *rdata, 1186 dma_addr_t rdata_mapping, unsigned long type); 1187 1188 int bnx2x_queue_state_change(struct bnx2x *bp, 1189 struct bnx2x_queue_state_params *params); 1190 1191 /********************* VLAN-MAC ****************/ 1192 void bnx2x_init_mac_obj(struct bnx2x *bp, 1193 struct bnx2x_vlan_mac_obj *mac_obj, 1194 u8 cl_id, u32 cid, u8 func_id, void *rdata, 1195 dma_addr_t rdata_mapping, int state, 1196 unsigned long *pstate, bnx2x_obj_type type, 1197 struct bnx2x_credit_pool_obj *macs_pool); 1198 1199 void bnx2x_init_vlan_obj(struct bnx2x *bp, 1200 struct bnx2x_vlan_mac_obj *vlan_obj, 1201 u8 cl_id, u32 cid, u8 func_id, void *rdata, 1202 dma_addr_t rdata_mapping, int state, 1203 unsigned long *pstate, bnx2x_obj_type type, 1204 struct bnx2x_credit_pool_obj *vlans_pool); 1205 1206 void bnx2x_init_vlan_mac_obj(struct bnx2x *bp, 1207 struct bnx2x_vlan_mac_obj *vlan_mac_obj, 1208 u8 cl_id, u32 cid, u8 func_id, void *rdata, 1209 dma_addr_t rdata_mapping, int state, 1210 unsigned long *pstate, bnx2x_obj_type type, 1211 struct bnx2x_credit_pool_obj *macs_pool, 1212 struct bnx2x_credit_pool_obj *vlans_pool); 1213 1214 int bnx2x_config_vlan_mac(struct bnx2x *bp, 1215 struct bnx2x_vlan_mac_ramrod_params *p); 1216 1217 int bnx2x_vlan_mac_move(struct bnx2x *bp, 1218 struct bnx2x_vlan_mac_ramrod_params *p, 1219 struct bnx2x_vlan_mac_obj *dest_o); 1220 1221 /********************* RX MODE ****************/ 1222 1223 void bnx2x_init_rx_mode_obj(struct bnx2x *bp, 1224 struct bnx2x_rx_mode_obj *o); 1225 1226 /** 1227 * Send and RX_MODE ramrod according to the provided parameters. 1228 * 1229 * @param bp 1230 * @param p Command parameters 1231 * 1232 * @return 0 - if operation was successfull and there is no pending completions, 1233 * positive number - if there are pending completions, 1234 * negative - if there were errors 1235 */ 1236 int bnx2x_config_rx_mode(struct bnx2x *bp, 1237 struct bnx2x_rx_mode_ramrod_params *p); 1238 1239 /****************** MULTICASTS ****************/ 1240 1241 void bnx2x_init_mcast_obj(struct bnx2x *bp, 1242 struct bnx2x_mcast_obj *mcast_obj, 1243 u8 mcast_cl_id, u32 mcast_cid, u8 func_id, 1244 u8 engine_id, void *rdata, dma_addr_t rdata_mapping, 1245 int state, unsigned long *pstate, 1246 bnx2x_obj_type type); 1247 1248 /** 1249 * Configure multicast MACs list. May configure a new list 1250 * provided in p->mcast_list (BNX2X_MCAST_CMD_ADD), clean up 1251 * (BNX2X_MCAST_CMD_DEL) or restore (BNX2X_MCAST_CMD_RESTORE) a current 1252 * configuration, continue to execute the pending commands 1253 * (BNX2X_MCAST_CMD_CONT). 1254 * 1255 * If previous command is still pending or if number of MACs to 1256 * configure is more that maximum number of MACs in one command, 1257 * the current command will be enqueued to the tail of the 1258 * pending commands list. 1259 * 1260 * @param bp 1261 * @param p 1262 * @param command to execute: BNX2X_MCAST_CMD_X 1263 * 1264 * @return 0 is operation was sucessfull and there are no pending completions, 1265 * negative if there were errors, positive if there are pending 1266 * completions. 1267 */ 1268 int bnx2x_config_mcast(struct bnx2x *bp, 1269 struct bnx2x_mcast_ramrod_params *p, int cmd); 1270 1271 /****************** CREDIT POOL ****************/ 1272 void bnx2x_init_mac_credit_pool(struct bnx2x *bp, 1273 struct bnx2x_credit_pool_obj *p, u8 func_id, 1274 u8 func_num); 1275 void bnx2x_init_vlan_credit_pool(struct bnx2x *bp, 1276 struct bnx2x_credit_pool_obj *p, u8 func_id, 1277 u8 func_num); 1278 1279 1280 /****************** RSS CONFIGURATION ****************/ 1281 void bnx2x_init_rss_config_obj(struct bnx2x *bp, 1282 struct bnx2x_rss_config_obj *rss_obj, 1283 u8 cl_id, u32 cid, u8 func_id, u8 engine_id, 1284 void *rdata, dma_addr_t rdata_mapping, 1285 int state, unsigned long *pstate, 1286 bnx2x_obj_type type); 1287 1288 /** 1289 * Updates RSS configuration according to provided parameters. 1290 * 1291 * @param bp 1292 * @param p 1293 * 1294 * @return 0 in case of success 1295 */ 1296 int bnx2x_config_rss(struct bnx2x *bp, 1297 struct bnx2x_config_rss_params *p); 1298 1299 /** 1300 * Return the current ind_table configuration. 1301 * 1302 * @param bp 1303 * @param ind_table buffer to fill with the current indirection 1304 * table content. Should be at least 1305 * T_ETH_INDIRECTION_TABLE_SIZE bytes long. 1306 */ 1307 void bnx2x_get_rss_ind_table(struct bnx2x_rss_config_obj *rss_obj, 1308 u8 *ind_table); 1309 1310 #endif /* BNX2X_SP_VERBS */ 1311