1 // SPDX-License-Identifier: GPL-2.0-only 2 /* 3 * Broadcom BCM7xxx System Port Ethernet MAC driver 4 * 5 * Copyright (C) 2014 Broadcom Corporation 6 */ 7 8 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt 9 10 #include <linux/init.h> 11 #include <linux/interrupt.h> 12 #include <linux/module.h> 13 #include <linux/kernel.h> 14 #include <linux/netdevice.h> 15 #include <linux/dsa/brcm.h> 16 #include <linux/etherdevice.h> 17 #include <linux/platform_device.h> 18 #include <linux/of.h> 19 #include <linux/of_net.h> 20 #include <linux/of_mdio.h> 21 #include <linux/phy.h> 22 #include <linux/phy_fixed.h> 23 #include <net/dsa.h> 24 #include <linux/clk.h> 25 #include <net/ip.h> 26 #include <net/ipv6.h> 27 28 #include "bcmsysport.h" 29 30 /* I/O accessors register helpers */ 31 #define BCM_SYSPORT_IO_MACRO(name, offset) \ 32 static inline u32 name##_readl(struct bcm_sysport_priv *priv, u32 off) \ 33 { \ 34 u32 reg = readl_relaxed(priv->base + offset + off); \ 35 return reg; \ 36 } \ 37 static inline void name##_writel(struct bcm_sysport_priv *priv, \ 38 u32 val, u32 off) \ 39 { \ 40 writel_relaxed(val, priv->base + offset + off); \ 41 } \ 42 43 BCM_SYSPORT_IO_MACRO(intrl2_0, SYS_PORT_INTRL2_0_OFFSET); 44 BCM_SYSPORT_IO_MACRO(intrl2_1, SYS_PORT_INTRL2_1_OFFSET); 45 BCM_SYSPORT_IO_MACRO(umac, SYS_PORT_UMAC_OFFSET); 46 BCM_SYSPORT_IO_MACRO(gib, SYS_PORT_GIB_OFFSET); 47 BCM_SYSPORT_IO_MACRO(tdma, SYS_PORT_TDMA_OFFSET); 48 BCM_SYSPORT_IO_MACRO(rxchk, SYS_PORT_RXCHK_OFFSET); 49 BCM_SYSPORT_IO_MACRO(txchk, SYS_PORT_TXCHK_OFFSET); 50 BCM_SYSPORT_IO_MACRO(rbuf, SYS_PORT_RBUF_OFFSET); 51 BCM_SYSPORT_IO_MACRO(tbuf, SYS_PORT_TBUF_OFFSET); 52 BCM_SYSPORT_IO_MACRO(topctrl, SYS_PORT_TOPCTRL_OFFSET); 53 54 /* On SYSTEMPORT Lite, any register after RDMA_STATUS has the exact 55 * same layout, except it has been moved by 4 bytes up, *sigh* 56 */ 57 static inline u32 rdma_readl(struct bcm_sysport_priv *priv, u32 off) 58 { 59 if (priv->is_lite && off >= RDMA_STATUS) 60 off += 4; 61 return readl_relaxed(priv->base + SYS_PORT_RDMA_OFFSET + off); 62 } 63 64 static inline void rdma_writel(struct bcm_sysport_priv *priv, u32 val, u32 off) 65 { 66 if (priv->is_lite && off >= RDMA_STATUS) 67 off += 4; 68 writel_relaxed(val, priv->base + SYS_PORT_RDMA_OFFSET + off); 69 } 70 71 static inline u32 tdma_control_bit(struct bcm_sysport_priv *priv, u32 bit) 72 { 73 if (!priv->is_lite) { 74 return BIT(bit); 75 } else { 76 if (bit >= ACB_ALGO) 77 return BIT(bit + 1); 78 else 79 return BIT(bit); 80 } 81 } 82 83 /* L2-interrupt masking/unmasking helpers, does automatic saving of the applied 84 * mask in a software copy to avoid CPU_MASK_STATUS reads in hot-paths. 85 */ 86 #define BCM_SYSPORT_INTR_L2(which) \ 87 static inline void intrl2_##which##_mask_clear(struct bcm_sysport_priv *priv, \ 88 u32 mask) \ 89 { \ 90 priv->irq##which##_mask &= ~(mask); \ 91 intrl2_##which##_writel(priv, mask, INTRL2_CPU_MASK_CLEAR); \ 92 } \ 93 static inline void intrl2_##which##_mask_set(struct bcm_sysport_priv *priv, \ 94 u32 mask) \ 95 { \ 96 intrl2_## which##_writel(priv, mask, INTRL2_CPU_MASK_SET); \ 97 priv->irq##which##_mask |= (mask); \ 98 } \ 99 100 BCM_SYSPORT_INTR_L2(0) 101 BCM_SYSPORT_INTR_L2(1) 102 103 /* Register accesses to GISB/RBUS registers are expensive (few hundred 104 * nanoseconds), so keep the check for 64-bits explicit here to save 105 * one register write per-packet on 32-bits platforms. 106 */ 107 static inline void dma_desc_set_addr(struct bcm_sysport_priv *priv, 108 void __iomem *d, 109 dma_addr_t addr) 110 { 111 #ifdef CONFIG_PHYS_ADDR_T_64BIT 112 writel_relaxed(upper_32_bits(addr) & DESC_ADDR_HI_MASK, 113 d + DESC_ADDR_HI_STATUS_LEN); 114 #endif 115 writel_relaxed(lower_32_bits(addr), d + DESC_ADDR_LO); 116 } 117 118 /* Ethtool operations */ 119 static void bcm_sysport_set_rx_csum(struct net_device *dev, 120 netdev_features_t wanted) 121 { 122 struct bcm_sysport_priv *priv = netdev_priv(dev); 123 u32 reg; 124 125 priv->rx_chk_en = !!(wanted & NETIF_F_RXCSUM); 126 reg = rxchk_readl(priv, RXCHK_CONTROL); 127 /* Clear L2 header checks, which would prevent BPDUs 128 * from being received. 129 */ 130 reg &= ~RXCHK_L2_HDR_DIS; 131 if (priv->rx_chk_en) 132 reg |= RXCHK_EN; 133 else 134 reg &= ~RXCHK_EN; 135 136 /* If UniMAC forwards CRC, we need to skip over it to get 137 * a valid CHK bit to be set in the per-packet status word 138 */ 139 if (priv->rx_chk_en && priv->crc_fwd) 140 reg |= RXCHK_SKIP_FCS; 141 else 142 reg &= ~RXCHK_SKIP_FCS; 143 144 /* If Broadcom tags are enabled (e.g: using a switch), make 145 * sure we tell the RXCHK hardware to expect a 4-bytes Broadcom 146 * tag after the Ethernet MAC Source Address. 147 */ 148 if (netdev_uses_dsa(dev)) 149 reg |= RXCHK_BRCM_TAG_EN; 150 else 151 reg &= ~RXCHK_BRCM_TAG_EN; 152 153 rxchk_writel(priv, reg, RXCHK_CONTROL); 154 } 155 156 static void bcm_sysport_set_tx_csum(struct net_device *dev, 157 netdev_features_t wanted) 158 { 159 struct bcm_sysport_priv *priv = netdev_priv(dev); 160 u32 reg; 161 162 /* Hardware transmit checksum requires us to enable the Transmit status 163 * block prepended to the packet contents 164 */ 165 priv->tsb_en = !!(wanted & (NETIF_F_IP_CSUM | NETIF_F_IPV6_CSUM | 166 NETIF_F_HW_VLAN_CTAG_TX)); 167 reg = tdma_readl(priv, TDMA_CONTROL); 168 if (priv->tsb_en) 169 reg |= tdma_control_bit(priv, TSB_EN); 170 else 171 reg &= ~tdma_control_bit(priv, TSB_EN); 172 /* Indicating that software inserts Broadcom tags is needed for the TX 173 * checksum to be computed correctly when using VLAN HW acceleration, 174 * else it has no effect, so it can always be turned on. 175 */ 176 if (netdev_uses_dsa(dev)) 177 reg |= tdma_control_bit(priv, SW_BRCM_TAG); 178 else 179 reg &= ~tdma_control_bit(priv, SW_BRCM_TAG); 180 tdma_writel(priv, reg, TDMA_CONTROL); 181 182 /* Default TPID is ETH_P_8021AD, change to ETH_P_8021Q */ 183 if (wanted & NETIF_F_HW_VLAN_CTAG_TX) 184 tdma_writel(priv, ETH_P_8021Q, TDMA_TPID); 185 } 186 187 static int bcm_sysport_set_features(struct net_device *dev, 188 netdev_features_t features) 189 { 190 struct bcm_sysport_priv *priv = netdev_priv(dev); 191 int ret; 192 193 ret = clk_prepare_enable(priv->clk); 194 if (ret) 195 return ret; 196 197 /* Read CRC forward */ 198 if (!priv->is_lite) 199 priv->crc_fwd = !!(umac_readl(priv, UMAC_CMD) & CMD_CRC_FWD); 200 else 201 priv->crc_fwd = !((gib_readl(priv, GIB_CONTROL) & 202 GIB_FCS_STRIP) >> GIB_FCS_STRIP_SHIFT); 203 204 bcm_sysport_set_rx_csum(dev, features); 205 bcm_sysport_set_tx_csum(dev, features); 206 207 clk_disable_unprepare(priv->clk); 208 209 return 0; 210 } 211 212 /* Hardware counters must be kept in sync because the order/offset 213 * is important here (order in structure declaration = order in hardware) 214 */ 215 static const struct bcm_sysport_stats bcm_sysport_gstrings_stats[] = { 216 /* general stats */ 217 STAT_NETDEV64(rx_packets), 218 STAT_NETDEV64(tx_packets), 219 STAT_NETDEV64(rx_bytes), 220 STAT_NETDEV64(tx_bytes), 221 STAT_NETDEV(rx_errors), 222 STAT_NETDEV(tx_errors), 223 STAT_NETDEV(rx_dropped), 224 STAT_NETDEV(tx_dropped), 225 STAT_NETDEV(multicast), 226 /* UniMAC RSV counters */ 227 STAT_MIB_RX("rx_64_octets", mib.rx.pkt_cnt.cnt_64), 228 STAT_MIB_RX("rx_65_127_oct", mib.rx.pkt_cnt.cnt_127), 229 STAT_MIB_RX("rx_128_255_oct", mib.rx.pkt_cnt.cnt_255), 230 STAT_MIB_RX("rx_256_511_oct", mib.rx.pkt_cnt.cnt_511), 231 STAT_MIB_RX("rx_512_1023_oct", mib.rx.pkt_cnt.cnt_1023), 232 STAT_MIB_RX("rx_1024_1518_oct", mib.rx.pkt_cnt.cnt_1518), 233 STAT_MIB_RX("rx_vlan_1519_1522_oct", mib.rx.pkt_cnt.cnt_mgv), 234 STAT_MIB_RX("rx_1522_2047_oct", mib.rx.pkt_cnt.cnt_2047), 235 STAT_MIB_RX("rx_2048_4095_oct", mib.rx.pkt_cnt.cnt_4095), 236 STAT_MIB_RX("rx_4096_9216_oct", mib.rx.pkt_cnt.cnt_9216), 237 STAT_MIB_RX("rx_pkts", mib.rx.pkt), 238 STAT_MIB_RX("rx_bytes", mib.rx.bytes), 239 STAT_MIB_RX("rx_multicast", mib.rx.mca), 240 STAT_MIB_RX("rx_broadcast", mib.rx.bca), 241 STAT_MIB_RX("rx_fcs", mib.rx.fcs), 242 STAT_MIB_RX("rx_control", mib.rx.cf), 243 STAT_MIB_RX("rx_pause", mib.rx.pf), 244 STAT_MIB_RX("rx_unknown", mib.rx.uo), 245 STAT_MIB_RX("rx_align", mib.rx.aln), 246 STAT_MIB_RX("rx_outrange", mib.rx.flr), 247 STAT_MIB_RX("rx_code", mib.rx.cde), 248 STAT_MIB_RX("rx_carrier", mib.rx.fcr), 249 STAT_MIB_RX("rx_oversize", mib.rx.ovr), 250 STAT_MIB_RX("rx_jabber", mib.rx.jbr), 251 STAT_MIB_RX("rx_mtu_err", mib.rx.mtue), 252 STAT_MIB_RX("rx_good_pkts", mib.rx.pok), 253 STAT_MIB_RX("rx_unicast", mib.rx.uc), 254 STAT_MIB_RX("rx_ppp", mib.rx.ppp), 255 STAT_MIB_RX("rx_crc", mib.rx.rcrc), 256 /* UniMAC TSV counters */ 257 STAT_MIB_TX("tx_64_octets", mib.tx.pkt_cnt.cnt_64), 258 STAT_MIB_TX("tx_65_127_oct", mib.tx.pkt_cnt.cnt_127), 259 STAT_MIB_TX("tx_128_255_oct", mib.tx.pkt_cnt.cnt_255), 260 STAT_MIB_TX("tx_256_511_oct", mib.tx.pkt_cnt.cnt_511), 261 STAT_MIB_TX("tx_512_1023_oct", mib.tx.pkt_cnt.cnt_1023), 262 STAT_MIB_TX("tx_1024_1518_oct", mib.tx.pkt_cnt.cnt_1518), 263 STAT_MIB_TX("tx_vlan_1519_1522_oct", mib.tx.pkt_cnt.cnt_mgv), 264 STAT_MIB_TX("tx_1522_2047_oct", mib.tx.pkt_cnt.cnt_2047), 265 STAT_MIB_TX("tx_2048_4095_oct", mib.tx.pkt_cnt.cnt_4095), 266 STAT_MIB_TX("tx_4096_9216_oct", mib.tx.pkt_cnt.cnt_9216), 267 STAT_MIB_TX("tx_pkts", mib.tx.pkts), 268 STAT_MIB_TX("tx_multicast", mib.tx.mca), 269 STAT_MIB_TX("tx_broadcast", mib.tx.bca), 270 STAT_MIB_TX("tx_pause", mib.tx.pf), 271 STAT_MIB_TX("tx_control", mib.tx.cf), 272 STAT_MIB_TX("tx_fcs_err", mib.tx.fcs), 273 STAT_MIB_TX("tx_oversize", mib.tx.ovr), 274 STAT_MIB_TX("tx_defer", mib.tx.drf), 275 STAT_MIB_TX("tx_excess_defer", mib.tx.edf), 276 STAT_MIB_TX("tx_single_col", mib.tx.scl), 277 STAT_MIB_TX("tx_multi_col", mib.tx.mcl), 278 STAT_MIB_TX("tx_late_col", mib.tx.lcl), 279 STAT_MIB_TX("tx_excess_col", mib.tx.ecl), 280 STAT_MIB_TX("tx_frags", mib.tx.frg), 281 STAT_MIB_TX("tx_total_col", mib.tx.ncl), 282 STAT_MIB_TX("tx_jabber", mib.tx.jbr), 283 STAT_MIB_TX("tx_bytes", mib.tx.bytes), 284 STAT_MIB_TX("tx_good_pkts", mib.tx.pok), 285 STAT_MIB_TX("tx_unicast", mib.tx.uc), 286 /* UniMAC RUNT counters */ 287 STAT_RUNT("rx_runt_pkts", mib.rx_runt_cnt), 288 STAT_RUNT("rx_runt_valid_fcs", mib.rx_runt_fcs), 289 STAT_RUNT("rx_runt_inval_fcs_align", mib.rx_runt_fcs_align), 290 STAT_RUNT("rx_runt_bytes", mib.rx_runt_bytes), 291 /* RXCHK misc statistics */ 292 STAT_RXCHK("rxchk_bad_csum", mib.rxchk_bad_csum, RXCHK_BAD_CSUM_CNTR), 293 STAT_RXCHK("rxchk_other_pkt_disc", mib.rxchk_other_pkt_disc, 294 RXCHK_OTHER_DISC_CNTR), 295 /* RBUF misc statistics */ 296 STAT_RBUF("rbuf_ovflow_cnt", mib.rbuf_ovflow_cnt, RBUF_OVFL_DISC_CNTR), 297 STAT_RBUF("rbuf_err_cnt", mib.rbuf_err_cnt, RBUF_ERR_PKT_CNTR), 298 /* RDMA misc statistics */ 299 STAT_RDMA("rdma_ovflow_cnt", mib.rdma_ovflow_cnt, RDMA_OVFL_DISC_CNTR), 300 STAT_MIB_SOFT("alloc_rx_buff_failed", mib.alloc_rx_buff_failed), 301 STAT_MIB_SOFT("rx_dma_failed", mib.rx_dma_failed), 302 STAT_MIB_SOFT("tx_dma_failed", mib.tx_dma_failed), 303 STAT_MIB_SOFT("tx_realloc_tsb", mib.tx_realloc_tsb), 304 STAT_MIB_SOFT("tx_realloc_tsb_failed", mib.tx_realloc_tsb_failed), 305 /* Per TX-queue statistics are dynamically appended */ 306 }; 307 308 #define BCM_SYSPORT_STATS_LEN ARRAY_SIZE(bcm_sysport_gstrings_stats) 309 310 static void bcm_sysport_get_drvinfo(struct net_device *dev, 311 struct ethtool_drvinfo *info) 312 { 313 strscpy(info->driver, KBUILD_MODNAME, sizeof(info->driver)); 314 strscpy(info->bus_info, "platform", sizeof(info->bus_info)); 315 } 316 317 static u32 bcm_sysport_get_msglvl(struct net_device *dev) 318 { 319 struct bcm_sysport_priv *priv = netdev_priv(dev); 320 321 return priv->msg_enable; 322 } 323 324 static void bcm_sysport_set_msglvl(struct net_device *dev, u32 enable) 325 { 326 struct bcm_sysport_priv *priv = netdev_priv(dev); 327 328 priv->msg_enable = enable; 329 } 330 331 static inline bool bcm_sysport_lite_stat_valid(enum bcm_sysport_stat_type type) 332 { 333 switch (type) { 334 case BCM_SYSPORT_STAT_NETDEV: 335 case BCM_SYSPORT_STAT_NETDEV64: 336 case BCM_SYSPORT_STAT_RXCHK: 337 case BCM_SYSPORT_STAT_RBUF: 338 case BCM_SYSPORT_STAT_RDMA: 339 case BCM_SYSPORT_STAT_SOFT: 340 return true; 341 default: 342 return false; 343 } 344 } 345 346 static int bcm_sysport_get_sset_count(struct net_device *dev, int string_set) 347 { 348 struct bcm_sysport_priv *priv = netdev_priv(dev); 349 const struct bcm_sysport_stats *s; 350 unsigned int i, j; 351 352 switch (string_set) { 353 case ETH_SS_STATS: 354 for (i = 0, j = 0; i < BCM_SYSPORT_STATS_LEN; i++) { 355 s = &bcm_sysport_gstrings_stats[i]; 356 if (priv->is_lite && 357 !bcm_sysport_lite_stat_valid(s->type)) 358 continue; 359 j++; 360 } 361 /* Include per-queue statistics */ 362 return j + dev->num_tx_queues * NUM_SYSPORT_TXQ_STAT; 363 default: 364 return -EOPNOTSUPP; 365 } 366 } 367 368 static void bcm_sysport_get_strings(struct net_device *dev, 369 u32 stringset, u8 *data) 370 { 371 struct bcm_sysport_priv *priv = netdev_priv(dev); 372 const struct bcm_sysport_stats *s; 373 char buf[128]; 374 int i, j; 375 376 switch (stringset) { 377 case ETH_SS_STATS: 378 for (i = 0, j = 0; i < BCM_SYSPORT_STATS_LEN; i++) { 379 s = &bcm_sysport_gstrings_stats[i]; 380 if (priv->is_lite && 381 !bcm_sysport_lite_stat_valid(s->type)) 382 continue; 383 384 memcpy(data + j * ETH_GSTRING_LEN, s->stat_string, 385 ETH_GSTRING_LEN); 386 j++; 387 } 388 389 for (i = 0; i < dev->num_tx_queues; i++) { 390 snprintf(buf, sizeof(buf), "txq%d_packets", i); 391 memcpy(data + j * ETH_GSTRING_LEN, buf, 392 ETH_GSTRING_LEN); 393 j++; 394 395 snprintf(buf, sizeof(buf), "txq%d_bytes", i); 396 memcpy(data + j * ETH_GSTRING_LEN, buf, 397 ETH_GSTRING_LEN); 398 j++; 399 } 400 break; 401 default: 402 break; 403 } 404 } 405 406 static void bcm_sysport_update_mib_counters(struct bcm_sysport_priv *priv) 407 { 408 int i, j = 0; 409 410 for (i = 0; i < BCM_SYSPORT_STATS_LEN; i++) { 411 const struct bcm_sysport_stats *s; 412 u8 offset = 0; 413 u32 val = 0; 414 char *p; 415 416 s = &bcm_sysport_gstrings_stats[i]; 417 switch (s->type) { 418 case BCM_SYSPORT_STAT_NETDEV: 419 case BCM_SYSPORT_STAT_NETDEV64: 420 case BCM_SYSPORT_STAT_SOFT: 421 continue; 422 case BCM_SYSPORT_STAT_MIB_RX: 423 case BCM_SYSPORT_STAT_MIB_TX: 424 case BCM_SYSPORT_STAT_RUNT: 425 if (priv->is_lite) 426 continue; 427 428 if (s->type != BCM_SYSPORT_STAT_MIB_RX) 429 offset = UMAC_MIB_STAT_OFFSET; 430 val = umac_readl(priv, UMAC_MIB_START + j + offset); 431 break; 432 case BCM_SYSPORT_STAT_RXCHK: 433 val = rxchk_readl(priv, s->reg_offset); 434 if (val == ~0) 435 rxchk_writel(priv, 0, s->reg_offset); 436 break; 437 case BCM_SYSPORT_STAT_RBUF: 438 val = rbuf_readl(priv, s->reg_offset); 439 if (val == ~0) 440 rbuf_writel(priv, 0, s->reg_offset); 441 break; 442 case BCM_SYSPORT_STAT_RDMA: 443 if (!priv->is_lite) 444 continue; 445 446 val = rdma_readl(priv, s->reg_offset); 447 if (val == ~0) 448 rdma_writel(priv, 0, s->reg_offset); 449 break; 450 } 451 452 j += s->stat_sizeof; 453 p = (char *)priv + s->stat_offset; 454 *(u32 *)p = val; 455 } 456 457 netif_dbg(priv, hw, priv->netdev, "updated MIB counters\n"); 458 } 459 460 static void bcm_sysport_update_tx_stats(struct bcm_sysport_priv *priv, 461 u64 *tx_bytes, u64 *tx_packets) 462 { 463 struct bcm_sysport_tx_ring *ring; 464 u64 bytes = 0, packets = 0; 465 unsigned int start; 466 unsigned int q; 467 468 for (q = 0; q < priv->netdev->num_tx_queues; q++) { 469 ring = &priv->tx_rings[q]; 470 do { 471 start = u64_stats_fetch_begin(&priv->syncp); 472 bytes = ring->bytes; 473 packets = ring->packets; 474 } while (u64_stats_fetch_retry(&priv->syncp, start)); 475 476 *tx_bytes += bytes; 477 *tx_packets += packets; 478 } 479 } 480 481 static void bcm_sysport_get_stats(struct net_device *dev, 482 struct ethtool_stats *stats, u64 *data) 483 { 484 struct bcm_sysport_priv *priv = netdev_priv(dev); 485 struct bcm_sysport_stats64 *stats64 = &priv->stats64; 486 struct u64_stats_sync *syncp = &priv->syncp; 487 struct bcm_sysport_tx_ring *ring; 488 u64 tx_bytes = 0, tx_packets = 0; 489 unsigned int start; 490 int i, j; 491 492 if (netif_running(dev)) { 493 bcm_sysport_update_mib_counters(priv); 494 bcm_sysport_update_tx_stats(priv, &tx_bytes, &tx_packets); 495 stats64->tx_bytes = tx_bytes; 496 stats64->tx_packets = tx_packets; 497 } 498 499 for (i = 0, j = 0; i < BCM_SYSPORT_STATS_LEN; i++) { 500 const struct bcm_sysport_stats *s; 501 char *p; 502 503 s = &bcm_sysport_gstrings_stats[i]; 504 if (s->type == BCM_SYSPORT_STAT_NETDEV) 505 p = (char *)&dev->stats; 506 else if (s->type == BCM_SYSPORT_STAT_NETDEV64) 507 p = (char *)stats64; 508 else 509 p = (char *)priv; 510 511 if (priv->is_lite && !bcm_sysport_lite_stat_valid(s->type)) 512 continue; 513 p += s->stat_offset; 514 515 if (s->stat_sizeof == sizeof(u64) && 516 s->type == BCM_SYSPORT_STAT_NETDEV64) { 517 do { 518 start = u64_stats_fetch_begin(syncp); 519 data[i] = *(u64 *)p; 520 } while (u64_stats_fetch_retry(syncp, start)); 521 } else 522 data[i] = *(u32 *)p; 523 j++; 524 } 525 526 /* For SYSTEMPORT Lite since we have holes in our statistics, j would 527 * be equal to BCM_SYSPORT_STATS_LEN at the end of the loop, but it 528 * needs to point to how many total statistics we have minus the 529 * number of per TX queue statistics 530 */ 531 j = bcm_sysport_get_sset_count(dev, ETH_SS_STATS) - 532 dev->num_tx_queues * NUM_SYSPORT_TXQ_STAT; 533 534 for (i = 0; i < dev->num_tx_queues; i++) { 535 ring = &priv->tx_rings[i]; 536 data[j] = ring->packets; 537 j++; 538 data[j] = ring->bytes; 539 j++; 540 } 541 } 542 543 static void bcm_sysport_get_wol(struct net_device *dev, 544 struct ethtool_wolinfo *wol) 545 { 546 struct bcm_sysport_priv *priv = netdev_priv(dev); 547 548 wol->supported = WAKE_MAGIC | WAKE_MAGICSECURE | WAKE_FILTER; 549 wol->wolopts = priv->wolopts; 550 551 if (!(priv->wolopts & WAKE_MAGICSECURE)) 552 return; 553 554 memcpy(wol->sopass, priv->sopass, sizeof(priv->sopass)); 555 } 556 557 static int bcm_sysport_set_wol(struct net_device *dev, 558 struct ethtool_wolinfo *wol) 559 { 560 struct bcm_sysport_priv *priv = netdev_priv(dev); 561 struct device *kdev = &priv->pdev->dev; 562 u32 supported = WAKE_MAGIC | WAKE_MAGICSECURE | WAKE_FILTER; 563 564 if (!device_can_wakeup(kdev)) 565 return -ENOTSUPP; 566 567 if (wol->wolopts & ~supported) 568 return -EINVAL; 569 570 if (wol->wolopts & WAKE_MAGICSECURE) 571 memcpy(priv->sopass, wol->sopass, sizeof(priv->sopass)); 572 573 /* Flag the device and relevant IRQ as wakeup capable */ 574 if (wol->wolopts) { 575 device_set_wakeup_enable(kdev, 1); 576 if (priv->wol_irq_disabled) 577 enable_irq_wake(priv->wol_irq); 578 priv->wol_irq_disabled = 0; 579 } else { 580 device_set_wakeup_enable(kdev, 0); 581 /* Avoid unbalanced disable_irq_wake calls */ 582 if (!priv->wol_irq_disabled) 583 disable_irq_wake(priv->wol_irq); 584 priv->wol_irq_disabled = 1; 585 } 586 587 priv->wolopts = wol->wolopts; 588 589 return 0; 590 } 591 592 static void bcm_sysport_set_rx_coalesce(struct bcm_sysport_priv *priv, 593 u32 usecs, u32 pkts) 594 { 595 u32 reg; 596 597 reg = rdma_readl(priv, RDMA_MBDONE_INTR); 598 reg &= ~(RDMA_INTR_THRESH_MASK | 599 RDMA_TIMEOUT_MASK << RDMA_TIMEOUT_SHIFT); 600 reg |= pkts; 601 reg |= DIV_ROUND_UP(usecs * 1000, 8192) << RDMA_TIMEOUT_SHIFT; 602 rdma_writel(priv, reg, RDMA_MBDONE_INTR); 603 } 604 605 static void bcm_sysport_set_tx_coalesce(struct bcm_sysport_tx_ring *ring, 606 struct ethtool_coalesce *ec) 607 { 608 struct bcm_sysport_priv *priv = ring->priv; 609 u32 reg; 610 611 reg = tdma_readl(priv, TDMA_DESC_RING_INTR_CONTROL(ring->index)); 612 reg &= ~(RING_INTR_THRESH_MASK | 613 RING_TIMEOUT_MASK << RING_TIMEOUT_SHIFT); 614 reg |= ec->tx_max_coalesced_frames; 615 reg |= DIV_ROUND_UP(ec->tx_coalesce_usecs * 1000, 8192) << 616 RING_TIMEOUT_SHIFT; 617 tdma_writel(priv, reg, TDMA_DESC_RING_INTR_CONTROL(ring->index)); 618 } 619 620 static int bcm_sysport_get_coalesce(struct net_device *dev, 621 struct ethtool_coalesce *ec, 622 struct kernel_ethtool_coalesce *kernel_coal, 623 struct netlink_ext_ack *extack) 624 { 625 struct bcm_sysport_priv *priv = netdev_priv(dev); 626 u32 reg; 627 628 reg = tdma_readl(priv, TDMA_DESC_RING_INTR_CONTROL(0)); 629 630 ec->tx_coalesce_usecs = (reg >> RING_TIMEOUT_SHIFT) * 8192 / 1000; 631 ec->tx_max_coalesced_frames = reg & RING_INTR_THRESH_MASK; 632 633 reg = rdma_readl(priv, RDMA_MBDONE_INTR); 634 635 ec->rx_coalesce_usecs = (reg >> RDMA_TIMEOUT_SHIFT) * 8192 / 1000; 636 ec->rx_max_coalesced_frames = reg & RDMA_INTR_THRESH_MASK; 637 ec->use_adaptive_rx_coalesce = priv->dim.use_dim; 638 639 return 0; 640 } 641 642 static int bcm_sysport_set_coalesce(struct net_device *dev, 643 struct ethtool_coalesce *ec, 644 struct kernel_ethtool_coalesce *kernel_coal, 645 struct netlink_ext_ack *extack) 646 { 647 struct bcm_sysport_priv *priv = netdev_priv(dev); 648 struct dim_cq_moder moder; 649 u32 usecs, pkts; 650 unsigned int i; 651 652 /* Base system clock is 125Mhz, DMA timeout is this reference clock 653 * divided by 1024, which yield roughly 8.192 us, our maximum value has 654 * to fit in the RING_TIMEOUT_MASK (16 bits). 655 */ 656 if (ec->tx_max_coalesced_frames > RING_INTR_THRESH_MASK || 657 ec->tx_coalesce_usecs > (RING_TIMEOUT_MASK * 8) + 1 || 658 ec->rx_max_coalesced_frames > RDMA_INTR_THRESH_MASK || 659 ec->rx_coalesce_usecs > (RDMA_TIMEOUT_MASK * 8) + 1) 660 return -EINVAL; 661 662 if ((ec->tx_coalesce_usecs == 0 && ec->tx_max_coalesced_frames == 0) || 663 (ec->rx_coalesce_usecs == 0 && ec->rx_max_coalesced_frames == 0)) 664 return -EINVAL; 665 666 for (i = 0; i < dev->num_tx_queues; i++) 667 bcm_sysport_set_tx_coalesce(&priv->tx_rings[i], ec); 668 669 priv->rx_coalesce_usecs = ec->rx_coalesce_usecs; 670 priv->rx_max_coalesced_frames = ec->rx_max_coalesced_frames; 671 usecs = priv->rx_coalesce_usecs; 672 pkts = priv->rx_max_coalesced_frames; 673 674 if (ec->use_adaptive_rx_coalesce && !priv->dim.use_dim) { 675 moder = net_dim_get_def_rx_moderation(priv->dim.dim.mode); 676 usecs = moder.usec; 677 pkts = moder.pkts; 678 } 679 680 priv->dim.use_dim = ec->use_adaptive_rx_coalesce; 681 682 /* Apply desired coalescing parameters */ 683 bcm_sysport_set_rx_coalesce(priv, usecs, pkts); 684 685 return 0; 686 } 687 688 static void bcm_sysport_free_cb(struct bcm_sysport_cb *cb) 689 { 690 dev_consume_skb_any(cb->skb); 691 cb->skb = NULL; 692 dma_unmap_addr_set(cb, dma_addr, 0); 693 } 694 695 static struct sk_buff *bcm_sysport_rx_refill(struct bcm_sysport_priv *priv, 696 struct bcm_sysport_cb *cb) 697 { 698 struct device *kdev = &priv->pdev->dev; 699 struct net_device *ndev = priv->netdev; 700 struct sk_buff *skb, *rx_skb; 701 dma_addr_t mapping; 702 703 /* Allocate a new SKB for a new packet */ 704 skb = __netdev_alloc_skb(priv->netdev, RX_BUF_LENGTH, 705 GFP_ATOMIC | __GFP_NOWARN); 706 if (!skb) { 707 priv->mib.alloc_rx_buff_failed++; 708 netif_err(priv, rx_err, ndev, "SKB alloc failed\n"); 709 return NULL; 710 } 711 712 mapping = dma_map_single(kdev, skb->data, 713 RX_BUF_LENGTH, DMA_FROM_DEVICE); 714 if (dma_mapping_error(kdev, mapping)) { 715 priv->mib.rx_dma_failed++; 716 dev_kfree_skb_any(skb); 717 netif_err(priv, rx_err, ndev, "DMA mapping failure\n"); 718 return NULL; 719 } 720 721 /* Grab the current SKB on the ring */ 722 rx_skb = cb->skb; 723 if (likely(rx_skb)) 724 dma_unmap_single(kdev, dma_unmap_addr(cb, dma_addr), 725 RX_BUF_LENGTH, DMA_FROM_DEVICE); 726 727 /* Put the new SKB on the ring */ 728 cb->skb = skb; 729 dma_unmap_addr_set(cb, dma_addr, mapping); 730 dma_desc_set_addr(priv, cb->bd_addr, mapping); 731 732 netif_dbg(priv, rx_status, ndev, "RX refill\n"); 733 734 /* Return the current SKB to the caller */ 735 return rx_skb; 736 } 737 738 static int bcm_sysport_alloc_rx_bufs(struct bcm_sysport_priv *priv) 739 { 740 struct bcm_sysport_cb *cb; 741 struct sk_buff *skb; 742 unsigned int i; 743 744 for (i = 0; i < priv->num_rx_bds; i++) { 745 cb = &priv->rx_cbs[i]; 746 skb = bcm_sysport_rx_refill(priv, cb); 747 dev_kfree_skb(skb); 748 if (!cb->skb) 749 return -ENOMEM; 750 } 751 752 return 0; 753 } 754 755 /* Poll the hardware for up to budget packets to process */ 756 static unsigned int bcm_sysport_desc_rx(struct bcm_sysport_priv *priv, 757 unsigned int budget) 758 { 759 struct bcm_sysport_stats64 *stats64 = &priv->stats64; 760 struct net_device *ndev = priv->netdev; 761 unsigned int processed = 0, to_process; 762 unsigned int processed_bytes = 0; 763 struct bcm_sysport_cb *cb; 764 struct sk_buff *skb; 765 unsigned int p_index; 766 u16 len, status; 767 struct bcm_rsb *rsb; 768 769 /* Clear status before servicing to reduce spurious interrupts */ 770 intrl2_0_writel(priv, INTRL2_0_RDMA_MBDONE, INTRL2_CPU_CLEAR); 771 772 /* Determine how much we should process since last call, SYSTEMPORT Lite 773 * groups the producer and consumer indexes into the same 32-bit 774 * which we access using RDMA_CONS_INDEX 775 */ 776 if (!priv->is_lite) 777 p_index = rdma_readl(priv, RDMA_PROD_INDEX); 778 else 779 p_index = rdma_readl(priv, RDMA_CONS_INDEX); 780 p_index &= RDMA_PROD_INDEX_MASK; 781 782 to_process = (p_index - priv->rx_c_index) & RDMA_CONS_INDEX_MASK; 783 784 netif_dbg(priv, rx_status, ndev, 785 "p_index=%d rx_c_index=%d to_process=%d\n", 786 p_index, priv->rx_c_index, to_process); 787 788 while ((processed < to_process) && (processed < budget)) { 789 cb = &priv->rx_cbs[priv->rx_read_ptr]; 790 skb = bcm_sysport_rx_refill(priv, cb); 791 792 793 /* We do not have a backing SKB, so we do not a corresponding 794 * DMA mapping for this incoming packet since 795 * bcm_sysport_rx_refill always either has both skb and mapping 796 * or none. 797 */ 798 if (unlikely(!skb)) { 799 netif_err(priv, rx_err, ndev, "out of memory!\n"); 800 ndev->stats.rx_dropped++; 801 ndev->stats.rx_errors++; 802 goto next; 803 } 804 805 /* Extract the Receive Status Block prepended */ 806 rsb = (struct bcm_rsb *)skb->data; 807 len = (rsb->rx_status_len >> DESC_LEN_SHIFT) & DESC_LEN_MASK; 808 status = (rsb->rx_status_len >> DESC_STATUS_SHIFT) & 809 DESC_STATUS_MASK; 810 811 netif_dbg(priv, rx_status, ndev, 812 "p=%d, c=%d, rd_ptr=%d, len=%d, flag=0x%04x\n", 813 p_index, priv->rx_c_index, priv->rx_read_ptr, 814 len, status); 815 816 if (unlikely(len > RX_BUF_LENGTH)) { 817 netif_err(priv, rx_status, ndev, "oversized packet\n"); 818 ndev->stats.rx_length_errors++; 819 ndev->stats.rx_errors++; 820 dev_kfree_skb_any(skb); 821 goto next; 822 } 823 824 if (unlikely(!(status & DESC_EOP) || !(status & DESC_SOP))) { 825 netif_err(priv, rx_status, ndev, "fragmented packet!\n"); 826 ndev->stats.rx_dropped++; 827 ndev->stats.rx_errors++; 828 dev_kfree_skb_any(skb); 829 goto next; 830 } 831 832 if (unlikely(status & (RX_STATUS_ERR | RX_STATUS_OVFLOW))) { 833 netif_err(priv, rx_err, ndev, "error packet\n"); 834 if (status & RX_STATUS_OVFLOW) 835 ndev->stats.rx_over_errors++; 836 ndev->stats.rx_dropped++; 837 ndev->stats.rx_errors++; 838 dev_kfree_skb_any(skb); 839 goto next; 840 } 841 842 skb_put(skb, len); 843 844 /* Hardware validated our checksum */ 845 if (likely(status & DESC_L4_CSUM)) 846 skb->ip_summed = CHECKSUM_UNNECESSARY; 847 848 /* Hardware pre-pends packets with 2bytes before Ethernet 849 * header plus we have the Receive Status Block, strip off all 850 * of this from the SKB. 851 */ 852 skb_pull(skb, sizeof(*rsb) + 2); 853 len -= (sizeof(*rsb) + 2); 854 processed_bytes += len; 855 856 /* UniMAC may forward CRC */ 857 if (priv->crc_fwd) { 858 skb_trim(skb, len - ETH_FCS_LEN); 859 len -= ETH_FCS_LEN; 860 } 861 862 skb->protocol = eth_type_trans(skb, ndev); 863 ndev->stats.rx_packets++; 864 ndev->stats.rx_bytes += len; 865 u64_stats_update_begin(&priv->syncp); 866 stats64->rx_packets++; 867 stats64->rx_bytes += len; 868 u64_stats_update_end(&priv->syncp); 869 870 napi_gro_receive(&priv->napi, skb); 871 next: 872 processed++; 873 priv->rx_read_ptr++; 874 875 if (priv->rx_read_ptr == priv->num_rx_bds) 876 priv->rx_read_ptr = 0; 877 } 878 879 priv->dim.packets = processed; 880 priv->dim.bytes = processed_bytes; 881 882 return processed; 883 } 884 885 static void bcm_sysport_tx_reclaim_one(struct bcm_sysport_tx_ring *ring, 886 struct bcm_sysport_cb *cb, 887 unsigned int *bytes_compl, 888 unsigned int *pkts_compl) 889 { 890 struct bcm_sysport_priv *priv = ring->priv; 891 struct device *kdev = &priv->pdev->dev; 892 893 if (cb->skb) { 894 *bytes_compl += cb->skb->len; 895 dma_unmap_single(kdev, dma_unmap_addr(cb, dma_addr), 896 dma_unmap_len(cb, dma_len), 897 DMA_TO_DEVICE); 898 (*pkts_compl)++; 899 bcm_sysport_free_cb(cb); 900 /* SKB fragment */ 901 } else if (dma_unmap_addr(cb, dma_addr)) { 902 *bytes_compl += dma_unmap_len(cb, dma_len); 903 dma_unmap_page(kdev, dma_unmap_addr(cb, dma_addr), 904 dma_unmap_len(cb, dma_len), DMA_TO_DEVICE); 905 dma_unmap_addr_set(cb, dma_addr, 0); 906 } 907 } 908 909 /* Reclaim queued SKBs for transmission completion, lockless version */ 910 static unsigned int __bcm_sysport_tx_reclaim(struct bcm_sysport_priv *priv, 911 struct bcm_sysport_tx_ring *ring) 912 { 913 unsigned int pkts_compl = 0, bytes_compl = 0; 914 struct net_device *ndev = priv->netdev; 915 unsigned int txbds_processed = 0; 916 struct bcm_sysport_cb *cb; 917 unsigned int txbds_ready; 918 unsigned int c_index; 919 u32 hw_ind; 920 921 /* Clear status before servicing to reduce spurious interrupts */ 922 if (!ring->priv->is_lite) 923 intrl2_1_writel(ring->priv, BIT(ring->index), INTRL2_CPU_CLEAR); 924 else 925 intrl2_0_writel(ring->priv, BIT(ring->index + 926 INTRL2_0_TDMA_MBDONE_SHIFT), INTRL2_CPU_CLEAR); 927 928 /* Compute how many descriptors have been processed since last call */ 929 hw_ind = tdma_readl(priv, TDMA_DESC_RING_PROD_CONS_INDEX(ring->index)); 930 c_index = (hw_ind >> RING_CONS_INDEX_SHIFT) & RING_CONS_INDEX_MASK; 931 txbds_ready = (c_index - ring->c_index) & RING_CONS_INDEX_MASK; 932 933 netif_dbg(priv, tx_done, ndev, 934 "ring=%d old_c_index=%u c_index=%u txbds_ready=%u\n", 935 ring->index, ring->c_index, c_index, txbds_ready); 936 937 while (txbds_processed < txbds_ready) { 938 cb = &ring->cbs[ring->clean_index]; 939 bcm_sysport_tx_reclaim_one(ring, cb, &bytes_compl, &pkts_compl); 940 941 ring->desc_count++; 942 txbds_processed++; 943 944 if (likely(ring->clean_index < ring->size - 1)) 945 ring->clean_index++; 946 else 947 ring->clean_index = 0; 948 } 949 950 u64_stats_update_begin(&priv->syncp); 951 ring->packets += pkts_compl; 952 ring->bytes += bytes_compl; 953 u64_stats_update_end(&priv->syncp); 954 955 ring->c_index = c_index; 956 957 netif_dbg(priv, tx_done, ndev, 958 "ring=%d c_index=%d pkts_compl=%d, bytes_compl=%d\n", 959 ring->index, ring->c_index, pkts_compl, bytes_compl); 960 961 return pkts_compl; 962 } 963 964 /* Locked version of the per-ring TX reclaim routine */ 965 static unsigned int bcm_sysport_tx_reclaim(struct bcm_sysport_priv *priv, 966 struct bcm_sysport_tx_ring *ring) 967 { 968 struct netdev_queue *txq; 969 unsigned int released; 970 unsigned long flags; 971 972 txq = netdev_get_tx_queue(priv->netdev, ring->index); 973 974 spin_lock_irqsave(&ring->lock, flags); 975 released = __bcm_sysport_tx_reclaim(priv, ring); 976 if (released) 977 netif_tx_wake_queue(txq); 978 979 spin_unlock_irqrestore(&ring->lock, flags); 980 981 return released; 982 } 983 984 /* Locked version of the per-ring TX reclaim, but does not wake the queue */ 985 static void bcm_sysport_tx_clean(struct bcm_sysport_priv *priv, 986 struct bcm_sysport_tx_ring *ring) 987 { 988 unsigned long flags; 989 990 spin_lock_irqsave(&ring->lock, flags); 991 __bcm_sysport_tx_reclaim(priv, ring); 992 spin_unlock_irqrestore(&ring->lock, flags); 993 } 994 995 static int bcm_sysport_tx_poll(struct napi_struct *napi, int budget) 996 { 997 struct bcm_sysport_tx_ring *ring = 998 container_of(napi, struct bcm_sysport_tx_ring, napi); 999 unsigned int work_done = 0; 1000 1001 work_done = bcm_sysport_tx_reclaim(ring->priv, ring); 1002 1003 if (work_done == 0) { 1004 napi_complete(napi); 1005 /* re-enable TX interrupt */ 1006 if (!ring->priv->is_lite) 1007 intrl2_1_mask_clear(ring->priv, BIT(ring->index)); 1008 else 1009 intrl2_0_mask_clear(ring->priv, BIT(ring->index + 1010 INTRL2_0_TDMA_MBDONE_SHIFT)); 1011 1012 return 0; 1013 } 1014 1015 return budget; 1016 } 1017 1018 static void bcm_sysport_tx_reclaim_all(struct bcm_sysport_priv *priv) 1019 { 1020 unsigned int q; 1021 1022 for (q = 0; q < priv->netdev->num_tx_queues; q++) 1023 bcm_sysport_tx_reclaim(priv, &priv->tx_rings[q]); 1024 } 1025 1026 static int bcm_sysport_poll(struct napi_struct *napi, int budget) 1027 { 1028 struct bcm_sysport_priv *priv = 1029 container_of(napi, struct bcm_sysport_priv, napi); 1030 struct dim_sample dim_sample = {}; 1031 unsigned int work_done = 0; 1032 1033 work_done = bcm_sysport_desc_rx(priv, budget); 1034 1035 priv->rx_c_index += work_done; 1036 priv->rx_c_index &= RDMA_CONS_INDEX_MASK; 1037 1038 /* SYSTEMPORT Lite groups the producer/consumer index, producer is 1039 * maintained by HW, but writes to it will be ignore while RDMA 1040 * is active 1041 */ 1042 if (!priv->is_lite) 1043 rdma_writel(priv, priv->rx_c_index, RDMA_CONS_INDEX); 1044 else 1045 rdma_writel(priv, priv->rx_c_index << 16, RDMA_CONS_INDEX); 1046 1047 if (work_done < budget) { 1048 napi_complete_done(napi, work_done); 1049 /* re-enable RX interrupts */ 1050 intrl2_0_mask_clear(priv, INTRL2_0_RDMA_MBDONE); 1051 } 1052 1053 if (priv->dim.use_dim) { 1054 dim_update_sample(priv->dim.event_ctr, priv->dim.packets, 1055 priv->dim.bytes, &dim_sample); 1056 net_dim(&priv->dim.dim, dim_sample); 1057 } 1058 1059 return work_done; 1060 } 1061 1062 static void mpd_enable_set(struct bcm_sysport_priv *priv, bool enable) 1063 { 1064 u32 reg, bit; 1065 1066 reg = umac_readl(priv, UMAC_MPD_CTRL); 1067 if (enable) 1068 reg |= MPD_EN; 1069 else 1070 reg &= ~MPD_EN; 1071 umac_writel(priv, reg, UMAC_MPD_CTRL); 1072 1073 if (priv->is_lite) 1074 bit = RBUF_ACPI_EN_LITE; 1075 else 1076 bit = RBUF_ACPI_EN; 1077 1078 reg = rbuf_readl(priv, RBUF_CONTROL); 1079 if (enable) 1080 reg |= bit; 1081 else 1082 reg &= ~bit; 1083 rbuf_writel(priv, reg, RBUF_CONTROL); 1084 } 1085 1086 static void bcm_sysport_resume_from_wol(struct bcm_sysport_priv *priv) 1087 { 1088 unsigned int index; 1089 u32 reg; 1090 1091 /* Disable RXCHK, active filters and Broadcom tag matching */ 1092 reg = rxchk_readl(priv, RXCHK_CONTROL); 1093 reg &= ~(RXCHK_BRCM_TAG_MATCH_MASK << 1094 RXCHK_BRCM_TAG_MATCH_SHIFT | RXCHK_EN | RXCHK_BRCM_TAG_EN); 1095 rxchk_writel(priv, reg, RXCHK_CONTROL); 1096 1097 /* Make sure we restore correct CID index in case HW lost 1098 * its context during deep idle state 1099 */ 1100 for_each_set_bit(index, priv->filters, RXCHK_BRCM_TAG_MAX) { 1101 rxchk_writel(priv, priv->filters_loc[index] << 1102 RXCHK_BRCM_TAG_CID_SHIFT, RXCHK_BRCM_TAG(index)); 1103 rxchk_writel(priv, 0xff00ffff, RXCHK_BRCM_TAG_MASK(index)); 1104 } 1105 1106 /* Clear the MagicPacket detection logic */ 1107 mpd_enable_set(priv, false); 1108 1109 reg = intrl2_0_readl(priv, INTRL2_CPU_STATUS); 1110 if (reg & INTRL2_0_MPD) 1111 netdev_info(priv->netdev, "Wake-on-LAN (MPD) interrupt!\n"); 1112 1113 if (reg & INTRL2_0_BRCM_MATCH_TAG) { 1114 reg = rxchk_readl(priv, RXCHK_BRCM_TAG_MATCH_STATUS) & 1115 RXCHK_BRCM_TAG_MATCH_MASK; 1116 netdev_info(priv->netdev, 1117 "Wake-on-LAN (filters 0x%02x) interrupt!\n", reg); 1118 } 1119 1120 netif_dbg(priv, wol, priv->netdev, "resumed from WOL\n"); 1121 } 1122 1123 static void bcm_sysport_dim_work(struct work_struct *work) 1124 { 1125 struct dim *dim = container_of(work, struct dim, work); 1126 struct bcm_sysport_net_dim *ndim = 1127 container_of(dim, struct bcm_sysport_net_dim, dim); 1128 struct bcm_sysport_priv *priv = 1129 container_of(ndim, struct bcm_sysport_priv, dim); 1130 struct dim_cq_moder cur_profile = net_dim_get_rx_moderation(dim->mode, 1131 dim->profile_ix); 1132 1133 bcm_sysport_set_rx_coalesce(priv, cur_profile.usec, cur_profile.pkts); 1134 dim->state = DIM_START_MEASURE; 1135 } 1136 1137 /* RX and misc interrupt routine */ 1138 static irqreturn_t bcm_sysport_rx_isr(int irq, void *dev_id) 1139 { 1140 struct net_device *dev = dev_id; 1141 struct bcm_sysport_priv *priv = netdev_priv(dev); 1142 struct bcm_sysport_tx_ring *txr; 1143 unsigned int ring, ring_bit; 1144 1145 priv->irq0_stat = intrl2_0_readl(priv, INTRL2_CPU_STATUS) & 1146 ~intrl2_0_readl(priv, INTRL2_CPU_MASK_STATUS); 1147 intrl2_0_writel(priv, priv->irq0_stat, INTRL2_CPU_CLEAR); 1148 1149 if (unlikely(priv->irq0_stat == 0)) { 1150 netdev_warn(priv->netdev, "spurious RX interrupt\n"); 1151 return IRQ_NONE; 1152 } 1153 1154 if (priv->irq0_stat & INTRL2_0_RDMA_MBDONE) { 1155 priv->dim.event_ctr++; 1156 if (likely(napi_schedule_prep(&priv->napi))) { 1157 /* disable RX interrupts */ 1158 intrl2_0_mask_set(priv, INTRL2_0_RDMA_MBDONE); 1159 __napi_schedule_irqoff(&priv->napi); 1160 } 1161 } 1162 1163 /* TX ring is full, perform a full reclaim since we do not know 1164 * which one would trigger this interrupt 1165 */ 1166 if (priv->irq0_stat & INTRL2_0_TX_RING_FULL) 1167 bcm_sysport_tx_reclaim_all(priv); 1168 1169 if (!priv->is_lite) 1170 goto out; 1171 1172 for (ring = 0; ring < dev->num_tx_queues; ring++) { 1173 ring_bit = BIT(ring + INTRL2_0_TDMA_MBDONE_SHIFT); 1174 if (!(priv->irq0_stat & ring_bit)) 1175 continue; 1176 1177 txr = &priv->tx_rings[ring]; 1178 1179 if (likely(napi_schedule_prep(&txr->napi))) { 1180 intrl2_0_mask_set(priv, ring_bit); 1181 __napi_schedule(&txr->napi); 1182 } 1183 } 1184 out: 1185 return IRQ_HANDLED; 1186 } 1187 1188 /* TX interrupt service routine */ 1189 static irqreturn_t bcm_sysport_tx_isr(int irq, void *dev_id) 1190 { 1191 struct net_device *dev = dev_id; 1192 struct bcm_sysport_priv *priv = netdev_priv(dev); 1193 struct bcm_sysport_tx_ring *txr; 1194 unsigned int ring; 1195 1196 priv->irq1_stat = intrl2_1_readl(priv, INTRL2_CPU_STATUS) & 1197 ~intrl2_1_readl(priv, INTRL2_CPU_MASK_STATUS); 1198 intrl2_1_writel(priv, 0xffffffff, INTRL2_CPU_CLEAR); 1199 1200 if (unlikely(priv->irq1_stat == 0)) { 1201 netdev_warn(priv->netdev, "spurious TX interrupt\n"); 1202 return IRQ_NONE; 1203 } 1204 1205 for (ring = 0; ring < dev->num_tx_queues; ring++) { 1206 if (!(priv->irq1_stat & BIT(ring))) 1207 continue; 1208 1209 txr = &priv->tx_rings[ring]; 1210 1211 if (likely(napi_schedule_prep(&txr->napi))) { 1212 intrl2_1_mask_set(priv, BIT(ring)); 1213 __napi_schedule_irqoff(&txr->napi); 1214 } 1215 } 1216 1217 return IRQ_HANDLED; 1218 } 1219 1220 static irqreturn_t bcm_sysport_wol_isr(int irq, void *dev_id) 1221 { 1222 struct bcm_sysport_priv *priv = dev_id; 1223 1224 pm_wakeup_event(&priv->pdev->dev, 0); 1225 1226 return IRQ_HANDLED; 1227 } 1228 1229 #ifdef CONFIG_NET_POLL_CONTROLLER 1230 static void bcm_sysport_poll_controller(struct net_device *dev) 1231 { 1232 struct bcm_sysport_priv *priv = netdev_priv(dev); 1233 1234 disable_irq(priv->irq0); 1235 bcm_sysport_rx_isr(priv->irq0, priv); 1236 enable_irq(priv->irq0); 1237 1238 if (!priv->is_lite) { 1239 disable_irq(priv->irq1); 1240 bcm_sysport_tx_isr(priv->irq1, priv); 1241 enable_irq(priv->irq1); 1242 } 1243 } 1244 #endif 1245 1246 static struct sk_buff *bcm_sysport_insert_tsb(struct sk_buff *skb, 1247 struct net_device *dev) 1248 { 1249 struct bcm_sysport_priv *priv = netdev_priv(dev); 1250 struct sk_buff *nskb; 1251 struct bcm_tsb *tsb; 1252 u32 csum_info; 1253 u8 ip_proto; 1254 u16 csum_start; 1255 __be16 ip_ver; 1256 1257 /* Re-allocate SKB if needed */ 1258 if (unlikely(skb_headroom(skb) < sizeof(*tsb))) { 1259 nskb = skb_realloc_headroom(skb, sizeof(*tsb)); 1260 if (!nskb) { 1261 dev_kfree_skb_any(skb); 1262 priv->mib.tx_realloc_tsb_failed++; 1263 dev->stats.tx_errors++; 1264 dev->stats.tx_dropped++; 1265 return NULL; 1266 } 1267 dev_consume_skb_any(skb); 1268 skb = nskb; 1269 priv->mib.tx_realloc_tsb++; 1270 } 1271 1272 tsb = skb_push(skb, sizeof(*tsb)); 1273 /* Zero-out TSB by default */ 1274 memset(tsb, 0, sizeof(*tsb)); 1275 1276 if (skb_vlan_tag_present(skb)) { 1277 tsb->pcp_dei_vid = skb_vlan_tag_get_prio(skb) & PCP_DEI_MASK; 1278 tsb->pcp_dei_vid |= (u32)skb_vlan_tag_get_id(skb) << VID_SHIFT; 1279 } 1280 1281 if (skb->ip_summed == CHECKSUM_PARTIAL) { 1282 ip_ver = skb->protocol; 1283 switch (ip_ver) { 1284 case htons(ETH_P_IP): 1285 ip_proto = ip_hdr(skb)->protocol; 1286 break; 1287 case htons(ETH_P_IPV6): 1288 ip_proto = ipv6_hdr(skb)->nexthdr; 1289 break; 1290 default: 1291 return skb; 1292 } 1293 1294 /* Get the checksum offset and the L4 (transport) offset */ 1295 csum_start = skb_checksum_start_offset(skb) - sizeof(*tsb); 1296 /* Account for the HW inserted VLAN tag */ 1297 if (skb_vlan_tag_present(skb)) 1298 csum_start += VLAN_HLEN; 1299 csum_info = (csum_start + skb->csum_offset) & L4_CSUM_PTR_MASK; 1300 csum_info |= (csum_start << L4_PTR_SHIFT); 1301 1302 if (ip_proto == IPPROTO_TCP || ip_proto == IPPROTO_UDP) { 1303 csum_info |= L4_LENGTH_VALID; 1304 if (ip_proto == IPPROTO_UDP && 1305 ip_ver == htons(ETH_P_IP)) 1306 csum_info |= L4_UDP; 1307 } else { 1308 csum_info = 0; 1309 } 1310 1311 tsb->l4_ptr_dest_map = csum_info; 1312 } 1313 1314 return skb; 1315 } 1316 1317 static netdev_tx_t bcm_sysport_xmit(struct sk_buff *skb, 1318 struct net_device *dev) 1319 { 1320 struct bcm_sysport_priv *priv = netdev_priv(dev); 1321 struct device *kdev = &priv->pdev->dev; 1322 struct bcm_sysport_tx_ring *ring; 1323 unsigned long flags, desc_flags; 1324 struct bcm_sysport_cb *cb; 1325 struct netdev_queue *txq; 1326 u32 len_status, addr_lo; 1327 unsigned int skb_len; 1328 dma_addr_t mapping; 1329 u16 queue; 1330 int ret; 1331 1332 queue = skb_get_queue_mapping(skb); 1333 txq = netdev_get_tx_queue(dev, queue); 1334 ring = &priv->tx_rings[queue]; 1335 1336 /* lock against tx reclaim in BH context and TX ring full interrupt */ 1337 spin_lock_irqsave(&ring->lock, flags); 1338 if (unlikely(ring->desc_count == 0)) { 1339 netif_tx_stop_queue(txq); 1340 netdev_err(dev, "queue %d awake and ring full!\n", queue); 1341 ret = NETDEV_TX_BUSY; 1342 goto out; 1343 } 1344 1345 /* Insert TSB and checksum infos */ 1346 if (priv->tsb_en) { 1347 skb = bcm_sysport_insert_tsb(skb, dev); 1348 if (!skb) { 1349 ret = NETDEV_TX_OK; 1350 goto out; 1351 } 1352 } 1353 1354 skb_len = skb->len; 1355 1356 mapping = dma_map_single(kdev, skb->data, skb_len, DMA_TO_DEVICE); 1357 if (dma_mapping_error(kdev, mapping)) { 1358 priv->mib.tx_dma_failed++; 1359 netif_err(priv, tx_err, dev, "DMA map failed at %p (len=%d)\n", 1360 skb->data, skb_len); 1361 ret = NETDEV_TX_OK; 1362 dev_kfree_skb_any(skb); 1363 goto out; 1364 } 1365 1366 /* Remember the SKB for future freeing */ 1367 cb = &ring->cbs[ring->curr_desc]; 1368 cb->skb = skb; 1369 dma_unmap_addr_set(cb, dma_addr, mapping); 1370 dma_unmap_len_set(cb, dma_len, skb_len); 1371 1372 addr_lo = lower_32_bits(mapping); 1373 len_status = upper_32_bits(mapping) & DESC_ADDR_HI_MASK; 1374 len_status |= (skb_len << DESC_LEN_SHIFT); 1375 len_status |= (DESC_SOP | DESC_EOP | TX_STATUS_APP_CRC) << 1376 DESC_STATUS_SHIFT; 1377 if (skb->ip_summed == CHECKSUM_PARTIAL) 1378 len_status |= (DESC_L4_CSUM << DESC_STATUS_SHIFT); 1379 if (skb_vlan_tag_present(skb)) 1380 len_status |= (TX_STATUS_VLAN_VID_TSB << DESC_STATUS_SHIFT); 1381 1382 ring->curr_desc++; 1383 if (ring->curr_desc == ring->size) 1384 ring->curr_desc = 0; 1385 ring->desc_count--; 1386 1387 /* Ports are latched, so write upper address first */ 1388 spin_lock_irqsave(&priv->desc_lock, desc_flags); 1389 tdma_writel(priv, len_status, TDMA_WRITE_PORT_HI(ring->index)); 1390 tdma_writel(priv, addr_lo, TDMA_WRITE_PORT_LO(ring->index)); 1391 spin_unlock_irqrestore(&priv->desc_lock, desc_flags); 1392 1393 /* Check ring space and update SW control flow */ 1394 if (ring->desc_count == 0) 1395 netif_tx_stop_queue(txq); 1396 1397 netif_dbg(priv, tx_queued, dev, "ring=%d desc_count=%d, curr_desc=%d\n", 1398 ring->index, ring->desc_count, ring->curr_desc); 1399 1400 ret = NETDEV_TX_OK; 1401 out: 1402 spin_unlock_irqrestore(&ring->lock, flags); 1403 return ret; 1404 } 1405 1406 static void bcm_sysport_tx_timeout(struct net_device *dev, unsigned int txqueue) 1407 { 1408 netdev_warn(dev, "transmit timeout!\n"); 1409 1410 netif_trans_update(dev); 1411 dev->stats.tx_errors++; 1412 1413 netif_tx_wake_all_queues(dev); 1414 } 1415 1416 /* phylib adjust link callback */ 1417 static void bcm_sysport_adj_link(struct net_device *dev) 1418 { 1419 struct bcm_sysport_priv *priv = netdev_priv(dev); 1420 struct phy_device *phydev = dev->phydev; 1421 unsigned int changed = 0; 1422 u32 cmd_bits = 0, reg; 1423 1424 if (priv->old_link != phydev->link) { 1425 changed = 1; 1426 priv->old_link = phydev->link; 1427 } 1428 1429 if (priv->old_duplex != phydev->duplex) { 1430 changed = 1; 1431 priv->old_duplex = phydev->duplex; 1432 } 1433 1434 if (priv->is_lite) 1435 goto out; 1436 1437 switch (phydev->speed) { 1438 case SPEED_2500: 1439 cmd_bits = CMD_SPEED_2500; 1440 break; 1441 case SPEED_1000: 1442 cmd_bits = CMD_SPEED_1000; 1443 break; 1444 case SPEED_100: 1445 cmd_bits = CMD_SPEED_100; 1446 break; 1447 case SPEED_10: 1448 cmd_bits = CMD_SPEED_10; 1449 break; 1450 default: 1451 break; 1452 } 1453 cmd_bits <<= CMD_SPEED_SHIFT; 1454 1455 if (phydev->duplex == DUPLEX_HALF) 1456 cmd_bits |= CMD_HD_EN; 1457 1458 if (priv->old_pause != phydev->pause) { 1459 changed = 1; 1460 priv->old_pause = phydev->pause; 1461 } 1462 1463 if (!phydev->pause) 1464 cmd_bits |= CMD_RX_PAUSE_IGNORE | CMD_TX_PAUSE_IGNORE; 1465 1466 if (!changed) 1467 return; 1468 1469 if (phydev->link) { 1470 reg = umac_readl(priv, UMAC_CMD); 1471 reg &= ~((CMD_SPEED_MASK << CMD_SPEED_SHIFT) | 1472 CMD_HD_EN | CMD_RX_PAUSE_IGNORE | 1473 CMD_TX_PAUSE_IGNORE); 1474 reg |= cmd_bits; 1475 umac_writel(priv, reg, UMAC_CMD); 1476 } 1477 out: 1478 if (changed) 1479 phy_print_status(phydev); 1480 } 1481 1482 static void bcm_sysport_init_dim(struct bcm_sysport_priv *priv, 1483 void (*cb)(struct work_struct *work)) 1484 { 1485 struct bcm_sysport_net_dim *dim = &priv->dim; 1486 1487 INIT_WORK(&dim->dim.work, cb); 1488 dim->dim.mode = DIM_CQ_PERIOD_MODE_START_FROM_EQE; 1489 dim->event_ctr = 0; 1490 dim->packets = 0; 1491 dim->bytes = 0; 1492 } 1493 1494 static void bcm_sysport_init_rx_coalesce(struct bcm_sysport_priv *priv) 1495 { 1496 struct bcm_sysport_net_dim *dim = &priv->dim; 1497 struct dim_cq_moder moder; 1498 u32 usecs, pkts; 1499 1500 usecs = priv->rx_coalesce_usecs; 1501 pkts = priv->rx_max_coalesced_frames; 1502 1503 /* If DIM was enabled, re-apply default parameters */ 1504 if (dim->use_dim) { 1505 moder = net_dim_get_def_rx_moderation(dim->dim.mode); 1506 usecs = moder.usec; 1507 pkts = moder.pkts; 1508 } 1509 1510 bcm_sysport_set_rx_coalesce(priv, usecs, pkts); 1511 } 1512 1513 static int bcm_sysport_init_tx_ring(struct bcm_sysport_priv *priv, 1514 unsigned int index) 1515 { 1516 struct bcm_sysport_tx_ring *ring = &priv->tx_rings[index]; 1517 size_t size; 1518 u32 reg; 1519 1520 /* Simple descriptors partitioning for now */ 1521 size = 256; 1522 1523 ring->cbs = kcalloc(size, sizeof(struct bcm_sysport_cb), GFP_KERNEL); 1524 if (!ring->cbs) { 1525 netif_err(priv, hw, priv->netdev, "CB allocation failed\n"); 1526 return -ENOMEM; 1527 } 1528 1529 /* Initialize SW view of the ring */ 1530 spin_lock_init(&ring->lock); 1531 ring->priv = priv; 1532 netif_napi_add_tx(priv->netdev, &ring->napi, bcm_sysport_tx_poll); 1533 ring->index = index; 1534 ring->size = size; 1535 ring->clean_index = 0; 1536 ring->alloc_size = ring->size; 1537 ring->desc_count = ring->size; 1538 ring->curr_desc = 0; 1539 1540 /* Initialize HW ring */ 1541 tdma_writel(priv, RING_EN, TDMA_DESC_RING_HEAD_TAIL_PTR(index)); 1542 tdma_writel(priv, 0, TDMA_DESC_RING_COUNT(index)); 1543 tdma_writel(priv, 1, TDMA_DESC_RING_INTR_CONTROL(index)); 1544 tdma_writel(priv, 0, TDMA_DESC_RING_PROD_CONS_INDEX(index)); 1545 1546 /* Configure QID and port mapping */ 1547 reg = tdma_readl(priv, TDMA_DESC_RING_MAPPING(index)); 1548 reg &= ~(RING_QID_MASK | RING_PORT_ID_MASK << RING_PORT_ID_SHIFT); 1549 if (ring->inspect) { 1550 reg |= ring->switch_queue & RING_QID_MASK; 1551 reg |= ring->switch_port << RING_PORT_ID_SHIFT; 1552 } else { 1553 reg |= RING_IGNORE_STATUS; 1554 } 1555 tdma_writel(priv, reg, TDMA_DESC_RING_MAPPING(index)); 1556 reg = 0; 1557 /* Adjust the packet size calculations if SYSTEMPORT is responsible 1558 * for HW insertion of VLAN tags 1559 */ 1560 if (priv->netdev->features & NETIF_F_HW_VLAN_CTAG_TX) 1561 reg = VLAN_HLEN << RING_PKT_SIZE_ADJ_SHIFT; 1562 tdma_writel(priv, reg, TDMA_DESC_RING_PCP_DEI_VID(index)); 1563 1564 /* Enable ACB algorithm 2 */ 1565 reg = tdma_readl(priv, TDMA_CONTROL); 1566 reg |= tdma_control_bit(priv, ACB_ALGO); 1567 tdma_writel(priv, reg, TDMA_CONTROL); 1568 1569 /* Do not use tdma_control_bit() here because TSB_SWAP1 collides 1570 * with the original definition of ACB_ALGO 1571 */ 1572 reg = tdma_readl(priv, TDMA_CONTROL); 1573 if (priv->is_lite) 1574 reg &= ~BIT(TSB_SWAP1); 1575 /* Set a correct TSB format based on host endian */ 1576 if (!IS_ENABLED(CONFIG_CPU_BIG_ENDIAN)) 1577 reg |= tdma_control_bit(priv, TSB_SWAP0); 1578 else 1579 reg &= ~tdma_control_bit(priv, TSB_SWAP0); 1580 tdma_writel(priv, reg, TDMA_CONTROL); 1581 1582 /* Program the number of descriptors as MAX_THRESHOLD and half of 1583 * its size for the hysteresis trigger 1584 */ 1585 tdma_writel(priv, ring->size | 1586 1 << RING_HYST_THRESH_SHIFT, 1587 TDMA_DESC_RING_MAX_HYST(index)); 1588 1589 /* Enable the ring queue in the arbiter */ 1590 reg = tdma_readl(priv, TDMA_TIER1_ARB_0_QUEUE_EN); 1591 reg |= (1 << index); 1592 tdma_writel(priv, reg, TDMA_TIER1_ARB_0_QUEUE_EN); 1593 1594 napi_enable(&ring->napi); 1595 1596 netif_dbg(priv, hw, priv->netdev, 1597 "TDMA cfg, size=%d, switch q=%d,port=%d\n", 1598 ring->size, ring->switch_queue, 1599 ring->switch_port); 1600 1601 return 0; 1602 } 1603 1604 static void bcm_sysport_fini_tx_ring(struct bcm_sysport_priv *priv, 1605 unsigned int index) 1606 { 1607 struct bcm_sysport_tx_ring *ring = &priv->tx_rings[index]; 1608 u32 reg; 1609 1610 /* Caller should stop the TDMA engine */ 1611 reg = tdma_readl(priv, TDMA_STATUS); 1612 if (!(reg & TDMA_DISABLED)) 1613 netdev_warn(priv->netdev, "TDMA not stopped!\n"); 1614 1615 /* ring->cbs is the last part in bcm_sysport_init_tx_ring which could 1616 * fail, so by checking this pointer we know whether the TX ring was 1617 * fully initialized or not. 1618 */ 1619 if (!ring->cbs) 1620 return; 1621 1622 napi_disable(&ring->napi); 1623 netif_napi_del(&ring->napi); 1624 1625 bcm_sysport_tx_clean(priv, ring); 1626 1627 kfree(ring->cbs); 1628 ring->cbs = NULL; 1629 ring->size = 0; 1630 ring->alloc_size = 0; 1631 1632 netif_dbg(priv, hw, priv->netdev, "TDMA fini done\n"); 1633 } 1634 1635 /* RDMA helper */ 1636 static inline int rdma_enable_set(struct bcm_sysport_priv *priv, 1637 unsigned int enable) 1638 { 1639 unsigned int timeout = 1000; 1640 u32 reg; 1641 1642 reg = rdma_readl(priv, RDMA_CONTROL); 1643 if (enable) 1644 reg |= RDMA_EN; 1645 else 1646 reg &= ~RDMA_EN; 1647 rdma_writel(priv, reg, RDMA_CONTROL); 1648 1649 /* Poll for RMDA disabling completion */ 1650 do { 1651 reg = rdma_readl(priv, RDMA_STATUS); 1652 if (!!(reg & RDMA_DISABLED) == !enable) 1653 return 0; 1654 usleep_range(1000, 2000); 1655 } while (timeout-- > 0); 1656 1657 netdev_err(priv->netdev, "timeout waiting for RDMA to finish\n"); 1658 1659 return -ETIMEDOUT; 1660 } 1661 1662 /* TDMA helper */ 1663 static inline int tdma_enable_set(struct bcm_sysport_priv *priv, 1664 unsigned int enable) 1665 { 1666 unsigned int timeout = 1000; 1667 u32 reg; 1668 1669 reg = tdma_readl(priv, TDMA_CONTROL); 1670 if (enable) 1671 reg |= tdma_control_bit(priv, TDMA_EN); 1672 else 1673 reg &= ~tdma_control_bit(priv, TDMA_EN); 1674 tdma_writel(priv, reg, TDMA_CONTROL); 1675 1676 /* Poll for TMDA disabling completion */ 1677 do { 1678 reg = tdma_readl(priv, TDMA_STATUS); 1679 if (!!(reg & TDMA_DISABLED) == !enable) 1680 return 0; 1681 1682 usleep_range(1000, 2000); 1683 } while (timeout-- > 0); 1684 1685 netdev_err(priv->netdev, "timeout waiting for TDMA to finish\n"); 1686 1687 return -ETIMEDOUT; 1688 } 1689 1690 static int bcm_sysport_init_rx_ring(struct bcm_sysport_priv *priv) 1691 { 1692 struct bcm_sysport_cb *cb; 1693 u32 reg; 1694 int ret; 1695 int i; 1696 1697 /* Initialize SW view of the RX ring */ 1698 priv->num_rx_bds = priv->num_rx_desc_words / WORDS_PER_DESC; 1699 priv->rx_bds = priv->base + SYS_PORT_RDMA_OFFSET; 1700 priv->rx_c_index = 0; 1701 priv->rx_read_ptr = 0; 1702 priv->rx_cbs = kcalloc(priv->num_rx_bds, sizeof(struct bcm_sysport_cb), 1703 GFP_KERNEL); 1704 if (!priv->rx_cbs) { 1705 netif_err(priv, hw, priv->netdev, "CB allocation failed\n"); 1706 return -ENOMEM; 1707 } 1708 1709 for (i = 0; i < priv->num_rx_bds; i++) { 1710 cb = priv->rx_cbs + i; 1711 cb->bd_addr = priv->rx_bds + i * DESC_SIZE; 1712 } 1713 1714 ret = bcm_sysport_alloc_rx_bufs(priv); 1715 if (ret) { 1716 netif_err(priv, hw, priv->netdev, "SKB allocation failed\n"); 1717 return ret; 1718 } 1719 1720 /* Initialize HW, ensure RDMA is disabled */ 1721 reg = rdma_readl(priv, RDMA_STATUS); 1722 if (!(reg & RDMA_DISABLED)) 1723 rdma_enable_set(priv, 0); 1724 1725 rdma_writel(priv, 0, RDMA_WRITE_PTR_LO); 1726 rdma_writel(priv, 0, RDMA_WRITE_PTR_HI); 1727 rdma_writel(priv, 0, RDMA_PROD_INDEX); 1728 rdma_writel(priv, 0, RDMA_CONS_INDEX); 1729 rdma_writel(priv, priv->num_rx_bds << RDMA_RING_SIZE_SHIFT | 1730 RX_BUF_LENGTH, RDMA_RING_BUF_SIZE); 1731 /* Operate the queue in ring mode */ 1732 rdma_writel(priv, 0, RDMA_START_ADDR_HI); 1733 rdma_writel(priv, 0, RDMA_START_ADDR_LO); 1734 rdma_writel(priv, 0, RDMA_END_ADDR_HI); 1735 rdma_writel(priv, priv->num_rx_desc_words - 1, RDMA_END_ADDR_LO); 1736 1737 netif_dbg(priv, hw, priv->netdev, 1738 "RDMA cfg, num_rx_bds=%d, rx_bds=%p\n", 1739 priv->num_rx_bds, priv->rx_bds); 1740 1741 return 0; 1742 } 1743 1744 static void bcm_sysport_fini_rx_ring(struct bcm_sysport_priv *priv) 1745 { 1746 struct bcm_sysport_cb *cb; 1747 unsigned int i; 1748 u32 reg; 1749 1750 /* Caller should ensure RDMA is disabled */ 1751 reg = rdma_readl(priv, RDMA_STATUS); 1752 if (!(reg & RDMA_DISABLED)) 1753 netdev_warn(priv->netdev, "RDMA not stopped!\n"); 1754 1755 for (i = 0; i < priv->num_rx_bds; i++) { 1756 cb = &priv->rx_cbs[i]; 1757 if (dma_unmap_addr(cb, dma_addr)) 1758 dma_unmap_single(&priv->pdev->dev, 1759 dma_unmap_addr(cb, dma_addr), 1760 RX_BUF_LENGTH, DMA_FROM_DEVICE); 1761 bcm_sysport_free_cb(cb); 1762 } 1763 1764 kfree(priv->rx_cbs); 1765 priv->rx_cbs = NULL; 1766 1767 netif_dbg(priv, hw, priv->netdev, "RDMA fini done\n"); 1768 } 1769 1770 static void bcm_sysport_set_rx_mode(struct net_device *dev) 1771 { 1772 struct bcm_sysport_priv *priv = netdev_priv(dev); 1773 u32 reg; 1774 1775 if (priv->is_lite) 1776 return; 1777 1778 reg = umac_readl(priv, UMAC_CMD); 1779 if (dev->flags & IFF_PROMISC) 1780 reg |= CMD_PROMISC; 1781 else 1782 reg &= ~CMD_PROMISC; 1783 umac_writel(priv, reg, UMAC_CMD); 1784 1785 /* No support for ALLMULTI */ 1786 if (dev->flags & IFF_ALLMULTI) 1787 return; 1788 } 1789 1790 static inline void umac_enable_set(struct bcm_sysport_priv *priv, 1791 u32 mask, unsigned int enable) 1792 { 1793 u32 reg; 1794 1795 if (!priv->is_lite) { 1796 reg = umac_readl(priv, UMAC_CMD); 1797 if (enable) 1798 reg |= mask; 1799 else 1800 reg &= ~mask; 1801 umac_writel(priv, reg, UMAC_CMD); 1802 } else { 1803 reg = gib_readl(priv, GIB_CONTROL); 1804 if (enable) 1805 reg |= mask; 1806 else 1807 reg &= ~mask; 1808 gib_writel(priv, reg, GIB_CONTROL); 1809 } 1810 1811 /* UniMAC stops on a packet boundary, wait for a full-sized packet 1812 * to be processed (1 msec). 1813 */ 1814 if (enable == 0) 1815 usleep_range(1000, 2000); 1816 } 1817 1818 static inline void umac_reset(struct bcm_sysport_priv *priv) 1819 { 1820 u32 reg; 1821 1822 if (priv->is_lite) 1823 return; 1824 1825 reg = umac_readl(priv, UMAC_CMD); 1826 reg |= CMD_SW_RESET; 1827 umac_writel(priv, reg, UMAC_CMD); 1828 udelay(10); 1829 reg = umac_readl(priv, UMAC_CMD); 1830 reg &= ~CMD_SW_RESET; 1831 umac_writel(priv, reg, UMAC_CMD); 1832 } 1833 1834 static void umac_set_hw_addr(struct bcm_sysport_priv *priv, 1835 const unsigned char *addr) 1836 { 1837 u32 mac0 = (addr[0] << 24) | (addr[1] << 16) | (addr[2] << 8) | 1838 addr[3]; 1839 u32 mac1 = (addr[4] << 8) | addr[5]; 1840 1841 if (!priv->is_lite) { 1842 umac_writel(priv, mac0, UMAC_MAC0); 1843 umac_writel(priv, mac1, UMAC_MAC1); 1844 } else { 1845 gib_writel(priv, mac0, GIB_MAC0); 1846 gib_writel(priv, mac1, GIB_MAC1); 1847 } 1848 } 1849 1850 static void topctrl_flush(struct bcm_sysport_priv *priv) 1851 { 1852 topctrl_writel(priv, RX_FLUSH, RX_FLUSH_CNTL); 1853 topctrl_writel(priv, TX_FLUSH, TX_FLUSH_CNTL); 1854 mdelay(1); 1855 topctrl_writel(priv, 0, RX_FLUSH_CNTL); 1856 topctrl_writel(priv, 0, TX_FLUSH_CNTL); 1857 } 1858 1859 static int bcm_sysport_change_mac(struct net_device *dev, void *p) 1860 { 1861 struct bcm_sysport_priv *priv = netdev_priv(dev); 1862 struct sockaddr *addr = p; 1863 1864 if (!is_valid_ether_addr(addr->sa_data)) 1865 return -EINVAL; 1866 1867 eth_hw_addr_set(dev, addr->sa_data); 1868 1869 /* interface is disabled, changes to MAC will be reflected on next 1870 * open call 1871 */ 1872 if (!netif_running(dev)) 1873 return 0; 1874 1875 umac_set_hw_addr(priv, dev->dev_addr); 1876 1877 return 0; 1878 } 1879 1880 static void bcm_sysport_get_stats64(struct net_device *dev, 1881 struct rtnl_link_stats64 *stats) 1882 { 1883 struct bcm_sysport_priv *priv = netdev_priv(dev); 1884 struct bcm_sysport_stats64 *stats64 = &priv->stats64; 1885 unsigned int start; 1886 1887 netdev_stats_to_stats64(stats, &dev->stats); 1888 1889 bcm_sysport_update_tx_stats(priv, &stats->tx_bytes, 1890 &stats->tx_packets); 1891 1892 do { 1893 start = u64_stats_fetch_begin(&priv->syncp); 1894 stats->rx_packets = stats64->rx_packets; 1895 stats->rx_bytes = stats64->rx_bytes; 1896 } while (u64_stats_fetch_retry(&priv->syncp, start)); 1897 } 1898 1899 static void bcm_sysport_netif_start(struct net_device *dev) 1900 { 1901 struct bcm_sysport_priv *priv = netdev_priv(dev); 1902 1903 /* Enable NAPI */ 1904 bcm_sysport_init_dim(priv, bcm_sysport_dim_work); 1905 bcm_sysport_init_rx_coalesce(priv); 1906 napi_enable(&priv->napi); 1907 1908 /* Enable RX interrupt and TX ring full interrupt */ 1909 intrl2_0_mask_clear(priv, INTRL2_0_RDMA_MBDONE | INTRL2_0_TX_RING_FULL); 1910 1911 phy_start(dev->phydev); 1912 1913 /* Enable TX interrupts for the TXQs */ 1914 if (!priv->is_lite) 1915 intrl2_1_mask_clear(priv, 0xffffffff); 1916 else 1917 intrl2_0_mask_clear(priv, INTRL2_0_TDMA_MBDONE_MASK); 1918 } 1919 1920 static void rbuf_init(struct bcm_sysport_priv *priv) 1921 { 1922 u32 reg; 1923 1924 reg = rbuf_readl(priv, RBUF_CONTROL); 1925 reg |= RBUF_4B_ALGN | RBUF_RSB_EN; 1926 /* Set a correct RSB format on SYSTEMPORT Lite */ 1927 if (priv->is_lite) 1928 reg &= ~RBUF_RSB_SWAP1; 1929 1930 /* Set a correct RSB format based on host endian */ 1931 if (!IS_ENABLED(CONFIG_CPU_BIG_ENDIAN)) 1932 reg |= RBUF_RSB_SWAP0; 1933 else 1934 reg &= ~RBUF_RSB_SWAP0; 1935 rbuf_writel(priv, reg, RBUF_CONTROL); 1936 } 1937 1938 static inline void bcm_sysport_mask_all_intrs(struct bcm_sysport_priv *priv) 1939 { 1940 intrl2_0_mask_set(priv, 0xffffffff); 1941 intrl2_0_writel(priv, 0xffffffff, INTRL2_CPU_CLEAR); 1942 if (!priv->is_lite) { 1943 intrl2_1_mask_set(priv, 0xffffffff); 1944 intrl2_1_writel(priv, 0xffffffff, INTRL2_CPU_CLEAR); 1945 } 1946 } 1947 1948 static inline void gib_set_pad_extension(struct bcm_sysport_priv *priv) 1949 { 1950 u32 reg; 1951 1952 reg = gib_readl(priv, GIB_CONTROL); 1953 /* Include Broadcom tag in pad extension and fix up IPG_LENGTH */ 1954 if (netdev_uses_dsa(priv->netdev)) { 1955 reg &= ~(GIB_PAD_EXTENSION_MASK << GIB_PAD_EXTENSION_SHIFT); 1956 reg |= ENET_BRCM_TAG_LEN << GIB_PAD_EXTENSION_SHIFT; 1957 } 1958 reg &= ~(GIB_IPG_LEN_MASK << GIB_IPG_LEN_SHIFT); 1959 reg |= 12 << GIB_IPG_LEN_SHIFT; 1960 gib_writel(priv, reg, GIB_CONTROL); 1961 } 1962 1963 static int bcm_sysport_open(struct net_device *dev) 1964 { 1965 struct bcm_sysport_priv *priv = netdev_priv(dev); 1966 struct phy_device *phydev; 1967 unsigned int i; 1968 int ret; 1969 1970 clk_prepare_enable(priv->clk); 1971 1972 /* Reset UniMAC */ 1973 umac_reset(priv); 1974 1975 /* Flush TX and RX FIFOs at TOPCTRL level */ 1976 topctrl_flush(priv); 1977 1978 /* Disable the UniMAC RX/TX */ 1979 umac_enable_set(priv, CMD_RX_EN | CMD_TX_EN, 0); 1980 1981 /* Enable RBUF 2bytes alignment and Receive Status Block */ 1982 rbuf_init(priv); 1983 1984 /* Set maximum frame length */ 1985 if (!priv->is_lite) 1986 umac_writel(priv, UMAC_MAX_MTU_SIZE, UMAC_MAX_FRAME_LEN); 1987 else 1988 gib_set_pad_extension(priv); 1989 1990 /* Apply features again in case we changed them while interface was 1991 * down 1992 */ 1993 bcm_sysport_set_features(dev, dev->features); 1994 1995 /* Set MAC address */ 1996 umac_set_hw_addr(priv, dev->dev_addr); 1997 1998 phydev = of_phy_connect(dev, priv->phy_dn, bcm_sysport_adj_link, 1999 0, priv->phy_interface); 2000 if (!phydev) { 2001 netdev_err(dev, "could not attach to PHY\n"); 2002 ret = -ENODEV; 2003 goto out_clk_disable; 2004 } 2005 2006 /* Indicate that the MAC is responsible for PHY PM */ 2007 phydev->mac_managed_pm = true; 2008 2009 /* Reset house keeping link status */ 2010 priv->old_duplex = -1; 2011 priv->old_link = -1; 2012 priv->old_pause = -1; 2013 2014 /* mask all interrupts and request them */ 2015 bcm_sysport_mask_all_intrs(priv); 2016 2017 ret = request_irq(priv->irq0, bcm_sysport_rx_isr, 0, dev->name, dev); 2018 if (ret) { 2019 netdev_err(dev, "failed to request RX interrupt\n"); 2020 goto out_phy_disconnect; 2021 } 2022 2023 if (!priv->is_lite) { 2024 ret = request_irq(priv->irq1, bcm_sysport_tx_isr, 0, 2025 dev->name, dev); 2026 if (ret) { 2027 netdev_err(dev, "failed to request TX interrupt\n"); 2028 goto out_free_irq0; 2029 } 2030 } 2031 2032 /* Initialize both hardware and software ring */ 2033 spin_lock_init(&priv->desc_lock); 2034 for (i = 0; i < dev->num_tx_queues; i++) { 2035 ret = bcm_sysport_init_tx_ring(priv, i); 2036 if (ret) { 2037 netdev_err(dev, "failed to initialize TX ring %d\n", 2038 i); 2039 goto out_free_tx_ring; 2040 } 2041 } 2042 2043 /* Initialize linked-list */ 2044 tdma_writel(priv, TDMA_LL_RAM_INIT_BUSY, TDMA_STATUS); 2045 2046 /* Initialize RX ring */ 2047 ret = bcm_sysport_init_rx_ring(priv); 2048 if (ret) { 2049 netdev_err(dev, "failed to initialize RX ring\n"); 2050 goto out_free_rx_ring; 2051 } 2052 2053 /* Turn on RDMA */ 2054 ret = rdma_enable_set(priv, 1); 2055 if (ret) 2056 goto out_free_rx_ring; 2057 2058 /* Turn on TDMA */ 2059 ret = tdma_enable_set(priv, 1); 2060 if (ret) 2061 goto out_clear_rx_int; 2062 2063 /* Turn on UniMAC TX/RX */ 2064 umac_enable_set(priv, CMD_RX_EN | CMD_TX_EN, 1); 2065 2066 bcm_sysport_netif_start(dev); 2067 2068 netif_tx_start_all_queues(dev); 2069 2070 return 0; 2071 2072 out_clear_rx_int: 2073 intrl2_0_mask_set(priv, INTRL2_0_RDMA_MBDONE | INTRL2_0_TX_RING_FULL); 2074 out_free_rx_ring: 2075 bcm_sysport_fini_rx_ring(priv); 2076 out_free_tx_ring: 2077 for (i = 0; i < dev->num_tx_queues; i++) 2078 bcm_sysport_fini_tx_ring(priv, i); 2079 if (!priv->is_lite) 2080 free_irq(priv->irq1, dev); 2081 out_free_irq0: 2082 free_irq(priv->irq0, dev); 2083 out_phy_disconnect: 2084 phy_disconnect(phydev); 2085 out_clk_disable: 2086 clk_disable_unprepare(priv->clk); 2087 return ret; 2088 } 2089 2090 static void bcm_sysport_netif_stop(struct net_device *dev) 2091 { 2092 struct bcm_sysport_priv *priv = netdev_priv(dev); 2093 2094 /* stop all software from updating hardware */ 2095 netif_tx_disable(dev); 2096 napi_disable(&priv->napi); 2097 cancel_work_sync(&priv->dim.dim.work); 2098 phy_stop(dev->phydev); 2099 2100 /* mask all interrupts */ 2101 bcm_sysport_mask_all_intrs(priv); 2102 } 2103 2104 static int bcm_sysport_stop(struct net_device *dev) 2105 { 2106 struct bcm_sysport_priv *priv = netdev_priv(dev); 2107 unsigned int i; 2108 int ret; 2109 2110 bcm_sysport_netif_stop(dev); 2111 2112 /* Disable UniMAC RX */ 2113 umac_enable_set(priv, CMD_RX_EN, 0); 2114 2115 ret = tdma_enable_set(priv, 0); 2116 if (ret) { 2117 netdev_err(dev, "timeout disabling RDMA\n"); 2118 return ret; 2119 } 2120 2121 /* Wait for a maximum packet size to be drained */ 2122 usleep_range(2000, 3000); 2123 2124 ret = rdma_enable_set(priv, 0); 2125 if (ret) { 2126 netdev_err(dev, "timeout disabling TDMA\n"); 2127 return ret; 2128 } 2129 2130 /* Disable UniMAC TX */ 2131 umac_enable_set(priv, CMD_TX_EN, 0); 2132 2133 /* Free RX/TX rings SW structures */ 2134 for (i = 0; i < dev->num_tx_queues; i++) 2135 bcm_sysport_fini_tx_ring(priv, i); 2136 bcm_sysport_fini_rx_ring(priv); 2137 2138 free_irq(priv->irq0, dev); 2139 if (!priv->is_lite) 2140 free_irq(priv->irq1, dev); 2141 2142 /* Disconnect from PHY */ 2143 phy_disconnect(dev->phydev); 2144 2145 clk_disable_unprepare(priv->clk); 2146 2147 return 0; 2148 } 2149 2150 static int bcm_sysport_rule_find(struct bcm_sysport_priv *priv, 2151 u64 location) 2152 { 2153 unsigned int index; 2154 u32 reg; 2155 2156 for_each_set_bit(index, priv->filters, RXCHK_BRCM_TAG_MAX) { 2157 reg = rxchk_readl(priv, RXCHK_BRCM_TAG(index)); 2158 reg >>= RXCHK_BRCM_TAG_CID_SHIFT; 2159 reg &= RXCHK_BRCM_TAG_CID_MASK; 2160 if (reg == location) 2161 return index; 2162 } 2163 2164 return -EINVAL; 2165 } 2166 2167 static int bcm_sysport_rule_get(struct bcm_sysport_priv *priv, 2168 struct ethtool_rxnfc *nfc) 2169 { 2170 int index; 2171 2172 /* This is not a rule that we know about */ 2173 index = bcm_sysport_rule_find(priv, nfc->fs.location); 2174 if (index < 0) 2175 return -EOPNOTSUPP; 2176 2177 nfc->fs.ring_cookie = RX_CLS_FLOW_WAKE; 2178 2179 return 0; 2180 } 2181 2182 static int bcm_sysport_rule_set(struct bcm_sysport_priv *priv, 2183 struct ethtool_rxnfc *nfc) 2184 { 2185 unsigned int index; 2186 u32 reg; 2187 2188 /* We cannot match locations greater than what the classification ID 2189 * permits (256 entries) 2190 */ 2191 if (nfc->fs.location > RXCHK_BRCM_TAG_CID_MASK) 2192 return -E2BIG; 2193 2194 /* We cannot support flows that are not destined for a wake-up */ 2195 if (nfc->fs.ring_cookie != RX_CLS_FLOW_WAKE) 2196 return -EOPNOTSUPP; 2197 2198 index = find_first_zero_bit(priv->filters, RXCHK_BRCM_TAG_MAX); 2199 if (index >= RXCHK_BRCM_TAG_MAX) 2200 /* All filters are already in use, we cannot match more rules */ 2201 return -ENOSPC; 2202 2203 /* Location is the classification ID, and index is the position 2204 * within one of our 8 possible filters to be programmed 2205 */ 2206 reg = rxchk_readl(priv, RXCHK_BRCM_TAG(index)); 2207 reg &= ~(RXCHK_BRCM_TAG_CID_MASK << RXCHK_BRCM_TAG_CID_SHIFT); 2208 reg |= nfc->fs.location << RXCHK_BRCM_TAG_CID_SHIFT; 2209 rxchk_writel(priv, reg, RXCHK_BRCM_TAG(index)); 2210 rxchk_writel(priv, 0xff00ffff, RXCHK_BRCM_TAG_MASK(index)); 2211 2212 priv->filters_loc[index] = nfc->fs.location; 2213 set_bit(index, priv->filters); 2214 2215 return 0; 2216 } 2217 2218 static int bcm_sysport_rule_del(struct bcm_sysport_priv *priv, 2219 u64 location) 2220 { 2221 int index; 2222 2223 /* This is not a rule that we know about */ 2224 index = bcm_sysport_rule_find(priv, location); 2225 if (index < 0) 2226 return -EOPNOTSUPP; 2227 2228 /* No need to disable this filter if it was enabled, this will 2229 * be taken care of during suspend time by bcm_sysport_suspend_to_wol 2230 */ 2231 clear_bit(index, priv->filters); 2232 priv->filters_loc[index] = 0; 2233 2234 return 0; 2235 } 2236 2237 static int bcm_sysport_get_rxnfc(struct net_device *dev, 2238 struct ethtool_rxnfc *nfc, u32 *rule_locs) 2239 { 2240 struct bcm_sysport_priv *priv = netdev_priv(dev); 2241 int ret = -EOPNOTSUPP; 2242 2243 switch (nfc->cmd) { 2244 case ETHTOOL_GRXCLSRULE: 2245 ret = bcm_sysport_rule_get(priv, nfc); 2246 break; 2247 default: 2248 break; 2249 } 2250 2251 return ret; 2252 } 2253 2254 static int bcm_sysport_set_rxnfc(struct net_device *dev, 2255 struct ethtool_rxnfc *nfc) 2256 { 2257 struct bcm_sysport_priv *priv = netdev_priv(dev); 2258 int ret = -EOPNOTSUPP; 2259 2260 switch (nfc->cmd) { 2261 case ETHTOOL_SRXCLSRLINS: 2262 ret = bcm_sysport_rule_set(priv, nfc); 2263 break; 2264 case ETHTOOL_SRXCLSRLDEL: 2265 ret = bcm_sysport_rule_del(priv, nfc->fs.location); 2266 break; 2267 default: 2268 break; 2269 } 2270 2271 return ret; 2272 } 2273 2274 static const struct ethtool_ops bcm_sysport_ethtool_ops = { 2275 .supported_coalesce_params = ETHTOOL_COALESCE_USECS | 2276 ETHTOOL_COALESCE_MAX_FRAMES | 2277 ETHTOOL_COALESCE_USE_ADAPTIVE_RX, 2278 .get_drvinfo = bcm_sysport_get_drvinfo, 2279 .get_msglevel = bcm_sysport_get_msglvl, 2280 .set_msglevel = bcm_sysport_set_msglvl, 2281 .get_link = ethtool_op_get_link, 2282 .get_strings = bcm_sysport_get_strings, 2283 .get_ethtool_stats = bcm_sysport_get_stats, 2284 .get_sset_count = bcm_sysport_get_sset_count, 2285 .get_wol = bcm_sysport_get_wol, 2286 .set_wol = bcm_sysport_set_wol, 2287 .get_coalesce = bcm_sysport_get_coalesce, 2288 .set_coalesce = bcm_sysport_set_coalesce, 2289 .get_link_ksettings = phy_ethtool_get_link_ksettings, 2290 .set_link_ksettings = phy_ethtool_set_link_ksettings, 2291 .get_rxnfc = bcm_sysport_get_rxnfc, 2292 .set_rxnfc = bcm_sysport_set_rxnfc, 2293 }; 2294 2295 static u16 bcm_sysport_select_queue(struct net_device *dev, struct sk_buff *skb, 2296 struct net_device *sb_dev) 2297 { 2298 struct bcm_sysport_priv *priv = netdev_priv(dev); 2299 u16 queue = skb_get_queue_mapping(skb); 2300 struct bcm_sysport_tx_ring *tx_ring; 2301 unsigned int q, port; 2302 2303 if (!netdev_uses_dsa(dev)) 2304 return netdev_pick_tx(dev, skb, NULL); 2305 2306 /* DSA tagging layer will have configured the correct queue */ 2307 q = BRCM_TAG_GET_QUEUE(queue); 2308 port = BRCM_TAG_GET_PORT(queue); 2309 tx_ring = priv->ring_map[q + port * priv->per_port_num_tx_queues]; 2310 2311 if (unlikely(!tx_ring)) 2312 return netdev_pick_tx(dev, skb, NULL); 2313 2314 return tx_ring->index; 2315 } 2316 2317 static const struct net_device_ops bcm_sysport_netdev_ops = { 2318 .ndo_start_xmit = bcm_sysport_xmit, 2319 .ndo_tx_timeout = bcm_sysport_tx_timeout, 2320 .ndo_open = bcm_sysport_open, 2321 .ndo_stop = bcm_sysport_stop, 2322 .ndo_set_features = bcm_sysport_set_features, 2323 .ndo_set_rx_mode = bcm_sysport_set_rx_mode, 2324 .ndo_set_mac_address = bcm_sysport_change_mac, 2325 #ifdef CONFIG_NET_POLL_CONTROLLER 2326 .ndo_poll_controller = bcm_sysport_poll_controller, 2327 #endif 2328 .ndo_get_stats64 = bcm_sysport_get_stats64, 2329 .ndo_select_queue = bcm_sysport_select_queue, 2330 }; 2331 2332 static int bcm_sysport_map_queues(struct net_device *dev, 2333 struct net_device *slave_dev) 2334 { 2335 struct dsa_port *dp = dsa_port_from_netdev(slave_dev); 2336 struct bcm_sysport_priv *priv = netdev_priv(dev); 2337 struct bcm_sysport_tx_ring *ring; 2338 unsigned int num_tx_queues; 2339 unsigned int q, qp, port; 2340 2341 /* We can't be setting up queue inspection for non directly attached 2342 * switches 2343 */ 2344 if (dp->ds->index) 2345 return 0; 2346 2347 port = dp->index; 2348 2349 /* On SYSTEMPORT Lite we have twice as less queues, so we cannot do a 2350 * 1:1 mapping, we can only do a 2:1 mapping. By reducing the number of 2351 * per-port (slave_dev) network devices queue, we achieve just that. 2352 * This need to happen now before any slave network device is used such 2353 * it accurately reflects the number of real TX queues. 2354 */ 2355 if (priv->is_lite) 2356 netif_set_real_num_tx_queues(slave_dev, 2357 slave_dev->num_tx_queues / 2); 2358 2359 num_tx_queues = slave_dev->real_num_tx_queues; 2360 2361 if (priv->per_port_num_tx_queues && 2362 priv->per_port_num_tx_queues != num_tx_queues) 2363 netdev_warn(slave_dev, "asymmetric number of per-port queues\n"); 2364 2365 priv->per_port_num_tx_queues = num_tx_queues; 2366 2367 for (q = 0, qp = 0; q < dev->num_tx_queues && qp < num_tx_queues; 2368 q++) { 2369 ring = &priv->tx_rings[q]; 2370 2371 if (ring->inspect) 2372 continue; 2373 2374 /* Just remember the mapping actual programming done 2375 * during bcm_sysport_init_tx_ring 2376 */ 2377 ring->switch_queue = qp; 2378 ring->switch_port = port; 2379 ring->inspect = true; 2380 priv->ring_map[qp + port * num_tx_queues] = ring; 2381 qp++; 2382 } 2383 2384 return 0; 2385 } 2386 2387 static int bcm_sysport_unmap_queues(struct net_device *dev, 2388 struct net_device *slave_dev) 2389 { 2390 struct dsa_port *dp = dsa_port_from_netdev(slave_dev); 2391 struct bcm_sysport_priv *priv = netdev_priv(dev); 2392 struct bcm_sysport_tx_ring *ring; 2393 unsigned int num_tx_queues; 2394 unsigned int q, qp, port; 2395 2396 port = dp->index; 2397 2398 num_tx_queues = slave_dev->real_num_tx_queues; 2399 2400 for (q = 0; q < dev->num_tx_queues; q++) { 2401 ring = &priv->tx_rings[q]; 2402 2403 if (ring->switch_port != port) 2404 continue; 2405 2406 if (!ring->inspect) 2407 continue; 2408 2409 ring->inspect = false; 2410 qp = ring->switch_queue; 2411 priv->ring_map[qp + port * num_tx_queues] = NULL; 2412 } 2413 2414 return 0; 2415 } 2416 2417 static int bcm_sysport_netdevice_event(struct notifier_block *nb, 2418 unsigned long event, void *ptr) 2419 { 2420 struct net_device *dev = netdev_notifier_info_to_dev(ptr); 2421 struct netdev_notifier_changeupper_info *info = ptr; 2422 struct bcm_sysport_priv *priv; 2423 int ret = 0; 2424 2425 priv = container_of(nb, struct bcm_sysport_priv, netdev_notifier); 2426 if (priv->netdev != dev) 2427 return NOTIFY_DONE; 2428 2429 switch (event) { 2430 case NETDEV_CHANGEUPPER: 2431 if (dev->netdev_ops != &bcm_sysport_netdev_ops) 2432 return NOTIFY_DONE; 2433 2434 if (!dsa_user_dev_check(info->upper_dev)) 2435 return NOTIFY_DONE; 2436 2437 if (info->linking) 2438 ret = bcm_sysport_map_queues(dev, info->upper_dev); 2439 else 2440 ret = bcm_sysport_unmap_queues(dev, info->upper_dev); 2441 break; 2442 } 2443 2444 return notifier_from_errno(ret); 2445 } 2446 2447 #define REV_FMT "v%2x.%02x" 2448 2449 static const struct bcm_sysport_hw_params bcm_sysport_params[] = { 2450 [SYSTEMPORT] = { 2451 .is_lite = false, 2452 .num_rx_desc_words = SP_NUM_HW_RX_DESC_WORDS, 2453 }, 2454 [SYSTEMPORT_LITE] = { 2455 .is_lite = true, 2456 .num_rx_desc_words = SP_LT_NUM_HW_RX_DESC_WORDS, 2457 }, 2458 }; 2459 2460 static const struct of_device_id bcm_sysport_of_match[] = { 2461 { .compatible = "brcm,systemportlite-v1.00", 2462 .data = &bcm_sysport_params[SYSTEMPORT_LITE] }, 2463 { .compatible = "brcm,systemport-v1.00", 2464 .data = &bcm_sysport_params[SYSTEMPORT] }, 2465 { .compatible = "brcm,systemport", 2466 .data = &bcm_sysport_params[SYSTEMPORT] }, 2467 { /* sentinel */ } 2468 }; 2469 MODULE_DEVICE_TABLE(of, bcm_sysport_of_match); 2470 2471 static int bcm_sysport_probe(struct platform_device *pdev) 2472 { 2473 const struct bcm_sysport_hw_params *params; 2474 const struct of_device_id *of_id = NULL; 2475 struct bcm_sysport_priv *priv; 2476 struct device_node *dn; 2477 struct net_device *dev; 2478 u32 txq, rxq; 2479 int ret; 2480 2481 dn = pdev->dev.of_node; 2482 of_id = of_match_node(bcm_sysport_of_match, dn); 2483 if (!of_id || !of_id->data) 2484 return -EINVAL; 2485 2486 ret = dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(40)); 2487 if (ret) 2488 ret = dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(32)); 2489 if (ret) { 2490 dev_err(&pdev->dev, "unable to set DMA mask: %d\n", ret); 2491 return ret; 2492 } 2493 2494 /* Fairly quickly we need to know the type of adapter we have */ 2495 params = of_id->data; 2496 2497 /* Read the Transmit/Receive Queue properties */ 2498 if (of_property_read_u32(dn, "systemport,num-txq", &txq)) 2499 txq = TDMA_NUM_RINGS; 2500 if (of_property_read_u32(dn, "systemport,num-rxq", &rxq)) 2501 rxq = 1; 2502 2503 /* Sanity check the number of transmit queues */ 2504 if (!txq || txq > TDMA_NUM_RINGS) 2505 return -EINVAL; 2506 2507 dev = alloc_etherdev_mqs(sizeof(*priv), txq, rxq); 2508 if (!dev) 2509 return -ENOMEM; 2510 2511 /* Initialize private members */ 2512 priv = netdev_priv(dev); 2513 2514 priv->clk = devm_clk_get_optional(&pdev->dev, "sw_sysport"); 2515 if (IS_ERR(priv->clk)) { 2516 ret = PTR_ERR(priv->clk); 2517 goto err_free_netdev; 2518 } 2519 2520 /* Allocate number of TX rings */ 2521 priv->tx_rings = devm_kcalloc(&pdev->dev, txq, 2522 sizeof(struct bcm_sysport_tx_ring), 2523 GFP_KERNEL); 2524 if (!priv->tx_rings) { 2525 ret = -ENOMEM; 2526 goto err_free_netdev; 2527 } 2528 2529 priv->is_lite = params->is_lite; 2530 priv->num_rx_desc_words = params->num_rx_desc_words; 2531 2532 priv->irq0 = platform_get_irq(pdev, 0); 2533 if (!priv->is_lite) { 2534 priv->irq1 = platform_get_irq(pdev, 1); 2535 priv->wol_irq = platform_get_irq_optional(pdev, 2); 2536 } else { 2537 priv->wol_irq = platform_get_irq_optional(pdev, 1); 2538 } 2539 if (priv->irq0 <= 0 || (priv->irq1 <= 0 && !priv->is_lite)) { 2540 ret = -EINVAL; 2541 goto err_free_netdev; 2542 } 2543 2544 priv->base = devm_platform_ioremap_resource(pdev, 0); 2545 if (IS_ERR(priv->base)) { 2546 ret = PTR_ERR(priv->base); 2547 goto err_free_netdev; 2548 } 2549 2550 priv->netdev = dev; 2551 priv->pdev = pdev; 2552 2553 ret = of_get_phy_mode(dn, &priv->phy_interface); 2554 /* Default to GMII interface mode */ 2555 if (ret) 2556 priv->phy_interface = PHY_INTERFACE_MODE_GMII; 2557 2558 /* In the case of a fixed PHY, the DT node associated 2559 * to the PHY is the Ethernet MAC DT node. 2560 */ 2561 if (of_phy_is_fixed_link(dn)) { 2562 ret = of_phy_register_fixed_link(dn); 2563 if (ret) { 2564 dev_err(&pdev->dev, "failed to register fixed PHY\n"); 2565 goto err_free_netdev; 2566 } 2567 2568 priv->phy_dn = dn; 2569 } 2570 2571 /* Initialize netdevice members */ 2572 ret = of_get_ethdev_address(dn, dev); 2573 if (ret) { 2574 dev_warn(&pdev->dev, "using random Ethernet MAC\n"); 2575 eth_hw_addr_random(dev); 2576 } 2577 2578 SET_NETDEV_DEV(dev, &pdev->dev); 2579 dev_set_drvdata(&pdev->dev, dev); 2580 dev->ethtool_ops = &bcm_sysport_ethtool_ops; 2581 dev->netdev_ops = &bcm_sysport_netdev_ops; 2582 netif_napi_add(dev, &priv->napi, bcm_sysport_poll); 2583 2584 dev->features |= NETIF_F_RXCSUM | NETIF_F_HIGHDMA | 2585 NETIF_F_IP_CSUM | NETIF_F_IPV6_CSUM | 2586 NETIF_F_HW_VLAN_CTAG_TX; 2587 dev->hw_features |= dev->features; 2588 dev->vlan_features |= dev->features; 2589 dev->max_mtu = UMAC_MAX_MTU_SIZE; 2590 2591 /* Request the WOL interrupt and advertise suspend if available */ 2592 priv->wol_irq_disabled = 1; 2593 ret = devm_request_irq(&pdev->dev, priv->wol_irq, 2594 bcm_sysport_wol_isr, 0, dev->name, priv); 2595 if (!ret) 2596 device_set_wakeup_capable(&pdev->dev, 1); 2597 2598 priv->wol_clk = devm_clk_get_optional(&pdev->dev, "sw_sysportwol"); 2599 if (IS_ERR(priv->wol_clk)) { 2600 ret = PTR_ERR(priv->wol_clk); 2601 goto err_deregister_fixed_link; 2602 } 2603 2604 /* Set the needed headroom once and for all */ 2605 BUILD_BUG_ON(sizeof(struct bcm_tsb) != 8); 2606 dev->needed_headroom += sizeof(struct bcm_tsb); 2607 2608 /* libphy will adjust the link state accordingly */ 2609 netif_carrier_off(dev); 2610 2611 priv->rx_max_coalesced_frames = 1; 2612 u64_stats_init(&priv->syncp); 2613 2614 priv->netdev_notifier.notifier_call = bcm_sysport_netdevice_event; 2615 2616 ret = register_netdevice_notifier(&priv->netdev_notifier); 2617 if (ret) { 2618 dev_err(&pdev->dev, "failed to register DSA notifier\n"); 2619 goto err_deregister_fixed_link; 2620 } 2621 2622 ret = register_netdev(dev); 2623 if (ret) { 2624 dev_err(&pdev->dev, "failed to register net_device\n"); 2625 goto err_deregister_notifier; 2626 } 2627 2628 clk_prepare_enable(priv->clk); 2629 2630 priv->rev = topctrl_readl(priv, REV_CNTL) & REV_MASK; 2631 dev_info(&pdev->dev, 2632 "Broadcom SYSTEMPORT%s " REV_FMT 2633 " (irqs: %d, %d, TXQs: %d, RXQs: %d)\n", 2634 priv->is_lite ? " Lite" : "", 2635 (priv->rev >> 8) & 0xff, priv->rev & 0xff, 2636 priv->irq0, priv->irq1, txq, rxq); 2637 2638 clk_disable_unprepare(priv->clk); 2639 2640 return 0; 2641 2642 err_deregister_notifier: 2643 unregister_netdevice_notifier(&priv->netdev_notifier); 2644 err_deregister_fixed_link: 2645 if (of_phy_is_fixed_link(dn)) 2646 of_phy_deregister_fixed_link(dn); 2647 err_free_netdev: 2648 free_netdev(dev); 2649 return ret; 2650 } 2651 2652 static void bcm_sysport_remove(struct platform_device *pdev) 2653 { 2654 struct net_device *dev = dev_get_drvdata(&pdev->dev); 2655 struct bcm_sysport_priv *priv = netdev_priv(dev); 2656 struct device_node *dn = pdev->dev.of_node; 2657 2658 /* Not much to do, ndo_close has been called 2659 * and we use managed allocations 2660 */ 2661 unregister_netdevice_notifier(&priv->netdev_notifier); 2662 unregister_netdev(dev); 2663 if (of_phy_is_fixed_link(dn)) 2664 of_phy_deregister_fixed_link(dn); 2665 free_netdev(dev); 2666 dev_set_drvdata(&pdev->dev, NULL); 2667 } 2668 2669 static int bcm_sysport_suspend_to_wol(struct bcm_sysport_priv *priv) 2670 { 2671 struct net_device *ndev = priv->netdev; 2672 unsigned int timeout = 1000; 2673 unsigned int index, i = 0; 2674 u32 reg; 2675 2676 reg = umac_readl(priv, UMAC_MPD_CTRL); 2677 if (priv->wolopts & (WAKE_MAGIC | WAKE_MAGICSECURE)) 2678 reg |= MPD_EN; 2679 reg &= ~PSW_EN; 2680 if (priv->wolopts & WAKE_MAGICSECURE) { 2681 /* Program the SecureOn password */ 2682 umac_writel(priv, get_unaligned_be16(&priv->sopass[0]), 2683 UMAC_PSW_MS); 2684 umac_writel(priv, get_unaligned_be32(&priv->sopass[2]), 2685 UMAC_PSW_LS); 2686 reg |= PSW_EN; 2687 } 2688 umac_writel(priv, reg, UMAC_MPD_CTRL); 2689 2690 if (priv->wolopts & WAKE_FILTER) { 2691 /* Turn on ACPI matching to steal packets from RBUF */ 2692 reg = rbuf_readl(priv, RBUF_CONTROL); 2693 if (priv->is_lite) 2694 reg |= RBUF_ACPI_EN_LITE; 2695 else 2696 reg |= RBUF_ACPI_EN; 2697 rbuf_writel(priv, reg, RBUF_CONTROL); 2698 2699 /* Enable RXCHK, active filters and Broadcom tag matching */ 2700 reg = rxchk_readl(priv, RXCHK_CONTROL); 2701 reg &= ~(RXCHK_BRCM_TAG_MATCH_MASK << 2702 RXCHK_BRCM_TAG_MATCH_SHIFT); 2703 for_each_set_bit(index, priv->filters, RXCHK_BRCM_TAG_MAX) { 2704 reg |= BIT(RXCHK_BRCM_TAG_MATCH_SHIFT + i); 2705 i++; 2706 } 2707 reg |= RXCHK_EN | RXCHK_BRCM_TAG_EN; 2708 rxchk_writel(priv, reg, RXCHK_CONTROL); 2709 } 2710 2711 /* Make sure RBUF entered WoL mode as result */ 2712 do { 2713 reg = rbuf_readl(priv, RBUF_STATUS); 2714 if (reg & RBUF_WOL_MODE) 2715 break; 2716 2717 udelay(10); 2718 } while (timeout-- > 0); 2719 2720 /* Do not leave the UniMAC RBUF matching only MPD packets */ 2721 if (!timeout) { 2722 mpd_enable_set(priv, false); 2723 netif_err(priv, wol, ndev, "failed to enter WOL mode\n"); 2724 return -ETIMEDOUT; 2725 } 2726 2727 /* UniMAC receive needs to be turned on */ 2728 umac_enable_set(priv, CMD_RX_EN, 1); 2729 2730 netif_dbg(priv, wol, ndev, "entered WOL mode\n"); 2731 2732 return 0; 2733 } 2734 2735 static int __maybe_unused bcm_sysport_suspend(struct device *d) 2736 { 2737 struct net_device *dev = dev_get_drvdata(d); 2738 struct bcm_sysport_priv *priv = netdev_priv(dev); 2739 unsigned int i; 2740 int ret = 0; 2741 u32 reg; 2742 2743 if (!netif_running(dev)) 2744 return 0; 2745 2746 netif_device_detach(dev); 2747 2748 bcm_sysport_netif_stop(dev); 2749 2750 phy_suspend(dev->phydev); 2751 2752 /* Disable UniMAC RX */ 2753 umac_enable_set(priv, CMD_RX_EN, 0); 2754 2755 ret = rdma_enable_set(priv, 0); 2756 if (ret) { 2757 netdev_err(dev, "RDMA timeout!\n"); 2758 return ret; 2759 } 2760 2761 /* Disable RXCHK if enabled */ 2762 if (priv->rx_chk_en) { 2763 reg = rxchk_readl(priv, RXCHK_CONTROL); 2764 reg &= ~RXCHK_EN; 2765 rxchk_writel(priv, reg, RXCHK_CONTROL); 2766 } 2767 2768 /* Flush RX pipe */ 2769 if (!priv->wolopts) 2770 topctrl_writel(priv, RX_FLUSH, RX_FLUSH_CNTL); 2771 2772 ret = tdma_enable_set(priv, 0); 2773 if (ret) { 2774 netdev_err(dev, "TDMA timeout!\n"); 2775 return ret; 2776 } 2777 2778 /* Wait for a packet boundary */ 2779 usleep_range(2000, 3000); 2780 2781 umac_enable_set(priv, CMD_TX_EN, 0); 2782 2783 topctrl_writel(priv, TX_FLUSH, TX_FLUSH_CNTL); 2784 2785 /* Free RX/TX rings SW structures */ 2786 for (i = 0; i < dev->num_tx_queues; i++) 2787 bcm_sysport_fini_tx_ring(priv, i); 2788 bcm_sysport_fini_rx_ring(priv); 2789 2790 /* Get prepared for Wake-on-LAN */ 2791 if (device_may_wakeup(d) && priv->wolopts) { 2792 clk_prepare_enable(priv->wol_clk); 2793 ret = bcm_sysport_suspend_to_wol(priv); 2794 } 2795 2796 clk_disable_unprepare(priv->clk); 2797 2798 return ret; 2799 } 2800 2801 static int __maybe_unused bcm_sysport_resume(struct device *d) 2802 { 2803 struct net_device *dev = dev_get_drvdata(d); 2804 struct bcm_sysport_priv *priv = netdev_priv(dev); 2805 unsigned int i; 2806 int ret; 2807 2808 if (!netif_running(dev)) 2809 return 0; 2810 2811 clk_prepare_enable(priv->clk); 2812 if (priv->wolopts) 2813 clk_disable_unprepare(priv->wol_clk); 2814 2815 umac_reset(priv); 2816 2817 /* Disable the UniMAC RX/TX */ 2818 umac_enable_set(priv, CMD_RX_EN | CMD_TX_EN, 0); 2819 2820 /* We may have been suspended and never received a WOL event that 2821 * would turn off MPD detection, take care of that now 2822 */ 2823 bcm_sysport_resume_from_wol(priv); 2824 2825 /* Initialize both hardware and software ring */ 2826 for (i = 0; i < dev->num_tx_queues; i++) { 2827 ret = bcm_sysport_init_tx_ring(priv, i); 2828 if (ret) { 2829 netdev_err(dev, "failed to initialize TX ring %d\n", 2830 i); 2831 goto out_free_tx_rings; 2832 } 2833 } 2834 2835 /* Initialize linked-list */ 2836 tdma_writel(priv, TDMA_LL_RAM_INIT_BUSY, TDMA_STATUS); 2837 2838 /* Initialize RX ring */ 2839 ret = bcm_sysport_init_rx_ring(priv); 2840 if (ret) { 2841 netdev_err(dev, "failed to initialize RX ring\n"); 2842 goto out_free_rx_ring; 2843 } 2844 2845 /* RX pipe enable */ 2846 topctrl_writel(priv, 0, RX_FLUSH_CNTL); 2847 2848 ret = rdma_enable_set(priv, 1); 2849 if (ret) { 2850 netdev_err(dev, "failed to enable RDMA\n"); 2851 goto out_free_rx_ring; 2852 } 2853 2854 /* Restore enabled features */ 2855 bcm_sysport_set_features(dev, dev->features); 2856 2857 rbuf_init(priv); 2858 2859 /* Set maximum frame length */ 2860 if (!priv->is_lite) 2861 umac_writel(priv, UMAC_MAX_MTU_SIZE, UMAC_MAX_FRAME_LEN); 2862 else 2863 gib_set_pad_extension(priv); 2864 2865 /* Set MAC address */ 2866 umac_set_hw_addr(priv, dev->dev_addr); 2867 2868 umac_enable_set(priv, CMD_RX_EN, 1); 2869 2870 /* TX pipe enable */ 2871 topctrl_writel(priv, 0, TX_FLUSH_CNTL); 2872 2873 umac_enable_set(priv, CMD_TX_EN, 1); 2874 2875 ret = tdma_enable_set(priv, 1); 2876 if (ret) { 2877 netdev_err(dev, "TDMA timeout!\n"); 2878 goto out_free_rx_ring; 2879 } 2880 2881 phy_resume(dev->phydev); 2882 2883 bcm_sysport_netif_start(dev); 2884 2885 netif_device_attach(dev); 2886 2887 return 0; 2888 2889 out_free_rx_ring: 2890 bcm_sysport_fini_rx_ring(priv); 2891 out_free_tx_rings: 2892 for (i = 0; i < dev->num_tx_queues; i++) 2893 bcm_sysport_fini_tx_ring(priv, i); 2894 clk_disable_unprepare(priv->clk); 2895 return ret; 2896 } 2897 2898 static SIMPLE_DEV_PM_OPS(bcm_sysport_pm_ops, 2899 bcm_sysport_suspend, bcm_sysport_resume); 2900 2901 static struct platform_driver bcm_sysport_driver = { 2902 .probe = bcm_sysport_probe, 2903 .remove_new = bcm_sysport_remove, 2904 .driver = { 2905 .name = "brcm-systemport", 2906 .of_match_table = bcm_sysport_of_match, 2907 .pm = &bcm_sysport_pm_ops, 2908 }, 2909 }; 2910 module_platform_driver(bcm_sysport_driver); 2911 2912 MODULE_AUTHOR("Broadcom Corporation"); 2913 MODULE_DESCRIPTION("Broadcom System Port Ethernet MAC driver"); 2914 MODULE_ALIAS("platform:brcm-systemport"); 2915 MODULE_LICENSE("GPL"); 2916