1 // SPDX-License-Identifier: GPL-2.0-only 2 /* 3 * Broadcom BCM7xxx System Port Ethernet MAC driver 4 * 5 * Copyright (C) 2014 Broadcom Corporation 6 */ 7 8 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt 9 10 #include <linux/init.h> 11 #include <linux/interrupt.h> 12 #include <linux/module.h> 13 #include <linux/kernel.h> 14 #include <linux/netdevice.h> 15 #include <linux/dsa/brcm.h> 16 #include <linux/etherdevice.h> 17 #include <linux/platform_device.h> 18 #include <linux/of.h> 19 #include <linux/of_net.h> 20 #include <linux/of_mdio.h> 21 #include <linux/phy.h> 22 #include <linux/phy_fixed.h> 23 #include <net/dsa.h> 24 #include <linux/clk.h> 25 #include <net/ip.h> 26 #include <net/ipv6.h> 27 28 #include "bcmsysport.h" 29 30 /* On SYSTEMPORT Lite, any register after RDMA_STATUS has the exact 31 * same layout, except it has been moved by 4 bytes up, *sigh* 32 */ 33 static inline u32 rdma_readl(struct bcm_sysport_priv *priv, u32 off) 34 { 35 if (priv->is_lite && off >= RDMA_STATUS) 36 off += 4; 37 return readl_relaxed(priv->base + SYS_PORT_RDMA_OFFSET + off); 38 } 39 40 static inline void rdma_writel(struct bcm_sysport_priv *priv, u32 val, u32 off) 41 { 42 if (priv->is_lite && off >= RDMA_STATUS) 43 off += 4; 44 writel_relaxed(val, priv->base + SYS_PORT_RDMA_OFFSET + off); 45 } 46 47 static inline u32 tdma_control_bit(struct bcm_sysport_priv *priv, u32 bit) 48 { 49 if (!priv->is_lite) { 50 return BIT(bit); 51 } else { 52 if (bit >= ACB_ALGO) 53 return BIT(bit + 1); 54 else 55 return BIT(bit); 56 } 57 } 58 59 /* L2-interrupt masking/unmasking helpers, does automatic saving of the applied 60 * mask in a software copy to avoid CPU_MASK_STATUS reads in hot-paths. 61 */ 62 #define BCM_SYSPORT_INTR_L2(which) \ 63 static inline void intrl2_##which##_mask_clear(struct bcm_sysport_priv *priv, \ 64 u32 mask) \ 65 { \ 66 priv->irq##which##_mask &= ~(mask); \ 67 intrl2_##which##_writel(priv, mask, INTRL2_CPU_MASK_CLEAR); \ 68 } \ 69 static inline void intrl2_##which##_mask_set(struct bcm_sysport_priv *priv, \ 70 u32 mask) \ 71 { \ 72 intrl2_## which##_writel(priv, mask, INTRL2_CPU_MASK_SET); \ 73 priv->irq##which##_mask |= (mask); \ 74 } \ 75 76 BCM_SYSPORT_INTR_L2(0) 77 BCM_SYSPORT_INTR_L2(1) 78 79 /* Register accesses to GISB/RBUS registers are expensive (few hundred 80 * nanoseconds), so keep the check for 64-bits explicit here to save 81 * one register write per-packet on 32-bits platforms. 82 */ 83 static inline void dma_desc_set_addr(struct bcm_sysport_priv *priv, 84 void __iomem *d, 85 dma_addr_t addr) 86 { 87 #ifdef CONFIG_PHYS_ADDR_T_64BIT 88 writel_relaxed(upper_32_bits(addr) & DESC_ADDR_HI_MASK, 89 d + DESC_ADDR_HI_STATUS_LEN); 90 #endif 91 writel_relaxed(lower_32_bits(addr), d + DESC_ADDR_LO); 92 } 93 94 /* Ethtool operations */ 95 static void bcm_sysport_set_rx_csum(struct net_device *dev, 96 netdev_features_t wanted) 97 { 98 struct bcm_sysport_priv *priv = netdev_priv(dev); 99 u32 reg; 100 101 priv->rx_chk_en = !!(wanted & NETIF_F_RXCSUM); 102 reg = rxchk_readl(priv, RXCHK_CONTROL); 103 /* Clear L2 header checks, which would prevent BPDUs 104 * from being received. 105 */ 106 reg &= ~RXCHK_L2_HDR_DIS; 107 if (priv->rx_chk_en) 108 reg |= RXCHK_EN; 109 else 110 reg &= ~RXCHK_EN; 111 112 /* If UniMAC forwards CRC, we need to skip over it to get 113 * a valid CHK bit to be set in the per-packet status word 114 */ 115 if (priv->rx_chk_en && priv->crc_fwd) 116 reg |= RXCHK_SKIP_FCS; 117 else 118 reg &= ~RXCHK_SKIP_FCS; 119 120 /* If Broadcom tags are enabled (e.g: using a switch), make 121 * sure we tell the RXCHK hardware to expect a 4-bytes Broadcom 122 * tag after the Ethernet MAC Source Address. 123 */ 124 if (netdev_uses_dsa(dev)) 125 reg |= RXCHK_BRCM_TAG_EN; 126 else 127 reg &= ~RXCHK_BRCM_TAG_EN; 128 129 rxchk_writel(priv, reg, RXCHK_CONTROL); 130 } 131 132 static void bcm_sysport_set_tx_csum(struct net_device *dev, 133 netdev_features_t wanted) 134 { 135 struct bcm_sysport_priv *priv = netdev_priv(dev); 136 u32 reg; 137 138 /* Hardware transmit checksum requires us to enable the Transmit status 139 * block prepended to the packet contents 140 */ 141 priv->tsb_en = !!(wanted & (NETIF_F_IP_CSUM | NETIF_F_IPV6_CSUM | 142 NETIF_F_HW_VLAN_CTAG_TX)); 143 reg = tdma_readl(priv, TDMA_CONTROL); 144 if (priv->tsb_en) 145 reg |= tdma_control_bit(priv, TSB_EN); 146 else 147 reg &= ~tdma_control_bit(priv, TSB_EN); 148 /* Indicating that software inserts Broadcom tags is needed for the TX 149 * checksum to be computed correctly when using VLAN HW acceleration, 150 * else it has no effect, so it can always be turned on. 151 */ 152 if (netdev_uses_dsa(dev)) 153 reg |= tdma_control_bit(priv, SW_BRCM_TAG); 154 else 155 reg &= ~tdma_control_bit(priv, SW_BRCM_TAG); 156 tdma_writel(priv, reg, TDMA_CONTROL); 157 158 /* Default TPID is ETH_P_8021AD, change to ETH_P_8021Q */ 159 if (wanted & NETIF_F_HW_VLAN_CTAG_TX) 160 tdma_writel(priv, ETH_P_8021Q, TDMA_TPID); 161 } 162 163 static int bcm_sysport_set_features(struct net_device *dev, 164 netdev_features_t features) 165 { 166 struct bcm_sysport_priv *priv = netdev_priv(dev); 167 int ret; 168 169 ret = clk_prepare_enable(priv->clk); 170 if (ret) 171 return ret; 172 173 /* Read CRC forward */ 174 if (!priv->is_lite) 175 priv->crc_fwd = !!(umac_readl(priv, UMAC_CMD) & CMD_CRC_FWD); 176 else 177 priv->crc_fwd = !((gib_readl(priv, GIB_CONTROL) & 178 GIB_FCS_STRIP) >> GIB_FCS_STRIP_SHIFT); 179 180 bcm_sysport_set_rx_csum(dev, features); 181 bcm_sysport_set_tx_csum(dev, features); 182 183 clk_disable_unprepare(priv->clk); 184 185 return 0; 186 } 187 188 /* Hardware counters must be kept in sync because the order/offset 189 * is important here (order in structure declaration = order in hardware) 190 */ 191 static const struct bcm_sysport_stats bcm_sysport_gstrings_stats[] = { 192 /* general stats */ 193 STAT_NETDEV64(rx_packets), 194 STAT_NETDEV64(tx_packets), 195 STAT_NETDEV64(rx_bytes), 196 STAT_NETDEV64(tx_bytes), 197 STAT_NETDEV(rx_errors), 198 STAT_NETDEV(tx_errors), 199 STAT_NETDEV(rx_dropped), 200 STAT_NETDEV(tx_dropped), 201 STAT_NETDEV(multicast), 202 /* UniMAC RSV counters */ 203 STAT_MIB_RX("rx_64_octets", mib.rx.pkt_cnt.cnt_64), 204 STAT_MIB_RX("rx_65_127_oct", mib.rx.pkt_cnt.cnt_127), 205 STAT_MIB_RX("rx_128_255_oct", mib.rx.pkt_cnt.cnt_255), 206 STAT_MIB_RX("rx_256_511_oct", mib.rx.pkt_cnt.cnt_511), 207 STAT_MIB_RX("rx_512_1023_oct", mib.rx.pkt_cnt.cnt_1023), 208 STAT_MIB_RX("rx_1024_1518_oct", mib.rx.pkt_cnt.cnt_1518), 209 STAT_MIB_RX("rx_vlan_1519_1522_oct", mib.rx.pkt_cnt.cnt_mgv), 210 STAT_MIB_RX("rx_1522_2047_oct", mib.rx.pkt_cnt.cnt_2047), 211 STAT_MIB_RX("rx_2048_4095_oct", mib.rx.pkt_cnt.cnt_4095), 212 STAT_MIB_RX("rx_4096_9216_oct", mib.rx.pkt_cnt.cnt_9216), 213 STAT_MIB_RX("rx_pkts", mib.rx.pkt), 214 STAT_MIB_RX("rx_bytes", mib.rx.bytes), 215 STAT_MIB_RX("rx_multicast", mib.rx.mca), 216 STAT_MIB_RX("rx_broadcast", mib.rx.bca), 217 STAT_MIB_RX("rx_fcs", mib.rx.fcs), 218 STAT_MIB_RX("rx_control", mib.rx.cf), 219 STAT_MIB_RX("rx_pause", mib.rx.pf), 220 STAT_MIB_RX("rx_unknown", mib.rx.uo), 221 STAT_MIB_RX("rx_align", mib.rx.aln), 222 STAT_MIB_RX("rx_outrange", mib.rx.flr), 223 STAT_MIB_RX("rx_code", mib.rx.cde), 224 STAT_MIB_RX("rx_carrier", mib.rx.fcr), 225 STAT_MIB_RX("rx_oversize", mib.rx.ovr), 226 STAT_MIB_RX("rx_jabber", mib.rx.jbr), 227 STAT_MIB_RX("rx_mtu_err", mib.rx.mtue), 228 STAT_MIB_RX("rx_good_pkts", mib.rx.pok), 229 STAT_MIB_RX("rx_unicast", mib.rx.uc), 230 STAT_MIB_RX("rx_ppp", mib.rx.ppp), 231 STAT_MIB_RX("rx_crc", mib.rx.rcrc), 232 /* UniMAC TSV counters */ 233 STAT_MIB_TX("tx_64_octets", mib.tx.pkt_cnt.cnt_64), 234 STAT_MIB_TX("tx_65_127_oct", mib.tx.pkt_cnt.cnt_127), 235 STAT_MIB_TX("tx_128_255_oct", mib.tx.pkt_cnt.cnt_255), 236 STAT_MIB_TX("tx_256_511_oct", mib.tx.pkt_cnt.cnt_511), 237 STAT_MIB_TX("tx_512_1023_oct", mib.tx.pkt_cnt.cnt_1023), 238 STAT_MIB_TX("tx_1024_1518_oct", mib.tx.pkt_cnt.cnt_1518), 239 STAT_MIB_TX("tx_vlan_1519_1522_oct", mib.tx.pkt_cnt.cnt_mgv), 240 STAT_MIB_TX("tx_1522_2047_oct", mib.tx.pkt_cnt.cnt_2047), 241 STAT_MIB_TX("tx_2048_4095_oct", mib.tx.pkt_cnt.cnt_4095), 242 STAT_MIB_TX("tx_4096_9216_oct", mib.tx.pkt_cnt.cnt_9216), 243 STAT_MIB_TX("tx_pkts", mib.tx.pkts), 244 STAT_MIB_TX("tx_multicast", mib.tx.mca), 245 STAT_MIB_TX("tx_broadcast", mib.tx.bca), 246 STAT_MIB_TX("tx_pause", mib.tx.pf), 247 STAT_MIB_TX("tx_control", mib.tx.cf), 248 STAT_MIB_TX("tx_fcs_err", mib.tx.fcs), 249 STAT_MIB_TX("tx_oversize", mib.tx.ovr), 250 STAT_MIB_TX("tx_defer", mib.tx.drf), 251 STAT_MIB_TX("tx_excess_defer", mib.tx.edf), 252 STAT_MIB_TX("tx_single_col", mib.tx.scl), 253 STAT_MIB_TX("tx_multi_col", mib.tx.mcl), 254 STAT_MIB_TX("tx_late_col", mib.tx.lcl), 255 STAT_MIB_TX("tx_excess_col", mib.tx.ecl), 256 STAT_MIB_TX("tx_frags", mib.tx.frg), 257 STAT_MIB_TX("tx_total_col", mib.tx.ncl), 258 STAT_MIB_TX("tx_jabber", mib.tx.jbr), 259 STAT_MIB_TX("tx_bytes", mib.tx.bytes), 260 STAT_MIB_TX("tx_good_pkts", mib.tx.pok), 261 STAT_MIB_TX("tx_unicast", mib.tx.uc), 262 /* UniMAC RUNT counters */ 263 STAT_RUNT("rx_runt_pkts", mib.rx_runt_cnt), 264 STAT_RUNT("rx_runt_valid_fcs", mib.rx_runt_fcs), 265 STAT_RUNT("rx_runt_inval_fcs_align", mib.rx_runt_fcs_align), 266 STAT_RUNT("rx_runt_bytes", mib.rx_runt_bytes), 267 /* RXCHK misc statistics */ 268 STAT_RXCHK("rxchk_bad_csum", mib.rxchk_bad_csum, RXCHK_BAD_CSUM_CNTR), 269 STAT_RXCHK("rxchk_other_pkt_disc", mib.rxchk_other_pkt_disc, 270 RXCHK_OTHER_DISC_CNTR), 271 /* RBUF misc statistics */ 272 STAT_RBUF("rbuf_ovflow_cnt", mib.rbuf_ovflow_cnt, RBUF_OVFL_DISC_CNTR), 273 STAT_RBUF("rbuf_err_cnt", mib.rbuf_err_cnt, RBUF_ERR_PKT_CNTR), 274 /* RDMA misc statistics */ 275 STAT_RDMA("rdma_ovflow_cnt", mib.rdma_ovflow_cnt, RDMA_OVFL_DISC_CNTR), 276 STAT_MIB_SOFT("alloc_rx_buff_failed", mib.alloc_rx_buff_failed), 277 STAT_MIB_SOFT("rx_dma_failed", mib.rx_dma_failed), 278 STAT_MIB_SOFT("tx_dma_failed", mib.tx_dma_failed), 279 STAT_MIB_SOFT("tx_realloc_tsb", mib.tx_realloc_tsb), 280 STAT_MIB_SOFT("tx_realloc_tsb_failed", mib.tx_realloc_tsb_failed), 281 /* Per TX-queue statistics are dynamically appended */ 282 }; 283 284 #define BCM_SYSPORT_STATS_LEN ARRAY_SIZE(bcm_sysport_gstrings_stats) 285 286 static void bcm_sysport_get_drvinfo(struct net_device *dev, 287 struct ethtool_drvinfo *info) 288 { 289 strscpy(info->driver, KBUILD_MODNAME, sizeof(info->driver)); 290 strscpy(info->bus_info, "platform", sizeof(info->bus_info)); 291 } 292 293 static u32 bcm_sysport_get_msglvl(struct net_device *dev) 294 { 295 struct bcm_sysport_priv *priv = netdev_priv(dev); 296 297 return priv->msg_enable; 298 } 299 300 static void bcm_sysport_set_msglvl(struct net_device *dev, u32 enable) 301 { 302 struct bcm_sysport_priv *priv = netdev_priv(dev); 303 304 priv->msg_enable = enable; 305 } 306 307 static inline bool bcm_sysport_lite_stat_valid(enum bcm_sysport_stat_type type) 308 { 309 switch (type) { 310 case BCM_SYSPORT_STAT_NETDEV: 311 case BCM_SYSPORT_STAT_NETDEV64: 312 case BCM_SYSPORT_STAT_RXCHK: 313 case BCM_SYSPORT_STAT_RBUF: 314 case BCM_SYSPORT_STAT_RDMA: 315 case BCM_SYSPORT_STAT_SOFT: 316 return true; 317 default: 318 return false; 319 } 320 } 321 322 static int bcm_sysport_get_sset_count(struct net_device *dev, int string_set) 323 { 324 struct bcm_sysport_priv *priv = netdev_priv(dev); 325 const struct bcm_sysport_stats *s; 326 unsigned int i, j; 327 328 switch (string_set) { 329 case ETH_SS_STATS: 330 for (i = 0, j = 0; i < BCM_SYSPORT_STATS_LEN; i++) { 331 s = &bcm_sysport_gstrings_stats[i]; 332 if (priv->is_lite && 333 !bcm_sysport_lite_stat_valid(s->type)) 334 continue; 335 j++; 336 } 337 /* Include per-queue statistics */ 338 return j + dev->num_tx_queues * NUM_SYSPORT_TXQ_STAT; 339 default: 340 return -EOPNOTSUPP; 341 } 342 } 343 344 static void bcm_sysport_get_strings(struct net_device *dev, 345 u32 stringset, u8 *data) 346 { 347 struct bcm_sysport_priv *priv = netdev_priv(dev); 348 const struct bcm_sysport_stats *s; 349 int i; 350 351 switch (stringset) { 352 case ETH_SS_STATS: 353 for (i = 0; i < BCM_SYSPORT_STATS_LEN; i++) { 354 s = &bcm_sysport_gstrings_stats[i]; 355 if (priv->is_lite && 356 !bcm_sysport_lite_stat_valid(s->type)) 357 continue; 358 359 ethtool_puts(&data, s->stat_string); 360 } 361 362 for (i = 0; i < dev->num_tx_queues; i++) { 363 ethtool_sprintf(&data, "txq%d_packets", i); 364 ethtool_sprintf(&data, "txq%d_bytes", i); 365 } 366 break; 367 default: 368 break; 369 } 370 } 371 372 static void bcm_sysport_update_mib_counters(struct bcm_sysport_priv *priv) 373 { 374 int i, j = 0; 375 376 for (i = 0; i < BCM_SYSPORT_STATS_LEN; i++) { 377 const struct bcm_sysport_stats *s; 378 u8 offset = 0; 379 u32 val = 0; 380 char *p; 381 382 s = &bcm_sysport_gstrings_stats[i]; 383 switch (s->type) { 384 case BCM_SYSPORT_STAT_NETDEV: 385 case BCM_SYSPORT_STAT_NETDEV64: 386 case BCM_SYSPORT_STAT_SOFT: 387 continue; 388 case BCM_SYSPORT_STAT_MIB_RX: 389 case BCM_SYSPORT_STAT_MIB_TX: 390 case BCM_SYSPORT_STAT_RUNT: 391 if (priv->is_lite) 392 continue; 393 394 if (s->type != BCM_SYSPORT_STAT_MIB_RX) 395 offset = UMAC_MIB_STAT_OFFSET; 396 val = umac_readl(priv, UMAC_MIB_START + j + offset); 397 break; 398 case BCM_SYSPORT_STAT_RXCHK: 399 val = rxchk_readl(priv, s->reg_offset); 400 if (val == ~0) 401 rxchk_writel(priv, 0, s->reg_offset); 402 break; 403 case BCM_SYSPORT_STAT_RBUF: 404 val = rbuf_readl(priv, s->reg_offset); 405 if (val == ~0) 406 rbuf_writel(priv, 0, s->reg_offset); 407 break; 408 case BCM_SYSPORT_STAT_RDMA: 409 if (!priv->is_lite) 410 continue; 411 412 val = rdma_readl(priv, s->reg_offset); 413 if (val == ~0) 414 rdma_writel(priv, 0, s->reg_offset); 415 break; 416 } 417 418 j += s->stat_sizeof; 419 p = (char *)priv + s->stat_offset; 420 *(u32 *)p = val; 421 } 422 423 netif_dbg(priv, hw, priv->netdev, "updated MIB counters\n"); 424 } 425 426 static void bcm_sysport_update_tx_stats(struct bcm_sysport_priv *priv, 427 u64 *tx_bytes, u64 *tx_packets) 428 { 429 struct bcm_sysport_tx_ring *ring; 430 u64 bytes = 0, packets = 0; 431 unsigned int start; 432 unsigned int q; 433 434 for (q = 0; q < priv->netdev->num_tx_queues; q++) { 435 ring = &priv->tx_rings[q]; 436 do { 437 start = u64_stats_fetch_begin(&priv->syncp); 438 bytes = ring->bytes; 439 packets = ring->packets; 440 } while (u64_stats_fetch_retry(&priv->syncp, start)); 441 442 *tx_bytes += bytes; 443 *tx_packets += packets; 444 } 445 } 446 447 static void bcm_sysport_get_stats(struct net_device *dev, 448 struct ethtool_stats *stats, u64 *data) 449 { 450 struct bcm_sysport_priv *priv = netdev_priv(dev); 451 struct bcm_sysport_stats64 *stats64 = &priv->stats64; 452 struct u64_stats_sync *syncp = &priv->syncp; 453 struct bcm_sysport_tx_ring *ring; 454 u64 tx_bytes = 0, tx_packets = 0; 455 unsigned int start; 456 int i, j; 457 458 if (netif_running(dev)) { 459 bcm_sysport_update_mib_counters(priv); 460 bcm_sysport_update_tx_stats(priv, &tx_bytes, &tx_packets); 461 stats64->tx_bytes = tx_bytes; 462 stats64->tx_packets = tx_packets; 463 } 464 465 for (i = 0, j = 0; i < BCM_SYSPORT_STATS_LEN; i++) { 466 const struct bcm_sysport_stats *s; 467 char *p; 468 469 s = &bcm_sysport_gstrings_stats[i]; 470 if (s->type == BCM_SYSPORT_STAT_NETDEV) 471 p = (char *)&dev->stats; 472 else if (s->type == BCM_SYSPORT_STAT_NETDEV64) 473 p = (char *)stats64; 474 else 475 p = (char *)priv; 476 477 if (priv->is_lite && !bcm_sysport_lite_stat_valid(s->type)) 478 continue; 479 p += s->stat_offset; 480 481 if (s->stat_sizeof == sizeof(u64) && 482 s->type == BCM_SYSPORT_STAT_NETDEV64) { 483 do { 484 start = u64_stats_fetch_begin(syncp); 485 data[i] = *(u64 *)p; 486 } while (u64_stats_fetch_retry(syncp, start)); 487 } else 488 data[i] = *(u32 *)p; 489 j++; 490 } 491 492 /* For SYSTEMPORT Lite since we have holes in our statistics, j would 493 * be equal to BCM_SYSPORT_STATS_LEN at the end of the loop, but it 494 * needs to point to how many total statistics we have minus the 495 * number of per TX queue statistics 496 */ 497 j = bcm_sysport_get_sset_count(dev, ETH_SS_STATS) - 498 dev->num_tx_queues * NUM_SYSPORT_TXQ_STAT; 499 500 for (i = 0; i < dev->num_tx_queues; i++) { 501 ring = &priv->tx_rings[i]; 502 data[j] = ring->packets; 503 j++; 504 data[j] = ring->bytes; 505 j++; 506 } 507 } 508 509 static void bcm_sysport_get_wol(struct net_device *dev, 510 struct ethtool_wolinfo *wol) 511 { 512 struct bcm_sysport_priv *priv = netdev_priv(dev); 513 514 wol->supported = WAKE_MAGIC | WAKE_MAGICSECURE | WAKE_FILTER; 515 wol->wolopts = priv->wolopts; 516 517 if (!(priv->wolopts & WAKE_MAGICSECURE)) 518 return; 519 520 memcpy(wol->sopass, priv->sopass, sizeof(priv->sopass)); 521 } 522 523 static int bcm_sysport_set_wol(struct net_device *dev, 524 struct ethtool_wolinfo *wol) 525 { 526 struct bcm_sysport_priv *priv = netdev_priv(dev); 527 struct device *kdev = &priv->pdev->dev; 528 u32 supported = WAKE_MAGIC | WAKE_MAGICSECURE | WAKE_FILTER; 529 530 if (!device_can_wakeup(kdev)) 531 return -ENOTSUPP; 532 533 if (wol->wolopts & ~supported) 534 return -EINVAL; 535 536 if (wol->wolopts & WAKE_MAGICSECURE) 537 memcpy(priv->sopass, wol->sopass, sizeof(priv->sopass)); 538 539 /* Flag the device and relevant IRQ as wakeup capable */ 540 if (wol->wolopts) { 541 device_set_wakeup_enable(kdev, 1); 542 if (priv->wol_irq_disabled) 543 enable_irq_wake(priv->wol_irq); 544 priv->wol_irq_disabled = 0; 545 } else { 546 device_set_wakeup_enable(kdev, 0); 547 /* Avoid unbalanced disable_irq_wake calls */ 548 if (!priv->wol_irq_disabled) 549 disable_irq_wake(priv->wol_irq); 550 priv->wol_irq_disabled = 1; 551 } 552 553 priv->wolopts = wol->wolopts; 554 555 return 0; 556 } 557 558 static void bcm_sysport_set_rx_coalesce(struct bcm_sysport_priv *priv, 559 u32 usecs, u32 pkts) 560 { 561 u32 reg; 562 563 reg = rdma_readl(priv, RDMA_MBDONE_INTR); 564 reg &= ~(RDMA_INTR_THRESH_MASK | 565 RDMA_TIMEOUT_MASK << RDMA_TIMEOUT_SHIFT); 566 reg |= pkts; 567 reg |= DIV_ROUND_UP(usecs * 1000, 8192) << RDMA_TIMEOUT_SHIFT; 568 rdma_writel(priv, reg, RDMA_MBDONE_INTR); 569 } 570 571 static void bcm_sysport_set_tx_coalesce(struct bcm_sysport_tx_ring *ring, 572 struct ethtool_coalesce *ec) 573 { 574 struct bcm_sysport_priv *priv = ring->priv; 575 u32 reg; 576 577 reg = tdma_readl(priv, TDMA_DESC_RING_INTR_CONTROL(ring->index)); 578 reg &= ~(RING_INTR_THRESH_MASK | 579 RING_TIMEOUT_MASK << RING_TIMEOUT_SHIFT); 580 reg |= ec->tx_max_coalesced_frames; 581 reg |= DIV_ROUND_UP(ec->tx_coalesce_usecs * 1000, 8192) << 582 RING_TIMEOUT_SHIFT; 583 tdma_writel(priv, reg, TDMA_DESC_RING_INTR_CONTROL(ring->index)); 584 } 585 586 static int bcm_sysport_get_coalesce(struct net_device *dev, 587 struct ethtool_coalesce *ec, 588 struct kernel_ethtool_coalesce *kernel_coal, 589 struct netlink_ext_ack *extack) 590 { 591 struct bcm_sysport_priv *priv = netdev_priv(dev); 592 u32 reg; 593 594 reg = tdma_readl(priv, TDMA_DESC_RING_INTR_CONTROL(0)); 595 596 ec->tx_coalesce_usecs = (reg >> RING_TIMEOUT_SHIFT) * 8192 / 1000; 597 ec->tx_max_coalesced_frames = reg & RING_INTR_THRESH_MASK; 598 599 reg = rdma_readl(priv, RDMA_MBDONE_INTR); 600 601 ec->rx_coalesce_usecs = (reg >> RDMA_TIMEOUT_SHIFT) * 8192 / 1000; 602 ec->rx_max_coalesced_frames = reg & RDMA_INTR_THRESH_MASK; 603 ec->use_adaptive_rx_coalesce = priv->dim.use_dim; 604 605 return 0; 606 } 607 608 static int bcm_sysport_set_coalesce(struct net_device *dev, 609 struct ethtool_coalesce *ec, 610 struct kernel_ethtool_coalesce *kernel_coal, 611 struct netlink_ext_ack *extack) 612 { 613 struct bcm_sysport_priv *priv = netdev_priv(dev); 614 struct dim_cq_moder moder; 615 u32 usecs, pkts; 616 unsigned int i; 617 618 /* Base system clock is 125Mhz, DMA timeout is this reference clock 619 * divided by 1024, which yield roughly 8.192 us, our maximum value has 620 * to fit in the RING_TIMEOUT_MASK (16 bits). 621 */ 622 if (ec->tx_max_coalesced_frames > RING_INTR_THRESH_MASK || 623 ec->tx_coalesce_usecs > (RING_TIMEOUT_MASK * 8) + 1 || 624 ec->rx_max_coalesced_frames > RDMA_INTR_THRESH_MASK || 625 ec->rx_coalesce_usecs > (RDMA_TIMEOUT_MASK * 8) + 1) 626 return -EINVAL; 627 628 if ((ec->tx_coalesce_usecs == 0 && ec->tx_max_coalesced_frames == 0) || 629 (ec->rx_coalesce_usecs == 0 && ec->rx_max_coalesced_frames == 0)) 630 return -EINVAL; 631 632 for (i = 0; i < dev->num_tx_queues; i++) 633 bcm_sysport_set_tx_coalesce(&priv->tx_rings[i], ec); 634 635 priv->rx_coalesce_usecs = ec->rx_coalesce_usecs; 636 priv->rx_max_coalesced_frames = ec->rx_max_coalesced_frames; 637 usecs = priv->rx_coalesce_usecs; 638 pkts = priv->rx_max_coalesced_frames; 639 640 if (ec->use_adaptive_rx_coalesce && !priv->dim.use_dim) { 641 moder = net_dim_get_def_rx_moderation(priv->dim.dim.mode); 642 usecs = moder.usec; 643 pkts = moder.pkts; 644 } 645 646 priv->dim.use_dim = ec->use_adaptive_rx_coalesce; 647 648 /* Apply desired coalescing parameters */ 649 bcm_sysport_set_rx_coalesce(priv, usecs, pkts); 650 651 return 0; 652 } 653 654 static void bcm_sysport_free_cb(struct bcm_sysport_cb *cb) 655 { 656 dev_consume_skb_any(cb->skb); 657 cb->skb = NULL; 658 dma_unmap_addr_set(cb, dma_addr, 0); 659 } 660 661 static struct sk_buff *bcm_sysport_rx_refill(struct bcm_sysport_priv *priv, 662 struct bcm_sysport_cb *cb) 663 { 664 struct device *kdev = &priv->pdev->dev; 665 struct net_device *ndev = priv->netdev; 666 struct sk_buff *skb, *rx_skb; 667 dma_addr_t mapping; 668 669 /* Allocate a new SKB for a new packet */ 670 skb = __netdev_alloc_skb(priv->netdev, RX_BUF_LENGTH, 671 GFP_ATOMIC | __GFP_NOWARN); 672 if (!skb) { 673 priv->mib.alloc_rx_buff_failed++; 674 netif_err(priv, rx_err, ndev, "SKB alloc failed\n"); 675 return NULL; 676 } 677 678 mapping = dma_map_single(kdev, skb->data, 679 RX_BUF_LENGTH, DMA_FROM_DEVICE); 680 if (dma_mapping_error(kdev, mapping)) { 681 priv->mib.rx_dma_failed++; 682 dev_kfree_skb_any(skb); 683 netif_err(priv, rx_err, ndev, "DMA mapping failure\n"); 684 return NULL; 685 } 686 687 /* Grab the current SKB on the ring */ 688 rx_skb = cb->skb; 689 if (likely(rx_skb)) 690 dma_unmap_single(kdev, dma_unmap_addr(cb, dma_addr), 691 RX_BUF_LENGTH, DMA_FROM_DEVICE); 692 693 /* Put the new SKB on the ring */ 694 cb->skb = skb; 695 dma_unmap_addr_set(cb, dma_addr, mapping); 696 dma_desc_set_addr(priv, cb->bd_addr, mapping); 697 698 netif_dbg(priv, rx_status, ndev, "RX refill\n"); 699 700 /* Return the current SKB to the caller */ 701 return rx_skb; 702 } 703 704 static int bcm_sysport_alloc_rx_bufs(struct bcm_sysport_priv *priv) 705 { 706 struct bcm_sysport_cb *cb; 707 struct sk_buff *skb; 708 unsigned int i; 709 710 for (i = 0; i < priv->num_rx_bds; i++) { 711 cb = &priv->rx_cbs[i]; 712 skb = bcm_sysport_rx_refill(priv, cb); 713 dev_kfree_skb(skb); 714 if (!cb->skb) 715 return -ENOMEM; 716 } 717 718 return 0; 719 } 720 721 /* Poll the hardware for up to budget packets to process */ 722 static unsigned int bcm_sysport_desc_rx(struct bcm_sysport_priv *priv, 723 unsigned int budget) 724 { 725 struct bcm_sysport_stats64 *stats64 = &priv->stats64; 726 struct net_device *ndev = priv->netdev; 727 unsigned int processed = 0, to_process; 728 unsigned int processed_bytes = 0; 729 struct bcm_sysport_cb *cb; 730 struct sk_buff *skb; 731 unsigned int p_index; 732 u16 len, status; 733 struct bcm_rsb *rsb; 734 735 /* Clear status before servicing to reduce spurious interrupts */ 736 intrl2_0_writel(priv, INTRL2_0_RDMA_MBDONE, INTRL2_CPU_CLEAR); 737 738 /* Determine how much we should process since last call, SYSTEMPORT Lite 739 * groups the producer and consumer indexes into the same 32-bit 740 * which we access using RDMA_CONS_INDEX 741 */ 742 if (!priv->is_lite) 743 p_index = rdma_readl(priv, RDMA_PROD_INDEX); 744 else 745 p_index = rdma_readl(priv, RDMA_CONS_INDEX); 746 p_index &= RDMA_PROD_INDEX_MASK; 747 748 to_process = (p_index - priv->rx_c_index) & RDMA_CONS_INDEX_MASK; 749 750 netif_dbg(priv, rx_status, ndev, 751 "p_index=%d rx_c_index=%d to_process=%d\n", 752 p_index, priv->rx_c_index, to_process); 753 754 while ((processed < to_process) && (processed < budget)) { 755 cb = &priv->rx_cbs[priv->rx_read_ptr]; 756 skb = bcm_sysport_rx_refill(priv, cb); 757 758 759 /* We do not have a backing SKB, so we do not a corresponding 760 * DMA mapping for this incoming packet since 761 * bcm_sysport_rx_refill always either has both skb and mapping 762 * or none. 763 */ 764 if (unlikely(!skb)) { 765 netif_err(priv, rx_err, ndev, "out of memory!\n"); 766 ndev->stats.rx_dropped++; 767 ndev->stats.rx_errors++; 768 goto next; 769 } 770 771 /* Extract the Receive Status Block prepended */ 772 rsb = (struct bcm_rsb *)skb->data; 773 len = (rsb->rx_status_len >> DESC_LEN_SHIFT) & DESC_LEN_MASK; 774 status = (rsb->rx_status_len >> DESC_STATUS_SHIFT) & 775 DESC_STATUS_MASK; 776 777 netif_dbg(priv, rx_status, ndev, 778 "p=%d, c=%d, rd_ptr=%d, len=%d, flag=0x%04x\n", 779 p_index, priv->rx_c_index, priv->rx_read_ptr, 780 len, status); 781 782 if (unlikely(len > RX_BUF_LENGTH)) { 783 netif_err(priv, rx_status, ndev, "oversized packet\n"); 784 ndev->stats.rx_length_errors++; 785 ndev->stats.rx_errors++; 786 dev_kfree_skb_any(skb); 787 goto next; 788 } 789 790 if (unlikely(!(status & DESC_EOP) || !(status & DESC_SOP))) { 791 netif_err(priv, rx_status, ndev, "fragmented packet!\n"); 792 ndev->stats.rx_dropped++; 793 ndev->stats.rx_errors++; 794 dev_kfree_skb_any(skb); 795 goto next; 796 } 797 798 if (unlikely(status & (RX_STATUS_ERR | RX_STATUS_OVFLOW))) { 799 netif_err(priv, rx_err, ndev, "error packet\n"); 800 if (status & RX_STATUS_OVFLOW) 801 ndev->stats.rx_over_errors++; 802 ndev->stats.rx_dropped++; 803 ndev->stats.rx_errors++; 804 dev_kfree_skb_any(skb); 805 goto next; 806 } 807 808 skb_put(skb, len); 809 810 /* Hardware validated our checksum */ 811 if (likely(status & DESC_L4_CSUM)) 812 skb->ip_summed = CHECKSUM_UNNECESSARY; 813 814 /* Hardware pre-pends packets with 2bytes before Ethernet 815 * header plus we have the Receive Status Block, strip off all 816 * of this from the SKB. 817 */ 818 skb_pull(skb, sizeof(*rsb) + 2); 819 len -= (sizeof(*rsb) + 2); 820 processed_bytes += len; 821 822 /* UniMAC may forward CRC */ 823 if (priv->crc_fwd) { 824 skb_trim(skb, len - ETH_FCS_LEN); 825 len -= ETH_FCS_LEN; 826 } 827 828 skb->protocol = eth_type_trans(skb, ndev); 829 ndev->stats.rx_packets++; 830 ndev->stats.rx_bytes += len; 831 u64_stats_update_begin(&priv->syncp); 832 stats64->rx_packets++; 833 stats64->rx_bytes += len; 834 u64_stats_update_end(&priv->syncp); 835 836 napi_gro_receive(&priv->napi, skb); 837 next: 838 processed++; 839 priv->rx_read_ptr++; 840 841 if (priv->rx_read_ptr == priv->num_rx_bds) 842 priv->rx_read_ptr = 0; 843 } 844 845 priv->dim.packets = processed; 846 priv->dim.bytes = processed_bytes; 847 848 return processed; 849 } 850 851 static void bcm_sysport_tx_reclaim_one(struct bcm_sysport_tx_ring *ring, 852 struct bcm_sysport_cb *cb, 853 unsigned int *bytes_compl, 854 unsigned int *pkts_compl) 855 { 856 struct bcm_sysport_priv *priv = ring->priv; 857 struct device *kdev = &priv->pdev->dev; 858 859 if (cb->skb) { 860 *bytes_compl += cb->skb->len; 861 dma_unmap_single(kdev, dma_unmap_addr(cb, dma_addr), 862 dma_unmap_len(cb, dma_len), 863 DMA_TO_DEVICE); 864 (*pkts_compl)++; 865 bcm_sysport_free_cb(cb); 866 /* SKB fragment */ 867 } else if (dma_unmap_addr(cb, dma_addr)) { 868 *bytes_compl += dma_unmap_len(cb, dma_len); 869 dma_unmap_page(kdev, dma_unmap_addr(cb, dma_addr), 870 dma_unmap_len(cb, dma_len), DMA_TO_DEVICE); 871 dma_unmap_addr_set(cb, dma_addr, 0); 872 } 873 } 874 875 /* Reclaim queued SKBs for transmission completion, lockless version */ 876 static unsigned int __bcm_sysport_tx_reclaim(struct bcm_sysport_priv *priv, 877 struct bcm_sysport_tx_ring *ring) 878 { 879 unsigned int pkts_compl = 0, bytes_compl = 0; 880 struct net_device *ndev = priv->netdev; 881 unsigned int txbds_processed = 0; 882 struct bcm_sysport_cb *cb; 883 unsigned int txbds_ready; 884 unsigned int c_index; 885 u32 hw_ind; 886 887 /* Clear status before servicing to reduce spurious interrupts */ 888 if (!ring->priv->is_lite) 889 intrl2_1_writel(ring->priv, BIT(ring->index), INTRL2_CPU_CLEAR); 890 else 891 intrl2_0_writel(ring->priv, BIT(ring->index + 892 INTRL2_0_TDMA_MBDONE_SHIFT), INTRL2_CPU_CLEAR); 893 894 /* Compute how many descriptors have been processed since last call */ 895 hw_ind = tdma_readl(priv, TDMA_DESC_RING_PROD_CONS_INDEX(ring->index)); 896 c_index = (hw_ind >> RING_CONS_INDEX_SHIFT) & RING_CONS_INDEX_MASK; 897 txbds_ready = (c_index - ring->c_index) & RING_CONS_INDEX_MASK; 898 899 netif_dbg(priv, tx_done, ndev, 900 "ring=%d old_c_index=%u c_index=%u txbds_ready=%u\n", 901 ring->index, ring->c_index, c_index, txbds_ready); 902 903 while (txbds_processed < txbds_ready) { 904 cb = &ring->cbs[ring->clean_index]; 905 bcm_sysport_tx_reclaim_one(ring, cb, &bytes_compl, &pkts_compl); 906 907 ring->desc_count++; 908 txbds_processed++; 909 910 if (likely(ring->clean_index < ring->size - 1)) 911 ring->clean_index++; 912 else 913 ring->clean_index = 0; 914 } 915 916 u64_stats_update_begin(&priv->syncp); 917 ring->packets += pkts_compl; 918 ring->bytes += bytes_compl; 919 u64_stats_update_end(&priv->syncp); 920 921 ring->c_index = c_index; 922 923 netif_dbg(priv, tx_done, ndev, 924 "ring=%d c_index=%d pkts_compl=%d, bytes_compl=%d\n", 925 ring->index, ring->c_index, pkts_compl, bytes_compl); 926 927 return pkts_compl; 928 } 929 930 /* Locked version of the per-ring TX reclaim routine */ 931 static unsigned int bcm_sysport_tx_reclaim(struct bcm_sysport_priv *priv, 932 struct bcm_sysport_tx_ring *ring) 933 { 934 struct netdev_queue *txq; 935 unsigned int released; 936 unsigned long flags; 937 938 txq = netdev_get_tx_queue(priv->netdev, ring->index); 939 940 spin_lock_irqsave(&ring->lock, flags); 941 released = __bcm_sysport_tx_reclaim(priv, ring); 942 if (released) 943 netif_tx_wake_queue(txq); 944 945 spin_unlock_irqrestore(&ring->lock, flags); 946 947 return released; 948 } 949 950 /* Locked version of the per-ring TX reclaim, but does not wake the queue */ 951 static void bcm_sysport_tx_clean(struct bcm_sysport_priv *priv, 952 struct bcm_sysport_tx_ring *ring) 953 { 954 unsigned long flags; 955 956 spin_lock_irqsave(&ring->lock, flags); 957 __bcm_sysport_tx_reclaim(priv, ring); 958 spin_unlock_irqrestore(&ring->lock, flags); 959 } 960 961 static int bcm_sysport_tx_poll(struct napi_struct *napi, int budget) 962 { 963 struct bcm_sysport_tx_ring *ring = 964 container_of(napi, struct bcm_sysport_tx_ring, napi); 965 unsigned int work_done = 0; 966 967 work_done = bcm_sysport_tx_reclaim(ring->priv, ring); 968 969 if (work_done == 0) { 970 napi_complete(napi); 971 /* re-enable TX interrupt */ 972 if (!ring->priv->is_lite) 973 intrl2_1_mask_clear(ring->priv, BIT(ring->index)); 974 else 975 intrl2_0_mask_clear(ring->priv, BIT(ring->index + 976 INTRL2_0_TDMA_MBDONE_SHIFT)); 977 978 return 0; 979 } 980 981 return budget; 982 } 983 984 static void bcm_sysport_tx_reclaim_all(struct bcm_sysport_priv *priv) 985 { 986 unsigned int q; 987 988 for (q = 0; q < priv->netdev->num_tx_queues; q++) 989 bcm_sysport_tx_reclaim(priv, &priv->tx_rings[q]); 990 } 991 992 static int bcm_sysport_poll(struct napi_struct *napi, int budget) 993 { 994 struct bcm_sysport_priv *priv = 995 container_of(napi, struct bcm_sysport_priv, napi); 996 struct dim_sample dim_sample = {}; 997 unsigned int work_done = 0; 998 999 work_done = bcm_sysport_desc_rx(priv, budget); 1000 1001 priv->rx_c_index += work_done; 1002 priv->rx_c_index &= RDMA_CONS_INDEX_MASK; 1003 1004 /* SYSTEMPORT Lite groups the producer/consumer index, producer is 1005 * maintained by HW, but writes to it will be ignore while RDMA 1006 * is active 1007 */ 1008 if (!priv->is_lite) 1009 rdma_writel(priv, priv->rx_c_index, RDMA_CONS_INDEX); 1010 else 1011 rdma_writel(priv, priv->rx_c_index << 16, RDMA_CONS_INDEX); 1012 1013 if (work_done < budget) { 1014 napi_complete_done(napi, work_done); 1015 /* re-enable RX interrupts */ 1016 intrl2_0_mask_clear(priv, INTRL2_0_RDMA_MBDONE); 1017 } 1018 1019 if (priv->dim.use_dim) { 1020 dim_update_sample(priv->dim.event_ctr, priv->dim.packets, 1021 priv->dim.bytes, &dim_sample); 1022 net_dim(&priv->dim.dim, &dim_sample); 1023 } 1024 1025 return work_done; 1026 } 1027 1028 static void mpd_enable_set(struct bcm_sysport_priv *priv, bool enable) 1029 { 1030 u32 reg, bit; 1031 1032 reg = umac_readl(priv, UMAC_MPD_CTRL); 1033 if (enable) 1034 reg |= MPD_EN; 1035 else 1036 reg &= ~MPD_EN; 1037 umac_writel(priv, reg, UMAC_MPD_CTRL); 1038 1039 if (priv->is_lite) 1040 bit = RBUF_ACPI_EN_LITE; 1041 else 1042 bit = RBUF_ACPI_EN; 1043 1044 reg = rbuf_readl(priv, RBUF_CONTROL); 1045 if (enable) 1046 reg |= bit; 1047 else 1048 reg &= ~bit; 1049 rbuf_writel(priv, reg, RBUF_CONTROL); 1050 } 1051 1052 static void bcm_sysport_resume_from_wol(struct bcm_sysport_priv *priv) 1053 { 1054 unsigned int index; 1055 u32 reg; 1056 1057 /* Disable RXCHK, active filters and Broadcom tag matching */ 1058 reg = rxchk_readl(priv, RXCHK_CONTROL); 1059 reg &= ~(RXCHK_BRCM_TAG_MATCH_MASK << 1060 RXCHK_BRCM_TAG_MATCH_SHIFT | RXCHK_EN | RXCHK_BRCM_TAG_EN); 1061 rxchk_writel(priv, reg, RXCHK_CONTROL); 1062 1063 /* Make sure we restore correct CID index in case HW lost 1064 * its context during deep idle state 1065 */ 1066 for_each_set_bit(index, priv->filters, RXCHK_BRCM_TAG_MAX) { 1067 rxchk_writel(priv, priv->filters_loc[index] << 1068 RXCHK_BRCM_TAG_CID_SHIFT, RXCHK_BRCM_TAG(index)); 1069 rxchk_writel(priv, 0xff00ffff, RXCHK_BRCM_TAG_MASK(index)); 1070 } 1071 1072 /* Clear the MagicPacket detection logic */ 1073 mpd_enable_set(priv, false); 1074 1075 reg = intrl2_0_readl(priv, INTRL2_CPU_STATUS); 1076 if (reg & INTRL2_0_MPD) 1077 netdev_info(priv->netdev, "Wake-on-LAN (MPD) interrupt!\n"); 1078 1079 if (reg & INTRL2_0_BRCM_MATCH_TAG) { 1080 reg = rxchk_readl(priv, RXCHK_BRCM_TAG_MATCH_STATUS) & 1081 RXCHK_BRCM_TAG_MATCH_MASK; 1082 netdev_info(priv->netdev, 1083 "Wake-on-LAN (filters 0x%02x) interrupt!\n", reg); 1084 } 1085 1086 netif_dbg(priv, wol, priv->netdev, "resumed from WOL\n"); 1087 } 1088 1089 static void bcm_sysport_dim_work(struct work_struct *work) 1090 { 1091 struct dim *dim = container_of(work, struct dim, work); 1092 struct bcm_sysport_net_dim *ndim = 1093 container_of(dim, struct bcm_sysport_net_dim, dim); 1094 struct bcm_sysport_priv *priv = 1095 container_of(ndim, struct bcm_sysport_priv, dim); 1096 struct dim_cq_moder cur_profile = net_dim_get_rx_moderation(dim->mode, 1097 dim->profile_ix); 1098 1099 bcm_sysport_set_rx_coalesce(priv, cur_profile.usec, cur_profile.pkts); 1100 dim->state = DIM_START_MEASURE; 1101 } 1102 1103 /* RX and misc interrupt routine */ 1104 static irqreturn_t bcm_sysport_rx_isr(int irq, void *dev_id) 1105 { 1106 struct net_device *dev = dev_id; 1107 struct bcm_sysport_priv *priv = netdev_priv(dev); 1108 struct bcm_sysport_tx_ring *txr; 1109 unsigned int ring, ring_bit; 1110 1111 priv->irq0_stat = intrl2_0_readl(priv, INTRL2_CPU_STATUS) & 1112 ~intrl2_0_readl(priv, INTRL2_CPU_MASK_STATUS); 1113 intrl2_0_writel(priv, priv->irq0_stat, INTRL2_CPU_CLEAR); 1114 1115 if (unlikely(priv->irq0_stat == 0)) { 1116 netdev_warn(priv->netdev, "spurious RX interrupt\n"); 1117 return IRQ_NONE; 1118 } 1119 1120 if (priv->irq0_stat & INTRL2_0_RDMA_MBDONE) { 1121 priv->dim.event_ctr++; 1122 if (likely(napi_schedule_prep(&priv->napi))) { 1123 /* disable RX interrupts */ 1124 intrl2_0_mask_set(priv, INTRL2_0_RDMA_MBDONE); 1125 __napi_schedule_irqoff(&priv->napi); 1126 } 1127 } 1128 1129 /* TX ring is full, perform a full reclaim since we do not know 1130 * which one would trigger this interrupt 1131 */ 1132 if (priv->irq0_stat & INTRL2_0_TX_RING_FULL) 1133 bcm_sysport_tx_reclaim_all(priv); 1134 1135 if (!priv->is_lite) 1136 goto out; 1137 1138 for (ring = 0; ring < dev->num_tx_queues; ring++) { 1139 ring_bit = BIT(ring + INTRL2_0_TDMA_MBDONE_SHIFT); 1140 if (!(priv->irq0_stat & ring_bit)) 1141 continue; 1142 1143 txr = &priv->tx_rings[ring]; 1144 1145 if (likely(napi_schedule_prep(&txr->napi))) { 1146 intrl2_0_mask_set(priv, ring_bit); 1147 __napi_schedule(&txr->napi); 1148 } 1149 } 1150 out: 1151 return IRQ_HANDLED; 1152 } 1153 1154 /* TX interrupt service routine */ 1155 static irqreturn_t bcm_sysport_tx_isr(int irq, void *dev_id) 1156 { 1157 struct net_device *dev = dev_id; 1158 struct bcm_sysport_priv *priv = netdev_priv(dev); 1159 struct bcm_sysport_tx_ring *txr; 1160 unsigned int ring; 1161 1162 priv->irq1_stat = intrl2_1_readl(priv, INTRL2_CPU_STATUS) & 1163 ~intrl2_1_readl(priv, INTRL2_CPU_MASK_STATUS); 1164 intrl2_1_writel(priv, 0xffffffff, INTRL2_CPU_CLEAR); 1165 1166 if (unlikely(priv->irq1_stat == 0)) { 1167 netdev_warn(priv->netdev, "spurious TX interrupt\n"); 1168 return IRQ_NONE; 1169 } 1170 1171 for (ring = 0; ring < dev->num_tx_queues; ring++) { 1172 if (!(priv->irq1_stat & BIT(ring))) 1173 continue; 1174 1175 txr = &priv->tx_rings[ring]; 1176 1177 if (likely(napi_schedule_prep(&txr->napi))) { 1178 intrl2_1_mask_set(priv, BIT(ring)); 1179 __napi_schedule_irqoff(&txr->napi); 1180 } 1181 } 1182 1183 return IRQ_HANDLED; 1184 } 1185 1186 static irqreturn_t bcm_sysport_wol_isr(int irq, void *dev_id) 1187 { 1188 struct bcm_sysport_priv *priv = dev_id; 1189 1190 pm_wakeup_event(&priv->pdev->dev, 0); 1191 1192 return IRQ_HANDLED; 1193 } 1194 1195 #ifdef CONFIG_NET_POLL_CONTROLLER 1196 static void bcm_sysport_poll_controller(struct net_device *dev) 1197 { 1198 struct bcm_sysport_priv *priv = netdev_priv(dev); 1199 1200 disable_irq(priv->irq0); 1201 bcm_sysport_rx_isr(priv->irq0, priv); 1202 enable_irq(priv->irq0); 1203 1204 if (!priv->is_lite) { 1205 disable_irq(priv->irq1); 1206 bcm_sysport_tx_isr(priv->irq1, priv); 1207 enable_irq(priv->irq1); 1208 } 1209 } 1210 #endif 1211 1212 static struct sk_buff *bcm_sysport_insert_tsb(struct sk_buff *skb, 1213 struct net_device *dev) 1214 { 1215 struct bcm_sysport_priv *priv = netdev_priv(dev); 1216 struct sk_buff *nskb; 1217 struct bcm_tsb *tsb; 1218 u32 csum_info; 1219 u8 ip_proto; 1220 u16 csum_start; 1221 __be16 ip_ver; 1222 1223 /* Re-allocate SKB if needed */ 1224 if (unlikely(skb_headroom(skb) < sizeof(*tsb))) { 1225 nskb = skb_realloc_headroom(skb, sizeof(*tsb)); 1226 if (!nskb) { 1227 dev_kfree_skb_any(skb); 1228 priv->mib.tx_realloc_tsb_failed++; 1229 dev->stats.tx_errors++; 1230 dev->stats.tx_dropped++; 1231 return NULL; 1232 } 1233 dev_consume_skb_any(skb); 1234 skb = nskb; 1235 priv->mib.tx_realloc_tsb++; 1236 } 1237 1238 tsb = skb_push(skb, sizeof(*tsb)); 1239 /* Zero-out TSB by default */ 1240 memset(tsb, 0, sizeof(*tsb)); 1241 1242 if (skb_vlan_tag_present(skb)) { 1243 tsb->pcp_dei_vid = skb_vlan_tag_get_prio(skb) & PCP_DEI_MASK; 1244 tsb->pcp_dei_vid |= (u32)skb_vlan_tag_get_id(skb) << VID_SHIFT; 1245 } 1246 1247 if (skb->ip_summed == CHECKSUM_PARTIAL) { 1248 ip_ver = skb->protocol; 1249 switch (ip_ver) { 1250 case htons(ETH_P_IP): 1251 ip_proto = ip_hdr(skb)->protocol; 1252 break; 1253 case htons(ETH_P_IPV6): 1254 ip_proto = ipv6_hdr(skb)->nexthdr; 1255 break; 1256 default: 1257 return skb; 1258 } 1259 1260 /* Get the checksum offset and the L4 (transport) offset */ 1261 csum_start = skb_checksum_start_offset(skb) - sizeof(*tsb); 1262 /* Account for the HW inserted VLAN tag */ 1263 if (skb_vlan_tag_present(skb)) 1264 csum_start += VLAN_HLEN; 1265 csum_info = (csum_start + skb->csum_offset) & L4_CSUM_PTR_MASK; 1266 csum_info |= (csum_start << L4_PTR_SHIFT); 1267 1268 if (ip_proto == IPPROTO_TCP || ip_proto == IPPROTO_UDP) { 1269 csum_info |= L4_LENGTH_VALID; 1270 if (ip_proto == IPPROTO_UDP && 1271 ip_ver == htons(ETH_P_IP)) 1272 csum_info |= L4_UDP; 1273 } else { 1274 csum_info = 0; 1275 } 1276 1277 tsb->l4_ptr_dest_map = csum_info; 1278 } 1279 1280 return skb; 1281 } 1282 1283 static netdev_tx_t bcm_sysport_xmit(struct sk_buff *skb, 1284 struct net_device *dev) 1285 { 1286 struct bcm_sysport_priv *priv = netdev_priv(dev); 1287 struct device *kdev = &priv->pdev->dev; 1288 struct bcm_sysport_tx_ring *ring; 1289 unsigned long flags, desc_flags; 1290 struct bcm_sysport_cb *cb; 1291 struct netdev_queue *txq; 1292 u32 len_status, addr_lo; 1293 unsigned int skb_len; 1294 dma_addr_t mapping; 1295 u16 queue; 1296 int ret; 1297 1298 queue = skb_get_queue_mapping(skb); 1299 txq = netdev_get_tx_queue(dev, queue); 1300 ring = &priv->tx_rings[queue]; 1301 1302 /* lock against tx reclaim in BH context and TX ring full interrupt */ 1303 spin_lock_irqsave(&ring->lock, flags); 1304 if (unlikely(ring->desc_count == 0)) { 1305 netif_tx_stop_queue(txq); 1306 netdev_err(dev, "queue %d awake and ring full!\n", queue); 1307 ret = NETDEV_TX_BUSY; 1308 goto out; 1309 } 1310 1311 /* Insert TSB and checksum infos */ 1312 if (priv->tsb_en) { 1313 skb = bcm_sysport_insert_tsb(skb, dev); 1314 if (!skb) { 1315 ret = NETDEV_TX_OK; 1316 goto out; 1317 } 1318 } 1319 1320 skb_len = skb->len; 1321 1322 mapping = dma_map_single(kdev, skb->data, skb_len, DMA_TO_DEVICE); 1323 if (dma_mapping_error(kdev, mapping)) { 1324 priv->mib.tx_dma_failed++; 1325 netif_err(priv, tx_err, dev, "DMA map failed at %p (len=%d)\n", 1326 skb->data, skb_len); 1327 ret = NETDEV_TX_OK; 1328 dev_kfree_skb_any(skb); 1329 goto out; 1330 } 1331 1332 /* Remember the SKB for future freeing */ 1333 cb = &ring->cbs[ring->curr_desc]; 1334 cb->skb = skb; 1335 dma_unmap_addr_set(cb, dma_addr, mapping); 1336 dma_unmap_len_set(cb, dma_len, skb_len); 1337 1338 addr_lo = lower_32_bits(mapping); 1339 len_status = upper_32_bits(mapping) & DESC_ADDR_HI_MASK; 1340 len_status |= (skb_len << DESC_LEN_SHIFT); 1341 len_status |= (DESC_SOP | DESC_EOP | TX_STATUS_APP_CRC) << 1342 DESC_STATUS_SHIFT; 1343 if (skb->ip_summed == CHECKSUM_PARTIAL) 1344 len_status |= (DESC_L4_CSUM << DESC_STATUS_SHIFT); 1345 if (skb_vlan_tag_present(skb)) 1346 len_status |= (TX_STATUS_VLAN_VID_TSB << DESC_STATUS_SHIFT); 1347 1348 ring->curr_desc++; 1349 if (ring->curr_desc == ring->size) 1350 ring->curr_desc = 0; 1351 ring->desc_count--; 1352 1353 /* Ports are latched, so write upper address first */ 1354 spin_lock_irqsave(&priv->desc_lock, desc_flags); 1355 tdma_writel(priv, len_status, TDMA_WRITE_PORT_HI(ring->index)); 1356 tdma_writel(priv, addr_lo, TDMA_WRITE_PORT_LO(ring->index)); 1357 spin_unlock_irqrestore(&priv->desc_lock, desc_flags); 1358 1359 /* Check ring space and update SW control flow */ 1360 if (ring->desc_count == 0) 1361 netif_tx_stop_queue(txq); 1362 1363 netif_dbg(priv, tx_queued, dev, "ring=%d desc_count=%d, curr_desc=%d\n", 1364 ring->index, ring->desc_count, ring->curr_desc); 1365 1366 ret = NETDEV_TX_OK; 1367 out: 1368 spin_unlock_irqrestore(&ring->lock, flags); 1369 return ret; 1370 } 1371 1372 static void bcm_sysport_tx_timeout(struct net_device *dev, unsigned int txqueue) 1373 { 1374 netdev_warn(dev, "transmit timeout!\n"); 1375 1376 netif_trans_update(dev); 1377 dev->stats.tx_errors++; 1378 1379 netif_tx_wake_all_queues(dev); 1380 } 1381 1382 /* phylib adjust link callback */ 1383 static void bcm_sysport_adj_link(struct net_device *dev) 1384 { 1385 struct bcm_sysport_priv *priv = netdev_priv(dev); 1386 struct phy_device *phydev = dev->phydev; 1387 unsigned int changed = 0; 1388 u32 cmd_bits = 0, reg; 1389 1390 if (priv->old_link != phydev->link) { 1391 changed = 1; 1392 priv->old_link = phydev->link; 1393 } 1394 1395 if (priv->old_duplex != phydev->duplex) { 1396 changed = 1; 1397 priv->old_duplex = phydev->duplex; 1398 } 1399 1400 if (priv->is_lite) 1401 goto out; 1402 1403 switch (phydev->speed) { 1404 case SPEED_2500: 1405 cmd_bits = CMD_SPEED_2500; 1406 break; 1407 case SPEED_1000: 1408 cmd_bits = CMD_SPEED_1000; 1409 break; 1410 case SPEED_100: 1411 cmd_bits = CMD_SPEED_100; 1412 break; 1413 case SPEED_10: 1414 cmd_bits = CMD_SPEED_10; 1415 break; 1416 default: 1417 break; 1418 } 1419 cmd_bits <<= CMD_SPEED_SHIFT; 1420 1421 if (phydev->duplex == DUPLEX_HALF) 1422 cmd_bits |= CMD_HD_EN; 1423 1424 if (priv->old_pause != phydev->pause) { 1425 changed = 1; 1426 priv->old_pause = phydev->pause; 1427 } 1428 1429 if (!phydev->pause) 1430 cmd_bits |= CMD_RX_PAUSE_IGNORE | CMD_TX_PAUSE_IGNORE; 1431 1432 if (!changed) 1433 return; 1434 1435 if (phydev->link) { 1436 reg = umac_readl(priv, UMAC_CMD); 1437 reg &= ~((CMD_SPEED_MASK << CMD_SPEED_SHIFT) | 1438 CMD_HD_EN | CMD_RX_PAUSE_IGNORE | 1439 CMD_TX_PAUSE_IGNORE); 1440 reg |= cmd_bits; 1441 umac_writel(priv, reg, UMAC_CMD); 1442 } 1443 out: 1444 if (changed) 1445 phy_print_status(phydev); 1446 } 1447 1448 static void bcm_sysport_init_dim(struct bcm_sysport_priv *priv, 1449 void (*cb)(struct work_struct *work)) 1450 { 1451 struct bcm_sysport_net_dim *dim = &priv->dim; 1452 1453 INIT_WORK(&dim->dim.work, cb); 1454 dim->dim.mode = DIM_CQ_PERIOD_MODE_START_FROM_EQE; 1455 dim->event_ctr = 0; 1456 dim->packets = 0; 1457 dim->bytes = 0; 1458 } 1459 1460 static void bcm_sysport_init_rx_coalesce(struct bcm_sysport_priv *priv) 1461 { 1462 struct bcm_sysport_net_dim *dim = &priv->dim; 1463 struct dim_cq_moder moder; 1464 u32 usecs, pkts; 1465 1466 usecs = priv->rx_coalesce_usecs; 1467 pkts = priv->rx_max_coalesced_frames; 1468 1469 /* If DIM was enabled, re-apply default parameters */ 1470 if (dim->use_dim) { 1471 moder = net_dim_get_def_rx_moderation(dim->dim.mode); 1472 usecs = moder.usec; 1473 pkts = moder.pkts; 1474 } 1475 1476 bcm_sysport_set_rx_coalesce(priv, usecs, pkts); 1477 } 1478 1479 static int bcm_sysport_init_tx_ring(struct bcm_sysport_priv *priv, 1480 unsigned int index) 1481 { 1482 struct bcm_sysport_tx_ring *ring = &priv->tx_rings[index]; 1483 size_t size; 1484 u32 reg; 1485 1486 /* Simple descriptors partitioning for now */ 1487 size = 256; 1488 1489 ring->cbs = kcalloc(size, sizeof(struct bcm_sysport_cb), GFP_KERNEL); 1490 if (!ring->cbs) { 1491 netif_err(priv, hw, priv->netdev, "CB allocation failed\n"); 1492 return -ENOMEM; 1493 } 1494 1495 /* Initialize SW view of the ring */ 1496 spin_lock_init(&ring->lock); 1497 ring->priv = priv; 1498 netif_napi_add_tx(priv->netdev, &ring->napi, bcm_sysport_tx_poll); 1499 ring->index = index; 1500 ring->size = size; 1501 ring->clean_index = 0; 1502 ring->alloc_size = ring->size; 1503 ring->desc_count = ring->size; 1504 ring->curr_desc = 0; 1505 1506 /* Initialize HW ring */ 1507 tdma_writel(priv, RING_EN, TDMA_DESC_RING_HEAD_TAIL_PTR(index)); 1508 tdma_writel(priv, 0, TDMA_DESC_RING_COUNT(index)); 1509 tdma_writel(priv, 1, TDMA_DESC_RING_INTR_CONTROL(index)); 1510 tdma_writel(priv, 0, TDMA_DESC_RING_PROD_CONS_INDEX(index)); 1511 1512 /* Configure QID and port mapping */ 1513 reg = tdma_readl(priv, TDMA_DESC_RING_MAPPING(index)); 1514 reg &= ~(RING_QID_MASK | RING_PORT_ID_MASK << RING_PORT_ID_SHIFT); 1515 if (ring->inspect) { 1516 reg |= ring->switch_queue & RING_QID_MASK; 1517 reg |= ring->switch_port << RING_PORT_ID_SHIFT; 1518 } else { 1519 reg |= RING_IGNORE_STATUS; 1520 } 1521 tdma_writel(priv, reg, TDMA_DESC_RING_MAPPING(index)); 1522 reg = 0; 1523 /* Adjust the packet size calculations if SYSTEMPORT is responsible 1524 * for HW insertion of VLAN tags 1525 */ 1526 if (priv->netdev->features & NETIF_F_HW_VLAN_CTAG_TX) 1527 reg = VLAN_HLEN << RING_PKT_SIZE_ADJ_SHIFT; 1528 tdma_writel(priv, reg, TDMA_DESC_RING_PCP_DEI_VID(index)); 1529 1530 /* Enable ACB algorithm 2 */ 1531 reg = tdma_readl(priv, TDMA_CONTROL); 1532 reg |= tdma_control_bit(priv, ACB_ALGO); 1533 tdma_writel(priv, reg, TDMA_CONTROL); 1534 1535 /* Do not use tdma_control_bit() here because TSB_SWAP1 collides 1536 * with the original definition of ACB_ALGO 1537 */ 1538 reg = tdma_readl(priv, TDMA_CONTROL); 1539 if (priv->is_lite) 1540 reg &= ~BIT(TSB_SWAP1); 1541 /* Set a correct TSB format based on host endian */ 1542 if (!IS_ENABLED(CONFIG_CPU_BIG_ENDIAN)) 1543 reg |= tdma_control_bit(priv, TSB_SWAP0); 1544 else 1545 reg &= ~tdma_control_bit(priv, TSB_SWAP0); 1546 tdma_writel(priv, reg, TDMA_CONTROL); 1547 1548 /* Program the number of descriptors as MAX_THRESHOLD and half of 1549 * its size for the hysteresis trigger 1550 */ 1551 tdma_writel(priv, ring->size | 1552 1 << RING_HYST_THRESH_SHIFT, 1553 TDMA_DESC_RING_MAX_HYST(index)); 1554 1555 /* Enable the ring queue in the arbiter */ 1556 reg = tdma_readl(priv, TDMA_TIER1_ARB_0_QUEUE_EN); 1557 reg |= (1 << index); 1558 tdma_writel(priv, reg, TDMA_TIER1_ARB_0_QUEUE_EN); 1559 1560 napi_enable(&ring->napi); 1561 1562 netif_dbg(priv, hw, priv->netdev, 1563 "TDMA cfg, size=%d, switch q=%d,port=%d\n", 1564 ring->size, ring->switch_queue, 1565 ring->switch_port); 1566 1567 return 0; 1568 } 1569 1570 static void bcm_sysport_fini_tx_ring(struct bcm_sysport_priv *priv, 1571 unsigned int index) 1572 { 1573 struct bcm_sysport_tx_ring *ring = &priv->tx_rings[index]; 1574 u32 reg; 1575 1576 /* Caller should stop the TDMA engine */ 1577 reg = tdma_readl(priv, TDMA_STATUS); 1578 if (!(reg & TDMA_DISABLED)) 1579 netdev_warn(priv->netdev, "TDMA not stopped!\n"); 1580 1581 /* ring->cbs is the last part in bcm_sysport_init_tx_ring which could 1582 * fail, so by checking this pointer we know whether the TX ring was 1583 * fully initialized or not. 1584 */ 1585 if (!ring->cbs) 1586 return; 1587 1588 napi_disable(&ring->napi); 1589 netif_napi_del(&ring->napi); 1590 1591 bcm_sysport_tx_clean(priv, ring); 1592 1593 kfree(ring->cbs); 1594 ring->cbs = NULL; 1595 ring->size = 0; 1596 ring->alloc_size = 0; 1597 1598 netif_dbg(priv, hw, priv->netdev, "TDMA fini done\n"); 1599 } 1600 1601 /* RDMA helper */ 1602 static inline int rdma_enable_set(struct bcm_sysport_priv *priv, 1603 unsigned int enable) 1604 { 1605 unsigned int timeout = 1000; 1606 u32 reg; 1607 1608 reg = rdma_readl(priv, RDMA_CONTROL); 1609 if (enable) 1610 reg |= RDMA_EN; 1611 else 1612 reg &= ~RDMA_EN; 1613 rdma_writel(priv, reg, RDMA_CONTROL); 1614 1615 /* Poll for RMDA disabling completion */ 1616 do { 1617 reg = rdma_readl(priv, RDMA_STATUS); 1618 if (!!(reg & RDMA_DISABLED) == !enable) 1619 return 0; 1620 usleep_range(1000, 2000); 1621 } while (timeout-- > 0); 1622 1623 netdev_err(priv->netdev, "timeout waiting for RDMA to finish\n"); 1624 1625 return -ETIMEDOUT; 1626 } 1627 1628 /* TDMA helper */ 1629 static inline int tdma_enable_set(struct bcm_sysport_priv *priv, 1630 unsigned int enable) 1631 { 1632 unsigned int timeout = 1000; 1633 u32 reg; 1634 1635 reg = tdma_readl(priv, TDMA_CONTROL); 1636 if (enable) 1637 reg |= tdma_control_bit(priv, TDMA_EN); 1638 else 1639 reg &= ~tdma_control_bit(priv, TDMA_EN); 1640 tdma_writel(priv, reg, TDMA_CONTROL); 1641 1642 /* Poll for TMDA disabling completion */ 1643 do { 1644 reg = tdma_readl(priv, TDMA_STATUS); 1645 if (!!(reg & TDMA_DISABLED) == !enable) 1646 return 0; 1647 1648 usleep_range(1000, 2000); 1649 } while (timeout-- > 0); 1650 1651 netdev_err(priv->netdev, "timeout waiting for TDMA to finish\n"); 1652 1653 return -ETIMEDOUT; 1654 } 1655 1656 static int bcm_sysport_init_rx_ring(struct bcm_sysport_priv *priv) 1657 { 1658 struct bcm_sysport_cb *cb; 1659 u32 reg; 1660 int ret; 1661 int i; 1662 1663 /* Initialize SW view of the RX ring */ 1664 priv->num_rx_bds = priv->num_rx_desc_words / WORDS_PER_DESC; 1665 priv->rx_bds = priv->base + SYS_PORT_RDMA_OFFSET; 1666 priv->rx_c_index = 0; 1667 priv->rx_read_ptr = 0; 1668 priv->rx_cbs = kcalloc(priv->num_rx_bds, sizeof(struct bcm_sysport_cb), 1669 GFP_KERNEL); 1670 if (!priv->rx_cbs) { 1671 netif_err(priv, hw, priv->netdev, "CB allocation failed\n"); 1672 return -ENOMEM; 1673 } 1674 1675 for (i = 0; i < priv->num_rx_bds; i++) { 1676 cb = priv->rx_cbs + i; 1677 cb->bd_addr = priv->rx_bds + i * DESC_SIZE; 1678 } 1679 1680 ret = bcm_sysport_alloc_rx_bufs(priv); 1681 if (ret) { 1682 netif_err(priv, hw, priv->netdev, "SKB allocation failed\n"); 1683 return ret; 1684 } 1685 1686 /* Initialize HW, ensure RDMA is disabled */ 1687 reg = rdma_readl(priv, RDMA_STATUS); 1688 if (!(reg & RDMA_DISABLED)) 1689 rdma_enable_set(priv, 0); 1690 1691 rdma_writel(priv, 0, RDMA_WRITE_PTR_LO); 1692 rdma_writel(priv, 0, RDMA_WRITE_PTR_HI); 1693 rdma_writel(priv, 0, RDMA_PROD_INDEX); 1694 rdma_writel(priv, 0, RDMA_CONS_INDEX); 1695 rdma_writel(priv, priv->num_rx_bds << RDMA_RING_SIZE_SHIFT | 1696 RX_BUF_LENGTH, RDMA_RING_BUF_SIZE); 1697 /* Operate the queue in ring mode */ 1698 rdma_writel(priv, 0, RDMA_START_ADDR_HI); 1699 rdma_writel(priv, 0, RDMA_START_ADDR_LO); 1700 rdma_writel(priv, 0, RDMA_END_ADDR_HI); 1701 rdma_writel(priv, priv->num_rx_desc_words - 1, RDMA_END_ADDR_LO); 1702 1703 netif_dbg(priv, hw, priv->netdev, 1704 "RDMA cfg, num_rx_bds=%d, rx_bds=%p\n", 1705 priv->num_rx_bds, priv->rx_bds); 1706 1707 return 0; 1708 } 1709 1710 static void bcm_sysport_fini_rx_ring(struct bcm_sysport_priv *priv) 1711 { 1712 struct bcm_sysport_cb *cb; 1713 unsigned int i; 1714 u32 reg; 1715 1716 /* Caller should ensure RDMA is disabled */ 1717 reg = rdma_readl(priv, RDMA_STATUS); 1718 if (!(reg & RDMA_DISABLED)) 1719 netdev_warn(priv->netdev, "RDMA not stopped!\n"); 1720 1721 for (i = 0; i < priv->num_rx_bds; i++) { 1722 cb = &priv->rx_cbs[i]; 1723 if (dma_unmap_addr(cb, dma_addr)) 1724 dma_unmap_single(&priv->pdev->dev, 1725 dma_unmap_addr(cb, dma_addr), 1726 RX_BUF_LENGTH, DMA_FROM_DEVICE); 1727 bcm_sysport_free_cb(cb); 1728 } 1729 1730 kfree(priv->rx_cbs); 1731 priv->rx_cbs = NULL; 1732 1733 netif_dbg(priv, hw, priv->netdev, "RDMA fini done\n"); 1734 } 1735 1736 static void bcm_sysport_set_rx_mode(struct net_device *dev) 1737 { 1738 struct bcm_sysport_priv *priv = netdev_priv(dev); 1739 u32 reg; 1740 1741 if (priv->is_lite) 1742 return; 1743 1744 reg = umac_readl(priv, UMAC_CMD); 1745 if (dev->flags & IFF_PROMISC) 1746 reg |= CMD_PROMISC; 1747 else 1748 reg &= ~CMD_PROMISC; 1749 umac_writel(priv, reg, UMAC_CMD); 1750 1751 /* No support for ALLMULTI */ 1752 if (dev->flags & IFF_ALLMULTI) 1753 return; 1754 } 1755 1756 static inline void umac_enable_set(struct bcm_sysport_priv *priv, 1757 u32 mask, unsigned int enable) 1758 { 1759 u32 reg; 1760 1761 if (!priv->is_lite) { 1762 reg = umac_readl(priv, UMAC_CMD); 1763 if (enable) 1764 reg |= mask; 1765 else 1766 reg &= ~mask; 1767 umac_writel(priv, reg, UMAC_CMD); 1768 } else { 1769 reg = gib_readl(priv, GIB_CONTROL); 1770 if (enable) 1771 reg |= mask; 1772 else 1773 reg &= ~mask; 1774 gib_writel(priv, reg, GIB_CONTROL); 1775 } 1776 1777 /* UniMAC stops on a packet boundary, wait for a full-sized packet 1778 * to be processed (1 msec). 1779 */ 1780 if (enable == 0) 1781 usleep_range(1000, 2000); 1782 } 1783 1784 static inline void umac_reset(struct bcm_sysport_priv *priv) 1785 { 1786 u32 reg; 1787 1788 if (priv->is_lite) 1789 return; 1790 1791 reg = umac_readl(priv, UMAC_CMD); 1792 reg |= CMD_SW_RESET; 1793 umac_writel(priv, reg, UMAC_CMD); 1794 udelay(10); 1795 reg = umac_readl(priv, UMAC_CMD); 1796 reg &= ~CMD_SW_RESET; 1797 umac_writel(priv, reg, UMAC_CMD); 1798 } 1799 1800 static void umac_set_hw_addr(struct bcm_sysport_priv *priv, 1801 const unsigned char *addr) 1802 { 1803 u32 mac0 = (addr[0] << 24) | (addr[1] << 16) | (addr[2] << 8) | 1804 addr[3]; 1805 u32 mac1 = (addr[4] << 8) | addr[5]; 1806 1807 if (!priv->is_lite) { 1808 umac_writel(priv, mac0, UMAC_MAC0); 1809 umac_writel(priv, mac1, UMAC_MAC1); 1810 } else { 1811 gib_writel(priv, mac0, GIB_MAC0); 1812 gib_writel(priv, mac1, GIB_MAC1); 1813 } 1814 } 1815 1816 static void topctrl_flush(struct bcm_sysport_priv *priv) 1817 { 1818 topctrl_writel(priv, RX_FLUSH, RX_FLUSH_CNTL); 1819 topctrl_writel(priv, TX_FLUSH, TX_FLUSH_CNTL); 1820 mdelay(1); 1821 topctrl_writel(priv, 0, RX_FLUSH_CNTL); 1822 topctrl_writel(priv, 0, TX_FLUSH_CNTL); 1823 } 1824 1825 static int bcm_sysport_change_mac(struct net_device *dev, void *p) 1826 { 1827 struct bcm_sysport_priv *priv = netdev_priv(dev); 1828 struct sockaddr *addr = p; 1829 1830 if (!is_valid_ether_addr(addr->sa_data)) 1831 return -EINVAL; 1832 1833 eth_hw_addr_set(dev, addr->sa_data); 1834 1835 /* interface is disabled, changes to MAC will be reflected on next 1836 * open call 1837 */ 1838 if (!netif_running(dev)) 1839 return 0; 1840 1841 umac_set_hw_addr(priv, dev->dev_addr); 1842 1843 return 0; 1844 } 1845 1846 static void bcm_sysport_get_stats64(struct net_device *dev, 1847 struct rtnl_link_stats64 *stats) 1848 { 1849 struct bcm_sysport_priv *priv = netdev_priv(dev); 1850 struct bcm_sysport_stats64 *stats64 = &priv->stats64; 1851 unsigned int start; 1852 1853 netdev_stats_to_stats64(stats, &dev->stats); 1854 1855 bcm_sysport_update_tx_stats(priv, &stats->tx_bytes, 1856 &stats->tx_packets); 1857 1858 do { 1859 start = u64_stats_fetch_begin(&priv->syncp); 1860 stats->rx_packets = stats64->rx_packets; 1861 stats->rx_bytes = stats64->rx_bytes; 1862 } while (u64_stats_fetch_retry(&priv->syncp, start)); 1863 } 1864 1865 static void bcm_sysport_netif_start(struct net_device *dev) 1866 { 1867 struct bcm_sysport_priv *priv = netdev_priv(dev); 1868 1869 /* Enable NAPI */ 1870 bcm_sysport_init_dim(priv, bcm_sysport_dim_work); 1871 bcm_sysport_init_rx_coalesce(priv); 1872 napi_enable(&priv->napi); 1873 1874 /* Enable RX interrupt and TX ring full interrupt */ 1875 intrl2_0_mask_clear(priv, INTRL2_0_RDMA_MBDONE | INTRL2_0_TX_RING_FULL); 1876 1877 phy_start(dev->phydev); 1878 1879 /* Enable TX interrupts for the TXQs */ 1880 if (!priv->is_lite) 1881 intrl2_1_mask_clear(priv, 0xffffffff); 1882 else 1883 intrl2_0_mask_clear(priv, INTRL2_0_TDMA_MBDONE_MASK); 1884 } 1885 1886 static void rbuf_init(struct bcm_sysport_priv *priv) 1887 { 1888 u32 reg; 1889 1890 reg = rbuf_readl(priv, RBUF_CONTROL); 1891 reg |= RBUF_4B_ALGN | RBUF_RSB_EN; 1892 /* Set a correct RSB format on SYSTEMPORT Lite */ 1893 if (priv->is_lite) 1894 reg &= ~RBUF_RSB_SWAP1; 1895 1896 /* Set a correct RSB format based on host endian */ 1897 if (!IS_ENABLED(CONFIG_CPU_BIG_ENDIAN)) 1898 reg |= RBUF_RSB_SWAP0; 1899 else 1900 reg &= ~RBUF_RSB_SWAP0; 1901 rbuf_writel(priv, reg, RBUF_CONTROL); 1902 } 1903 1904 static inline void bcm_sysport_mask_all_intrs(struct bcm_sysport_priv *priv) 1905 { 1906 intrl2_0_mask_set(priv, 0xffffffff); 1907 intrl2_0_writel(priv, 0xffffffff, INTRL2_CPU_CLEAR); 1908 if (!priv->is_lite) { 1909 intrl2_1_mask_set(priv, 0xffffffff); 1910 intrl2_1_writel(priv, 0xffffffff, INTRL2_CPU_CLEAR); 1911 } 1912 } 1913 1914 static inline void gib_set_pad_extension(struct bcm_sysport_priv *priv) 1915 { 1916 u32 reg; 1917 1918 reg = gib_readl(priv, GIB_CONTROL); 1919 /* Include Broadcom tag in pad extension and fix up IPG_LENGTH */ 1920 if (netdev_uses_dsa(priv->netdev)) { 1921 reg &= ~(GIB_PAD_EXTENSION_MASK << GIB_PAD_EXTENSION_SHIFT); 1922 reg |= ENET_BRCM_TAG_LEN << GIB_PAD_EXTENSION_SHIFT; 1923 } 1924 reg &= ~(GIB_IPG_LEN_MASK << GIB_IPG_LEN_SHIFT); 1925 reg |= 12 << GIB_IPG_LEN_SHIFT; 1926 gib_writel(priv, reg, GIB_CONTROL); 1927 } 1928 1929 static int bcm_sysport_open(struct net_device *dev) 1930 { 1931 struct bcm_sysport_priv *priv = netdev_priv(dev); 1932 struct phy_device *phydev; 1933 unsigned int i; 1934 int ret; 1935 1936 clk_prepare_enable(priv->clk); 1937 1938 /* Reset UniMAC */ 1939 umac_reset(priv); 1940 1941 /* Flush TX and RX FIFOs at TOPCTRL level */ 1942 topctrl_flush(priv); 1943 1944 /* Disable the UniMAC RX/TX */ 1945 umac_enable_set(priv, CMD_RX_EN | CMD_TX_EN, 0); 1946 1947 /* Enable RBUF 2bytes alignment and Receive Status Block */ 1948 rbuf_init(priv); 1949 1950 /* Set maximum frame length */ 1951 if (!priv->is_lite) 1952 umac_writel(priv, UMAC_MAX_MTU_SIZE, UMAC_MAX_FRAME_LEN); 1953 else 1954 gib_set_pad_extension(priv); 1955 1956 /* Apply features again in case we changed them while interface was 1957 * down 1958 */ 1959 bcm_sysport_set_features(dev, dev->features); 1960 1961 /* Set MAC address */ 1962 umac_set_hw_addr(priv, dev->dev_addr); 1963 1964 phydev = of_phy_connect(dev, priv->phy_dn, bcm_sysport_adj_link, 1965 0, priv->phy_interface); 1966 if (!phydev) { 1967 netdev_err(dev, "could not attach to PHY\n"); 1968 ret = -ENODEV; 1969 goto out_clk_disable; 1970 } 1971 1972 /* Indicate that the MAC is responsible for PHY PM */ 1973 phydev->mac_managed_pm = true; 1974 1975 /* Reset house keeping link status */ 1976 priv->old_duplex = -1; 1977 priv->old_link = -1; 1978 priv->old_pause = -1; 1979 1980 /* mask all interrupts and request them */ 1981 bcm_sysport_mask_all_intrs(priv); 1982 1983 ret = request_irq(priv->irq0, bcm_sysport_rx_isr, 0, dev->name, dev); 1984 if (ret) { 1985 netdev_err(dev, "failed to request RX interrupt\n"); 1986 goto out_phy_disconnect; 1987 } 1988 1989 if (!priv->is_lite) { 1990 ret = request_irq(priv->irq1, bcm_sysport_tx_isr, 0, 1991 dev->name, dev); 1992 if (ret) { 1993 netdev_err(dev, "failed to request TX interrupt\n"); 1994 goto out_free_irq0; 1995 } 1996 } 1997 1998 /* Initialize both hardware and software ring */ 1999 spin_lock_init(&priv->desc_lock); 2000 for (i = 0; i < dev->num_tx_queues; i++) { 2001 ret = bcm_sysport_init_tx_ring(priv, i); 2002 if (ret) { 2003 netdev_err(dev, "failed to initialize TX ring %d\n", 2004 i); 2005 goto out_free_tx_ring; 2006 } 2007 } 2008 2009 /* Initialize linked-list */ 2010 tdma_writel(priv, TDMA_LL_RAM_INIT_BUSY, TDMA_STATUS); 2011 2012 /* Initialize RX ring */ 2013 ret = bcm_sysport_init_rx_ring(priv); 2014 if (ret) { 2015 netdev_err(dev, "failed to initialize RX ring\n"); 2016 goto out_free_rx_ring; 2017 } 2018 2019 /* Turn on RDMA */ 2020 ret = rdma_enable_set(priv, 1); 2021 if (ret) 2022 goto out_free_rx_ring; 2023 2024 /* Turn on TDMA */ 2025 ret = tdma_enable_set(priv, 1); 2026 if (ret) 2027 goto out_clear_rx_int; 2028 2029 /* Turn on UniMAC TX/RX */ 2030 umac_enable_set(priv, CMD_RX_EN | CMD_TX_EN, 1); 2031 2032 bcm_sysport_netif_start(dev); 2033 2034 netif_tx_start_all_queues(dev); 2035 2036 return 0; 2037 2038 out_clear_rx_int: 2039 intrl2_0_mask_set(priv, INTRL2_0_RDMA_MBDONE | INTRL2_0_TX_RING_FULL); 2040 out_free_rx_ring: 2041 bcm_sysport_fini_rx_ring(priv); 2042 out_free_tx_ring: 2043 for (i = 0; i < dev->num_tx_queues; i++) 2044 bcm_sysport_fini_tx_ring(priv, i); 2045 if (!priv->is_lite) 2046 free_irq(priv->irq1, dev); 2047 out_free_irq0: 2048 free_irq(priv->irq0, dev); 2049 out_phy_disconnect: 2050 phy_disconnect(phydev); 2051 out_clk_disable: 2052 clk_disable_unprepare(priv->clk); 2053 return ret; 2054 } 2055 2056 static void bcm_sysport_netif_stop(struct net_device *dev) 2057 { 2058 struct bcm_sysport_priv *priv = netdev_priv(dev); 2059 2060 /* stop all software from updating hardware */ 2061 netif_tx_disable(dev); 2062 napi_disable(&priv->napi); 2063 cancel_work_sync(&priv->dim.dim.work); 2064 phy_stop(dev->phydev); 2065 2066 /* mask all interrupts */ 2067 bcm_sysport_mask_all_intrs(priv); 2068 } 2069 2070 static int bcm_sysport_stop(struct net_device *dev) 2071 { 2072 struct bcm_sysport_priv *priv = netdev_priv(dev); 2073 unsigned int i; 2074 int ret; 2075 2076 bcm_sysport_netif_stop(dev); 2077 2078 /* Disable UniMAC RX */ 2079 umac_enable_set(priv, CMD_RX_EN, 0); 2080 2081 ret = tdma_enable_set(priv, 0); 2082 if (ret) { 2083 netdev_err(dev, "timeout disabling RDMA\n"); 2084 return ret; 2085 } 2086 2087 /* Wait for a maximum packet size to be drained */ 2088 usleep_range(2000, 3000); 2089 2090 ret = rdma_enable_set(priv, 0); 2091 if (ret) { 2092 netdev_err(dev, "timeout disabling TDMA\n"); 2093 return ret; 2094 } 2095 2096 /* Disable UniMAC TX */ 2097 umac_enable_set(priv, CMD_TX_EN, 0); 2098 2099 /* Free RX/TX rings SW structures */ 2100 for (i = 0; i < dev->num_tx_queues; i++) 2101 bcm_sysport_fini_tx_ring(priv, i); 2102 bcm_sysport_fini_rx_ring(priv); 2103 2104 free_irq(priv->irq0, dev); 2105 if (!priv->is_lite) 2106 free_irq(priv->irq1, dev); 2107 2108 /* Disconnect from PHY */ 2109 phy_disconnect(dev->phydev); 2110 2111 clk_disable_unprepare(priv->clk); 2112 2113 return 0; 2114 } 2115 2116 static int bcm_sysport_rule_find(struct bcm_sysport_priv *priv, 2117 u64 location) 2118 { 2119 unsigned int index; 2120 u32 reg; 2121 2122 for_each_set_bit(index, priv->filters, RXCHK_BRCM_TAG_MAX) { 2123 reg = rxchk_readl(priv, RXCHK_BRCM_TAG(index)); 2124 reg >>= RXCHK_BRCM_TAG_CID_SHIFT; 2125 reg &= RXCHK_BRCM_TAG_CID_MASK; 2126 if (reg == location) 2127 return index; 2128 } 2129 2130 return -EINVAL; 2131 } 2132 2133 static int bcm_sysport_rule_get(struct bcm_sysport_priv *priv, 2134 struct ethtool_rxnfc *nfc) 2135 { 2136 int index; 2137 2138 /* This is not a rule that we know about */ 2139 index = bcm_sysport_rule_find(priv, nfc->fs.location); 2140 if (index < 0) 2141 return -EOPNOTSUPP; 2142 2143 nfc->fs.ring_cookie = RX_CLS_FLOW_WAKE; 2144 2145 return 0; 2146 } 2147 2148 static int bcm_sysport_rule_set(struct bcm_sysport_priv *priv, 2149 struct ethtool_rxnfc *nfc) 2150 { 2151 unsigned int index; 2152 u32 reg; 2153 2154 /* We cannot match locations greater than what the classification ID 2155 * permits (256 entries) 2156 */ 2157 if (nfc->fs.location > RXCHK_BRCM_TAG_CID_MASK) 2158 return -E2BIG; 2159 2160 /* We cannot support flows that are not destined for a wake-up */ 2161 if (nfc->fs.ring_cookie != RX_CLS_FLOW_WAKE) 2162 return -EOPNOTSUPP; 2163 2164 index = find_first_zero_bit(priv->filters, RXCHK_BRCM_TAG_MAX); 2165 if (index >= RXCHK_BRCM_TAG_MAX) 2166 /* All filters are already in use, we cannot match more rules */ 2167 return -ENOSPC; 2168 2169 /* Location is the classification ID, and index is the position 2170 * within one of our 8 possible filters to be programmed 2171 */ 2172 reg = rxchk_readl(priv, RXCHK_BRCM_TAG(index)); 2173 reg &= ~(RXCHK_BRCM_TAG_CID_MASK << RXCHK_BRCM_TAG_CID_SHIFT); 2174 reg |= nfc->fs.location << RXCHK_BRCM_TAG_CID_SHIFT; 2175 rxchk_writel(priv, reg, RXCHK_BRCM_TAG(index)); 2176 rxchk_writel(priv, 0xff00ffff, RXCHK_BRCM_TAG_MASK(index)); 2177 2178 priv->filters_loc[index] = nfc->fs.location; 2179 set_bit(index, priv->filters); 2180 2181 return 0; 2182 } 2183 2184 static int bcm_sysport_rule_del(struct bcm_sysport_priv *priv, 2185 u64 location) 2186 { 2187 int index; 2188 2189 /* This is not a rule that we know about */ 2190 index = bcm_sysport_rule_find(priv, location); 2191 if (index < 0) 2192 return -EOPNOTSUPP; 2193 2194 /* No need to disable this filter if it was enabled, this will 2195 * be taken care of during suspend time by bcm_sysport_suspend_to_wol 2196 */ 2197 clear_bit(index, priv->filters); 2198 priv->filters_loc[index] = 0; 2199 2200 return 0; 2201 } 2202 2203 static int bcm_sysport_get_rxnfc(struct net_device *dev, 2204 struct ethtool_rxnfc *nfc, u32 *rule_locs) 2205 { 2206 struct bcm_sysport_priv *priv = netdev_priv(dev); 2207 int ret = -EOPNOTSUPP; 2208 2209 switch (nfc->cmd) { 2210 case ETHTOOL_GRXCLSRULE: 2211 ret = bcm_sysport_rule_get(priv, nfc); 2212 break; 2213 default: 2214 break; 2215 } 2216 2217 return ret; 2218 } 2219 2220 static int bcm_sysport_set_rxnfc(struct net_device *dev, 2221 struct ethtool_rxnfc *nfc) 2222 { 2223 struct bcm_sysport_priv *priv = netdev_priv(dev); 2224 int ret = -EOPNOTSUPP; 2225 2226 switch (nfc->cmd) { 2227 case ETHTOOL_SRXCLSRLINS: 2228 ret = bcm_sysport_rule_set(priv, nfc); 2229 break; 2230 case ETHTOOL_SRXCLSRLDEL: 2231 ret = bcm_sysport_rule_del(priv, nfc->fs.location); 2232 break; 2233 default: 2234 break; 2235 } 2236 2237 return ret; 2238 } 2239 2240 static const struct ethtool_ops bcm_sysport_ethtool_ops = { 2241 .supported_coalesce_params = ETHTOOL_COALESCE_USECS | 2242 ETHTOOL_COALESCE_MAX_FRAMES | 2243 ETHTOOL_COALESCE_USE_ADAPTIVE_RX, 2244 .get_drvinfo = bcm_sysport_get_drvinfo, 2245 .get_msglevel = bcm_sysport_get_msglvl, 2246 .set_msglevel = bcm_sysport_set_msglvl, 2247 .get_link = ethtool_op_get_link, 2248 .get_strings = bcm_sysport_get_strings, 2249 .get_ethtool_stats = bcm_sysport_get_stats, 2250 .get_sset_count = bcm_sysport_get_sset_count, 2251 .get_wol = bcm_sysport_get_wol, 2252 .set_wol = bcm_sysport_set_wol, 2253 .get_coalesce = bcm_sysport_get_coalesce, 2254 .set_coalesce = bcm_sysport_set_coalesce, 2255 .get_link_ksettings = phy_ethtool_get_link_ksettings, 2256 .set_link_ksettings = phy_ethtool_set_link_ksettings, 2257 .get_rxnfc = bcm_sysport_get_rxnfc, 2258 .set_rxnfc = bcm_sysport_set_rxnfc, 2259 }; 2260 2261 static u16 bcm_sysport_select_queue(struct net_device *dev, struct sk_buff *skb, 2262 struct net_device *sb_dev) 2263 { 2264 struct bcm_sysport_priv *priv = netdev_priv(dev); 2265 u16 queue = skb_get_queue_mapping(skb); 2266 struct bcm_sysport_tx_ring *tx_ring; 2267 unsigned int q, port; 2268 2269 if (!netdev_uses_dsa(dev)) 2270 return netdev_pick_tx(dev, skb, NULL); 2271 2272 /* DSA tagging layer will have configured the correct queue */ 2273 q = BRCM_TAG_GET_QUEUE(queue); 2274 port = BRCM_TAG_GET_PORT(queue); 2275 tx_ring = priv->ring_map[q + port * priv->per_port_num_tx_queues]; 2276 2277 if (unlikely(!tx_ring)) 2278 return netdev_pick_tx(dev, skb, NULL); 2279 2280 return tx_ring->index; 2281 } 2282 2283 static const struct net_device_ops bcm_sysport_netdev_ops = { 2284 .ndo_start_xmit = bcm_sysport_xmit, 2285 .ndo_tx_timeout = bcm_sysport_tx_timeout, 2286 .ndo_open = bcm_sysport_open, 2287 .ndo_stop = bcm_sysport_stop, 2288 .ndo_set_features = bcm_sysport_set_features, 2289 .ndo_set_rx_mode = bcm_sysport_set_rx_mode, 2290 .ndo_set_mac_address = bcm_sysport_change_mac, 2291 #ifdef CONFIG_NET_POLL_CONTROLLER 2292 .ndo_poll_controller = bcm_sysport_poll_controller, 2293 #endif 2294 .ndo_get_stats64 = bcm_sysport_get_stats64, 2295 .ndo_select_queue = bcm_sysport_select_queue, 2296 }; 2297 2298 static int bcm_sysport_map_queues(struct net_device *dev, 2299 struct net_device *slave_dev) 2300 { 2301 struct dsa_port *dp = dsa_port_from_netdev(slave_dev); 2302 struct bcm_sysport_priv *priv = netdev_priv(dev); 2303 struct bcm_sysport_tx_ring *ring; 2304 unsigned int num_tx_queues; 2305 unsigned int q, qp, port; 2306 2307 /* We can't be setting up queue inspection for non directly attached 2308 * switches 2309 */ 2310 if (dp->ds->index) 2311 return 0; 2312 2313 port = dp->index; 2314 2315 /* On SYSTEMPORT Lite we have twice as less queues, so we cannot do a 2316 * 1:1 mapping, we can only do a 2:1 mapping. By reducing the number of 2317 * per-port (slave_dev) network devices queue, we achieve just that. 2318 * This need to happen now before any slave network device is used such 2319 * it accurately reflects the number of real TX queues. 2320 */ 2321 if (priv->is_lite) 2322 netif_set_real_num_tx_queues(slave_dev, 2323 slave_dev->num_tx_queues / 2); 2324 2325 num_tx_queues = slave_dev->real_num_tx_queues; 2326 2327 if (priv->per_port_num_tx_queues && 2328 priv->per_port_num_tx_queues != num_tx_queues) 2329 netdev_warn(slave_dev, "asymmetric number of per-port queues\n"); 2330 2331 priv->per_port_num_tx_queues = num_tx_queues; 2332 2333 for (q = 0, qp = 0; q < dev->num_tx_queues && qp < num_tx_queues; 2334 q++) { 2335 ring = &priv->tx_rings[q]; 2336 2337 if (ring->inspect) 2338 continue; 2339 2340 /* Just remember the mapping actual programming done 2341 * during bcm_sysport_init_tx_ring 2342 */ 2343 ring->switch_queue = qp; 2344 ring->switch_port = port; 2345 ring->inspect = true; 2346 priv->ring_map[qp + port * num_tx_queues] = ring; 2347 qp++; 2348 } 2349 2350 return 0; 2351 } 2352 2353 static int bcm_sysport_unmap_queues(struct net_device *dev, 2354 struct net_device *slave_dev) 2355 { 2356 struct dsa_port *dp = dsa_port_from_netdev(slave_dev); 2357 struct bcm_sysport_priv *priv = netdev_priv(dev); 2358 struct bcm_sysport_tx_ring *ring; 2359 unsigned int num_tx_queues; 2360 unsigned int q, qp, port; 2361 2362 port = dp->index; 2363 2364 num_tx_queues = slave_dev->real_num_tx_queues; 2365 2366 for (q = 0; q < dev->num_tx_queues; q++) { 2367 ring = &priv->tx_rings[q]; 2368 2369 if (ring->switch_port != port) 2370 continue; 2371 2372 if (!ring->inspect) 2373 continue; 2374 2375 ring->inspect = false; 2376 qp = ring->switch_queue; 2377 priv->ring_map[qp + port * num_tx_queues] = NULL; 2378 } 2379 2380 return 0; 2381 } 2382 2383 static int bcm_sysport_netdevice_event(struct notifier_block *nb, 2384 unsigned long event, void *ptr) 2385 { 2386 struct net_device *dev = netdev_notifier_info_to_dev(ptr); 2387 struct netdev_notifier_changeupper_info *info = ptr; 2388 struct bcm_sysport_priv *priv; 2389 int ret = 0; 2390 2391 priv = container_of(nb, struct bcm_sysport_priv, netdev_notifier); 2392 if (priv->netdev != dev) 2393 return NOTIFY_DONE; 2394 2395 switch (event) { 2396 case NETDEV_CHANGEUPPER: 2397 if (dev->netdev_ops != &bcm_sysport_netdev_ops) 2398 return NOTIFY_DONE; 2399 2400 if (!dsa_user_dev_check(info->upper_dev)) 2401 return NOTIFY_DONE; 2402 2403 if (info->linking) 2404 ret = bcm_sysport_map_queues(dev, info->upper_dev); 2405 else 2406 ret = bcm_sysport_unmap_queues(dev, info->upper_dev); 2407 break; 2408 } 2409 2410 return notifier_from_errno(ret); 2411 } 2412 2413 #define REV_FMT "v%2x.%02x" 2414 2415 static const struct bcm_sysport_hw_params bcm_sysport_params[] = { 2416 [SYSTEMPORT] = { 2417 .is_lite = false, 2418 .num_rx_desc_words = SP_NUM_HW_RX_DESC_WORDS, 2419 }, 2420 [SYSTEMPORT_LITE] = { 2421 .is_lite = true, 2422 .num_rx_desc_words = SP_LT_NUM_HW_RX_DESC_WORDS, 2423 }, 2424 }; 2425 2426 static const struct of_device_id bcm_sysport_of_match[] = { 2427 { .compatible = "brcm,systemportlite-v1.00", 2428 .data = &bcm_sysport_params[SYSTEMPORT_LITE] }, 2429 { .compatible = "brcm,systemport-v1.00", 2430 .data = &bcm_sysport_params[SYSTEMPORT] }, 2431 { .compatible = "brcm,systemport", 2432 .data = &bcm_sysport_params[SYSTEMPORT] }, 2433 { /* sentinel */ } 2434 }; 2435 MODULE_DEVICE_TABLE(of, bcm_sysport_of_match); 2436 2437 static int bcm_sysport_probe(struct platform_device *pdev) 2438 { 2439 const struct bcm_sysport_hw_params *params; 2440 const struct of_device_id *of_id = NULL; 2441 struct bcm_sysport_priv *priv; 2442 struct device_node *dn; 2443 struct net_device *dev; 2444 u32 txq, rxq; 2445 int ret; 2446 2447 dn = pdev->dev.of_node; 2448 of_id = of_match_node(bcm_sysport_of_match, dn); 2449 if (!of_id || !of_id->data) 2450 return -EINVAL; 2451 2452 ret = dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(40)); 2453 if (ret) 2454 ret = dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(32)); 2455 if (ret) { 2456 dev_err(&pdev->dev, "unable to set DMA mask: %d\n", ret); 2457 return ret; 2458 } 2459 2460 /* Fairly quickly we need to know the type of adapter we have */ 2461 params = of_id->data; 2462 2463 /* Read the Transmit/Receive Queue properties */ 2464 if (of_property_read_u32(dn, "systemport,num-txq", &txq)) 2465 txq = TDMA_NUM_RINGS; 2466 if (of_property_read_u32(dn, "systemport,num-rxq", &rxq)) 2467 rxq = 1; 2468 2469 /* Sanity check the number of transmit queues */ 2470 if (!txq || txq > TDMA_NUM_RINGS) 2471 return -EINVAL; 2472 2473 dev = alloc_etherdev_mqs(sizeof(*priv), txq, rxq); 2474 if (!dev) 2475 return -ENOMEM; 2476 2477 /* Initialize private members */ 2478 priv = netdev_priv(dev); 2479 2480 priv->clk = devm_clk_get_optional(&pdev->dev, "sw_sysport"); 2481 if (IS_ERR(priv->clk)) { 2482 ret = PTR_ERR(priv->clk); 2483 goto err_free_netdev; 2484 } 2485 2486 /* Allocate number of TX rings */ 2487 priv->tx_rings = devm_kcalloc(&pdev->dev, txq, 2488 sizeof(struct bcm_sysport_tx_ring), 2489 GFP_KERNEL); 2490 if (!priv->tx_rings) { 2491 ret = -ENOMEM; 2492 goto err_free_netdev; 2493 } 2494 2495 priv->is_lite = params->is_lite; 2496 priv->num_rx_desc_words = params->num_rx_desc_words; 2497 2498 priv->irq0 = platform_get_irq(pdev, 0); 2499 if (!priv->is_lite) { 2500 priv->irq1 = platform_get_irq(pdev, 1); 2501 priv->wol_irq = platform_get_irq_optional(pdev, 2); 2502 } else { 2503 priv->wol_irq = platform_get_irq_optional(pdev, 1); 2504 } 2505 if (priv->irq0 <= 0 || (priv->irq1 <= 0 && !priv->is_lite)) { 2506 ret = -EINVAL; 2507 goto err_free_netdev; 2508 } 2509 2510 priv->base = devm_platform_ioremap_resource(pdev, 0); 2511 if (IS_ERR(priv->base)) { 2512 ret = PTR_ERR(priv->base); 2513 goto err_free_netdev; 2514 } 2515 2516 priv->netdev = dev; 2517 priv->pdev = pdev; 2518 2519 ret = of_get_phy_mode(dn, &priv->phy_interface); 2520 /* Default to GMII interface mode */ 2521 if (ret) 2522 priv->phy_interface = PHY_INTERFACE_MODE_GMII; 2523 2524 /* In the case of a fixed PHY, the DT node associated 2525 * to the PHY is the Ethernet MAC DT node. 2526 */ 2527 if (of_phy_is_fixed_link(dn)) { 2528 ret = of_phy_register_fixed_link(dn); 2529 if (ret) { 2530 dev_err(&pdev->dev, "failed to register fixed PHY\n"); 2531 goto err_free_netdev; 2532 } 2533 2534 priv->phy_dn = dn; 2535 } 2536 2537 /* Initialize netdevice members */ 2538 ret = of_get_ethdev_address(dn, dev); 2539 if (ret) { 2540 dev_warn(&pdev->dev, "using random Ethernet MAC\n"); 2541 eth_hw_addr_random(dev); 2542 } 2543 2544 SET_NETDEV_DEV(dev, &pdev->dev); 2545 dev_set_drvdata(&pdev->dev, dev); 2546 dev->ethtool_ops = &bcm_sysport_ethtool_ops; 2547 dev->netdev_ops = &bcm_sysport_netdev_ops; 2548 netif_napi_add(dev, &priv->napi, bcm_sysport_poll); 2549 2550 dev->features |= NETIF_F_RXCSUM | NETIF_F_HIGHDMA | 2551 NETIF_F_IP_CSUM | NETIF_F_IPV6_CSUM | 2552 NETIF_F_HW_VLAN_CTAG_TX; 2553 dev->hw_features |= dev->features; 2554 dev->vlan_features |= dev->features; 2555 dev->max_mtu = UMAC_MAX_MTU_SIZE; 2556 2557 /* Request the WOL interrupt and advertise suspend if available */ 2558 priv->wol_irq_disabled = 1; 2559 ret = devm_request_irq(&pdev->dev, priv->wol_irq, 2560 bcm_sysport_wol_isr, 0, dev->name, priv); 2561 if (!ret) 2562 device_set_wakeup_capable(&pdev->dev, 1); 2563 2564 priv->wol_clk = devm_clk_get_optional(&pdev->dev, "sw_sysportwol"); 2565 if (IS_ERR(priv->wol_clk)) { 2566 ret = PTR_ERR(priv->wol_clk); 2567 goto err_deregister_fixed_link; 2568 } 2569 2570 /* Set the needed headroom once and for all */ 2571 BUILD_BUG_ON(sizeof(struct bcm_tsb) != 8); 2572 dev->needed_headroom += sizeof(struct bcm_tsb); 2573 2574 /* libphy will adjust the link state accordingly */ 2575 netif_carrier_off(dev); 2576 2577 priv->rx_max_coalesced_frames = 1; 2578 u64_stats_init(&priv->syncp); 2579 2580 priv->netdev_notifier.notifier_call = bcm_sysport_netdevice_event; 2581 2582 ret = register_netdevice_notifier(&priv->netdev_notifier); 2583 if (ret) { 2584 dev_err(&pdev->dev, "failed to register DSA notifier\n"); 2585 goto err_deregister_fixed_link; 2586 } 2587 2588 ret = register_netdev(dev); 2589 if (ret) { 2590 dev_err(&pdev->dev, "failed to register net_device\n"); 2591 goto err_deregister_notifier; 2592 } 2593 2594 clk_prepare_enable(priv->clk); 2595 2596 priv->rev = topctrl_readl(priv, REV_CNTL) & REV_MASK; 2597 dev_info(&pdev->dev, 2598 "Broadcom SYSTEMPORT%s " REV_FMT 2599 " (irqs: %d, %d, TXQs: %d, RXQs: %d)\n", 2600 priv->is_lite ? " Lite" : "", 2601 (priv->rev >> 8) & 0xff, priv->rev & 0xff, 2602 priv->irq0, priv->irq1, txq, rxq); 2603 2604 clk_disable_unprepare(priv->clk); 2605 2606 return 0; 2607 2608 err_deregister_notifier: 2609 unregister_netdevice_notifier(&priv->netdev_notifier); 2610 err_deregister_fixed_link: 2611 if (of_phy_is_fixed_link(dn)) 2612 of_phy_deregister_fixed_link(dn); 2613 err_free_netdev: 2614 free_netdev(dev); 2615 return ret; 2616 } 2617 2618 static void bcm_sysport_remove(struct platform_device *pdev) 2619 { 2620 struct net_device *dev = dev_get_drvdata(&pdev->dev); 2621 struct bcm_sysport_priv *priv = netdev_priv(dev); 2622 struct device_node *dn = pdev->dev.of_node; 2623 2624 /* Not much to do, ndo_close has been called 2625 * and we use managed allocations 2626 */ 2627 unregister_netdevice_notifier(&priv->netdev_notifier); 2628 unregister_netdev(dev); 2629 if (of_phy_is_fixed_link(dn)) 2630 of_phy_deregister_fixed_link(dn); 2631 free_netdev(dev); 2632 dev_set_drvdata(&pdev->dev, NULL); 2633 } 2634 2635 static int bcm_sysport_suspend_to_wol(struct bcm_sysport_priv *priv) 2636 { 2637 struct net_device *ndev = priv->netdev; 2638 unsigned int timeout = 1000; 2639 unsigned int index, i = 0; 2640 u32 reg; 2641 2642 reg = umac_readl(priv, UMAC_MPD_CTRL); 2643 if (priv->wolopts & (WAKE_MAGIC | WAKE_MAGICSECURE)) 2644 reg |= MPD_EN; 2645 reg &= ~PSW_EN; 2646 if (priv->wolopts & WAKE_MAGICSECURE) { 2647 /* Program the SecureOn password */ 2648 umac_writel(priv, get_unaligned_be16(&priv->sopass[0]), 2649 UMAC_PSW_MS); 2650 umac_writel(priv, get_unaligned_be32(&priv->sopass[2]), 2651 UMAC_PSW_LS); 2652 reg |= PSW_EN; 2653 } 2654 umac_writel(priv, reg, UMAC_MPD_CTRL); 2655 2656 if (priv->wolopts & WAKE_FILTER) { 2657 /* Turn on ACPI matching to steal packets from RBUF */ 2658 reg = rbuf_readl(priv, RBUF_CONTROL); 2659 if (priv->is_lite) 2660 reg |= RBUF_ACPI_EN_LITE; 2661 else 2662 reg |= RBUF_ACPI_EN; 2663 rbuf_writel(priv, reg, RBUF_CONTROL); 2664 2665 /* Enable RXCHK, active filters and Broadcom tag matching */ 2666 reg = rxchk_readl(priv, RXCHK_CONTROL); 2667 reg &= ~(RXCHK_BRCM_TAG_MATCH_MASK << 2668 RXCHK_BRCM_TAG_MATCH_SHIFT); 2669 for_each_set_bit(index, priv->filters, RXCHK_BRCM_TAG_MAX) { 2670 reg |= BIT(RXCHK_BRCM_TAG_MATCH_SHIFT + i); 2671 i++; 2672 } 2673 reg |= RXCHK_EN | RXCHK_BRCM_TAG_EN; 2674 rxchk_writel(priv, reg, RXCHK_CONTROL); 2675 } 2676 2677 /* Make sure RBUF entered WoL mode as result */ 2678 do { 2679 reg = rbuf_readl(priv, RBUF_STATUS); 2680 if (reg & RBUF_WOL_MODE) 2681 break; 2682 2683 udelay(10); 2684 } while (timeout-- > 0); 2685 2686 /* Do not leave the UniMAC RBUF matching only MPD packets */ 2687 if (!timeout) { 2688 mpd_enable_set(priv, false); 2689 netif_err(priv, wol, ndev, "failed to enter WOL mode\n"); 2690 return -ETIMEDOUT; 2691 } 2692 2693 /* UniMAC receive needs to be turned on */ 2694 umac_enable_set(priv, CMD_RX_EN, 1); 2695 2696 netif_dbg(priv, wol, ndev, "entered WOL mode\n"); 2697 2698 return 0; 2699 } 2700 2701 static int __maybe_unused bcm_sysport_suspend(struct device *d) 2702 { 2703 struct net_device *dev = dev_get_drvdata(d); 2704 struct bcm_sysport_priv *priv = netdev_priv(dev); 2705 unsigned int i; 2706 int ret = 0; 2707 u32 reg; 2708 2709 if (!netif_running(dev)) 2710 return 0; 2711 2712 netif_device_detach(dev); 2713 2714 bcm_sysport_netif_stop(dev); 2715 2716 phy_suspend(dev->phydev); 2717 2718 /* Disable UniMAC RX */ 2719 umac_enable_set(priv, CMD_RX_EN, 0); 2720 2721 ret = rdma_enable_set(priv, 0); 2722 if (ret) { 2723 netdev_err(dev, "RDMA timeout!\n"); 2724 return ret; 2725 } 2726 2727 /* Disable RXCHK if enabled */ 2728 if (priv->rx_chk_en) { 2729 reg = rxchk_readl(priv, RXCHK_CONTROL); 2730 reg &= ~RXCHK_EN; 2731 rxchk_writel(priv, reg, RXCHK_CONTROL); 2732 } 2733 2734 /* Flush RX pipe */ 2735 if (!priv->wolopts) 2736 topctrl_writel(priv, RX_FLUSH, RX_FLUSH_CNTL); 2737 2738 ret = tdma_enable_set(priv, 0); 2739 if (ret) { 2740 netdev_err(dev, "TDMA timeout!\n"); 2741 return ret; 2742 } 2743 2744 /* Wait for a packet boundary */ 2745 usleep_range(2000, 3000); 2746 2747 umac_enable_set(priv, CMD_TX_EN, 0); 2748 2749 topctrl_writel(priv, TX_FLUSH, TX_FLUSH_CNTL); 2750 2751 /* Free RX/TX rings SW structures */ 2752 for (i = 0; i < dev->num_tx_queues; i++) 2753 bcm_sysport_fini_tx_ring(priv, i); 2754 bcm_sysport_fini_rx_ring(priv); 2755 2756 /* Get prepared for Wake-on-LAN */ 2757 if (device_may_wakeup(d) && priv->wolopts) { 2758 clk_prepare_enable(priv->wol_clk); 2759 ret = bcm_sysport_suspend_to_wol(priv); 2760 } 2761 2762 clk_disable_unprepare(priv->clk); 2763 2764 return ret; 2765 } 2766 2767 static int __maybe_unused bcm_sysport_resume(struct device *d) 2768 { 2769 struct net_device *dev = dev_get_drvdata(d); 2770 struct bcm_sysport_priv *priv = netdev_priv(dev); 2771 unsigned int i; 2772 int ret; 2773 2774 if (!netif_running(dev)) 2775 return 0; 2776 2777 clk_prepare_enable(priv->clk); 2778 if (priv->wolopts) 2779 clk_disable_unprepare(priv->wol_clk); 2780 2781 umac_reset(priv); 2782 2783 /* Disable the UniMAC RX/TX */ 2784 umac_enable_set(priv, CMD_RX_EN | CMD_TX_EN, 0); 2785 2786 /* We may have been suspended and never received a WOL event that 2787 * would turn off MPD detection, take care of that now 2788 */ 2789 bcm_sysport_resume_from_wol(priv); 2790 2791 /* Initialize both hardware and software ring */ 2792 for (i = 0; i < dev->num_tx_queues; i++) { 2793 ret = bcm_sysport_init_tx_ring(priv, i); 2794 if (ret) { 2795 netdev_err(dev, "failed to initialize TX ring %d\n", 2796 i); 2797 goto out_free_tx_rings; 2798 } 2799 } 2800 2801 /* Initialize linked-list */ 2802 tdma_writel(priv, TDMA_LL_RAM_INIT_BUSY, TDMA_STATUS); 2803 2804 /* Initialize RX ring */ 2805 ret = bcm_sysport_init_rx_ring(priv); 2806 if (ret) { 2807 netdev_err(dev, "failed to initialize RX ring\n"); 2808 goto out_free_rx_ring; 2809 } 2810 2811 /* RX pipe enable */ 2812 topctrl_writel(priv, 0, RX_FLUSH_CNTL); 2813 2814 ret = rdma_enable_set(priv, 1); 2815 if (ret) { 2816 netdev_err(dev, "failed to enable RDMA\n"); 2817 goto out_free_rx_ring; 2818 } 2819 2820 /* Restore enabled features */ 2821 bcm_sysport_set_features(dev, dev->features); 2822 2823 rbuf_init(priv); 2824 2825 /* Set maximum frame length */ 2826 if (!priv->is_lite) 2827 umac_writel(priv, UMAC_MAX_MTU_SIZE, UMAC_MAX_FRAME_LEN); 2828 else 2829 gib_set_pad_extension(priv); 2830 2831 /* Set MAC address */ 2832 umac_set_hw_addr(priv, dev->dev_addr); 2833 2834 umac_enable_set(priv, CMD_RX_EN, 1); 2835 2836 /* TX pipe enable */ 2837 topctrl_writel(priv, 0, TX_FLUSH_CNTL); 2838 2839 umac_enable_set(priv, CMD_TX_EN, 1); 2840 2841 ret = tdma_enable_set(priv, 1); 2842 if (ret) { 2843 netdev_err(dev, "TDMA timeout!\n"); 2844 goto out_free_rx_ring; 2845 } 2846 2847 phy_resume(dev->phydev); 2848 2849 bcm_sysport_netif_start(dev); 2850 2851 netif_device_attach(dev); 2852 2853 return 0; 2854 2855 out_free_rx_ring: 2856 bcm_sysport_fini_rx_ring(priv); 2857 out_free_tx_rings: 2858 for (i = 0; i < dev->num_tx_queues; i++) 2859 bcm_sysport_fini_tx_ring(priv, i); 2860 clk_disable_unprepare(priv->clk); 2861 return ret; 2862 } 2863 2864 static SIMPLE_DEV_PM_OPS(bcm_sysport_pm_ops, 2865 bcm_sysport_suspend, bcm_sysport_resume); 2866 2867 static struct platform_driver bcm_sysport_driver = { 2868 .probe = bcm_sysport_probe, 2869 .remove = bcm_sysport_remove, 2870 .driver = { 2871 .name = "brcm-systemport", 2872 .of_match_table = bcm_sysport_of_match, 2873 .pm = &bcm_sysport_pm_ops, 2874 }, 2875 }; 2876 module_platform_driver(bcm_sysport_driver); 2877 2878 MODULE_AUTHOR("Broadcom Corporation"); 2879 MODULE_DESCRIPTION("Broadcom System Port Ethernet MAC driver"); 2880 MODULE_ALIAS("platform:brcm-systemport"); 2881 MODULE_LICENSE("GPL"); 2882