1 /* SPDX-License-Identifier: GPL-2.0 */ 2 #ifndef __BCMASP_H 3 #define __BCMASP_H 4 5 #include <linux/netdevice.h> 6 #include <linux/phy.h> 7 #include <linux/io-64-nonatomic-hi-lo.h> 8 #include <uapi/linux/ethtool.h> 9 #include <net/page_pool/helpers.h> 10 11 #define ASP_INTR2_OFFSET 0x1000 12 #define ASP_INTR2_STATUS 0x0 13 #define ASP_INTR2_SET 0x4 14 #define ASP_INTR2_CLEAR 0x8 15 #define ASP_INTR2_MASK_STATUS 0xc 16 #define ASP_INTR2_MASK_SET 0x10 17 #define ASP_INTR2_MASK_CLEAR 0x14 18 19 #define ASP_INTR2_RX_ECH(intr) BIT(intr) 20 #define ASP_INTR2_TX_DESC(intr) BIT((intr) + 14) 21 #define ASP_INTR2_UMC0_WAKE BIT(22) 22 #define ASP_INTR2_UMC1_WAKE BIT(28) 23 #define ASP_INTR2_PHY_EVENT(intr) ((intr) ? BIT(30) | BIT(31) : \ 24 BIT(24) | BIT(25)) 25 26 #define ASP_WAKEUP_INTR2_OFFSET 0x1200 27 #define ASP_WAKEUP_INTR2_STATUS 0x0 28 #define ASP_WAKEUP_INTR2_SET 0x4 29 #define ASP_WAKEUP_INTR2_CLEAR 0x8 30 #define ASP_WAKEUP_INTR2_MASK_STATUS 0xc 31 #define ASP_WAKEUP_INTR2_MASK_SET 0x10 32 #define ASP_WAKEUP_INTR2_MASK_CLEAR 0x14 33 #define ASP_WAKEUP_INTR2_MPD_0 BIT(0) 34 #define ASP_WAKEUP_INTR2_MPD_1 BIT(1) 35 #define ASP_WAKEUP_INTR2_FILT_0 BIT(2) 36 #define ASP_WAKEUP_INTR2_FILT_1 BIT(3) 37 #define ASP_WAKEUP_INTR2_FW BIT(4) 38 39 #define ASP_CTRL2_OFFSET 0x2000 40 #define ASP_CTRL2_CORE_CLOCK_SELECT 0x0 41 #define ASP_CTRL2_CORE_CLOCK_SELECT_MAIN BIT(0) 42 #define ASP_CTRL2_CPU_CLOCK_SELECT 0x4 43 #define ASP_CTRL2_CPU_CLOCK_SELECT_MAIN BIT(0) 44 45 #define ASP_TX_ANALYTICS_OFFSET 0x4c000 46 #define ASP_TX_ANALYTICS_CTRL 0x0 47 48 #define ASP_RX_ANALYTICS_OFFSET 0x98000 49 #define ASP_RX_ANALYTICS_CTRL 0x0 50 51 #define ASP_RX_CTRL_OFFSET 0x9f000 52 #define ASP_RX_CTRL_UMAC_0_FRAME_COUNT 0x8 53 #define ASP_RX_CTRL_UMAC_1_FRAME_COUNT 0xc 54 #define ASP_RX_CTRL_FB_0_FRAME_COUNT 0x14 55 #define ASP_RX_CTRL_FB_1_FRAME_COUNT 0x18 56 #define ASP_RX_CTRL_FB_8_FRAME_COUNT 0x1c 57 #define ASP_RX_CTRL_FB_9_FRAME_COUNT 0x20 58 #define ASP_RX_CTRL_FB_10_FRAME_COUNT 0x24 59 #define ASP_RX_CTRL_FB_OUT_FRAME_COUNT 0x28 60 #define ASP_RX_CTRL_FB_FILT_OUT_FRAME_COUNT 0x2c 61 #define ASP_RX_CTRL_FLUSH 0x30 62 #define ASP_CTRL_UMAC0_FLUSH_MASK (BIT(0) | BIT(12)) 63 #define ASP_CTRL_UMAC1_FLUSH_MASK (BIT(1) | BIT(13)) 64 #define ASP_CTRL_SPB_FLUSH_MASK (BIT(8) | BIT(20)) 65 #define ASP_RX_CTRL_FB_RX_FIFO_DEPTH 0x38 66 67 #define ASP_RX_FILTER_OFFSET 0x80000 68 #define ASP_RX_FILTER_BLK_CTRL 0x0 69 #define ASP_RX_FILTER_OPUT_EN BIT(0) 70 #define ASP_RX_FILTER_MDA_EN BIT(1) 71 #define ASP_RX_FILTER_LNR_MD BIT(2) 72 #define ASP_RX_FILTER_GEN_WK_EN BIT(3) 73 #define ASP_RX_FILTER_GEN_WK_CLR BIT(4) 74 #define ASP_RX_FILTER_NT_FLT_EN BIT(5) 75 #define ASP_RX_FILTER_MDA_CFG(sel) (((sel) * 0x14) + 0x100) 76 #define ASP_RX_FILTER_MDA_CFG_EN_SHIFT 8 77 #define ASP_RX_FILTER_MDA_CFG_UMC_SEL(sel) ((sel) > 1 ? BIT(17) : \ 78 BIT((sel) + 9)) 79 #define ASP_RX_FILTER_MDA_PAT_H(sel) (((sel) * 0x14) + 0x104) 80 #define ASP_RX_FILTER_MDA_PAT_L(sel) (((sel) * 0x14) + 0x108) 81 #define ASP_RX_FILTER_MDA_MSK_H(sel) (((sel) * 0x14) + 0x10c) 82 #define ASP_RX_FILTER_MDA_MSK_L(sel) (((sel) * 0x14) + 0x110) 83 #define ASP_RX_FILTER_NET_CFG(sel) (((sel) * 0xa04) + 0x400) 84 #define ASP_RX_FILTER_NET_CFG_CH(sel) ((sel) << 0) 85 #define ASP_RX_FILTER_NET_CFG_EN BIT(9) 86 #define ASP_RX_FILTER_NET_CFG_L2_EN BIT(10) 87 #define ASP_RX_FILTER_NET_CFG_L3_EN BIT(11) 88 #define ASP_RX_FILTER_NET_CFG_L4_EN BIT(12) 89 #define ASP_RX_FILTER_NET_CFG_L3_FRM(sel) ((sel) << 13) 90 #define ASP_RX_FILTER_NET_CFG_L4_FRM(sel) ((sel) << 15) 91 #define ASP_RX_FILTER_NET_CFG_UMC(sel) BIT((sel) + 19) 92 #define ASP_RX_FILTER_NET_CFG_DMA_EN BIT(27) 93 94 #define ASP_RX_FILTER_NET_OFFSET_MAX 32 95 #define ASP_RX_FILTER_NET_PAT(sel, block, off) \ 96 (((sel) * 0xa04) + ((block) * 0x200) + (off) + 0x600) 97 #define ASP_RX_FILTER_NET_MASK(sel, block, off) \ 98 (((sel) * 0xa04) + ((block) * 0x200) + (off) + 0x700) 99 100 #define ASP_RX_FILTER_NET_OFFSET(sel) (((sel) * 0xa04) + 0xe00) 101 #define ASP_RX_FILTER_NET_OFFSET_L2(val) ((val) << 0) 102 #define ASP_RX_FILTER_NET_OFFSET_L3_0(val) ((val) << 8) 103 #define ASP_RX_FILTER_NET_OFFSET_L3_1(val) ((val) << 16) 104 #define ASP_RX_FILTER_NET_OFFSET_L4(val) ((val) << 24) 105 106 enum asp_rx_net_filter_block { 107 ASP_RX_FILTER_NET_L2 = 0, 108 ASP_RX_FILTER_NET_L3_0, 109 ASP_RX_FILTER_NET_L3_1, 110 ASP_RX_FILTER_NET_L4, 111 ASP_RX_FILTER_NET_BLOCK_MAX 112 }; 113 114 #define ASP_EDPKT_OFFSET 0x9c000 115 #define ASP_EDPKT_ENABLE 0x4 116 #define ASP_EDPKT_ENABLE_EN BIT(0) 117 #define ASP_EDPKT_HDR_CFG 0xc 118 #define ASP_EDPKT_HDR_SZ_SHIFT 2 119 #define ASP_EDPKT_HDR_SZ_32 0 120 #define ASP_EDPKT_HDR_SZ_64 1 121 #define ASP_EDPKT_HDR_SZ_96 2 122 #define ASP_EDPKT_HDR_SZ_128 3 123 #define ASP_EDPKT_BURST_BUF_PSCAL_TOUT 0x10 124 #define ASP_EDPKT_BURST_BUF_WRITE_TOUT 0x14 125 #define ASP_EDPKT_BURST_BUF_READ_TOUT 0x18 126 #define ASP_EDPKT_RX_TS_COUNTER 0x38 127 #define ASP_EDPKT_ENDI 0x48 128 #define ASP_EDPKT_ENDI_DESC_SHIFT 8 129 #define ASP_EDPKT_ENDI_NO_BT_SWP 0 130 #define ASP_EDPKT_ENDI_BT_SWP_WD 1 131 #define ASP_EDPKT_RX_PKT_CNT 0x138 132 #define ASP_EDPKT_HDR_EXTR_CNT 0x13c 133 #define ASP_EDPKT_HDR_OUT_CNT 0x140 134 #define ASP_EDPKT_SPARE_REG 0x174 135 #define ASP_EDPKT_SPARE_REG_EPHY_LPI BIT(4) 136 #define ASP_EDPKT_SPARE_REG_GPHY_LPI BIT(3) 137 138 #define ASP_CTRL_OFFSET 0x101000 139 #define ASP_CTRL_ASP_SW_INIT 0x04 140 #define ASP_CTRL_ASP_SW_INIT_ACPUSS_CORE BIT(0) 141 #define ASP_CTRL_ASP_SW_INIT_ASP_TX BIT(1) 142 #define ASP_CTRL_ASP_SW_INIT_AS_RX BIT(2) 143 #define ASP_CTRL_ASP_SW_INIT_ASP_RGMII_UMAC0 BIT(3) 144 #define ASP_CTRL_ASP_SW_INIT_ASP_RGMII_UMAC1 BIT(4) 145 #define ASP_CTRL_ASP_SW_INIT_ASP_XMEMIF BIT(5) 146 #define ASP_CTRL_CLOCK_CTRL 0x04 147 #define ASP_CTRL_CLOCK_CTRL_ASP_TX_DISABLE BIT(0) 148 #define ASP_CTRL_CLOCK_CTRL_ASP_RX_DISABLE BIT(1) 149 #define ASP_CTRL_CLOCK_CTRL_ASP_RGMII_SHIFT 2 150 #define ASP_CTRL_CLOCK_CTRL_ASP_RGMII_MASK (0x7 << ASP_CTRL_CLOCK_CTRL_ASP_RGMII_SHIFT) 151 #define ASP_CTRL_CLOCK_CTRL_ASP_RGMII_DIS(x) BIT(ASP_CTRL_CLOCK_CTRL_ASP_RGMII_SHIFT + (x)) 152 #define ASP_CTRL_CLOCK_CTRL_ASP_ALL_DISABLE GENMASK(4, 0) 153 #define ASP_CTRL_CORE_CLOCK_SELECT 0x08 154 #define ASP_CTRL_CORE_CLOCK_SELECT_MAIN BIT(0) 155 #define ASP_CTRL_SCRATCH_0 0x0c 156 157 struct bcmasp_tx_cb { 158 struct sk_buff *skb; 159 unsigned int bytes_sent; 160 bool last; 161 162 DEFINE_DMA_UNMAP_ADDR(dma_addr); 163 DEFINE_DMA_UNMAP_LEN(dma_len); 164 }; 165 166 struct bcmasp_res { 167 /* Per interface resources */ 168 /* Port */ 169 void __iomem *umac; 170 void __iomem *umac2fb; 171 void __iomem *rgmii; 172 173 /* TX slowpath/configuration */ 174 void __iomem *tx_spb_ctrl; 175 void __iomem *tx_spb_top; 176 void __iomem *tx_epkt_core; 177 void __iomem *tx_pause_ctrl; 178 }; 179 180 #define DESC_ADDR(x) ((x) & GENMASK_ULL(39, 0)) 181 #define DESC_FLAGS(x) ((x) & GENMASK_ULL(63, 40)) 182 183 struct bcmasp_desc { 184 u64 buf; 185 #define DESC_CHKSUM BIT_ULL(40) 186 #define DESC_CRC_ERR BIT_ULL(41) 187 #define DESC_RX_SYM_ERR BIT_ULL(42) 188 #define DESC_NO_OCT_ALN BIT_ULL(43) 189 #define DESC_PKT_TRUC BIT_ULL(44) 190 /* 39:0 (TX/RX) bits 0-39 of buf addr 191 * 40 (RX) checksum 192 * 41 (RX) crc_error 193 * 42 (RX) rx_symbol_error 194 * 43 (RX) non_octet_aligned 195 * 44 (RX) pkt_truncated 196 * 45 Reserved 197 * 56:46 (RX) mac_filter_id 198 * 60:57 (RX) rx_port_num (0-unicmac0, 1-unimac1) 199 * 61 Reserved 200 * 63:62 (TX) forward CRC, overwrite CRC 201 */ 202 u32 size; 203 u32 flags; 204 #define DESC_INT_EN BIT(0) 205 #define DESC_SOF BIT(1) 206 #define DESC_EOF BIT(2) 207 #define DESC_EPKT_CMD BIT(3) 208 #define DESC_SCRAM_ST BIT(8) 209 #define DESC_SCRAM_END BIT(9) 210 #define DESC_PCPP BIT(10) 211 #define DESC_PPPP BIT(11) 212 /* 0 (TX) tx_int_en 213 * 1 (TX/RX) SOF 214 * 2 (TX/RX) EOF 215 * 3 (TX) epkt_command 216 * 6:4 (TX) PA 217 * 7 (TX) pause at desc end 218 * 8 (TX) scram_start 219 * 9 (TX) scram_end 220 * 10 (TX) PCPP 221 * 11 (TX) PPPP 222 * 14:12 Reserved 223 * 15 (TX) pid ch Valid 224 * 19:16 (TX) data_pkt_type 225 * 32:20 (TX) pid_channel (RX) nw_filter_id 226 */ 227 }; 228 229 struct bcmasp_intf; 230 231 struct bcmasp_intf_stats64 { 232 /* Rx Stats */ 233 u64_stats_t rx_packets; 234 u64_stats_t rx_bytes; 235 u64_stats_t rx_errors; 236 u64_stats_t rx_dropped; 237 u64_stats_t rx_crc_errs; 238 u64_stats_t rx_sym_errs; 239 240 /* Tx Stats*/ 241 u64_stats_t tx_packets; 242 u64_stats_t tx_bytes; 243 244 struct u64_stats_sync syncp; 245 }; 246 247 struct bcmasp_mib_counters { 248 u32 umac_frm_cnt; 249 u32 fb_frm_cnt; 250 u32 fb_rx_fifo_depth; 251 u32 fb_out_frm_cnt; 252 u32 fb_filt_out_frm_cnt; 253 u32 alloc_rx_skb_failed; 254 u32 tx_dma_failed; 255 u32 mc_filters_full_cnt; 256 u32 uc_filters_full_cnt; 257 u32 filters_combine_cnt; 258 u32 promisc_filters_cnt; 259 u32 tx_realloc_offload_failed; 260 u32 tx_timeout_cnt; 261 }; 262 263 264 struct bcmasp_priv; 265 266 struct bcmasp_intf { 267 struct list_head list; 268 struct net_device *ndev; 269 struct bcmasp_priv *parent; 270 271 /* ASP Ch */ 272 int channel; 273 int port; 274 275 /* Used for splitting shared resources */ 276 int index; 277 278 struct napi_struct tx_napi; 279 /* TX ring, starts on a new cacheline boundary */ 280 void __iomem *tx_spb_dma; 281 int tx_spb_index; 282 int tx_spb_clean_index; 283 struct bcmasp_desc *tx_spb_cpu; 284 dma_addr_t tx_spb_dma_addr; 285 dma_addr_t tx_spb_dma_valid; 286 dma_addr_t tx_spb_dma_read; 287 struct bcmasp_tx_cb *tx_cbs; 288 289 /* RX ring, starts on a new cacheline boundary */ 290 void __iomem *rx_edpkt_cfg; 291 void __iomem *rx_edpkt_dma; 292 int rx_edpkt_index; 293 struct bcmasp_desc *rx_edpkt_cpu; 294 dma_addr_t rx_edpkt_dma_addr; 295 dma_addr_t rx_edpkt_dma_read; 296 dma_addr_t rx_edpkt_dma_valid; 297 298 /* Streaming RX data ring (RBUF_4K mode) */ 299 void *rx_ring_cpu; 300 dma_addr_t rx_ring_dma; 301 dma_addr_t rx_ring_dma_valid; 302 int rx_buf_order; 303 304 /* Page pool for recycling RX SKB data pages */ 305 struct page_pool *rx_page_pool; 306 struct napi_struct rx_napi; 307 308 struct bcmasp_res res; 309 unsigned int crc_fwd; 310 311 /* PHY device */ 312 struct device_node *phy_dn; 313 struct device_node *ndev_dn; 314 phy_interface_t phy_interface; 315 bool internal_phy; 316 int old_pause; 317 int old_link; 318 int old_duplex; 319 320 u32 msg_enable; 321 322 /* Statistics */ 323 struct bcmasp_intf_stats64 stats64; 324 struct bcmasp_mib_counters mib; 325 326 u32 wolopts; 327 u8 sopass[SOPASS_MAX]; 328 }; 329 330 #define NUM_NET_FILTERS 32 331 struct bcmasp_net_filter { 332 struct ethtool_rx_flow_spec fs; 333 334 bool claimed; 335 bool wake_filter; 336 337 int port; 338 int ch; 339 unsigned int hw_index; 340 }; 341 342 #define NUM_MDA_FILTERS 32 343 struct bcmasp_mda_filter { 344 /* Current owner of this filter */ 345 int port; 346 bool en; 347 u8 addr[ETH_ALEN]; 348 u8 mask[ETH_ALEN]; 349 }; 350 351 struct bcmasp_plat_data { 352 void (*core_clock_select)(struct bcmasp_priv *priv, bool slow); 353 void (*eee_fixup)(struct bcmasp_intf *priv, bool en); 354 unsigned int num_mda_filters; 355 unsigned int num_net_filters; 356 unsigned int tx_chan_offset; 357 unsigned int rx_ctrl_offset; 358 }; 359 360 struct bcmasp_priv { 361 struct platform_device *pdev; 362 struct clk *clk; 363 364 int irq; 365 u32 irq_mask; 366 367 /* Used if shared wol irq */ 368 struct mutex wol_lock; 369 int wol_irq; 370 unsigned long wol_irq_enabled_mask; 371 372 void (*core_clock_select)(struct bcmasp_priv *priv, bool slow); 373 void (*eee_fixup)(struct bcmasp_intf *intf, bool en); 374 unsigned int num_mda_filters; 375 unsigned int num_net_filters; 376 unsigned int tx_chan_offset; 377 unsigned int rx_ctrl_offset; 378 379 void __iomem *base; 380 381 struct list_head intfs; 382 383 struct bcmasp_mda_filter *mda_filters; 384 385 /* MAC destination address filters lock */ 386 spinlock_t mda_lock; 387 388 /* Protects accesses to ASP_CTRL_CLOCK_CTRL */ 389 spinlock_t clk_lock; 390 391 struct bcmasp_net_filter *net_filters; 392 393 /* Network filter lock */ 394 struct mutex net_lock; 395 }; 396 397 #define __BCMASP_IO_MACRO(name, m) \ 398 static inline u32 name##_rl(struct bcmasp_intf *intf, u32 off) \ 399 { \ 400 u32 reg = readl_relaxed(intf->m + off); \ 401 return reg; \ 402 } \ 403 static inline void name##_wl(struct bcmasp_intf *intf, u32 val, u32 off)\ 404 { \ 405 writel_relaxed(val, intf->m + off); \ 406 } 407 408 #define BCMASP_IO_MACRO(name) __BCMASP_IO_MACRO(name, res.name) 409 #define BCMASP_FP_IO_MACRO(name) __BCMASP_IO_MACRO(name, name) 410 411 BCMASP_IO_MACRO(umac); 412 BCMASP_IO_MACRO(umac2fb); 413 BCMASP_IO_MACRO(rgmii); 414 BCMASP_FP_IO_MACRO(tx_spb_dma); 415 BCMASP_IO_MACRO(tx_spb_ctrl); 416 BCMASP_IO_MACRO(tx_spb_top); 417 BCMASP_IO_MACRO(tx_epkt_core); 418 BCMASP_IO_MACRO(tx_pause_ctrl); 419 BCMASP_FP_IO_MACRO(rx_edpkt_dma); 420 BCMASP_FP_IO_MACRO(rx_edpkt_cfg); 421 422 #define __BCMASP_FP_IO_MACRO_Q(name, m) \ 423 static inline u64 name##_rq(struct bcmasp_intf *intf, u32 off) \ 424 { \ 425 u64 reg = readq_relaxed(intf->m + off); \ 426 return reg; \ 427 } \ 428 static inline void name##_wq(struct bcmasp_intf *intf, u64 val, u32 off)\ 429 { \ 430 writeq_relaxed(val, intf->m + off); \ 431 } 432 433 #define BCMASP_FP_IO_MACRO_Q(name) __BCMASP_FP_IO_MACRO_Q(name, name) 434 435 BCMASP_FP_IO_MACRO_Q(tx_spb_dma); 436 BCMASP_FP_IO_MACRO_Q(rx_edpkt_dma); 437 BCMASP_FP_IO_MACRO_Q(rx_edpkt_cfg); 438 439 #define PKT_OFFLOAD_NOP (0 << 28) 440 #define PKT_OFFLOAD_HDR_OP (1 << 28) 441 #define PKT_OFFLOAD_HDR_WRBACK BIT(19) 442 #define PKT_OFFLOAD_HDR_COUNT(x) ((x) << 16) 443 #define PKT_OFFLOAD_HDR_SIZE_1(x) ((x) << 4) 444 #define PKT_OFFLOAD_HDR_SIZE_2(x) (x) 445 #define PKT_OFFLOAD_HDR2_SIZE_2(x) ((x) << 24) 446 #define PKT_OFFLOAD_HDR2_SIZE_3(x) ((x) << 12) 447 #define PKT_OFFLOAD_HDR2_SIZE_4(x) (x) 448 #define PKT_OFFLOAD_EPKT_OP (2 << 28) 449 #define PKT_OFFLOAD_EPKT_WRBACK BIT(23) 450 #define PKT_OFFLOAD_EPKT_IP(x) ((x) << 21) 451 #define PKT_OFFLOAD_EPKT_TP(x) ((x) << 19) 452 #define PKT_OFFLOAD_EPKT_LEN(x) ((x) << 16) 453 #define PKT_OFFLOAD_EPKT_CSUM_L4 BIT(15) 454 #define PKT_OFFLOAD_EPKT_CSUM_L3 BIT(14) 455 #define PKT_OFFLOAD_EPKT_ID(x) ((x) << 12) 456 #define PKT_OFFLOAD_EPKT_SEQ(x) ((x) << 10) 457 #define PKT_OFFLOAD_EPKT_TS(x) ((x) << 8) 458 #define PKT_OFFLOAD_EPKT_BLOC(x) (x) 459 #define PKT_OFFLOAD_END_OP (7 << 28) 460 461 struct bcmasp_pkt_offload { 462 __be32 nop; 463 __be32 header; 464 __be32 header2; 465 __be32 epkt; 466 __be32 end; 467 }; 468 469 #define BCMASP_CORE_IO_MACRO(name, offset) \ 470 static inline u32 name##_core_rl(struct bcmasp_priv *priv, \ 471 u32 off) \ 472 { \ 473 u32 reg = readl_relaxed(priv->base + (offset) + off); \ 474 return reg; \ 475 } \ 476 static inline void name##_core_wl(struct bcmasp_priv *priv, \ 477 u32 val, u32 off) \ 478 { \ 479 writel_relaxed(val, priv->base + (offset) + off); \ 480 } 481 482 BCMASP_CORE_IO_MACRO(intr2, ASP_INTR2_OFFSET); 483 BCMASP_CORE_IO_MACRO(wakeup_intr2, ASP_WAKEUP_INTR2_OFFSET); 484 BCMASP_CORE_IO_MACRO(tx_analytics, ASP_TX_ANALYTICS_OFFSET); 485 BCMASP_CORE_IO_MACRO(rx_analytics, ASP_RX_ANALYTICS_OFFSET); 486 BCMASP_CORE_IO_MACRO(rx_filter, ASP_RX_FILTER_OFFSET); 487 BCMASP_CORE_IO_MACRO(rx_edpkt, ASP_EDPKT_OFFSET); 488 BCMASP_CORE_IO_MACRO(ctrl, ASP_CTRL_OFFSET); 489 BCMASP_CORE_IO_MACRO(ctrl2, ASP_CTRL2_OFFSET); 490 491 #define BCMASP_CORE_IO_MACRO_OFFSET(name, offset) \ 492 static inline u32 name##_core_rl(struct bcmasp_priv *priv, \ 493 u32 off) \ 494 { \ 495 u32 reg = readl_relaxed(priv->base + priv->name##_offset + \ 496 (offset) + off); \ 497 return reg; \ 498 } \ 499 static inline void name##_core_wl(struct bcmasp_priv *priv, \ 500 u32 val, u32 off) \ 501 { \ 502 writel_relaxed(val, priv->base + priv->name##_offset + \ 503 (offset) + off); \ 504 } 505 BCMASP_CORE_IO_MACRO_OFFSET(rx_ctrl, ASP_RX_CTRL_OFFSET); 506 507 struct bcmasp_intf *bcmasp_interface_create(struct bcmasp_priv *priv, 508 struct device_node *ndev_dn, int i); 509 510 void bcmasp_interface_destroy(struct bcmasp_intf *intf); 511 512 void bcmasp_enable_tx_irq(struct bcmasp_intf *intf, int en); 513 514 void bcmasp_enable_rx_irq(struct bcmasp_intf *intf, int en); 515 516 void bcmasp_enable_phy_irq(struct bcmasp_intf *intf, int en); 517 518 void bcmasp_flush_rx_port(struct bcmasp_intf *intf); 519 520 extern const struct ethtool_ops bcmasp_ethtool_ops; 521 522 int bcmasp_interface_suspend(struct bcmasp_intf *intf); 523 524 int bcmasp_interface_resume(struct bcmasp_intf *intf); 525 526 void bcmasp_set_promisc(struct bcmasp_intf *intf, bool en); 527 528 void bcmasp_set_allmulti(struct bcmasp_intf *intf, bool en); 529 530 void bcmasp_set_broad(struct bcmasp_intf *intf, bool en); 531 532 void bcmasp_set_oaddr(struct bcmasp_intf *intf, const unsigned char *addr, 533 bool en); 534 535 int bcmasp_set_en_mda_filter(struct bcmasp_intf *intf, unsigned char *addr, 536 unsigned char *mask); 537 538 void bcmasp_disable_all_filters(struct bcmasp_intf *intf); 539 540 void bcmasp_core_clock_set_intf(struct bcmasp_intf *intf, bool en); 541 542 struct bcmasp_net_filter *bcmasp_netfilt_get_init(struct bcmasp_intf *intf, 543 u32 loc, bool wake_filter, 544 bool init); 545 546 bool bcmasp_netfilt_check_dup(struct bcmasp_intf *intf, 547 struct ethtool_rx_flow_spec *fs); 548 549 void bcmasp_netfilt_release(struct bcmasp_intf *intf, 550 struct bcmasp_net_filter *nfilt); 551 552 int bcmasp_netfilt_get_active(struct bcmasp_intf *intf); 553 554 int bcmasp_netfilt_get_all_active(struct bcmasp_intf *intf, u32 *rule_locs, 555 u32 *rule_cnt); 556 557 void bcmasp_netfilt_suspend(struct bcmasp_intf *intf); 558 559 void bcmasp_enable_wol(struct bcmasp_intf *intf, bool en); 560 #endif 561