1 /* 2 * Copyright(c) 2008 - 2009 Atheros Corporation. All rights reserved. 3 * 4 * Derived from Intel e1000 driver 5 * Copyright(c) 1999 - 2005 Intel Corporation. All rights reserved. 6 * 7 * This program is free software; you can redistribute it and/or modify it 8 * under the terms of the GNU General Public License as published by the Free 9 * Software Foundation; either version 2 of the License, or (at your option) 10 * any later version. 11 * 12 * This program is distributed in the hope that it will be useful, but WITHOUT 13 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or 14 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for 15 * more details. 16 * 17 * You should have received a copy of the GNU General Public License along with 18 * this program; if not, write to the Free Software Foundation, Inc., 59 19 * Temple Place - Suite 330, Boston, MA 02111-1307, USA. 20 */ 21 22 #include "atl1c.h" 23 24 #define ATL1C_DRV_VERSION "1.0.1.1-NAPI" 25 char atl1c_driver_name[] = "atl1c"; 26 char atl1c_driver_version[] = ATL1C_DRV_VERSION; 27 28 /* 29 * atl1c_pci_tbl - PCI Device ID Table 30 * 31 * Wildcard entries (PCI_ANY_ID) should come last 32 * Last entry must be all 0s 33 * 34 * { Vendor ID, Device ID, SubVendor ID, SubDevice ID, 35 * Class, Class Mask, private data (not used) } 36 */ 37 static const struct pci_device_id atl1c_pci_tbl[] = { 38 {PCI_DEVICE(PCI_VENDOR_ID_ATTANSIC, PCI_DEVICE_ID_ATTANSIC_L1C)}, 39 {PCI_DEVICE(PCI_VENDOR_ID_ATTANSIC, PCI_DEVICE_ID_ATTANSIC_L2C)}, 40 {PCI_DEVICE(PCI_VENDOR_ID_ATTANSIC, PCI_DEVICE_ID_ATHEROS_L2C_B)}, 41 {PCI_DEVICE(PCI_VENDOR_ID_ATTANSIC, PCI_DEVICE_ID_ATHEROS_L2C_B2)}, 42 {PCI_DEVICE(PCI_VENDOR_ID_ATTANSIC, PCI_DEVICE_ID_ATHEROS_L1D)}, 43 {PCI_DEVICE(PCI_VENDOR_ID_ATTANSIC, PCI_DEVICE_ID_ATHEROS_L1D_2_0)}, 44 /* required last entry */ 45 { 0 } 46 }; 47 MODULE_DEVICE_TABLE(pci, atl1c_pci_tbl); 48 49 MODULE_AUTHOR("Jie Yang"); 50 MODULE_AUTHOR("Qualcomm Atheros Inc., <nic-devel@qualcomm.com>"); 51 MODULE_DESCRIPTION("Qualcomm Atheros 100/1000M Ethernet Network Driver"); 52 MODULE_LICENSE("GPL"); 53 MODULE_VERSION(ATL1C_DRV_VERSION); 54 55 static int atl1c_stop_mac(struct atl1c_hw *hw); 56 static void atl1c_disable_l0s_l1(struct atl1c_hw *hw); 57 static void atl1c_set_aspm(struct atl1c_hw *hw, u16 link_speed); 58 static void atl1c_start_mac(struct atl1c_adapter *adapter); 59 static void atl1c_clean_rx_irq(struct atl1c_adapter *adapter, 60 int *work_done, int work_to_do); 61 static int atl1c_up(struct atl1c_adapter *adapter); 62 static void atl1c_down(struct atl1c_adapter *adapter); 63 static int atl1c_reset_mac(struct atl1c_hw *hw); 64 static void atl1c_reset_dma_ring(struct atl1c_adapter *adapter); 65 static int atl1c_configure(struct atl1c_adapter *adapter); 66 static int atl1c_alloc_rx_buffer(struct atl1c_adapter *adapter); 67 68 69 static const u32 atl1c_default_msg = NETIF_MSG_DRV | NETIF_MSG_PROBE | 70 NETIF_MSG_LINK | NETIF_MSG_TIMER | NETIF_MSG_IFDOWN | NETIF_MSG_IFUP; 71 static void atl1c_pcie_patch(struct atl1c_hw *hw) 72 { 73 u32 mst_data, data; 74 75 /* pclk sel could switch to 25M */ 76 AT_READ_REG(hw, REG_MASTER_CTRL, &mst_data); 77 mst_data &= ~MASTER_CTRL_CLK_SEL_DIS; 78 AT_WRITE_REG(hw, REG_MASTER_CTRL, mst_data); 79 80 /* WoL/PCIE related settings */ 81 if (hw->nic_type == athr_l1c || hw->nic_type == athr_l2c) { 82 AT_READ_REG(hw, REG_PCIE_PHYMISC, &data); 83 data |= PCIE_PHYMISC_FORCE_RCV_DET; 84 AT_WRITE_REG(hw, REG_PCIE_PHYMISC, data); 85 } else { /* new dev set bit5 of MASTER */ 86 if (!(mst_data & MASTER_CTRL_WAKEN_25M)) 87 AT_WRITE_REG(hw, REG_MASTER_CTRL, 88 mst_data | MASTER_CTRL_WAKEN_25M); 89 } 90 /* aspm/PCIE setting only for l2cb 1.0 */ 91 if (hw->nic_type == athr_l2c_b && hw->revision_id == L2CB_V10) { 92 AT_READ_REG(hw, REG_PCIE_PHYMISC2, &data); 93 data = FIELD_SETX(data, PCIE_PHYMISC2_CDR_BW, 94 L2CB1_PCIE_PHYMISC2_CDR_BW); 95 data = FIELD_SETX(data, PCIE_PHYMISC2_L0S_TH, 96 L2CB1_PCIE_PHYMISC2_L0S_TH); 97 AT_WRITE_REG(hw, REG_PCIE_PHYMISC2, data); 98 /* extend L1 sync timer */ 99 AT_READ_REG(hw, REG_LINK_CTRL, &data); 100 data |= LINK_CTRL_EXT_SYNC; 101 AT_WRITE_REG(hw, REG_LINK_CTRL, data); 102 } 103 /* l2cb 1.x & l1d 1.x */ 104 if (hw->nic_type == athr_l2c_b || hw->nic_type == athr_l1d) { 105 AT_READ_REG(hw, REG_PM_CTRL, &data); 106 data |= PM_CTRL_L0S_BUFSRX_EN; 107 AT_WRITE_REG(hw, REG_PM_CTRL, data); 108 /* clear vendor msg */ 109 AT_READ_REG(hw, REG_DMA_DBG, &data); 110 AT_WRITE_REG(hw, REG_DMA_DBG, data & ~DMA_DBG_VENDOR_MSG); 111 } 112 } 113 114 /* FIXME: no need any more ? */ 115 /* 116 * atl1c_init_pcie - init PCIE module 117 */ 118 static void atl1c_reset_pcie(struct atl1c_hw *hw, u32 flag) 119 { 120 u32 data; 121 u32 pci_cmd; 122 struct pci_dev *pdev = hw->adapter->pdev; 123 int pos; 124 125 AT_READ_REG(hw, PCI_COMMAND, &pci_cmd); 126 pci_cmd &= ~PCI_COMMAND_INTX_DISABLE; 127 pci_cmd |= (PCI_COMMAND_MEMORY | PCI_COMMAND_MASTER | 128 PCI_COMMAND_IO); 129 AT_WRITE_REG(hw, PCI_COMMAND, pci_cmd); 130 131 /* 132 * Clear any PowerSaveing Settings 133 */ 134 pci_enable_wake(pdev, PCI_D3hot, 0); 135 pci_enable_wake(pdev, PCI_D3cold, 0); 136 /* wol sts read-clear */ 137 AT_READ_REG(hw, REG_WOL_CTRL, &data); 138 AT_WRITE_REG(hw, REG_WOL_CTRL, 0); 139 140 /* 141 * Mask some pcie error bits 142 */ 143 pos = pci_find_ext_capability(pdev, PCI_EXT_CAP_ID_ERR); 144 if (pos) { 145 pci_read_config_dword(pdev, pos + PCI_ERR_UNCOR_SEVER, &data); 146 data &= ~(PCI_ERR_UNC_DLP | PCI_ERR_UNC_FCP); 147 pci_write_config_dword(pdev, pos + PCI_ERR_UNCOR_SEVER, data); 148 } 149 /* clear error status */ 150 pcie_capability_write_word(pdev, PCI_EXP_DEVSTA, 151 PCI_EXP_DEVSTA_NFED | 152 PCI_EXP_DEVSTA_FED | 153 PCI_EXP_DEVSTA_CED | 154 PCI_EXP_DEVSTA_URD); 155 156 AT_READ_REG(hw, REG_LTSSM_ID_CTRL, &data); 157 data &= ~LTSSM_ID_EN_WRO; 158 AT_WRITE_REG(hw, REG_LTSSM_ID_CTRL, data); 159 160 atl1c_pcie_patch(hw); 161 if (flag & ATL1C_PCIE_L0S_L1_DISABLE) 162 atl1c_disable_l0s_l1(hw); 163 164 msleep(5); 165 } 166 167 /** 168 * atl1c_irq_enable - Enable default interrupt generation settings 169 * @adapter: board private structure 170 */ 171 static inline void atl1c_irq_enable(struct atl1c_adapter *adapter) 172 { 173 if (likely(atomic_dec_and_test(&adapter->irq_sem))) { 174 AT_WRITE_REG(&adapter->hw, REG_ISR, 0x7FFFFFFF); 175 AT_WRITE_REG(&adapter->hw, REG_IMR, adapter->hw.intr_mask); 176 AT_WRITE_FLUSH(&adapter->hw); 177 } 178 } 179 180 /** 181 * atl1c_irq_disable - Mask off interrupt generation on the NIC 182 * @adapter: board private structure 183 */ 184 static inline void atl1c_irq_disable(struct atl1c_adapter *adapter) 185 { 186 atomic_inc(&adapter->irq_sem); 187 AT_WRITE_REG(&adapter->hw, REG_IMR, 0); 188 AT_WRITE_REG(&adapter->hw, REG_ISR, ISR_DIS_INT); 189 AT_WRITE_FLUSH(&adapter->hw); 190 synchronize_irq(adapter->pdev->irq); 191 } 192 193 /** 194 * atl1c_irq_reset - reset interrupt confiure on the NIC 195 * @adapter: board private structure 196 */ 197 static inline void atl1c_irq_reset(struct atl1c_adapter *adapter) 198 { 199 atomic_set(&adapter->irq_sem, 1); 200 atl1c_irq_enable(adapter); 201 } 202 203 /* 204 * atl1c_wait_until_idle - wait up to AT_HW_MAX_IDLE_DELAY reads 205 * of the idle status register until the device is actually idle 206 */ 207 static u32 atl1c_wait_until_idle(struct atl1c_hw *hw, u32 modu_ctrl) 208 { 209 int timeout; 210 u32 data; 211 212 for (timeout = 0; timeout < AT_HW_MAX_IDLE_DELAY; timeout++) { 213 AT_READ_REG(hw, REG_IDLE_STATUS, &data); 214 if ((data & modu_ctrl) == 0) 215 return 0; 216 msleep(1); 217 } 218 return data; 219 } 220 221 /** 222 * atl1c_phy_config - Timer Call-back 223 * @data: pointer to netdev cast into an unsigned long 224 */ 225 static void atl1c_phy_config(struct timer_list *t) 226 { 227 struct atl1c_adapter *adapter = from_timer(adapter, t, 228 phy_config_timer); 229 struct atl1c_hw *hw = &adapter->hw; 230 unsigned long flags; 231 232 spin_lock_irqsave(&adapter->mdio_lock, flags); 233 atl1c_restart_autoneg(hw); 234 spin_unlock_irqrestore(&adapter->mdio_lock, flags); 235 } 236 237 void atl1c_reinit_locked(struct atl1c_adapter *adapter) 238 { 239 WARN_ON(in_interrupt()); 240 atl1c_down(adapter); 241 atl1c_up(adapter); 242 clear_bit(__AT_RESETTING, &adapter->flags); 243 } 244 245 static void atl1c_check_link_status(struct atl1c_adapter *adapter) 246 { 247 struct atl1c_hw *hw = &adapter->hw; 248 struct net_device *netdev = adapter->netdev; 249 struct pci_dev *pdev = adapter->pdev; 250 int err; 251 unsigned long flags; 252 u16 speed, duplex, phy_data; 253 254 spin_lock_irqsave(&adapter->mdio_lock, flags); 255 /* MII_BMSR must read twise */ 256 atl1c_read_phy_reg(hw, MII_BMSR, &phy_data); 257 atl1c_read_phy_reg(hw, MII_BMSR, &phy_data); 258 spin_unlock_irqrestore(&adapter->mdio_lock, flags); 259 260 if ((phy_data & BMSR_LSTATUS) == 0) { 261 /* link down */ 262 netif_carrier_off(netdev); 263 hw->hibernate = true; 264 if (atl1c_reset_mac(hw) != 0) 265 if (netif_msg_hw(adapter)) 266 dev_warn(&pdev->dev, "reset mac failed\n"); 267 atl1c_set_aspm(hw, SPEED_0); 268 atl1c_post_phy_linkchg(hw, SPEED_0); 269 atl1c_reset_dma_ring(adapter); 270 atl1c_configure(adapter); 271 } else { 272 /* Link Up */ 273 hw->hibernate = false; 274 spin_lock_irqsave(&adapter->mdio_lock, flags); 275 err = atl1c_get_speed_and_duplex(hw, &speed, &duplex); 276 spin_unlock_irqrestore(&adapter->mdio_lock, flags); 277 if (unlikely(err)) 278 return; 279 /* link result is our setting */ 280 if (adapter->link_speed != speed || 281 adapter->link_duplex != duplex) { 282 adapter->link_speed = speed; 283 adapter->link_duplex = duplex; 284 atl1c_set_aspm(hw, speed); 285 atl1c_post_phy_linkchg(hw, speed); 286 atl1c_start_mac(adapter); 287 if (netif_msg_link(adapter)) 288 dev_info(&pdev->dev, 289 "%s: %s NIC Link is Up<%d Mbps %s>\n", 290 atl1c_driver_name, netdev->name, 291 adapter->link_speed, 292 adapter->link_duplex == FULL_DUPLEX ? 293 "Full Duplex" : "Half Duplex"); 294 } 295 if (!netif_carrier_ok(netdev)) 296 netif_carrier_on(netdev); 297 } 298 } 299 300 static void atl1c_link_chg_event(struct atl1c_adapter *adapter) 301 { 302 struct net_device *netdev = adapter->netdev; 303 struct pci_dev *pdev = adapter->pdev; 304 u16 phy_data; 305 u16 link_up; 306 307 spin_lock(&adapter->mdio_lock); 308 atl1c_read_phy_reg(&adapter->hw, MII_BMSR, &phy_data); 309 atl1c_read_phy_reg(&adapter->hw, MII_BMSR, &phy_data); 310 spin_unlock(&adapter->mdio_lock); 311 link_up = phy_data & BMSR_LSTATUS; 312 /* notify upper layer link down ASAP */ 313 if (!link_up) { 314 if (netif_carrier_ok(netdev)) { 315 /* old link state: Up */ 316 netif_carrier_off(netdev); 317 if (netif_msg_link(adapter)) 318 dev_info(&pdev->dev, 319 "%s: %s NIC Link is Down\n", 320 atl1c_driver_name, netdev->name); 321 adapter->link_speed = SPEED_0; 322 } 323 } 324 325 set_bit(ATL1C_WORK_EVENT_LINK_CHANGE, &adapter->work_event); 326 schedule_work(&adapter->common_task); 327 } 328 329 static void atl1c_common_task(struct work_struct *work) 330 { 331 struct atl1c_adapter *adapter; 332 struct net_device *netdev; 333 334 adapter = container_of(work, struct atl1c_adapter, common_task); 335 netdev = adapter->netdev; 336 337 if (test_bit(__AT_DOWN, &adapter->flags)) 338 return; 339 340 if (test_and_clear_bit(ATL1C_WORK_EVENT_RESET, &adapter->work_event)) { 341 netif_device_detach(netdev); 342 atl1c_down(adapter); 343 atl1c_up(adapter); 344 netif_device_attach(netdev); 345 } 346 347 if (test_and_clear_bit(ATL1C_WORK_EVENT_LINK_CHANGE, 348 &adapter->work_event)) { 349 atl1c_irq_disable(adapter); 350 atl1c_check_link_status(adapter); 351 atl1c_irq_enable(adapter); 352 } 353 } 354 355 356 static void atl1c_del_timer(struct atl1c_adapter *adapter) 357 { 358 del_timer_sync(&adapter->phy_config_timer); 359 } 360 361 362 /** 363 * atl1c_tx_timeout - Respond to a Tx Hang 364 * @netdev: network interface device structure 365 */ 366 static void atl1c_tx_timeout(struct net_device *netdev) 367 { 368 struct atl1c_adapter *adapter = netdev_priv(netdev); 369 370 /* Do the reset outside of interrupt context */ 371 set_bit(ATL1C_WORK_EVENT_RESET, &adapter->work_event); 372 schedule_work(&adapter->common_task); 373 } 374 375 /** 376 * atl1c_set_multi - Multicast and Promiscuous mode set 377 * @netdev: network interface device structure 378 * 379 * The set_multi entry point is called whenever the multicast address 380 * list or the network interface flags are updated. This routine is 381 * responsible for configuring the hardware for proper multicast, 382 * promiscuous mode, and all-multi behavior. 383 */ 384 static void atl1c_set_multi(struct net_device *netdev) 385 { 386 struct atl1c_adapter *adapter = netdev_priv(netdev); 387 struct atl1c_hw *hw = &adapter->hw; 388 struct netdev_hw_addr *ha; 389 u32 mac_ctrl_data; 390 u32 hash_value; 391 392 /* Check for Promiscuous and All Multicast modes */ 393 AT_READ_REG(hw, REG_MAC_CTRL, &mac_ctrl_data); 394 395 if (netdev->flags & IFF_PROMISC) { 396 mac_ctrl_data |= MAC_CTRL_PROMIS_EN; 397 } else if (netdev->flags & IFF_ALLMULTI) { 398 mac_ctrl_data |= MAC_CTRL_MC_ALL_EN; 399 mac_ctrl_data &= ~MAC_CTRL_PROMIS_EN; 400 } else { 401 mac_ctrl_data &= ~(MAC_CTRL_PROMIS_EN | MAC_CTRL_MC_ALL_EN); 402 } 403 404 AT_WRITE_REG(hw, REG_MAC_CTRL, mac_ctrl_data); 405 406 /* clear the old settings from the multicast hash table */ 407 AT_WRITE_REG(hw, REG_RX_HASH_TABLE, 0); 408 AT_WRITE_REG_ARRAY(hw, REG_RX_HASH_TABLE, 1, 0); 409 410 /* comoute mc addresses' hash value ,and put it into hash table */ 411 netdev_for_each_mc_addr(ha, netdev) { 412 hash_value = atl1c_hash_mc_addr(hw, ha->addr); 413 atl1c_hash_set(hw, hash_value); 414 } 415 } 416 417 static void __atl1c_vlan_mode(netdev_features_t features, u32 *mac_ctrl_data) 418 { 419 if (features & NETIF_F_HW_VLAN_CTAG_RX) { 420 /* enable VLAN tag insert/strip */ 421 *mac_ctrl_data |= MAC_CTRL_RMV_VLAN; 422 } else { 423 /* disable VLAN tag insert/strip */ 424 *mac_ctrl_data &= ~MAC_CTRL_RMV_VLAN; 425 } 426 } 427 428 static void atl1c_vlan_mode(struct net_device *netdev, 429 netdev_features_t features) 430 { 431 struct atl1c_adapter *adapter = netdev_priv(netdev); 432 struct pci_dev *pdev = adapter->pdev; 433 u32 mac_ctrl_data = 0; 434 435 if (netif_msg_pktdata(adapter)) 436 dev_dbg(&pdev->dev, "atl1c_vlan_mode\n"); 437 438 atl1c_irq_disable(adapter); 439 AT_READ_REG(&adapter->hw, REG_MAC_CTRL, &mac_ctrl_data); 440 __atl1c_vlan_mode(features, &mac_ctrl_data); 441 AT_WRITE_REG(&adapter->hw, REG_MAC_CTRL, mac_ctrl_data); 442 atl1c_irq_enable(adapter); 443 } 444 445 static void atl1c_restore_vlan(struct atl1c_adapter *adapter) 446 { 447 struct pci_dev *pdev = adapter->pdev; 448 449 if (netif_msg_pktdata(adapter)) 450 dev_dbg(&pdev->dev, "atl1c_restore_vlan\n"); 451 atl1c_vlan_mode(adapter->netdev, adapter->netdev->features); 452 } 453 454 /** 455 * atl1c_set_mac - Change the Ethernet Address of the NIC 456 * @netdev: network interface device structure 457 * @p: pointer to an address structure 458 * 459 * Returns 0 on success, negative on failure 460 */ 461 static int atl1c_set_mac_addr(struct net_device *netdev, void *p) 462 { 463 struct atl1c_adapter *adapter = netdev_priv(netdev); 464 struct sockaddr *addr = p; 465 466 if (!is_valid_ether_addr(addr->sa_data)) 467 return -EADDRNOTAVAIL; 468 469 if (netif_running(netdev)) 470 return -EBUSY; 471 472 memcpy(netdev->dev_addr, addr->sa_data, netdev->addr_len); 473 memcpy(adapter->hw.mac_addr, addr->sa_data, netdev->addr_len); 474 475 atl1c_hw_set_mac_addr(&adapter->hw, adapter->hw.mac_addr); 476 477 return 0; 478 } 479 480 static void atl1c_set_rxbufsize(struct atl1c_adapter *adapter, 481 struct net_device *dev) 482 { 483 unsigned int head_size; 484 int mtu = dev->mtu; 485 486 adapter->rx_buffer_len = mtu > AT_RX_BUF_SIZE ? 487 roundup(mtu + ETH_HLEN + ETH_FCS_LEN + VLAN_HLEN, 8) : AT_RX_BUF_SIZE; 488 489 head_size = SKB_DATA_ALIGN(adapter->rx_buffer_len + NET_SKB_PAD) + 490 SKB_DATA_ALIGN(sizeof(struct skb_shared_info)); 491 adapter->rx_frag_size = roundup_pow_of_two(head_size); 492 } 493 494 static netdev_features_t atl1c_fix_features(struct net_device *netdev, 495 netdev_features_t features) 496 { 497 /* 498 * Since there is no support for separate rx/tx vlan accel 499 * enable/disable make sure tx flag is always in same state as rx. 500 */ 501 if (features & NETIF_F_HW_VLAN_CTAG_RX) 502 features |= NETIF_F_HW_VLAN_CTAG_TX; 503 else 504 features &= ~NETIF_F_HW_VLAN_CTAG_TX; 505 506 if (netdev->mtu > MAX_TSO_FRAME_SIZE) 507 features &= ~(NETIF_F_TSO | NETIF_F_TSO6); 508 509 return features; 510 } 511 512 static int atl1c_set_features(struct net_device *netdev, 513 netdev_features_t features) 514 { 515 netdev_features_t changed = netdev->features ^ features; 516 517 if (changed & NETIF_F_HW_VLAN_CTAG_RX) 518 atl1c_vlan_mode(netdev, features); 519 520 return 0; 521 } 522 523 static void atl1c_set_max_mtu(struct net_device *netdev) 524 { 525 struct atl1c_adapter *adapter = netdev_priv(netdev); 526 struct atl1c_hw *hw = &adapter->hw; 527 528 switch (hw->nic_type) { 529 /* These (GbE) devices support jumbo packets, max_mtu 6122 */ 530 case athr_l1c: 531 case athr_l1d: 532 case athr_l1d_2: 533 netdev->max_mtu = MAX_JUMBO_FRAME_SIZE - 534 (ETH_HLEN + ETH_FCS_LEN + VLAN_HLEN); 535 break; 536 /* The 10/100 devices don't support jumbo packets, max_mtu 1500 */ 537 default: 538 netdev->max_mtu = ETH_DATA_LEN; 539 break; 540 } 541 } 542 543 /** 544 * atl1c_change_mtu - Change the Maximum Transfer Unit 545 * @netdev: network interface device structure 546 * @new_mtu: new value for maximum frame size 547 * 548 * Returns 0 on success, negative on failure 549 */ 550 static int atl1c_change_mtu(struct net_device *netdev, int new_mtu) 551 { 552 struct atl1c_adapter *adapter = netdev_priv(netdev); 553 554 /* set MTU */ 555 if (netif_running(netdev)) { 556 while (test_and_set_bit(__AT_RESETTING, &adapter->flags)) 557 msleep(1); 558 netdev->mtu = new_mtu; 559 adapter->hw.max_frame_size = new_mtu; 560 atl1c_set_rxbufsize(adapter, netdev); 561 atl1c_down(adapter); 562 netdev_update_features(netdev); 563 atl1c_up(adapter); 564 clear_bit(__AT_RESETTING, &adapter->flags); 565 } 566 return 0; 567 } 568 569 /* 570 * caller should hold mdio_lock 571 */ 572 static int atl1c_mdio_read(struct net_device *netdev, int phy_id, int reg_num) 573 { 574 struct atl1c_adapter *adapter = netdev_priv(netdev); 575 u16 result; 576 577 atl1c_read_phy_reg(&adapter->hw, reg_num, &result); 578 return result; 579 } 580 581 static void atl1c_mdio_write(struct net_device *netdev, int phy_id, 582 int reg_num, int val) 583 { 584 struct atl1c_adapter *adapter = netdev_priv(netdev); 585 586 atl1c_write_phy_reg(&adapter->hw, reg_num, val); 587 } 588 589 static int atl1c_mii_ioctl(struct net_device *netdev, 590 struct ifreq *ifr, int cmd) 591 { 592 struct atl1c_adapter *adapter = netdev_priv(netdev); 593 struct pci_dev *pdev = adapter->pdev; 594 struct mii_ioctl_data *data = if_mii(ifr); 595 unsigned long flags; 596 int retval = 0; 597 598 if (!netif_running(netdev)) 599 return -EINVAL; 600 601 spin_lock_irqsave(&adapter->mdio_lock, flags); 602 switch (cmd) { 603 case SIOCGMIIPHY: 604 data->phy_id = 0; 605 break; 606 607 case SIOCGMIIREG: 608 if (atl1c_read_phy_reg(&adapter->hw, data->reg_num & 0x1F, 609 &data->val_out)) { 610 retval = -EIO; 611 goto out; 612 } 613 break; 614 615 case SIOCSMIIREG: 616 if (data->reg_num & ~(0x1F)) { 617 retval = -EFAULT; 618 goto out; 619 } 620 621 dev_dbg(&pdev->dev, "<atl1c_mii_ioctl> write %x %x", 622 data->reg_num, data->val_in); 623 if (atl1c_write_phy_reg(&adapter->hw, 624 data->reg_num, data->val_in)) { 625 retval = -EIO; 626 goto out; 627 } 628 break; 629 630 default: 631 retval = -EOPNOTSUPP; 632 break; 633 } 634 out: 635 spin_unlock_irqrestore(&adapter->mdio_lock, flags); 636 return retval; 637 } 638 639 static int atl1c_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd) 640 { 641 switch (cmd) { 642 case SIOCGMIIPHY: 643 case SIOCGMIIREG: 644 case SIOCSMIIREG: 645 return atl1c_mii_ioctl(netdev, ifr, cmd); 646 default: 647 return -EOPNOTSUPP; 648 } 649 } 650 651 /** 652 * atl1c_alloc_queues - Allocate memory for all rings 653 * @adapter: board private structure to initialize 654 * 655 */ 656 static int atl1c_alloc_queues(struct atl1c_adapter *adapter) 657 { 658 return 0; 659 } 660 661 static void atl1c_set_mac_type(struct atl1c_hw *hw) 662 { 663 switch (hw->device_id) { 664 case PCI_DEVICE_ID_ATTANSIC_L2C: 665 hw->nic_type = athr_l2c; 666 break; 667 case PCI_DEVICE_ID_ATTANSIC_L1C: 668 hw->nic_type = athr_l1c; 669 break; 670 case PCI_DEVICE_ID_ATHEROS_L2C_B: 671 hw->nic_type = athr_l2c_b; 672 break; 673 case PCI_DEVICE_ID_ATHEROS_L2C_B2: 674 hw->nic_type = athr_l2c_b2; 675 break; 676 case PCI_DEVICE_ID_ATHEROS_L1D: 677 hw->nic_type = athr_l1d; 678 break; 679 case PCI_DEVICE_ID_ATHEROS_L1D_2_0: 680 hw->nic_type = athr_l1d_2; 681 break; 682 default: 683 break; 684 } 685 } 686 687 static int atl1c_setup_mac_funcs(struct atl1c_hw *hw) 688 { 689 u32 link_ctrl_data; 690 691 atl1c_set_mac_type(hw); 692 AT_READ_REG(hw, REG_LINK_CTRL, &link_ctrl_data); 693 694 hw->ctrl_flags = ATL1C_INTR_MODRT_ENABLE | 695 ATL1C_TXQ_MODE_ENHANCE; 696 hw->ctrl_flags |= ATL1C_ASPM_L0S_SUPPORT | 697 ATL1C_ASPM_L1_SUPPORT; 698 hw->ctrl_flags |= ATL1C_ASPM_CTRL_MON; 699 700 if (hw->nic_type == athr_l1c || 701 hw->nic_type == athr_l1d || 702 hw->nic_type == athr_l1d_2) 703 hw->link_cap_flags |= ATL1C_LINK_CAP_1000M; 704 return 0; 705 } 706 707 struct atl1c_platform_patch { 708 u16 pci_did; 709 u8 pci_revid; 710 u16 subsystem_vid; 711 u16 subsystem_did; 712 u32 patch_flag; 713 #define ATL1C_LINK_PATCH 0x1 714 }; 715 static const struct atl1c_platform_patch plats[] = { 716 {0x2060, 0xC1, 0x1019, 0x8152, 0x1}, 717 {0x2060, 0xC1, 0x1019, 0x2060, 0x1}, 718 {0x2060, 0xC1, 0x1019, 0xE000, 0x1}, 719 {0x2062, 0xC0, 0x1019, 0x8152, 0x1}, 720 {0x2062, 0xC0, 0x1019, 0x2062, 0x1}, 721 {0x2062, 0xC0, 0x1458, 0xE000, 0x1}, 722 {0x2062, 0xC1, 0x1019, 0x8152, 0x1}, 723 {0x2062, 0xC1, 0x1019, 0x2062, 0x1}, 724 {0x2062, 0xC1, 0x1458, 0xE000, 0x1}, 725 {0x2062, 0xC1, 0x1565, 0x2802, 0x1}, 726 {0x2062, 0xC1, 0x1565, 0x2801, 0x1}, 727 {0x1073, 0xC0, 0x1019, 0x8151, 0x1}, 728 {0x1073, 0xC0, 0x1019, 0x1073, 0x1}, 729 {0x1073, 0xC0, 0x1458, 0xE000, 0x1}, 730 {0x1083, 0xC0, 0x1458, 0xE000, 0x1}, 731 {0x1083, 0xC0, 0x1019, 0x8151, 0x1}, 732 {0x1083, 0xC0, 0x1019, 0x1083, 0x1}, 733 {0x1083, 0xC0, 0x1462, 0x7680, 0x1}, 734 {0x1083, 0xC0, 0x1565, 0x2803, 0x1}, 735 {0}, 736 }; 737 738 static void atl1c_patch_assign(struct atl1c_hw *hw) 739 { 740 struct pci_dev *pdev = hw->adapter->pdev; 741 u32 misc_ctrl; 742 int i = 0; 743 744 hw->msi_lnkpatch = false; 745 746 while (plats[i].pci_did != 0) { 747 if (plats[i].pci_did == hw->device_id && 748 plats[i].pci_revid == hw->revision_id && 749 plats[i].subsystem_vid == hw->subsystem_vendor_id && 750 plats[i].subsystem_did == hw->subsystem_id) { 751 if (plats[i].patch_flag & ATL1C_LINK_PATCH) 752 hw->msi_lnkpatch = true; 753 } 754 i++; 755 } 756 757 if (hw->device_id == PCI_DEVICE_ID_ATHEROS_L2C_B2 && 758 hw->revision_id == L2CB_V21) { 759 /* config access mode */ 760 pci_write_config_dword(pdev, REG_PCIE_IND_ACC_ADDR, 761 REG_PCIE_DEV_MISC_CTRL); 762 pci_read_config_dword(pdev, REG_PCIE_IND_ACC_DATA, &misc_ctrl); 763 misc_ctrl &= ~0x100; 764 pci_write_config_dword(pdev, REG_PCIE_IND_ACC_ADDR, 765 REG_PCIE_DEV_MISC_CTRL); 766 pci_write_config_dword(pdev, REG_PCIE_IND_ACC_DATA, misc_ctrl); 767 } 768 } 769 /** 770 * atl1c_sw_init - Initialize general software structures (struct atl1c_adapter) 771 * @adapter: board private structure to initialize 772 * 773 * atl1c_sw_init initializes the Adapter private data structure. 774 * Fields are initialized based on PCI device information and 775 * OS network device settings (MTU size). 776 */ 777 static int atl1c_sw_init(struct atl1c_adapter *adapter) 778 { 779 struct atl1c_hw *hw = &adapter->hw; 780 struct pci_dev *pdev = adapter->pdev; 781 u32 revision; 782 783 784 adapter->wol = 0; 785 device_set_wakeup_enable(&pdev->dev, false); 786 adapter->link_speed = SPEED_0; 787 adapter->link_duplex = FULL_DUPLEX; 788 adapter->tpd_ring[0].count = 1024; 789 adapter->rfd_ring.count = 512; 790 791 hw->vendor_id = pdev->vendor; 792 hw->device_id = pdev->device; 793 hw->subsystem_vendor_id = pdev->subsystem_vendor; 794 hw->subsystem_id = pdev->subsystem_device; 795 pci_read_config_dword(pdev, PCI_CLASS_REVISION, &revision); 796 hw->revision_id = revision & 0xFF; 797 /* before link up, we assume hibernate is true */ 798 hw->hibernate = true; 799 hw->media_type = MEDIA_TYPE_AUTO_SENSOR; 800 if (atl1c_setup_mac_funcs(hw) != 0) { 801 dev_err(&pdev->dev, "set mac function pointers failed\n"); 802 return -1; 803 } 804 atl1c_patch_assign(hw); 805 806 hw->intr_mask = IMR_NORMAL_MASK; 807 hw->phy_configured = false; 808 hw->preamble_len = 7; 809 hw->max_frame_size = adapter->netdev->mtu; 810 hw->autoneg_advertised = ADVERTISED_Autoneg; 811 hw->indirect_tab = 0xE4E4E4E4; 812 hw->base_cpu = 0; 813 814 hw->ict = 50000; /* 100ms */ 815 hw->smb_timer = 200000; /* 400ms */ 816 hw->rx_imt = 200; 817 hw->tx_imt = 1000; 818 819 hw->tpd_burst = 5; 820 hw->rfd_burst = 8; 821 hw->dma_order = atl1c_dma_ord_out; 822 hw->dmar_block = atl1c_dma_req_1024; 823 824 if (atl1c_alloc_queues(adapter)) { 825 dev_err(&pdev->dev, "Unable to allocate memory for queues\n"); 826 return -ENOMEM; 827 } 828 /* TODO */ 829 atl1c_set_rxbufsize(adapter, adapter->netdev); 830 atomic_set(&adapter->irq_sem, 1); 831 spin_lock_init(&adapter->mdio_lock); 832 set_bit(__AT_DOWN, &adapter->flags); 833 834 return 0; 835 } 836 837 static inline void atl1c_clean_buffer(struct pci_dev *pdev, 838 struct atl1c_buffer *buffer_info) 839 { 840 u16 pci_driection; 841 if (buffer_info->flags & ATL1C_BUFFER_FREE) 842 return; 843 if (buffer_info->dma) { 844 if (buffer_info->flags & ATL1C_PCIMAP_FROMDEVICE) 845 pci_driection = PCI_DMA_FROMDEVICE; 846 else 847 pci_driection = PCI_DMA_TODEVICE; 848 849 if (buffer_info->flags & ATL1C_PCIMAP_SINGLE) 850 pci_unmap_single(pdev, buffer_info->dma, 851 buffer_info->length, pci_driection); 852 else if (buffer_info->flags & ATL1C_PCIMAP_PAGE) 853 pci_unmap_page(pdev, buffer_info->dma, 854 buffer_info->length, pci_driection); 855 } 856 if (buffer_info->skb) 857 dev_consume_skb_any(buffer_info->skb); 858 buffer_info->dma = 0; 859 buffer_info->skb = NULL; 860 ATL1C_SET_BUFFER_STATE(buffer_info, ATL1C_BUFFER_FREE); 861 } 862 /** 863 * atl1c_clean_tx_ring - Free Tx-skb 864 * @adapter: board private structure 865 */ 866 static void atl1c_clean_tx_ring(struct atl1c_adapter *adapter, 867 enum atl1c_trans_queue type) 868 { 869 struct atl1c_tpd_ring *tpd_ring = &adapter->tpd_ring[type]; 870 struct atl1c_buffer *buffer_info; 871 struct pci_dev *pdev = adapter->pdev; 872 u16 index, ring_count; 873 874 ring_count = tpd_ring->count; 875 for (index = 0; index < ring_count; index++) { 876 buffer_info = &tpd_ring->buffer_info[index]; 877 atl1c_clean_buffer(pdev, buffer_info); 878 } 879 880 netdev_reset_queue(adapter->netdev); 881 882 /* Zero out Tx-buffers */ 883 memset(tpd_ring->desc, 0, sizeof(struct atl1c_tpd_desc) * 884 ring_count); 885 atomic_set(&tpd_ring->next_to_clean, 0); 886 tpd_ring->next_to_use = 0; 887 } 888 889 /** 890 * atl1c_clean_rx_ring - Free rx-reservation skbs 891 * @adapter: board private structure 892 */ 893 static void atl1c_clean_rx_ring(struct atl1c_adapter *adapter) 894 { 895 struct atl1c_rfd_ring *rfd_ring = &adapter->rfd_ring; 896 struct atl1c_rrd_ring *rrd_ring = &adapter->rrd_ring; 897 struct atl1c_buffer *buffer_info; 898 struct pci_dev *pdev = adapter->pdev; 899 int j; 900 901 for (j = 0; j < rfd_ring->count; j++) { 902 buffer_info = &rfd_ring->buffer_info[j]; 903 atl1c_clean_buffer(pdev, buffer_info); 904 } 905 /* zero out the descriptor ring */ 906 memset(rfd_ring->desc, 0, rfd_ring->size); 907 rfd_ring->next_to_clean = 0; 908 rfd_ring->next_to_use = 0; 909 rrd_ring->next_to_use = 0; 910 rrd_ring->next_to_clean = 0; 911 } 912 913 /* 914 * Read / Write Ptr Initialize: 915 */ 916 static void atl1c_init_ring_ptrs(struct atl1c_adapter *adapter) 917 { 918 struct atl1c_tpd_ring *tpd_ring = adapter->tpd_ring; 919 struct atl1c_rfd_ring *rfd_ring = &adapter->rfd_ring; 920 struct atl1c_rrd_ring *rrd_ring = &adapter->rrd_ring; 921 struct atl1c_buffer *buffer_info; 922 int i, j; 923 924 for (i = 0; i < AT_MAX_TRANSMIT_QUEUE; i++) { 925 tpd_ring[i].next_to_use = 0; 926 atomic_set(&tpd_ring[i].next_to_clean, 0); 927 buffer_info = tpd_ring[i].buffer_info; 928 for (j = 0; j < tpd_ring->count; j++) 929 ATL1C_SET_BUFFER_STATE(&buffer_info[i], 930 ATL1C_BUFFER_FREE); 931 } 932 rfd_ring->next_to_use = 0; 933 rfd_ring->next_to_clean = 0; 934 rrd_ring->next_to_use = 0; 935 rrd_ring->next_to_clean = 0; 936 for (j = 0; j < rfd_ring->count; j++) { 937 buffer_info = &rfd_ring->buffer_info[j]; 938 ATL1C_SET_BUFFER_STATE(buffer_info, ATL1C_BUFFER_FREE); 939 } 940 } 941 942 /** 943 * atl1c_free_ring_resources - Free Tx / RX descriptor Resources 944 * @adapter: board private structure 945 * 946 * Free all transmit software resources 947 */ 948 static void atl1c_free_ring_resources(struct atl1c_adapter *adapter) 949 { 950 struct pci_dev *pdev = adapter->pdev; 951 952 pci_free_consistent(pdev, adapter->ring_header.size, 953 adapter->ring_header.desc, 954 adapter->ring_header.dma); 955 adapter->ring_header.desc = NULL; 956 957 /* Note: just free tdp_ring.buffer_info, 958 * it contain rfd_ring.buffer_info, do not double free */ 959 if (adapter->tpd_ring[0].buffer_info) { 960 kfree(adapter->tpd_ring[0].buffer_info); 961 adapter->tpd_ring[0].buffer_info = NULL; 962 } 963 if (adapter->rx_page) { 964 put_page(adapter->rx_page); 965 adapter->rx_page = NULL; 966 } 967 } 968 969 /** 970 * atl1c_setup_mem_resources - allocate Tx / RX descriptor resources 971 * @adapter: board private structure 972 * 973 * Return 0 on success, negative on failure 974 */ 975 static int atl1c_setup_ring_resources(struct atl1c_adapter *adapter) 976 { 977 struct pci_dev *pdev = adapter->pdev; 978 struct atl1c_tpd_ring *tpd_ring = adapter->tpd_ring; 979 struct atl1c_rfd_ring *rfd_ring = &adapter->rfd_ring; 980 struct atl1c_rrd_ring *rrd_ring = &adapter->rrd_ring; 981 struct atl1c_ring_header *ring_header = &adapter->ring_header; 982 int size; 983 int i; 984 int count = 0; 985 int rx_desc_count = 0; 986 u32 offset = 0; 987 988 rrd_ring->count = rfd_ring->count; 989 for (i = 1; i < AT_MAX_TRANSMIT_QUEUE; i++) 990 tpd_ring[i].count = tpd_ring[0].count; 991 992 /* 2 tpd queue, one high priority queue, 993 * another normal priority queue */ 994 size = sizeof(struct atl1c_buffer) * (tpd_ring->count * 2 + 995 rfd_ring->count); 996 tpd_ring->buffer_info = kzalloc(size, GFP_KERNEL); 997 if (unlikely(!tpd_ring->buffer_info)) 998 goto err_nomem; 999 1000 for (i = 0; i < AT_MAX_TRANSMIT_QUEUE; i++) { 1001 tpd_ring[i].buffer_info = 1002 (tpd_ring->buffer_info + count); 1003 count += tpd_ring[i].count; 1004 } 1005 1006 rfd_ring->buffer_info = 1007 (tpd_ring->buffer_info + count); 1008 count += rfd_ring->count; 1009 rx_desc_count += rfd_ring->count; 1010 1011 /* 1012 * real ring DMA buffer 1013 * each ring/block may need up to 8 bytes for alignment, hence the 1014 * additional bytes tacked onto the end. 1015 */ 1016 ring_header->size = size = 1017 sizeof(struct atl1c_tpd_desc) * tpd_ring->count * 2 + 1018 sizeof(struct atl1c_rx_free_desc) * rx_desc_count + 1019 sizeof(struct atl1c_recv_ret_status) * rx_desc_count + 1020 8 * 4; 1021 1022 ring_header->desc = dma_zalloc_coherent(&pdev->dev, ring_header->size, 1023 &ring_header->dma, GFP_KERNEL); 1024 if (unlikely(!ring_header->desc)) { 1025 dev_err(&pdev->dev, "could not get memory for DMA buffer\n"); 1026 goto err_nomem; 1027 } 1028 /* init TPD ring */ 1029 1030 tpd_ring[0].dma = roundup(ring_header->dma, 8); 1031 offset = tpd_ring[0].dma - ring_header->dma; 1032 for (i = 0; i < AT_MAX_TRANSMIT_QUEUE; i++) { 1033 tpd_ring[i].dma = ring_header->dma + offset; 1034 tpd_ring[i].desc = (u8 *) ring_header->desc + offset; 1035 tpd_ring[i].size = 1036 sizeof(struct atl1c_tpd_desc) * tpd_ring[i].count; 1037 offset += roundup(tpd_ring[i].size, 8); 1038 } 1039 /* init RFD ring */ 1040 rfd_ring->dma = ring_header->dma + offset; 1041 rfd_ring->desc = (u8 *) ring_header->desc + offset; 1042 rfd_ring->size = sizeof(struct atl1c_rx_free_desc) * rfd_ring->count; 1043 offset += roundup(rfd_ring->size, 8); 1044 1045 /* init RRD ring */ 1046 rrd_ring->dma = ring_header->dma + offset; 1047 rrd_ring->desc = (u8 *) ring_header->desc + offset; 1048 rrd_ring->size = sizeof(struct atl1c_recv_ret_status) * 1049 rrd_ring->count; 1050 offset += roundup(rrd_ring->size, 8); 1051 1052 return 0; 1053 1054 err_nomem: 1055 kfree(tpd_ring->buffer_info); 1056 return -ENOMEM; 1057 } 1058 1059 static void atl1c_configure_des_ring(struct atl1c_adapter *adapter) 1060 { 1061 struct atl1c_hw *hw = &adapter->hw; 1062 struct atl1c_rfd_ring *rfd_ring = &adapter->rfd_ring; 1063 struct atl1c_rrd_ring *rrd_ring = &adapter->rrd_ring; 1064 struct atl1c_tpd_ring *tpd_ring = (struct atl1c_tpd_ring *) 1065 adapter->tpd_ring; 1066 1067 /* TPD */ 1068 AT_WRITE_REG(hw, REG_TX_BASE_ADDR_HI, 1069 (u32)((tpd_ring[atl1c_trans_normal].dma & 1070 AT_DMA_HI_ADDR_MASK) >> 32)); 1071 /* just enable normal priority TX queue */ 1072 AT_WRITE_REG(hw, REG_TPD_PRI0_ADDR_LO, 1073 (u32)(tpd_ring[atl1c_trans_normal].dma & 1074 AT_DMA_LO_ADDR_MASK)); 1075 AT_WRITE_REG(hw, REG_TPD_PRI1_ADDR_LO, 1076 (u32)(tpd_ring[atl1c_trans_high].dma & 1077 AT_DMA_LO_ADDR_MASK)); 1078 AT_WRITE_REG(hw, REG_TPD_RING_SIZE, 1079 (u32)(tpd_ring[0].count & TPD_RING_SIZE_MASK)); 1080 1081 1082 /* RFD */ 1083 AT_WRITE_REG(hw, REG_RX_BASE_ADDR_HI, 1084 (u32)((rfd_ring->dma & AT_DMA_HI_ADDR_MASK) >> 32)); 1085 AT_WRITE_REG(hw, REG_RFD0_HEAD_ADDR_LO, 1086 (u32)(rfd_ring->dma & AT_DMA_LO_ADDR_MASK)); 1087 1088 AT_WRITE_REG(hw, REG_RFD_RING_SIZE, 1089 rfd_ring->count & RFD_RING_SIZE_MASK); 1090 AT_WRITE_REG(hw, REG_RX_BUF_SIZE, 1091 adapter->rx_buffer_len & RX_BUF_SIZE_MASK); 1092 1093 /* RRD */ 1094 AT_WRITE_REG(hw, REG_RRD0_HEAD_ADDR_LO, 1095 (u32)(rrd_ring->dma & AT_DMA_LO_ADDR_MASK)); 1096 AT_WRITE_REG(hw, REG_RRD_RING_SIZE, 1097 (rrd_ring->count & RRD_RING_SIZE_MASK)); 1098 1099 if (hw->nic_type == athr_l2c_b) { 1100 AT_WRITE_REG(hw, REG_SRAM_RXF_LEN, 0x02a0L); 1101 AT_WRITE_REG(hw, REG_SRAM_TXF_LEN, 0x0100L); 1102 AT_WRITE_REG(hw, REG_SRAM_RXF_ADDR, 0x029f0000L); 1103 AT_WRITE_REG(hw, REG_SRAM_RFD0_INFO, 0x02bf02a0L); 1104 AT_WRITE_REG(hw, REG_SRAM_TXF_ADDR, 0x03bf02c0L); 1105 AT_WRITE_REG(hw, REG_SRAM_TRD_ADDR, 0x03df03c0L); 1106 AT_WRITE_REG(hw, REG_TXF_WATER_MARK, 0); /* TX watermark, to enter l1 state.*/ 1107 AT_WRITE_REG(hw, REG_RXD_DMA_CTRL, 0); /* RXD threshold.*/ 1108 } 1109 /* Load all of base address above */ 1110 AT_WRITE_REG(hw, REG_LOAD_PTR, 1); 1111 } 1112 1113 static void atl1c_configure_tx(struct atl1c_adapter *adapter) 1114 { 1115 struct atl1c_hw *hw = &adapter->hw; 1116 int max_pay_load; 1117 u16 tx_offload_thresh; 1118 u32 txq_ctrl_data; 1119 1120 tx_offload_thresh = MAX_TSO_FRAME_SIZE; 1121 AT_WRITE_REG(hw, REG_TX_TSO_OFFLOAD_THRESH, 1122 (tx_offload_thresh >> 3) & TX_TSO_OFFLOAD_THRESH_MASK); 1123 max_pay_load = pcie_get_readrq(adapter->pdev) >> 8; 1124 hw->dmar_block = min_t(u32, max_pay_load, hw->dmar_block); 1125 /* 1126 * if BIOS had changed the dam-read-max-length to an invalid value, 1127 * restore it to default value 1128 */ 1129 if (hw->dmar_block < DEVICE_CTRL_MAXRRS_MIN) { 1130 pcie_set_readrq(adapter->pdev, 128 << DEVICE_CTRL_MAXRRS_MIN); 1131 hw->dmar_block = DEVICE_CTRL_MAXRRS_MIN; 1132 } 1133 txq_ctrl_data = 1134 hw->nic_type == athr_l2c_b || hw->nic_type == athr_l2c_b2 ? 1135 L2CB_TXQ_CFGV : L1C_TXQ_CFGV; 1136 1137 AT_WRITE_REG(hw, REG_TXQ_CTRL, txq_ctrl_data); 1138 } 1139 1140 static void atl1c_configure_rx(struct atl1c_adapter *adapter) 1141 { 1142 struct atl1c_hw *hw = &adapter->hw; 1143 u32 rxq_ctrl_data; 1144 1145 rxq_ctrl_data = (hw->rfd_burst & RXQ_RFD_BURST_NUM_MASK) << 1146 RXQ_RFD_BURST_NUM_SHIFT; 1147 1148 if (hw->ctrl_flags & ATL1C_RX_IPV6_CHKSUM) 1149 rxq_ctrl_data |= IPV6_CHKSUM_CTRL_EN; 1150 1151 /* aspm for gigabit */ 1152 if (hw->nic_type != athr_l1d_2 && (hw->device_id & 1) != 0) 1153 rxq_ctrl_data = FIELD_SETX(rxq_ctrl_data, ASPM_THRUPUT_LIMIT, 1154 ASPM_THRUPUT_LIMIT_100M); 1155 1156 AT_WRITE_REG(hw, REG_RXQ_CTRL, rxq_ctrl_data); 1157 } 1158 1159 static void atl1c_configure_dma(struct atl1c_adapter *adapter) 1160 { 1161 struct atl1c_hw *hw = &adapter->hw; 1162 u32 dma_ctrl_data; 1163 1164 dma_ctrl_data = FIELDX(DMA_CTRL_RORDER_MODE, DMA_CTRL_RORDER_MODE_OUT) | 1165 DMA_CTRL_RREQ_PRI_DATA | 1166 FIELDX(DMA_CTRL_RREQ_BLEN, hw->dmar_block) | 1167 FIELDX(DMA_CTRL_WDLY_CNT, DMA_CTRL_WDLY_CNT_DEF) | 1168 FIELDX(DMA_CTRL_RDLY_CNT, DMA_CTRL_RDLY_CNT_DEF); 1169 1170 AT_WRITE_REG(hw, REG_DMA_CTRL, dma_ctrl_data); 1171 } 1172 1173 /* 1174 * Stop the mac, transmit and receive units 1175 * hw - Struct containing variables accessed by shared code 1176 * return : 0 or idle status (if error) 1177 */ 1178 static int atl1c_stop_mac(struct atl1c_hw *hw) 1179 { 1180 u32 data; 1181 1182 AT_READ_REG(hw, REG_RXQ_CTRL, &data); 1183 data &= ~RXQ_CTRL_EN; 1184 AT_WRITE_REG(hw, REG_RXQ_CTRL, data); 1185 1186 AT_READ_REG(hw, REG_TXQ_CTRL, &data); 1187 data &= ~TXQ_CTRL_EN; 1188 AT_WRITE_REG(hw, REG_TXQ_CTRL, data); 1189 1190 atl1c_wait_until_idle(hw, IDLE_STATUS_RXQ_BUSY | IDLE_STATUS_TXQ_BUSY); 1191 1192 AT_READ_REG(hw, REG_MAC_CTRL, &data); 1193 data &= ~(MAC_CTRL_TX_EN | MAC_CTRL_RX_EN); 1194 AT_WRITE_REG(hw, REG_MAC_CTRL, data); 1195 1196 return (int)atl1c_wait_until_idle(hw, 1197 IDLE_STATUS_TXMAC_BUSY | IDLE_STATUS_RXMAC_BUSY); 1198 } 1199 1200 static void atl1c_start_mac(struct atl1c_adapter *adapter) 1201 { 1202 struct atl1c_hw *hw = &adapter->hw; 1203 u32 mac, txq, rxq; 1204 1205 hw->mac_duplex = adapter->link_duplex == FULL_DUPLEX ? true : false; 1206 hw->mac_speed = adapter->link_speed == SPEED_1000 ? 1207 atl1c_mac_speed_1000 : atl1c_mac_speed_10_100; 1208 1209 AT_READ_REG(hw, REG_TXQ_CTRL, &txq); 1210 AT_READ_REG(hw, REG_RXQ_CTRL, &rxq); 1211 AT_READ_REG(hw, REG_MAC_CTRL, &mac); 1212 1213 txq |= TXQ_CTRL_EN; 1214 rxq |= RXQ_CTRL_EN; 1215 mac |= MAC_CTRL_TX_EN | MAC_CTRL_TX_FLOW | 1216 MAC_CTRL_RX_EN | MAC_CTRL_RX_FLOW | 1217 MAC_CTRL_ADD_CRC | MAC_CTRL_PAD | 1218 MAC_CTRL_BC_EN | MAC_CTRL_SINGLE_PAUSE_EN | 1219 MAC_CTRL_HASH_ALG_CRC32; 1220 if (hw->mac_duplex) 1221 mac |= MAC_CTRL_DUPLX; 1222 else 1223 mac &= ~MAC_CTRL_DUPLX; 1224 mac = FIELD_SETX(mac, MAC_CTRL_SPEED, hw->mac_speed); 1225 mac = FIELD_SETX(mac, MAC_CTRL_PRMLEN, hw->preamble_len); 1226 1227 AT_WRITE_REG(hw, REG_TXQ_CTRL, txq); 1228 AT_WRITE_REG(hw, REG_RXQ_CTRL, rxq); 1229 AT_WRITE_REG(hw, REG_MAC_CTRL, mac); 1230 } 1231 1232 /* 1233 * Reset the transmit and receive units; mask and clear all interrupts. 1234 * hw - Struct containing variables accessed by shared code 1235 * return : 0 or idle status (if error) 1236 */ 1237 static int atl1c_reset_mac(struct atl1c_hw *hw) 1238 { 1239 struct atl1c_adapter *adapter = hw->adapter; 1240 struct pci_dev *pdev = adapter->pdev; 1241 u32 ctrl_data = 0; 1242 1243 atl1c_stop_mac(hw); 1244 /* 1245 * Issue Soft Reset to the MAC. This will reset the chip's 1246 * transmit, receive, DMA. It will not effect 1247 * the current PCI configuration. The global reset bit is self- 1248 * clearing, and should clear within a microsecond. 1249 */ 1250 AT_READ_REG(hw, REG_MASTER_CTRL, &ctrl_data); 1251 ctrl_data |= MASTER_CTRL_OOB_DIS; 1252 AT_WRITE_REG(hw, REG_MASTER_CTRL, ctrl_data | MASTER_CTRL_SOFT_RST); 1253 1254 AT_WRITE_FLUSH(hw); 1255 msleep(10); 1256 /* Wait at least 10ms for All module to be Idle */ 1257 1258 if (atl1c_wait_until_idle(hw, IDLE_STATUS_MASK)) { 1259 dev_err(&pdev->dev, 1260 "MAC state machine can't be idle since" 1261 " disabled for 10ms second\n"); 1262 return -1; 1263 } 1264 AT_WRITE_REG(hw, REG_MASTER_CTRL, ctrl_data); 1265 1266 /* driver control speed/duplex */ 1267 AT_READ_REG(hw, REG_MAC_CTRL, &ctrl_data); 1268 AT_WRITE_REG(hw, REG_MAC_CTRL, ctrl_data | MAC_CTRL_SPEED_MODE_SW); 1269 1270 /* clk switch setting */ 1271 AT_READ_REG(hw, REG_SERDES, &ctrl_data); 1272 switch (hw->nic_type) { 1273 case athr_l2c_b: 1274 ctrl_data &= ~(SERDES_PHY_CLK_SLOWDOWN | 1275 SERDES_MAC_CLK_SLOWDOWN); 1276 AT_WRITE_REG(hw, REG_SERDES, ctrl_data); 1277 break; 1278 case athr_l2c_b2: 1279 case athr_l1d_2: 1280 ctrl_data |= SERDES_PHY_CLK_SLOWDOWN | SERDES_MAC_CLK_SLOWDOWN; 1281 AT_WRITE_REG(hw, REG_SERDES, ctrl_data); 1282 break; 1283 default: 1284 break; 1285 } 1286 1287 return 0; 1288 } 1289 1290 static void atl1c_disable_l0s_l1(struct atl1c_hw *hw) 1291 { 1292 u16 ctrl_flags = hw->ctrl_flags; 1293 1294 hw->ctrl_flags &= ~(ATL1C_ASPM_L0S_SUPPORT | ATL1C_ASPM_L1_SUPPORT); 1295 atl1c_set_aspm(hw, SPEED_0); 1296 hw->ctrl_flags = ctrl_flags; 1297 } 1298 1299 /* 1300 * Set ASPM state. 1301 * Enable/disable L0s/L1 depend on link state. 1302 */ 1303 static void atl1c_set_aspm(struct atl1c_hw *hw, u16 link_speed) 1304 { 1305 u32 pm_ctrl_data; 1306 u32 link_l1_timer; 1307 1308 AT_READ_REG(hw, REG_PM_CTRL, &pm_ctrl_data); 1309 pm_ctrl_data &= ~(PM_CTRL_ASPM_L1_EN | 1310 PM_CTRL_ASPM_L0S_EN | 1311 PM_CTRL_MAC_ASPM_CHK); 1312 /* L1 timer */ 1313 if (hw->nic_type == athr_l2c_b2 || hw->nic_type == athr_l1d_2) { 1314 pm_ctrl_data &= ~PMCTRL_TXL1_AFTER_L0S; 1315 link_l1_timer = 1316 link_speed == SPEED_1000 || link_speed == SPEED_100 ? 1317 L1D_PMCTRL_L1_ENTRY_TM_16US : 1; 1318 pm_ctrl_data = FIELD_SETX(pm_ctrl_data, 1319 L1D_PMCTRL_L1_ENTRY_TM, link_l1_timer); 1320 } else { 1321 link_l1_timer = hw->nic_type == athr_l2c_b ? 1322 L2CB1_PM_CTRL_L1_ENTRY_TM : L1C_PM_CTRL_L1_ENTRY_TM; 1323 if (link_speed != SPEED_1000 && link_speed != SPEED_100) 1324 link_l1_timer = 1; 1325 pm_ctrl_data = FIELD_SETX(pm_ctrl_data, 1326 PM_CTRL_L1_ENTRY_TIMER, link_l1_timer); 1327 } 1328 1329 /* L0S/L1 enable */ 1330 if ((hw->ctrl_flags & ATL1C_ASPM_L0S_SUPPORT) && link_speed != SPEED_0) 1331 pm_ctrl_data |= PM_CTRL_ASPM_L0S_EN | PM_CTRL_MAC_ASPM_CHK; 1332 if (hw->ctrl_flags & ATL1C_ASPM_L1_SUPPORT) 1333 pm_ctrl_data |= PM_CTRL_ASPM_L1_EN | PM_CTRL_MAC_ASPM_CHK; 1334 1335 /* l2cb & l1d & l2cb2 & l1d2 */ 1336 if (hw->nic_type == athr_l2c_b || hw->nic_type == athr_l1d || 1337 hw->nic_type == athr_l2c_b2 || hw->nic_type == athr_l1d_2) { 1338 pm_ctrl_data = FIELD_SETX(pm_ctrl_data, 1339 PM_CTRL_PM_REQ_TIMER, PM_CTRL_PM_REQ_TO_DEF); 1340 pm_ctrl_data |= PM_CTRL_RCVR_WT_TIMER | 1341 PM_CTRL_SERDES_PD_EX_L1 | 1342 PM_CTRL_CLK_SWH_L1; 1343 pm_ctrl_data &= ~(PM_CTRL_SERDES_L1_EN | 1344 PM_CTRL_SERDES_PLL_L1_EN | 1345 PM_CTRL_SERDES_BUFS_RX_L1_EN | 1346 PM_CTRL_SA_DLY_EN | 1347 PM_CTRL_HOTRST); 1348 /* disable l0s if link down or l2cb */ 1349 if (link_speed == SPEED_0 || hw->nic_type == athr_l2c_b) 1350 pm_ctrl_data &= ~PM_CTRL_ASPM_L0S_EN; 1351 } else { /* l1c */ 1352 pm_ctrl_data = 1353 FIELD_SETX(pm_ctrl_data, PM_CTRL_L1_ENTRY_TIMER, 0); 1354 if (link_speed != SPEED_0) { 1355 pm_ctrl_data |= PM_CTRL_SERDES_L1_EN | 1356 PM_CTRL_SERDES_PLL_L1_EN | 1357 PM_CTRL_SERDES_BUFS_RX_L1_EN; 1358 pm_ctrl_data &= ~(PM_CTRL_SERDES_PD_EX_L1 | 1359 PM_CTRL_CLK_SWH_L1 | 1360 PM_CTRL_ASPM_L0S_EN | 1361 PM_CTRL_ASPM_L1_EN); 1362 } else { /* link down */ 1363 pm_ctrl_data |= PM_CTRL_CLK_SWH_L1; 1364 pm_ctrl_data &= ~(PM_CTRL_SERDES_L1_EN | 1365 PM_CTRL_SERDES_PLL_L1_EN | 1366 PM_CTRL_SERDES_BUFS_RX_L1_EN | 1367 PM_CTRL_ASPM_L0S_EN); 1368 } 1369 } 1370 AT_WRITE_REG(hw, REG_PM_CTRL, pm_ctrl_data); 1371 1372 return; 1373 } 1374 1375 /** 1376 * atl1c_configure - Configure Transmit&Receive Unit after Reset 1377 * @adapter: board private structure 1378 * 1379 * Configure the Tx /Rx unit of the MAC after a reset. 1380 */ 1381 static int atl1c_configure_mac(struct atl1c_adapter *adapter) 1382 { 1383 struct atl1c_hw *hw = &adapter->hw; 1384 u32 master_ctrl_data = 0; 1385 u32 intr_modrt_data; 1386 u32 data; 1387 1388 AT_READ_REG(hw, REG_MASTER_CTRL, &master_ctrl_data); 1389 master_ctrl_data &= ~(MASTER_CTRL_TX_ITIMER_EN | 1390 MASTER_CTRL_RX_ITIMER_EN | 1391 MASTER_CTRL_INT_RDCLR); 1392 /* clear interrupt status */ 1393 AT_WRITE_REG(hw, REG_ISR, 0xFFFFFFFF); 1394 /* Clear any WOL status */ 1395 AT_WRITE_REG(hw, REG_WOL_CTRL, 0); 1396 /* set Interrupt Clear Timer 1397 * HW will enable self to assert interrupt event to system after 1398 * waiting x-time for software to notify it accept interrupt. 1399 */ 1400 1401 data = CLK_GATING_EN_ALL; 1402 if (hw->ctrl_flags & ATL1C_CLK_GATING_EN) { 1403 if (hw->nic_type == athr_l2c_b) 1404 data &= ~CLK_GATING_RXMAC_EN; 1405 } else 1406 data = 0; 1407 AT_WRITE_REG(hw, REG_CLK_GATING_CTRL, data); 1408 1409 AT_WRITE_REG(hw, REG_INT_RETRIG_TIMER, 1410 hw->ict & INT_RETRIG_TIMER_MASK); 1411 1412 atl1c_configure_des_ring(adapter); 1413 1414 if (hw->ctrl_flags & ATL1C_INTR_MODRT_ENABLE) { 1415 intr_modrt_data = (hw->tx_imt & IRQ_MODRT_TIMER_MASK) << 1416 IRQ_MODRT_TX_TIMER_SHIFT; 1417 intr_modrt_data |= (hw->rx_imt & IRQ_MODRT_TIMER_MASK) << 1418 IRQ_MODRT_RX_TIMER_SHIFT; 1419 AT_WRITE_REG(hw, REG_IRQ_MODRT_TIMER_INIT, intr_modrt_data); 1420 master_ctrl_data |= 1421 MASTER_CTRL_TX_ITIMER_EN | MASTER_CTRL_RX_ITIMER_EN; 1422 } 1423 1424 if (hw->ctrl_flags & ATL1C_INTR_CLEAR_ON_READ) 1425 master_ctrl_data |= MASTER_CTRL_INT_RDCLR; 1426 1427 master_ctrl_data |= MASTER_CTRL_SA_TIMER_EN; 1428 AT_WRITE_REG(hw, REG_MASTER_CTRL, master_ctrl_data); 1429 1430 AT_WRITE_REG(hw, REG_SMB_STAT_TIMER, 1431 hw->smb_timer & SMB_STAT_TIMER_MASK); 1432 1433 /* set MTU */ 1434 AT_WRITE_REG(hw, REG_MTU, hw->max_frame_size + ETH_HLEN + 1435 VLAN_HLEN + ETH_FCS_LEN); 1436 1437 atl1c_configure_tx(adapter); 1438 atl1c_configure_rx(adapter); 1439 atl1c_configure_dma(adapter); 1440 1441 return 0; 1442 } 1443 1444 static int atl1c_configure(struct atl1c_adapter *adapter) 1445 { 1446 struct net_device *netdev = adapter->netdev; 1447 int num; 1448 1449 atl1c_init_ring_ptrs(adapter); 1450 atl1c_set_multi(netdev); 1451 atl1c_restore_vlan(adapter); 1452 1453 num = atl1c_alloc_rx_buffer(adapter); 1454 if (unlikely(num == 0)) 1455 return -ENOMEM; 1456 1457 if (atl1c_configure_mac(adapter)) 1458 return -EIO; 1459 1460 return 0; 1461 } 1462 1463 static void atl1c_update_hw_stats(struct atl1c_adapter *adapter) 1464 { 1465 u16 hw_reg_addr = 0; 1466 unsigned long *stats_item = NULL; 1467 u32 data; 1468 1469 /* update rx status */ 1470 hw_reg_addr = REG_MAC_RX_STATUS_BIN; 1471 stats_item = &adapter->hw_stats.rx_ok; 1472 while (hw_reg_addr <= REG_MAC_RX_STATUS_END) { 1473 AT_READ_REG(&adapter->hw, hw_reg_addr, &data); 1474 *stats_item += data; 1475 stats_item++; 1476 hw_reg_addr += 4; 1477 } 1478 /* update tx status */ 1479 hw_reg_addr = REG_MAC_TX_STATUS_BIN; 1480 stats_item = &adapter->hw_stats.tx_ok; 1481 while (hw_reg_addr <= REG_MAC_TX_STATUS_END) { 1482 AT_READ_REG(&adapter->hw, hw_reg_addr, &data); 1483 *stats_item += data; 1484 stats_item++; 1485 hw_reg_addr += 4; 1486 } 1487 } 1488 1489 /** 1490 * atl1c_get_stats - Get System Network Statistics 1491 * @netdev: network interface device structure 1492 * 1493 * Returns the address of the device statistics structure. 1494 * The statistics are actually updated from the timer callback. 1495 */ 1496 static struct net_device_stats *atl1c_get_stats(struct net_device *netdev) 1497 { 1498 struct atl1c_adapter *adapter = netdev_priv(netdev); 1499 struct atl1c_hw_stats *hw_stats = &adapter->hw_stats; 1500 struct net_device_stats *net_stats = &netdev->stats; 1501 1502 atl1c_update_hw_stats(adapter); 1503 net_stats->rx_bytes = hw_stats->rx_byte_cnt; 1504 net_stats->tx_bytes = hw_stats->tx_byte_cnt; 1505 net_stats->multicast = hw_stats->rx_mcast; 1506 net_stats->collisions = hw_stats->tx_1_col + 1507 hw_stats->tx_2_col + 1508 hw_stats->tx_late_col + 1509 hw_stats->tx_abort_col; 1510 1511 net_stats->rx_errors = hw_stats->rx_frag + 1512 hw_stats->rx_fcs_err + 1513 hw_stats->rx_len_err + 1514 hw_stats->rx_sz_ov + 1515 hw_stats->rx_rrd_ov + 1516 hw_stats->rx_align_err + 1517 hw_stats->rx_rxf_ov; 1518 1519 net_stats->rx_fifo_errors = hw_stats->rx_rxf_ov; 1520 net_stats->rx_length_errors = hw_stats->rx_len_err; 1521 net_stats->rx_crc_errors = hw_stats->rx_fcs_err; 1522 net_stats->rx_frame_errors = hw_stats->rx_align_err; 1523 net_stats->rx_dropped = hw_stats->rx_rrd_ov; 1524 1525 net_stats->tx_errors = hw_stats->tx_late_col + 1526 hw_stats->tx_abort_col + 1527 hw_stats->tx_underrun + 1528 hw_stats->tx_trunc; 1529 1530 net_stats->tx_fifo_errors = hw_stats->tx_underrun; 1531 net_stats->tx_aborted_errors = hw_stats->tx_abort_col; 1532 net_stats->tx_window_errors = hw_stats->tx_late_col; 1533 1534 net_stats->rx_packets = hw_stats->rx_ok + net_stats->rx_errors; 1535 net_stats->tx_packets = hw_stats->tx_ok + net_stats->tx_errors; 1536 1537 return net_stats; 1538 } 1539 1540 static inline void atl1c_clear_phy_int(struct atl1c_adapter *adapter) 1541 { 1542 u16 phy_data; 1543 1544 spin_lock(&adapter->mdio_lock); 1545 atl1c_read_phy_reg(&adapter->hw, MII_ISR, &phy_data); 1546 spin_unlock(&adapter->mdio_lock); 1547 } 1548 1549 static bool atl1c_clean_tx_irq(struct atl1c_adapter *adapter, 1550 enum atl1c_trans_queue type) 1551 { 1552 struct atl1c_tpd_ring *tpd_ring = &adapter->tpd_ring[type]; 1553 struct atl1c_buffer *buffer_info; 1554 struct pci_dev *pdev = adapter->pdev; 1555 u16 next_to_clean = atomic_read(&tpd_ring->next_to_clean); 1556 u16 hw_next_to_clean; 1557 u16 reg; 1558 unsigned int total_bytes = 0, total_packets = 0; 1559 1560 reg = type == atl1c_trans_high ? REG_TPD_PRI1_CIDX : REG_TPD_PRI0_CIDX; 1561 1562 AT_READ_REGW(&adapter->hw, reg, &hw_next_to_clean); 1563 1564 while (next_to_clean != hw_next_to_clean) { 1565 buffer_info = &tpd_ring->buffer_info[next_to_clean]; 1566 if (buffer_info->skb) { 1567 total_bytes += buffer_info->skb->len; 1568 total_packets++; 1569 } 1570 atl1c_clean_buffer(pdev, buffer_info); 1571 if (++next_to_clean == tpd_ring->count) 1572 next_to_clean = 0; 1573 atomic_set(&tpd_ring->next_to_clean, next_to_clean); 1574 } 1575 1576 netdev_completed_queue(adapter->netdev, total_packets, total_bytes); 1577 1578 if (netif_queue_stopped(adapter->netdev) && 1579 netif_carrier_ok(adapter->netdev)) { 1580 netif_wake_queue(adapter->netdev); 1581 } 1582 1583 return true; 1584 } 1585 1586 /** 1587 * atl1c_intr - Interrupt Handler 1588 * @irq: interrupt number 1589 * @data: pointer to a network interface device structure 1590 */ 1591 static irqreturn_t atl1c_intr(int irq, void *data) 1592 { 1593 struct net_device *netdev = data; 1594 struct atl1c_adapter *adapter = netdev_priv(netdev); 1595 struct pci_dev *pdev = adapter->pdev; 1596 struct atl1c_hw *hw = &adapter->hw; 1597 int max_ints = AT_MAX_INT_WORK; 1598 int handled = IRQ_NONE; 1599 u32 status; 1600 u32 reg_data; 1601 1602 do { 1603 AT_READ_REG(hw, REG_ISR, ®_data); 1604 status = reg_data & hw->intr_mask; 1605 1606 if (status == 0 || (status & ISR_DIS_INT) != 0) { 1607 if (max_ints != AT_MAX_INT_WORK) 1608 handled = IRQ_HANDLED; 1609 break; 1610 } 1611 /* link event */ 1612 if (status & ISR_GPHY) 1613 atl1c_clear_phy_int(adapter); 1614 /* Ack ISR */ 1615 AT_WRITE_REG(hw, REG_ISR, status | ISR_DIS_INT); 1616 if (status & ISR_RX_PKT) { 1617 if (likely(napi_schedule_prep(&adapter->napi))) { 1618 hw->intr_mask &= ~ISR_RX_PKT; 1619 AT_WRITE_REG(hw, REG_IMR, hw->intr_mask); 1620 __napi_schedule(&adapter->napi); 1621 } 1622 } 1623 if (status & ISR_TX_PKT) 1624 atl1c_clean_tx_irq(adapter, atl1c_trans_normal); 1625 1626 handled = IRQ_HANDLED; 1627 /* check if PCIE PHY Link down */ 1628 if (status & ISR_ERROR) { 1629 if (netif_msg_hw(adapter)) 1630 dev_err(&pdev->dev, 1631 "atl1c hardware error (status = 0x%x)\n", 1632 status & ISR_ERROR); 1633 /* reset MAC */ 1634 set_bit(ATL1C_WORK_EVENT_RESET, &adapter->work_event); 1635 schedule_work(&adapter->common_task); 1636 return IRQ_HANDLED; 1637 } 1638 1639 if (status & ISR_OVER) 1640 if (netif_msg_intr(adapter)) 1641 dev_warn(&pdev->dev, 1642 "TX/RX overflow (status = 0x%x)\n", 1643 status & ISR_OVER); 1644 1645 /* link event */ 1646 if (status & (ISR_GPHY | ISR_MANUAL)) { 1647 netdev->stats.tx_carrier_errors++; 1648 atl1c_link_chg_event(adapter); 1649 break; 1650 } 1651 1652 } while (--max_ints > 0); 1653 /* re-enable Interrupt*/ 1654 AT_WRITE_REG(&adapter->hw, REG_ISR, 0); 1655 return handled; 1656 } 1657 1658 static inline void atl1c_rx_checksum(struct atl1c_adapter *adapter, 1659 struct sk_buff *skb, struct atl1c_recv_ret_status *prrs) 1660 { 1661 /* 1662 * The pid field in RRS in not correct sometimes, so we 1663 * cannot figure out if the packet is fragmented or not, 1664 * so we tell the KERNEL CHECKSUM_NONE 1665 */ 1666 skb_checksum_none_assert(skb); 1667 } 1668 1669 static struct sk_buff *atl1c_alloc_skb(struct atl1c_adapter *adapter) 1670 { 1671 struct sk_buff *skb; 1672 struct page *page; 1673 1674 if (adapter->rx_frag_size > PAGE_SIZE) 1675 return netdev_alloc_skb(adapter->netdev, 1676 adapter->rx_buffer_len); 1677 1678 page = adapter->rx_page; 1679 if (!page) { 1680 adapter->rx_page = page = alloc_page(GFP_ATOMIC); 1681 if (unlikely(!page)) 1682 return NULL; 1683 adapter->rx_page_offset = 0; 1684 } 1685 1686 skb = build_skb(page_address(page) + adapter->rx_page_offset, 1687 adapter->rx_frag_size); 1688 if (likely(skb)) { 1689 skb_reserve(skb, NET_SKB_PAD); 1690 adapter->rx_page_offset += adapter->rx_frag_size; 1691 if (adapter->rx_page_offset >= PAGE_SIZE) 1692 adapter->rx_page = NULL; 1693 else 1694 get_page(page); 1695 } 1696 return skb; 1697 } 1698 1699 static int atl1c_alloc_rx_buffer(struct atl1c_adapter *adapter) 1700 { 1701 struct atl1c_rfd_ring *rfd_ring = &adapter->rfd_ring; 1702 struct pci_dev *pdev = adapter->pdev; 1703 struct atl1c_buffer *buffer_info, *next_info; 1704 struct sk_buff *skb; 1705 void *vir_addr = NULL; 1706 u16 num_alloc = 0; 1707 u16 rfd_next_to_use, next_next; 1708 struct atl1c_rx_free_desc *rfd_desc; 1709 dma_addr_t mapping; 1710 1711 next_next = rfd_next_to_use = rfd_ring->next_to_use; 1712 if (++next_next == rfd_ring->count) 1713 next_next = 0; 1714 buffer_info = &rfd_ring->buffer_info[rfd_next_to_use]; 1715 next_info = &rfd_ring->buffer_info[next_next]; 1716 1717 while (next_info->flags & ATL1C_BUFFER_FREE) { 1718 rfd_desc = ATL1C_RFD_DESC(rfd_ring, rfd_next_to_use); 1719 1720 skb = atl1c_alloc_skb(adapter); 1721 if (unlikely(!skb)) { 1722 if (netif_msg_rx_err(adapter)) 1723 dev_warn(&pdev->dev, "alloc rx buffer failed\n"); 1724 break; 1725 } 1726 1727 /* 1728 * Make buffer alignment 2 beyond a 16 byte boundary 1729 * this will result in a 16 byte aligned IP header after 1730 * the 14 byte MAC header is removed 1731 */ 1732 vir_addr = skb->data; 1733 ATL1C_SET_BUFFER_STATE(buffer_info, ATL1C_BUFFER_BUSY); 1734 buffer_info->skb = skb; 1735 buffer_info->length = adapter->rx_buffer_len; 1736 mapping = pci_map_single(pdev, vir_addr, 1737 buffer_info->length, 1738 PCI_DMA_FROMDEVICE); 1739 if (unlikely(pci_dma_mapping_error(pdev, mapping))) { 1740 dev_kfree_skb(skb); 1741 buffer_info->skb = NULL; 1742 buffer_info->length = 0; 1743 ATL1C_SET_BUFFER_STATE(buffer_info, ATL1C_BUFFER_FREE); 1744 netif_warn(adapter, rx_err, adapter->netdev, "RX pci_map_single failed"); 1745 break; 1746 } 1747 buffer_info->dma = mapping; 1748 ATL1C_SET_PCIMAP_TYPE(buffer_info, ATL1C_PCIMAP_SINGLE, 1749 ATL1C_PCIMAP_FROMDEVICE); 1750 rfd_desc->buffer_addr = cpu_to_le64(buffer_info->dma); 1751 rfd_next_to_use = next_next; 1752 if (++next_next == rfd_ring->count) 1753 next_next = 0; 1754 buffer_info = &rfd_ring->buffer_info[rfd_next_to_use]; 1755 next_info = &rfd_ring->buffer_info[next_next]; 1756 num_alloc++; 1757 } 1758 1759 if (num_alloc) { 1760 /* TODO: update mailbox here */ 1761 wmb(); 1762 rfd_ring->next_to_use = rfd_next_to_use; 1763 AT_WRITE_REG(&adapter->hw, REG_MB_RFD0_PROD_IDX, 1764 rfd_ring->next_to_use & MB_RFDX_PROD_IDX_MASK); 1765 } 1766 1767 return num_alloc; 1768 } 1769 1770 static void atl1c_clean_rrd(struct atl1c_rrd_ring *rrd_ring, 1771 struct atl1c_recv_ret_status *rrs, u16 num) 1772 { 1773 u16 i; 1774 /* the relationship between rrd and rfd is one map one */ 1775 for (i = 0; i < num; i++, rrs = ATL1C_RRD_DESC(rrd_ring, 1776 rrd_ring->next_to_clean)) { 1777 rrs->word3 &= ~RRS_RXD_UPDATED; 1778 if (++rrd_ring->next_to_clean == rrd_ring->count) 1779 rrd_ring->next_to_clean = 0; 1780 } 1781 } 1782 1783 static void atl1c_clean_rfd(struct atl1c_rfd_ring *rfd_ring, 1784 struct atl1c_recv_ret_status *rrs, u16 num) 1785 { 1786 u16 i; 1787 u16 rfd_index; 1788 struct atl1c_buffer *buffer_info = rfd_ring->buffer_info; 1789 1790 rfd_index = (rrs->word0 >> RRS_RX_RFD_INDEX_SHIFT) & 1791 RRS_RX_RFD_INDEX_MASK; 1792 for (i = 0; i < num; i++) { 1793 buffer_info[rfd_index].skb = NULL; 1794 ATL1C_SET_BUFFER_STATE(&buffer_info[rfd_index], 1795 ATL1C_BUFFER_FREE); 1796 if (++rfd_index == rfd_ring->count) 1797 rfd_index = 0; 1798 } 1799 rfd_ring->next_to_clean = rfd_index; 1800 } 1801 1802 static void atl1c_clean_rx_irq(struct atl1c_adapter *adapter, 1803 int *work_done, int work_to_do) 1804 { 1805 u16 rfd_num, rfd_index; 1806 u16 count = 0; 1807 u16 length; 1808 struct pci_dev *pdev = adapter->pdev; 1809 struct net_device *netdev = adapter->netdev; 1810 struct atl1c_rfd_ring *rfd_ring = &adapter->rfd_ring; 1811 struct atl1c_rrd_ring *rrd_ring = &adapter->rrd_ring; 1812 struct sk_buff *skb; 1813 struct atl1c_recv_ret_status *rrs; 1814 struct atl1c_buffer *buffer_info; 1815 1816 while (1) { 1817 if (*work_done >= work_to_do) 1818 break; 1819 rrs = ATL1C_RRD_DESC(rrd_ring, rrd_ring->next_to_clean); 1820 if (likely(RRS_RXD_IS_VALID(rrs->word3))) { 1821 rfd_num = (rrs->word0 >> RRS_RX_RFD_CNT_SHIFT) & 1822 RRS_RX_RFD_CNT_MASK; 1823 if (unlikely(rfd_num != 1)) 1824 /* TODO support mul rfd*/ 1825 if (netif_msg_rx_err(adapter)) 1826 dev_warn(&pdev->dev, 1827 "Multi rfd not support yet!\n"); 1828 goto rrs_checked; 1829 } else { 1830 break; 1831 } 1832 rrs_checked: 1833 atl1c_clean_rrd(rrd_ring, rrs, rfd_num); 1834 if (rrs->word3 & (RRS_RX_ERR_SUM | RRS_802_3_LEN_ERR)) { 1835 atl1c_clean_rfd(rfd_ring, rrs, rfd_num); 1836 if (netif_msg_rx_err(adapter)) 1837 dev_warn(&pdev->dev, 1838 "wrong packet! rrs word3 is %x\n", 1839 rrs->word3); 1840 continue; 1841 } 1842 1843 length = le16_to_cpu((rrs->word3 >> RRS_PKT_SIZE_SHIFT) & 1844 RRS_PKT_SIZE_MASK); 1845 /* Good Receive */ 1846 if (likely(rfd_num == 1)) { 1847 rfd_index = (rrs->word0 >> RRS_RX_RFD_INDEX_SHIFT) & 1848 RRS_RX_RFD_INDEX_MASK; 1849 buffer_info = &rfd_ring->buffer_info[rfd_index]; 1850 pci_unmap_single(pdev, buffer_info->dma, 1851 buffer_info->length, PCI_DMA_FROMDEVICE); 1852 skb = buffer_info->skb; 1853 } else { 1854 /* TODO */ 1855 if (netif_msg_rx_err(adapter)) 1856 dev_warn(&pdev->dev, 1857 "Multi rfd not support yet!\n"); 1858 break; 1859 } 1860 atl1c_clean_rfd(rfd_ring, rrs, rfd_num); 1861 skb_put(skb, length - ETH_FCS_LEN); 1862 skb->protocol = eth_type_trans(skb, netdev); 1863 atl1c_rx_checksum(adapter, skb, rrs); 1864 if (rrs->word3 & RRS_VLAN_INS) { 1865 u16 vlan; 1866 1867 AT_TAG_TO_VLAN(rrs->vlan_tag, vlan); 1868 vlan = le16_to_cpu(vlan); 1869 __vlan_hwaccel_put_tag(skb, htons(ETH_P_8021Q), vlan); 1870 } 1871 netif_receive_skb(skb); 1872 1873 (*work_done)++; 1874 count++; 1875 } 1876 if (count) 1877 atl1c_alloc_rx_buffer(adapter); 1878 } 1879 1880 /** 1881 * atl1c_clean - NAPI Rx polling callback 1882 */ 1883 static int atl1c_clean(struct napi_struct *napi, int budget) 1884 { 1885 struct atl1c_adapter *adapter = 1886 container_of(napi, struct atl1c_adapter, napi); 1887 int work_done = 0; 1888 1889 /* Keep link state information with original netdev */ 1890 if (!netif_carrier_ok(adapter->netdev)) 1891 goto quit_polling; 1892 /* just enable one RXQ */ 1893 atl1c_clean_rx_irq(adapter, &work_done, budget); 1894 1895 if (work_done < budget) { 1896 quit_polling: 1897 napi_complete_done(napi, work_done); 1898 adapter->hw.intr_mask |= ISR_RX_PKT; 1899 AT_WRITE_REG(&adapter->hw, REG_IMR, adapter->hw.intr_mask); 1900 } 1901 return work_done; 1902 } 1903 1904 #ifdef CONFIG_NET_POLL_CONTROLLER 1905 1906 /* 1907 * Polling 'interrupt' - used by things like netconsole to send skbs 1908 * without having to re-enable interrupts. It's not called while 1909 * the interrupt routine is executing. 1910 */ 1911 static void atl1c_netpoll(struct net_device *netdev) 1912 { 1913 struct atl1c_adapter *adapter = netdev_priv(netdev); 1914 1915 disable_irq(adapter->pdev->irq); 1916 atl1c_intr(adapter->pdev->irq, netdev); 1917 enable_irq(adapter->pdev->irq); 1918 } 1919 #endif 1920 1921 static inline u16 atl1c_tpd_avail(struct atl1c_adapter *adapter, enum atl1c_trans_queue type) 1922 { 1923 struct atl1c_tpd_ring *tpd_ring = &adapter->tpd_ring[type]; 1924 u16 next_to_use = 0; 1925 u16 next_to_clean = 0; 1926 1927 next_to_clean = atomic_read(&tpd_ring->next_to_clean); 1928 next_to_use = tpd_ring->next_to_use; 1929 1930 return (u16)(next_to_clean > next_to_use) ? 1931 (next_to_clean - next_to_use - 1) : 1932 (tpd_ring->count + next_to_clean - next_to_use - 1); 1933 } 1934 1935 /* 1936 * get next usable tpd 1937 * Note: should call atl1c_tdp_avail to make sure 1938 * there is enough tpd to use 1939 */ 1940 static struct atl1c_tpd_desc *atl1c_get_tpd(struct atl1c_adapter *adapter, 1941 enum atl1c_trans_queue type) 1942 { 1943 struct atl1c_tpd_ring *tpd_ring = &adapter->tpd_ring[type]; 1944 struct atl1c_tpd_desc *tpd_desc; 1945 u16 next_to_use = 0; 1946 1947 next_to_use = tpd_ring->next_to_use; 1948 if (++tpd_ring->next_to_use == tpd_ring->count) 1949 tpd_ring->next_to_use = 0; 1950 tpd_desc = ATL1C_TPD_DESC(tpd_ring, next_to_use); 1951 memset(tpd_desc, 0, sizeof(struct atl1c_tpd_desc)); 1952 return tpd_desc; 1953 } 1954 1955 static struct atl1c_buffer * 1956 atl1c_get_tx_buffer(struct atl1c_adapter *adapter, struct atl1c_tpd_desc *tpd) 1957 { 1958 struct atl1c_tpd_ring *tpd_ring = adapter->tpd_ring; 1959 1960 return &tpd_ring->buffer_info[tpd - 1961 (struct atl1c_tpd_desc *)tpd_ring->desc]; 1962 } 1963 1964 /* Calculate the transmit packet descript needed*/ 1965 static u16 atl1c_cal_tpd_req(const struct sk_buff *skb) 1966 { 1967 u16 tpd_req; 1968 u16 proto_hdr_len = 0; 1969 1970 tpd_req = skb_shinfo(skb)->nr_frags + 1; 1971 1972 if (skb_is_gso(skb)) { 1973 proto_hdr_len = skb_transport_offset(skb) + tcp_hdrlen(skb); 1974 if (proto_hdr_len < skb_headlen(skb)) 1975 tpd_req++; 1976 if (skb_shinfo(skb)->gso_type & SKB_GSO_TCPV6) 1977 tpd_req++; 1978 } 1979 return tpd_req; 1980 } 1981 1982 static int atl1c_tso_csum(struct atl1c_adapter *adapter, 1983 struct sk_buff *skb, 1984 struct atl1c_tpd_desc **tpd, 1985 enum atl1c_trans_queue type) 1986 { 1987 struct pci_dev *pdev = adapter->pdev; 1988 unsigned short offload_type; 1989 u8 hdr_len; 1990 u32 real_len; 1991 1992 if (skb_is_gso(skb)) { 1993 int err; 1994 1995 err = skb_cow_head(skb, 0); 1996 if (err < 0) 1997 return err; 1998 1999 offload_type = skb_shinfo(skb)->gso_type; 2000 2001 if (offload_type & SKB_GSO_TCPV4) { 2002 real_len = (((unsigned char *)ip_hdr(skb) - skb->data) 2003 + ntohs(ip_hdr(skb)->tot_len)); 2004 2005 if (real_len < skb->len) 2006 pskb_trim(skb, real_len); 2007 2008 hdr_len = (skb_transport_offset(skb) + tcp_hdrlen(skb)); 2009 if (unlikely(skb->len == hdr_len)) { 2010 /* only xsum need */ 2011 if (netif_msg_tx_queued(adapter)) 2012 dev_warn(&pdev->dev, 2013 "IPV4 tso with zero data??\n"); 2014 goto check_sum; 2015 } else { 2016 ip_hdr(skb)->check = 0; 2017 tcp_hdr(skb)->check = ~csum_tcpudp_magic( 2018 ip_hdr(skb)->saddr, 2019 ip_hdr(skb)->daddr, 2020 0, IPPROTO_TCP, 0); 2021 (*tpd)->word1 |= 1 << TPD_IPV4_PACKET_SHIFT; 2022 } 2023 } 2024 2025 if (offload_type & SKB_GSO_TCPV6) { 2026 struct atl1c_tpd_ext_desc *etpd = 2027 *(struct atl1c_tpd_ext_desc **)(tpd); 2028 2029 memset(etpd, 0, sizeof(struct atl1c_tpd_ext_desc)); 2030 *tpd = atl1c_get_tpd(adapter, type); 2031 ipv6_hdr(skb)->payload_len = 0; 2032 /* check payload == 0 byte ? */ 2033 hdr_len = (skb_transport_offset(skb) + tcp_hdrlen(skb)); 2034 if (unlikely(skb->len == hdr_len)) { 2035 /* only xsum need */ 2036 if (netif_msg_tx_queued(adapter)) 2037 dev_warn(&pdev->dev, 2038 "IPV6 tso with zero data??\n"); 2039 goto check_sum; 2040 } else 2041 tcp_hdr(skb)->check = ~csum_ipv6_magic( 2042 &ipv6_hdr(skb)->saddr, 2043 &ipv6_hdr(skb)->daddr, 2044 0, IPPROTO_TCP, 0); 2045 etpd->word1 |= 1 << TPD_LSO_EN_SHIFT; 2046 etpd->word1 |= 1 << TPD_LSO_VER_SHIFT; 2047 etpd->pkt_len = cpu_to_le32(skb->len); 2048 (*tpd)->word1 |= 1 << TPD_LSO_VER_SHIFT; 2049 } 2050 2051 (*tpd)->word1 |= 1 << TPD_LSO_EN_SHIFT; 2052 (*tpd)->word1 |= (skb_transport_offset(skb) & TPD_TCPHDR_OFFSET_MASK) << 2053 TPD_TCPHDR_OFFSET_SHIFT; 2054 (*tpd)->word1 |= (skb_shinfo(skb)->gso_size & TPD_MSS_MASK) << 2055 TPD_MSS_SHIFT; 2056 return 0; 2057 } 2058 2059 check_sum: 2060 if (likely(skb->ip_summed == CHECKSUM_PARTIAL)) { 2061 u8 css, cso; 2062 cso = skb_checksum_start_offset(skb); 2063 2064 if (unlikely(cso & 0x1)) { 2065 if (netif_msg_tx_err(adapter)) 2066 dev_err(&adapter->pdev->dev, 2067 "payload offset should not an event number\n"); 2068 return -1; 2069 } else { 2070 css = cso + skb->csum_offset; 2071 2072 (*tpd)->word1 |= ((cso >> 1) & TPD_PLOADOFFSET_MASK) << 2073 TPD_PLOADOFFSET_SHIFT; 2074 (*tpd)->word1 |= ((css >> 1) & TPD_CCSUM_OFFSET_MASK) << 2075 TPD_CCSUM_OFFSET_SHIFT; 2076 (*tpd)->word1 |= 1 << TPD_CCSUM_EN_SHIFT; 2077 } 2078 } 2079 return 0; 2080 } 2081 2082 static void atl1c_tx_rollback(struct atl1c_adapter *adpt, 2083 struct atl1c_tpd_desc *first_tpd, 2084 enum atl1c_trans_queue type) 2085 { 2086 struct atl1c_tpd_ring *tpd_ring = &adpt->tpd_ring[type]; 2087 struct atl1c_buffer *buffer_info; 2088 struct atl1c_tpd_desc *tpd; 2089 u16 first_index, index; 2090 2091 first_index = first_tpd - (struct atl1c_tpd_desc *)tpd_ring->desc; 2092 index = first_index; 2093 while (index != tpd_ring->next_to_use) { 2094 tpd = ATL1C_TPD_DESC(tpd_ring, index); 2095 buffer_info = &tpd_ring->buffer_info[index]; 2096 atl1c_clean_buffer(adpt->pdev, buffer_info); 2097 memset(tpd, 0, sizeof(struct atl1c_tpd_desc)); 2098 if (++index == tpd_ring->count) 2099 index = 0; 2100 } 2101 tpd_ring->next_to_use = first_index; 2102 } 2103 2104 static int atl1c_tx_map(struct atl1c_adapter *adapter, 2105 struct sk_buff *skb, struct atl1c_tpd_desc *tpd, 2106 enum atl1c_trans_queue type) 2107 { 2108 struct atl1c_tpd_desc *use_tpd = NULL; 2109 struct atl1c_buffer *buffer_info = NULL; 2110 u16 buf_len = skb_headlen(skb); 2111 u16 map_len = 0; 2112 u16 mapped_len = 0; 2113 u16 hdr_len = 0; 2114 u16 nr_frags; 2115 u16 f; 2116 int tso; 2117 2118 nr_frags = skb_shinfo(skb)->nr_frags; 2119 tso = (tpd->word1 >> TPD_LSO_EN_SHIFT) & TPD_LSO_EN_MASK; 2120 if (tso) { 2121 /* TSO */ 2122 map_len = hdr_len = skb_transport_offset(skb) + tcp_hdrlen(skb); 2123 use_tpd = tpd; 2124 2125 buffer_info = atl1c_get_tx_buffer(adapter, use_tpd); 2126 buffer_info->length = map_len; 2127 buffer_info->dma = pci_map_single(adapter->pdev, 2128 skb->data, hdr_len, PCI_DMA_TODEVICE); 2129 if (unlikely(pci_dma_mapping_error(adapter->pdev, 2130 buffer_info->dma))) 2131 goto err_dma; 2132 ATL1C_SET_BUFFER_STATE(buffer_info, ATL1C_BUFFER_BUSY); 2133 ATL1C_SET_PCIMAP_TYPE(buffer_info, ATL1C_PCIMAP_SINGLE, 2134 ATL1C_PCIMAP_TODEVICE); 2135 mapped_len += map_len; 2136 use_tpd->buffer_addr = cpu_to_le64(buffer_info->dma); 2137 use_tpd->buffer_len = cpu_to_le16(buffer_info->length); 2138 } 2139 2140 if (mapped_len < buf_len) { 2141 /* mapped_len == 0, means we should use the first tpd, 2142 which is given by caller */ 2143 if (mapped_len == 0) 2144 use_tpd = tpd; 2145 else { 2146 use_tpd = atl1c_get_tpd(adapter, type); 2147 memcpy(use_tpd, tpd, sizeof(struct atl1c_tpd_desc)); 2148 } 2149 buffer_info = atl1c_get_tx_buffer(adapter, use_tpd); 2150 buffer_info->length = buf_len - mapped_len; 2151 buffer_info->dma = 2152 pci_map_single(adapter->pdev, skb->data + mapped_len, 2153 buffer_info->length, PCI_DMA_TODEVICE); 2154 if (unlikely(pci_dma_mapping_error(adapter->pdev, 2155 buffer_info->dma))) 2156 goto err_dma; 2157 2158 ATL1C_SET_BUFFER_STATE(buffer_info, ATL1C_BUFFER_BUSY); 2159 ATL1C_SET_PCIMAP_TYPE(buffer_info, ATL1C_PCIMAP_SINGLE, 2160 ATL1C_PCIMAP_TODEVICE); 2161 use_tpd->buffer_addr = cpu_to_le64(buffer_info->dma); 2162 use_tpd->buffer_len = cpu_to_le16(buffer_info->length); 2163 } 2164 2165 for (f = 0; f < nr_frags; f++) { 2166 struct skb_frag_struct *frag; 2167 2168 frag = &skb_shinfo(skb)->frags[f]; 2169 2170 use_tpd = atl1c_get_tpd(adapter, type); 2171 memcpy(use_tpd, tpd, sizeof(struct atl1c_tpd_desc)); 2172 2173 buffer_info = atl1c_get_tx_buffer(adapter, use_tpd); 2174 buffer_info->length = skb_frag_size(frag); 2175 buffer_info->dma = skb_frag_dma_map(&adapter->pdev->dev, 2176 frag, 0, 2177 buffer_info->length, 2178 DMA_TO_DEVICE); 2179 if (dma_mapping_error(&adapter->pdev->dev, buffer_info->dma)) 2180 goto err_dma; 2181 2182 ATL1C_SET_BUFFER_STATE(buffer_info, ATL1C_BUFFER_BUSY); 2183 ATL1C_SET_PCIMAP_TYPE(buffer_info, ATL1C_PCIMAP_PAGE, 2184 ATL1C_PCIMAP_TODEVICE); 2185 use_tpd->buffer_addr = cpu_to_le64(buffer_info->dma); 2186 use_tpd->buffer_len = cpu_to_le16(buffer_info->length); 2187 } 2188 2189 /* The last tpd */ 2190 use_tpd->word1 |= 1 << TPD_EOP_SHIFT; 2191 /* The last buffer info contain the skb address, 2192 so it will be free after unmap */ 2193 buffer_info->skb = skb; 2194 2195 return 0; 2196 2197 err_dma: 2198 buffer_info->dma = 0; 2199 buffer_info->length = 0; 2200 return -1; 2201 } 2202 2203 static void atl1c_tx_queue(struct atl1c_adapter *adapter, struct sk_buff *skb, 2204 struct atl1c_tpd_desc *tpd, enum atl1c_trans_queue type) 2205 { 2206 struct atl1c_tpd_ring *tpd_ring = &adapter->tpd_ring[type]; 2207 u16 reg; 2208 2209 reg = type == atl1c_trans_high ? REG_TPD_PRI1_PIDX : REG_TPD_PRI0_PIDX; 2210 AT_WRITE_REGW(&adapter->hw, reg, tpd_ring->next_to_use); 2211 } 2212 2213 static netdev_tx_t atl1c_xmit_frame(struct sk_buff *skb, 2214 struct net_device *netdev) 2215 { 2216 struct atl1c_adapter *adapter = netdev_priv(netdev); 2217 u16 tpd_req = 1; 2218 struct atl1c_tpd_desc *tpd; 2219 enum atl1c_trans_queue type = atl1c_trans_normal; 2220 2221 if (test_bit(__AT_DOWN, &adapter->flags)) { 2222 dev_kfree_skb_any(skb); 2223 return NETDEV_TX_OK; 2224 } 2225 2226 tpd_req = atl1c_cal_tpd_req(skb); 2227 2228 if (atl1c_tpd_avail(adapter, type) < tpd_req) { 2229 /* no enough descriptor, just stop queue */ 2230 netif_stop_queue(netdev); 2231 return NETDEV_TX_BUSY; 2232 } 2233 2234 tpd = atl1c_get_tpd(adapter, type); 2235 2236 /* do TSO and check sum */ 2237 if (atl1c_tso_csum(adapter, skb, &tpd, type) != 0) { 2238 dev_kfree_skb_any(skb); 2239 return NETDEV_TX_OK; 2240 } 2241 2242 if (unlikely(skb_vlan_tag_present(skb))) { 2243 u16 vlan = skb_vlan_tag_get(skb); 2244 __le16 tag; 2245 2246 vlan = cpu_to_le16(vlan); 2247 AT_VLAN_TO_TAG(vlan, tag); 2248 tpd->word1 |= 1 << TPD_INS_VTAG_SHIFT; 2249 tpd->vlan_tag = tag; 2250 } 2251 2252 if (skb_network_offset(skb) != ETH_HLEN) 2253 tpd->word1 |= 1 << TPD_ETH_TYPE_SHIFT; /* Ethernet frame */ 2254 2255 if (atl1c_tx_map(adapter, skb, tpd, type) < 0) { 2256 netif_info(adapter, tx_done, adapter->netdev, 2257 "tx-skb dropped due to dma error\n"); 2258 /* roll back tpd/buffer */ 2259 atl1c_tx_rollback(adapter, tpd, type); 2260 dev_kfree_skb_any(skb); 2261 } else { 2262 netdev_sent_queue(adapter->netdev, skb->len); 2263 atl1c_tx_queue(adapter, skb, tpd, type); 2264 } 2265 2266 return NETDEV_TX_OK; 2267 } 2268 2269 static void atl1c_free_irq(struct atl1c_adapter *adapter) 2270 { 2271 struct net_device *netdev = adapter->netdev; 2272 2273 free_irq(adapter->pdev->irq, netdev); 2274 2275 if (adapter->have_msi) 2276 pci_disable_msi(adapter->pdev); 2277 } 2278 2279 static int atl1c_request_irq(struct atl1c_adapter *adapter) 2280 { 2281 struct pci_dev *pdev = adapter->pdev; 2282 struct net_device *netdev = adapter->netdev; 2283 int flags = 0; 2284 int err = 0; 2285 2286 adapter->have_msi = true; 2287 err = pci_enable_msi(adapter->pdev); 2288 if (err) { 2289 if (netif_msg_ifup(adapter)) 2290 dev_err(&pdev->dev, 2291 "Unable to allocate MSI interrupt Error: %d\n", 2292 err); 2293 adapter->have_msi = false; 2294 } 2295 2296 if (!adapter->have_msi) 2297 flags |= IRQF_SHARED; 2298 err = request_irq(adapter->pdev->irq, atl1c_intr, flags, 2299 netdev->name, netdev); 2300 if (err) { 2301 if (netif_msg_ifup(adapter)) 2302 dev_err(&pdev->dev, 2303 "Unable to allocate interrupt Error: %d\n", 2304 err); 2305 if (adapter->have_msi) 2306 pci_disable_msi(adapter->pdev); 2307 return err; 2308 } 2309 if (netif_msg_ifup(adapter)) 2310 dev_dbg(&pdev->dev, "atl1c_request_irq OK\n"); 2311 return err; 2312 } 2313 2314 2315 static void atl1c_reset_dma_ring(struct atl1c_adapter *adapter) 2316 { 2317 /* release tx-pending skbs and reset tx/rx ring index */ 2318 atl1c_clean_tx_ring(adapter, atl1c_trans_normal); 2319 atl1c_clean_tx_ring(adapter, atl1c_trans_high); 2320 atl1c_clean_rx_ring(adapter); 2321 } 2322 2323 static int atl1c_up(struct atl1c_adapter *adapter) 2324 { 2325 struct net_device *netdev = adapter->netdev; 2326 int err; 2327 2328 netif_carrier_off(netdev); 2329 2330 err = atl1c_configure(adapter); 2331 if (unlikely(err)) 2332 goto err_up; 2333 2334 err = atl1c_request_irq(adapter); 2335 if (unlikely(err)) 2336 goto err_up; 2337 2338 atl1c_check_link_status(adapter); 2339 clear_bit(__AT_DOWN, &adapter->flags); 2340 napi_enable(&adapter->napi); 2341 atl1c_irq_enable(adapter); 2342 netif_start_queue(netdev); 2343 return err; 2344 2345 err_up: 2346 atl1c_clean_rx_ring(adapter); 2347 return err; 2348 } 2349 2350 static void atl1c_down(struct atl1c_adapter *adapter) 2351 { 2352 struct net_device *netdev = adapter->netdev; 2353 2354 atl1c_del_timer(adapter); 2355 adapter->work_event = 0; /* clear all event */ 2356 /* signal that we're down so the interrupt handler does not 2357 * reschedule our watchdog timer */ 2358 set_bit(__AT_DOWN, &adapter->flags); 2359 netif_carrier_off(netdev); 2360 napi_disable(&adapter->napi); 2361 atl1c_irq_disable(adapter); 2362 atl1c_free_irq(adapter); 2363 /* disable ASPM if device inactive */ 2364 atl1c_disable_l0s_l1(&adapter->hw); 2365 /* reset MAC to disable all RX/TX */ 2366 atl1c_reset_mac(&adapter->hw); 2367 msleep(1); 2368 2369 adapter->link_speed = SPEED_0; 2370 adapter->link_duplex = -1; 2371 atl1c_reset_dma_ring(adapter); 2372 } 2373 2374 /** 2375 * atl1c_open - Called when a network interface is made active 2376 * @netdev: network interface device structure 2377 * 2378 * Returns 0 on success, negative value on failure 2379 * 2380 * The open entry point is called when a network interface is made 2381 * active by the system (IFF_UP). At this point all resources needed 2382 * for transmit and receive operations are allocated, the interrupt 2383 * handler is registered with the OS, the watchdog timer is started, 2384 * and the stack is notified that the interface is ready. 2385 */ 2386 static int atl1c_open(struct net_device *netdev) 2387 { 2388 struct atl1c_adapter *adapter = netdev_priv(netdev); 2389 int err; 2390 2391 /* disallow open during test */ 2392 if (test_bit(__AT_TESTING, &adapter->flags)) 2393 return -EBUSY; 2394 2395 /* allocate rx/tx dma buffer & descriptors */ 2396 err = atl1c_setup_ring_resources(adapter); 2397 if (unlikely(err)) 2398 return err; 2399 2400 err = atl1c_up(adapter); 2401 if (unlikely(err)) 2402 goto err_up; 2403 2404 return 0; 2405 2406 err_up: 2407 atl1c_free_irq(adapter); 2408 atl1c_free_ring_resources(adapter); 2409 atl1c_reset_mac(&adapter->hw); 2410 return err; 2411 } 2412 2413 /** 2414 * atl1c_close - Disables a network interface 2415 * @netdev: network interface device structure 2416 * 2417 * Returns 0, this is not allowed to fail 2418 * 2419 * The close entry point is called when an interface is de-activated 2420 * by the OS. The hardware is still under the drivers control, but 2421 * needs to be disabled. A global MAC reset is issued to stop the 2422 * hardware, and all transmit and receive resources are freed. 2423 */ 2424 static int atl1c_close(struct net_device *netdev) 2425 { 2426 struct atl1c_adapter *adapter = netdev_priv(netdev); 2427 2428 WARN_ON(test_bit(__AT_RESETTING, &adapter->flags)); 2429 set_bit(__AT_DOWN, &adapter->flags); 2430 cancel_work_sync(&adapter->common_task); 2431 atl1c_down(adapter); 2432 atl1c_free_ring_resources(adapter); 2433 return 0; 2434 } 2435 2436 static int atl1c_suspend(struct device *dev) 2437 { 2438 struct pci_dev *pdev = to_pci_dev(dev); 2439 struct net_device *netdev = pci_get_drvdata(pdev); 2440 struct atl1c_adapter *adapter = netdev_priv(netdev); 2441 struct atl1c_hw *hw = &adapter->hw; 2442 u32 wufc = adapter->wol; 2443 2444 atl1c_disable_l0s_l1(hw); 2445 if (netif_running(netdev)) { 2446 WARN_ON(test_bit(__AT_RESETTING, &adapter->flags)); 2447 atl1c_down(adapter); 2448 } 2449 netif_device_detach(netdev); 2450 2451 if (wufc) 2452 if (atl1c_phy_to_ps_link(hw) != 0) 2453 dev_dbg(&pdev->dev, "phy power saving failed"); 2454 2455 atl1c_power_saving(hw, wufc); 2456 2457 return 0; 2458 } 2459 2460 #ifdef CONFIG_PM_SLEEP 2461 static int atl1c_resume(struct device *dev) 2462 { 2463 struct pci_dev *pdev = to_pci_dev(dev); 2464 struct net_device *netdev = pci_get_drvdata(pdev); 2465 struct atl1c_adapter *adapter = netdev_priv(netdev); 2466 2467 AT_WRITE_REG(&adapter->hw, REG_WOL_CTRL, 0); 2468 atl1c_reset_pcie(&adapter->hw, ATL1C_PCIE_L0S_L1_DISABLE); 2469 2470 atl1c_phy_reset(&adapter->hw); 2471 atl1c_reset_mac(&adapter->hw); 2472 atl1c_phy_init(&adapter->hw); 2473 2474 #if 0 2475 AT_READ_REG(&adapter->hw, REG_PM_CTRLSTAT, &pm_data); 2476 pm_data &= ~PM_CTRLSTAT_PME_EN; 2477 AT_WRITE_REG(&adapter->hw, REG_PM_CTRLSTAT, pm_data); 2478 #endif 2479 2480 netif_device_attach(netdev); 2481 if (netif_running(netdev)) 2482 atl1c_up(adapter); 2483 2484 return 0; 2485 } 2486 #endif 2487 2488 static void atl1c_shutdown(struct pci_dev *pdev) 2489 { 2490 struct net_device *netdev = pci_get_drvdata(pdev); 2491 struct atl1c_adapter *adapter = netdev_priv(netdev); 2492 2493 atl1c_suspend(&pdev->dev); 2494 pci_wake_from_d3(pdev, adapter->wol); 2495 pci_set_power_state(pdev, PCI_D3hot); 2496 } 2497 2498 static const struct net_device_ops atl1c_netdev_ops = { 2499 .ndo_open = atl1c_open, 2500 .ndo_stop = atl1c_close, 2501 .ndo_validate_addr = eth_validate_addr, 2502 .ndo_start_xmit = atl1c_xmit_frame, 2503 .ndo_set_mac_address = atl1c_set_mac_addr, 2504 .ndo_set_rx_mode = atl1c_set_multi, 2505 .ndo_change_mtu = atl1c_change_mtu, 2506 .ndo_fix_features = atl1c_fix_features, 2507 .ndo_set_features = atl1c_set_features, 2508 .ndo_do_ioctl = atl1c_ioctl, 2509 .ndo_tx_timeout = atl1c_tx_timeout, 2510 .ndo_get_stats = atl1c_get_stats, 2511 #ifdef CONFIG_NET_POLL_CONTROLLER 2512 .ndo_poll_controller = atl1c_netpoll, 2513 #endif 2514 }; 2515 2516 static int atl1c_init_netdev(struct net_device *netdev, struct pci_dev *pdev) 2517 { 2518 SET_NETDEV_DEV(netdev, &pdev->dev); 2519 pci_set_drvdata(pdev, netdev); 2520 2521 netdev->netdev_ops = &atl1c_netdev_ops; 2522 netdev->watchdog_timeo = AT_TX_WATCHDOG; 2523 netdev->min_mtu = ETH_ZLEN - (ETH_HLEN + VLAN_HLEN); 2524 atl1c_set_ethtool_ops(netdev); 2525 2526 /* TODO: add when ready */ 2527 netdev->hw_features = NETIF_F_SG | 2528 NETIF_F_HW_CSUM | 2529 NETIF_F_HW_VLAN_CTAG_RX | 2530 NETIF_F_TSO | 2531 NETIF_F_TSO6; 2532 netdev->features = netdev->hw_features | 2533 NETIF_F_HW_VLAN_CTAG_TX; 2534 return 0; 2535 } 2536 2537 /** 2538 * atl1c_probe - Device Initialization Routine 2539 * @pdev: PCI device information struct 2540 * @ent: entry in atl1c_pci_tbl 2541 * 2542 * Returns 0 on success, negative on failure 2543 * 2544 * atl1c_probe initializes an adapter identified by a pci_dev structure. 2545 * The OS initialization, configuring of the adapter private structure, 2546 * and a hardware reset occur. 2547 */ 2548 static int atl1c_probe(struct pci_dev *pdev, const struct pci_device_id *ent) 2549 { 2550 struct net_device *netdev; 2551 struct atl1c_adapter *adapter; 2552 static int cards_found; 2553 2554 int err = 0; 2555 2556 /* enable device (incl. PCI PM wakeup and hotplug setup) */ 2557 err = pci_enable_device_mem(pdev); 2558 if (err) { 2559 dev_err(&pdev->dev, "cannot enable PCI device\n"); 2560 return err; 2561 } 2562 2563 /* 2564 * The atl1c chip can DMA to 64-bit addresses, but it uses a single 2565 * shared register for the high 32 bits, so only a single, aligned, 2566 * 4 GB physical address range can be used at a time. 2567 * 2568 * Supporting 64-bit DMA on this hardware is more trouble than it's 2569 * worth. It is far easier to limit to 32-bit DMA than update 2570 * various kernel subsystems to support the mechanics required by a 2571 * fixed-high-32-bit system. 2572 */ 2573 if ((pci_set_dma_mask(pdev, DMA_BIT_MASK(32)) != 0) || 2574 (pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(32)) != 0)) { 2575 dev_err(&pdev->dev, "No usable DMA configuration,aborting\n"); 2576 goto err_dma; 2577 } 2578 2579 err = pci_request_regions(pdev, atl1c_driver_name); 2580 if (err) { 2581 dev_err(&pdev->dev, "cannot obtain PCI resources\n"); 2582 goto err_pci_reg; 2583 } 2584 2585 pci_set_master(pdev); 2586 2587 netdev = alloc_etherdev(sizeof(struct atl1c_adapter)); 2588 if (netdev == NULL) { 2589 err = -ENOMEM; 2590 goto err_alloc_etherdev; 2591 } 2592 2593 err = atl1c_init_netdev(netdev, pdev); 2594 if (err) { 2595 dev_err(&pdev->dev, "init netdevice failed\n"); 2596 goto err_init_netdev; 2597 } 2598 adapter = netdev_priv(netdev); 2599 adapter->bd_number = cards_found; 2600 adapter->netdev = netdev; 2601 adapter->pdev = pdev; 2602 adapter->hw.adapter = adapter; 2603 adapter->msg_enable = netif_msg_init(-1, atl1c_default_msg); 2604 adapter->hw.hw_addr = ioremap(pci_resource_start(pdev, 0), pci_resource_len(pdev, 0)); 2605 if (!adapter->hw.hw_addr) { 2606 err = -EIO; 2607 dev_err(&pdev->dev, "cannot map device registers\n"); 2608 goto err_ioremap; 2609 } 2610 2611 /* init mii data */ 2612 adapter->mii.dev = netdev; 2613 adapter->mii.mdio_read = atl1c_mdio_read; 2614 adapter->mii.mdio_write = atl1c_mdio_write; 2615 adapter->mii.phy_id_mask = 0x1f; 2616 adapter->mii.reg_num_mask = MDIO_CTRL_REG_MASK; 2617 netif_napi_add(netdev, &adapter->napi, atl1c_clean, 64); 2618 timer_setup(&adapter->phy_config_timer, atl1c_phy_config, 0); 2619 /* setup the private structure */ 2620 err = atl1c_sw_init(adapter); 2621 if (err) { 2622 dev_err(&pdev->dev, "net device private data init failed\n"); 2623 goto err_sw_init; 2624 } 2625 /* set max MTU */ 2626 atl1c_set_max_mtu(netdev); 2627 2628 atl1c_reset_pcie(&adapter->hw, ATL1C_PCIE_L0S_L1_DISABLE); 2629 2630 /* Init GPHY as early as possible due to power saving issue */ 2631 atl1c_phy_reset(&adapter->hw); 2632 2633 err = atl1c_reset_mac(&adapter->hw); 2634 if (err) { 2635 err = -EIO; 2636 goto err_reset; 2637 } 2638 2639 /* reset the controller to 2640 * put the device in a known good starting state */ 2641 err = atl1c_phy_init(&adapter->hw); 2642 if (err) { 2643 err = -EIO; 2644 goto err_reset; 2645 } 2646 if (atl1c_read_mac_addr(&adapter->hw)) { 2647 /* got a random MAC address, set NET_ADDR_RANDOM to netdev */ 2648 netdev->addr_assign_type = NET_ADDR_RANDOM; 2649 } 2650 memcpy(netdev->dev_addr, adapter->hw.mac_addr, netdev->addr_len); 2651 if (netif_msg_probe(adapter)) 2652 dev_dbg(&pdev->dev, "mac address : %pM\n", 2653 adapter->hw.mac_addr); 2654 2655 atl1c_hw_set_mac_addr(&adapter->hw, adapter->hw.mac_addr); 2656 INIT_WORK(&adapter->common_task, atl1c_common_task); 2657 adapter->work_event = 0; 2658 err = register_netdev(netdev); 2659 if (err) { 2660 dev_err(&pdev->dev, "register netdevice failed\n"); 2661 goto err_register; 2662 } 2663 2664 if (netif_msg_probe(adapter)) 2665 dev_info(&pdev->dev, "version %s\n", ATL1C_DRV_VERSION); 2666 cards_found++; 2667 return 0; 2668 2669 err_reset: 2670 err_register: 2671 err_sw_init: 2672 iounmap(adapter->hw.hw_addr); 2673 err_init_netdev: 2674 err_ioremap: 2675 free_netdev(netdev); 2676 err_alloc_etherdev: 2677 pci_release_regions(pdev); 2678 err_pci_reg: 2679 err_dma: 2680 pci_disable_device(pdev); 2681 return err; 2682 } 2683 2684 /** 2685 * atl1c_remove - Device Removal Routine 2686 * @pdev: PCI device information struct 2687 * 2688 * atl1c_remove is called by the PCI subsystem to alert the driver 2689 * that it should release a PCI device. The could be caused by a 2690 * Hot-Plug event, or because the driver is going to be removed from 2691 * memory. 2692 */ 2693 static void atl1c_remove(struct pci_dev *pdev) 2694 { 2695 struct net_device *netdev = pci_get_drvdata(pdev); 2696 struct atl1c_adapter *adapter = netdev_priv(netdev); 2697 2698 unregister_netdev(netdev); 2699 /* restore permanent address */ 2700 atl1c_hw_set_mac_addr(&adapter->hw, adapter->hw.perm_mac_addr); 2701 atl1c_phy_disable(&adapter->hw); 2702 2703 iounmap(adapter->hw.hw_addr); 2704 2705 pci_release_regions(pdev); 2706 pci_disable_device(pdev); 2707 free_netdev(netdev); 2708 } 2709 2710 /** 2711 * atl1c_io_error_detected - called when PCI error is detected 2712 * @pdev: Pointer to PCI device 2713 * @state: The current pci connection state 2714 * 2715 * This function is called after a PCI bus error affecting 2716 * this device has been detected. 2717 */ 2718 static pci_ers_result_t atl1c_io_error_detected(struct pci_dev *pdev, 2719 pci_channel_state_t state) 2720 { 2721 struct net_device *netdev = pci_get_drvdata(pdev); 2722 struct atl1c_adapter *adapter = netdev_priv(netdev); 2723 2724 netif_device_detach(netdev); 2725 2726 if (state == pci_channel_io_perm_failure) 2727 return PCI_ERS_RESULT_DISCONNECT; 2728 2729 if (netif_running(netdev)) 2730 atl1c_down(adapter); 2731 2732 pci_disable_device(pdev); 2733 2734 /* Request a slot slot reset. */ 2735 return PCI_ERS_RESULT_NEED_RESET; 2736 } 2737 2738 /** 2739 * atl1c_io_slot_reset - called after the pci bus has been reset. 2740 * @pdev: Pointer to PCI device 2741 * 2742 * Restart the card from scratch, as if from a cold-boot. Implementation 2743 * resembles the first-half of the e1000_resume routine. 2744 */ 2745 static pci_ers_result_t atl1c_io_slot_reset(struct pci_dev *pdev) 2746 { 2747 struct net_device *netdev = pci_get_drvdata(pdev); 2748 struct atl1c_adapter *adapter = netdev_priv(netdev); 2749 2750 if (pci_enable_device(pdev)) { 2751 if (netif_msg_hw(adapter)) 2752 dev_err(&pdev->dev, 2753 "Cannot re-enable PCI device after reset\n"); 2754 return PCI_ERS_RESULT_DISCONNECT; 2755 } 2756 pci_set_master(pdev); 2757 2758 pci_enable_wake(pdev, PCI_D3hot, 0); 2759 pci_enable_wake(pdev, PCI_D3cold, 0); 2760 2761 atl1c_reset_mac(&adapter->hw); 2762 2763 return PCI_ERS_RESULT_RECOVERED; 2764 } 2765 2766 /** 2767 * atl1c_io_resume - called when traffic can start flowing again. 2768 * @pdev: Pointer to PCI device 2769 * 2770 * This callback is called when the error recovery driver tells us that 2771 * its OK to resume normal operation. Implementation resembles the 2772 * second-half of the atl1c_resume routine. 2773 */ 2774 static void atl1c_io_resume(struct pci_dev *pdev) 2775 { 2776 struct net_device *netdev = pci_get_drvdata(pdev); 2777 struct atl1c_adapter *adapter = netdev_priv(netdev); 2778 2779 if (netif_running(netdev)) { 2780 if (atl1c_up(adapter)) { 2781 if (netif_msg_hw(adapter)) 2782 dev_err(&pdev->dev, 2783 "Cannot bring device back up after reset\n"); 2784 return; 2785 } 2786 } 2787 2788 netif_device_attach(netdev); 2789 } 2790 2791 static const struct pci_error_handlers atl1c_err_handler = { 2792 .error_detected = atl1c_io_error_detected, 2793 .slot_reset = atl1c_io_slot_reset, 2794 .resume = atl1c_io_resume, 2795 }; 2796 2797 static SIMPLE_DEV_PM_OPS(atl1c_pm_ops, atl1c_suspend, atl1c_resume); 2798 2799 static struct pci_driver atl1c_driver = { 2800 .name = atl1c_driver_name, 2801 .id_table = atl1c_pci_tbl, 2802 .probe = atl1c_probe, 2803 .remove = atl1c_remove, 2804 .shutdown = atl1c_shutdown, 2805 .err_handler = &atl1c_err_handler, 2806 .driver.pm = &atl1c_pm_ops, 2807 }; 2808 2809 module_pci_driver(atl1c_driver); 2810