1 /* 2 * Copyright(c) 2008 - 2009 Atheros Corporation. All rights reserved. 3 * 4 * Derived from Intel e1000 driver 5 * Copyright(c) 1999 - 2005 Intel Corporation. All rights reserved. 6 * 7 * This program is free software; you can redistribute it and/or modify it 8 * under the terms of the GNU General Public License as published by the Free 9 * Software Foundation; either version 2 of the License, or (at your option) 10 * any later version. 11 * 12 * This program is distributed in the hope that it will be useful, but WITHOUT 13 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or 14 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for 15 * more details. 16 * 17 * You should have received a copy of the GNU General Public License along with 18 * this program; if not, write to the Free Software Foundation, Inc., 59 19 * Temple Place - Suite 330, Boston, MA 02111-1307, USA. 20 */ 21 22 #include "atl1c.h" 23 24 #define ATL1C_DRV_VERSION "1.0.1.0-NAPI" 25 char atl1c_driver_name[] = "atl1c"; 26 char atl1c_driver_version[] = ATL1C_DRV_VERSION; 27 #define PCI_DEVICE_ID_ATTANSIC_L2C 0x1062 28 #define PCI_DEVICE_ID_ATTANSIC_L1C 0x1063 29 #define PCI_DEVICE_ID_ATHEROS_L2C_B 0x2060 /* AR8152 v1.1 Fast 10/100 */ 30 #define PCI_DEVICE_ID_ATHEROS_L2C_B2 0x2062 /* AR8152 v2.0 Fast 10/100 */ 31 #define PCI_DEVICE_ID_ATHEROS_L1D 0x1073 /* AR8151 v1.0 Gigabit 1000 */ 32 #define PCI_DEVICE_ID_ATHEROS_L1D_2_0 0x1083 /* AR8151 v2.0 Gigabit 1000 */ 33 #define L2CB_V10 0xc0 34 #define L2CB_V11 0xc1 35 36 /* 37 * atl1c_pci_tbl - PCI Device ID Table 38 * 39 * Wildcard entries (PCI_ANY_ID) should come last 40 * Last entry must be all 0s 41 * 42 * { Vendor ID, Device ID, SubVendor ID, SubDevice ID, 43 * Class, Class Mask, private data (not used) } 44 */ 45 static DEFINE_PCI_DEVICE_TABLE(atl1c_pci_tbl) = { 46 {PCI_DEVICE(PCI_VENDOR_ID_ATTANSIC, PCI_DEVICE_ID_ATTANSIC_L1C)}, 47 {PCI_DEVICE(PCI_VENDOR_ID_ATTANSIC, PCI_DEVICE_ID_ATTANSIC_L2C)}, 48 {PCI_DEVICE(PCI_VENDOR_ID_ATTANSIC, PCI_DEVICE_ID_ATHEROS_L2C_B)}, 49 {PCI_DEVICE(PCI_VENDOR_ID_ATTANSIC, PCI_DEVICE_ID_ATHEROS_L2C_B2)}, 50 {PCI_DEVICE(PCI_VENDOR_ID_ATTANSIC, PCI_DEVICE_ID_ATHEROS_L1D)}, 51 {PCI_DEVICE(PCI_VENDOR_ID_ATTANSIC, PCI_DEVICE_ID_ATHEROS_L1D_2_0)}, 52 /* required last entry */ 53 { 0 } 54 }; 55 MODULE_DEVICE_TABLE(pci, atl1c_pci_tbl); 56 57 MODULE_AUTHOR("Jie Yang <jie.yang@atheros.com>"); 58 MODULE_DESCRIPTION("Atheros 1000M Ethernet Network Driver"); 59 MODULE_LICENSE("GPL"); 60 MODULE_VERSION(ATL1C_DRV_VERSION); 61 62 static int atl1c_stop_mac(struct atl1c_hw *hw); 63 static void atl1c_enable_rx_ctrl(struct atl1c_hw *hw); 64 static void atl1c_enable_tx_ctrl(struct atl1c_hw *hw); 65 static void atl1c_disable_l0s_l1(struct atl1c_hw *hw); 66 static void atl1c_set_aspm(struct atl1c_hw *hw, bool linkup); 67 static void atl1c_setup_mac_ctrl(struct atl1c_adapter *adapter); 68 static void atl1c_clean_rx_irq(struct atl1c_adapter *adapter, u8 que, 69 int *work_done, int work_to_do); 70 static int atl1c_up(struct atl1c_adapter *adapter); 71 static void atl1c_down(struct atl1c_adapter *adapter); 72 73 static const u16 atl1c_pay_load_size[] = { 74 128, 256, 512, 1024, 2048, 4096, 75 }; 76 77 static const u16 atl1c_rfd_prod_idx_regs[AT_MAX_RECEIVE_QUEUE] = 78 { 79 REG_MB_RFD0_PROD_IDX, 80 REG_MB_RFD1_PROD_IDX, 81 REG_MB_RFD2_PROD_IDX, 82 REG_MB_RFD3_PROD_IDX 83 }; 84 85 static const u16 atl1c_rfd_addr_lo_regs[AT_MAX_RECEIVE_QUEUE] = 86 { 87 REG_RFD0_HEAD_ADDR_LO, 88 REG_RFD1_HEAD_ADDR_LO, 89 REG_RFD2_HEAD_ADDR_LO, 90 REG_RFD3_HEAD_ADDR_LO 91 }; 92 93 static const u16 atl1c_rrd_addr_lo_regs[AT_MAX_RECEIVE_QUEUE] = 94 { 95 REG_RRD0_HEAD_ADDR_LO, 96 REG_RRD1_HEAD_ADDR_LO, 97 REG_RRD2_HEAD_ADDR_LO, 98 REG_RRD3_HEAD_ADDR_LO 99 }; 100 101 static const u32 atl1c_default_msg = NETIF_MSG_DRV | NETIF_MSG_PROBE | 102 NETIF_MSG_LINK | NETIF_MSG_TIMER | NETIF_MSG_IFDOWN | NETIF_MSG_IFUP; 103 static void atl1c_pcie_patch(struct atl1c_hw *hw) 104 { 105 u32 data; 106 107 AT_READ_REG(hw, REG_PCIE_PHYMISC, &data); 108 data |= PCIE_PHYMISC_FORCE_RCV_DET; 109 AT_WRITE_REG(hw, REG_PCIE_PHYMISC, data); 110 111 if (hw->nic_type == athr_l2c_b && hw->revision_id == L2CB_V10) { 112 AT_READ_REG(hw, REG_PCIE_PHYMISC2, &data); 113 114 data &= ~(PCIE_PHYMISC2_SERDES_CDR_MASK << 115 PCIE_PHYMISC2_SERDES_CDR_SHIFT); 116 data |= 3 << PCIE_PHYMISC2_SERDES_CDR_SHIFT; 117 data &= ~(PCIE_PHYMISC2_SERDES_TH_MASK << 118 PCIE_PHYMISC2_SERDES_TH_SHIFT); 119 data |= 3 << PCIE_PHYMISC2_SERDES_TH_SHIFT; 120 AT_WRITE_REG(hw, REG_PCIE_PHYMISC2, data); 121 } 122 } 123 124 /* FIXME: no need any more ? */ 125 /* 126 * atl1c_init_pcie - init PCIE module 127 */ 128 static void atl1c_reset_pcie(struct atl1c_hw *hw, u32 flag) 129 { 130 u32 data; 131 u32 pci_cmd; 132 struct pci_dev *pdev = hw->adapter->pdev; 133 134 AT_READ_REG(hw, PCI_COMMAND, &pci_cmd); 135 pci_cmd &= ~PCI_COMMAND_INTX_DISABLE; 136 pci_cmd |= (PCI_COMMAND_MEMORY | PCI_COMMAND_MASTER | 137 PCI_COMMAND_IO); 138 AT_WRITE_REG(hw, PCI_COMMAND, pci_cmd); 139 140 /* 141 * Clear any PowerSaveing Settings 142 */ 143 pci_enable_wake(pdev, PCI_D3hot, 0); 144 pci_enable_wake(pdev, PCI_D3cold, 0); 145 146 /* 147 * Mask some pcie error bits 148 */ 149 AT_READ_REG(hw, REG_PCIE_UC_SEVERITY, &data); 150 data &= ~PCIE_UC_SERVRITY_DLP; 151 data &= ~PCIE_UC_SERVRITY_FCP; 152 AT_WRITE_REG(hw, REG_PCIE_UC_SEVERITY, data); 153 154 AT_READ_REG(hw, REG_LTSSM_ID_CTRL, &data); 155 data &= ~LTSSM_ID_EN_WRO; 156 AT_WRITE_REG(hw, REG_LTSSM_ID_CTRL, data); 157 158 atl1c_pcie_patch(hw); 159 if (flag & ATL1C_PCIE_L0S_L1_DISABLE) 160 atl1c_disable_l0s_l1(hw); 161 if (flag & ATL1C_PCIE_PHY_RESET) 162 AT_WRITE_REG(hw, REG_GPHY_CTRL, GPHY_CTRL_DEFAULT); 163 else 164 AT_WRITE_REG(hw, REG_GPHY_CTRL, 165 GPHY_CTRL_DEFAULT | GPHY_CTRL_EXT_RESET); 166 167 msleep(5); 168 } 169 170 /* 171 * atl1c_irq_enable - Enable default interrupt generation settings 172 * @adapter: board private structure 173 */ 174 static inline void atl1c_irq_enable(struct atl1c_adapter *adapter) 175 { 176 if (likely(atomic_dec_and_test(&adapter->irq_sem))) { 177 AT_WRITE_REG(&adapter->hw, REG_ISR, 0x7FFFFFFF); 178 AT_WRITE_REG(&adapter->hw, REG_IMR, adapter->hw.intr_mask); 179 AT_WRITE_FLUSH(&adapter->hw); 180 } 181 } 182 183 /* 184 * atl1c_irq_disable - Mask off interrupt generation on the NIC 185 * @adapter: board private structure 186 */ 187 static inline void atl1c_irq_disable(struct atl1c_adapter *adapter) 188 { 189 atomic_inc(&adapter->irq_sem); 190 AT_WRITE_REG(&adapter->hw, REG_IMR, 0); 191 AT_WRITE_REG(&adapter->hw, REG_ISR, ISR_DIS_INT); 192 AT_WRITE_FLUSH(&adapter->hw); 193 synchronize_irq(adapter->pdev->irq); 194 } 195 196 /* 197 * atl1c_irq_reset - reset interrupt confiure on the NIC 198 * @adapter: board private structure 199 */ 200 static inline void atl1c_irq_reset(struct atl1c_adapter *adapter) 201 { 202 atomic_set(&adapter->irq_sem, 1); 203 atl1c_irq_enable(adapter); 204 } 205 206 /* 207 * atl1c_wait_until_idle - wait up to AT_HW_MAX_IDLE_DELAY reads 208 * of the idle status register until the device is actually idle 209 */ 210 static u32 atl1c_wait_until_idle(struct atl1c_hw *hw) 211 { 212 int timeout; 213 u32 data; 214 215 for (timeout = 0; timeout < AT_HW_MAX_IDLE_DELAY; timeout++) { 216 AT_READ_REG(hw, REG_IDLE_STATUS, &data); 217 if ((data & IDLE_STATUS_MASK) == 0) 218 return 0; 219 msleep(1); 220 } 221 return data; 222 } 223 224 /* 225 * atl1c_phy_config - Timer Call-back 226 * @data: pointer to netdev cast into an unsigned long 227 */ 228 static void atl1c_phy_config(unsigned long data) 229 { 230 struct atl1c_adapter *adapter = (struct atl1c_adapter *) data; 231 struct atl1c_hw *hw = &adapter->hw; 232 unsigned long flags; 233 234 spin_lock_irqsave(&adapter->mdio_lock, flags); 235 atl1c_restart_autoneg(hw); 236 spin_unlock_irqrestore(&adapter->mdio_lock, flags); 237 } 238 239 void atl1c_reinit_locked(struct atl1c_adapter *adapter) 240 { 241 WARN_ON(in_interrupt()); 242 atl1c_down(adapter); 243 atl1c_up(adapter); 244 clear_bit(__AT_RESETTING, &adapter->flags); 245 } 246 247 static void atl1c_check_link_status(struct atl1c_adapter *adapter) 248 { 249 struct atl1c_hw *hw = &adapter->hw; 250 struct net_device *netdev = adapter->netdev; 251 struct pci_dev *pdev = adapter->pdev; 252 int err; 253 unsigned long flags; 254 u16 speed, duplex, phy_data; 255 256 spin_lock_irqsave(&adapter->mdio_lock, flags); 257 /* MII_BMSR must read twise */ 258 atl1c_read_phy_reg(hw, MII_BMSR, &phy_data); 259 atl1c_read_phy_reg(hw, MII_BMSR, &phy_data); 260 spin_unlock_irqrestore(&adapter->mdio_lock, flags); 261 262 if ((phy_data & BMSR_LSTATUS) == 0) { 263 /* link down */ 264 hw->hibernate = true; 265 if (atl1c_stop_mac(hw) != 0) 266 if (netif_msg_hw(adapter)) 267 dev_warn(&pdev->dev, "stop mac failed\n"); 268 atl1c_set_aspm(hw, false); 269 netif_carrier_off(netdev); 270 netif_stop_queue(netdev); 271 atl1c_phy_reset(hw); 272 atl1c_phy_init(&adapter->hw); 273 } else { 274 /* Link Up */ 275 hw->hibernate = false; 276 spin_lock_irqsave(&adapter->mdio_lock, flags); 277 err = atl1c_get_speed_and_duplex(hw, &speed, &duplex); 278 spin_unlock_irqrestore(&adapter->mdio_lock, flags); 279 if (unlikely(err)) 280 return; 281 /* link result is our setting */ 282 if (adapter->link_speed != speed || 283 adapter->link_duplex != duplex) { 284 adapter->link_speed = speed; 285 adapter->link_duplex = duplex; 286 atl1c_set_aspm(hw, true); 287 atl1c_enable_tx_ctrl(hw); 288 atl1c_enable_rx_ctrl(hw); 289 atl1c_setup_mac_ctrl(adapter); 290 if (netif_msg_link(adapter)) 291 dev_info(&pdev->dev, 292 "%s: %s NIC Link is Up<%d Mbps %s>\n", 293 atl1c_driver_name, netdev->name, 294 adapter->link_speed, 295 adapter->link_duplex == FULL_DUPLEX ? 296 "Full Duplex" : "Half Duplex"); 297 } 298 if (!netif_carrier_ok(netdev)) 299 netif_carrier_on(netdev); 300 } 301 } 302 303 static void atl1c_link_chg_event(struct atl1c_adapter *adapter) 304 { 305 struct net_device *netdev = adapter->netdev; 306 struct pci_dev *pdev = adapter->pdev; 307 u16 phy_data; 308 u16 link_up; 309 310 spin_lock(&adapter->mdio_lock); 311 atl1c_read_phy_reg(&adapter->hw, MII_BMSR, &phy_data); 312 atl1c_read_phy_reg(&adapter->hw, MII_BMSR, &phy_data); 313 spin_unlock(&adapter->mdio_lock); 314 link_up = phy_data & BMSR_LSTATUS; 315 /* notify upper layer link down ASAP */ 316 if (!link_up) { 317 if (netif_carrier_ok(netdev)) { 318 /* old link state: Up */ 319 netif_carrier_off(netdev); 320 if (netif_msg_link(adapter)) 321 dev_info(&pdev->dev, 322 "%s: %s NIC Link is Down\n", 323 atl1c_driver_name, netdev->name); 324 adapter->link_speed = SPEED_0; 325 } 326 } 327 328 set_bit(ATL1C_WORK_EVENT_LINK_CHANGE, &adapter->work_event); 329 schedule_work(&adapter->common_task); 330 } 331 332 static void atl1c_common_task(struct work_struct *work) 333 { 334 struct atl1c_adapter *adapter; 335 struct net_device *netdev; 336 337 adapter = container_of(work, struct atl1c_adapter, common_task); 338 netdev = adapter->netdev; 339 340 if (test_and_clear_bit(ATL1C_WORK_EVENT_RESET, &adapter->work_event)) { 341 netif_device_detach(netdev); 342 atl1c_down(adapter); 343 atl1c_up(adapter); 344 netif_device_attach(netdev); 345 } 346 347 if (test_and_clear_bit(ATL1C_WORK_EVENT_LINK_CHANGE, 348 &adapter->work_event)) 349 atl1c_check_link_status(adapter); 350 } 351 352 353 static void atl1c_del_timer(struct atl1c_adapter *adapter) 354 { 355 del_timer_sync(&adapter->phy_config_timer); 356 } 357 358 359 /* 360 * atl1c_tx_timeout - Respond to a Tx Hang 361 * @netdev: network interface device structure 362 */ 363 static void atl1c_tx_timeout(struct net_device *netdev) 364 { 365 struct atl1c_adapter *adapter = netdev_priv(netdev); 366 367 /* Do the reset outside of interrupt context */ 368 set_bit(ATL1C_WORK_EVENT_RESET, &adapter->work_event); 369 schedule_work(&adapter->common_task); 370 } 371 372 /* 373 * atl1c_set_multi - Multicast and Promiscuous mode set 374 * @netdev: network interface device structure 375 * 376 * The set_multi entry point is called whenever the multicast address 377 * list or the network interface flags are updated. This routine is 378 * responsible for configuring the hardware for proper multicast, 379 * promiscuous mode, and all-multi behavior. 380 */ 381 static void atl1c_set_multi(struct net_device *netdev) 382 { 383 struct atl1c_adapter *adapter = netdev_priv(netdev); 384 struct atl1c_hw *hw = &adapter->hw; 385 struct netdev_hw_addr *ha; 386 u32 mac_ctrl_data; 387 u32 hash_value; 388 389 /* Check for Promiscuous and All Multicast modes */ 390 AT_READ_REG(hw, REG_MAC_CTRL, &mac_ctrl_data); 391 392 if (netdev->flags & IFF_PROMISC) { 393 mac_ctrl_data |= MAC_CTRL_PROMIS_EN; 394 } else if (netdev->flags & IFF_ALLMULTI) { 395 mac_ctrl_data |= MAC_CTRL_MC_ALL_EN; 396 mac_ctrl_data &= ~MAC_CTRL_PROMIS_EN; 397 } else { 398 mac_ctrl_data &= ~(MAC_CTRL_PROMIS_EN | MAC_CTRL_MC_ALL_EN); 399 } 400 401 AT_WRITE_REG(hw, REG_MAC_CTRL, mac_ctrl_data); 402 403 /* clear the old settings from the multicast hash table */ 404 AT_WRITE_REG(hw, REG_RX_HASH_TABLE, 0); 405 AT_WRITE_REG_ARRAY(hw, REG_RX_HASH_TABLE, 1, 0); 406 407 /* comoute mc addresses' hash value ,and put it into hash table */ 408 netdev_for_each_mc_addr(ha, netdev) { 409 hash_value = atl1c_hash_mc_addr(hw, ha->addr); 410 atl1c_hash_set(hw, hash_value); 411 } 412 } 413 414 static void __atl1c_vlan_mode(netdev_features_t features, u32 *mac_ctrl_data) 415 { 416 if (features & NETIF_F_HW_VLAN_RX) { 417 /* enable VLAN tag insert/strip */ 418 *mac_ctrl_data |= MAC_CTRL_RMV_VLAN; 419 } else { 420 /* disable VLAN tag insert/strip */ 421 *mac_ctrl_data &= ~MAC_CTRL_RMV_VLAN; 422 } 423 } 424 425 static void atl1c_vlan_mode(struct net_device *netdev, 426 netdev_features_t features) 427 { 428 struct atl1c_adapter *adapter = netdev_priv(netdev); 429 struct pci_dev *pdev = adapter->pdev; 430 u32 mac_ctrl_data = 0; 431 432 if (netif_msg_pktdata(adapter)) 433 dev_dbg(&pdev->dev, "atl1c_vlan_mode\n"); 434 435 atl1c_irq_disable(adapter); 436 AT_READ_REG(&adapter->hw, REG_MAC_CTRL, &mac_ctrl_data); 437 __atl1c_vlan_mode(features, &mac_ctrl_data); 438 AT_WRITE_REG(&adapter->hw, REG_MAC_CTRL, mac_ctrl_data); 439 atl1c_irq_enable(adapter); 440 } 441 442 static void atl1c_restore_vlan(struct atl1c_adapter *adapter) 443 { 444 struct pci_dev *pdev = adapter->pdev; 445 446 if (netif_msg_pktdata(adapter)) 447 dev_dbg(&pdev->dev, "atl1c_restore_vlan\n"); 448 atl1c_vlan_mode(adapter->netdev, adapter->netdev->features); 449 } 450 451 /* 452 * atl1c_set_mac - Change the Ethernet Address of the NIC 453 * @netdev: network interface device structure 454 * @p: pointer to an address structure 455 * 456 * Returns 0 on success, negative on failure 457 */ 458 static int atl1c_set_mac_addr(struct net_device *netdev, void *p) 459 { 460 struct atl1c_adapter *adapter = netdev_priv(netdev); 461 struct sockaddr *addr = p; 462 463 if (!is_valid_ether_addr(addr->sa_data)) 464 return -EADDRNOTAVAIL; 465 466 if (netif_running(netdev)) 467 return -EBUSY; 468 469 memcpy(netdev->dev_addr, addr->sa_data, netdev->addr_len); 470 memcpy(adapter->hw.mac_addr, addr->sa_data, netdev->addr_len); 471 472 atl1c_hw_set_mac_addr(&adapter->hw); 473 474 return 0; 475 } 476 477 static void atl1c_set_rxbufsize(struct atl1c_adapter *adapter, 478 struct net_device *dev) 479 { 480 int mtu = dev->mtu; 481 482 adapter->rx_buffer_len = mtu > AT_RX_BUF_SIZE ? 483 roundup(mtu + ETH_HLEN + ETH_FCS_LEN + VLAN_HLEN, 8) : AT_RX_BUF_SIZE; 484 } 485 486 static netdev_features_t atl1c_fix_features(struct net_device *netdev, 487 netdev_features_t features) 488 { 489 /* 490 * Since there is no support for separate rx/tx vlan accel 491 * enable/disable make sure tx flag is always in same state as rx. 492 */ 493 if (features & NETIF_F_HW_VLAN_RX) 494 features |= NETIF_F_HW_VLAN_TX; 495 else 496 features &= ~NETIF_F_HW_VLAN_TX; 497 498 if (netdev->mtu > MAX_TSO_FRAME_SIZE) 499 features &= ~(NETIF_F_TSO | NETIF_F_TSO6); 500 501 return features; 502 } 503 504 static int atl1c_set_features(struct net_device *netdev, 505 netdev_features_t features) 506 { 507 netdev_features_t changed = netdev->features ^ features; 508 509 if (changed & NETIF_F_HW_VLAN_RX) 510 atl1c_vlan_mode(netdev, features); 511 512 return 0; 513 } 514 515 /* 516 * atl1c_change_mtu - Change the Maximum Transfer Unit 517 * @netdev: network interface device structure 518 * @new_mtu: new value for maximum frame size 519 * 520 * Returns 0 on success, negative on failure 521 */ 522 static int atl1c_change_mtu(struct net_device *netdev, int new_mtu) 523 { 524 struct atl1c_adapter *adapter = netdev_priv(netdev); 525 int old_mtu = netdev->mtu; 526 int max_frame = new_mtu + ETH_HLEN + ETH_FCS_LEN + VLAN_HLEN; 527 528 if ((max_frame < ETH_ZLEN + ETH_FCS_LEN) || 529 (max_frame > MAX_JUMBO_FRAME_SIZE)) { 530 if (netif_msg_link(adapter)) 531 dev_warn(&adapter->pdev->dev, "invalid MTU setting\n"); 532 return -EINVAL; 533 } 534 /* set MTU */ 535 if (old_mtu != new_mtu && netif_running(netdev)) { 536 while (test_and_set_bit(__AT_RESETTING, &adapter->flags)) 537 msleep(1); 538 netdev->mtu = new_mtu; 539 adapter->hw.max_frame_size = new_mtu; 540 atl1c_set_rxbufsize(adapter, netdev); 541 atl1c_down(adapter); 542 netdev_update_features(netdev); 543 atl1c_up(adapter); 544 clear_bit(__AT_RESETTING, &adapter->flags); 545 if (adapter->hw.ctrl_flags & ATL1C_FPGA_VERSION) { 546 u32 phy_data; 547 548 AT_READ_REG(&adapter->hw, 0x1414, &phy_data); 549 phy_data |= 0x10000000; 550 AT_WRITE_REG(&adapter->hw, 0x1414, phy_data); 551 } 552 553 } 554 return 0; 555 } 556 557 /* 558 * caller should hold mdio_lock 559 */ 560 static int atl1c_mdio_read(struct net_device *netdev, int phy_id, int reg_num) 561 { 562 struct atl1c_adapter *adapter = netdev_priv(netdev); 563 u16 result; 564 565 atl1c_read_phy_reg(&adapter->hw, reg_num & MDIO_REG_ADDR_MASK, &result); 566 return result; 567 } 568 569 static void atl1c_mdio_write(struct net_device *netdev, int phy_id, 570 int reg_num, int val) 571 { 572 struct atl1c_adapter *adapter = netdev_priv(netdev); 573 574 atl1c_write_phy_reg(&adapter->hw, reg_num & MDIO_REG_ADDR_MASK, val); 575 } 576 577 /* 578 * atl1c_mii_ioctl - 579 * @netdev: 580 * @ifreq: 581 * @cmd: 582 */ 583 static int atl1c_mii_ioctl(struct net_device *netdev, 584 struct ifreq *ifr, int cmd) 585 { 586 struct atl1c_adapter *adapter = netdev_priv(netdev); 587 struct pci_dev *pdev = adapter->pdev; 588 struct mii_ioctl_data *data = if_mii(ifr); 589 unsigned long flags; 590 int retval = 0; 591 592 if (!netif_running(netdev)) 593 return -EINVAL; 594 595 spin_lock_irqsave(&adapter->mdio_lock, flags); 596 switch (cmd) { 597 case SIOCGMIIPHY: 598 data->phy_id = 0; 599 break; 600 601 case SIOCGMIIREG: 602 if (atl1c_read_phy_reg(&adapter->hw, data->reg_num & 0x1F, 603 &data->val_out)) { 604 retval = -EIO; 605 goto out; 606 } 607 break; 608 609 case SIOCSMIIREG: 610 if (data->reg_num & ~(0x1F)) { 611 retval = -EFAULT; 612 goto out; 613 } 614 615 dev_dbg(&pdev->dev, "<atl1c_mii_ioctl> write %x %x", 616 data->reg_num, data->val_in); 617 if (atl1c_write_phy_reg(&adapter->hw, 618 data->reg_num, data->val_in)) { 619 retval = -EIO; 620 goto out; 621 } 622 break; 623 624 default: 625 retval = -EOPNOTSUPP; 626 break; 627 } 628 out: 629 spin_unlock_irqrestore(&adapter->mdio_lock, flags); 630 return retval; 631 } 632 633 /* 634 * atl1c_ioctl - 635 * @netdev: 636 * @ifreq: 637 * @cmd: 638 */ 639 static int atl1c_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd) 640 { 641 switch (cmd) { 642 case SIOCGMIIPHY: 643 case SIOCGMIIREG: 644 case SIOCSMIIREG: 645 return atl1c_mii_ioctl(netdev, ifr, cmd); 646 default: 647 return -EOPNOTSUPP; 648 } 649 } 650 651 /* 652 * atl1c_alloc_queues - Allocate memory for all rings 653 * @adapter: board private structure to initialize 654 * 655 */ 656 static int __devinit atl1c_alloc_queues(struct atl1c_adapter *adapter) 657 { 658 return 0; 659 } 660 661 static void atl1c_set_mac_type(struct atl1c_hw *hw) 662 { 663 switch (hw->device_id) { 664 case PCI_DEVICE_ID_ATTANSIC_L2C: 665 hw->nic_type = athr_l2c; 666 break; 667 case PCI_DEVICE_ID_ATTANSIC_L1C: 668 hw->nic_type = athr_l1c; 669 break; 670 case PCI_DEVICE_ID_ATHEROS_L2C_B: 671 hw->nic_type = athr_l2c_b; 672 break; 673 case PCI_DEVICE_ID_ATHEROS_L2C_B2: 674 hw->nic_type = athr_l2c_b2; 675 break; 676 case PCI_DEVICE_ID_ATHEROS_L1D: 677 hw->nic_type = athr_l1d; 678 break; 679 case PCI_DEVICE_ID_ATHEROS_L1D_2_0: 680 hw->nic_type = athr_l1d_2; 681 break; 682 default: 683 break; 684 } 685 } 686 687 static int atl1c_setup_mac_funcs(struct atl1c_hw *hw) 688 { 689 u32 phy_status_data; 690 u32 link_ctrl_data; 691 692 atl1c_set_mac_type(hw); 693 AT_READ_REG(hw, REG_PHY_STATUS, &phy_status_data); 694 AT_READ_REG(hw, REG_LINK_CTRL, &link_ctrl_data); 695 696 hw->ctrl_flags = ATL1C_INTR_MODRT_ENABLE | 697 ATL1C_TXQ_MODE_ENHANCE; 698 if (link_ctrl_data & LINK_CTRL_L0S_EN) 699 hw->ctrl_flags |= ATL1C_ASPM_L0S_SUPPORT; 700 if (link_ctrl_data & LINK_CTRL_L1_EN) 701 hw->ctrl_flags |= ATL1C_ASPM_L1_SUPPORT; 702 if (link_ctrl_data & LINK_CTRL_EXT_SYNC) 703 hw->ctrl_flags |= ATL1C_LINK_EXT_SYNC; 704 hw->ctrl_flags |= ATL1C_ASPM_CTRL_MON; 705 706 if (hw->nic_type == athr_l1c || 707 hw->nic_type == athr_l1d || 708 hw->nic_type == athr_l1d_2) 709 hw->link_cap_flags |= ATL1C_LINK_CAP_1000M; 710 return 0; 711 } 712 /* 713 * atl1c_sw_init - Initialize general software structures (struct atl1c_adapter) 714 * @adapter: board private structure to initialize 715 * 716 * atl1c_sw_init initializes the Adapter private data structure. 717 * Fields are initialized based on PCI device information and 718 * OS network device settings (MTU size). 719 */ 720 static int __devinit atl1c_sw_init(struct atl1c_adapter *adapter) 721 { 722 struct atl1c_hw *hw = &adapter->hw; 723 struct pci_dev *pdev = adapter->pdev; 724 u32 revision; 725 726 727 adapter->wol = 0; 728 device_set_wakeup_enable(&pdev->dev, false); 729 adapter->link_speed = SPEED_0; 730 adapter->link_duplex = FULL_DUPLEX; 731 adapter->num_rx_queues = AT_DEF_RECEIVE_QUEUE; 732 adapter->tpd_ring[0].count = 1024; 733 adapter->rfd_ring[0].count = 512; 734 735 hw->vendor_id = pdev->vendor; 736 hw->device_id = pdev->device; 737 hw->subsystem_vendor_id = pdev->subsystem_vendor; 738 hw->subsystem_id = pdev->subsystem_device; 739 AT_READ_REG(hw, PCI_CLASS_REVISION, &revision); 740 hw->revision_id = revision & 0xFF; 741 /* before link up, we assume hibernate is true */ 742 hw->hibernate = true; 743 hw->media_type = MEDIA_TYPE_AUTO_SENSOR; 744 if (atl1c_setup_mac_funcs(hw) != 0) { 745 dev_err(&pdev->dev, "set mac function pointers failed\n"); 746 return -1; 747 } 748 hw->intr_mask = IMR_NORMAL_MASK; 749 hw->phy_configured = false; 750 hw->preamble_len = 7; 751 hw->max_frame_size = adapter->netdev->mtu; 752 if (adapter->num_rx_queues < 2) { 753 hw->rss_type = atl1c_rss_disable; 754 hw->rss_mode = atl1c_rss_mode_disable; 755 } else { 756 hw->rss_type = atl1c_rss_ipv4; 757 hw->rss_mode = atl1c_rss_mul_que_mul_int; 758 hw->rss_hash_bits = 16; 759 } 760 hw->autoneg_advertised = ADVERTISED_Autoneg; 761 hw->indirect_tab = 0xE4E4E4E4; 762 hw->base_cpu = 0; 763 764 hw->ict = 50000; /* 100ms */ 765 hw->smb_timer = 200000; /* 400ms */ 766 hw->cmb_tpd = 4; 767 hw->cmb_tx_timer = 1; /* 2 us */ 768 hw->rx_imt = 200; 769 hw->tx_imt = 1000; 770 771 hw->tpd_burst = 5; 772 hw->rfd_burst = 8; 773 hw->dma_order = atl1c_dma_ord_out; 774 hw->dmar_block = atl1c_dma_req_1024; 775 hw->dmaw_block = atl1c_dma_req_1024; 776 hw->dmar_dly_cnt = 15; 777 hw->dmaw_dly_cnt = 4; 778 779 if (atl1c_alloc_queues(adapter)) { 780 dev_err(&pdev->dev, "Unable to allocate memory for queues\n"); 781 return -ENOMEM; 782 } 783 /* TODO */ 784 atl1c_set_rxbufsize(adapter, adapter->netdev); 785 atomic_set(&adapter->irq_sem, 1); 786 spin_lock_init(&adapter->mdio_lock); 787 spin_lock_init(&adapter->tx_lock); 788 set_bit(__AT_DOWN, &adapter->flags); 789 790 return 0; 791 } 792 793 static inline void atl1c_clean_buffer(struct pci_dev *pdev, 794 struct atl1c_buffer *buffer_info, int in_irq) 795 { 796 u16 pci_driection; 797 if (buffer_info->flags & ATL1C_BUFFER_FREE) 798 return; 799 if (buffer_info->dma) { 800 if (buffer_info->flags & ATL1C_PCIMAP_FROMDEVICE) 801 pci_driection = PCI_DMA_FROMDEVICE; 802 else 803 pci_driection = PCI_DMA_TODEVICE; 804 805 if (buffer_info->flags & ATL1C_PCIMAP_SINGLE) 806 pci_unmap_single(pdev, buffer_info->dma, 807 buffer_info->length, pci_driection); 808 else if (buffer_info->flags & ATL1C_PCIMAP_PAGE) 809 pci_unmap_page(pdev, buffer_info->dma, 810 buffer_info->length, pci_driection); 811 } 812 if (buffer_info->skb) { 813 if (in_irq) 814 dev_kfree_skb_irq(buffer_info->skb); 815 else 816 dev_kfree_skb(buffer_info->skb); 817 } 818 buffer_info->dma = 0; 819 buffer_info->skb = NULL; 820 ATL1C_SET_BUFFER_STATE(buffer_info, ATL1C_BUFFER_FREE); 821 } 822 /* 823 * atl1c_clean_tx_ring - Free Tx-skb 824 * @adapter: board private structure 825 */ 826 static void atl1c_clean_tx_ring(struct atl1c_adapter *adapter, 827 enum atl1c_trans_queue type) 828 { 829 struct atl1c_tpd_ring *tpd_ring = &adapter->tpd_ring[type]; 830 struct atl1c_buffer *buffer_info; 831 struct pci_dev *pdev = adapter->pdev; 832 u16 index, ring_count; 833 834 ring_count = tpd_ring->count; 835 for (index = 0; index < ring_count; index++) { 836 buffer_info = &tpd_ring->buffer_info[index]; 837 atl1c_clean_buffer(pdev, buffer_info, 0); 838 } 839 840 /* Zero out Tx-buffers */ 841 memset(tpd_ring->desc, 0, sizeof(struct atl1c_tpd_desc) * 842 ring_count); 843 atomic_set(&tpd_ring->next_to_clean, 0); 844 tpd_ring->next_to_use = 0; 845 } 846 847 /* 848 * atl1c_clean_rx_ring - Free rx-reservation skbs 849 * @adapter: board private structure 850 */ 851 static void atl1c_clean_rx_ring(struct atl1c_adapter *adapter) 852 { 853 struct atl1c_rfd_ring *rfd_ring = adapter->rfd_ring; 854 struct atl1c_rrd_ring *rrd_ring = adapter->rrd_ring; 855 struct atl1c_buffer *buffer_info; 856 struct pci_dev *pdev = adapter->pdev; 857 int i, j; 858 859 for (i = 0; i < adapter->num_rx_queues; i++) { 860 for (j = 0; j < rfd_ring[i].count; j++) { 861 buffer_info = &rfd_ring[i].buffer_info[j]; 862 atl1c_clean_buffer(pdev, buffer_info, 0); 863 } 864 /* zero out the descriptor ring */ 865 memset(rfd_ring[i].desc, 0, rfd_ring[i].size); 866 rfd_ring[i].next_to_clean = 0; 867 rfd_ring[i].next_to_use = 0; 868 rrd_ring[i].next_to_use = 0; 869 rrd_ring[i].next_to_clean = 0; 870 } 871 } 872 873 /* 874 * Read / Write Ptr Initialize: 875 */ 876 static void atl1c_init_ring_ptrs(struct atl1c_adapter *adapter) 877 { 878 struct atl1c_tpd_ring *tpd_ring = adapter->tpd_ring; 879 struct atl1c_rfd_ring *rfd_ring = adapter->rfd_ring; 880 struct atl1c_rrd_ring *rrd_ring = adapter->rrd_ring; 881 struct atl1c_buffer *buffer_info; 882 int i, j; 883 884 for (i = 0; i < AT_MAX_TRANSMIT_QUEUE; i++) { 885 tpd_ring[i].next_to_use = 0; 886 atomic_set(&tpd_ring[i].next_to_clean, 0); 887 buffer_info = tpd_ring[i].buffer_info; 888 for (j = 0; j < tpd_ring->count; j++) 889 ATL1C_SET_BUFFER_STATE(&buffer_info[i], 890 ATL1C_BUFFER_FREE); 891 } 892 for (i = 0; i < adapter->num_rx_queues; i++) { 893 rfd_ring[i].next_to_use = 0; 894 rfd_ring[i].next_to_clean = 0; 895 rrd_ring[i].next_to_use = 0; 896 rrd_ring[i].next_to_clean = 0; 897 for (j = 0; j < rfd_ring[i].count; j++) { 898 buffer_info = &rfd_ring[i].buffer_info[j]; 899 ATL1C_SET_BUFFER_STATE(buffer_info, ATL1C_BUFFER_FREE); 900 } 901 } 902 } 903 904 /* 905 * atl1c_free_ring_resources - Free Tx / RX descriptor Resources 906 * @adapter: board private structure 907 * 908 * Free all transmit software resources 909 */ 910 static void atl1c_free_ring_resources(struct atl1c_adapter *adapter) 911 { 912 struct pci_dev *pdev = adapter->pdev; 913 914 pci_free_consistent(pdev, adapter->ring_header.size, 915 adapter->ring_header.desc, 916 adapter->ring_header.dma); 917 adapter->ring_header.desc = NULL; 918 919 /* Note: just free tdp_ring.buffer_info, 920 * it contain rfd_ring.buffer_info, do not double free */ 921 if (adapter->tpd_ring[0].buffer_info) { 922 kfree(adapter->tpd_ring[0].buffer_info); 923 adapter->tpd_ring[0].buffer_info = NULL; 924 } 925 } 926 927 /* 928 * atl1c_setup_mem_resources - allocate Tx / RX descriptor resources 929 * @adapter: board private structure 930 * 931 * Return 0 on success, negative on failure 932 */ 933 static int atl1c_setup_ring_resources(struct atl1c_adapter *adapter) 934 { 935 struct pci_dev *pdev = adapter->pdev; 936 struct atl1c_tpd_ring *tpd_ring = adapter->tpd_ring; 937 struct atl1c_rfd_ring *rfd_ring = adapter->rfd_ring; 938 struct atl1c_rrd_ring *rrd_ring = adapter->rrd_ring; 939 struct atl1c_ring_header *ring_header = &adapter->ring_header; 940 int num_rx_queues = adapter->num_rx_queues; 941 int size; 942 int i; 943 int count = 0; 944 int rx_desc_count = 0; 945 u32 offset = 0; 946 947 rrd_ring[0].count = rfd_ring[0].count; 948 for (i = 1; i < AT_MAX_TRANSMIT_QUEUE; i++) 949 tpd_ring[i].count = tpd_ring[0].count; 950 951 for (i = 1; i < adapter->num_rx_queues; i++) 952 rfd_ring[i].count = rrd_ring[i].count = rfd_ring[0].count; 953 954 /* 2 tpd queue, one high priority queue, 955 * another normal priority queue */ 956 size = sizeof(struct atl1c_buffer) * (tpd_ring->count * 2 + 957 rfd_ring->count * num_rx_queues); 958 tpd_ring->buffer_info = kzalloc(size, GFP_KERNEL); 959 if (unlikely(!tpd_ring->buffer_info)) { 960 dev_err(&pdev->dev, "kzalloc failed, size = %d\n", 961 size); 962 goto err_nomem; 963 } 964 for (i = 0; i < AT_MAX_TRANSMIT_QUEUE; i++) { 965 tpd_ring[i].buffer_info = 966 (struct atl1c_buffer *) (tpd_ring->buffer_info + count); 967 count += tpd_ring[i].count; 968 } 969 970 for (i = 0; i < num_rx_queues; i++) { 971 rfd_ring[i].buffer_info = 972 (struct atl1c_buffer *) (tpd_ring->buffer_info + count); 973 count += rfd_ring[i].count; 974 rx_desc_count += rfd_ring[i].count; 975 } 976 /* 977 * real ring DMA buffer 978 * each ring/block may need up to 8 bytes for alignment, hence the 979 * additional bytes tacked onto the end. 980 */ 981 ring_header->size = size = 982 sizeof(struct atl1c_tpd_desc) * tpd_ring->count * 2 + 983 sizeof(struct atl1c_rx_free_desc) * rx_desc_count + 984 sizeof(struct atl1c_recv_ret_status) * rx_desc_count + 985 sizeof(struct atl1c_hw_stats) + 986 8 * 4 + 8 * 2 * num_rx_queues; 987 988 ring_header->desc = pci_alloc_consistent(pdev, ring_header->size, 989 &ring_header->dma); 990 if (unlikely(!ring_header->desc)) { 991 dev_err(&pdev->dev, "pci_alloc_consistend failed\n"); 992 goto err_nomem; 993 } 994 memset(ring_header->desc, 0, ring_header->size); 995 /* init TPD ring */ 996 997 tpd_ring[0].dma = roundup(ring_header->dma, 8); 998 offset = tpd_ring[0].dma - ring_header->dma; 999 for (i = 0; i < AT_MAX_TRANSMIT_QUEUE; i++) { 1000 tpd_ring[i].dma = ring_header->dma + offset; 1001 tpd_ring[i].desc = (u8 *) ring_header->desc + offset; 1002 tpd_ring[i].size = 1003 sizeof(struct atl1c_tpd_desc) * tpd_ring[i].count; 1004 offset += roundup(tpd_ring[i].size, 8); 1005 } 1006 /* init RFD ring */ 1007 for (i = 0; i < num_rx_queues; i++) { 1008 rfd_ring[i].dma = ring_header->dma + offset; 1009 rfd_ring[i].desc = (u8 *) ring_header->desc + offset; 1010 rfd_ring[i].size = sizeof(struct atl1c_rx_free_desc) * 1011 rfd_ring[i].count; 1012 offset += roundup(rfd_ring[i].size, 8); 1013 } 1014 1015 /* init RRD ring */ 1016 for (i = 0; i < num_rx_queues; i++) { 1017 rrd_ring[i].dma = ring_header->dma + offset; 1018 rrd_ring[i].desc = (u8 *) ring_header->desc + offset; 1019 rrd_ring[i].size = sizeof(struct atl1c_recv_ret_status) * 1020 rrd_ring[i].count; 1021 offset += roundup(rrd_ring[i].size, 8); 1022 } 1023 1024 adapter->smb.dma = ring_header->dma + offset; 1025 adapter->smb.smb = (u8 *)ring_header->desc + offset; 1026 return 0; 1027 1028 err_nomem: 1029 kfree(tpd_ring->buffer_info); 1030 return -ENOMEM; 1031 } 1032 1033 static void atl1c_configure_des_ring(struct atl1c_adapter *adapter) 1034 { 1035 struct atl1c_hw *hw = &adapter->hw; 1036 struct atl1c_rfd_ring *rfd_ring = (struct atl1c_rfd_ring *) 1037 adapter->rfd_ring; 1038 struct atl1c_rrd_ring *rrd_ring = (struct atl1c_rrd_ring *) 1039 adapter->rrd_ring; 1040 struct atl1c_tpd_ring *tpd_ring = (struct atl1c_tpd_ring *) 1041 adapter->tpd_ring; 1042 struct atl1c_cmb *cmb = (struct atl1c_cmb *) &adapter->cmb; 1043 struct atl1c_smb *smb = (struct atl1c_smb *) &adapter->smb; 1044 int i; 1045 u32 data; 1046 1047 /* TPD */ 1048 AT_WRITE_REG(hw, REG_TX_BASE_ADDR_HI, 1049 (u32)((tpd_ring[atl1c_trans_normal].dma & 1050 AT_DMA_HI_ADDR_MASK) >> 32)); 1051 /* just enable normal priority TX queue */ 1052 AT_WRITE_REG(hw, REG_NTPD_HEAD_ADDR_LO, 1053 (u32)(tpd_ring[atl1c_trans_normal].dma & 1054 AT_DMA_LO_ADDR_MASK)); 1055 AT_WRITE_REG(hw, REG_HTPD_HEAD_ADDR_LO, 1056 (u32)(tpd_ring[atl1c_trans_high].dma & 1057 AT_DMA_LO_ADDR_MASK)); 1058 AT_WRITE_REG(hw, REG_TPD_RING_SIZE, 1059 (u32)(tpd_ring[0].count & TPD_RING_SIZE_MASK)); 1060 1061 1062 /* RFD */ 1063 AT_WRITE_REG(hw, REG_RX_BASE_ADDR_HI, 1064 (u32)((rfd_ring[0].dma & AT_DMA_HI_ADDR_MASK) >> 32)); 1065 for (i = 0; i < adapter->num_rx_queues; i++) 1066 AT_WRITE_REG(hw, atl1c_rfd_addr_lo_regs[i], 1067 (u32)(rfd_ring[i].dma & AT_DMA_LO_ADDR_MASK)); 1068 1069 AT_WRITE_REG(hw, REG_RFD_RING_SIZE, 1070 rfd_ring[0].count & RFD_RING_SIZE_MASK); 1071 AT_WRITE_REG(hw, REG_RX_BUF_SIZE, 1072 adapter->rx_buffer_len & RX_BUF_SIZE_MASK); 1073 1074 /* RRD */ 1075 for (i = 0; i < adapter->num_rx_queues; i++) 1076 AT_WRITE_REG(hw, atl1c_rrd_addr_lo_regs[i], 1077 (u32)(rrd_ring[i].dma & AT_DMA_LO_ADDR_MASK)); 1078 AT_WRITE_REG(hw, REG_RRD_RING_SIZE, 1079 (rrd_ring[0].count & RRD_RING_SIZE_MASK)); 1080 1081 /* CMB */ 1082 AT_WRITE_REG(hw, REG_CMB_BASE_ADDR_LO, cmb->dma & AT_DMA_LO_ADDR_MASK); 1083 1084 /* SMB */ 1085 AT_WRITE_REG(hw, REG_SMB_BASE_ADDR_HI, 1086 (u32)((smb->dma & AT_DMA_HI_ADDR_MASK) >> 32)); 1087 AT_WRITE_REG(hw, REG_SMB_BASE_ADDR_LO, 1088 (u32)(smb->dma & AT_DMA_LO_ADDR_MASK)); 1089 if (hw->nic_type == athr_l2c_b) { 1090 AT_WRITE_REG(hw, REG_SRAM_RXF_LEN, 0x02a0L); 1091 AT_WRITE_REG(hw, REG_SRAM_TXF_LEN, 0x0100L); 1092 AT_WRITE_REG(hw, REG_SRAM_RXF_ADDR, 0x029f0000L); 1093 AT_WRITE_REG(hw, REG_SRAM_RFD0_INFO, 0x02bf02a0L); 1094 AT_WRITE_REG(hw, REG_SRAM_TXF_ADDR, 0x03bf02c0L); 1095 AT_WRITE_REG(hw, REG_SRAM_TRD_ADDR, 0x03df03c0L); 1096 AT_WRITE_REG(hw, REG_TXF_WATER_MARK, 0); /* TX watermark, to enter l1 state.*/ 1097 AT_WRITE_REG(hw, REG_RXD_DMA_CTRL, 0); /* RXD threshold.*/ 1098 } 1099 if (hw->nic_type == athr_l2c_b || hw->nic_type == athr_l1d_2) { 1100 /* Power Saving for L2c_B */ 1101 AT_READ_REG(hw, REG_SERDES_LOCK, &data); 1102 data |= SERDES_MAC_CLK_SLOWDOWN; 1103 data |= SERDES_PYH_CLK_SLOWDOWN; 1104 AT_WRITE_REG(hw, REG_SERDES_LOCK, data); 1105 } 1106 /* Load all of base address above */ 1107 AT_WRITE_REG(hw, REG_LOAD_PTR, 1); 1108 } 1109 1110 static void atl1c_configure_tx(struct atl1c_adapter *adapter) 1111 { 1112 struct atl1c_hw *hw = &adapter->hw; 1113 u32 dev_ctrl_data; 1114 u32 max_pay_load; 1115 u16 tx_offload_thresh; 1116 u32 txq_ctrl_data; 1117 u32 max_pay_load_data; 1118 1119 tx_offload_thresh = MAX_TX_OFFLOAD_THRESH; 1120 AT_WRITE_REG(hw, REG_TX_TSO_OFFLOAD_THRESH, 1121 (tx_offload_thresh >> 3) & TX_TSO_OFFLOAD_THRESH_MASK); 1122 AT_READ_REG(hw, REG_DEVICE_CTRL, &dev_ctrl_data); 1123 max_pay_load = (dev_ctrl_data >> DEVICE_CTRL_MAX_PAYLOAD_SHIFT) & 1124 DEVICE_CTRL_MAX_PAYLOAD_MASK; 1125 hw->dmaw_block = min_t(u32, max_pay_load, hw->dmaw_block); 1126 max_pay_load = (dev_ctrl_data >> DEVICE_CTRL_MAX_RREQ_SZ_SHIFT) & 1127 DEVICE_CTRL_MAX_RREQ_SZ_MASK; 1128 hw->dmar_block = min_t(u32, max_pay_load, hw->dmar_block); 1129 1130 txq_ctrl_data = (hw->tpd_burst & TXQ_NUM_TPD_BURST_MASK) << 1131 TXQ_NUM_TPD_BURST_SHIFT; 1132 if (hw->ctrl_flags & ATL1C_TXQ_MODE_ENHANCE) 1133 txq_ctrl_data |= TXQ_CTRL_ENH_MODE; 1134 max_pay_load_data = (atl1c_pay_load_size[hw->dmar_block] & 1135 TXQ_TXF_BURST_NUM_MASK) << TXQ_TXF_BURST_NUM_SHIFT; 1136 if (hw->nic_type == athr_l2c_b || hw->nic_type == athr_l2c_b2) 1137 max_pay_load_data >>= 1; 1138 txq_ctrl_data |= max_pay_load_data; 1139 1140 AT_WRITE_REG(hw, REG_TXQ_CTRL, txq_ctrl_data); 1141 } 1142 1143 static void atl1c_configure_rx(struct atl1c_adapter *adapter) 1144 { 1145 struct atl1c_hw *hw = &adapter->hw; 1146 u32 rxq_ctrl_data; 1147 1148 rxq_ctrl_data = (hw->rfd_burst & RXQ_RFD_BURST_NUM_MASK) << 1149 RXQ_RFD_BURST_NUM_SHIFT; 1150 1151 if (hw->ctrl_flags & ATL1C_RX_IPV6_CHKSUM) 1152 rxq_ctrl_data |= IPV6_CHKSUM_CTRL_EN; 1153 if (hw->rss_type == atl1c_rss_ipv4) 1154 rxq_ctrl_data |= RSS_HASH_IPV4; 1155 if (hw->rss_type == atl1c_rss_ipv4_tcp) 1156 rxq_ctrl_data |= RSS_HASH_IPV4_TCP; 1157 if (hw->rss_type == atl1c_rss_ipv6) 1158 rxq_ctrl_data |= RSS_HASH_IPV6; 1159 if (hw->rss_type == atl1c_rss_ipv6_tcp) 1160 rxq_ctrl_data |= RSS_HASH_IPV6_TCP; 1161 if (hw->rss_type != atl1c_rss_disable) 1162 rxq_ctrl_data |= RRS_HASH_CTRL_EN; 1163 1164 rxq_ctrl_data |= (hw->rss_mode & RSS_MODE_MASK) << 1165 RSS_MODE_SHIFT; 1166 rxq_ctrl_data |= (hw->rss_hash_bits & RSS_HASH_BITS_MASK) << 1167 RSS_HASH_BITS_SHIFT; 1168 if (hw->ctrl_flags & ATL1C_ASPM_CTRL_MON) 1169 rxq_ctrl_data |= (ASPM_THRUPUT_LIMIT_1M & 1170 ASPM_THRUPUT_LIMIT_MASK) << ASPM_THRUPUT_LIMIT_SHIFT; 1171 1172 AT_WRITE_REG(hw, REG_RXQ_CTRL, rxq_ctrl_data); 1173 } 1174 1175 static void atl1c_configure_rss(struct atl1c_adapter *adapter) 1176 { 1177 struct atl1c_hw *hw = &adapter->hw; 1178 1179 AT_WRITE_REG(hw, REG_IDT_TABLE, hw->indirect_tab); 1180 AT_WRITE_REG(hw, REG_BASE_CPU_NUMBER, hw->base_cpu); 1181 } 1182 1183 static void atl1c_configure_dma(struct atl1c_adapter *adapter) 1184 { 1185 struct atl1c_hw *hw = &adapter->hw; 1186 u32 dma_ctrl_data; 1187 1188 dma_ctrl_data = DMA_CTRL_DMAR_REQ_PRI; 1189 if (hw->ctrl_flags & ATL1C_CMB_ENABLE) 1190 dma_ctrl_data |= DMA_CTRL_CMB_EN; 1191 if (hw->ctrl_flags & ATL1C_SMB_ENABLE) 1192 dma_ctrl_data |= DMA_CTRL_SMB_EN; 1193 else 1194 dma_ctrl_data |= MAC_CTRL_SMB_DIS; 1195 1196 switch (hw->dma_order) { 1197 case atl1c_dma_ord_in: 1198 dma_ctrl_data |= DMA_CTRL_DMAR_IN_ORDER; 1199 break; 1200 case atl1c_dma_ord_enh: 1201 dma_ctrl_data |= DMA_CTRL_DMAR_ENH_ORDER; 1202 break; 1203 case atl1c_dma_ord_out: 1204 dma_ctrl_data |= DMA_CTRL_DMAR_OUT_ORDER; 1205 break; 1206 default: 1207 break; 1208 } 1209 1210 dma_ctrl_data |= (((u32)hw->dmar_block) & DMA_CTRL_DMAR_BURST_LEN_MASK) 1211 << DMA_CTRL_DMAR_BURST_LEN_SHIFT; 1212 dma_ctrl_data |= (((u32)hw->dmaw_block) & DMA_CTRL_DMAW_BURST_LEN_MASK) 1213 << DMA_CTRL_DMAW_BURST_LEN_SHIFT; 1214 dma_ctrl_data |= (((u32)hw->dmar_dly_cnt) & DMA_CTRL_DMAR_DLY_CNT_MASK) 1215 << DMA_CTRL_DMAR_DLY_CNT_SHIFT; 1216 dma_ctrl_data |= (((u32)hw->dmaw_dly_cnt) & DMA_CTRL_DMAW_DLY_CNT_MASK) 1217 << DMA_CTRL_DMAW_DLY_CNT_SHIFT; 1218 1219 AT_WRITE_REG(hw, REG_DMA_CTRL, dma_ctrl_data); 1220 } 1221 1222 /* 1223 * Stop the mac, transmit and receive units 1224 * hw - Struct containing variables accessed by shared code 1225 * return : 0 or idle status (if error) 1226 */ 1227 static int atl1c_stop_mac(struct atl1c_hw *hw) 1228 { 1229 u32 data; 1230 1231 AT_READ_REG(hw, REG_RXQ_CTRL, &data); 1232 data &= ~(RXQ1_CTRL_EN | RXQ2_CTRL_EN | 1233 RXQ3_CTRL_EN | RXQ_CTRL_EN); 1234 AT_WRITE_REG(hw, REG_RXQ_CTRL, data); 1235 1236 AT_READ_REG(hw, REG_TXQ_CTRL, &data); 1237 data &= ~TXQ_CTRL_EN; 1238 AT_WRITE_REG(hw, REG_TWSI_CTRL, data); 1239 1240 atl1c_wait_until_idle(hw); 1241 1242 AT_READ_REG(hw, REG_MAC_CTRL, &data); 1243 data &= ~(MAC_CTRL_TX_EN | MAC_CTRL_RX_EN); 1244 AT_WRITE_REG(hw, REG_MAC_CTRL, data); 1245 1246 return (int)atl1c_wait_until_idle(hw); 1247 } 1248 1249 static void atl1c_enable_rx_ctrl(struct atl1c_hw *hw) 1250 { 1251 u32 data; 1252 1253 AT_READ_REG(hw, REG_RXQ_CTRL, &data); 1254 switch (hw->adapter->num_rx_queues) { 1255 case 4: 1256 data |= (RXQ3_CTRL_EN | RXQ2_CTRL_EN | RXQ1_CTRL_EN); 1257 break; 1258 case 3: 1259 data |= (RXQ2_CTRL_EN | RXQ1_CTRL_EN); 1260 break; 1261 case 2: 1262 data |= RXQ1_CTRL_EN; 1263 break; 1264 default: 1265 break; 1266 } 1267 data |= RXQ_CTRL_EN; 1268 AT_WRITE_REG(hw, REG_RXQ_CTRL, data); 1269 } 1270 1271 static void atl1c_enable_tx_ctrl(struct atl1c_hw *hw) 1272 { 1273 u32 data; 1274 1275 AT_READ_REG(hw, REG_TXQ_CTRL, &data); 1276 data |= TXQ_CTRL_EN; 1277 AT_WRITE_REG(hw, REG_TXQ_CTRL, data); 1278 } 1279 1280 /* 1281 * Reset the transmit and receive units; mask and clear all interrupts. 1282 * hw - Struct containing variables accessed by shared code 1283 * return : 0 or idle status (if error) 1284 */ 1285 static int atl1c_reset_mac(struct atl1c_hw *hw) 1286 { 1287 struct atl1c_adapter *adapter = (struct atl1c_adapter *)hw->adapter; 1288 struct pci_dev *pdev = adapter->pdev; 1289 u32 master_ctrl_data = 0; 1290 1291 AT_WRITE_REG(hw, REG_IMR, 0); 1292 AT_WRITE_REG(hw, REG_ISR, ISR_DIS_INT); 1293 1294 atl1c_stop_mac(hw); 1295 /* 1296 * Issue Soft Reset to the MAC. This will reset the chip's 1297 * transmit, receive, DMA. It will not effect 1298 * the current PCI configuration. The global reset bit is self- 1299 * clearing, and should clear within a microsecond. 1300 */ 1301 AT_READ_REG(hw, REG_MASTER_CTRL, &master_ctrl_data); 1302 master_ctrl_data |= MASTER_CTRL_OOB_DIS_OFF; 1303 AT_WRITE_REGW(hw, REG_MASTER_CTRL, ((master_ctrl_data | MASTER_CTRL_SOFT_RST) 1304 & 0xFFFF)); 1305 1306 AT_WRITE_FLUSH(hw); 1307 msleep(10); 1308 /* Wait at least 10ms for All module to be Idle */ 1309 1310 if (atl1c_wait_until_idle(hw)) { 1311 dev_err(&pdev->dev, 1312 "MAC state machine can't be idle since" 1313 " disabled for 10ms second\n"); 1314 return -1; 1315 } 1316 return 0; 1317 } 1318 1319 static void atl1c_disable_l0s_l1(struct atl1c_hw *hw) 1320 { 1321 u32 pm_ctrl_data; 1322 1323 AT_READ_REG(hw, REG_PM_CTRL, &pm_ctrl_data); 1324 pm_ctrl_data &= ~(PM_CTRL_L1_ENTRY_TIMER_MASK << 1325 PM_CTRL_L1_ENTRY_TIMER_SHIFT); 1326 pm_ctrl_data &= ~PM_CTRL_CLK_SWH_L1; 1327 pm_ctrl_data &= ~PM_CTRL_ASPM_L0S_EN; 1328 pm_ctrl_data &= ~PM_CTRL_ASPM_L1_EN; 1329 pm_ctrl_data &= ~PM_CTRL_MAC_ASPM_CHK; 1330 pm_ctrl_data &= ~PM_CTRL_SERDES_PD_EX_L1; 1331 1332 pm_ctrl_data |= PM_CTRL_SERDES_BUDS_RX_L1_EN; 1333 pm_ctrl_data |= PM_CTRL_SERDES_PLL_L1_EN; 1334 pm_ctrl_data |= PM_CTRL_SERDES_L1_EN; 1335 AT_WRITE_REG(hw, REG_PM_CTRL, pm_ctrl_data); 1336 } 1337 1338 /* 1339 * Set ASPM state. 1340 * Enable/disable L0s/L1 depend on link state. 1341 */ 1342 static void atl1c_set_aspm(struct atl1c_hw *hw, bool linkup) 1343 { 1344 u32 pm_ctrl_data; 1345 u32 link_ctrl_data; 1346 u32 link_l1_timer = 0xF; 1347 1348 AT_READ_REG(hw, REG_PM_CTRL, &pm_ctrl_data); 1349 AT_READ_REG(hw, REG_LINK_CTRL, &link_ctrl_data); 1350 1351 pm_ctrl_data &= ~PM_CTRL_SERDES_PD_EX_L1; 1352 pm_ctrl_data &= ~(PM_CTRL_L1_ENTRY_TIMER_MASK << 1353 PM_CTRL_L1_ENTRY_TIMER_SHIFT); 1354 pm_ctrl_data &= ~(PM_CTRL_LCKDET_TIMER_MASK << 1355 PM_CTRL_LCKDET_TIMER_SHIFT); 1356 pm_ctrl_data |= AT_LCKDET_TIMER << PM_CTRL_LCKDET_TIMER_SHIFT; 1357 1358 if (hw->nic_type == athr_l2c_b || hw->nic_type == athr_l1d || 1359 hw->nic_type == athr_l2c_b2 || hw->nic_type == athr_l1d_2) { 1360 link_ctrl_data &= ~LINK_CTRL_EXT_SYNC; 1361 if (!(hw->ctrl_flags & ATL1C_APS_MODE_ENABLE)) { 1362 if (hw->nic_type == athr_l2c_b && hw->revision_id == L2CB_V10) 1363 link_ctrl_data |= LINK_CTRL_EXT_SYNC; 1364 } 1365 1366 AT_WRITE_REG(hw, REG_LINK_CTRL, link_ctrl_data); 1367 1368 pm_ctrl_data |= PM_CTRL_RCVR_WT_TIMER; 1369 pm_ctrl_data &= ~(PM_CTRL_PM_REQ_TIMER_MASK << 1370 PM_CTRL_PM_REQ_TIMER_SHIFT); 1371 pm_ctrl_data |= AT_ASPM_L1_TIMER << 1372 PM_CTRL_PM_REQ_TIMER_SHIFT; 1373 pm_ctrl_data &= ~PM_CTRL_SA_DLY_EN; 1374 pm_ctrl_data &= ~PM_CTRL_HOTRST; 1375 pm_ctrl_data |= 1 << PM_CTRL_L1_ENTRY_TIMER_SHIFT; 1376 pm_ctrl_data |= PM_CTRL_SERDES_PD_EX_L1; 1377 } 1378 pm_ctrl_data |= PM_CTRL_MAC_ASPM_CHK; 1379 if (linkup) { 1380 pm_ctrl_data &= ~PM_CTRL_ASPM_L1_EN; 1381 pm_ctrl_data &= ~PM_CTRL_ASPM_L0S_EN; 1382 if (hw->ctrl_flags & ATL1C_ASPM_L1_SUPPORT) 1383 pm_ctrl_data |= PM_CTRL_ASPM_L1_EN; 1384 if (hw->ctrl_flags & ATL1C_ASPM_L0S_SUPPORT) 1385 pm_ctrl_data |= PM_CTRL_ASPM_L0S_EN; 1386 1387 if (hw->nic_type == athr_l2c_b || hw->nic_type == athr_l1d || 1388 hw->nic_type == athr_l2c_b2 || hw->nic_type == athr_l1d_2) { 1389 if (hw->nic_type == athr_l2c_b) 1390 if (!(hw->ctrl_flags & ATL1C_APS_MODE_ENABLE)) 1391 pm_ctrl_data &= ~PM_CTRL_ASPM_L0S_EN; 1392 pm_ctrl_data &= ~PM_CTRL_SERDES_L1_EN; 1393 pm_ctrl_data &= ~PM_CTRL_SERDES_PLL_L1_EN; 1394 pm_ctrl_data &= ~PM_CTRL_SERDES_BUDS_RX_L1_EN; 1395 pm_ctrl_data |= PM_CTRL_CLK_SWH_L1; 1396 if (hw->adapter->link_speed == SPEED_100 || 1397 hw->adapter->link_speed == SPEED_1000) { 1398 pm_ctrl_data &= ~(PM_CTRL_L1_ENTRY_TIMER_MASK << 1399 PM_CTRL_L1_ENTRY_TIMER_SHIFT); 1400 if (hw->nic_type == athr_l2c_b) 1401 link_l1_timer = 7; 1402 else if (hw->nic_type == athr_l2c_b2 || 1403 hw->nic_type == athr_l1d_2) 1404 link_l1_timer = 4; 1405 pm_ctrl_data |= link_l1_timer << 1406 PM_CTRL_L1_ENTRY_TIMER_SHIFT; 1407 } 1408 } else { 1409 pm_ctrl_data |= PM_CTRL_SERDES_L1_EN; 1410 pm_ctrl_data |= PM_CTRL_SERDES_PLL_L1_EN; 1411 pm_ctrl_data |= PM_CTRL_SERDES_BUDS_RX_L1_EN; 1412 pm_ctrl_data &= ~PM_CTRL_CLK_SWH_L1; 1413 pm_ctrl_data &= ~PM_CTRL_ASPM_L0S_EN; 1414 pm_ctrl_data &= ~PM_CTRL_ASPM_L1_EN; 1415 1416 } 1417 } else { 1418 pm_ctrl_data &= ~PM_CTRL_SERDES_L1_EN; 1419 pm_ctrl_data &= ~PM_CTRL_ASPM_L0S_EN; 1420 pm_ctrl_data &= ~PM_CTRL_SERDES_PLL_L1_EN; 1421 pm_ctrl_data |= PM_CTRL_CLK_SWH_L1; 1422 1423 if (hw->ctrl_flags & ATL1C_ASPM_L1_SUPPORT) 1424 pm_ctrl_data |= PM_CTRL_ASPM_L1_EN; 1425 else 1426 pm_ctrl_data &= ~PM_CTRL_ASPM_L1_EN; 1427 } 1428 AT_WRITE_REG(hw, REG_PM_CTRL, pm_ctrl_data); 1429 1430 return; 1431 } 1432 1433 static void atl1c_setup_mac_ctrl(struct atl1c_adapter *adapter) 1434 { 1435 struct atl1c_hw *hw = &adapter->hw; 1436 struct net_device *netdev = adapter->netdev; 1437 u32 mac_ctrl_data; 1438 1439 mac_ctrl_data = MAC_CTRL_TX_EN | MAC_CTRL_RX_EN; 1440 mac_ctrl_data |= (MAC_CTRL_TX_FLOW | MAC_CTRL_RX_FLOW); 1441 1442 if (adapter->link_duplex == FULL_DUPLEX) { 1443 hw->mac_duplex = true; 1444 mac_ctrl_data |= MAC_CTRL_DUPLX; 1445 } 1446 1447 if (adapter->link_speed == SPEED_1000) 1448 hw->mac_speed = atl1c_mac_speed_1000; 1449 else 1450 hw->mac_speed = atl1c_mac_speed_10_100; 1451 1452 mac_ctrl_data |= (hw->mac_speed & MAC_CTRL_SPEED_MASK) << 1453 MAC_CTRL_SPEED_SHIFT; 1454 1455 mac_ctrl_data |= (MAC_CTRL_ADD_CRC | MAC_CTRL_PAD); 1456 mac_ctrl_data |= ((hw->preamble_len & MAC_CTRL_PRMLEN_MASK) << 1457 MAC_CTRL_PRMLEN_SHIFT); 1458 1459 __atl1c_vlan_mode(netdev->features, &mac_ctrl_data); 1460 1461 mac_ctrl_data |= MAC_CTRL_BC_EN; 1462 if (netdev->flags & IFF_PROMISC) 1463 mac_ctrl_data |= MAC_CTRL_PROMIS_EN; 1464 if (netdev->flags & IFF_ALLMULTI) 1465 mac_ctrl_data |= MAC_CTRL_MC_ALL_EN; 1466 1467 mac_ctrl_data |= MAC_CTRL_SINGLE_PAUSE_EN; 1468 if (hw->nic_type == athr_l1d || hw->nic_type == athr_l2c_b2 || 1469 hw->nic_type == athr_l1d_2) { 1470 mac_ctrl_data |= MAC_CTRL_SPEED_MODE_SW; 1471 mac_ctrl_data |= MAC_CTRL_HASH_ALG_CRC32; 1472 } 1473 AT_WRITE_REG(hw, REG_MAC_CTRL, mac_ctrl_data); 1474 } 1475 1476 /* 1477 * atl1c_configure - Configure Transmit&Receive Unit after Reset 1478 * @adapter: board private structure 1479 * 1480 * Configure the Tx /Rx unit of the MAC after a reset. 1481 */ 1482 static int atl1c_configure(struct atl1c_adapter *adapter) 1483 { 1484 struct atl1c_hw *hw = &adapter->hw; 1485 u32 master_ctrl_data = 0; 1486 u32 intr_modrt_data; 1487 u32 data; 1488 1489 /* clear interrupt status */ 1490 AT_WRITE_REG(hw, REG_ISR, 0xFFFFFFFF); 1491 /* Clear any WOL status */ 1492 AT_WRITE_REG(hw, REG_WOL_CTRL, 0); 1493 /* set Interrupt Clear Timer 1494 * HW will enable self to assert interrupt event to system after 1495 * waiting x-time for software to notify it accept interrupt. 1496 */ 1497 1498 data = CLK_GATING_EN_ALL; 1499 if (hw->ctrl_flags & ATL1C_CLK_GATING_EN) { 1500 if (hw->nic_type == athr_l2c_b) 1501 data &= ~CLK_GATING_RXMAC_EN; 1502 } else 1503 data = 0; 1504 AT_WRITE_REG(hw, REG_CLK_GATING_CTRL, data); 1505 1506 AT_WRITE_REG(hw, REG_INT_RETRIG_TIMER, 1507 hw->ict & INT_RETRIG_TIMER_MASK); 1508 1509 atl1c_configure_des_ring(adapter); 1510 1511 if (hw->ctrl_flags & ATL1C_INTR_MODRT_ENABLE) { 1512 intr_modrt_data = (hw->tx_imt & IRQ_MODRT_TIMER_MASK) << 1513 IRQ_MODRT_TX_TIMER_SHIFT; 1514 intr_modrt_data |= (hw->rx_imt & IRQ_MODRT_TIMER_MASK) << 1515 IRQ_MODRT_RX_TIMER_SHIFT; 1516 AT_WRITE_REG(hw, REG_IRQ_MODRT_TIMER_INIT, intr_modrt_data); 1517 master_ctrl_data |= 1518 MASTER_CTRL_TX_ITIMER_EN | MASTER_CTRL_RX_ITIMER_EN; 1519 } 1520 1521 if (hw->ctrl_flags & ATL1C_INTR_CLEAR_ON_READ) 1522 master_ctrl_data |= MASTER_CTRL_INT_RDCLR; 1523 1524 master_ctrl_data |= MASTER_CTRL_SA_TIMER_EN; 1525 AT_WRITE_REG(hw, REG_MASTER_CTRL, master_ctrl_data); 1526 1527 if (hw->ctrl_flags & ATL1C_CMB_ENABLE) { 1528 AT_WRITE_REG(hw, REG_CMB_TPD_THRESH, 1529 hw->cmb_tpd & CMB_TPD_THRESH_MASK); 1530 AT_WRITE_REG(hw, REG_CMB_TX_TIMER, 1531 hw->cmb_tx_timer & CMB_TX_TIMER_MASK); 1532 } 1533 1534 if (hw->ctrl_flags & ATL1C_SMB_ENABLE) 1535 AT_WRITE_REG(hw, REG_SMB_STAT_TIMER, 1536 hw->smb_timer & SMB_STAT_TIMER_MASK); 1537 /* set MTU */ 1538 AT_WRITE_REG(hw, REG_MTU, hw->max_frame_size + ETH_HLEN + 1539 VLAN_HLEN + ETH_FCS_LEN); 1540 /* HDS, disable */ 1541 AT_WRITE_REG(hw, REG_HDS_CTRL, 0); 1542 1543 atl1c_configure_tx(adapter); 1544 atl1c_configure_rx(adapter); 1545 atl1c_configure_rss(adapter); 1546 atl1c_configure_dma(adapter); 1547 1548 return 0; 1549 } 1550 1551 static void atl1c_update_hw_stats(struct atl1c_adapter *adapter) 1552 { 1553 u16 hw_reg_addr = 0; 1554 unsigned long *stats_item = NULL; 1555 u32 data; 1556 1557 /* update rx status */ 1558 hw_reg_addr = REG_MAC_RX_STATUS_BIN; 1559 stats_item = &adapter->hw_stats.rx_ok; 1560 while (hw_reg_addr <= REG_MAC_RX_STATUS_END) { 1561 AT_READ_REG(&adapter->hw, hw_reg_addr, &data); 1562 *stats_item += data; 1563 stats_item++; 1564 hw_reg_addr += 4; 1565 } 1566 /* update tx status */ 1567 hw_reg_addr = REG_MAC_TX_STATUS_BIN; 1568 stats_item = &adapter->hw_stats.tx_ok; 1569 while (hw_reg_addr <= REG_MAC_TX_STATUS_END) { 1570 AT_READ_REG(&adapter->hw, hw_reg_addr, &data); 1571 *stats_item += data; 1572 stats_item++; 1573 hw_reg_addr += 4; 1574 } 1575 } 1576 1577 /* 1578 * atl1c_get_stats - Get System Network Statistics 1579 * @netdev: network interface device structure 1580 * 1581 * Returns the address of the device statistics structure. 1582 * The statistics are actually updated from the timer callback. 1583 */ 1584 static struct net_device_stats *atl1c_get_stats(struct net_device *netdev) 1585 { 1586 struct atl1c_adapter *adapter = netdev_priv(netdev); 1587 struct atl1c_hw_stats *hw_stats = &adapter->hw_stats; 1588 struct net_device_stats *net_stats = &netdev->stats; 1589 1590 atl1c_update_hw_stats(adapter); 1591 net_stats->rx_packets = hw_stats->rx_ok; 1592 net_stats->tx_packets = hw_stats->tx_ok; 1593 net_stats->rx_bytes = hw_stats->rx_byte_cnt; 1594 net_stats->tx_bytes = hw_stats->tx_byte_cnt; 1595 net_stats->multicast = hw_stats->rx_mcast; 1596 net_stats->collisions = hw_stats->tx_1_col + 1597 hw_stats->tx_2_col * 2 + 1598 hw_stats->tx_late_col + hw_stats->tx_abort_col; 1599 net_stats->rx_errors = hw_stats->rx_frag + hw_stats->rx_fcs_err + 1600 hw_stats->rx_len_err + hw_stats->rx_sz_ov + 1601 hw_stats->rx_rrd_ov + hw_stats->rx_align_err; 1602 net_stats->rx_fifo_errors = hw_stats->rx_rxf_ov; 1603 net_stats->rx_length_errors = hw_stats->rx_len_err; 1604 net_stats->rx_crc_errors = hw_stats->rx_fcs_err; 1605 net_stats->rx_frame_errors = hw_stats->rx_align_err; 1606 net_stats->rx_over_errors = hw_stats->rx_rrd_ov + hw_stats->rx_rxf_ov; 1607 1608 net_stats->rx_missed_errors = hw_stats->rx_rrd_ov + hw_stats->rx_rxf_ov; 1609 1610 net_stats->tx_errors = hw_stats->tx_late_col + hw_stats->tx_abort_col + 1611 hw_stats->tx_underrun + hw_stats->tx_trunc; 1612 net_stats->tx_fifo_errors = hw_stats->tx_underrun; 1613 net_stats->tx_aborted_errors = hw_stats->tx_abort_col; 1614 net_stats->tx_window_errors = hw_stats->tx_late_col; 1615 1616 return net_stats; 1617 } 1618 1619 static inline void atl1c_clear_phy_int(struct atl1c_adapter *adapter) 1620 { 1621 u16 phy_data; 1622 1623 spin_lock(&adapter->mdio_lock); 1624 atl1c_read_phy_reg(&adapter->hw, MII_ISR, &phy_data); 1625 spin_unlock(&adapter->mdio_lock); 1626 } 1627 1628 static bool atl1c_clean_tx_irq(struct atl1c_adapter *adapter, 1629 enum atl1c_trans_queue type) 1630 { 1631 struct atl1c_tpd_ring *tpd_ring = (struct atl1c_tpd_ring *) 1632 &adapter->tpd_ring[type]; 1633 struct atl1c_buffer *buffer_info; 1634 struct pci_dev *pdev = adapter->pdev; 1635 u16 next_to_clean = atomic_read(&tpd_ring->next_to_clean); 1636 u16 hw_next_to_clean; 1637 u16 shift; 1638 u32 data; 1639 1640 if (type == atl1c_trans_high) 1641 shift = MB_HTPD_CONS_IDX_SHIFT; 1642 else 1643 shift = MB_NTPD_CONS_IDX_SHIFT; 1644 1645 AT_READ_REG(&adapter->hw, REG_MB_PRIO_CONS_IDX, &data); 1646 hw_next_to_clean = (data >> shift) & MB_PRIO_PROD_IDX_MASK; 1647 1648 while (next_to_clean != hw_next_to_clean) { 1649 buffer_info = &tpd_ring->buffer_info[next_to_clean]; 1650 atl1c_clean_buffer(pdev, buffer_info, 1); 1651 if (++next_to_clean == tpd_ring->count) 1652 next_to_clean = 0; 1653 atomic_set(&tpd_ring->next_to_clean, next_to_clean); 1654 } 1655 1656 if (netif_queue_stopped(adapter->netdev) && 1657 netif_carrier_ok(adapter->netdev)) { 1658 netif_wake_queue(adapter->netdev); 1659 } 1660 1661 return true; 1662 } 1663 1664 /* 1665 * atl1c_intr - Interrupt Handler 1666 * @irq: interrupt number 1667 * @data: pointer to a network interface device structure 1668 * @pt_regs: CPU registers structure 1669 */ 1670 static irqreturn_t atl1c_intr(int irq, void *data) 1671 { 1672 struct net_device *netdev = data; 1673 struct atl1c_adapter *adapter = netdev_priv(netdev); 1674 struct pci_dev *pdev = adapter->pdev; 1675 struct atl1c_hw *hw = &adapter->hw; 1676 int max_ints = AT_MAX_INT_WORK; 1677 int handled = IRQ_NONE; 1678 u32 status; 1679 u32 reg_data; 1680 1681 do { 1682 AT_READ_REG(hw, REG_ISR, ®_data); 1683 status = reg_data & hw->intr_mask; 1684 1685 if (status == 0 || (status & ISR_DIS_INT) != 0) { 1686 if (max_ints != AT_MAX_INT_WORK) 1687 handled = IRQ_HANDLED; 1688 break; 1689 } 1690 /* link event */ 1691 if (status & ISR_GPHY) 1692 atl1c_clear_phy_int(adapter); 1693 /* Ack ISR */ 1694 AT_WRITE_REG(hw, REG_ISR, status | ISR_DIS_INT); 1695 if (status & ISR_RX_PKT) { 1696 if (likely(napi_schedule_prep(&adapter->napi))) { 1697 hw->intr_mask &= ~ISR_RX_PKT; 1698 AT_WRITE_REG(hw, REG_IMR, hw->intr_mask); 1699 __napi_schedule(&adapter->napi); 1700 } 1701 } 1702 if (status & ISR_TX_PKT) 1703 atl1c_clean_tx_irq(adapter, atl1c_trans_normal); 1704 1705 handled = IRQ_HANDLED; 1706 /* check if PCIE PHY Link down */ 1707 if (status & ISR_ERROR) { 1708 if (netif_msg_hw(adapter)) 1709 dev_err(&pdev->dev, 1710 "atl1c hardware error (status = 0x%x)\n", 1711 status & ISR_ERROR); 1712 /* reset MAC */ 1713 adapter->work_event |= ATL1C_WORK_EVENT_RESET; 1714 schedule_work(&adapter->common_task); 1715 return IRQ_HANDLED; 1716 } 1717 1718 if (status & ISR_OVER) 1719 if (netif_msg_intr(adapter)) 1720 dev_warn(&pdev->dev, 1721 "TX/RX overflow (status = 0x%x)\n", 1722 status & ISR_OVER); 1723 1724 /* link event */ 1725 if (status & (ISR_GPHY | ISR_MANUAL)) { 1726 netdev->stats.tx_carrier_errors++; 1727 atl1c_link_chg_event(adapter); 1728 break; 1729 } 1730 1731 } while (--max_ints > 0); 1732 /* re-enable Interrupt*/ 1733 AT_WRITE_REG(&adapter->hw, REG_ISR, 0); 1734 return handled; 1735 } 1736 1737 static inline void atl1c_rx_checksum(struct atl1c_adapter *adapter, 1738 struct sk_buff *skb, struct atl1c_recv_ret_status *prrs) 1739 { 1740 /* 1741 * The pid field in RRS in not correct sometimes, so we 1742 * cannot figure out if the packet is fragmented or not, 1743 * so we tell the KERNEL CHECKSUM_NONE 1744 */ 1745 skb_checksum_none_assert(skb); 1746 } 1747 1748 static int atl1c_alloc_rx_buffer(struct atl1c_adapter *adapter, const int ringid) 1749 { 1750 struct atl1c_rfd_ring *rfd_ring = &adapter->rfd_ring[ringid]; 1751 struct pci_dev *pdev = adapter->pdev; 1752 struct atl1c_buffer *buffer_info, *next_info; 1753 struct sk_buff *skb; 1754 void *vir_addr = NULL; 1755 u16 num_alloc = 0; 1756 u16 rfd_next_to_use, next_next; 1757 struct atl1c_rx_free_desc *rfd_desc; 1758 1759 next_next = rfd_next_to_use = rfd_ring->next_to_use; 1760 if (++next_next == rfd_ring->count) 1761 next_next = 0; 1762 buffer_info = &rfd_ring->buffer_info[rfd_next_to_use]; 1763 next_info = &rfd_ring->buffer_info[next_next]; 1764 1765 while (next_info->flags & ATL1C_BUFFER_FREE) { 1766 rfd_desc = ATL1C_RFD_DESC(rfd_ring, rfd_next_to_use); 1767 1768 skb = dev_alloc_skb(adapter->rx_buffer_len); 1769 if (unlikely(!skb)) { 1770 if (netif_msg_rx_err(adapter)) 1771 dev_warn(&pdev->dev, "alloc rx buffer failed\n"); 1772 break; 1773 } 1774 1775 /* 1776 * Make buffer alignment 2 beyond a 16 byte boundary 1777 * this will result in a 16 byte aligned IP header after 1778 * the 14 byte MAC header is removed 1779 */ 1780 vir_addr = skb->data; 1781 ATL1C_SET_BUFFER_STATE(buffer_info, ATL1C_BUFFER_BUSY); 1782 buffer_info->skb = skb; 1783 buffer_info->length = adapter->rx_buffer_len; 1784 buffer_info->dma = pci_map_single(pdev, vir_addr, 1785 buffer_info->length, 1786 PCI_DMA_FROMDEVICE); 1787 ATL1C_SET_PCIMAP_TYPE(buffer_info, ATL1C_PCIMAP_SINGLE, 1788 ATL1C_PCIMAP_FROMDEVICE); 1789 rfd_desc->buffer_addr = cpu_to_le64(buffer_info->dma); 1790 rfd_next_to_use = next_next; 1791 if (++next_next == rfd_ring->count) 1792 next_next = 0; 1793 buffer_info = &rfd_ring->buffer_info[rfd_next_to_use]; 1794 next_info = &rfd_ring->buffer_info[next_next]; 1795 num_alloc++; 1796 } 1797 1798 if (num_alloc) { 1799 /* TODO: update mailbox here */ 1800 wmb(); 1801 rfd_ring->next_to_use = rfd_next_to_use; 1802 AT_WRITE_REG(&adapter->hw, atl1c_rfd_prod_idx_regs[ringid], 1803 rfd_ring->next_to_use & MB_RFDX_PROD_IDX_MASK); 1804 } 1805 1806 return num_alloc; 1807 } 1808 1809 static void atl1c_clean_rrd(struct atl1c_rrd_ring *rrd_ring, 1810 struct atl1c_recv_ret_status *rrs, u16 num) 1811 { 1812 u16 i; 1813 /* the relationship between rrd and rfd is one map one */ 1814 for (i = 0; i < num; i++, rrs = ATL1C_RRD_DESC(rrd_ring, 1815 rrd_ring->next_to_clean)) { 1816 rrs->word3 &= ~RRS_RXD_UPDATED; 1817 if (++rrd_ring->next_to_clean == rrd_ring->count) 1818 rrd_ring->next_to_clean = 0; 1819 } 1820 } 1821 1822 static void atl1c_clean_rfd(struct atl1c_rfd_ring *rfd_ring, 1823 struct atl1c_recv_ret_status *rrs, u16 num) 1824 { 1825 u16 i; 1826 u16 rfd_index; 1827 struct atl1c_buffer *buffer_info = rfd_ring->buffer_info; 1828 1829 rfd_index = (rrs->word0 >> RRS_RX_RFD_INDEX_SHIFT) & 1830 RRS_RX_RFD_INDEX_MASK; 1831 for (i = 0; i < num; i++) { 1832 buffer_info[rfd_index].skb = NULL; 1833 ATL1C_SET_BUFFER_STATE(&buffer_info[rfd_index], 1834 ATL1C_BUFFER_FREE); 1835 if (++rfd_index == rfd_ring->count) 1836 rfd_index = 0; 1837 } 1838 rfd_ring->next_to_clean = rfd_index; 1839 } 1840 1841 static void atl1c_clean_rx_irq(struct atl1c_adapter *adapter, u8 que, 1842 int *work_done, int work_to_do) 1843 { 1844 u16 rfd_num, rfd_index; 1845 u16 count = 0; 1846 u16 length; 1847 struct pci_dev *pdev = adapter->pdev; 1848 struct net_device *netdev = adapter->netdev; 1849 struct atl1c_rfd_ring *rfd_ring = &adapter->rfd_ring[que]; 1850 struct atl1c_rrd_ring *rrd_ring = &adapter->rrd_ring[que]; 1851 struct sk_buff *skb; 1852 struct atl1c_recv_ret_status *rrs; 1853 struct atl1c_buffer *buffer_info; 1854 1855 while (1) { 1856 if (*work_done >= work_to_do) 1857 break; 1858 rrs = ATL1C_RRD_DESC(rrd_ring, rrd_ring->next_to_clean); 1859 if (likely(RRS_RXD_IS_VALID(rrs->word3))) { 1860 rfd_num = (rrs->word0 >> RRS_RX_RFD_CNT_SHIFT) & 1861 RRS_RX_RFD_CNT_MASK; 1862 if (unlikely(rfd_num != 1)) 1863 /* TODO support mul rfd*/ 1864 if (netif_msg_rx_err(adapter)) 1865 dev_warn(&pdev->dev, 1866 "Multi rfd not support yet!\n"); 1867 goto rrs_checked; 1868 } else { 1869 break; 1870 } 1871 rrs_checked: 1872 atl1c_clean_rrd(rrd_ring, rrs, rfd_num); 1873 if (rrs->word3 & (RRS_RX_ERR_SUM | RRS_802_3_LEN_ERR)) { 1874 atl1c_clean_rfd(rfd_ring, rrs, rfd_num); 1875 if (netif_msg_rx_err(adapter)) 1876 dev_warn(&pdev->dev, 1877 "wrong packet! rrs word3 is %x\n", 1878 rrs->word3); 1879 continue; 1880 } 1881 1882 length = le16_to_cpu((rrs->word3 >> RRS_PKT_SIZE_SHIFT) & 1883 RRS_PKT_SIZE_MASK); 1884 /* Good Receive */ 1885 if (likely(rfd_num == 1)) { 1886 rfd_index = (rrs->word0 >> RRS_RX_RFD_INDEX_SHIFT) & 1887 RRS_RX_RFD_INDEX_MASK; 1888 buffer_info = &rfd_ring->buffer_info[rfd_index]; 1889 pci_unmap_single(pdev, buffer_info->dma, 1890 buffer_info->length, PCI_DMA_FROMDEVICE); 1891 skb = buffer_info->skb; 1892 } else { 1893 /* TODO */ 1894 if (netif_msg_rx_err(adapter)) 1895 dev_warn(&pdev->dev, 1896 "Multi rfd not support yet!\n"); 1897 break; 1898 } 1899 atl1c_clean_rfd(rfd_ring, rrs, rfd_num); 1900 skb_put(skb, length - ETH_FCS_LEN); 1901 skb->protocol = eth_type_trans(skb, netdev); 1902 atl1c_rx_checksum(adapter, skb, rrs); 1903 if (rrs->word3 & RRS_VLAN_INS) { 1904 u16 vlan; 1905 1906 AT_TAG_TO_VLAN(rrs->vlan_tag, vlan); 1907 vlan = le16_to_cpu(vlan); 1908 __vlan_hwaccel_put_tag(skb, vlan); 1909 } 1910 netif_receive_skb(skb); 1911 1912 (*work_done)++; 1913 count++; 1914 } 1915 if (count) 1916 atl1c_alloc_rx_buffer(adapter, que); 1917 } 1918 1919 /* 1920 * atl1c_clean - NAPI Rx polling callback 1921 * @adapter: board private structure 1922 */ 1923 static int atl1c_clean(struct napi_struct *napi, int budget) 1924 { 1925 struct atl1c_adapter *adapter = 1926 container_of(napi, struct atl1c_adapter, napi); 1927 int work_done = 0; 1928 1929 /* Keep link state information with original netdev */ 1930 if (!netif_carrier_ok(adapter->netdev)) 1931 goto quit_polling; 1932 /* just enable one RXQ */ 1933 atl1c_clean_rx_irq(adapter, 0, &work_done, budget); 1934 1935 if (work_done < budget) { 1936 quit_polling: 1937 napi_complete(napi); 1938 adapter->hw.intr_mask |= ISR_RX_PKT; 1939 AT_WRITE_REG(&adapter->hw, REG_IMR, adapter->hw.intr_mask); 1940 } 1941 return work_done; 1942 } 1943 1944 #ifdef CONFIG_NET_POLL_CONTROLLER 1945 1946 /* 1947 * Polling 'interrupt' - used by things like netconsole to send skbs 1948 * without having to re-enable interrupts. It's not called while 1949 * the interrupt routine is executing. 1950 */ 1951 static void atl1c_netpoll(struct net_device *netdev) 1952 { 1953 struct atl1c_adapter *adapter = netdev_priv(netdev); 1954 1955 disable_irq(adapter->pdev->irq); 1956 atl1c_intr(adapter->pdev->irq, netdev); 1957 enable_irq(adapter->pdev->irq); 1958 } 1959 #endif 1960 1961 static inline u16 atl1c_tpd_avail(struct atl1c_adapter *adapter, enum atl1c_trans_queue type) 1962 { 1963 struct atl1c_tpd_ring *tpd_ring = &adapter->tpd_ring[type]; 1964 u16 next_to_use = 0; 1965 u16 next_to_clean = 0; 1966 1967 next_to_clean = atomic_read(&tpd_ring->next_to_clean); 1968 next_to_use = tpd_ring->next_to_use; 1969 1970 return (u16)(next_to_clean > next_to_use) ? 1971 (next_to_clean - next_to_use - 1) : 1972 (tpd_ring->count + next_to_clean - next_to_use - 1); 1973 } 1974 1975 /* 1976 * get next usable tpd 1977 * Note: should call atl1c_tdp_avail to make sure 1978 * there is enough tpd to use 1979 */ 1980 static struct atl1c_tpd_desc *atl1c_get_tpd(struct atl1c_adapter *adapter, 1981 enum atl1c_trans_queue type) 1982 { 1983 struct atl1c_tpd_ring *tpd_ring = &adapter->tpd_ring[type]; 1984 struct atl1c_tpd_desc *tpd_desc; 1985 u16 next_to_use = 0; 1986 1987 next_to_use = tpd_ring->next_to_use; 1988 if (++tpd_ring->next_to_use == tpd_ring->count) 1989 tpd_ring->next_to_use = 0; 1990 tpd_desc = ATL1C_TPD_DESC(tpd_ring, next_to_use); 1991 memset(tpd_desc, 0, sizeof(struct atl1c_tpd_desc)); 1992 return tpd_desc; 1993 } 1994 1995 static struct atl1c_buffer * 1996 atl1c_get_tx_buffer(struct atl1c_adapter *adapter, struct atl1c_tpd_desc *tpd) 1997 { 1998 struct atl1c_tpd_ring *tpd_ring = adapter->tpd_ring; 1999 2000 return &tpd_ring->buffer_info[tpd - 2001 (struct atl1c_tpd_desc *)tpd_ring->desc]; 2002 } 2003 2004 /* Calculate the transmit packet descript needed*/ 2005 static u16 atl1c_cal_tpd_req(const struct sk_buff *skb) 2006 { 2007 u16 tpd_req; 2008 u16 proto_hdr_len = 0; 2009 2010 tpd_req = skb_shinfo(skb)->nr_frags + 1; 2011 2012 if (skb_is_gso(skb)) { 2013 proto_hdr_len = skb_transport_offset(skb) + tcp_hdrlen(skb); 2014 if (proto_hdr_len < skb_headlen(skb)) 2015 tpd_req++; 2016 if (skb_shinfo(skb)->gso_type & SKB_GSO_TCPV6) 2017 tpd_req++; 2018 } 2019 return tpd_req; 2020 } 2021 2022 static int atl1c_tso_csum(struct atl1c_adapter *adapter, 2023 struct sk_buff *skb, 2024 struct atl1c_tpd_desc **tpd, 2025 enum atl1c_trans_queue type) 2026 { 2027 struct pci_dev *pdev = adapter->pdev; 2028 u8 hdr_len; 2029 u32 real_len; 2030 unsigned short offload_type; 2031 int err; 2032 2033 if (skb_is_gso(skb)) { 2034 if (skb_header_cloned(skb)) { 2035 err = pskb_expand_head(skb, 0, 0, GFP_ATOMIC); 2036 if (unlikely(err)) 2037 return -1; 2038 } 2039 offload_type = skb_shinfo(skb)->gso_type; 2040 2041 if (offload_type & SKB_GSO_TCPV4) { 2042 real_len = (((unsigned char *)ip_hdr(skb) - skb->data) 2043 + ntohs(ip_hdr(skb)->tot_len)); 2044 2045 if (real_len < skb->len) 2046 pskb_trim(skb, real_len); 2047 2048 hdr_len = (skb_transport_offset(skb) + tcp_hdrlen(skb)); 2049 if (unlikely(skb->len == hdr_len)) { 2050 /* only xsum need */ 2051 if (netif_msg_tx_queued(adapter)) 2052 dev_warn(&pdev->dev, 2053 "IPV4 tso with zero data??\n"); 2054 goto check_sum; 2055 } else { 2056 ip_hdr(skb)->check = 0; 2057 tcp_hdr(skb)->check = ~csum_tcpudp_magic( 2058 ip_hdr(skb)->saddr, 2059 ip_hdr(skb)->daddr, 2060 0, IPPROTO_TCP, 0); 2061 (*tpd)->word1 |= 1 << TPD_IPV4_PACKET_SHIFT; 2062 } 2063 } 2064 2065 if (offload_type & SKB_GSO_TCPV6) { 2066 struct atl1c_tpd_ext_desc *etpd = 2067 *(struct atl1c_tpd_ext_desc **)(tpd); 2068 2069 memset(etpd, 0, sizeof(struct atl1c_tpd_ext_desc)); 2070 *tpd = atl1c_get_tpd(adapter, type); 2071 ipv6_hdr(skb)->payload_len = 0; 2072 /* check payload == 0 byte ? */ 2073 hdr_len = (skb_transport_offset(skb) + tcp_hdrlen(skb)); 2074 if (unlikely(skb->len == hdr_len)) { 2075 /* only xsum need */ 2076 if (netif_msg_tx_queued(adapter)) 2077 dev_warn(&pdev->dev, 2078 "IPV6 tso with zero data??\n"); 2079 goto check_sum; 2080 } else 2081 tcp_hdr(skb)->check = ~csum_ipv6_magic( 2082 &ipv6_hdr(skb)->saddr, 2083 &ipv6_hdr(skb)->daddr, 2084 0, IPPROTO_TCP, 0); 2085 etpd->word1 |= 1 << TPD_LSO_EN_SHIFT; 2086 etpd->word1 |= 1 << TPD_LSO_VER_SHIFT; 2087 etpd->pkt_len = cpu_to_le32(skb->len); 2088 (*tpd)->word1 |= 1 << TPD_LSO_VER_SHIFT; 2089 } 2090 2091 (*tpd)->word1 |= 1 << TPD_LSO_EN_SHIFT; 2092 (*tpd)->word1 |= (skb_transport_offset(skb) & TPD_TCPHDR_OFFSET_MASK) << 2093 TPD_TCPHDR_OFFSET_SHIFT; 2094 (*tpd)->word1 |= (skb_shinfo(skb)->gso_size & TPD_MSS_MASK) << 2095 TPD_MSS_SHIFT; 2096 return 0; 2097 } 2098 2099 check_sum: 2100 if (likely(skb->ip_summed == CHECKSUM_PARTIAL)) { 2101 u8 css, cso; 2102 cso = skb_checksum_start_offset(skb); 2103 2104 if (unlikely(cso & 0x1)) { 2105 if (netif_msg_tx_err(adapter)) 2106 dev_err(&adapter->pdev->dev, 2107 "payload offset should not an event number\n"); 2108 return -1; 2109 } else { 2110 css = cso + skb->csum_offset; 2111 2112 (*tpd)->word1 |= ((cso >> 1) & TPD_PLOADOFFSET_MASK) << 2113 TPD_PLOADOFFSET_SHIFT; 2114 (*tpd)->word1 |= ((css >> 1) & TPD_CCSUM_OFFSET_MASK) << 2115 TPD_CCSUM_OFFSET_SHIFT; 2116 (*tpd)->word1 |= 1 << TPD_CCSUM_EN_SHIFT; 2117 } 2118 } 2119 return 0; 2120 } 2121 2122 static void atl1c_tx_map(struct atl1c_adapter *adapter, 2123 struct sk_buff *skb, struct atl1c_tpd_desc *tpd, 2124 enum atl1c_trans_queue type) 2125 { 2126 struct atl1c_tpd_desc *use_tpd = NULL; 2127 struct atl1c_buffer *buffer_info = NULL; 2128 u16 buf_len = skb_headlen(skb); 2129 u16 map_len = 0; 2130 u16 mapped_len = 0; 2131 u16 hdr_len = 0; 2132 u16 nr_frags; 2133 u16 f; 2134 int tso; 2135 2136 nr_frags = skb_shinfo(skb)->nr_frags; 2137 tso = (tpd->word1 >> TPD_LSO_EN_SHIFT) & TPD_LSO_EN_MASK; 2138 if (tso) { 2139 /* TSO */ 2140 map_len = hdr_len = skb_transport_offset(skb) + tcp_hdrlen(skb); 2141 use_tpd = tpd; 2142 2143 buffer_info = atl1c_get_tx_buffer(adapter, use_tpd); 2144 buffer_info->length = map_len; 2145 buffer_info->dma = pci_map_single(adapter->pdev, 2146 skb->data, hdr_len, PCI_DMA_TODEVICE); 2147 ATL1C_SET_BUFFER_STATE(buffer_info, ATL1C_BUFFER_BUSY); 2148 ATL1C_SET_PCIMAP_TYPE(buffer_info, ATL1C_PCIMAP_SINGLE, 2149 ATL1C_PCIMAP_TODEVICE); 2150 mapped_len += map_len; 2151 use_tpd->buffer_addr = cpu_to_le64(buffer_info->dma); 2152 use_tpd->buffer_len = cpu_to_le16(buffer_info->length); 2153 } 2154 2155 if (mapped_len < buf_len) { 2156 /* mapped_len == 0, means we should use the first tpd, 2157 which is given by caller */ 2158 if (mapped_len == 0) 2159 use_tpd = tpd; 2160 else { 2161 use_tpd = atl1c_get_tpd(adapter, type); 2162 memcpy(use_tpd, tpd, sizeof(struct atl1c_tpd_desc)); 2163 } 2164 buffer_info = atl1c_get_tx_buffer(adapter, use_tpd); 2165 buffer_info->length = buf_len - mapped_len; 2166 buffer_info->dma = 2167 pci_map_single(adapter->pdev, skb->data + mapped_len, 2168 buffer_info->length, PCI_DMA_TODEVICE); 2169 ATL1C_SET_BUFFER_STATE(buffer_info, ATL1C_BUFFER_BUSY); 2170 ATL1C_SET_PCIMAP_TYPE(buffer_info, ATL1C_PCIMAP_SINGLE, 2171 ATL1C_PCIMAP_TODEVICE); 2172 use_tpd->buffer_addr = cpu_to_le64(buffer_info->dma); 2173 use_tpd->buffer_len = cpu_to_le16(buffer_info->length); 2174 } 2175 2176 for (f = 0; f < nr_frags; f++) { 2177 struct skb_frag_struct *frag; 2178 2179 frag = &skb_shinfo(skb)->frags[f]; 2180 2181 use_tpd = atl1c_get_tpd(adapter, type); 2182 memcpy(use_tpd, tpd, sizeof(struct atl1c_tpd_desc)); 2183 2184 buffer_info = atl1c_get_tx_buffer(adapter, use_tpd); 2185 buffer_info->length = skb_frag_size(frag); 2186 buffer_info->dma = skb_frag_dma_map(&adapter->pdev->dev, 2187 frag, 0, 2188 buffer_info->length, 2189 DMA_TO_DEVICE); 2190 ATL1C_SET_BUFFER_STATE(buffer_info, ATL1C_BUFFER_BUSY); 2191 ATL1C_SET_PCIMAP_TYPE(buffer_info, ATL1C_PCIMAP_PAGE, 2192 ATL1C_PCIMAP_TODEVICE); 2193 use_tpd->buffer_addr = cpu_to_le64(buffer_info->dma); 2194 use_tpd->buffer_len = cpu_to_le16(buffer_info->length); 2195 } 2196 2197 /* The last tpd */ 2198 use_tpd->word1 |= 1 << TPD_EOP_SHIFT; 2199 /* The last buffer info contain the skb address, 2200 so it will be free after unmap */ 2201 buffer_info->skb = skb; 2202 } 2203 2204 static void atl1c_tx_queue(struct atl1c_adapter *adapter, struct sk_buff *skb, 2205 struct atl1c_tpd_desc *tpd, enum atl1c_trans_queue type) 2206 { 2207 struct atl1c_tpd_ring *tpd_ring = &adapter->tpd_ring[type]; 2208 u32 prod_data; 2209 2210 AT_READ_REG(&adapter->hw, REG_MB_PRIO_PROD_IDX, &prod_data); 2211 switch (type) { 2212 case atl1c_trans_high: 2213 prod_data &= 0xFFFF0000; 2214 prod_data |= tpd_ring->next_to_use & 0xFFFF; 2215 break; 2216 case atl1c_trans_normal: 2217 prod_data &= 0x0000FFFF; 2218 prod_data |= (tpd_ring->next_to_use & 0xFFFF) << 16; 2219 break; 2220 default: 2221 break; 2222 } 2223 wmb(); 2224 AT_WRITE_REG(&adapter->hw, REG_MB_PRIO_PROD_IDX, prod_data); 2225 } 2226 2227 static netdev_tx_t atl1c_xmit_frame(struct sk_buff *skb, 2228 struct net_device *netdev) 2229 { 2230 struct atl1c_adapter *adapter = netdev_priv(netdev); 2231 unsigned long flags; 2232 u16 tpd_req = 1; 2233 struct atl1c_tpd_desc *tpd; 2234 enum atl1c_trans_queue type = atl1c_trans_normal; 2235 2236 if (test_bit(__AT_DOWN, &adapter->flags)) { 2237 dev_kfree_skb_any(skb); 2238 return NETDEV_TX_OK; 2239 } 2240 2241 tpd_req = atl1c_cal_tpd_req(skb); 2242 if (!spin_trylock_irqsave(&adapter->tx_lock, flags)) { 2243 if (netif_msg_pktdata(adapter)) 2244 dev_info(&adapter->pdev->dev, "tx locked\n"); 2245 return NETDEV_TX_LOCKED; 2246 } 2247 if (skb->mark == 0x01) 2248 type = atl1c_trans_high; 2249 else 2250 type = atl1c_trans_normal; 2251 2252 if (atl1c_tpd_avail(adapter, type) < tpd_req) { 2253 /* no enough descriptor, just stop queue */ 2254 netif_stop_queue(netdev); 2255 spin_unlock_irqrestore(&adapter->tx_lock, flags); 2256 return NETDEV_TX_BUSY; 2257 } 2258 2259 tpd = atl1c_get_tpd(adapter, type); 2260 2261 /* do TSO and check sum */ 2262 if (atl1c_tso_csum(adapter, skb, &tpd, type) != 0) { 2263 spin_unlock_irqrestore(&adapter->tx_lock, flags); 2264 dev_kfree_skb_any(skb); 2265 return NETDEV_TX_OK; 2266 } 2267 2268 if (unlikely(vlan_tx_tag_present(skb))) { 2269 u16 vlan = vlan_tx_tag_get(skb); 2270 __le16 tag; 2271 2272 vlan = cpu_to_le16(vlan); 2273 AT_VLAN_TO_TAG(vlan, tag); 2274 tpd->word1 |= 1 << TPD_INS_VTAG_SHIFT; 2275 tpd->vlan_tag = tag; 2276 } 2277 2278 if (skb_network_offset(skb) != ETH_HLEN) 2279 tpd->word1 |= 1 << TPD_ETH_TYPE_SHIFT; /* Ethernet frame */ 2280 2281 atl1c_tx_map(adapter, skb, tpd, type); 2282 atl1c_tx_queue(adapter, skb, tpd, type); 2283 2284 spin_unlock_irqrestore(&adapter->tx_lock, flags); 2285 return NETDEV_TX_OK; 2286 } 2287 2288 static void atl1c_free_irq(struct atl1c_adapter *adapter) 2289 { 2290 struct net_device *netdev = adapter->netdev; 2291 2292 free_irq(adapter->pdev->irq, netdev); 2293 2294 if (adapter->have_msi) 2295 pci_disable_msi(adapter->pdev); 2296 } 2297 2298 static int atl1c_request_irq(struct atl1c_adapter *adapter) 2299 { 2300 struct pci_dev *pdev = adapter->pdev; 2301 struct net_device *netdev = adapter->netdev; 2302 int flags = 0; 2303 int err = 0; 2304 2305 adapter->have_msi = true; 2306 err = pci_enable_msi(adapter->pdev); 2307 if (err) { 2308 if (netif_msg_ifup(adapter)) 2309 dev_err(&pdev->dev, 2310 "Unable to allocate MSI interrupt Error: %d\n", 2311 err); 2312 adapter->have_msi = false; 2313 } else 2314 netdev->irq = pdev->irq; 2315 2316 if (!adapter->have_msi) 2317 flags |= IRQF_SHARED; 2318 err = request_irq(adapter->pdev->irq, atl1c_intr, flags, 2319 netdev->name, netdev); 2320 if (err) { 2321 if (netif_msg_ifup(adapter)) 2322 dev_err(&pdev->dev, 2323 "Unable to allocate interrupt Error: %d\n", 2324 err); 2325 if (adapter->have_msi) 2326 pci_disable_msi(adapter->pdev); 2327 return err; 2328 } 2329 if (netif_msg_ifup(adapter)) 2330 dev_dbg(&pdev->dev, "atl1c_request_irq OK\n"); 2331 return err; 2332 } 2333 2334 static int atl1c_up(struct atl1c_adapter *adapter) 2335 { 2336 struct net_device *netdev = adapter->netdev; 2337 int num; 2338 int err; 2339 int i; 2340 2341 netif_carrier_off(netdev); 2342 atl1c_init_ring_ptrs(adapter); 2343 atl1c_set_multi(netdev); 2344 atl1c_restore_vlan(adapter); 2345 2346 for (i = 0; i < adapter->num_rx_queues; i++) { 2347 num = atl1c_alloc_rx_buffer(adapter, i); 2348 if (unlikely(num == 0)) { 2349 err = -ENOMEM; 2350 goto err_alloc_rx; 2351 } 2352 } 2353 2354 if (atl1c_configure(adapter)) { 2355 err = -EIO; 2356 goto err_up; 2357 } 2358 2359 err = atl1c_request_irq(adapter); 2360 if (unlikely(err)) 2361 goto err_up; 2362 2363 clear_bit(__AT_DOWN, &adapter->flags); 2364 napi_enable(&adapter->napi); 2365 atl1c_irq_enable(adapter); 2366 atl1c_check_link_status(adapter); 2367 netif_start_queue(netdev); 2368 return err; 2369 2370 err_up: 2371 err_alloc_rx: 2372 atl1c_clean_rx_ring(adapter); 2373 return err; 2374 } 2375 2376 static void atl1c_down(struct atl1c_adapter *adapter) 2377 { 2378 struct net_device *netdev = adapter->netdev; 2379 2380 atl1c_del_timer(adapter); 2381 adapter->work_event = 0; /* clear all event */ 2382 /* signal that we're down so the interrupt handler does not 2383 * reschedule our watchdog timer */ 2384 set_bit(__AT_DOWN, &adapter->flags); 2385 netif_carrier_off(netdev); 2386 napi_disable(&adapter->napi); 2387 atl1c_irq_disable(adapter); 2388 atl1c_free_irq(adapter); 2389 /* reset MAC to disable all RX/TX */ 2390 atl1c_reset_mac(&adapter->hw); 2391 msleep(1); 2392 2393 adapter->link_speed = SPEED_0; 2394 adapter->link_duplex = -1; 2395 atl1c_clean_tx_ring(adapter, atl1c_trans_normal); 2396 atl1c_clean_tx_ring(adapter, atl1c_trans_high); 2397 atl1c_clean_rx_ring(adapter); 2398 } 2399 2400 /* 2401 * atl1c_open - Called when a network interface is made active 2402 * @netdev: network interface device structure 2403 * 2404 * Returns 0 on success, negative value on failure 2405 * 2406 * The open entry point is called when a network interface is made 2407 * active by the system (IFF_UP). At this point all resources needed 2408 * for transmit and receive operations are allocated, the interrupt 2409 * handler is registered with the OS, the watchdog timer is started, 2410 * and the stack is notified that the interface is ready. 2411 */ 2412 static int atl1c_open(struct net_device *netdev) 2413 { 2414 struct atl1c_adapter *adapter = netdev_priv(netdev); 2415 int err; 2416 2417 /* disallow open during test */ 2418 if (test_bit(__AT_TESTING, &adapter->flags)) 2419 return -EBUSY; 2420 2421 /* allocate rx/tx dma buffer & descriptors */ 2422 err = atl1c_setup_ring_resources(adapter); 2423 if (unlikely(err)) 2424 return err; 2425 2426 err = atl1c_up(adapter); 2427 if (unlikely(err)) 2428 goto err_up; 2429 2430 if (adapter->hw.ctrl_flags & ATL1C_FPGA_VERSION) { 2431 u32 phy_data; 2432 2433 AT_READ_REG(&adapter->hw, REG_MDIO_CTRL, &phy_data); 2434 phy_data |= MDIO_AP_EN; 2435 AT_WRITE_REG(&adapter->hw, REG_MDIO_CTRL, phy_data); 2436 } 2437 return 0; 2438 2439 err_up: 2440 atl1c_free_irq(adapter); 2441 atl1c_free_ring_resources(adapter); 2442 atl1c_reset_mac(&adapter->hw); 2443 return err; 2444 } 2445 2446 /* 2447 * atl1c_close - Disables a network interface 2448 * @netdev: network interface device structure 2449 * 2450 * Returns 0, this is not allowed to fail 2451 * 2452 * The close entry point is called when an interface is de-activated 2453 * by the OS. The hardware is still under the drivers control, but 2454 * needs to be disabled. A global MAC reset is issued to stop the 2455 * hardware, and all transmit and receive resources are freed. 2456 */ 2457 static int atl1c_close(struct net_device *netdev) 2458 { 2459 struct atl1c_adapter *adapter = netdev_priv(netdev); 2460 2461 WARN_ON(test_bit(__AT_RESETTING, &adapter->flags)); 2462 atl1c_down(adapter); 2463 atl1c_free_ring_resources(adapter); 2464 return 0; 2465 } 2466 2467 static int atl1c_suspend(struct device *dev) 2468 { 2469 struct pci_dev *pdev = to_pci_dev(dev); 2470 struct net_device *netdev = pci_get_drvdata(pdev); 2471 struct atl1c_adapter *adapter = netdev_priv(netdev); 2472 struct atl1c_hw *hw = &adapter->hw; 2473 u32 mac_ctrl_data = 0; 2474 u32 master_ctrl_data = 0; 2475 u32 wol_ctrl_data = 0; 2476 u16 mii_intr_status_data = 0; 2477 u32 wufc = adapter->wol; 2478 2479 atl1c_disable_l0s_l1(hw); 2480 if (netif_running(netdev)) { 2481 WARN_ON(test_bit(__AT_RESETTING, &adapter->flags)); 2482 atl1c_down(adapter); 2483 } 2484 netif_device_detach(netdev); 2485 2486 if (wufc) 2487 if (atl1c_phy_power_saving(hw) != 0) 2488 dev_dbg(&pdev->dev, "phy power saving failed"); 2489 2490 AT_READ_REG(hw, REG_MASTER_CTRL, &master_ctrl_data); 2491 AT_READ_REG(hw, REG_MAC_CTRL, &mac_ctrl_data); 2492 2493 master_ctrl_data &= ~MASTER_CTRL_CLK_SEL_DIS; 2494 mac_ctrl_data &= ~(MAC_CTRL_PRMLEN_MASK << MAC_CTRL_PRMLEN_SHIFT); 2495 mac_ctrl_data |= (((u32)adapter->hw.preamble_len & 2496 MAC_CTRL_PRMLEN_MASK) << 2497 MAC_CTRL_PRMLEN_SHIFT); 2498 mac_ctrl_data &= ~(MAC_CTRL_SPEED_MASK << MAC_CTRL_SPEED_SHIFT); 2499 mac_ctrl_data &= ~MAC_CTRL_DUPLX; 2500 2501 if (wufc) { 2502 mac_ctrl_data |= MAC_CTRL_RX_EN; 2503 if (adapter->link_speed == SPEED_1000 || 2504 adapter->link_speed == SPEED_0) { 2505 mac_ctrl_data |= atl1c_mac_speed_1000 << 2506 MAC_CTRL_SPEED_SHIFT; 2507 mac_ctrl_data |= MAC_CTRL_DUPLX; 2508 } else 2509 mac_ctrl_data |= atl1c_mac_speed_10_100 << 2510 MAC_CTRL_SPEED_SHIFT; 2511 2512 if (adapter->link_duplex == DUPLEX_FULL) 2513 mac_ctrl_data |= MAC_CTRL_DUPLX; 2514 2515 /* turn on magic packet wol */ 2516 if (wufc & AT_WUFC_MAG) 2517 wol_ctrl_data |= WOL_MAGIC_EN | WOL_MAGIC_PME_EN; 2518 2519 if (wufc & AT_WUFC_LNKC) { 2520 wol_ctrl_data |= WOL_LINK_CHG_EN | WOL_LINK_CHG_PME_EN; 2521 /* only link up can wake up */ 2522 if (atl1c_write_phy_reg(hw, MII_IER, IER_LINK_UP) != 0) { 2523 dev_dbg(&pdev->dev, "%s: read write phy " 2524 "register failed.\n", 2525 atl1c_driver_name); 2526 } 2527 } 2528 /* clear phy interrupt */ 2529 atl1c_read_phy_reg(hw, MII_ISR, &mii_intr_status_data); 2530 /* Config MAC Ctrl register */ 2531 __atl1c_vlan_mode(netdev->features, &mac_ctrl_data); 2532 2533 /* magic packet maybe Broadcast&multicast&Unicast frame */ 2534 if (wufc & AT_WUFC_MAG) 2535 mac_ctrl_data |= MAC_CTRL_BC_EN; 2536 2537 dev_dbg(&pdev->dev, 2538 "%s: suspend MAC=0x%x\n", 2539 atl1c_driver_name, mac_ctrl_data); 2540 AT_WRITE_REG(hw, REG_MASTER_CTRL, master_ctrl_data); 2541 AT_WRITE_REG(hw, REG_WOL_CTRL, wol_ctrl_data); 2542 AT_WRITE_REG(hw, REG_MAC_CTRL, mac_ctrl_data); 2543 2544 AT_WRITE_REG(hw, REG_GPHY_CTRL, GPHY_CTRL_DEFAULT | 2545 GPHY_CTRL_EXT_RESET); 2546 } else { 2547 AT_WRITE_REG(hw, REG_GPHY_CTRL, GPHY_CTRL_POWER_SAVING); 2548 master_ctrl_data |= MASTER_CTRL_CLK_SEL_DIS; 2549 mac_ctrl_data |= atl1c_mac_speed_10_100 << MAC_CTRL_SPEED_SHIFT; 2550 mac_ctrl_data |= MAC_CTRL_DUPLX; 2551 AT_WRITE_REG(hw, REG_MASTER_CTRL, master_ctrl_data); 2552 AT_WRITE_REG(hw, REG_MAC_CTRL, mac_ctrl_data); 2553 AT_WRITE_REG(hw, REG_WOL_CTRL, 0); 2554 hw->phy_configured = false; /* re-init PHY when resume */ 2555 } 2556 2557 return 0; 2558 } 2559 2560 #ifdef CONFIG_PM_SLEEP 2561 static int atl1c_resume(struct device *dev) 2562 { 2563 struct pci_dev *pdev = to_pci_dev(dev); 2564 struct net_device *netdev = pci_get_drvdata(pdev); 2565 struct atl1c_adapter *adapter = netdev_priv(netdev); 2566 2567 AT_WRITE_REG(&adapter->hw, REG_WOL_CTRL, 0); 2568 atl1c_reset_pcie(&adapter->hw, ATL1C_PCIE_L0S_L1_DISABLE | 2569 ATL1C_PCIE_PHY_RESET); 2570 2571 atl1c_phy_reset(&adapter->hw); 2572 atl1c_reset_mac(&adapter->hw); 2573 atl1c_phy_init(&adapter->hw); 2574 2575 #if 0 2576 AT_READ_REG(&adapter->hw, REG_PM_CTRLSTAT, &pm_data); 2577 pm_data &= ~PM_CTRLSTAT_PME_EN; 2578 AT_WRITE_REG(&adapter->hw, REG_PM_CTRLSTAT, pm_data); 2579 #endif 2580 2581 netif_device_attach(netdev); 2582 if (netif_running(netdev)) 2583 atl1c_up(adapter); 2584 2585 return 0; 2586 } 2587 #endif 2588 2589 static void atl1c_shutdown(struct pci_dev *pdev) 2590 { 2591 struct net_device *netdev = pci_get_drvdata(pdev); 2592 struct atl1c_adapter *adapter = netdev_priv(netdev); 2593 2594 atl1c_suspend(&pdev->dev); 2595 pci_wake_from_d3(pdev, adapter->wol); 2596 pci_set_power_state(pdev, PCI_D3hot); 2597 } 2598 2599 static const struct net_device_ops atl1c_netdev_ops = { 2600 .ndo_open = atl1c_open, 2601 .ndo_stop = atl1c_close, 2602 .ndo_validate_addr = eth_validate_addr, 2603 .ndo_start_xmit = atl1c_xmit_frame, 2604 .ndo_set_mac_address = atl1c_set_mac_addr, 2605 .ndo_set_rx_mode = atl1c_set_multi, 2606 .ndo_change_mtu = atl1c_change_mtu, 2607 .ndo_fix_features = atl1c_fix_features, 2608 .ndo_set_features = atl1c_set_features, 2609 .ndo_do_ioctl = atl1c_ioctl, 2610 .ndo_tx_timeout = atl1c_tx_timeout, 2611 .ndo_get_stats = atl1c_get_stats, 2612 #ifdef CONFIG_NET_POLL_CONTROLLER 2613 .ndo_poll_controller = atl1c_netpoll, 2614 #endif 2615 }; 2616 2617 static int atl1c_init_netdev(struct net_device *netdev, struct pci_dev *pdev) 2618 { 2619 SET_NETDEV_DEV(netdev, &pdev->dev); 2620 pci_set_drvdata(pdev, netdev); 2621 2622 netdev->irq = pdev->irq; 2623 netdev->netdev_ops = &atl1c_netdev_ops; 2624 netdev->watchdog_timeo = AT_TX_WATCHDOG; 2625 atl1c_set_ethtool_ops(netdev); 2626 2627 /* TODO: add when ready */ 2628 netdev->hw_features = NETIF_F_SG | 2629 NETIF_F_HW_CSUM | 2630 NETIF_F_HW_VLAN_RX | 2631 NETIF_F_TSO | 2632 NETIF_F_TSO6; 2633 netdev->features = netdev->hw_features | 2634 NETIF_F_HW_VLAN_TX; 2635 return 0; 2636 } 2637 2638 /* 2639 * atl1c_probe - Device Initialization Routine 2640 * @pdev: PCI device information struct 2641 * @ent: entry in atl1c_pci_tbl 2642 * 2643 * Returns 0 on success, negative on failure 2644 * 2645 * atl1c_probe initializes an adapter identified by a pci_dev structure. 2646 * The OS initialization, configuring of the adapter private structure, 2647 * and a hardware reset occur. 2648 */ 2649 static int __devinit atl1c_probe(struct pci_dev *pdev, 2650 const struct pci_device_id *ent) 2651 { 2652 struct net_device *netdev; 2653 struct atl1c_adapter *adapter; 2654 static int cards_found; 2655 2656 int err = 0; 2657 2658 /* enable device (incl. PCI PM wakeup and hotplug setup) */ 2659 err = pci_enable_device_mem(pdev); 2660 if (err) { 2661 dev_err(&pdev->dev, "cannot enable PCI device\n"); 2662 return err; 2663 } 2664 2665 /* 2666 * The atl1c chip can DMA to 64-bit addresses, but it uses a single 2667 * shared register for the high 32 bits, so only a single, aligned, 2668 * 4 GB physical address range can be used at a time. 2669 * 2670 * Supporting 64-bit DMA on this hardware is more trouble than it's 2671 * worth. It is far easier to limit to 32-bit DMA than update 2672 * various kernel subsystems to support the mechanics required by a 2673 * fixed-high-32-bit system. 2674 */ 2675 if ((pci_set_dma_mask(pdev, DMA_BIT_MASK(32)) != 0) || 2676 (pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(32)) != 0)) { 2677 dev_err(&pdev->dev, "No usable DMA configuration,aborting\n"); 2678 goto err_dma; 2679 } 2680 2681 err = pci_request_regions(pdev, atl1c_driver_name); 2682 if (err) { 2683 dev_err(&pdev->dev, "cannot obtain PCI resources\n"); 2684 goto err_pci_reg; 2685 } 2686 2687 pci_set_master(pdev); 2688 2689 netdev = alloc_etherdev(sizeof(struct atl1c_adapter)); 2690 if (netdev == NULL) { 2691 err = -ENOMEM; 2692 dev_err(&pdev->dev, "etherdev alloc failed\n"); 2693 goto err_alloc_etherdev; 2694 } 2695 2696 err = atl1c_init_netdev(netdev, pdev); 2697 if (err) { 2698 dev_err(&pdev->dev, "init netdevice failed\n"); 2699 goto err_init_netdev; 2700 } 2701 adapter = netdev_priv(netdev); 2702 adapter->bd_number = cards_found; 2703 adapter->netdev = netdev; 2704 adapter->pdev = pdev; 2705 adapter->hw.adapter = adapter; 2706 adapter->msg_enable = netif_msg_init(-1, atl1c_default_msg); 2707 adapter->hw.hw_addr = ioremap(pci_resource_start(pdev, 0), pci_resource_len(pdev, 0)); 2708 if (!adapter->hw.hw_addr) { 2709 err = -EIO; 2710 dev_err(&pdev->dev, "cannot map device registers\n"); 2711 goto err_ioremap; 2712 } 2713 netdev->base_addr = (unsigned long)adapter->hw.hw_addr; 2714 2715 /* init mii data */ 2716 adapter->mii.dev = netdev; 2717 adapter->mii.mdio_read = atl1c_mdio_read; 2718 adapter->mii.mdio_write = atl1c_mdio_write; 2719 adapter->mii.phy_id_mask = 0x1f; 2720 adapter->mii.reg_num_mask = MDIO_REG_ADDR_MASK; 2721 netif_napi_add(netdev, &adapter->napi, atl1c_clean, 64); 2722 setup_timer(&adapter->phy_config_timer, atl1c_phy_config, 2723 (unsigned long)adapter); 2724 /* setup the private structure */ 2725 err = atl1c_sw_init(adapter); 2726 if (err) { 2727 dev_err(&pdev->dev, "net device private data init failed\n"); 2728 goto err_sw_init; 2729 } 2730 atl1c_reset_pcie(&adapter->hw, ATL1C_PCIE_L0S_L1_DISABLE | 2731 ATL1C_PCIE_PHY_RESET); 2732 2733 /* Init GPHY as early as possible due to power saving issue */ 2734 atl1c_phy_reset(&adapter->hw); 2735 2736 err = atl1c_reset_mac(&adapter->hw); 2737 if (err) { 2738 err = -EIO; 2739 goto err_reset; 2740 } 2741 2742 /* reset the controller to 2743 * put the device in a known good starting state */ 2744 err = atl1c_phy_init(&adapter->hw); 2745 if (err) { 2746 err = -EIO; 2747 goto err_reset; 2748 } 2749 if (atl1c_read_mac_addr(&adapter->hw) != 0) { 2750 err = -EIO; 2751 dev_err(&pdev->dev, "get mac address failed\n"); 2752 goto err_eeprom; 2753 } 2754 memcpy(netdev->dev_addr, adapter->hw.mac_addr, netdev->addr_len); 2755 memcpy(netdev->perm_addr, adapter->hw.mac_addr, netdev->addr_len); 2756 if (netif_msg_probe(adapter)) 2757 dev_dbg(&pdev->dev, "mac address : %pM\n", 2758 adapter->hw.mac_addr); 2759 2760 atl1c_hw_set_mac_addr(&adapter->hw); 2761 INIT_WORK(&adapter->common_task, atl1c_common_task); 2762 adapter->work_event = 0; 2763 err = register_netdev(netdev); 2764 if (err) { 2765 dev_err(&pdev->dev, "register netdevice failed\n"); 2766 goto err_register; 2767 } 2768 2769 if (netif_msg_probe(adapter)) 2770 dev_info(&pdev->dev, "version %s\n", ATL1C_DRV_VERSION); 2771 cards_found++; 2772 return 0; 2773 2774 err_reset: 2775 err_register: 2776 err_sw_init: 2777 err_eeprom: 2778 iounmap(adapter->hw.hw_addr); 2779 err_init_netdev: 2780 err_ioremap: 2781 free_netdev(netdev); 2782 err_alloc_etherdev: 2783 pci_release_regions(pdev); 2784 err_pci_reg: 2785 err_dma: 2786 pci_disable_device(pdev); 2787 return err; 2788 } 2789 2790 /* 2791 * atl1c_remove - Device Removal Routine 2792 * @pdev: PCI device information struct 2793 * 2794 * atl1c_remove is called by the PCI subsystem to alert the driver 2795 * that it should release a PCI device. The could be caused by a 2796 * Hot-Plug event, or because the driver is going to be removed from 2797 * memory. 2798 */ 2799 static void __devexit atl1c_remove(struct pci_dev *pdev) 2800 { 2801 struct net_device *netdev = pci_get_drvdata(pdev); 2802 struct atl1c_adapter *adapter = netdev_priv(netdev); 2803 2804 unregister_netdev(netdev); 2805 atl1c_phy_disable(&adapter->hw); 2806 2807 iounmap(adapter->hw.hw_addr); 2808 2809 pci_release_regions(pdev); 2810 pci_disable_device(pdev); 2811 free_netdev(netdev); 2812 } 2813 2814 /* 2815 * atl1c_io_error_detected - called when PCI error is detected 2816 * @pdev: Pointer to PCI device 2817 * @state: The current pci connection state 2818 * 2819 * This function is called after a PCI bus error affecting 2820 * this device has been detected. 2821 */ 2822 static pci_ers_result_t atl1c_io_error_detected(struct pci_dev *pdev, 2823 pci_channel_state_t state) 2824 { 2825 struct net_device *netdev = pci_get_drvdata(pdev); 2826 struct atl1c_adapter *adapter = netdev_priv(netdev); 2827 2828 netif_device_detach(netdev); 2829 2830 if (state == pci_channel_io_perm_failure) 2831 return PCI_ERS_RESULT_DISCONNECT; 2832 2833 if (netif_running(netdev)) 2834 atl1c_down(adapter); 2835 2836 pci_disable_device(pdev); 2837 2838 /* Request a slot slot reset. */ 2839 return PCI_ERS_RESULT_NEED_RESET; 2840 } 2841 2842 /* 2843 * atl1c_io_slot_reset - called after the pci bus has been reset. 2844 * @pdev: Pointer to PCI device 2845 * 2846 * Restart the card from scratch, as if from a cold-boot. Implementation 2847 * resembles the first-half of the e1000_resume routine. 2848 */ 2849 static pci_ers_result_t atl1c_io_slot_reset(struct pci_dev *pdev) 2850 { 2851 struct net_device *netdev = pci_get_drvdata(pdev); 2852 struct atl1c_adapter *adapter = netdev_priv(netdev); 2853 2854 if (pci_enable_device(pdev)) { 2855 if (netif_msg_hw(adapter)) 2856 dev_err(&pdev->dev, 2857 "Cannot re-enable PCI device after reset\n"); 2858 return PCI_ERS_RESULT_DISCONNECT; 2859 } 2860 pci_set_master(pdev); 2861 2862 pci_enable_wake(pdev, PCI_D3hot, 0); 2863 pci_enable_wake(pdev, PCI_D3cold, 0); 2864 2865 atl1c_reset_mac(&adapter->hw); 2866 2867 return PCI_ERS_RESULT_RECOVERED; 2868 } 2869 2870 /* 2871 * atl1c_io_resume - called when traffic can start flowing again. 2872 * @pdev: Pointer to PCI device 2873 * 2874 * This callback is called when the error recovery driver tells us that 2875 * its OK to resume normal operation. Implementation resembles the 2876 * second-half of the atl1c_resume routine. 2877 */ 2878 static void atl1c_io_resume(struct pci_dev *pdev) 2879 { 2880 struct net_device *netdev = pci_get_drvdata(pdev); 2881 struct atl1c_adapter *adapter = netdev_priv(netdev); 2882 2883 if (netif_running(netdev)) { 2884 if (atl1c_up(adapter)) { 2885 if (netif_msg_hw(adapter)) 2886 dev_err(&pdev->dev, 2887 "Cannot bring device back up after reset\n"); 2888 return; 2889 } 2890 } 2891 2892 netif_device_attach(netdev); 2893 } 2894 2895 static struct pci_error_handlers atl1c_err_handler = { 2896 .error_detected = atl1c_io_error_detected, 2897 .slot_reset = atl1c_io_slot_reset, 2898 .resume = atl1c_io_resume, 2899 }; 2900 2901 static SIMPLE_DEV_PM_OPS(atl1c_pm_ops, atl1c_suspend, atl1c_resume); 2902 2903 static struct pci_driver atl1c_driver = { 2904 .name = atl1c_driver_name, 2905 .id_table = atl1c_pci_tbl, 2906 .probe = atl1c_probe, 2907 .remove = __devexit_p(atl1c_remove), 2908 .shutdown = atl1c_shutdown, 2909 .err_handler = &atl1c_err_handler, 2910 .driver.pm = &atl1c_pm_ops, 2911 }; 2912 2913 /* 2914 * atl1c_init_module - Driver Registration Routine 2915 * 2916 * atl1c_init_module is the first routine called when the driver is 2917 * loaded. All it does is register with the PCI subsystem. 2918 */ 2919 static int __init atl1c_init_module(void) 2920 { 2921 return pci_register_driver(&atl1c_driver); 2922 } 2923 2924 /* 2925 * atl1c_exit_module - Driver Exit Cleanup Routine 2926 * 2927 * atl1c_exit_module is called just before the driver is removed 2928 * from memory. 2929 */ 2930 static void __exit atl1c_exit_module(void) 2931 { 2932 pci_unregister_driver(&atl1c_driver); 2933 } 2934 2935 module_init(atl1c_init_module); 2936 module_exit(atl1c_exit_module); 2937