1 /* 2 * Copyright(c) 2008 - 2009 Atheros Corporation. All rights reserved. 3 * 4 * Derived from Intel e1000 driver 5 * Copyright(c) 1999 - 2005 Intel Corporation. All rights reserved. 6 * 7 * This program is free software; you can redistribute it and/or modify it 8 * under the terms of the GNU General Public License as published by the Free 9 * Software Foundation; either version 2 of the License, or (at your option) 10 * any later version. 11 * 12 * This program is distributed in the hope that it will be useful, but WITHOUT 13 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or 14 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for 15 * more details. 16 * 17 * You should have received a copy of the GNU General Public License along with 18 * this program; if not, write to the Free Software Foundation, Inc., 59 19 * Temple Place - Suite 330, Boston, MA 02111-1307, USA. 20 */ 21 22 #include "atl1c.h" 23 24 #define ATL1C_DRV_VERSION "1.0.1.0-NAPI" 25 char atl1c_driver_name[] = "atl1c"; 26 char atl1c_driver_version[] = ATL1C_DRV_VERSION; 27 28 /* 29 * atl1c_pci_tbl - PCI Device ID Table 30 * 31 * Wildcard entries (PCI_ANY_ID) should come last 32 * Last entry must be all 0s 33 * 34 * { Vendor ID, Device ID, SubVendor ID, SubDevice ID, 35 * Class, Class Mask, private data (not used) } 36 */ 37 static DEFINE_PCI_DEVICE_TABLE(atl1c_pci_tbl) = { 38 {PCI_DEVICE(PCI_VENDOR_ID_ATTANSIC, PCI_DEVICE_ID_ATTANSIC_L1C)}, 39 {PCI_DEVICE(PCI_VENDOR_ID_ATTANSIC, PCI_DEVICE_ID_ATTANSIC_L2C)}, 40 {PCI_DEVICE(PCI_VENDOR_ID_ATTANSIC, PCI_DEVICE_ID_ATHEROS_L2C_B)}, 41 {PCI_DEVICE(PCI_VENDOR_ID_ATTANSIC, PCI_DEVICE_ID_ATHEROS_L2C_B2)}, 42 {PCI_DEVICE(PCI_VENDOR_ID_ATTANSIC, PCI_DEVICE_ID_ATHEROS_L1D)}, 43 {PCI_DEVICE(PCI_VENDOR_ID_ATTANSIC, PCI_DEVICE_ID_ATHEROS_L1D_2_0)}, 44 /* required last entry */ 45 { 0 } 46 }; 47 MODULE_DEVICE_TABLE(pci, atl1c_pci_tbl); 48 49 MODULE_AUTHOR("Jie Yang"); 50 MODULE_AUTHOR("Qualcomm Atheros Inc., <nic-devel@qualcomm.com>"); 51 MODULE_DESCRIPTION("Qualcom Atheros 100/1000M Ethernet Network Driver"); 52 MODULE_LICENSE("GPL"); 53 MODULE_VERSION(ATL1C_DRV_VERSION); 54 55 static int atl1c_stop_mac(struct atl1c_hw *hw); 56 static void atl1c_disable_l0s_l1(struct atl1c_hw *hw); 57 static void atl1c_set_aspm(struct atl1c_hw *hw, u16 link_speed); 58 static void atl1c_start_mac(struct atl1c_adapter *adapter); 59 static void atl1c_clean_rx_irq(struct atl1c_adapter *adapter, 60 int *work_done, int work_to_do); 61 static int atl1c_up(struct atl1c_adapter *adapter); 62 static void atl1c_down(struct atl1c_adapter *adapter); 63 static int atl1c_reset_mac(struct atl1c_hw *hw); 64 static void atl1c_reset_dma_ring(struct atl1c_adapter *adapter); 65 static int atl1c_configure(struct atl1c_adapter *adapter); 66 static int atl1c_alloc_rx_buffer(struct atl1c_adapter *adapter); 67 68 static const u16 atl1c_pay_load_size[] = { 69 128, 256, 512, 1024, 2048, 4096, 70 }; 71 72 73 static const u32 atl1c_default_msg = NETIF_MSG_DRV | NETIF_MSG_PROBE | 74 NETIF_MSG_LINK | NETIF_MSG_TIMER | NETIF_MSG_IFDOWN | NETIF_MSG_IFUP; 75 static void atl1c_pcie_patch(struct atl1c_hw *hw) 76 { 77 u32 mst_data, data; 78 79 /* pclk sel could switch to 25M */ 80 AT_READ_REG(hw, REG_MASTER_CTRL, &mst_data); 81 mst_data &= ~MASTER_CTRL_CLK_SEL_DIS; 82 AT_WRITE_REG(hw, REG_MASTER_CTRL, mst_data); 83 84 /* WoL/PCIE related settings */ 85 if (hw->nic_type == athr_l1c || hw->nic_type == athr_l2c) { 86 AT_READ_REG(hw, REG_PCIE_PHYMISC, &data); 87 data |= PCIE_PHYMISC_FORCE_RCV_DET; 88 AT_WRITE_REG(hw, REG_PCIE_PHYMISC, data); 89 } else { /* new dev set bit5 of MASTER */ 90 if (!(mst_data & MASTER_CTRL_WAKEN_25M)) 91 AT_WRITE_REG(hw, REG_MASTER_CTRL, 92 mst_data | MASTER_CTRL_WAKEN_25M); 93 } 94 /* aspm/PCIE setting only for l2cb 1.0 */ 95 if (hw->nic_type == athr_l2c_b && hw->revision_id == L2CB_V10) { 96 AT_READ_REG(hw, REG_PCIE_PHYMISC2, &data); 97 data = FIELD_SETX(data, PCIE_PHYMISC2_CDR_BW, 98 L2CB1_PCIE_PHYMISC2_CDR_BW); 99 data = FIELD_SETX(data, PCIE_PHYMISC2_L0S_TH, 100 L2CB1_PCIE_PHYMISC2_L0S_TH); 101 AT_WRITE_REG(hw, REG_PCIE_PHYMISC2, data); 102 /* extend L1 sync timer */ 103 AT_READ_REG(hw, REG_LINK_CTRL, &data); 104 data |= LINK_CTRL_EXT_SYNC; 105 AT_WRITE_REG(hw, REG_LINK_CTRL, data); 106 } 107 /* l2cb 1.x & l1d 1.x */ 108 if (hw->nic_type == athr_l2c_b || hw->nic_type == athr_l1d) { 109 AT_READ_REG(hw, REG_PM_CTRL, &data); 110 data |= PM_CTRL_L0S_BUFSRX_EN; 111 AT_WRITE_REG(hw, REG_PM_CTRL, data); 112 /* clear vendor msg */ 113 AT_READ_REG(hw, REG_DMA_DBG, &data); 114 AT_WRITE_REG(hw, REG_DMA_DBG, data & ~DMA_DBG_VENDOR_MSG); 115 } 116 } 117 118 /* FIXME: no need any more ? */ 119 /* 120 * atl1c_init_pcie - init PCIE module 121 */ 122 static void atl1c_reset_pcie(struct atl1c_hw *hw, u32 flag) 123 { 124 u32 data; 125 u32 pci_cmd; 126 struct pci_dev *pdev = hw->adapter->pdev; 127 int pos; 128 129 AT_READ_REG(hw, PCI_COMMAND, &pci_cmd); 130 pci_cmd &= ~PCI_COMMAND_INTX_DISABLE; 131 pci_cmd |= (PCI_COMMAND_MEMORY | PCI_COMMAND_MASTER | 132 PCI_COMMAND_IO); 133 AT_WRITE_REG(hw, PCI_COMMAND, pci_cmd); 134 135 /* 136 * Clear any PowerSaveing Settings 137 */ 138 pci_enable_wake(pdev, PCI_D3hot, 0); 139 pci_enable_wake(pdev, PCI_D3cold, 0); 140 /* wol sts read-clear */ 141 AT_READ_REG(hw, REG_WOL_CTRL, &data); 142 AT_WRITE_REG(hw, REG_WOL_CTRL, 0); 143 144 /* 145 * Mask some pcie error bits 146 */ 147 pos = pci_find_ext_capability(pdev, PCI_EXT_CAP_ID_ERR); 148 pci_read_config_dword(pdev, pos + PCI_ERR_UNCOR_SEVER, &data); 149 data &= ~(PCI_ERR_UNC_DLP | PCI_ERR_UNC_FCP); 150 pci_write_config_dword(pdev, pos + PCI_ERR_UNCOR_SEVER, data); 151 /* clear error status */ 152 pci_write_config_word(pdev, pci_pcie_cap(pdev) + PCI_EXP_DEVSTA, 153 PCI_EXP_DEVSTA_NFED | 154 PCI_EXP_DEVSTA_FED | 155 PCI_EXP_DEVSTA_CED | 156 PCI_EXP_DEVSTA_URD); 157 158 AT_READ_REG(hw, REG_LTSSM_ID_CTRL, &data); 159 data &= ~LTSSM_ID_EN_WRO; 160 AT_WRITE_REG(hw, REG_LTSSM_ID_CTRL, data); 161 162 atl1c_pcie_patch(hw); 163 if (flag & ATL1C_PCIE_L0S_L1_DISABLE) 164 atl1c_disable_l0s_l1(hw); 165 166 msleep(5); 167 } 168 169 /* 170 * atl1c_irq_enable - Enable default interrupt generation settings 171 * @adapter: board private structure 172 */ 173 static inline void atl1c_irq_enable(struct atl1c_adapter *adapter) 174 { 175 if (likely(atomic_dec_and_test(&adapter->irq_sem))) { 176 AT_WRITE_REG(&adapter->hw, REG_ISR, 0x7FFFFFFF); 177 AT_WRITE_REG(&adapter->hw, REG_IMR, adapter->hw.intr_mask); 178 AT_WRITE_FLUSH(&adapter->hw); 179 } 180 } 181 182 /* 183 * atl1c_irq_disable - Mask off interrupt generation on the NIC 184 * @adapter: board private structure 185 */ 186 static inline void atl1c_irq_disable(struct atl1c_adapter *adapter) 187 { 188 atomic_inc(&adapter->irq_sem); 189 AT_WRITE_REG(&adapter->hw, REG_IMR, 0); 190 AT_WRITE_REG(&adapter->hw, REG_ISR, ISR_DIS_INT); 191 AT_WRITE_FLUSH(&adapter->hw); 192 synchronize_irq(adapter->pdev->irq); 193 } 194 195 /* 196 * atl1c_irq_reset - reset interrupt confiure on the NIC 197 * @adapter: board private structure 198 */ 199 static inline void atl1c_irq_reset(struct atl1c_adapter *adapter) 200 { 201 atomic_set(&adapter->irq_sem, 1); 202 atl1c_irq_enable(adapter); 203 } 204 205 /* 206 * atl1c_wait_until_idle - wait up to AT_HW_MAX_IDLE_DELAY reads 207 * of the idle status register until the device is actually idle 208 */ 209 static u32 atl1c_wait_until_idle(struct atl1c_hw *hw, u32 modu_ctrl) 210 { 211 int timeout; 212 u32 data; 213 214 for (timeout = 0; timeout < AT_HW_MAX_IDLE_DELAY; timeout++) { 215 AT_READ_REG(hw, REG_IDLE_STATUS, &data); 216 if ((data & modu_ctrl) == 0) 217 return 0; 218 msleep(1); 219 } 220 return data; 221 } 222 223 /* 224 * atl1c_phy_config - Timer Call-back 225 * @data: pointer to netdev cast into an unsigned long 226 */ 227 static void atl1c_phy_config(unsigned long data) 228 { 229 struct atl1c_adapter *adapter = (struct atl1c_adapter *) data; 230 struct atl1c_hw *hw = &adapter->hw; 231 unsigned long flags; 232 233 spin_lock_irqsave(&adapter->mdio_lock, flags); 234 atl1c_restart_autoneg(hw); 235 spin_unlock_irqrestore(&adapter->mdio_lock, flags); 236 } 237 238 void atl1c_reinit_locked(struct atl1c_adapter *adapter) 239 { 240 WARN_ON(in_interrupt()); 241 atl1c_down(adapter); 242 atl1c_up(adapter); 243 clear_bit(__AT_RESETTING, &adapter->flags); 244 } 245 246 static void atl1c_check_link_status(struct atl1c_adapter *adapter) 247 { 248 struct atl1c_hw *hw = &adapter->hw; 249 struct net_device *netdev = adapter->netdev; 250 struct pci_dev *pdev = adapter->pdev; 251 int err; 252 unsigned long flags; 253 u16 speed, duplex, phy_data; 254 255 spin_lock_irqsave(&adapter->mdio_lock, flags); 256 /* MII_BMSR must read twise */ 257 atl1c_read_phy_reg(hw, MII_BMSR, &phy_data); 258 atl1c_read_phy_reg(hw, MII_BMSR, &phy_data); 259 spin_unlock_irqrestore(&adapter->mdio_lock, flags); 260 261 if ((phy_data & BMSR_LSTATUS) == 0) { 262 /* link down */ 263 netif_carrier_off(netdev); 264 netif_stop_queue(netdev); 265 hw->hibernate = true; 266 if (atl1c_reset_mac(hw) != 0) 267 if (netif_msg_hw(adapter)) 268 dev_warn(&pdev->dev, "reset mac failed\n"); 269 atl1c_set_aspm(hw, SPEED_0); 270 atl1c_post_phy_linkchg(hw, SPEED_0); 271 atl1c_reset_dma_ring(adapter); 272 atl1c_configure(adapter); 273 } else { 274 /* Link Up */ 275 hw->hibernate = false; 276 spin_lock_irqsave(&adapter->mdio_lock, flags); 277 err = atl1c_get_speed_and_duplex(hw, &speed, &duplex); 278 spin_unlock_irqrestore(&adapter->mdio_lock, flags); 279 if (unlikely(err)) 280 return; 281 /* link result is our setting */ 282 if (adapter->link_speed != speed || 283 adapter->link_duplex != duplex) { 284 adapter->link_speed = speed; 285 adapter->link_duplex = duplex; 286 atl1c_set_aspm(hw, speed); 287 atl1c_post_phy_linkchg(hw, speed); 288 atl1c_start_mac(adapter); 289 if (netif_msg_link(adapter)) 290 dev_info(&pdev->dev, 291 "%s: %s NIC Link is Up<%d Mbps %s>\n", 292 atl1c_driver_name, netdev->name, 293 adapter->link_speed, 294 adapter->link_duplex == FULL_DUPLEX ? 295 "Full Duplex" : "Half Duplex"); 296 } 297 if (!netif_carrier_ok(netdev)) 298 netif_carrier_on(netdev); 299 } 300 } 301 302 static void atl1c_link_chg_event(struct atl1c_adapter *adapter) 303 { 304 struct net_device *netdev = adapter->netdev; 305 struct pci_dev *pdev = adapter->pdev; 306 u16 phy_data; 307 u16 link_up; 308 309 spin_lock(&adapter->mdio_lock); 310 atl1c_read_phy_reg(&adapter->hw, MII_BMSR, &phy_data); 311 atl1c_read_phy_reg(&adapter->hw, MII_BMSR, &phy_data); 312 spin_unlock(&adapter->mdio_lock); 313 link_up = phy_data & BMSR_LSTATUS; 314 /* notify upper layer link down ASAP */ 315 if (!link_up) { 316 if (netif_carrier_ok(netdev)) { 317 /* old link state: Up */ 318 netif_carrier_off(netdev); 319 if (netif_msg_link(adapter)) 320 dev_info(&pdev->dev, 321 "%s: %s NIC Link is Down\n", 322 atl1c_driver_name, netdev->name); 323 adapter->link_speed = SPEED_0; 324 } 325 } 326 327 set_bit(ATL1C_WORK_EVENT_LINK_CHANGE, &adapter->work_event); 328 schedule_work(&adapter->common_task); 329 } 330 331 static void atl1c_common_task(struct work_struct *work) 332 { 333 struct atl1c_adapter *adapter; 334 struct net_device *netdev; 335 336 adapter = container_of(work, struct atl1c_adapter, common_task); 337 netdev = adapter->netdev; 338 339 if (test_bit(__AT_DOWN, &adapter->flags)) 340 return; 341 342 if (test_and_clear_bit(ATL1C_WORK_EVENT_RESET, &adapter->work_event)) { 343 netif_device_detach(netdev); 344 atl1c_down(adapter); 345 atl1c_up(adapter); 346 netif_device_attach(netdev); 347 } 348 349 if (test_and_clear_bit(ATL1C_WORK_EVENT_LINK_CHANGE, 350 &adapter->work_event)) { 351 atl1c_irq_disable(adapter); 352 atl1c_check_link_status(adapter); 353 atl1c_irq_enable(adapter); 354 } 355 } 356 357 358 static void atl1c_del_timer(struct atl1c_adapter *adapter) 359 { 360 del_timer_sync(&adapter->phy_config_timer); 361 } 362 363 364 /* 365 * atl1c_tx_timeout - Respond to a Tx Hang 366 * @netdev: network interface device structure 367 */ 368 static void atl1c_tx_timeout(struct net_device *netdev) 369 { 370 struct atl1c_adapter *adapter = netdev_priv(netdev); 371 372 /* Do the reset outside of interrupt context */ 373 set_bit(ATL1C_WORK_EVENT_RESET, &adapter->work_event); 374 schedule_work(&adapter->common_task); 375 } 376 377 /* 378 * atl1c_set_multi - Multicast and Promiscuous mode set 379 * @netdev: network interface device structure 380 * 381 * The set_multi entry point is called whenever the multicast address 382 * list or the network interface flags are updated. This routine is 383 * responsible for configuring the hardware for proper multicast, 384 * promiscuous mode, and all-multi behavior. 385 */ 386 static void atl1c_set_multi(struct net_device *netdev) 387 { 388 struct atl1c_adapter *adapter = netdev_priv(netdev); 389 struct atl1c_hw *hw = &adapter->hw; 390 struct netdev_hw_addr *ha; 391 u32 mac_ctrl_data; 392 u32 hash_value; 393 394 /* Check for Promiscuous and All Multicast modes */ 395 AT_READ_REG(hw, REG_MAC_CTRL, &mac_ctrl_data); 396 397 if (netdev->flags & IFF_PROMISC) { 398 mac_ctrl_data |= MAC_CTRL_PROMIS_EN; 399 } else if (netdev->flags & IFF_ALLMULTI) { 400 mac_ctrl_data |= MAC_CTRL_MC_ALL_EN; 401 mac_ctrl_data &= ~MAC_CTRL_PROMIS_EN; 402 } else { 403 mac_ctrl_data &= ~(MAC_CTRL_PROMIS_EN | MAC_CTRL_MC_ALL_EN); 404 } 405 406 AT_WRITE_REG(hw, REG_MAC_CTRL, mac_ctrl_data); 407 408 /* clear the old settings from the multicast hash table */ 409 AT_WRITE_REG(hw, REG_RX_HASH_TABLE, 0); 410 AT_WRITE_REG_ARRAY(hw, REG_RX_HASH_TABLE, 1, 0); 411 412 /* comoute mc addresses' hash value ,and put it into hash table */ 413 netdev_for_each_mc_addr(ha, netdev) { 414 hash_value = atl1c_hash_mc_addr(hw, ha->addr); 415 atl1c_hash_set(hw, hash_value); 416 } 417 } 418 419 static void __atl1c_vlan_mode(netdev_features_t features, u32 *mac_ctrl_data) 420 { 421 if (features & NETIF_F_HW_VLAN_RX) { 422 /* enable VLAN tag insert/strip */ 423 *mac_ctrl_data |= MAC_CTRL_RMV_VLAN; 424 } else { 425 /* disable VLAN tag insert/strip */ 426 *mac_ctrl_data &= ~MAC_CTRL_RMV_VLAN; 427 } 428 } 429 430 static void atl1c_vlan_mode(struct net_device *netdev, 431 netdev_features_t features) 432 { 433 struct atl1c_adapter *adapter = netdev_priv(netdev); 434 struct pci_dev *pdev = adapter->pdev; 435 u32 mac_ctrl_data = 0; 436 437 if (netif_msg_pktdata(adapter)) 438 dev_dbg(&pdev->dev, "atl1c_vlan_mode\n"); 439 440 atl1c_irq_disable(adapter); 441 AT_READ_REG(&adapter->hw, REG_MAC_CTRL, &mac_ctrl_data); 442 __atl1c_vlan_mode(features, &mac_ctrl_data); 443 AT_WRITE_REG(&adapter->hw, REG_MAC_CTRL, mac_ctrl_data); 444 atl1c_irq_enable(adapter); 445 } 446 447 static void atl1c_restore_vlan(struct atl1c_adapter *adapter) 448 { 449 struct pci_dev *pdev = adapter->pdev; 450 451 if (netif_msg_pktdata(adapter)) 452 dev_dbg(&pdev->dev, "atl1c_restore_vlan\n"); 453 atl1c_vlan_mode(adapter->netdev, adapter->netdev->features); 454 } 455 456 /* 457 * atl1c_set_mac - Change the Ethernet Address of the NIC 458 * @netdev: network interface device structure 459 * @p: pointer to an address structure 460 * 461 * Returns 0 on success, negative on failure 462 */ 463 static int atl1c_set_mac_addr(struct net_device *netdev, void *p) 464 { 465 struct atl1c_adapter *adapter = netdev_priv(netdev); 466 struct sockaddr *addr = p; 467 468 if (!is_valid_ether_addr(addr->sa_data)) 469 return -EADDRNOTAVAIL; 470 471 if (netif_running(netdev)) 472 return -EBUSY; 473 474 memcpy(netdev->dev_addr, addr->sa_data, netdev->addr_len); 475 memcpy(adapter->hw.mac_addr, addr->sa_data, netdev->addr_len); 476 netdev->addr_assign_type &= ~NET_ADDR_RANDOM; 477 478 atl1c_hw_set_mac_addr(&adapter->hw, adapter->hw.mac_addr); 479 480 return 0; 481 } 482 483 static void atl1c_set_rxbufsize(struct atl1c_adapter *adapter, 484 struct net_device *dev) 485 { 486 int mtu = dev->mtu; 487 488 adapter->rx_buffer_len = mtu > AT_RX_BUF_SIZE ? 489 roundup(mtu + ETH_HLEN + ETH_FCS_LEN + VLAN_HLEN, 8) : AT_RX_BUF_SIZE; 490 } 491 492 static netdev_features_t atl1c_fix_features(struct net_device *netdev, 493 netdev_features_t features) 494 { 495 /* 496 * Since there is no support for separate rx/tx vlan accel 497 * enable/disable make sure tx flag is always in same state as rx. 498 */ 499 if (features & NETIF_F_HW_VLAN_RX) 500 features |= NETIF_F_HW_VLAN_TX; 501 else 502 features &= ~NETIF_F_HW_VLAN_TX; 503 504 if (netdev->mtu > MAX_TSO_FRAME_SIZE) 505 features &= ~(NETIF_F_TSO | NETIF_F_TSO6); 506 507 return features; 508 } 509 510 static int atl1c_set_features(struct net_device *netdev, 511 netdev_features_t features) 512 { 513 netdev_features_t changed = netdev->features ^ features; 514 515 if (changed & NETIF_F_HW_VLAN_RX) 516 atl1c_vlan_mode(netdev, features); 517 518 return 0; 519 } 520 521 /* 522 * atl1c_change_mtu - Change the Maximum Transfer Unit 523 * @netdev: network interface device structure 524 * @new_mtu: new value for maximum frame size 525 * 526 * Returns 0 on success, negative on failure 527 */ 528 static int atl1c_change_mtu(struct net_device *netdev, int new_mtu) 529 { 530 struct atl1c_adapter *adapter = netdev_priv(netdev); 531 struct atl1c_hw *hw = &adapter->hw; 532 int old_mtu = netdev->mtu; 533 int max_frame = new_mtu + ETH_HLEN + ETH_FCS_LEN + VLAN_HLEN; 534 535 /* Fast Ethernet controller doesn't support jumbo packet */ 536 if (((hw->nic_type == athr_l2c || 537 hw->nic_type == athr_l2c_b || 538 hw->nic_type == athr_l2c_b2) && new_mtu > ETH_DATA_LEN) || 539 max_frame < ETH_ZLEN + ETH_FCS_LEN || 540 max_frame > MAX_JUMBO_FRAME_SIZE) { 541 if (netif_msg_link(adapter)) 542 dev_warn(&adapter->pdev->dev, "invalid MTU setting\n"); 543 return -EINVAL; 544 } 545 /* set MTU */ 546 if (old_mtu != new_mtu && netif_running(netdev)) { 547 while (test_and_set_bit(__AT_RESETTING, &adapter->flags)) 548 msleep(1); 549 netdev->mtu = new_mtu; 550 adapter->hw.max_frame_size = new_mtu; 551 atl1c_set_rxbufsize(adapter, netdev); 552 atl1c_down(adapter); 553 netdev_update_features(netdev); 554 atl1c_up(adapter); 555 clear_bit(__AT_RESETTING, &adapter->flags); 556 } 557 return 0; 558 } 559 560 /* 561 * caller should hold mdio_lock 562 */ 563 static int atl1c_mdio_read(struct net_device *netdev, int phy_id, int reg_num) 564 { 565 struct atl1c_adapter *adapter = netdev_priv(netdev); 566 u16 result; 567 568 atl1c_read_phy_reg(&adapter->hw, reg_num, &result); 569 return result; 570 } 571 572 static void atl1c_mdio_write(struct net_device *netdev, int phy_id, 573 int reg_num, int val) 574 { 575 struct atl1c_adapter *adapter = netdev_priv(netdev); 576 577 atl1c_write_phy_reg(&adapter->hw, reg_num, val); 578 } 579 580 /* 581 * atl1c_mii_ioctl - 582 * @netdev: 583 * @ifreq: 584 * @cmd: 585 */ 586 static int atl1c_mii_ioctl(struct net_device *netdev, 587 struct ifreq *ifr, int cmd) 588 { 589 struct atl1c_adapter *adapter = netdev_priv(netdev); 590 struct pci_dev *pdev = adapter->pdev; 591 struct mii_ioctl_data *data = if_mii(ifr); 592 unsigned long flags; 593 int retval = 0; 594 595 if (!netif_running(netdev)) 596 return -EINVAL; 597 598 spin_lock_irqsave(&adapter->mdio_lock, flags); 599 switch (cmd) { 600 case SIOCGMIIPHY: 601 data->phy_id = 0; 602 break; 603 604 case SIOCGMIIREG: 605 if (atl1c_read_phy_reg(&adapter->hw, data->reg_num & 0x1F, 606 &data->val_out)) { 607 retval = -EIO; 608 goto out; 609 } 610 break; 611 612 case SIOCSMIIREG: 613 if (data->reg_num & ~(0x1F)) { 614 retval = -EFAULT; 615 goto out; 616 } 617 618 dev_dbg(&pdev->dev, "<atl1c_mii_ioctl> write %x %x", 619 data->reg_num, data->val_in); 620 if (atl1c_write_phy_reg(&adapter->hw, 621 data->reg_num, data->val_in)) { 622 retval = -EIO; 623 goto out; 624 } 625 break; 626 627 default: 628 retval = -EOPNOTSUPP; 629 break; 630 } 631 out: 632 spin_unlock_irqrestore(&adapter->mdio_lock, flags); 633 return retval; 634 } 635 636 /* 637 * atl1c_ioctl - 638 * @netdev: 639 * @ifreq: 640 * @cmd: 641 */ 642 static int atl1c_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd) 643 { 644 switch (cmd) { 645 case SIOCGMIIPHY: 646 case SIOCGMIIREG: 647 case SIOCSMIIREG: 648 return atl1c_mii_ioctl(netdev, ifr, cmd); 649 default: 650 return -EOPNOTSUPP; 651 } 652 } 653 654 /* 655 * atl1c_alloc_queues - Allocate memory for all rings 656 * @adapter: board private structure to initialize 657 * 658 */ 659 static int __devinit atl1c_alloc_queues(struct atl1c_adapter *adapter) 660 { 661 return 0; 662 } 663 664 static void atl1c_set_mac_type(struct atl1c_hw *hw) 665 { 666 switch (hw->device_id) { 667 case PCI_DEVICE_ID_ATTANSIC_L2C: 668 hw->nic_type = athr_l2c; 669 break; 670 case PCI_DEVICE_ID_ATTANSIC_L1C: 671 hw->nic_type = athr_l1c; 672 break; 673 case PCI_DEVICE_ID_ATHEROS_L2C_B: 674 hw->nic_type = athr_l2c_b; 675 break; 676 case PCI_DEVICE_ID_ATHEROS_L2C_B2: 677 hw->nic_type = athr_l2c_b2; 678 break; 679 case PCI_DEVICE_ID_ATHEROS_L1D: 680 hw->nic_type = athr_l1d; 681 break; 682 case PCI_DEVICE_ID_ATHEROS_L1D_2_0: 683 hw->nic_type = athr_l1d_2; 684 break; 685 default: 686 break; 687 } 688 } 689 690 static int atl1c_setup_mac_funcs(struct atl1c_hw *hw) 691 { 692 u32 link_ctrl_data; 693 694 atl1c_set_mac_type(hw); 695 AT_READ_REG(hw, REG_LINK_CTRL, &link_ctrl_data); 696 697 hw->ctrl_flags = ATL1C_INTR_MODRT_ENABLE | 698 ATL1C_TXQ_MODE_ENHANCE; 699 hw->ctrl_flags |= ATL1C_ASPM_L0S_SUPPORT | 700 ATL1C_ASPM_L1_SUPPORT; 701 hw->ctrl_flags |= ATL1C_ASPM_CTRL_MON; 702 703 if (hw->nic_type == athr_l1c || 704 hw->nic_type == athr_l1d || 705 hw->nic_type == athr_l1d_2) 706 hw->link_cap_flags |= ATL1C_LINK_CAP_1000M; 707 return 0; 708 } 709 710 struct atl1c_platform_patch { 711 u16 pci_did; 712 u8 pci_revid; 713 u16 subsystem_vid; 714 u16 subsystem_did; 715 u32 patch_flag; 716 #define ATL1C_LINK_PATCH 0x1 717 }; 718 static const struct atl1c_platform_patch plats[] __devinitdata = { 719 {0x2060, 0xC1, 0x1019, 0x8152, 0x1}, 720 {0x2060, 0xC1, 0x1019, 0x2060, 0x1}, 721 {0x2060, 0xC1, 0x1019, 0xE000, 0x1}, 722 {0x2062, 0xC0, 0x1019, 0x8152, 0x1}, 723 {0x2062, 0xC0, 0x1019, 0x2062, 0x1}, 724 {0x2062, 0xC0, 0x1458, 0xE000, 0x1}, 725 {0x2062, 0xC1, 0x1019, 0x8152, 0x1}, 726 {0x2062, 0xC1, 0x1019, 0x2062, 0x1}, 727 {0x2062, 0xC1, 0x1458, 0xE000, 0x1}, 728 {0x2062, 0xC1, 0x1565, 0x2802, 0x1}, 729 {0x2062, 0xC1, 0x1565, 0x2801, 0x1}, 730 {0x1073, 0xC0, 0x1019, 0x8151, 0x1}, 731 {0x1073, 0xC0, 0x1019, 0x1073, 0x1}, 732 {0x1073, 0xC0, 0x1458, 0xE000, 0x1}, 733 {0x1083, 0xC0, 0x1458, 0xE000, 0x1}, 734 {0x1083, 0xC0, 0x1019, 0x8151, 0x1}, 735 {0x1083, 0xC0, 0x1019, 0x1083, 0x1}, 736 {0x1083, 0xC0, 0x1462, 0x7680, 0x1}, 737 {0x1083, 0xC0, 0x1565, 0x2803, 0x1}, 738 {0}, 739 }; 740 741 static void __devinit atl1c_patch_assign(struct atl1c_hw *hw) 742 { 743 int i = 0; 744 745 hw->msi_lnkpatch = false; 746 747 while (plats[i].pci_did != 0) { 748 if (plats[i].pci_did == hw->device_id && 749 plats[i].pci_revid == hw->revision_id && 750 plats[i].subsystem_vid == hw->subsystem_vendor_id && 751 plats[i].subsystem_did == hw->subsystem_id) { 752 if (plats[i].patch_flag & ATL1C_LINK_PATCH) 753 hw->msi_lnkpatch = true; 754 } 755 i++; 756 } 757 } 758 /* 759 * atl1c_sw_init - Initialize general software structures (struct atl1c_adapter) 760 * @adapter: board private structure to initialize 761 * 762 * atl1c_sw_init initializes the Adapter private data structure. 763 * Fields are initialized based on PCI device information and 764 * OS network device settings (MTU size). 765 */ 766 static int __devinit atl1c_sw_init(struct atl1c_adapter *adapter) 767 { 768 struct atl1c_hw *hw = &adapter->hw; 769 struct pci_dev *pdev = adapter->pdev; 770 u32 revision; 771 772 773 adapter->wol = 0; 774 device_set_wakeup_enable(&pdev->dev, false); 775 adapter->link_speed = SPEED_0; 776 adapter->link_duplex = FULL_DUPLEX; 777 adapter->tpd_ring[0].count = 1024; 778 adapter->rfd_ring.count = 512; 779 780 hw->vendor_id = pdev->vendor; 781 hw->device_id = pdev->device; 782 hw->subsystem_vendor_id = pdev->subsystem_vendor; 783 hw->subsystem_id = pdev->subsystem_device; 784 AT_READ_REG(hw, PCI_CLASS_REVISION, &revision); 785 hw->revision_id = revision & 0xFF; 786 /* before link up, we assume hibernate is true */ 787 hw->hibernate = true; 788 hw->media_type = MEDIA_TYPE_AUTO_SENSOR; 789 if (atl1c_setup_mac_funcs(hw) != 0) { 790 dev_err(&pdev->dev, "set mac function pointers failed\n"); 791 return -1; 792 } 793 atl1c_patch_assign(hw); 794 795 hw->intr_mask = IMR_NORMAL_MASK; 796 hw->phy_configured = false; 797 hw->preamble_len = 7; 798 hw->max_frame_size = adapter->netdev->mtu; 799 hw->autoneg_advertised = ADVERTISED_Autoneg; 800 hw->indirect_tab = 0xE4E4E4E4; 801 hw->base_cpu = 0; 802 803 hw->ict = 50000; /* 100ms */ 804 hw->smb_timer = 200000; /* 400ms */ 805 hw->rx_imt = 200; 806 hw->tx_imt = 1000; 807 808 hw->tpd_burst = 5; 809 hw->rfd_burst = 8; 810 hw->dma_order = atl1c_dma_ord_out; 811 hw->dmar_block = atl1c_dma_req_1024; 812 813 if (atl1c_alloc_queues(adapter)) { 814 dev_err(&pdev->dev, "Unable to allocate memory for queues\n"); 815 return -ENOMEM; 816 } 817 /* TODO */ 818 atl1c_set_rxbufsize(adapter, adapter->netdev); 819 atomic_set(&adapter->irq_sem, 1); 820 spin_lock_init(&adapter->mdio_lock); 821 spin_lock_init(&adapter->tx_lock); 822 set_bit(__AT_DOWN, &adapter->flags); 823 824 return 0; 825 } 826 827 static inline void atl1c_clean_buffer(struct pci_dev *pdev, 828 struct atl1c_buffer *buffer_info, int in_irq) 829 { 830 u16 pci_driection; 831 if (buffer_info->flags & ATL1C_BUFFER_FREE) 832 return; 833 if (buffer_info->dma) { 834 if (buffer_info->flags & ATL1C_PCIMAP_FROMDEVICE) 835 pci_driection = PCI_DMA_FROMDEVICE; 836 else 837 pci_driection = PCI_DMA_TODEVICE; 838 839 if (buffer_info->flags & ATL1C_PCIMAP_SINGLE) 840 pci_unmap_single(pdev, buffer_info->dma, 841 buffer_info->length, pci_driection); 842 else if (buffer_info->flags & ATL1C_PCIMAP_PAGE) 843 pci_unmap_page(pdev, buffer_info->dma, 844 buffer_info->length, pci_driection); 845 } 846 if (buffer_info->skb) { 847 if (in_irq) 848 dev_kfree_skb_irq(buffer_info->skb); 849 else 850 dev_kfree_skb(buffer_info->skb); 851 } 852 buffer_info->dma = 0; 853 buffer_info->skb = NULL; 854 ATL1C_SET_BUFFER_STATE(buffer_info, ATL1C_BUFFER_FREE); 855 } 856 /* 857 * atl1c_clean_tx_ring - Free Tx-skb 858 * @adapter: board private structure 859 */ 860 static void atl1c_clean_tx_ring(struct atl1c_adapter *adapter, 861 enum atl1c_trans_queue type) 862 { 863 struct atl1c_tpd_ring *tpd_ring = &adapter->tpd_ring[type]; 864 struct atl1c_buffer *buffer_info; 865 struct pci_dev *pdev = adapter->pdev; 866 u16 index, ring_count; 867 868 ring_count = tpd_ring->count; 869 for (index = 0; index < ring_count; index++) { 870 buffer_info = &tpd_ring->buffer_info[index]; 871 atl1c_clean_buffer(pdev, buffer_info, 0); 872 } 873 874 /* Zero out Tx-buffers */ 875 memset(tpd_ring->desc, 0, sizeof(struct atl1c_tpd_desc) * 876 ring_count); 877 atomic_set(&tpd_ring->next_to_clean, 0); 878 tpd_ring->next_to_use = 0; 879 } 880 881 /* 882 * atl1c_clean_rx_ring - Free rx-reservation skbs 883 * @adapter: board private structure 884 */ 885 static void atl1c_clean_rx_ring(struct atl1c_adapter *adapter) 886 { 887 struct atl1c_rfd_ring *rfd_ring = &adapter->rfd_ring; 888 struct atl1c_rrd_ring *rrd_ring = &adapter->rrd_ring; 889 struct atl1c_buffer *buffer_info; 890 struct pci_dev *pdev = adapter->pdev; 891 int j; 892 893 for (j = 0; j < rfd_ring->count; j++) { 894 buffer_info = &rfd_ring->buffer_info[j]; 895 atl1c_clean_buffer(pdev, buffer_info, 0); 896 } 897 /* zero out the descriptor ring */ 898 memset(rfd_ring->desc, 0, rfd_ring->size); 899 rfd_ring->next_to_clean = 0; 900 rfd_ring->next_to_use = 0; 901 rrd_ring->next_to_use = 0; 902 rrd_ring->next_to_clean = 0; 903 } 904 905 /* 906 * Read / Write Ptr Initialize: 907 */ 908 static void atl1c_init_ring_ptrs(struct atl1c_adapter *adapter) 909 { 910 struct atl1c_tpd_ring *tpd_ring = adapter->tpd_ring; 911 struct atl1c_rfd_ring *rfd_ring = &adapter->rfd_ring; 912 struct atl1c_rrd_ring *rrd_ring = &adapter->rrd_ring; 913 struct atl1c_buffer *buffer_info; 914 int i, j; 915 916 for (i = 0; i < AT_MAX_TRANSMIT_QUEUE; i++) { 917 tpd_ring[i].next_to_use = 0; 918 atomic_set(&tpd_ring[i].next_to_clean, 0); 919 buffer_info = tpd_ring[i].buffer_info; 920 for (j = 0; j < tpd_ring->count; j++) 921 ATL1C_SET_BUFFER_STATE(&buffer_info[i], 922 ATL1C_BUFFER_FREE); 923 } 924 rfd_ring->next_to_use = 0; 925 rfd_ring->next_to_clean = 0; 926 rrd_ring->next_to_use = 0; 927 rrd_ring->next_to_clean = 0; 928 for (j = 0; j < rfd_ring->count; j++) { 929 buffer_info = &rfd_ring->buffer_info[j]; 930 ATL1C_SET_BUFFER_STATE(buffer_info, ATL1C_BUFFER_FREE); 931 } 932 } 933 934 /* 935 * atl1c_free_ring_resources - Free Tx / RX descriptor Resources 936 * @adapter: board private structure 937 * 938 * Free all transmit software resources 939 */ 940 static void atl1c_free_ring_resources(struct atl1c_adapter *adapter) 941 { 942 struct pci_dev *pdev = adapter->pdev; 943 944 pci_free_consistent(pdev, adapter->ring_header.size, 945 adapter->ring_header.desc, 946 adapter->ring_header.dma); 947 adapter->ring_header.desc = NULL; 948 949 /* Note: just free tdp_ring.buffer_info, 950 * it contain rfd_ring.buffer_info, do not double free */ 951 if (adapter->tpd_ring[0].buffer_info) { 952 kfree(adapter->tpd_ring[0].buffer_info); 953 adapter->tpd_ring[0].buffer_info = NULL; 954 } 955 } 956 957 /* 958 * atl1c_setup_mem_resources - allocate Tx / RX descriptor resources 959 * @adapter: board private structure 960 * 961 * Return 0 on success, negative on failure 962 */ 963 static int atl1c_setup_ring_resources(struct atl1c_adapter *adapter) 964 { 965 struct pci_dev *pdev = adapter->pdev; 966 struct atl1c_tpd_ring *tpd_ring = adapter->tpd_ring; 967 struct atl1c_rfd_ring *rfd_ring = &adapter->rfd_ring; 968 struct atl1c_rrd_ring *rrd_ring = &adapter->rrd_ring; 969 struct atl1c_ring_header *ring_header = &adapter->ring_header; 970 int size; 971 int i; 972 int count = 0; 973 int rx_desc_count = 0; 974 u32 offset = 0; 975 976 rrd_ring->count = rfd_ring->count; 977 for (i = 1; i < AT_MAX_TRANSMIT_QUEUE; i++) 978 tpd_ring[i].count = tpd_ring[0].count; 979 980 /* 2 tpd queue, one high priority queue, 981 * another normal priority queue */ 982 size = sizeof(struct atl1c_buffer) * (tpd_ring->count * 2 + 983 rfd_ring->count); 984 tpd_ring->buffer_info = kzalloc(size, GFP_KERNEL); 985 if (unlikely(!tpd_ring->buffer_info)) { 986 dev_err(&pdev->dev, "kzalloc failed, size = %d\n", 987 size); 988 goto err_nomem; 989 } 990 for (i = 0; i < AT_MAX_TRANSMIT_QUEUE; i++) { 991 tpd_ring[i].buffer_info = 992 (struct atl1c_buffer *) (tpd_ring->buffer_info + count); 993 count += tpd_ring[i].count; 994 } 995 996 rfd_ring->buffer_info = 997 (struct atl1c_buffer *) (tpd_ring->buffer_info + count); 998 count += rfd_ring->count; 999 rx_desc_count += rfd_ring->count; 1000 1001 /* 1002 * real ring DMA buffer 1003 * each ring/block may need up to 8 bytes for alignment, hence the 1004 * additional bytes tacked onto the end. 1005 */ 1006 ring_header->size = size = 1007 sizeof(struct atl1c_tpd_desc) * tpd_ring->count * 2 + 1008 sizeof(struct atl1c_rx_free_desc) * rx_desc_count + 1009 sizeof(struct atl1c_recv_ret_status) * rx_desc_count + 1010 8 * 4; 1011 1012 ring_header->desc = pci_alloc_consistent(pdev, ring_header->size, 1013 &ring_header->dma); 1014 if (unlikely(!ring_header->desc)) { 1015 dev_err(&pdev->dev, "pci_alloc_consistend failed\n"); 1016 goto err_nomem; 1017 } 1018 memset(ring_header->desc, 0, ring_header->size); 1019 /* init TPD ring */ 1020 1021 tpd_ring[0].dma = roundup(ring_header->dma, 8); 1022 offset = tpd_ring[0].dma - ring_header->dma; 1023 for (i = 0; i < AT_MAX_TRANSMIT_QUEUE; i++) { 1024 tpd_ring[i].dma = ring_header->dma + offset; 1025 tpd_ring[i].desc = (u8 *) ring_header->desc + offset; 1026 tpd_ring[i].size = 1027 sizeof(struct atl1c_tpd_desc) * tpd_ring[i].count; 1028 offset += roundup(tpd_ring[i].size, 8); 1029 } 1030 /* init RFD ring */ 1031 rfd_ring->dma = ring_header->dma + offset; 1032 rfd_ring->desc = (u8 *) ring_header->desc + offset; 1033 rfd_ring->size = sizeof(struct atl1c_rx_free_desc) * rfd_ring->count; 1034 offset += roundup(rfd_ring->size, 8); 1035 1036 /* init RRD ring */ 1037 rrd_ring->dma = ring_header->dma + offset; 1038 rrd_ring->desc = (u8 *) ring_header->desc + offset; 1039 rrd_ring->size = sizeof(struct atl1c_recv_ret_status) * 1040 rrd_ring->count; 1041 offset += roundup(rrd_ring->size, 8); 1042 1043 return 0; 1044 1045 err_nomem: 1046 kfree(tpd_ring->buffer_info); 1047 return -ENOMEM; 1048 } 1049 1050 static void atl1c_configure_des_ring(struct atl1c_adapter *adapter) 1051 { 1052 struct atl1c_hw *hw = &adapter->hw; 1053 struct atl1c_rfd_ring *rfd_ring = &adapter->rfd_ring; 1054 struct atl1c_rrd_ring *rrd_ring = &adapter->rrd_ring; 1055 struct atl1c_tpd_ring *tpd_ring = (struct atl1c_tpd_ring *) 1056 adapter->tpd_ring; 1057 1058 /* TPD */ 1059 AT_WRITE_REG(hw, REG_TX_BASE_ADDR_HI, 1060 (u32)((tpd_ring[atl1c_trans_normal].dma & 1061 AT_DMA_HI_ADDR_MASK) >> 32)); 1062 /* just enable normal priority TX queue */ 1063 AT_WRITE_REG(hw, REG_TPD_PRI0_ADDR_LO, 1064 (u32)(tpd_ring[atl1c_trans_normal].dma & 1065 AT_DMA_LO_ADDR_MASK)); 1066 AT_WRITE_REG(hw, REG_TPD_PRI1_ADDR_LO, 1067 (u32)(tpd_ring[atl1c_trans_high].dma & 1068 AT_DMA_LO_ADDR_MASK)); 1069 AT_WRITE_REG(hw, REG_TPD_RING_SIZE, 1070 (u32)(tpd_ring[0].count & TPD_RING_SIZE_MASK)); 1071 1072 1073 /* RFD */ 1074 AT_WRITE_REG(hw, REG_RX_BASE_ADDR_HI, 1075 (u32)((rfd_ring->dma & AT_DMA_HI_ADDR_MASK) >> 32)); 1076 AT_WRITE_REG(hw, REG_RFD0_HEAD_ADDR_LO, 1077 (u32)(rfd_ring->dma & AT_DMA_LO_ADDR_MASK)); 1078 1079 AT_WRITE_REG(hw, REG_RFD_RING_SIZE, 1080 rfd_ring->count & RFD_RING_SIZE_MASK); 1081 AT_WRITE_REG(hw, REG_RX_BUF_SIZE, 1082 adapter->rx_buffer_len & RX_BUF_SIZE_MASK); 1083 1084 /* RRD */ 1085 AT_WRITE_REG(hw, REG_RRD0_HEAD_ADDR_LO, 1086 (u32)(rrd_ring->dma & AT_DMA_LO_ADDR_MASK)); 1087 AT_WRITE_REG(hw, REG_RRD_RING_SIZE, 1088 (rrd_ring->count & RRD_RING_SIZE_MASK)); 1089 1090 if (hw->nic_type == athr_l2c_b) { 1091 AT_WRITE_REG(hw, REG_SRAM_RXF_LEN, 0x02a0L); 1092 AT_WRITE_REG(hw, REG_SRAM_TXF_LEN, 0x0100L); 1093 AT_WRITE_REG(hw, REG_SRAM_RXF_ADDR, 0x029f0000L); 1094 AT_WRITE_REG(hw, REG_SRAM_RFD0_INFO, 0x02bf02a0L); 1095 AT_WRITE_REG(hw, REG_SRAM_TXF_ADDR, 0x03bf02c0L); 1096 AT_WRITE_REG(hw, REG_SRAM_TRD_ADDR, 0x03df03c0L); 1097 AT_WRITE_REG(hw, REG_TXF_WATER_MARK, 0); /* TX watermark, to enter l1 state.*/ 1098 AT_WRITE_REG(hw, REG_RXD_DMA_CTRL, 0); /* RXD threshold.*/ 1099 } 1100 /* Load all of base address above */ 1101 AT_WRITE_REG(hw, REG_LOAD_PTR, 1); 1102 } 1103 1104 static void atl1c_configure_tx(struct atl1c_adapter *adapter) 1105 { 1106 struct atl1c_hw *hw = &adapter->hw; 1107 int max_pay_load; 1108 u16 tx_offload_thresh; 1109 u32 txq_ctrl_data; 1110 1111 tx_offload_thresh = MAX_TSO_FRAME_SIZE; 1112 AT_WRITE_REG(hw, REG_TX_TSO_OFFLOAD_THRESH, 1113 (tx_offload_thresh >> 3) & TX_TSO_OFFLOAD_THRESH_MASK); 1114 max_pay_load = pcie_get_readrq(adapter->pdev) >> 8; 1115 hw->dmar_block = min_t(u32, max_pay_load, hw->dmar_block); 1116 /* 1117 * if BIOS had changed the dam-read-max-length to an invalid value, 1118 * restore it to default value 1119 */ 1120 if (hw->dmar_block < DEVICE_CTRL_MAXRRS_MIN) { 1121 pcie_set_readrq(adapter->pdev, 128 << DEVICE_CTRL_MAXRRS_MIN); 1122 hw->dmar_block = DEVICE_CTRL_MAXRRS_MIN; 1123 } 1124 txq_ctrl_data = 1125 hw->nic_type == athr_l2c_b || hw->nic_type == athr_l2c_b2 ? 1126 L2CB_TXQ_CFGV : L1C_TXQ_CFGV; 1127 1128 AT_WRITE_REG(hw, REG_TXQ_CTRL, txq_ctrl_data); 1129 } 1130 1131 static void atl1c_configure_rx(struct atl1c_adapter *adapter) 1132 { 1133 struct atl1c_hw *hw = &adapter->hw; 1134 u32 rxq_ctrl_data; 1135 1136 rxq_ctrl_data = (hw->rfd_burst & RXQ_RFD_BURST_NUM_MASK) << 1137 RXQ_RFD_BURST_NUM_SHIFT; 1138 1139 if (hw->ctrl_flags & ATL1C_RX_IPV6_CHKSUM) 1140 rxq_ctrl_data |= IPV6_CHKSUM_CTRL_EN; 1141 1142 /* aspm for gigabit */ 1143 if (hw->nic_type != athr_l1d_2 && (hw->device_id & 1) != 0) 1144 rxq_ctrl_data = FIELD_SETX(rxq_ctrl_data, ASPM_THRUPUT_LIMIT, 1145 ASPM_THRUPUT_LIMIT_100M); 1146 1147 AT_WRITE_REG(hw, REG_RXQ_CTRL, rxq_ctrl_data); 1148 } 1149 1150 static void atl1c_configure_dma(struct atl1c_adapter *adapter) 1151 { 1152 struct atl1c_hw *hw = &adapter->hw; 1153 u32 dma_ctrl_data; 1154 1155 dma_ctrl_data = FIELDX(DMA_CTRL_RORDER_MODE, DMA_CTRL_RORDER_MODE_OUT) | 1156 DMA_CTRL_RREQ_PRI_DATA | 1157 FIELDX(DMA_CTRL_RREQ_BLEN, hw->dmar_block) | 1158 FIELDX(DMA_CTRL_WDLY_CNT, DMA_CTRL_WDLY_CNT_DEF) | 1159 FIELDX(DMA_CTRL_RDLY_CNT, DMA_CTRL_RDLY_CNT_DEF); 1160 1161 AT_WRITE_REG(hw, REG_DMA_CTRL, dma_ctrl_data); 1162 } 1163 1164 /* 1165 * Stop the mac, transmit and receive units 1166 * hw - Struct containing variables accessed by shared code 1167 * return : 0 or idle status (if error) 1168 */ 1169 static int atl1c_stop_mac(struct atl1c_hw *hw) 1170 { 1171 u32 data; 1172 1173 AT_READ_REG(hw, REG_RXQ_CTRL, &data); 1174 data &= ~RXQ_CTRL_EN; 1175 AT_WRITE_REG(hw, REG_RXQ_CTRL, data); 1176 1177 AT_READ_REG(hw, REG_TXQ_CTRL, &data); 1178 data &= ~TXQ_CTRL_EN; 1179 AT_WRITE_REG(hw, REG_TXQ_CTRL, data); 1180 1181 atl1c_wait_until_idle(hw, IDLE_STATUS_RXQ_BUSY | IDLE_STATUS_TXQ_BUSY); 1182 1183 AT_READ_REG(hw, REG_MAC_CTRL, &data); 1184 data &= ~(MAC_CTRL_TX_EN | MAC_CTRL_RX_EN); 1185 AT_WRITE_REG(hw, REG_MAC_CTRL, data); 1186 1187 return (int)atl1c_wait_until_idle(hw, 1188 IDLE_STATUS_TXMAC_BUSY | IDLE_STATUS_RXMAC_BUSY); 1189 } 1190 1191 static void atl1c_start_mac(struct atl1c_adapter *adapter) 1192 { 1193 struct atl1c_hw *hw = &adapter->hw; 1194 u32 mac, txq, rxq; 1195 1196 hw->mac_duplex = adapter->link_duplex == FULL_DUPLEX ? true : false; 1197 hw->mac_speed = adapter->link_speed == SPEED_1000 ? 1198 atl1c_mac_speed_1000 : atl1c_mac_speed_10_100; 1199 1200 AT_READ_REG(hw, REG_TXQ_CTRL, &txq); 1201 AT_READ_REG(hw, REG_RXQ_CTRL, &rxq); 1202 AT_READ_REG(hw, REG_MAC_CTRL, &mac); 1203 1204 txq |= TXQ_CTRL_EN; 1205 rxq |= RXQ_CTRL_EN; 1206 mac |= MAC_CTRL_TX_EN | MAC_CTRL_TX_FLOW | 1207 MAC_CTRL_RX_EN | MAC_CTRL_RX_FLOW | 1208 MAC_CTRL_ADD_CRC | MAC_CTRL_PAD | 1209 MAC_CTRL_BC_EN | MAC_CTRL_SINGLE_PAUSE_EN | 1210 MAC_CTRL_HASH_ALG_CRC32; 1211 if (hw->mac_duplex) 1212 mac |= MAC_CTRL_DUPLX; 1213 else 1214 mac &= ~MAC_CTRL_DUPLX; 1215 mac = FIELD_SETX(mac, MAC_CTRL_SPEED, hw->mac_speed); 1216 mac = FIELD_SETX(mac, MAC_CTRL_PRMLEN, hw->preamble_len); 1217 1218 AT_WRITE_REG(hw, REG_TXQ_CTRL, txq); 1219 AT_WRITE_REG(hw, REG_RXQ_CTRL, rxq); 1220 AT_WRITE_REG(hw, REG_MAC_CTRL, mac); 1221 } 1222 1223 /* 1224 * Reset the transmit and receive units; mask and clear all interrupts. 1225 * hw - Struct containing variables accessed by shared code 1226 * return : 0 or idle status (if error) 1227 */ 1228 static int atl1c_reset_mac(struct atl1c_hw *hw) 1229 { 1230 struct atl1c_adapter *adapter = (struct atl1c_adapter *)hw->adapter; 1231 struct pci_dev *pdev = adapter->pdev; 1232 u32 ctrl_data = 0; 1233 1234 atl1c_stop_mac(hw); 1235 /* 1236 * Issue Soft Reset to the MAC. This will reset the chip's 1237 * transmit, receive, DMA. It will not effect 1238 * the current PCI configuration. The global reset bit is self- 1239 * clearing, and should clear within a microsecond. 1240 */ 1241 AT_READ_REG(hw, REG_MASTER_CTRL, &ctrl_data); 1242 ctrl_data |= MASTER_CTRL_OOB_DIS; 1243 AT_WRITE_REG(hw, REG_MASTER_CTRL, ctrl_data | MASTER_CTRL_SOFT_RST); 1244 1245 AT_WRITE_FLUSH(hw); 1246 msleep(10); 1247 /* Wait at least 10ms for All module to be Idle */ 1248 1249 if (atl1c_wait_until_idle(hw, IDLE_STATUS_MASK)) { 1250 dev_err(&pdev->dev, 1251 "MAC state machine can't be idle since" 1252 " disabled for 10ms second\n"); 1253 return -1; 1254 } 1255 AT_WRITE_REG(hw, REG_MASTER_CTRL, ctrl_data); 1256 1257 /* driver control speed/duplex */ 1258 AT_READ_REG(hw, REG_MAC_CTRL, &ctrl_data); 1259 AT_WRITE_REG(hw, REG_MAC_CTRL, ctrl_data | MAC_CTRL_SPEED_MODE_SW); 1260 1261 /* clk switch setting */ 1262 AT_READ_REG(hw, REG_SERDES, &ctrl_data); 1263 switch (hw->nic_type) { 1264 case athr_l2c_b: 1265 ctrl_data &= ~(SERDES_PHY_CLK_SLOWDOWN | 1266 SERDES_MAC_CLK_SLOWDOWN); 1267 AT_WRITE_REG(hw, REG_SERDES, ctrl_data); 1268 break; 1269 case athr_l2c_b2: 1270 case athr_l1d_2: 1271 ctrl_data |= SERDES_PHY_CLK_SLOWDOWN | SERDES_MAC_CLK_SLOWDOWN; 1272 AT_WRITE_REG(hw, REG_SERDES, ctrl_data); 1273 break; 1274 default: 1275 break; 1276 } 1277 1278 return 0; 1279 } 1280 1281 static void atl1c_disable_l0s_l1(struct atl1c_hw *hw) 1282 { 1283 u16 ctrl_flags = hw->ctrl_flags; 1284 1285 hw->ctrl_flags &= ~(ATL1C_ASPM_L0S_SUPPORT | ATL1C_ASPM_L1_SUPPORT); 1286 atl1c_set_aspm(hw, SPEED_0); 1287 hw->ctrl_flags = ctrl_flags; 1288 } 1289 1290 /* 1291 * Set ASPM state. 1292 * Enable/disable L0s/L1 depend on link state. 1293 */ 1294 static void atl1c_set_aspm(struct atl1c_hw *hw, u16 link_speed) 1295 { 1296 u32 pm_ctrl_data; 1297 u32 link_l1_timer; 1298 1299 AT_READ_REG(hw, REG_PM_CTRL, &pm_ctrl_data); 1300 pm_ctrl_data &= ~(PM_CTRL_ASPM_L1_EN | 1301 PM_CTRL_ASPM_L0S_EN | 1302 PM_CTRL_MAC_ASPM_CHK); 1303 /* L1 timer */ 1304 if (hw->nic_type == athr_l2c_b2 || hw->nic_type == athr_l1d_2) { 1305 pm_ctrl_data &= ~PMCTRL_TXL1_AFTER_L0S; 1306 link_l1_timer = 1307 link_speed == SPEED_1000 || link_speed == SPEED_100 ? 1308 L1D_PMCTRL_L1_ENTRY_TM_16US : 1; 1309 pm_ctrl_data = FIELD_SETX(pm_ctrl_data, 1310 L1D_PMCTRL_L1_ENTRY_TM, link_l1_timer); 1311 } else { 1312 link_l1_timer = hw->nic_type == athr_l2c_b ? 1313 L2CB1_PM_CTRL_L1_ENTRY_TM : L1C_PM_CTRL_L1_ENTRY_TM; 1314 if (link_speed != SPEED_1000 && link_speed != SPEED_100) 1315 link_l1_timer = 1; 1316 pm_ctrl_data = FIELD_SETX(pm_ctrl_data, 1317 PM_CTRL_L1_ENTRY_TIMER, link_l1_timer); 1318 } 1319 1320 /* L0S/L1 enable */ 1321 if ((hw->ctrl_flags & ATL1C_ASPM_L0S_SUPPORT) && link_speed != SPEED_0) 1322 pm_ctrl_data |= PM_CTRL_ASPM_L0S_EN | PM_CTRL_MAC_ASPM_CHK; 1323 if (hw->ctrl_flags & ATL1C_ASPM_L1_SUPPORT) 1324 pm_ctrl_data |= PM_CTRL_ASPM_L1_EN | PM_CTRL_MAC_ASPM_CHK; 1325 1326 /* l2cb & l1d & l2cb2 & l1d2 */ 1327 if (hw->nic_type == athr_l2c_b || hw->nic_type == athr_l1d || 1328 hw->nic_type == athr_l2c_b2 || hw->nic_type == athr_l1d_2) { 1329 pm_ctrl_data = FIELD_SETX(pm_ctrl_data, 1330 PM_CTRL_PM_REQ_TIMER, PM_CTRL_PM_REQ_TO_DEF); 1331 pm_ctrl_data |= PM_CTRL_RCVR_WT_TIMER | 1332 PM_CTRL_SERDES_PD_EX_L1 | 1333 PM_CTRL_CLK_SWH_L1; 1334 pm_ctrl_data &= ~(PM_CTRL_SERDES_L1_EN | 1335 PM_CTRL_SERDES_PLL_L1_EN | 1336 PM_CTRL_SERDES_BUFS_RX_L1_EN | 1337 PM_CTRL_SA_DLY_EN | 1338 PM_CTRL_HOTRST); 1339 /* disable l0s if link down or l2cb */ 1340 if (link_speed == SPEED_0 || hw->nic_type == athr_l2c_b) 1341 pm_ctrl_data &= ~PM_CTRL_ASPM_L0S_EN; 1342 } else { /* l1c */ 1343 pm_ctrl_data = 1344 FIELD_SETX(pm_ctrl_data, PM_CTRL_L1_ENTRY_TIMER, 0); 1345 if (link_speed != SPEED_0) { 1346 pm_ctrl_data |= PM_CTRL_SERDES_L1_EN | 1347 PM_CTRL_SERDES_PLL_L1_EN | 1348 PM_CTRL_SERDES_BUFS_RX_L1_EN; 1349 pm_ctrl_data &= ~(PM_CTRL_SERDES_PD_EX_L1 | 1350 PM_CTRL_CLK_SWH_L1 | 1351 PM_CTRL_ASPM_L0S_EN | 1352 PM_CTRL_ASPM_L1_EN); 1353 } else { /* link down */ 1354 pm_ctrl_data |= PM_CTRL_CLK_SWH_L1; 1355 pm_ctrl_data &= ~(PM_CTRL_SERDES_L1_EN | 1356 PM_CTRL_SERDES_PLL_L1_EN | 1357 PM_CTRL_SERDES_BUFS_RX_L1_EN | 1358 PM_CTRL_ASPM_L0S_EN); 1359 } 1360 } 1361 AT_WRITE_REG(hw, REG_PM_CTRL, pm_ctrl_data); 1362 1363 return; 1364 } 1365 1366 /* 1367 * atl1c_configure - Configure Transmit&Receive Unit after Reset 1368 * @adapter: board private structure 1369 * 1370 * Configure the Tx /Rx unit of the MAC after a reset. 1371 */ 1372 static int atl1c_configure_mac(struct atl1c_adapter *adapter) 1373 { 1374 struct atl1c_hw *hw = &adapter->hw; 1375 u32 master_ctrl_data = 0; 1376 u32 intr_modrt_data; 1377 u32 data; 1378 1379 AT_READ_REG(hw, REG_MASTER_CTRL, &master_ctrl_data); 1380 master_ctrl_data &= ~(MASTER_CTRL_TX_ITIMER_EN | 1381 MASTER_CTRL_RX_ITIMER_EN | 1382 MASTER_CTRL_INT_RDCLR); 1383 /* clear interrupt status */ 1384 AT_WRITE_REG(hw, REG_ISR, 0xFFFFFFFF); 1385 /* Clear any WOL status */ 1386 AT_WRITE_REG(hw, REG_WOL_CTRL, 0); 1387 /* set Interrupt Clear Timer 1388 * HW will enable self to assert interrupt event to system after 1389 * waiting x-time for software to notify it accept interrupt. 1390 */ 1391 1392 data = CLK_GATING_EN_ALL; 1393 if (hw->ctrl_flags & ATL1C_CLK_GATING_EN) { 1394 if (hw->nic_type == athr_l2c_b) 1395 data &= ~CLK_GATING_RXMAC_EN; 1396 } else 1397 data = 0; 1398 AT_WRITE_REG(hw, REG_CLK_GATING_CTRL, data); 1399 1400 AT_WRITE_REG(hw, REG_INT_RETRIG_TIMER, 1401 hw->ict & INT_RETRIG_TIMER_MASK); 1402 1403 atl1c_configure_des_ring(adapter); 1404 1405 if (hw->ctrl_flags & ATL1C_INTR_MODRT_ENABLE) { 1406 intr_modrt_data = (hw->tx_imt & IRQ_MODRT_TIMER_MASK) << 1407 IRQ_MODRT_TX_TIMER_SHIFT; 1408 intr_modrt_data |= (hw->rx_imt & IRQ_MODRT_TIMER_MASK) << 1409 IRQ_MODRT_RX_TIMER_SHIFT; 1410 AT_WRITE_REG(hw, REG_IRQ_MODRT_TIMER_INIT, intr_modrt_data); 1411 master_ctrl_data |= 1412 MASTER_CTRL_TX_ITIMER_EN | MASTER_CTRL_RX_ITIMER_EN; 1413 } 1414 1415 if (hw->ctrl_flags & ATL1C_INTR_CLEAR_ON_READ) 1416 master_ctrl_data |= MASTER_CTRL_INT_RDCLR; 1417 1418 master_ctrl_data |= MASTER_CTRL_SA_TIMER_EN; 1419 AT_WRITE_REG(hw, REG_MASTER_CTRL, master_ctrl_data); 1420 1421 AT_WRITE_REG(hw, REG_SMB_STAT_TIMER, 1422 hw->smb_timer & SMB_STAT_TIMER_MASK); 1423 1424 /* set MTU */ 1425 AT_WRITE_REG(hw, REG_MTU, hw->max_frame_size + ETH_HLEN + 1426 VLAN_HLEN + ETH_FCS_LEN); 1427 1428 atl1c_configure_tx(adapter); 1429 atl1c_configure_rx(adapter); 1430 atl1c_configure_dma(adapter); 1431 1432 return 0; 1433 } 1434 1435 static int atl1c_configure(struct atl1c_adapter *adapter) 1436 { 1437 struct net_device *netdev = adapter->netdev; 1438 int num; 1439 1440 atl1c_init_ring_ptrs(adapter); 1441 atl1c_set_multi(netdev); 1442 atl1c_restore_vlan(adapter); 1443 1444 num = atl1c_alloc_rx_buffer(adapter); 1445 if (unlikely(num == 0)) 1446 return -ENOMEM; 1447 1448 if (atl1c_configure_mac(adapter)) 1449 return -EIO; 1450 1451 return 0; 1452 } 1453 1454 static void atl1c_update_hw_stats(struct atl1c_adapter *adapter) 1455 { 1456 u16 hw_reg_addr = 0; 1457 unsigned long *stats_item = NULL; 1458 u32 data; 1459 1460 /* update rx status */ 1461 hw_reg_addr = REG_MAC_RX_STATUS_BIN; 1462 stats_item = &adapter->hw_stats.rx_ok; 1463 while (hw_reg_addr <= REG_MAC_RX_STATUS_END) { 1464 AT_READ_REG(&adapter->hw, hw_reg_addr, &data); 1465 *stats_item += data; 1466 stats_item++; 1467 hw_reg_addr += 4; 1468 } 1469 /* update tx status */ 1470 hw_reg_addr = REG_MAC_TX_STATUS_BIN; 1471 stats_item = &adapter->hw_stats.tx_ok; 1472 while (hw_reg_addr <= REG_MAC_TX_STATUS_END) { 1473 AT_READ_REG(&adapter->hw, hw_reg_addr, &data); 1474 *stats_item += data; 1475 stats_item++; 1476 hw_reg_addr += 4; 1477 } 1478 } 1479 1480 /* 1481 * atl1c_get_stats - Get System Network Statistics 1482 * @netdev: network interface device structure 1483 * 1484 * Returns the address of the device statistics structure. 1485 * The statistics are actually updated from the timer callback. 1486 */ 1487 static struct net_device_stats *atl1c_get_stats(struct net_device *netdev) 1488 { 1489 struct atl1c_adapter *adapter = netdev_priv(netdev); 1490 struct atl1c_hw_stats *hw_stats = &adapter->hw_stats; 1491 struct net_device_stats *net_stats = &netdev->stats; 1492 1493 atl1c_update_hw_stats(adapter); 1494 net_stats->rx_packets = hw_stats->rx_ok; 1495 net_stats->tx_packets = hw_stats->tx_ok; 1496 net_stats->rx_bytes = hw_stats->rx_byte_cnt; 1497 net_stats->tx_bytes = hw_stats->tx_byte_cnt; 1498 net_stats->multicast = hw_stats->rx_mcast; 1499 net_stats->collisions = hw_stats->tx_1_col + 1500 hw_stats->tx_2_col * 2 + 1501 hw_stats->tx_late_col + hw_stats->tx_abort_col; 1502 net_stats->rx_errors = hw_stats->rx_frag + hw_stats->rx_fcs_err + 1503 hw_stats->rx_len_err + hw_stats->rx_sz_ov + 1504 hw_stats->rx_rrd_ov + hw_stats->rx_align_err; 1505 net_stats->rx_fifo_errors = hw_stats->rx_rxf_ov; 1506 net_stats->rx_length_errors = hw_stats->rx_len_err; 1507 net_stats->rx_crc_errors = hw_stats->rx_fcs_err; 1508 net_stats->rx_frame_errors = hw_stats->rx_align_err; 1509 net_stats->rx_over_errors = hw_stats->rx_rrd_ov + hw_stats->rx_rxf_ov; 1510 1511 net_stats->rx_missed_errors = hw_stats->rx_rrd_ov + hw_stats->rx_rxf_ov; 1512 1513 net_stats->tx_errors = hw_stats->tx_late_col + hw_stats->tx_abort_col + 1514 hw_stats->tx_underrun + hw_stats->tx_trunc; 1515 net_stats->tx_fifo_errors = hw_stats->tx_underrun; 1516 net_stats->tx_aborted_errors = hw_stats->tx_abort_col; 1517 net_stats->tx_window_errors = hw_stats->tx_late_col; 1518 1519 return net_stats; 1520 } 1521 1522 static inline void atl1c_clear_phy_int(struct atl1c_adapter *adapter) 1523 { 1524 u16 phy_data; 1525 1526 spin_lock(&adapter->mdio_lock); 1527 atl1c_read_phy_reg(&adapter->hw, MII_ISR, &phy_data); 1528 spin_unlock(&adapter->mdio_lock); 1529 } 1530 1531 static bool atl1c_clean_tx_irq(struct atl1c_adapter *adapter, 1532 enum atl1c_trans_queue type) 1533 { 1534 struct atl1c_tpd_ring *tpd_ring = (struct atl1c_tpd_ring *) 1535 &adapter->tpd_ring[type]; 1536 struct atl1c_buffer *buffer_info; 1537 struct pci_dev *pdev = adapter->pdev; 1538 u16 next_to_clean = atomic_read(&tpd_ring->next_to_clean); 1539 u16 hw_next_to_clean; 1540 u16 reg; 1541 1542 reg = type == atl1c_trans_high ? REG_TPD_PRI1_CIDX : REG_TPD_PRI0_CIDX; 1543 1544 AT_READ_REGW(&adapter->hw, reg, &hw_next_to_clean); 1545 1546 while (next_to_clean != hw_next_to_clean) { 1547 buffer_info = &tpd_ring->buffer_info[next_to_clean]; 1548 atl1c_clean_buffer(pdev, buffer_info, 1); 1549 if (++next_to_clean == tpd_ring->count) 1550 next_to_clean = 0; 1551 atomic_set(&tpd_ring->next_to_clean, next_to_clean); 1552 } 1553 1554 if (netif_queue_stopped(adapter->netdev) && 1555 netif_carrier_ok(adapter->netdev)) { 1556 netif_wake_queue(adapter->netdev); 1557 } 1558 1559 return true; 1560 } 1561 1562 /* 1563 * atl1c_intr - Interrupt Handler 1564 * @irq: interrupt number 1565 * @data: pointer to a network interface device structure 1566 * @pt_regs: CPU registers structure 1567 */ 1568 static irqreturn_t atl1c_intr(int irq, void *data) 1569 { 1570 struct net_device *netdev = data; 1571 struct atl1c_adapter *adapter = netdev_priv(netdev); 1572 struct pci_dev *pdev = adapter->pdev; 1573 struct atl1c_hw *hw = &adapter->hw; 1574 int max_ints = AT_MAX_INT_WORK; 1575 int handled = IRQ_NONE; 1576 u32 status; 1577 u32 reg_data; 1578 1579 do { 1580 AT_READ_REG(hw, REG_ISR, ®_data); 1581 status = reg_data & hw->intr_mask; 1582 1583 if (status == 0 || (status & ISR_DIS_INT) != 0) { 1584 if (max_ints != AT_MAX_INT_WORK) 1585 handled = IRQ_HANDLED; 1586 break; 1587 } 1588 /* link event */ 1589 if (status & ISR_GPHY) 1590 atl1c_clear_phy_int(adapter); 1591 /* Ack ISR */ 1592 AT_WRITE_REG(hw, REG_ISR, status | ISR_DIS_INT); 1593 if (status & ISR_RX_PKT) { 1594 if (likely(napi_schedule_prep(&adapter->napi))) { 1595 hw->intr_mask &= ~ISR_RX_PKT; 1596 AT_WRITE_REG(hw, REG_IMR, hw->intr_mask); 1597 __napi_schedule(&adapter->napi); 1598 } 1599 } 1600 if (status & ISR_TX_PKT) 1601 atl1c_clean_tx_irq(adapter, atl1c_trans_normal); 1602 1603 handled = IRQ_HANDLED; 1604 /* check if PCIE PHY Link down */ 1605 if (status & ISR_ERROR) { 1606 if (netif_msg_hw(adapter)) 1607 dev_err(&pdev->dev, 1608 "atl1c hardware error (status = 0x%x)\n", 1609 status & ISR_ERROR); 1610 /* reset MAC */ 1611 set_bit(ATL1C_WORK_EVENT_RESET, &adapter->work_event); 1612 schedule_work(&adapter->common_task); 1613 return IRQ_HANDLED; 1614 } 1615 1616 if (status & ISR_OVER) 1617 if (netif_msg_intr(adapter)) 1618 dev_warn(&pdev->dev, 1619 "TX/RX overflow (status = 0x%x)\n", 1620 status & ISR_OVER); 1621 1622 /* link event */ 1623 if (status & (ISR_GPHY | ISR_MANUAL)) { 1624 netdev->stats.tx_carrier_errors++; 1625 atl1c_link_chg_event(adapter); 1626 break; 1627 } 1628 1629 } while (--max_ints > 0); 1630 /* re-enable Interrupt*/ 1631 AT_WRITE_REG(&adapter->hw, REG_ISR, 0); 1632 return handled; 1633 } 1634 1635 static inline void atl1c_rx_checksum(struct atl1c_adapter *adapter, 1636 struct sk_buff *skb, struct atl1c_recv_ret_status *prrs) 1637 { 1638 /* 1639 * The pid field in RRS in not correct sometimes, so we 1640 * cannot figure out if the packet is fragmented or not, 1641 * so we tell the KERNEL CHECKSUM_NONE 1642 */ 1643 skb_checksum_none_assert(skb); 1644 } 1645 1646 static int atl1c_alloc_rx_buffer(struct atl1c_adapter *adapter) 1647 { 1648 struct atl1c_rfd_ring *rfd_ring = &adapter->rfd_ring; 1649 struct pci_dev *pdev = adapter->pdev; 1650 struct atl1c_buffer *buffer_info, *next_info; 1651 struct sk_buff *skb; 1652 void *vir_addr = NULL; 1653 u16 num_alloc = 0; 1654 u16 rfd_next_to_use, next_next; 1655 struct atl1c_rx_free_desc *rfd_desc; 1656 1657 next_next = rfd_next_to_use = rfd_ring->next_to_use; 1658 if (++next_next == rfd_ring->count) 1659 next_next = 0; 1660 buffer_info = &rfd_ring->buffer_info[rfd_next_to_use]; 1661 next_info = &rfd_ring->buffer_info[next_next]; 1662 1663 while (next_info->flags & ATL1C_BUFFER_FREE) { 1664 rfd_desc = ATL1C_RFD_DESC(rfd_ring, rfd_next_to_use); 1665 1666 skb = netdev_alloc_skb(adapter->netdev, adapter->rx_buffer_len); 1667 if (unlikely(!skb)) { 1668 if (netif_msg_rx_err(adapter)) 1669 dev_warn(&pdev->dev, "alloc rx buffer failed\n"); 1670 break; 1671 } 1672 1673 /* 1674 * Make buffer alignment 2 beyond a 16 byte boundary 1675 * this will result in a 16 byte aligned IP header after 1676 * the 14 byte MAC header is removed 1677 */ 1678 vir_addr = skb->data; 1679 ATL1C_SET_BUFFER_STATE(buffer_info, ATL1C_BUFFER_BUSY); 1680 buffer_info->skb = skb; 1681 buffer_info->length = adapter->rx_buffer_len; 1682 buffer_info->dma = pci_map_single(pdev, vir_addr, 1683 buffer_info->length, 1684 PCI_DMA_FROMDEVICE); 1685 ATL1C_SET_PCIMAP_TYPE(buffer_info, ATL1C_PCIMAP_SINGLE, 1686 ATL1C_PCIMAP_FROMDEVICE); 1687 rfd_desc->buffer_addr = cpu_to_le64(buffer_info->dma); 1688 rfd_next_to_use = next_next; 1689 if (++next_next == rfd_ring->count) 1690 next_next = 0; 1691 buffer_info = &rfd_ring->buffer_info[rfd_next_to_use]; 1692 next_info = &rfd_ring->buffer_info[next_next]; 1693 num_alloc++; 1694 } 1695 1696 if (num_alloc) { 1697 /* TODO: update mailbox here */ 1698 wmb(); 1699 rfd_ring->next_to_use = rfd_next_to_use; 1700 AT_WRITE_REG(&adapter->hw, REG_MB_RFD0_PROD_IDX, 1701 rfd_ring->next_to_use & MB_RFDX_PROD_IDX_MASK); 1702 } 1703 1704 return num_alloc; 1705 } 1706 1707 static void atl1c_clean_rrd(struct atl1c_rrd_ring *rrd_ring, 1708 struct atl1c_recv_ret_status *rrs, u16 num) 1709 { 1710 u16 i; 1711 /* the relationship between rrd and rfd is one map one */ 1712 for (i = 0; i < num; i++, rrs = ATL1C_RRD_DESC(rrd_ring, 1713 rrd_ring->next_to_clean)) { 1714 rrs->word3 &= ~RRS_RXD_UPDATED; 1715 if (++rrd_ring->next_to_clean == rrd_ring->count) 1716 rrd_ring->next_to_clean = 0; 1717 } 1718 } 1719 1720 static void atl1c_clean_rfd(struct atl1c_rfd_ring *rfd_ring, 1721 struct atl1c_recv_ret_status *rrs, u16 num) 1722 { 1723 u16 i; 1724 u16 rfd_index; 1725 struct atl1c_buffer *buffer_info = rfd_ring->buffer_info; 1726 1727 rfd_index = (rrs->word0 >> RRS_RX_RFD_INDEX_SHIFT) & 1728 RRS_RX_RFD_INDEX_MASK; 1729 for (i = 0; i < num; i++) { 1730 buffer_info[rfd_index].skb = NULL; 1731 ATL1C_SET_BUFFER_STATE(&buffer_info[rfd_index], 1732 ATL1C_BUFFER_FREE); 1733 if (++rfd_index == rfd_ring->count) 1734 rfd_index = 0; 1735 } 1736 rfd_ring->next_to_clean = rfd_index; 1737 } 1738 1739 static void atl1c_clean_rx_irq(struct atl1c_adapter *adapter, 1740 int *work_done, int work_to_do) 1741 { 1742 u16 rfd_num, rfd_index; 1743 u16 count = 0; 1744 u16 length; 1745 struct pci_dev *pdev = adapter->pdev; 1746 struct net_device *netdev = adapter->netdev; 1747 struct atl1c_rfd_ring *rfd_ring = &adapter->rfd_ring; 1748 struct atl1c_rrd_ring *rrd_ring = &adapter->rrd_ring; 1749 struct sk_buff *skb; 1750 struct atl1c_recv_ret_status *rrs; 1751 struct atl1c_buffer *buffer_info; 1752 1753 while (1) { 1754 if (*work_done >= work_to_do) 1755 break; 1756 rrs = ATL1C_RRD_DESC(rrd_ring, rrd_ring->next_to_clean); 1757 if (likely(RRS_RXD_IS_VALID(rrs->word3))) { 1758 rfd_num = (rrs->word0 >> RRS_RX_RFD_CNT_SHIFT) & 1759 RRS_RX_RFD_CNT_MASK; 1760 if (unlikely(rfd_num != 1)) 1761 /* TODO support mul rfd*/ 1762 if (netif_msg_rx_err(adapter)) 1763 dev_warn(&pdev->dev, 1764 "Multi rfd not support yet!\n"); 1765 goto rrs_checked; 1766 } else { 1767 break; 1768 } 1769 rrs_checked: 1770 atl1c_clean_rrd(rrd_ring, rrs, rfd_num); 1771 if (rrs->word3 & (RRS_RX_ERR_SUM | RRS_802_3_LEN_ERR)) { 1772 atl1c_clean_rfd(rfd_ring, rrs, rfd_num); 1773 if (netif_msg_rx_err(adapter)) 1774 dev_warn(&pdev->dev, 1775 "wrong packet! rrs word3 is %x\n", 1776 rrs->word3); 1777 continue; 1778 } 1779 1780 length = le16_to_cpu((rrs->word3 >> RRS_PKT_SIZE_SHIFT) & 1781 RRS_PKT_SIZE_MASK); 1782 /* Good Receive */ 1783 if (likely(rfd_num == 1)) { 1784 rfd_index = (rrs->word0 >> RRS_RX_RFD_INDEX_SHIFT) & 1785 RRS_RX_RFD_INDEX_MASK; 1786 buffer_info = &rfd_ring->buffer_info[rfd_index]; 1787 pci_unmap_single(pdev, buffer_info->dma, 1788 buffer_info->length, PCI_DMA_FROMDEVICE); 1789 skb = buffer_info->skb; 1790 } else { 1791 /* TODO */ 1792 if (netif_msg_rx_err(adapter)) 1793 dev_warn(&pdev->dev, 1794 "Multi rfd not support yet!\n"); 1795 break; 1796 } 1797 atl1c_clean_rfd(rfd_ring, rrs, rfd_num); 1798 skb_put(skb, length - ETH_FCS_LEN); 1799 skb->protocol = eth_type_trans(skb, netdev); 1800 atl1c_rx_checksum(adapter, skb, rrs); 1801 if (rrs->word3 & RRS_VLAN_INS) { 1802 u16 vlan; 1803 1804 AT_TAG_TO_VLAN(rrs->vlan_tag, vlan); 1805 vlan = le16_to_cpu(vlan); 1806 __vlan_hwaccel_put_tag(skb, vlan); 1807 } 1808 netif_receive_skb(skb); 1809 1810 (*work_done)++; 1811 count++; 1812 } 1813 if (count) 1814 atl1c_alloc_rx_buffer(adapter); 1815 } 1816 1817 /* 1818 * atl1c_clean - NAPI Rx polling callback 1819 * @adapter: board private structure 1820 */ 1821 static int atl1c_clean(struct napi_struct *napi, int budget) 1822 { 1823 struct atl1c_adapter *adapter = 1824 container_of(napi, struct atl1c_adapter, napi); 1825 int work_done = 0; 1826 1827 /* Keep link state information with original netdev */ 1828 if (!netif_carrier_ok(adapter->netdev)) 1829 goto quit_polling; 1830 /* just enable one RXQ */ 1831 atl1c_clean_rx_irq(adapter, &work_done, budget); 1832 1833 if (work_done < budget) { 1834 quit_polling: 1835 napi_complete(napi); 1836 adapter->hw.intr_mask |= ISR_RX_PKT; 1837 AT_WRITE_REG(&adapter->hw, REG_IMR, adapter->hw.intr_mask); 1838 } 1839 return work_done; 1840 } 1841 1842 #ifdef CONFIG_NET_POLL_CONTROLLER 1843 1844 /* 1845 * Polling 'interrupt' - used by things like netconsole to send skbs 1846 * without having to re-enable interrupts. It's not called while 1847 * the interrupt routine is executing. 1848 */ 1849 static void atl1c_netpoll(struct net_device *netdev) 1850 { 1851 struct atl1c_adapter *adapter = netdev_priv(netdev); 1852 1853 disable_irq(adapter->pdev->irq); 1854 atl1c_intr(adapter->pdev->irq, netdev); 1855 enable_irq(adapter->pdev->irq); 1856 } 1857 #endif 1858 1859 static inline u16 atl1c_tpd_avail(struct atl1c_adapter *adapter, enum atl1c_trans_queue type) 1860 { 1861 struct atl1c_tpd_ring *tpd_ring = &adapter->tpd_ring[type]; 1862 u16 next_to_use = 0; 1863 u16 next_to_clean = 0; 1864 1865 next_to_clean = atomic_read(&tpd_ring->next_to_clean); 1866 next_to_use = tpd_ring->next_to_use; 1867 1868 return (u16)(next_to_clean > next_to_use) ? 1869 (next_to_clean - next_to_use - 1) : 1870 (tpd_ring->count + next_to_clean - next_to_use - 1); 1871 } 1872 1873 /* 1874 * get next usable tpd 1875 * Note: should call atl1c_tdp_avail to make sure 1876 * there is enough tpd to use 1877 */ 1878 static struct atl1c_tpd_desc *atl1c_get_tpd(struct atl1c_adapter *adapter, 1879 enum atl1c_trans_queue type) 1880 { 1881 struct atl1c_tpd_ring *tpd_ring = &adapter->tpd_ring[type]; 1882 struct atl1c_tpd_desc *tpd_desc; 1883 u16 next_to_use = 0; 1884 1885 next_to_use = tpd_ring->next_to_use; 1886 if (++tpd_ring->next_to_use == tpd_ring->count) 1887 tpd_ring->next_to_use = 0; 1888 tpd_desc = ATL1C_TPD_DESC(tpd_ring, next_to_use); 1889 memset(tpd_desc, 0, sizeof(struct atl1c_tpd_desc)); 1890 return tpd_desc; 1891 } 1892 1893 static struct atl1c_buffer * 1894 atl1c_get_tx_buffer(struct atl1c_adapter *adapter, struct atl1c_tpd_desc *tpd) 1895 { 1896 struct atl1c_tpd_ring *tpd_ring = adapter->tpd_ring; 1897 1898 return &tpd_ring->buffer_info[tpd - 1899 (struct atl1c_tpd_desc *)tpd_ring->desc]; 1900 } 1901 1902 /* Calculate the transmit packet descript needed*/ 1903 static u16 atl1c_cal_tpd_req(const struct sk_buff *skb) 1904 { 1905 u16 tpd_req; 1906 u16 proto_hdr_len = 0; 1907 1908 tpd_req = skb_shinfo(skb)->nr_frags + 1; 1909 1910 if (skb_is_gso(skb)) { 1911 proto_hdr_len = skb_transport_offset(skb) + tcp_hdrlen(skb); 1912 if (proto_hdr_len < skb_headlen(skb)) 1913 tpd_req++; 1914 if (skb_shinfo(skb)->gso_type & SKB_GSO_TCPV6) 1915 tpd_req++; 1916 } 1917 return tpd_req; 1918 } 1919 1920 static int atl1c_tso_csum(struct atl1c_adapter *adapter, 1921 struct sk_buff *skb, 1922 struct atl1c_tpd_desc **tpd, 1923 enum atl1c_trans_queue type) 1924 { 1925 struct pci_dev *pdev = adapter->pdev; 1926 u8 hdr_len; 1927 u32 real_len; 1928 unsigned short offload_type; 1929 int err; 1930 1931 if (skb_is_gso(skb)) { 1932 if (skb_header_cloned(skb)) { 1933 err = pskb_expand_head(skb, 0, 0, GFP_ATOMIC); 1934 if (unlikely(err)) 1935 return -1; 1936 } 1937 offload_type = skb_shinfo(skb)->gso_type; 1938 1939 if (offload_type & SKB_GSO_TCPV4) { 1940 real_len = (((unsigned char *)ip_hdr(skb) - skb->data) 1941 + ntohs(ip_hdr(skb)->tot_len)); 1942 1943 if (real_len < skb->len) 1944 pskb_trim(skb, real_len); 1945 1946 hdr_len = (skb_transport_offset(skb) + tcp_hdrlen(skb)); 1947 if (unlikely(skb->len == hdr_len)) { 1948 /* only xsum need */ 1949 if (netif_msg_tx_queued(adapter)) 1950 dev_warn(&pdev->dev, 1951 "IPV4 tso with zero data??\n"); 1952 goto check_sum; 1953 } else { 1954 ip_hdr(skb)->check = 0; 1955 tcp_hdr(skb)->check = ~csum_tcpudp_magic( 1956 ip_hdr(skb)->saddr, 1957 ip_hdr(skb)->daddr, 1958 0, IPPROTO_TCP, 0); 1959 (*tpd)->word1 |= 1 << TPD_IPV4_PACKET_SHIFT; 1960 } 1961 } 1962 1963 if (offload_type & SKB_GSO_TCPV6) { 1964 struct atl1c_tpd_ext_desc *etpd = 1965 *(struct atl1c_tpd_ext_desc **)(tpd); 1966 1967 memset(etpd, 0, sizeof(struct atl1c_tpd_ext_desc)); 1968 *tpd = atl1c_get_tpd(adapter, type); 1969 ipv6_hdr(skb)->payload_len = 0; 1970 /* check payload == 0 byte ? */ 1971 hdr_len = (skb_transport_offset(skb) + tcp_hdrlen(skb)); 1972 if (unlikely(skb->len == hdr_len)) { 1973 /* only xsum need */ 1974 if (netif_msg_tx_queued(adapter)) 1975 dev_warn(&pdev->dev, 1976 "IPV6 tso with zero data??\n"); 1977 goto check_sum; 1978 } else 1979 tcp_hdr(skb)->check = ~csum_ipv6_magic( 1980 &ipv6_hdr(skb)->saddr, 1981 &ipv6_hdr(skb)->daddr, 1982 0, IPPROTO_TCP, 0); 1983 etpd->word1 |= 1 << TPD_LSO_EN_SHIFT; 1984 etpd->word1 |= 1 << TPD_LSO_VER_SHIFT; 1985 etpd->pkt_len = cpu_to_le32(skb->len); 1986 (*tpd)->word1 |= 1 << TPD_LSO_VER_SHIFT; 1987 } 1988 1989 (*tpd)->word1 |= 1 << TPD_LSO_EN_SHIFT; 1990 (*tpd)->word1 |= (skb_transport_offset(skb) & TPD_TCPHDR_OFFSET_MASK) << 1991 TPD_TCPHDR_OFFSET_SHIFT; 1992 (*tpd)->word1 |= (skb_shinfo(skb)->gso_size & TPD_MSS_MASK) << 1993 TPD_MSS_SHIFT; 1994 return 0; 1995 } 1996 1997 check_sum: 1998 if (likely(skb->ip_summed == CHECKSUM_PARTIAL)) { 1999 u8 css, cso; 2000 cso = skb_checksum_start_offset(skb); 2001 2002 if (unlikely(cso & 0x1)) { 2003 if (netif_msg_tx_err(adapter)) 2004 dev_err(&adapter->pdev->dev, 2005 "payload offset should not an event number\n"); 2006 return -1; 2007 } else { 2008 css = cso + skb->csum_offset; 2009 2010 (*tpd)->word1 |= ((cso >> 1) & TPD_PLOADOFFSET_MASK) << 2011 TPD_PLOADOFFSET_SHIFT; 2012 (*tpd)->word1 |= ((css >> 1) & TPD_CCSUM_OFFSET_MASK) << 2013 TPD_CCSUM_OFFSET_SHIFT; 2014 (*tpd)->word1 |= 1 << TPD_CCSUM_EN_SHIFT; 2015 } 2016 } 2017 return 0; 2018 } 2019 2020 static void atl1c_tx_map(struct atl1c_adapter *adapter, 2021 struct sk_buff *skb, struct atl1c_tpd_desc *tpd, 2022 enum atl1c_trans_queue type) 2023 { 2024 struct atl1c_tpd_desc *use_tpd = NULL; 2025 struct atl1c_buffer *buffer_info = NULL; 2026 u16 buf_len = skb_headlen(skb); 2027 u16 map_len = 0; 2028 u16 mapped_len = 0; 2029 u16 hdr_len = 0; 2030 u16 nr_frags; 2031 u16 f; 2032 int tso; 2033 2034 nr_frags = skb_shinfo(skb)->nr_frags; 2035 tso = (tpd->word1 >> TPD_LSO_EN_SHIFT) & TPD_LSO_EN_MASK; 2036 if (tso) { 2037 /* TSO */ 2038 map_len = hdr_len = skb_transport_offset(skb) + tcp_hdrlen(skb); 2039 use_tpd = tpd; 2040 2041 buffer_info = atl1c_get_tx_buffer(adapter, use_tpd); 2042 buffer_info->length = map_len; 2043 buffer_info->dma = pci_map_single(adapter->pdev, 2044 skb->data, hdr_len, PCI_DMA_TODEVICE); 2045 ATL1C_SET_BUFFER_STATE(buffer_info, ATL1C_BUFFER_BUSY); 2046 ATL1C_SET_PCIMAP_TYPE(buffer_info, ATL1C_PCIMAP_SINGLE, 2047 ATL1C_PCIMAP_TODEVICE); 2048 mapped_len += map_len; 2049 use_tpd->buffer_addr = cpu_to_le64(buffer_info->dma); 2050 use_tpd->buffer_len = cpu_to_le16(buffer_info->length); 2051 } 2052 2053 if (mapped_len < buf_len) { 2054 /* mapped_len == 0, means we should use the first tpd, 2055 which is given by caller */ 2056 if (mapped_len == 0) 2057 use_tpd = tpd; 2058 else { 2059 use_tpd = atl1c_get_tpd(adapter, type); 2060 memcpy(use_tpd, tpd, sizeof(struct atl1c_tpd_desc)); 2061 } 2062 buffer_info = atl1c_get_tx_buffer(adapter, use_tpd); 2063 buffer_info->length = buf_len - mapped_len; 2064 buffer_info->dma = 2065 pci_map_single(adapter->pdev, skb->data + mapped_len, 2066 buffer_info->length, PCI_DMA_TODEVICE); 2067 ATL1C_SET_BUFFER_STATE(buffer_info, ATL1C_BUFFER_BUSY); 2068 ATL1C_SET_PCIMAP_TYPE(buffer_info, ATL1C_PCIMAP_SINGLE, 2069 ATL1C_PCIMAP_TODEVICE); 2070 use_tpd->buffer_addr = cpu_to_le64(buffer_info->dma); 2071 use_tpd->buffer_len = cpu_to_le16(buffer_info->length); 2072 } 2073 2074 for (f = 0; f < nr_frags; f++) { 2075 struct skb_frag_struct *frag; 2076 2077 frag = &skb_shinfo(skb)->frags[f]; 2078 2079 use_tpd = atl1c_get_tpd(adapter, type); 2080 memcpy(use_tpd, tpd, sizeof(struct atl1c_tpd_desc)); 2081 2082 buffer_info = atl1c_get_tx_buffer(adapter, use_tpd); 2083 buffer_info->length = skb_frag_size(frag); 2084 buffer_info->dma = skb_frag_dma_map(&adapter->pdev->dev, 2085 frag, 0, 2086 buffer_info->length, 2087 DMA_TO_DEVICE); 2088 ATL1C_SET_BUFFER_STATE(buffer_info, ATL1C_BUFFER_BUSY); 2089 ATL1C_SET_PCIMAP_TYPE(buffer_info, ATL1C_PCIMAP_PAGE, 2090 ATL1C_PCIMAP_TODEVICE); 2091 use_tpd->buffer_addr = cpu_to_le64(buffer_info->dma); 2092 use_tpd->buffer_len = cpu_to_le16(buffer_info->length); 2093 } 2094 2095 /* The last tpd */ 2096 use_tpd->word1 |= 1 << TPD_EOP_SHIFT; 2097 /* The last buffer info contain the skb address, 2098 so it will be free after unmap */ 2099 buffer_info->skb = skb; 2100 } 2101 2102 static void atl1c_tx_queue(struct atl1c_adapter *adapter, struct sk_buff *skb, 2103 struct atl1c_tpd_desc *tpd, enum atl1c_trans_queue type) 2104 { 2105 struct atl1c_tpd_ring *tpd_ring = &adapter->tpd_ring[type]; 2106 u16 reg; 2107 2108 reg = type == atl1c_trans_high ? REG_TPD_PRI1_PIDX : REG_TPD_PRI0_PIDX; 2109 AT_WRITE_REGW(&adapter->hw, reg, tpd_ring->next_to_use); 2110 } 2111 2112 static netdev_tx_t atl1c_xmit_frame(struct sk_buff *skb, 2113 struct net_device *netdev) 2114 { 2115 struct atl1c_adapter *adapter = netdev_priv(netdev); 2116 unsigned long flags; 2117 u16 tpd_req = 1; 2118 struct atl1c_tpd_desc *tpd; 2119 enum atl1c_trans_queue type = atl1c_trans_normal; 2120 2121 if (test_bit(__AT_DOWN, &adapter->flags)) { 2122 dev_kfree_skb_any(skb); 2123 return NETDEV_TX_OK; 2124 } 2125 2126 tpd_req = atl1c_cal_tpd_req(skb); 2127 if (!spin_trylock_irqsave(&adapter->tx_lock, flags)) { 2128 if (netif_msg_pktdata(adapter)) 2129 dev_info(&adapter->pdev->dev, "tx locked\n"); 2130 return NETDEV_TX_LOCKED; 2131 } 2132 2133 if (atl1c_tpd_avail(adapter, type) < tpd_req) { 2134 /* no enough descriptor, just stop queue */ 2135 netif_stop_queue(netdev); 2136 spin_unlock_irqrestore(&adapter->tx_lock, flags); 2137 return NETDEV_TX_BUSY; 2138 } 2139 2140 tpd = atl1c_get_tpd(adapter, type); 2141 2142 /* do TSO and check sum */ 2143 if (atl1c_tso_csum(adapter, skb, &tpd, type) != 0) { 2144 spin_unlock_irqrestore(&adapter->tx_lock, flags); 2145 dev_kfree_skb_any(skb); 2146 return NETDEV_TX_OK; 2147 } 2148 2149 if (unlikely(vlan_tx_tag_present(skb))) { 2150 u16 vlan = vlan_tx_tag_get(skb); 2151 __le16 tag; 2152 2153 vlan = cpu_to_le16(vlan); 2154 AT_VLAN_TO_TAG(vlan, tag); 2155 tpd->word1 |= 1 << TPD_INS_VTAG_SHIFT; 2156 tpd->vlan_tag = tag; 2157 } 2158 2159 if (skb_network_offset(skb) != ETH_HLEN) 2160 tpd->word1 |= 1 << TPD_ETH_TYPE_SHIFT; /* Ethernet frame */ 2161 2162 atl1c_tx_map(adapter, skb, tpd, type); 2163 atl1c_tx_queue(adapter, skb, tpd, type); 2164 2165 spin_unlock_irqrestore(&adapter->tx_lock, flags); 2166 return NETDEV_TX_OK; 2167 } 2168 2169 static void atl1c_free_irq(struct atl1c_adapter *adapter) 2170 { 2171 struct net_device *netdev = adapter->netdev; 2172 2173 free_irq(adapter->pdev->irq, netdev); 2174 2175 if (adapter->have_msi) 2176 pci_disable_msi(adapter->pdev); 2177 } 2178 2179 static int atl1c_request_irq(struct atl1c_adapter *adapter) 2180 { 2181 struct pci_dev *pdev = adapter->pdev; 2182 struct net_device *netdev = adapter->netdev; 2183 int flags = 0; 2184 int err = 0; 2185 2186 adapter->have_msi = true; 2187 err = pci_enable_msi(adapter->pdev); 2188 if (err) { 2189 if (netif_msg_ifup(adapter)) 2190 dev_err(&pdev->dev, 2191 "Unable to allocate MSI interrupt Error: %d\n", 2192 err); 2193 adapter->have_msi = false; 2194 } 2195 2196 if (!adapter->have_msi) 2197 flags |= IRQF_SHARED; 2198 err = request_irq(adapter->pdev->irq, atl1c_intr, flags, 2199 netdev->name, netdev); 2200 if (err) { 2201 if (netif_msg_ifup(adapter)) 2202 dev_err(&pdev->dev, 2203 "Unable to allocate interrupt Error: %d\n", 2204 err); 2205 if (adapter->have_msi) 2206 pci_disable_msi(adapter->pdev); 2207 return err; 2208 } 2209 if (netif_msg_ifup(adapter)) 2210 dev_dbg(&pdev->dev, "atl1c_request_irq OK\n"); 2211 return err; 2212 } 2213 2214 2215 static void atl1c_reset_dma_ring(struct atl1c_adapter *adapter) 2216 { 2217 /* release tx-pending skbs and reset tx/rx ring index */ 2218 atl1c_clean_tx_ring(adapter, atl1c_trans_normal); 2219 atl1c_clean_tx_ring(adapter, atl1c_trans_high); 2220 atl1c_clean_rx_ring(adapter); 2221 } 2222 2223 static int atl1c_up(struct atl1c_adapter *adapter) 2224 { 2225 struct net_device *netdev = adapter->netdev; 2226 int err; 2227 2228 netif_carrier_off(netdev); 2229 2230 err = atl1c_configure(adapter); 2231 if (unlikely(err)) 2232 goto err_up; 2233 2234 err = atl1c_request_irq(adapter); 2235 if (unlikely(err)) 2236 goto err_up; 2237 2238 atl1c_check_link_status(adapter); 2239 clear_bit(__AT_DOWN, &adapter->flags); 2240 napi_enable(&adapter->napi); 2241 atl1c_irq_enable(adapter); 2242 netif_start_queue(netdev); 2243 return err; 2244 2245 err_up: 2246 atl1c_clean_rx_ring(adapter); 2247 return err; 2248 } 2249 2250 static void atl1c_down(struct atl1c_adapter *adapter) 2251 { 2252 struct net_device *netdev = adapter->netdev; 2253 2254 atl1c_del_timer(adapter); 2255 adapter->work_event = 0; /* clear all event */ 2256 /* signal that we're down so the interrupt handler does not 2257 * reschedule our watchdog timer */ 2258 set_bit(__AT_DOWN, &adapter->flags); 2259 netif_carrier_off(netdev); 2260 napi_disable(&adapter->napi); 2261 atl1c_irq_disable(adapter); 2262 atl1c_free_irq(adapter); 2263 /* disable ASPM if device inactive */ 2264 atl1c_disable_l0s_l1(&adapter->hw); 2265 /* reset MAC to disable all RX/TX */ 2266 atl1c_reset_mac(&adapter->hw); 2267 msleep(1); 2268 2269 adapter->link_speed = SPEED_0; 2270 adapter->link_duplex = -1; 2271 atl1c_reset_dma_ring(adapter); 2272 } 2273 2274 /* 2275 * atl1c_open - Called when a network interface is made active 2276 * @netdev: network interface device structure 2277 * 2278 * Returns 0 on success, negative value on failure 2279 * 2280 * The open entry point is called when a network interface is made 2281 * active by the system (IFF_UP). At this point all resources needed 2282 * for transmit and receive operations are allocated, the interrupt 2283 * handler is registered with the OS, the watchdog timer is started, 2284 * and the stack is notified that the interface is ready. 2285 */ 2286 static int atl1c_open(struct net_device *netdev) 2287 { 2288 struct atl1c_adapter *adapter = netdev_priv(netdev); 2289 int err; 2290 2291 /* disallow open during test */ 2292 if (test_bit(__AT_TESTING, &adapter->flags)) 2293 return -EBUSY; 2294 2295 /* allocate rx/tx dma buffer & descriptors */ 2296 err = atl1c_setup_ring_resources(adapter); 2297 if (unlikely(err)) 2298 return err; 2299 2300 err = atl1c_up(adapter); 2301 if (unlikely(err)) 2302 goto err_up; 2303 2304 return 0; 2305 2306 err_up: 2307 atl1c_free_irq(adapter); 2308 atl1c_free_ring_resources(adapter); 2309 atl1c_reset_mac(&adapter->hw); 2310 return err; 2311 } 2312 2313 /* 2314 * atl1c_close - Disables a network interface 2315 * @netdev: network interface device structure 2316 * 2317 * Returns 0, this is not allowed to fail 2318 * 2319 * The close entry point is called when an interface is de-activated 2320 * by the OS. The hardware is still under the drivers control, but 2321 * needs to be disabled. A global MAC reset is issued to stop the 2322 * hardware, and all transmit and receive resources are freed. 2323 */ 2324 static int atl1c_close(struct net_device *netdev) 2325 { 2326 struct atl1c_adapter *adapter = netdev_priv(netdev); 2327 2328 WARN_ON(test_bit(__AT_RESETTING, &adapter->flags)); 2329 set_bit(__AT_DOWN, &adapter->flags); 2330 cancel_work_sync(&adapter->common_task); 2331 atl1c_down(adapter); 2332 atl1c_free_ring_resources(adapter); 2333 return 0; 2334 } 2335 2336 static int atl1c_suspend(struct device *dev) 2337 { 2338 struct pci_dev *pdev = to_pci_dev(dev); 2339 struct net_device *netdev = pci_get_drvdata(pdev); 2340 struct atl1c_adapter *adapter = netdev_priv(netdev); 2341 struct atl1c_hw *hw = &adapter->hw; 2342 u32 wufc = adapter->wol; 2343 2344 atl1c_disable_l0s_l1(hw); 2345 if (netif_running(netdev)) { 2346 WARN_ON(test_bit(__AT_RESETTING, &adapter->flags)); 2347 atl1c_down(adapter); 2348 } 2349 netif_device_detach(netdev); 2350 2351 if (wufc) 2352 if (atl1c_phy_to_ps_link(hw) != 0) 2353 dev_dbg(&pdev->dev, "phy power saving failed"); 2354 2355 atl1c_power_saving(hw, wufc); 2356 2357 return 0; 2358 } 2359 2360 #ifdef CONFIG_PM_SLEEP 2361 static int atl1c_resume(struct device *dev) 2362 { 2363 struct pci_dev *pdev = to_pci_dev(dev); 2364 struct net_device *netdev = pci_get_drvdata(pdev); 2365 struct atl1c_adapter *adapter = netdev_priv(netdev); 2366 2367 AT_WRITE_REG(&adapter->hw, REG_WOL_CTRL, 0); 2368 atl1c_reset_pcie(&adapter->hw, ATL1C_PCIE_L0S_L1_DISABLE); 2369 2370 atl1c_phy_reset(&adapter->hw); 2371 atl1c_reset_mac(&adapter->hw); 2372 atl1c_phy_init(&adapter->hw); 2373 2374 #if 0 2375 AT_READ_REG(&adapter->hw, REG_PM_CTRLSTAT, &pm_data); 2376 pm_data &= ~PM_CTRLSTAT_PME_EN; 2377 AT_WRITE_REG(&adapter->hw, REG_PM_CTRLSTAT, pm_data); 2378 #endif 2379 2380 netif_device_attach(netdev); 2381 if (netif_running(netdev)) 2382 atl1c_up(adapter); 2383 2384 return 0; 2385 } 2386 #endif 2387 2388 static void atl1c_shutdown(struct pci_dev *pdev) 2389 { 2390 struct net_device *netdev = pci_get_drvdata(pdev); 2391 struct atl1c_adapter *adapter = netdev_priv(netdev); 2392 2393 atl1c_suspend(&pdev->dev); 2394 pci_wake_from_d3(pdev, adapter->wol); 2395 pci_set_power_state(pdev, PCI_D3hot); 2396 } 2397 2398 static const struct net_device_ops atl1c_netdev_ops = { 2399 .ndo_open = atl1c_open, 2400 .ndo_stop = atl1c_close, 2401 .ndo_validate_addr = eth_validate_addr, 2402 .ndo_start_xmit = atl1c_xmit_frame, 2403 .ndo_set_mac_address = atl1c_set_mac_addr, 2404 .ndo_set_rx_mode = atl1c_set_multi, 2405 .ndo_change_mtu = atl1c_change_mtu, 2406 .ndo_fix_features = atl1c_fix_features, 2407 .ndo_set_features = atl1c_set_features, 2408 .ndo_do_ioctl = atl1c_ioctl, 2409 .ndo_tx_timeout = atl1c_tx_timeout, 2410 .ndo_get_stats = atl1c_get_stats, 2411 #ifdef CONFIG_NET_POLL_CONTROLLER 2412 .ndo_poll_controller = atl1c_netpoll, 2413 #endif 2414 }; 2415 2416 static int atl1c_init_netdev(struct net_device *netdev, struct pci_dev *pdev) 2417 { 2418 SET_NETDEV_DEV(netdev, &pdev->dev); 2419 pci_set_drvdata(pdev, netdev); 2420 2421 netdev->netdev_ops = &atl1c_netdev_ops; 2422 netdev->watchdog_timeo = AT_TX_WATCHDOG; 2423 atl1c_set_ethtool_ops(netdev); 2424 2425 /* TODO: add when ready */ 2426 netdev->hw_features = NETIF_F_SG | 2427 NETIF_F_HW_CSUM | 2428 NETIF_F_HW_VLAN_RX | 2429 NETIF_F_TSO | 2430 NETIF_F_TSO6; 2431 netdev->features = netdev->hw_features | 2432 NETIF_F_HW_VLAN_TX; 2433 return 0; 2434 } 2435 2436 /* 2437 * atl1c_probe - Device Initialization Routine 2438 * @pdev: PCI device information struct 2439 * @ent: entry in atl1c_pci_tbl 2440 * 2441 * Returns 0 on success, negative on failure 2442 * 2443 * atl1c_probe initializes an adapter identified by a pci_dev structure. 2444 * The OS initialization, configuring of the adapter private structure, 2445 * and a hardware reset occur. 2446 */ 2447 static int __devinit atl1c_probe(struct pci_dev *pdev, 2448 const struct pci_device_id *ent) 2449 { 2450 struct net_device *netdev; 2451 struct atl1c_adapter *adapter; 2452 static int cards_found; 2453 2454 int err = 0; 2455 2456 /* enable device (incl. PCI PM wakeup and hotplug setup) */ 2457 err = pci_enable_device_mem(pdev); 2458 if (err) { 2459 dev_err(&pdev->dev, "cannot enable PCI device\n"); 2460 return err; 2461 } 2462 2463 /* 2464 * The atl1c chip can DMA to 64-bit addresses, but it uses a single 2465 * shared register for the high 32 bits, so only a single, aligned, 2466 * 4 GB physical address range can be used at a time. 2467 * 2468 * Supporting 64-bit DMA on this hardware is more trouble than it's 2469 * worth. It is far easier to limit to 32-bit DMA than update 2470 * various kernel subsystems to support the mechanics required by a 2471 * fixed-high-32-bit system. 2472 */ 2473 if ((pci_set_dma_mask(pdev, DMA_BIT_MASK(32)) != 0) || 2474 (pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(32)) != 0)) { 2475 dev_err(&pdev->dev, "No usable DMA configuration,aborting\n"); 2476 goto err_dma; 2477 } 2478 2479 err = pci_request_regions(pdev, atl1c_driver_name); 2480 if (err) { 2481 dev_err(&pdev->dev, "cannot obtain PCI resources\n"); 2482 goto err_pci_reg; 2483 } 2484 2485 pci_set_master(pdev); 2486 2487 netdev = alloc_etherdev(sizeof(struct atl1c_adapter)); 2488 if (netdev == NULL) { 2489 err = -ENOMEM; 2490 goto err_alloc_etherdev; 2491 } 2492 2493 err = atl1c_init_netdev(netdev, pdev); 2494 if (err) { 2495 dev_err(&pdev->dev, "init netdevice failed\n"); 2496 goto err_init_netdev; 2497 } 2498 adapter = netdev_priv(netdev); 2499 adapter->bd_number = cards_found; 2500 adapter->netdev = netdev; 2501 adapter->pdev = pdev; 2502 adapter->hw.adapter = adapter; 2503 adapter->msg_enable = netif_msg_init(-1, atl1c_default_msg); 2504 adapter->hw.hw_addr = ioremap(pci_resource_start(pdev, 0), pci_resource_len(pdev, 0)); 2505 if (!adapter->hw.hw_addr) { 2506 err = -EIO; 2507 dev_err(&pdev->dev, "cannot map device registers\n"); 2508 goto err_ioremap; 2509 } 2510 2511 /* init mii data */ 2512 adapter->mii.dev = netdev; 2513 adapter->mii.mdio_read = atl1c_mdio_read; 2514 adapter->mii.mdio_write = atl1c_mdio_write; 2515 adapter->mii.phy_id_mask = 0x1f; 2516 adapter->mii.reg_num_mask = MDIO_CTRL_REG_MASK; 2517 netif_napi_add(netdev, &adapter->napi, atl1c_clean, 64); 2518 setup_timer(&adapter->phy_config_timer, atl1c_phy_config, 2519 (unsigned long)adapter); 2520 /* setup the private structure */ 2521 err = atl1c_sw_init(adapter); 2522 if (err) { 2523 dev_err(&pdev->dev, "net device private data init failed\n"); 2524 goto err_sw_init; 2525 } 2526 atl1c_reset_pcie(&adapter->hw, ATL1C_PCIE_L0S_L1_DISABLE); 2527 2528 /* Init GPHY as early as possible due to power saving issue */ 2529 atl1c_phy_reset(&adapter->hw); 2530 2531 err = atl1c_reset_mac(&adapter->hw); 2532 if (err) { 2533 err = -EIO; 2534 goto err_reset; 2535 } 2536 2537 /* reset the controller to 2538 * put the device in a known good starting state */ 2539 err = atl1c_phy_init(&adapter->hw); 2540 if (err) { 2541 err = -EIO; 2542 goto err_reset; 2543 } 2544 if (atl1c_read_mac_addr(&adapter->hw)) { 2545 /* got a random MAC address, set NET_ADDR_RANDOM to netdev */ 2546 netdev->addr_assign_type |= NET_ADDR_RANDOM; 2547 } 2548 memcpy(netdev->dev_addr, adapter->hw.mac_addr, netdev->addr_len); 2549 memcpy(netdev->perm_addr, adapter->hw.mac_addr, netdev->addr_len); 2550 if (netif_msg_probe(adapter)) 2551 dev_dbg(&pdev->dev, "mac address : %pM\n", 2552 adapter->hw.mac_addr); 2553 2554 atl1c_hw_set_mac_addr(&adapter->hw, adapter->hw.mac_addr); 2555 INIT_WORK(&adapter->common_task, atl1c_common_task); 2556 adapter->work_event = 0; 2557 err = register_netdev(netdev); 2558 if (err) { 2559 dev_err(&pdev->dev, "register netdevice failed\n"); 2560 goto err_register; 2561 } 2562 2563 if (netif_msg_probe(adapter)) 2564 dev_info(&pdev->dev, "version %s\n", ATL1C_DRV_VERSION); 2565 cards_found++; 2566 return 0; 2567 2568 err_reset: 2569 err_register: 2570 err_sw_init: 2571 iounmap(adapter->hw.hw_addr); 2572 err_init_netdev: 2573 err_ioremap: 2574 free_netdev(netdev); 2575 err_alloc_etherdev: 2576 pci_release_regions(pdev); 2577 err_pci_reg: 2578 err_dma: 2579 pci_disable_device(pdev); 2580 return err; 2581 } 2582 2583 /* 2584 * atl1c_remove - Device Removal Routine 2585 * @pdev: PCI device information struct 2586 * 2587 * atl1c_remove is called by the PCI subsystem to alert the driver 2588 * that it should release a PCI device. The could be caused by a 2589 * Hot-Plug event, or because the driver is going to be removed from 2590 * memory. 2591 */ 2592 static void __devexit atl1c_remove(struct pci_dev *pdev) 2593 { 2594 struct net_device *netdev = pci_get_drvdata(pdev); 2595 struct atl1c_adapter *adapter = netdev_priv(netdev); 2596 2597 unregister_netdev(netdev); 2598 /* restore permanent address */ 2599 atl1c_hw_set_mac_addr(&adapter->hw, adapter->hw.perm_mac_addr); 2600 atl1c_phy_disable(&adapter->hw); 2601 2602 iounmap(adapter->hw.hw_addr); 2603 2604 pci_release_regions(pdev); 2605 pci_disable_device(pdev); 2606 free_netdev(netdev); 2607 } 2608 2609 /* 2610 * atl1c_io_error_detected - called when PCI error is detected 2611 * @pdev: Pointer to PCI device 2612 * @state: The current pci connection state 2613 * 2614 * This function is called after a PCI bus error affecting 2615 * this device has been detected. 2616 */ 2617 static pci_ers_result_t atl1c_io_error_detected(struct pci_dev *pdev, 2618 pci_channel_state_t state) 2619 { 2620 struct net_device *netdev = pci_get_drvdata(pdev); 2621 struct atl1c_adapter *adapter = netdev_priv(netdev); 2622 2623 netif_device_detach(netdev); 2624 2625 if (state == pci_channel_io_perm_failure) 2626 return PCI_ERS_RESULT_DISCONNECT; 2627 2628 if (netif_running(netdev)) 2629 atl1c_down(adapter); 2630 2631 pci_disable_device(pdev); 2632 2633 /* Request a slot slot reset. */ 2634 return PCI_ERS_RESULT_NEED_RESET; 2635 } 2636 2637 /* 2638 * atl1c_io_slot_reset - called after the pci bus has been reset. 2639 * @pdev: Pointer to PCI device 2640 * 2641 * Restart the card from scratch, as if from a cold-boot. Implementation 2642 * resembles the first-half of the e1000_resume routine. 2643 */ 2644 static pci_ers_result_t atl1c_io_slot_reset(struct pci_dev *pdev) 2645 { 2646 struct net_device *netdev = pci_get_drvdata(pdev); 2647 struct atl1c_adapter *adapter = netdev_priv(netdev); 2648 2649 if (pci_enable_device(pdev)) { 2650 if (netif_msg_hw(adapter)) 2651 dev_err(&pdev->dev, 2652 "Cannot re-enable PCI device after reset\n"); 2653 return PCI_ERS_RESULT_DISCONNECT; 2654 } 2655 pci_set_master(pdev); 2656 2657 pci_enable_wake(pdev, PCI_D3hot, 0); 2658 pci_enable_wake(pdev, PCI_D3cold, 0); 2659 2660 atl1c_reset_mac(&adapter->hw); 2661 2662 return PCI_ERS_RESULT_RECOVERED; 2663 } 2664 2665 /* 2666 * atl1c_io_resume - called when traffic can start flowing again. 2667 * @pdev: Pointer to PCI device 2668 * 2669 * This callback is called when the error recovery driver tells us that 2670 * its OK to resume normal operation. Implementation resembles the 2671 * second-half of the atl1c_resume routine. 2672 */ 2673 static void atl1c_io_resume(struct pci_dev *pdev) 2674 { 2675 struct net_device *netdev = pci_get_drvdata(pdev); 2676 struct atl1c_adapter *adapter = netdev_priv(netdev); 2677 2678 if (netif_running(netdev)) { 2679 if (atl1c_up(adapter)) { 2680 if (netif_msg_hw(adapter)) 2681 dev_err(&pdev->dev, 2682 "Cannot bring device back up after reset\n"); 2683 return; 2684 } 2685 } 2686 2687 netif_device_attach(netdev); 2688 } 2689 2690 static struct pci_error_handlers atl1c_err_handler = { 2691 .error_detected = atl1c_io_error_detected, 2692 .slot_reset = atl1c_io_slot_reset, 2693 .resume = atl1c_io_resume, 2694 }; 2695 2696 static SIMPLE_DEV_PM_OPS(atl1c_pm_ops, atl1c_suspend, atl1c_resume); 2697 2698 static struct pci_driver atl1c_driver = { 2699 .name = atl1c_driver_name, 2700 .id_table = atl1c_pci_tbl, 2701 .probe = atl1c_probe, 2702 .remove = __devexit_p(atl1c_remove), 2703 .shutdown = atl1c_shutdown, 2704 .err_handler = &atl1c_err_handler, 2705 .driver.pm = &atl1c_pm_ops, 2706 }; 2707 2708 /* 2709 * atl1c_init_module - Driver Registration Routine 2710 * 2711 * atl1c_init_module is the first routine called when the driver is 2712 * loaded. All it does is register with the PCI subsystem. 2713 */ 2714 static int __init atl1c_init_module(void) 2715 { 2716 return pci_register_driver(&atl1c_driver); 2717 } 2718 2719 /* 2720 * atl1c_exit_module - Driver Exit Cleanup Routine 2721 * 2722 * atl1c_exit_module is called just before the driver is removed 2723 * from memory. 2724 */ 2725 static void __exit atl1c_exit_module(void) 2726 { 2727 pci_unregister_driver(&atl1c_driver); 2728 } 2729 2730 module_init(atl1c_init_module); 2731 module_exit(atl1c_exit_module); 2732