1 // SPDX-License-Identifier: GPL-2.0-only 2 /* Atlantic Network Driver 3 * 4 * Copyright (C) 2014-2019 aQuantia Corporation 5 * Copyright (C) 2019-2020 Marvell International Ltd. 6 */ 7 8 /* File aq_nic.c: Definition of common code for NIC. */ 9 10 #include "aq_nic.h" 11 #include "aq_ring.h" 12 #include "aq_vec.h" 13 #include "aq_hw.h" 14 #include "aq_pci_func.h" 15 #include "aq_macsec.h" 16 #include "aq_main.h" 17 #include "aq_phy.h" 18 #include "aq_ptp.h" 19 #include "aq_filters.h" 20 21 #include <linux/moduleparam.h> 22 #include <linux/netdevice.h> 23 #include <linux/etherdevice.h> 24 #include <linux/timer.h> 25 #include <linux/cpu.h> 26 #include <linux/ip.h> 27 #include <linux/tcp.h> 28 #include <net/ip.h> 29 30 static unsigned int aq_itr = AQ_CFG_INTERRUPT_MODERATION_AUTO; 31 module_param_named(aq_itr, aq_itr, uint, 0644); 32 MODULE_PARM_DESC(aq_itr, "Interrupt throttling mode"); 33 34 static unsigned int aq_itr_tx; 35 module_param_named(aq_itr_tx, aq_itr_tx, uint, 0644); 36 MODULE_PARM_DESC(aq_itr_tx, "TX interrupt throttle rate"); 37 38 static unsigned int aq_itr_rx; 39 module_param_named(aq_itr_rx, aq_itr_rx, uint, 0644); 40 MODULE_PARM_DESC(aq_itr_rx, "RX interrupt throttle rate"); 41 42 static void aq_nic_update_ndev_stats(struct aq_nic_s *self); 43 44 static void aq_nic_rss_init(struct aq_nic_s *self, unsigned int num_rss_queues) 45 { 46 static u8 rss_key[AQ_CFG_RSS_HASHKEY_SIZE] = { 47 0x1e, 0xad, 0x71, 0x87, 0x65, 0xfc, 0x26, 0x7d, 48 0x0d, 0x45, 0x67, 0x74, 0xcd, 0x06, 0x1a, 0x18, 49 0xb6, 0xc1, 0xf0, 0xc7, 0xbb, 0x18, 0xbe, 0xf8, 50 0x19, 0x13, 0x4b, 0xa9, 0xd0, 0x3e, 0xfe, 0x70, 51 0x25, 0x03, 0xab, 0x50, 0x6a, 0x8b, 0x82, 0x0c 52 }; 53 struct aq_nic_cfg_s *cfg = &self->aq_nic_cfg; 54 struct aq_rss_parameters *rss_params; 55 int i = 0; 56 57 rss_params = &cfg->aq_rss; 58 59 rss_params->hash_secret_key_size = sizeof(rss_key); 60 memcpy(rss_params->hash_secret_key, rss_key, sizeof(rss_key)); 61 rss_params->indirection_table_size = AQ_CFG_RSS_INDIRECTION_TABLE_MAX; 62 63 for (i = rss_params->indirection_table_size; i--;) 64 rss_params->indirection_table[i] = i & (num_rss_queues - 1); 65 } 66 67 /* Checks hw_caps and 'corrects' aq_nic_cfg in runtime */ 68 void aq_nic_cfg_start(struct aq_nic_s *self) 69 { 70 struct aq_nic_cfg_s *cfg = &self->aq_nic_cfg; 71 72 cfg->tcs = AQ_CFG_TCS_DEF; 73 74 cfg->is_polling = AQ_CFG_IS_POLLING_DEF; 75 76 cfg->itr = aq_itr; 77 cfg->tx_itr = aq_itr_tx; 78 cfg->rx_itr = aq_itr_rx; 79 80 cfg->rxpageorder = AQ_CFG_RX_PAGEORDER; 81 cfg->is_rss = AQ_CFG_IS_RSS_DEF; 82 cfg->num_rss_queues = AQ_CFG_NUM_RSS_QUEUES_DEF; 83 cfg->aq_rss.base_cpu_number = AQ_CFG_RSS_BASE_CPU_NUM_DEF; 84 cfg->fc.req = AQ_CFG_FC_MODE; 85 cfg->wol = AQ_CFG_WOL_MODES; 86 87 cfg->mtu = AQ_CFG_MTU_DEF; 88 cfg->link_speed_msk = AQ_CFG_SPEED_MSK; 89 cfg->is_autoneg = AQ_CFG_IS_AUTONEG_DEF; 90 91 cfg->is_lro = AQ_CFG_IS_LRO_DEF; 92 93 /*descriptors */ 94 cfg->rxds = min(cfg->aq_hw_caps->rxds_max, AQ_CFG_RXDS_DEF); 95 cfg->txds = min(cfg->aq_hw_caps->txds_max, AQ_CFG_TXDS_DEF); 96 97 /*rss rings */ 98 cfg->vecs = min(cfg->aq_hw_caps->vecs, AQ_CFG_VECS_DEF); 99 cfg->vecs = min(cfg->vecs, num_online_cpus()); 100 if (self->irqvecs > AQ_HW_SERVICE_IRQS) 101 cfg->vecs = min(cfg->vecs, self->irqvecs - AQ_HW_SERVICE_IRQS); 102 /* cfg->vecs should be power of 2 for RSS */ 103 if (cfg->vecs >= 8U) 104 cfg->vecs = 8U; 105 else if (cfg->vecs >= 4U) 106 cfg->vecs = 4U; 107 else if (cfg->vecs >= 2U) 108 cfg->vecs = 2U; 109 else 110 cfg->vecs = 1U; 111 112 cfg->num_rss_queues = min(cfg->vecs, AQ_CFG_NUM_RSS_QUEUES_DEF); 113 114 aq_nic_rss_init(self, cfg->num_rss_queues); 115 116 cfg->irq_type = aq_pci_func_get_irq_type(self); 117 118 if ((cfg->irq_type == AQ_HW_IRQ_LEGACY) || 119 (cfg->aq_hw_caps->vecs == 1U) || 120 (cfg->vecs == 1U)) { 121 cfg->is_rss = 0U; 122 cfg->vecs = 1U; 123 } 124 125 /* Check if we have enough vectors allocated for 126 * link status IRQ. If no - we'll know link state from 127 * slower service task. 128 */ 129 if (AQ_HW_SERVICE_IRQS > 0 && cfg->vecs + 1 <= self->irqvecs) 130 cfg->link_irq_vec = cfg->vecs; 131 else 132 cfg->link_irq_vec = 0; 133 134 cfg->link_speed_msk &= cfg->aq_hw_caps->link_speed_msk; 135 cfg->features = cfg->aq_hw_caps->hw_features; 136 cfg->is_vlan_rx_strip = !!(cfg->features & NETIF_F_HW_VLAN_CTAG_RX); 137 cfg->is_vlan_tx_insert = !!(cfg->features & NETIF_F_HW_VLAN_CTAG_TX); 138 cfg->is_vlan_force_promisc = true; 139 } 140 141 static int aq_nic_update_link_status(struct aq_nic_s *self) 142 { 143 int err = self->aq_fw_ops->update_link_status(self->aq_hw); 144 u32 fc = 0; 145 146 if (err) 147 return err; 148 149 if (self->aq_fw_ops->get_flow_control) 150 self->aq_fw_ops->get_flow_control(self->aq_hw, &fc); 151 self->aq_nic_cfg.fc.cur = fc; 152 153 if (self->link_status.mbps != self->aq_hw->aq_link_status.mbps) { 154 netdev_info(self->ndev, "%s: link change old %d new %d\n", 155 AQ_CFG_DRV_NAME, self->link_status.mbps, 156 self->aq_hw->aq_link_status.mbps); 157 aq_nic_update_interrupt_moderation_settings(self); 158 159 if (self->aq_ptp) { 160 aq_ptp_clock_init(self); 161 aq_ptp_tm_offset_set(self, 162 self->aq_hw->aq_link_status.mbps); 163 aq_ptp_link_change(self); 164 } 165 166 /* Driver has to update flow control settings on RX block 167 * on any link event. 168 * We should query FW whether it negotiated FC. 169 */ 170 if (self->aq_hw_ops->hw_set_fc) 171 self->aq_hw_ops->hw_set_fc(self->aq_hw, fc, 0); 172 } 173 174 self->link_status = self->aq_hw->aq_link_status; 175 if (!netif_carrier_ok(self->ndev) && self->link_status.mbps) { 176 aq_utils_obj_set(&self->flags, 177 AQ_NIC_FLAG_STARTED); 178 aq_utils_obj_clear(&self->flags, 179 AQ_NIC_LINK_DOWN); 180 netif_carrier_on(self->ndev); 181 #if IS_ENABLED(CONFIG_MACSEC) 182 aq_macsec_enable(self); 183 #endif 184 netif_tx_wake_all_queues(self->ndev); 185 } 186 if (netif_carrier_ok(self->ndev) && !self->link_status.mbps) { 187 netif_carrier_off(self->ndev); 188 netif_tx_disable(self->ndev); 189 aq_utils_obj_set(&self->flags, AQ_NIC_LINK_DOWN); 190 } 191 192 return 0; 193 } 194 195 static irqreturn_t aq_linkstate_threaded_isr(int irq, void *private) 196 { 197 struct aq_nic_s *self = private; 198 199 if (!self) 200 return IRQ_NONE; 201 202 aq_nic_update_link_status(self); 203 204 self->aq_hw_ops->hw_irq_enable(self->aq_hw, 205 BIT(self->aq_nic_cfg.link_irq_vec)); 206 207 return IRQ_HANDLED; 208 } 209 210 static void aq_nic_service_task(struct work_struct *work) 211 { 212 struct aq_nic_s *self = container_of(work, struct aq_nic_s, 213 service_task); 214 int err; 215 216 aq_ptp_service_task(self); 217 218 if (aq_utils_obj_test(&self->flags, AQ_NIC_FLAGS_IS_NOT_READY)) 219 return; 220 221 err = aq_nic_update_link_status(self); 222 if (err) 223 return; 224 225 #if IS_ENABLED(CONFIG_MACSEC) 226 aq_macsec_work(self); 227 #endif 228 229 mutex_lock(&self->fwreq_mutex); 230 if (self->aq_fw_ops->update_stats) 231 self->aq_fw_ops->update_stats(self->aq_hw); 232 mutex_unlock(&self->fwreq_mutex); 233 234 aq_nic_update_ndev_stats(self); 235 } 236 237 static void aq_nic_service_timer_cb(struct timer_list *t) 238 { 239 struct aq_nic_s *self = from_timer(self, t, service_timer); 240 241 mod_timer(&self->service_timer, 242 jiffies + AQ_CFG_SERVICE_TIMER_INTERVAL); 243 244 aq_ndev_schedule_work(&self->service_task); 245 } 246 247 static void aq_nic_polling_timer_cb(struct timer_list *t) 248 { 249 struct aq_nic_s *self = from_timer(self, t, polling_timer); 250 struct aq_vec_s *aq_vec = NULL; 251 unsigned int i = 0U; 252 253 for (i = 0U, aq_vec = self->aq_vec[0]; 254 self->aq_vecs > i; ++i, aq_vec = self->aq_vec[i]) 255 aq_vec_isr(i, (void *)aq_vec); 256 257 mod_timer(&self->polling_timer, jiffies + 258 AQ_CFG_POLLING_TIMER_INTERVAL); 259 } 260 261 static int aq_nic_hw_prepare(struct aq_nic_s *self) 262 { 263 int err = 0; 264 265 err = self->aq_hw_ops->hw_soft_reset(self->aq_hw); 266 if (err) 267 goto exit; 268 269 err = self->aq_hw_ops->hw_prepare(self->aq_hw, &self->aq_fw_ops); 270 271 exit: 272 return err; 273 } 274 275 static bool aq_nic_is_valid_ether_addr(const u8 *addr) 276 { 277 /* Some engineering samples of Aquantia NICs are provisioned with a 278 * partially populated MAC, which is still invalid. 279 */ 280 return !(addr[0] == 0 && addr[1] == 0 && addr[2] == 0); 281 } 282 283 int aq_nic_ndev_register(struct aq_nic_s *self) 284 { 285 int err = 0; 286 287 if (!self->ndev) { 288 err = -EINVAL; 289 goto err_exit; 290 } 291 292 err = aq_nic_hw_prepare(self); 293 if (err) 294 goto err_exit; 295 296 #if IS_ENABLED(CONFIG_MACSEC) 297 aq_macsec_init(self); 298 #endif 299 300 mutex_lock(&self->fwreq_mutex); 301 err = self->aq_fw_ops->get_mac_permanent(self->aq_hw, 302 self->ndev->dev_addr); 303 mutex_unlock(&self->fwreq_mutex); 304 if (err) 305 goto err_exit; 306 307 if (!is_valid_ether_addr(self->ndev->dev_addr) || 308 !aq_nic_is_valid_ether_addr(self->ndev->dev_addr)) { 309 netdev_warn(self->ndev, "MAC is invalid, will use random."); 310 eth_hw_addr_random(self->ndev); 311 } 312 313 #if defined(AQ_CFG_MAC_ADDR_PERMANENT) 314 { 315 static u8 mac_addr_permanent[] = AQ_CFG_MAC_ADDR_PERMANENT; 316 317 ether_addr_copy(self->ndev->dev_addr, mac_addr_permanent); 318 } 319 #endif 320 321 for (self->aq_vecs = 0; self->aq_vecs < aq_nic_get_cfg(self)->vecs; 322 self->aq_vecs++) { 323 self->aq_vec[self->aq_vecs] = 324 aq_vec_alloc(self, self->aq_vecs, aq_nic_get_cfg(self)); 325 if (!self->aq_vec[self->aq_vecs]) { 326 err = -ENOMEM; 327 goto err_exit; 328 } 329 } 330 331 netif_carrier_off(self->ndev); 332 333 netif_tx_disable(self->ndev); 334 335 err = register_netdev(self->ndev); 336 if (err) 337 goto err_exit; 338 339 err_exit: 340 #if IS_ENABLED(CONFIG_MACSEC) 341 if (err) 342 aq_macsec_free(self); 343 #endif 344 return err; 345 } 346 347 void aq_nic_ndev_init(struct aq_nic_s *self) 348 { 349 const struct aq_hw_caps_s *aq_hw_caps = self->aq_nic_cfg.aq_hw_caps; 350 struct aq_nic_cfg_s *aq_nic_cfg = &self->aq_nic_cfg; 351 352 self->ndev->hw_features |= aq_hw_caps->hw_features; 353 self->ndev->features = aq_hw_caps->hw_features; 354 self->ndev->vlan_features |= NETIF_F_HW_CSUM | NETIF_F_RXCSUM | 355 NETIF_F_RXHASH | NETIF_F_SG | 356 NETIF_F_LRO | NETIF_F_TSO; 357 self->ndev->gso_partial_features = NETIF_F_GSO_UDP_L4; 358 self->ndev->priv_flags = aq_hw_caps->hw_priv_flags; 359 self->ndev->priv_flags |= IFF_LIVE_ADDR_CHANGE; 360 361 self->msg_enable = NETIF_MSG_DRV | NETIF_MSG_LINK; 362 self->ndev->mtu = aq_nic_cfg->mtu - ETH_HLEN; 363 self->ndev->max_mtu = aq_hw_caps->mtu - ETH_FCS_LEN - ETH_HLEN; 364 365 } 366 367 void aq_nic_set_tx_ring(struct aq_nic_s *self, unsigned int idx, 368 struct aq_ring_s *ring) 369 { 370 self->aq_ring_tx[idx] = ring; 371 } 372 373 struct net_device *aq_nic_get_ndev(struct aq_nic_s *self) 374 { 375 return self->ndev; 376 } 377 378 int aq_nic_init(struct aq_nic_s *self) 379 { 380 struct aq_vec_s *aq_vec = NULL; 381 unsigned int i = 0U; 382 int err = 0; 383 384 self->power_state = AQ_HW_POWER_STATE_D0; 385 mutex_lock(&self->fwreq_mutex); 386 err = self->aq_hw_ops->hw_reset(self->aq_hw); 387 mutex_unlock(&self->fwreq_mutex); 388 if (err < 0) 389 goto err_exit; 390 391 err = self->aq_hw_ops->hw_init(self->aq_hw, 392 aq_nic_get_ndev(self)->dev_addr); 393 if (err < 0) 394 goto err_exit; 395 396 if (ATL_HW_IS_CHIP_FEATURE(self->aq_hw, ATLANTIC) && 397 self->aq_nic_cfg.aq_hw_caps->media_type == AQ_HW_MEDIA_TYPE_TP) { 398 self->aq_hw->phy_id = HW_ATL_PHY_ID_MAX; 399 err = aq_phy_init(self->aq_hw); 400 } 401 402 for (i = 0U, aq_vec = self->aq_vec[0]; 403 self->aq_vecs > i; ++i, aq_vec = self->aq_vec[i]) 404 aq_vec_init(aq_vec, self->aq_hw_ops, self->aq_hw); 405 406 err = aq_ptp_init(self, self->irqvecs - 1); 407 if (err < 0) 408 goto err_exit; 409 410 err = aq_ptp_ring_alloc(self); 411 if (err < 0) 412 goto err_exit; 413 414 err = aq_ptp_ring_init(self); 415 if (err < 0) 416 goto err_exit; 417 418 netif_carrier_off(self->ndev); 419 420 err_exit: 421 return err; 422 } 423 424 int aq_nic_start(struct aq_nic_s *self) 425 { 426 struct aq_vec_s *aq_vec = NULL; 427 unsigned int i = 0U; 428 int err = 0; 429 430 err = self->aq_hw_ops->hw_multicast_list_set(self->aq_hw, 431 self->mc_list.ar, 432 self->mc_list.count); 433 if (err < 0) 434 goto err_exit; 435 436 err = self->aq_hw_ops->hw_packet_filter_set(self->aq_hw, 437 self->packet_filter); 438 if (err < 0) 439 goto err_exit; 440 441 for (i = 0U, aq_vec = self->aq_vec[0]; 442 self->aq_vecs > i; ++i, aq_vec = self->aq_vec[i]) { 443 err = aq_vec_start(aq_vec); 444 if (err < 0) 445 goto err_exit; 446 } 447 448 err = aq_ptp_ring_start(self); 449 if (err < 0) 450 goto err_exit; 451 452 aq_nic_set_loopback(self); 453 454 err = self->aq_hw_ops->hw_start(self->aq_hw); 455 if (err < 0) 456 goto err_exit; 457 458 err = aq_nic_update_interrupt_moderation_settings(self); 459 if (err) 460 goto err_exit; 461 462 INIT_WORK(&self->service_task, aq_nic_service_task); 463 464 timer_setup(&self->service_timer, aq_nic_service_timer_cb, 0); 465 aq_nic_service_timer_cb(&self->service_timer); 466 467 if (self->aq_nic_cfg.is_polling) { 468 timer_setup(&self->polling_timer, aq_nic_polling_timer_cb, 0); 469 mod_timer(&self->polling_timer, jiffies + 470 AQ_CFG_POLLING_TIMER_INTERVAL); 471 } else { 472 for (i = 0U, aq_vec = self->aq_vec[0]; 473 self->aq_vecs > i; ++i, aq_vec = self->aq_vec[i]) { 474 err = aq_pci_func_alloc_irq(self, i, self->ndev->name, 475 aq_vec_isr, aq_vec, 476 aq_vec_get_affinity_mask(aq_vec)); 477 if (err < 0) 478 goto err_exit; 479 } 480 481 err = aq_ptp_irq_alloc(self); 482 if (err < 0) 483 goto err_exit; 484 485 if (self->aq_nic_cfg.link_irq_vec) { 486 int irqvec = pci_irq_vector(self->pdev, 487 self->aq_nic_cfg.link_irq_vec); 488 err = request_threaded_irq(irqvec, NULL, 489 aq_linkstate_threaded_isr, 490 IRQF_SHARED | IRQF_ONESHOT, 491 self->ndev->name, self); 492 if (err < 0) 493 goto err_exit; 494 self->msix_entry_mask |= (1 << self->aq_nic_cfg.link_irq_vec); 495 } 496 497 err = self->aq_hw_ops->hw_irq_enable(self->aq_hw, 498 AQ_CFG_IRQ_MASK); 499 if (err < 0) 500 goto err_exit; 501 } 502 503 err = netif_set_real_num_tx_queues(self->ndev, self->aq_vecs); 504 if (err < 0) 505 goto err_exit; 506 507 err = netif_set_real_num_rx_queues(self->ndev, self->aq_vecs); 508 if (err < 0) 509 goto err_exit; 510 511 netif_tx_start_all_queues(self->ndev); 512 513 err_exit: 514 return err; 515 } 516 517 unsigned int aq_nic_map_skb(struct aq_nic_s *self, struct sk_buff *skb, 518 struct aq_ring_s *ring) 519 { 520 unsigned int nr_frags = skb_shinfo(skb)->nr_frags; 521 struct aq_ring_buff_s *first = NULL; 522 u8 ipver = ip_hdr(skb)->version; 523 struct aq_ring_buff_s *dx_buff; 524 bool need_context_tag = false; 525 unsigned int frag_count = 0U; 526 unsigned int ret = 0U; 527 unsigned int dx; 528 u8 l4proto = 0; 529 530 if (ipver == 4) 531 l4proto = ip_hdr(skb)->protocol; 532 else if (ipver == 6) 533 l4proto = ipv6_hdr(skb)->nexthdr; 534 535 dx = ring->sw_tail; 536 dx_buff = &ring->buff_ring[dx]; 537 dx_buff->flags = 0U; 538 539 if (unlikely(skb_is_gso(skb))) { 540 dx_buff->mss = skb_shinfo(skb)->gso_size; 541 if (l4proto == IPPROTO_TCP) { 542 dx_buff->is_gso_tcp = 1U; 543 dx_buff->len_l4 = tcp_hdrlen(skb); 544 } else if (l4proto == IPPROTO_UDP) { 545 dx_buff->is_gso_udp = 1U; 546 dx_buff->len_l4 = sizeof(struct udphdr); 547 /* UDP GSO Hardware does not replace packet length. */ 548 udp_hdr(skb)->len = htons(dx_buff->mss + 549 dx_buff->len_l4); 550 } else { 551 WARN_ONCE(true, "Bad GSO mode"); 552 goto exit; 553 } 554 dx_buff->len_pkt = skb->len; 555 dx_buff->len_l2 = ETH_HLEN; 556 dx_buff->len_l3 = skb_network_header_len(skb); 557 dx_buff->eop_index = 0xffffU; 558 dx_buff->is_ipv6 = (ipver == 6); 559 need_context_tag = true; 560 } 561 562 if (self->aq_nic_cfg.is_vlan_tx_insert && skb_vlan_tag_present(skb)) { 563 dx_buff->vlan_tx_tag = skb_vlan_tag_get(skb); 564 dx_buff->len_pkt = skb->len; 565 dx_buff->is_vlan = 1U; 566 need_context_tag = true; 567 } 568 569 if (need_context_tag) { 570 dx = aq_ring_next_dx(ring, dx); 571 dx_buff = &ring->buff_ring[dx]; 572 dx_buff->flags = 0U; 573 ++ret; 574 } 575 576 dx_buff->len = skb_headlen(skb); 577 dx_buff->pa = dma_map_single(aq_nic_get_dev(self), 578 skb->data, 579 dx_buff->len, 580 DMA_TO_DEVICE); 581 582 if (unlikely(dma_mapping_error(aq_nic_get_dev(self), dx_buff->pa))) { 583 ret = 0; 584 goto exit; 585 } 586 587 first = dx_buff; 588 dx_buff->len_pkt = skb->len; 589 dx_buff->is_sop = 1U; 590 dx_buff->is_mapped = 1U; 591 ++ret; 592 593 if (skb->ip_summed == CHECKSUM_PARTIAL) { 594 dx_buff->is_ip_cso = (htons(ETH_P_IP) == skb->protocol); 595 dx_buff->is_tcp_cso = (l4proto == IPPROTO_TCP); 596 dx_buff->is_udp_cso = (l4proto == IPPROTO_UDP); 597 } 598 599 for (; nr_frags--; ++frag_count) { 600 unsigned int frag_len = 0U; 601 unsigned int buff_offset = 0U; 602 unsigned int buff_size = 0U; 603 dma_addr_t frag_pa; 604 skb_frag_t *frag = &skb_shinfo(skb)->frags[frag_count]; 605 606 frag_len = skb_frag_size(frag); 607 608 while (frag_len) { 609 if (frag_len > AQ_CFG_TX_FRAME_MAX) 610 buff_size = AQ_CFG_TX_FRAME_MAX; 611 else 612 buff_size = frag_len; 613 614 frag_pa = skb_frag_dma_map(aq_nic_get_dev(self), 615 frag, 616 buff_offset, 617 buff_size, 618 DMA_TO_DEVICE); 619 620 if (unlikely(dma_mapping_error(aq_nic_get_dev(self), 621 frag_pa))) 622 goto mapping_error; 623 624 dx = aq_ring_next_dx(ring, dx); 625 dx_buff = &ring->buff_ring[dx]; 626 627 dx_buff->flags = 0U; 628 dx_buff->len = buff_size; 629 dx_buff->pa = frag_pa; 630 dx_buff->is_mapped = 1U; 631 dx_buff->eop_index = 0xffffU; 632 633 frag_len -= buff_size; 634 buff_offset += buff_size; 635 636 ++ret; 637 } 638 } 639 640 first->eop_index = dx; 641 dx_buff->is_eop = 1U; 642 dx_buff->skb = skb; 643 goto exit; 644 645 mapping_error: 646 for (dx = ring->sw_tail; 647 ret > 0; 648 --ret, dx = aq_ring_next_dx(ring, dx)) { 649 dx_buff = &ring->buff_ring[dx]; 650 651 if (!(dx_buff->is_gso_tcp || dx_buff->is_gso_udp) && 652 !dx_buff->is_vlan && dx_buff->pa) { 653 if (unlikely(dx_buff->is_sop)) { 654 dma_unmap_single(aq_nic_get_dev(self), 655 dx_buff->pa, 656 dx_buff->len, 657 DMA_TO_DEVICE); 658 } else { 659 dma_unmap_page(aq_nic_get_dev(self), 660 dx_buff->pa, 661 dx_buff->len, 662 DMA_TO_DEVICE); 663 } 664 } 665 } 666 667 exit: 668 return ret; 669 } 670 671 int aq_nic_xmit(struct aq_nic_s *self, struct sk_buff *skb) 672 { 673 unsigned int vec = skb->queue_mapping % self->aq_nic_cfg.vecs; 674 struct aq_ring_s *ring = NULL; 675 unsigned int frags = 0U; 676 int err = NETDEV_TX_OK; 677 unsigned int tc = 0U; 678 679 frags = skb_shinfo(skb)->nr_frags + 1; 680 681 ring = self->aq_ring_tx[AQ_NIC_TCVEC2RING(self, tc, vec)]; 682 683 if (frags > AQ_CFG_SKB_FRAGS_MAX) { 684 dev_kfree_skb_any(skb); 685 goto err_exit; 686 } 687 688 aq_ring_update_queue_state(ring); 689 690 if (self->aq_nic_cfg.priv_flags & BIT(AQ_HW_LOOPBACK_DMA_NET)) { 691 err = NETDEV_TX_BUSY; 692 goto err_exit; 693 } 694 695 /* Above status update may stop the queue. Check this. */ 696 if (__netif_subqueue_stopped(self->ndev, ring->idx)) { 697 err = NETDEV_TX_BUSY; 698 goto err_exit; 699 } 700 701 frags = aq_nic_map_skb(self, skb, ring); 702 703 if (likely(frags)) { 704 err = self->aq_hw_ops->hw_ring_tx_xmit(self->aq_hw, 705 ring, frags); 706 } else { 707 err = NETDEV_TX_BUSY; 708 } 709 710 err_exit: 711 return err; 712 } 713 714 int aq_nic_update_interrupt_moderation_settings(struct aq_nic_s *self) 715 { 716 return self->aq_hw_ops->hw_interrupt_moderation_set(self->aq_hw); 717 } 718 719 int aq_nic_set_packet_filter(struct aq_nic_s *self, unsigned int flags) 720 { 721 int err = 0; 722 723 err = self->aq_hw_ops->hw_packet_filter_set(self->aq_hw, flags); 724 if (err < 0) 725 goto err_exit; 726 727 self->packet_filter = flags; 728 729 err_exit: 730 return err; 731 } 732 733 int aq_nic_set_multicast_list(struct aq_nic_s *self, struct net_device *ndev) 734 { 735 const struct aq_hw_ops *hw_ops = self->aq_hw_ops; 736 struct aq_nic_cfg_s *cfg = &self->aq_nic_cfg; 737 unsigned int packet_filter = ndev->flags; 738 struct netdev_hw_addr *ha = NULL; 739 unsigned int i = 0U; 740 int err = 0; 741 742 self->mc_list.count = 0; 743 if (netdev_uc_count(ndev) > AQ_HW_MULTICAST_ADDRESS_MAX) { 744 packet_filter |= IFF_PROMISC; 745 } else { 746 netdev_for_each_uc_addr(ha, ndev) { 747 ether_addr_copy(self->mc_list.ar[i++], ha->addr); 748 } 749 } 750 751 cfg->is_mc_list_enabled = !!(packet_filter & IFF_MULTICAST); 752 if (cfg->is_mc_list_enabled) { 753 if (i + netdev_mc_count(ndev) > AQ_HW_MULTICAST_ADDRESS_MAX) { 754 packet_filter |= IFF_ALLMULTI; 755 } else { 756 netdev_for_each_mc_addr(ha, ndev) { 757 ether_addr_copy(self->mc_list.ar[i++], 758 ha->addr); 759 } 760 } 761 } 762 763 if (i > 0 && i <= AQ_HW_MULTICAST_ADDRESS_MAX) { 764 self->mc_list.count = i; 765 err = hw_ops->hw_multicast_list_set(self->aq_hw, 766 self->mc_list.ar, 767 self->mc_list.count); 768 if (err < 0) 769 return err; 770 } 771 772 return aq_nic_set_packet_filter(self, packet_filter); 773 } 774 775 int aq_nic_set_mtu(struct aq_nic_s *self, int new_mtu) 776 { 777 self->aq_nic_cfg.mtu = new_mtu; 778 779 return 0; 780 } 781 782 int aq_nic_set_mac(struct aq_nic_s *self, struct net_device *ndev) 783 { 784 return self->aq_hw_ops->hw_set_mac_address(self->aq_hw, ndev->dev_addr); 785 } 786 787 unsigned int aq_nic_get_link_speed(struct aq_nic_s *self) 788 { 789 return self->link_status.mbps; 790 } 791 792 int aq_nic_get_regs(struct aq_nic_s *self, struct ethtool_regs *regs, void *p) 793 { 794 u32 *regs_buff = p; 795 int err = 0; 796 797 if (unlikely(!self->aq_hw_ops->hw_get_regs)) 798 return -EOPNOTSUPP; 799 800 regs->version = 1; 801 802 err = self->aq_hw_ops->hw_get_regs(self->aq_hw, 803 self->aq_nic_cfg.aq_hw_caps, 804 regs_buff); 805 if (err < 0) 806 goto err_exit; 807 808 err_exit: 809 return err; 810 } 811 812 int aq_nic_get_regs_count(struct aq_nic_s *self) 813 { 814 if (unlikely(!self->aq_hw_ops->hw_get_regs)) 815 return 0; 816 817 return self->aq_nic_cfg.aq_hw_caps->mac_regs_count; 818 } 819 820 u64 *aq_nic_get_stats(struct aq_nic_s *self, u64 *data) 821 { 822 struct aq_vec_s *aq_vec = NULL; 823 struct aq_stats_s *stats; 824 unsigned int count = 0U; 825 unsigned int i = 0U; 826 827 if (self->aq_fw_ops->update_stats) { 828 mutex_lock(&self->fwreq_mutex); 829 self->aq_fw_ops->update_stats(self->aq_hw); 830 mutex_unlock(&self->fwreq_mutex); 831 } 832 stats = self->aq_hw_ops->hw_get_hw_stats(self->aq_hw); 833 834 if (!stats) 835 goto err_exit; 836 837 data[i] = stats->uprc + stats->mprc + stats->bprc; 838 data[++i] = stats->uprc; 839 data[++i] = stats->mprc; 840 data[++i] = stats->bprc; 841 data[++i] = stats->erpt; 842 data[++i] = stats->uptc + stats->mptc + stats->bptc; 843 data[++i] = stats->uptc; 844 data[++i] = stats->mptc; 845 data[++i] = stats->bptc; 846 data[++i] = stats->ubrc; 847 data[++i] = stats->ubtc; 848 data[++i] = stats->mbrc; 849 data[++i] = stats->mbtc; 850 data[++i] = stats->bbrc; 851 data[++i] = stats->bbtc; 852 data[++i] = stats->ubrc + stats->mbrc + stats->bbrc; 853 data[++i] = stats->ubtc + stats->mbtc + stats->bbtc; 854 data[++i] = stats->dma_pkt_rc; 855 data[++i] = stats->dma_pkt_tc; 856 data[++i] = stats->dma_oct_rc; 857 data[++i] = stats->dma_oct_tc; 858 data[++i] = stats->dpc; 859 860 i++; 861 862 data += i; 863 864 for (i = 0U, aq_vec = self->aq_vec[0]; 865 aq_vec && self->aq_vecs > i; ++i, aq_vec = self->aq_vec[i]) { 866 data += count; 867 aq_vec_get_sw_stats(aq_vec, data, &count); 868 } 869 870 data += count; 871 872 err_exit:; 873 return data; 874 } 875 876 static void aq_nic_update_ndev_stats(struct aq_nic_s *self) 877 { 878 struct aq_stats_s *stats = self->aq_hw_ops->hw_get_hw_stats(self->aq_hw); 879 struct net_device *ndev = self->ndev; 880 881 ndev->stats.rx_packets = stats->dma_pkt_rc; 882 ndev->stats.rx_bytes = stats->dma_oct_rc; 883 ndev->stats.rx_errors = stats->erpr; 884 ndev->stats.rx_dropped = stats->dpc; 885 ndev->stats.tx_packets = stats->dma_pkt_tc; 886 ndev->stats.tx_bytes = stats->dma_oct_tc; 887 ndev->stats.tx_errors = stats->erpt; 888 ndev->stats.multicast = stats->mprc; 889 } 890 891 void aq_nic_get_link_ksettings(struct aq_nic_s *self, 892 struct ethtool_link_ksettings *cmd) 893 { 894 if (self->aq_nic_cfg.aq_hw_caps->media_type == AQ_HW_MEDIA_TYPE_FIBRE) 895 cmd->base.port = PORT_FIBRE; 896 else 897 cmd->base.port = PORT_TP; 898 /* This driver supports only 10G capable adapters, so DUPLEX_FULL */ 899 cmd->base.duplex = DUPLEX_FULL; 900 cmd->base.autoneg = self->aq_nic_cfg.is_autoneg; 901 902 ethtool_link_ksettings_zero_link_mode(cmd, supported); 903 904 if (self->aq_nic_cfg.aq_hw_caps->link_speed_msk & AQ_NIC_RATE_10G) 905 ethtool_link_ksettings_add_link_mode(cmd, supported, 906 10000baseT_Full); 907 908 if (self->aq_nic_cfg.aq_hw_caps->link_speed_msk & AQ_NIC_RATE_5G) 909 ethtool_link_ksettings_add_link_mode(cmd, supported, 910 5000baseT_Full); 911 912 if (self->aq_nic_cfg.aq_hw_caps->link_speed_msk & AQ_NIC_RATE_2G5) 913 ethtool_link_ksettings_add_link_mode(cmd, supported, 914 2500baseT_Full); 915 916 if (self->aq_nic_cfg.aq_hw_caps->link_speed_msk & AQ_NIC_RATE_1G) 917 ethtool_link_ksettings_add_link_mode(cmd, supported, 918 1000baseT_Full); 919 920 if (self->aq_nic_cfg.aq_hw_caps->link_speed_msk & AQ_NIC_RATE_100M) 921 ethtool_link_ksettings_add_link_mode(cmd, supported, 922 100baseT_Full); 923 924 if (self->aq_nic_cfg.aq_hw_caps->link_speed_msk & AQ_NIC_RATE_10M) 925 ethtool_link_ksettings_add_link_mode(cmd, supported, 926 10baseT_Full); 927 928 if (self->aq_nic_cfg.aq_hw_caps->flow_control) { 929 ethtool_link_ksettings_add_link_mode(cmd, supported, 930 Pause); 931 ethtool_link_ksettings_add_link_mode(cmd, supported, 932 Asym_Pause); 933 } 934 935 ethtool_link_ksettings_add_link_mode(cmd, supported, Autoneg); 936 937 if (self->aq_nic_cfg.aq_hw_caps->media_type == AQ_HW_MEDIA_TYPE_FIBRE) 938 ethtool_link_ksettings_add_link_mode(cmd, supported, FIBRE); 939 else 940 ethtool_link_ksettings_add_link_mode(cmd, supported, TP); 941 942 ethtool_link_ksettings_zero_link_mode(cmd, advertising); 943 944 if (self->aq_nic_cfg.is_autoneg) 945 ethtool_link_ksettings_add_link_mode(cmd, advertising, Autoneg); 946 947 if (self->aq_nic_cfg.link_speed_msk & AQ_NIC_RATE_10G) 948 ethtool_link_ksettings_add_link_mode(cmd, advertising, 949 10000baseT_Full); 950 951 if (self->aq_nic_cfg.link_speed_msk & AQ_NIC_RATE_5G) 952 ethtool_link_ksettings_add_link_mode(cmd, advertising, 953 5000baseT_Full); 954 955 if (self->aq_nic_cfg.link_speed_msk & AQ_NIC_RATE_2G5) 956 ethtool_link_ksettings_add_link_mode(cmd, advertising, 957 2500baseT_Full); 958 959 if (self->aq_nic_cfg.link_speed_msk & AQ_NIC_RATE_1G) 960 ethtool_link_ksettings_add_link_mode(cmd, advertising, 961 1000baseT_Full); 962 963 if (self->aq_nic_cfg.link_speed_msk & AQ_NIC_RATE_100M) 964 ethtool_link_ksettings_add_link_mode(cmd, advertising, 965 100baseT_Full); 966 967 if (self->aq_nic_cfg.link_speed_msk & AQ_NIC_RATE_10M) 968 ethtool_link_ksettings_add_link_mode(cmd, advertising, 969 10baseT_Full); 970 971 if (self->aq_nic_cfg.fc.cur & AQ_NIC_FC_RX) 972 ethtool_link_ksettings_add_link_mode(cmd, advertising, 973 Pause); 974 975 /* Asym is when either RX or TX, but not both */ 976 if (!!(self->aq_nic_cfg.fc.cur & AQ_NIC_FC_TX) ^ 977 !!(self->aq_nic_cfg.fc.cur & AQ_NIC_FC_RX)) 978 ethtool_link_ksettings_add_link_mode(cmd, advertising, 979 Asym_Pause); 980 981 if (self->aq_nic_cfg.aq_hw_caps->media_type == AQ_HW_MEDIA_TYPE_FIBRE) 982 ethtool_link_ksettings_add_link_mode(cmd, advertising, FIBRE); 983 else 984 ethtool_link_ksettings_add_link_mode(cmd, advertising, TP); 985 } 986 987 int aq_nic_set_link_ksettings(struct aq_nic_s *self, 988 const struct ethtool_link_ksettings *cmd) 989 { 990 u32 speed = 0U; 991 u32 rate = 0U; 992 int err = 0; 993 994 if (cmd->base.autoneg == AUTONEG_ENABLE) { 995 rate = self->aq_nic_cfg.aq_hw_caps->link_speed_msk; 996 self->aq_nic_cfg.is_autoneg = true; 997 } else { 998 speed = cmd->base.speed; 999 1000 switch (speed) { 1001 case SPEED_10: 1002 rate = AQ_NIC_RATE_10M; 1003 break; 1004 1005 case SPEED_100: 1006 rate = AQ_NIC_RATE_100M; 1007 break; 1008 1009 case SPEED_1000: 1010 rate = AQ_NIC_RATE_1G; 1011 break; 1012 1013 case SPEED_2500: 1014 rate = AQ_NIC_RATE_2G5; 1015 break; 1016 1017 case SPEED_5000: 1018 rate = AQ_NIC_RATE_5G; 1019 break; 1020 1021 case SPEED_10000: 1022 rate = AQ_NIC_RATE_10G; 1023 break; 1024 1025 default: 1026 err = -1; 1027 goto err_exit; 1028 break; 1029 } 1030 if (!(self->aq_nic_cfg.aq_hw_caps->link_speed_msk & rate)) { 1031 err = -1; 1032 goto err_exit; 1033 } 1034 1035 self->aq_nic_cfg.is_autoneg = false; 1036 } 1037 1038 mutex_lock(&self->fwreq_mutex); 1039 err = self->aq_fw_ops->set_link_speed(self->aq_hw, rate); 1040 mutex_unlock(&self->fwreq_mutex); 1041 if (err < 0) 1042 goto err_exit; 1043 1044 self->aq_nic_cfg.link_speed_msk = rate; 1045 1046 err_exit: 1047 return err; 1048 } 1049 1050 struct aq_nic_cfg_s *aq_nic_get_cfg(struct aq_nic_s *self) 1051 { 1052 return &self->aq_nic_cfg; 1053 } 1054 1055 u32 aq_nic_get_fw_version(struct aq_nic_s *self) 1056 { 1057 return self->aq_hw_ops->hw_get_fw_version(self->aq_hw); 1058 } 1059 1060 int aq_nic_set_loopback(struct aq_nic_s *self) 1061 { 1062 struct aq_nic_cfg_s *cfg = &self->aq_nic_cfg; 1063 1064 if (!self->aq_hw_ops->hw_set_loopback || 1065 !self->aq_fw_ops->set_phyloopback) 1066 return -ENOTSUPP; 1067 1068 mutex_lock(&self->fwreq_mutex); 1069 self->aq_hw_ops->hw_set_loopback(self->aq_hw, 1070 AQ_HW_LOOPBACK_DMA_SYS, 1071 !!(cfg->priv_flags & 1072 BIT(AQ_HW_LOOPBACK_DMA_SYS))); 1073 1074 self->aq_hw_ops->hw_set_loopback(self->aq_hw, 1075 AQ_HW_LOOPBACK_PKT_SYS, 1076 !!(cfg->priv_flags & 1077 BIT(AQ_HW_LOOPBACK_PKT_SYS))); 1078 1079 self->aq_hw_ops->hw_set_loopback(self->aq_hw, 1080 AQ_HW_LOOPBACK_DMA_NET, 1081 !!(cfg->priv_flags & 1082 BIT(AQ_HW_LOOPBACK_DMA_NET))); 1083 1084 self->aq_fw_ops->set_phyloopback(self->aq_hw, 1085 AQ_HW_LOOPBACK_PHYINT_SYS, 1086 !!(cfg->priv_flags & 1087 BIT(AQ_HW_LOOPBACK_PHYINT_SYS))); 1088 1089 self->aq_fw_ops->set_phyloopback(self->aq_hw, 1090 AQ_HW_LOOPBACK_PHYEXT_SYS, 1091 !!(cfg->priv_flags & 1092 BIT(AQ_HW_LOOPBACK_PHYEXT_SYS))); 1093 mutex_unlock(&self->fwreq_mutex); 1094 1095 return 0; 1096 } 1097 1098 int aq_nic_stop(struct aq_nic_s *self) 1099 { 1100 struct aq_vec_s *aq_vec = NULL; 1101 unsigned int i = 0U; 1102 1103 netif_tx_disable(self->ndev); 1104 netif_carrier_off(self->ndev); 1105 1106 del_timer_sync(&self->service_timer); 1107 cancel_work_sync(&self->service_task); 1108 1109 self->aq_hw_ops->hw_irq_disable(self->aq_hw, AQ_CFG_IRQ_MASK); 1110 1111 if (self->aq_nic_cfg.is_polling) 1112 del_timer_sync(&self->polling_timer); 1113 else 1114 aq_pci_func_free_irqs(self); 1115 1116 aq_ptp_irq_free(self); 1117 1118 for (i = 0U, aq_vec = self->aq_vec[0]; 1119 self->aq_vecs > i; ++i, aq_vec = self->aq_vec[i]) 1120 aq_vec_stop(aq_vec); 1121 1122 aq_ptp_ring_stop(self); 1123 1124 return self->aq_hw_ops->hw_stop(self->aq_hw); 1125 } 1126 1127 void aq_nic_set_power(struct aq_nic_s *self) 1128 { 1129 if (self->power_state != AQ_HW_POWER_STATE_D0 || 1130 self->aq_hw->aq_nic_cfg->wol) 1131 if (likely(self->aq_fw_ops->set_power)) { 1132 mutex_lock(&self->fwreq_mutex); 1133 self->aq_fw_ops->set_power(self->aq_hw, 1134 self->power_state, 1135 self->ndev->dev_addr); 1136 mutex_unlock(&self->fwreq_mutex); 1137 } 1138 } 1139 1140 void aq_nic_deinit(struct aq_nic_s *self, bool link_down) 1141 { 1142 struct aq_vec_s *aq_vec = NULL; 1143 unsigned int i = 0U; 1144 1145 if (!self) 1146 goto err_exit; 1147 1148 for (i = 0U, aq_vec = self->aq_vec[0]; 1149 self->aq_vecs > i; ++i, aq_vec = self->aq_vec[i]) 1150 aq_vec_deinit(aq_vec); 1151 1152 aq_ptp_unregister(self); 1153 aq_ptp_ring_deinit(self); 1154 aq_ptp_ring_free(self); 1155 aq_ptp_free(self); 1156 1157 if (likely(self->aq_fw_ops->deinit) && link_down) { 1158 mutex_lock(&self->fwreq_mutex); 1159 self->aq_fw_ops->deinit(self->aq_hw); 1160 mutex_unlock(&self->fwreq_mutex); 1161 } 1162 1163 err_exit:; 1164 } 1165 1166 void aq_nic_free_vectors(struct aq_nic_s *self) 1167 { 1168 unsigned int i = 0U; 1169 1170 if (!self) 1171 goto err_exit; 1172 1173 for (i = ARRAY_SIZE(self->aq_vec); i--;) { 1174 if (self->aq_vec[i]) { 1175 aq_vec_free(self->aq_vec[i]); 1176 self->aq_vec[i] = NULL; 1177 } 1178 } 1179 1180 err_exit:; 1181 } 1182 1183 void aq_nic_shutdown(struct aq_nic_s *self) 1184 { 1185 int err = 0; 1186 1187 if (!self->ndev) 1188 return; 1189 1190 rtnl_lock(); 1191 1192 netif_device_detach(self->ndev); 1193 1194 if (netif_running(self->ndev)) { 1195 err = aq_nic_stop(self); 1196 if (err < 0) 1197 goto err_exit; 1198 } 1199 aq_nic_deinit(self, !self->aq_hw->aq_nic_cfg->wol); 1200 aq_nic_set_power(self); 1201 1202 err_exit: 1203 rtnl_unlock(); 1204 } 1205 1206 u8 aq_nic_reserve_filter(struct aq_nic_s *self, enum aq_rx_filter_type type) 1207 { 1208 u8 location = 0xFF; 1209 u32 fltr_cnt; 1210 u32 n_bit; 1211 1212 switch (type) { 1213 case aq_rx_filter_ethertype: 1214 location = AQ_RX_LAST_LOC_FETHERT - AQ_RX_FIRST_LOC_FETHERT - 1215 self->aq_hw_rx_fltrs.fet_reserved_count; 1216 self->aq_hw_rx_fltrs.fet_reserved_count++; 1217 break; 1218 case aq_rx_filter_l3l4: 1219 fltr_cnt = AQ_RX_LAST_LOC_FL3L4 - AQ_RX_FIRST_LOC_FL3L4; 1220 n_bit = fltr_cnt - self->aq_hw_rx_fltrs.fl3l4.reserved_count; 1221 1222 self->aq_hw_rx_fltrs.fl3l4.active_ipv4 |= BIT(n_bit); 1223 self->aq_hw_rx_fltrs.fl3l4.reserved_count++; 1224 location = n_bit; 1225 break; 1226 default: 1227 break; 1228 } 1229 1230 return location; 1231 } 1232 1233 void aq_nic_release_filter(struct aq_nic_s *self, enum aq_rx_filter_type type, 1234 u32 location) 1235 { 1236 switch (type) { 1237 case aq_rx_filter_ethertype: 1238 self->aq_hw_rx_fltrs.fet_reserved_count--; 1239 break; 1240 case aq_rx_filter_l3l4: 1241 self->aq_hw_rx_fltrs.fl3l4.reserved_count--; 1242 self->aq_hw_rx_fltrs.fl3l4.active_ipv4 &= ~BIT(location); 1243 break; 1244 default: 1245 break; 1246 } 1247 } 1248