1 /* Applied Micro X-Gene SoC Ethernet Driver 2 * 3 * Copyright (c) 2014, Applied Micro Circuits Corporation 4 * Authors: Iyappan Subramanian <isubramanian@apm.com> 5 * Ravi Patel <rapatel@apm.com> 6 * Keyur Chudgar <kchudgar@apm.com> 7 * 8 * This program is free software; you can redistribute it and/or modify it 9 * under the terms of the GNU General Public License as published by the 10 * Free Software Foundation; either version 2 of the License, or (at your 11 * option) any later version. 12 * 13 * This program is distributed in the hope that it will be useful, 14 * but WITHOUT ANY WARRANTY; without even the implied warranty of 15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 16 * GNU General Public License for more details. 17 * 18 * You should have received a copy of the GNU General Public License 19 * along with this program. If not, see <http://www.gnu.org/licenses/>. 20 */ 21 22 #ifndef __XGENE_ENET_MAIN_H__ 23 #define __XGENE_ENET_MAIN_H__ 24 25 #include <linux/clk.h> 26 #include <linux/of_platform.h> 27 #include <linux/of_net.h> 28 #include <linux/of_mdio.h> 29 #include <linux/module.h> 30 #include <net/ip.h> 31 #include <linux/prefetch.h> 32 #include <linux/if_vlan.h> 33 #include <linux/phy.h> 34 #include "xgene_enet_hw.h" 35 36 #define XGENE_DRV_VERSION "v1.0" 37 #define XGENE_ENET_MAX_MTU 1536 38 #define SKB_BUFFER_SIZE (XGENE_ENET_MAX_MTU - NET_IP_ALIGN) 39 #define NUM_PKT_BUF 64 40 #define NUM_BUFPOOL 32 41 42 #define PHY_POLL_LINK_ON (10 * HZ) 43 #define PHY_POLL_LINK_OFF (PHY_POLL_LINK_ON / 5) 44 45 /* software context of a descriptor ring */ 46 struct xgene_enet_desc_ring { 47 struct net_device *ndev; 48 u16 id; 49 u16 num; 50 u16 head; 51 u16 tail; 52 u16 slots; 53 u16 irq; 54 u32 size; 55 u32 state[NUM_RING_CONFIG]; 56 void __iomem *cmd_base; 57 void __iomem *cmd; 58 dma_addr_t dma; 59 u16 dst_ring_num; 60 u8 nbufpool; 61 struct sk_buff *(*rx_skb); 62 struct sk_buff *(*cp_skb); 63 enum xgene_enet_ring_cfgsize cfgsize; 64 struct xgene_enet_desc_ring *cp_ring; 65 struct xgene_enet_desc_ring *buf_pool; 66 struct napi_struct napi; 67 union { 68 void *desc_addr; 69 struct xgene_enet_raw_desc *raw_desc; 70 struct xgene_enet_raw_desc16 *raw_desc16; 71 }; 72 }; 73 74 struct xgene_mac_ops { 75 void (*init)(struct xgene_enet_pdata *pdata); 76 void (*reset)(struct xgene_enet_pdata *pdata); 77 void (*tx_enable)(struct xgene_enet_pdata *pdata); 78 void (*rx_enable)(struct xgene_enet_pdata *pdata); 79 void (*tx_disable)(struct xgene_enet_pdata *pdata); 80 void (*rx_disable)(struct xgene_enet_pdata *pdata); 81 void (*set_mac_addr)(struct xgene_enet_pdata *pdata); 82 void (*link_state)(struct work_struct *work); 83 }; 84 85 struct xgene_port_ops { 86 void (*reset)(struct xgene_enet_pdata *pdata); 87 void (*cle_bypass)(struct xgene_enet_pdata *pdata, 88 u32 dst_ring_num, u16 bufpool_id); 89 void (*shutdown)(struct xgene_enet_pdata *pdata); 90 }; 91 92 /* ethernet private data */ 93 struct xgene_enet_pdata { 94 struct net_device *ndev; 95 struct mii_bus *mdio_bus; 96 struct phy_device *phy_dev; 97 int phy_speed; 98 struct clk *clk; 99 struct platform_device *pdev; 100 struct xgene_enet_desc_ring *tx_ring; 101 struct xgene_enet_desc_ring *rx_ring; 102 char *dev_name; 103 u32 rx_buff_cnt; 104 u32 tx_qcnt_hi; 105 u32 cp_qcnt_hi; 106 u32 cp_qcnt_low; 107 u32 rx_irq; 108 void __iomem *eth_csr_addr; 109 void __iomem *eth_ring_if_addr; 110 void __iomem *eth_diag_csr_addr; 111 void __iomem *mcx_mac_addr; 112 void __iomem *mcx_mac_csr_addr; 113 void __iomem *base_addr; 114 void __iomem *ring_csr_addr; 115 void __iomem *ring_cmd_addr; 116 int phy_mode; 117 enum xgene_enet_rm rm; 118 struct rtnl_link_stats64 stats; 119 struct xgene_mac_ops *mac_ops; 120 struct xgene_port_ops *port_ops; 121 struct delayed_work link_work; 122 }; 123 124 struct xgene_indirect_ctl { 125 void __iomem *addr; 126 void __iomem *ctl; 127 void __iomem *cmd; 128 void __iomem *cmd_done; 129 }; 130 131 /* Set the specified value into a bit-field defined by its starting position 132 * and length within a single u64. 133 */ 134 static inline u64 xgene_enet_set_field_value(int pos, int len, u64 val) 135 { 136 return (val & ((1ULL << len) - 1)) << pos; 137 } 138 139 #define SET_VAL(field, val) \ 140 xgene_enet_set_field_value(field ## _POS, field ## _LEN, val) 141 142 #define SET_BIT(field) \ 143 xgene_enet_set_field_value(field ## _POS, 1, 1) 144 145 /* Get the value from a bit-field defined by its starting position 146 * and length within the specified u64. 147 */ 148 static inline u64 xgene_enet_get_field_value(int pos, int len, u64 src) 149 { 150 return (src >> pos) & ((1ULL << len) - 1); 151 } 152 153 #define GET_VAL(field, src) \ 154 xgene_enet_get_field_value(field ## _POS, field ## _LEN, src) 155 156 static inline struct device *ndev_to_dev(struct net_device *ndev) 157 { 158 return ndev->dev.parent; 159 } 160 161 void xgene_enet_set_ethtool_ops(struct net_device *netdev); 162 163 #endif /* __XGENE_ENET_MAIN_H__ */ 164