1 /* Applied Micro X-Gene SoC Ethernet Driver 2 * 3 * Copyright (c) 2014, Applied Micro Circuits Corporation 4 * Authors: Iyappan Subramanian <isubramanian@apm.com> 5 * Ravi Patel <rapatel@apm.com> 6 * Keyur Chudgar <kchudgar@apm.com> 7 * 8 * This program is free software; you can redistribute it and/or modify it 9 * under the terms of the GNU General Public License as published by the 10 * Free Software Foundation; either version 2 of the License, or (at your 11 * option) any later version. 12 * 13 * This program is distributed in the hope that it will be useful, 14 * but WITHOUT ANY WARRANTY; without even the implied warranty of 15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 16 * GNU General Public License for more details. 17 * 18 * You should have received a copy of the GNU General Public License 19 * along with this program. If not, see <http://www.gnu.org/licenses/>. 20 */ 21 22 #ifndef __XGENE_ENET_MAIN_H__ 23 #define __XGENE_ENET_MAIN_H__ 24 25 #include <linux/acpi.h> 26 #include <linux/clk.h> 27 #include <linux/efi.h> 28 #include <linux/io.h> 29 #include <linux/of_platform.h> 30 #include <linux/of_net.h> 31 #include <linux/of_mdio.h> 32 #include <linux/module.h> 33 #include <net/ip.h> 34 #include <linux/prefetch.h> 35 #include <linux/if_vlan.h> 36 #include <linux/phy.h> 37 #include "xgene_enet_hw.h" 38 39 #define XGENE_DRV_VERSION "v1.0" 40 #define XGENE_ENET_MAX_MTU 1536 41 #define SKB_BUFFER_SIZE (XGENE_ENET_MAX_MTU - NET_IP_ALIGN) 42 #define NUM_PKT_BUF 64 43 #define NUM_BUFPOOL 32 44 #define START_ETH_BUFNUM 2 45 #define START_BP_BUFNUM 0x22 46 #define START_RING_NUM 8 47 48 #define PHY_POLL_LINK_ON (10 * HZ) 49 #define PHY_POLL_LINK_OFF (PHY_POLL_LINK_ON / 5) 50 51 /* software context of a descriptor ring */ 52 struct xgene_enet_desc_ring { 53 struct net_device *ndev; 54 u16 id; 55 u16 num; 56 u16 head; 57 u16 tail; 58 u16 slots; 59 u16 irq; 60 u32 size; 61 u32 state[NUM_RING_CONFIG]; 62 void __iomem *cmd_base; 63 void __iomem *cmd; 64 dma_addr_t dma; 65 u16 dst_ring_num; 66 u8 nbufpool; 67 struct sk_buff *(*rx_skb); 68 struct sk_buff *(*cp_skb); 69 enum xgene_enet_ring_cfgsize cfgsize; 70 struct xgene_enet_desc_ring *cp_ring; 71 struct xgene_enet_desc_ring *buf_pool; 72 struct napi_struct napi; 73 union { 74 void *desc_addr; 75 struct xgene_enet_raw_desc *raw_desc; 76 struct xgene_enet_raw_desc16 *raw_desc16; 77 }; 78 }; 79 80 struct xgene_mac_ops { 81 void (*init)(struct xgene_enet_pdata *pdata); 82 void (*reset)(struct xgene_enet_pdata *pdata); 83 void (*tx_enable)(struct xgene_enet_pdata *pdata); 84 void (*rx_enable)(struct xgene_enet_pdata *pdata); 85 void (*tx_disable)(struct xgene_enet_pdata *pdata); 86 void (*rx_disable)(struct xgene_enet_pdata *pdata); 87 void (*set_mac_addr)(struct xgene_enet_pdata *pdata); 88 void (*link_state)(struct work_struct *work); 89 }; 90 91 struct xgene_port_ops { 92 int (*reset)(struct xgene_enet_pdata *pdata); 93 void (*cle_bypass)(struct xgene_enet_pdata *pdata, 94 u32 dst_ring_num, u16 bufpool_id); 95 void (*shutdown)(struct xgene_enet_pdata *pdata); 96 }; 97 98 /* ethernet private data */ 99 struct xgene_enet_pdata { 100 struct net_device *ndev; 101 struct mii_bus *mdio_bus; 102 struct phy_device *phy_dev; 103 int phy_speed; 104 struct clk *clk; 105 struct platform_device *pdev; 106 struct xgene_enet_desc_ring *tx_ring; 107 struct xgene_enet_desc_ring *rx_ring; 108 char *dev_name; 109 u32 rx_buff_cnt; 110 u32 tx_qcnt_hi; 111 u32 cp_qcnt_hi; 112 u32 cp_qcnt_low; 113 u32 rx_irq; 114 void __iomem *eth_csr_addr; 115 void __iomem *eth_ring_if_addr; 116 void __iomem *eth_diag_csr_addr; 117 void __iomem *mcx_mac_addr; 118 void __iomem *mcx_mac_csr_addr; 119 void __iomem *base_addr; 120 void __iomem *ring_csr_addr; 121 void __iomem *ring_cmd_addr; 122 int phy_mode; 123 enum xgene_enet_rm rm; 124 struct rtnl_link_stats64 stats; 125 struct xgene_mac_ops *mac_ops; 126 struct xgene_port_ops *port_ops; 127 struct delayed_work link_work; 128 }; 129 130 struct xgene_indirect_ctl { 131 void __iomem *addr; 132 void __iomem *ctl; 133 void __iomem *cmd; 134 void __iomem *cmd_done; 135 }; 136 137 /* Set the specified value into a bit-field defined by its starting position 138 * and length within a single u64. 139 */ 140 static inline u64 xgene_enet_set_field_value(int pos, int len, u64 val) 141 { 142 return (val & ((1ULL << len) - 1)) << pos; 143 } 144 145 #define SET_VAL(field, val) \ 146 xgene_enet_set_field_value(field ## _POS, field ## _LEN, val) 147 148 #define SET_BIT(field) \ 149 xgene_enet_set_field_value(field ## _POS, 1, 1) 150 151 /* Get the value from a bit-field defined by its starting position 152 * and length within the specified u64. 153 */ 154 static inline u64 xgene_enet_get_field_value(int pos, int len, u64 src) 155 { 156 return (src >> pos) & ((1ULL << len) - 1); 157 } 158 159 #define GET_VAL(field, src) \ 160 xgene_enet_get_field_value(field ## _POS, field ## _LEN, src) 161 162 static inline struct device *ndev_to_dev(struct net_device *ndev) 163 { 164 return ndev->dev.parent; 165 } 166 167 void xgene_enet_set_ethtool_ops(struct net_device *netdev); 168 169 #endif /* __XGENE_ENET_MAIN_H__ */ 170