1 // SPDX-License-Identifier: GPL-2.0-or-later 2 /* 3 * Applied Micro X-Gene SoC Ethernet v2 Driver 4 * 5 * Copyright (c) 2017, Applied Micro Circuits Corporation 6 * Author(s): Iyappan Subramanian <isubramanian@apm.com> 7 * Keyur Chudgar <kchudgar@apm.com> 8 */ 9 10 #include "main.h" 11 12 /* create circular linked list of descriptors */ 13 void xge_setup_desc(struct xge_desc_ring *ring) 14 { 15 struct xge_raw_desc *raw_desc; 16 dma_addr_t dma_h, next_dma; 17 u16 offset; 18 int i; 19 20 for (i = 0; i < XGENE_ENET_NUM_DESC; i++) { 21 raw_desc = &ring->raw_desc[i]; 22 23 offset = (i + 1) & (XGENE_ENET_NUM_DESC - 1); 24 next_dma = ring->dma_addr + (offset * XGENE_ENET_DESC_SIZE); 25 26 raw_desc->m0 = cpu_to_le64(SET_BITS(E, 1) | 27 SET_BITS(PKT_SIZE, SLOT_EMPTY)); 28 dma_h = upper_32_bits(next_dma); 29 raw_desc->m1 = cpu_to_le64(SET_BITS(NEXT_DESC_ADDRL, next_dma) | 30 SET_BITS(NEXT_DESC_ADDRH, dma_h)); 31 } 32 } 33 34 void xge_update_tx_desc_addr(struct xge_pdata *pdata) 35 { 36 struct xge_desc_ring *ring = pdata->tx_ring; 37 dma_addr_t dma_addr = ring->dma_addr; 38 39 xge_wr_csr(pdata, DMATXDESCL, dma_addr); 40 xge_wr_csr(pdata, DMATXDESCH, upper_32_bits(dma_addr)); 41 42 ring->head = 0; 43 ring->tail = 0; 44 } 45 46 void xge_update_rx_desc_addr(struct xge_pdata *pdata) 47 { 48 struct xge_desc_ring *ring = pdata->rx_ring; 49 dma_addr_t dma_addr = ring->dma_addr; 50 51 xge_wr_csr(pdata, DMARXDESCL, dma_addr); 52 xge_wr_csr(pdata, DMARXDESCH, upper_32_bits(dma_addr)); 53 54 ring->head = 0; 55 ring->tail = 0; 56 } 57 58 void xge_intr_enable(struct xge_pdata *pdata) 59 { 60 u32 data; 61 62 data = RX_PKT_RCVD | TX_PKT_SENT; 63 xge_wr_csr(pdata, DMAINTRMASK, data); 64 } 65 66 void xge_intr_disable(struct xge_pdata *pdata) 67 { 68 xge_wr_csr(pdata, DMAINTRMASK, 0); 69 } 70