1 /* 2 * Applied Micro X-Gene SoC Ethernet v2 Driver 3 * 4 * Copyright (c) 2017, Applied Micro Circuits Corporation 5 * Author(s): Iyappan Subramanian <isubramanian@apm.com> 6 * Keyur Chudgar <kchudgar@apm.com> 7 * 8 * This program is free software; you can redistribute it and/or modify it 9 * under the terms of the GNU General Public License as published by the 10 * Free Software Foundation; either version 2 of the License, or (at your 11 * option) any later version. 12 * 13 * This program is distributed in the hope that it will be useful, 14 * but WITHOUT ANY WARRANTY; without even the implied warranty of 15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 16 * GNU General Public License for more details. 17 * 18 * You should have received a copy of the GNU General Public License 19 * along with this program. If not, see <http://www.gnu.org/licenses/>. 20 */ 21 22 #include "main.h" 23 24 void xge_wr_csr(struct xge_pdata *pdata, u32 offset, u32 val) 25 { 26 void __iomem *addr = pdata->resources.base_addr + offset; 27 28 iowrite32(val, addr); 29 } 30 31 u32 xge_rd_csr(struct xge_pdata *pdata, u32 offset) 32 { 33 void __iomem *addr = pdata->resources.base_addr + offset; 34 35 return ioread32(addr); 36 } 37 38 int xge_port_reset(struct net_device *ndev) 39 { 40 struct xge_pdata *pdata = netdev_priv(ndev); 41 struct device *dev = &pdata->pdev->dev; 42 u32 data, wait = 10; 43 44 xge_wr_csr(pdata, ENET_CLKEN, 0x3); 45 xge_wr_csr(pdata, ENET_SRST, 0xf); 46 xge_wr_csr(pdata, ENET_SRST, 0); 47 xge_wr_csr(pdata, CFG_MEM_RAM_SHUTDOWN, 1); 48 xge_wr_csr(pdata, CFG_MEM_RAM_SHUTDOWN, 0); 49 50 do { 51 usleep_range(100, 110); 52 data = xge_rd_csr(pdata, BLOCK_MEM_RDY); 53 } while (data != MEM_RDY && wait--); 54 55 if (data != MEM_RDY) { 56 dev_err(dev, "ECC init failed: %x\n", data); 57 return -ETIMEDOUT; 58 } 59 60 xge_wr_csr(pdata, ENET_SHIM, DEVM_ARAUX_COH | DEVM_AWAUX_COH); 61 62 return 0; 63 } 64 65 static void xge_traffic_resume(struct net_device *ndev) 66 { 67 struct xge_pdata *pdata = netdev_priv(ndev); 68 69 xge_wr_csr(pdata, CFG_FORCE_LINK_STATUS_EN, 1); 70 xge_wr_csr(pdata, FORCE_LINK_STATUS, 1); 71 72 xge_wr_csr(pdata, CFG_LINK_AGGR_RESUME, 1); 73 xge_wr_csr(pdata, RX_DV_GATE_REG, 1); 74 } 75 76 void xge_port_init(struct net_device *ndev) 77 { 78 struct xge_pdata *pdata = netdev_priv(ndev); 79 80 pdata->phy_speed = SPEED_1000; 81 xge_mac_init(pdata); 82 xge_traffic_resume(ndev); 83 } 84