1 /* 2 * AMD 10Gb Ethernet driver 3 * 4 * This file is available to you under your choice of the following two 5 * licenses: 6 * 7 * License 1: GPLv2 8 * 9 * Copyright (c) 2014-2016 Advanced Micro Devices, Inc. 10 * 11 * This file is free software; you may copy, redistribute and/or modify 12 * it under the terms of the GNU General Public License as published by 13 * the Free Software Foundation, either version 2 of the License, or (at 14 * your option) any later version. 15 * 16 * This file is distributed in the hope that it will be useful, but 17 * WITHOUT ANY WARRANTY; without even the implied warranty of 18 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU 19 * General Public License for more details. 20 * 21 * You should have received a copy of the GNU General Public License 22 * along with this program. If not, see <http://www.gnu.org/licenses/>. 23 * 24 * This file incorporates work covered by the following copyright and 25 * permission notice: 26 * The Synopsys DWC ETHER XGMAC Software Driver and documentation 27 * (hereinafter "Software") is an unsupported proprietary work of Synopsys, 28 * Inc. unless otherwise expressly agreed to in writing between Synopsys 29 * and you. 30 * 31 * The Software IS NOT an item of Licensed Software or Licensed Product 32 * under any End User Software License Agreement or Agreement for Licensed 33 * Product with Synopsys or any supplement thereto. Permission is hereby 34 * granted, free of charge, to any person obtaining a copy of this software 35 * annotated with this license and the Software, to deal in the Software 36 * without restriction, including without limitation the rights to use, 37 * copy, modify, merge, publish, distribute, sublicense, and/or sell copies 38 * of the Software, and to permit persons to whom the Software is furnished 39 * to do so, subject to the following conditions: 40 * 41 * The above copyright notice and this permission notice shall be included 42 * in all copies or substantial portions of the Software. 43 * 44 * THIS SOFTWARE IS BEING DISTRIBUTED BY SYNOPSYS SOLELY ON AN "AS IS" 45 * BASIS AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 46 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A 47 * PARTICULAR PURPOSE ARE HEREBY DISCLAIMED. IN NO EVENT SHALL SYNOPSYS 48 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 49 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 50 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 51 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 52 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 53 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF 54 * THE POSSIBILITY OF SUCH DAMAGE. 55 * 56 * 57 * License 2: Modified BSD 58 * 59 * Copyright (c) 2014-2016 Advanced Micro Devices, Inc. 60 * All rights reserved. 61 * 62 * Redistribution and use in source and binary forms, with or without 63 * modification, are permitted provided that the following conditions are met: 64 * * Redistributions of source code must retain the above copyright 65 * notice, this list of conditions and the following disclaimer. 66 * * Redistributions in binary form must reproduce the above copyright 67 * notice, this list of conditions and the following disclaimer in the 68 * documentation and/or other materials provided with the distribution. 69 * * Neither the name of Advanced Micro Devices, Inc. nor the 70 * names of its contributors may be used to endorse or promote products 71 * derived from this software without specific prior written permission. 72 * 73 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" 74 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 75 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 76 * ARE DISCLAIMED. IN NO EVENT SHALL <COPYRIGHT HOLDER> BE LIABLE FOR ANY 77 * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES 78 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; 79 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND 80 * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 81 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF 82 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 83 * 84 * This file incorporates work covered by the following copyright and 85 * permission notice: 86 * The Synopsys DWC ETHER XGMAC Software Driver and documentation 87 * (hereinafter "Software") is an unsupported proprietary work of Synopsys, 88 * Inc. unless otherwise expressly agreed to in writing between Synopsys 89 * and you. 90 * 91 * The Software IS NOT an item of Licensed Software or Licensed Product 92 * under any End User Software License Agreement or Agreement for Licensed 93 * Product with Synopsys or any supplement thereto. Permission is hereby 94 * granted, free of charge, to any person obtaining a copy of this software 95 * annotated with this license and the Software, to deal in the Software 96 * without restriction, including without limitation the rights to use, 97 * copy, modify, merge, publish, distribute, sublicense, and/or sell copies 98 * of the Software, and to permit persons to whom the Software is furnished 99 * to do so, subject to the following conditions: 100 * 101 * The above copyright notice and this permission notice shall be included 102 * in all copies or substantial portions of the Software. 103 * 104 * THIS SOFTWARE IS BEING DISTRIBUTED BY SYNOPSYS SOLELY ON AN "AS IS" 105 * BASIS AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 106 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A 107 * PARTICULAR PURPOSE ARE HEREBY DISCLAIMED. IN NO EVENT SHALL SYNOPSYS 108 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 109 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 110 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 111 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 112 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 113 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF 114 * THE POSSIBILITY OF SUCH DAMAGE. 115 */ 116 117 #include <linux/module.h> 118 #include <linux/device.h> 119 #include <linux/platform_device.h> 120 #include <linux/spinlock.h> 121 #include <linux/netdevice.h> 122 #include <linux/etherdevice.h> 123 #include <linux/io.h> 124 #include <linux/of.h> 125 #include <linux/of_net.h> 126 #include <linux/of_platform.h> 127 #include <linux/clk.h> 128 #include <linux/property.h> 129 #include <linux/acpi.h> 130 #include <linux/mdio.h> 131 132 #include "xgbe.h" 133 #include "xgbe-common.h" 134 135 #ifdef CONFIG_ACPI 136 static int xgbe_acpi_support(struct xgbe_prv_data *pdata) 137 { 138 struct device *dev = pdata->dev; 139 u32 property; 140 int ret; 141 142 /* Obtain the system clock setting */ 143 ret = device_property_read_u32(dev, XGBE_ACPI_DMA_FREQ, &property); 144 if (ret) { 145 dev_err(dev, "unable to obtain %s property\n", 146 XGBE_ACPI_DMA_FREQ); 147 return ret; 148 } 149 pdata->sysclk_rate = property; 150 151 /* Obtain the PTP clock setting */ 152 ret = device_property_read_u32(dev, XGBE_ACPI_PTP_FREQ, &property); 153 if (ret) { 154 dev_err(dev, "unable to obtain %s property\n", 155 XGBE_ACPI_PTP_FREQ); 156 return ret; 157 } 158 pdata->ptpclk_rate = property; 159 160 return 0; 161 } 162 #else /* CONFIG_ACPI */ 163 static int xgbe_acpi_support(struct xgbe_prv_data *pdata) 164 { 165 return -EINVAL; 166 } 167 #endif /* CONFIG_ACPI */ 168 169 #ifdef CONFIG_OF 170 static int xgbe_of_support(struct xgbe_prv_data *pdata) 171 { 172 struct device *dev = pdata->dev; 173 174 /* Obtain the system clock setting */ 175 pdata->sysclk = devm_clk_get(dev, XGBE_DMA_CLOCK); 176 if (IS_ERR(pdata->sysclk)) { 177 dev_err(dev, "dma devm_clk_get failed\n"); 178 return PTR_ERR(pdata->sysclk); 179 } 180 pdata->sysclk_rate = clk_get_rate(pdata->sysclk); 181 182 /* Obtain the PTP clock setting */ 183 pdata->ptpclk = devm_clk_get(dev, XGBE_PTP_CLOCK); 184 if (IS_ERR(pdata->ptpclk)) { 185 dev_err(dev, "ptp devm_clk_get failed\n"); 186 return PTR_ERR(pdata->ptpclk); 187 } 188 pdata->ptpclk_rate = clk_get_rate(pdata->ptpclk); 189 190 return 0; 191 } 192 193 static struct platform_device *xgbe_of_get_phy_pdev(struct xgbe_prv_data *pdata) 194 { 195 struct device *dev = pdata->dev; 196 struct device_node *phy_node; 197 struct platform_device *phy_pdev; 198 199 phy_node = of_parse_phandle(dev->of_node, "phy-handle", 0); 200 if (phy_node) { 201 /* Old style device tree: 202 * The XGBE and PHY resources are separate 203 */ 204 phy_pdev = of_find_device_by_node(phy_node); 205 of_node_put(phy_node); 206 } else { 207 /* New style device tree: 208 * The XGBE and PHY resources are grouped together with 209 * the PHY resources listed last 210 */ 211 get_device(dev); 212 phy_pdev = pdata->platdev; 213 } 214 215 return phy_pdev; 216 } 217 #else /* CONFIG_OF */ 218 static int xgbe_of_support(struct xgbe_prv_data *pdata) 219 { 220 return -EINVAL; 221 } 222 223 static struct platform_device *xgbe_of_get_phy_pdev(struct xgbe_prv_data *pdata) 224 { 225 return NULL; 226 } 227 #endif /* CONFIG_OF */ 228 229 static unsigned int xgbe_resource_count(struct platform_device *pdev, 230 unsigned int type) 231 { 232 unsigned int count; 233 int i; 234 235 for (i = 0, count = 0; i < pdev->num_resources; i++) { 236 struct resource *res = &pdev->resource[i]; 237 238 if (type == resource_type(res)) 239 count++; 240 } 241 242 return count; 243 } 244 245 static struct platform_device *xgbe_get_phy_pdev(struct xgbe_prv_data *pdata) 246 { 247 struct platform_device *phy_pdev; 248 249 if (pdata->use_acpi) { 250 get_device(pdata->dev); 251 phy_pdev = pdata->platdev; 252 } else { 253 phy_pdev = xgbe_of_get_phy_pdev(pdata); 254 } 255 256 return phy_pdev; 257 } 258 259 static int xgbe_platform_probe(struct platform_device *pdev) 260 { 261 struct xgbe_prv_data *pdata; 262 struct device *dev = &pdev->dev; 263 struct platform_device *phy_pdev; 264 const char *phy_mode; 265 unsigned int phy_memnum, phy_irqnum; 266 unsigned int dma_irqnum, dma_irqend; 267 enum dev_dma_attr attr; 268 int ret; 269 270 pdata = xgbe_alloc_pdata(dev); 271 if (IS_ERR(pdata)) { 272 ret = PTR_ERR(pdata); 273 goto err_alloc; 274 } 275 276 pdata->platdev = pdev; 277 pdata->adev = ACPI_COMPANION(dev); 278 platform_set_drvdata(pdev, pdata); 279 280 /* Check if we should use ACPI or DT */ 281 pdata->use_acpi = dev->of_node ? 0 : 1; 282 283 /* Get the version data */ 284 pdata->vdata = (struct xgbe_version_data *)device_get_match_data(dev); 285 286 phy_pdev = xgbe_get_phy_pdev(pdata); 287 if (!phy_pdev) { 288 dev_err(dev, "unable to obtain phy device\n"); 289 ret = -EINVAL; 290 goto err_phydev; 291 } 292 pdata->phy_platdev = phy_pdev; 293 pdata->phy_dev = &phy_pdev->dev; 294 295 if (pdev == phy_pdev) { 296 /* New style device tree or ACPI: 297 * The XGBE and PHY resources are grouped together with 298 * the PHY resources listed last 299 */ 300 phy_memnum = xgbe_resource_count(pdev, IORESOURCE_MEM) - 3; 301 phy_irqnum = platform_irq_count(pdev) - 1; 302 dma_irqnum = 1; 303 dma_irqend = phy_irqnum; 304 } else { 305 /* Old style device tree: 306 * The XGBE and PHY resources are separate 307 */ 308 phy_memnum = 0; 309 phy_irqnum = 0; 310 dma_irqnum = 1; 311 dma_irqend = platform_irq_count(pdev); 312 } 313 314 /* Obtain the mmio areas for the device */ 315 pdata->xgmac_regs = devm_platform_ioremap_resource(pdev, 0); 316 if (IS_ERR(pdata->xgmac_regs)) { 317 dev_err(dev, "xgmac ioremap failed\n"); 318 ret = PTR_ERR(pdata->xgmac_regs); 319 goto err_io; 320 } 321 if (netif_msg_probe(pdata)) 322 dev_dbg(dev, "xgmac_regs = %p\n", pdata->xgmac_regs); 323 324 pdata->xpcs_regs = devm_platform_ioremap_resource(pdev, 1); 325 if (IS_ERR(pdata->xpcs_regs)) { 326 dev_err(dev, "xpcs ioremap failed\n"); 327 ret = PTR_ERR(pdata->xpcs_regs); 328 goto err_io; 329 } 330 if (netif_msg_probe(pdata)) 331 dev_dbg(dev, "xpcs_regs = %p\n", pdata->xpcs_regs); 332 333 pdata->rxtx_regs = devm_platform_ioremap_resource(phy_pdev, 334 phy_memnum++); 335 if (IS_ERR(pdata->rxtx_regs)) { 336 dev_err(dev, "rxtx ioremap failed\n"); 337 ret = PTR_ERR(pdata->rxtx_regs); 338 goto err_io; 339 } 340 if (netif_msg_probe(pdata)) 341 dev_dbg(dev, "rxtx_regs = %p\n", pdata->rxtx_regs); 342 343 pdata->sir0_regs = devm_platform_ioremap_resource(phy_pdev, 344 phy_memnum++); 345 if (IS_ERR(pdata->sir0_regs)) { 346 dev_err(dev, "sir0 ioremap failed\n"); 347 ret = PTR_ERR(pdata->sir0_regs); 348 goto err_io; 349 } 350 if (netif_msg_probe(pdata)) 351 dev_dbg(dev, "sir0_regs = %p\n", pdata->sir0_regs); 352 353 pdata->sir1_regs = devm_platform_ioremap_resource(phy_pdev, 354 phy_memnum++); 355 if (IS_ERR(pdata->sir1_regs)) { 356 dev_err(dev, "sir1 ioremap failed\n"); 357 ret = PTR_ERR(pdata->sir1_regs); 358 goto err_io; 359 } 360 if (netif_msg_probe(pdata)) 361 dev_dbg(dev, "sir1_regs = %p\n", pdata->sir1_regs); 362 363 /* Retrieve the MAC address */ 364 ret = device_property_read_u8_array(dev, XGBE_MAC_ADDR_PROPERTY, 365 pdata->mac_addr, 366 sizeof(pdata->mac_addr)); 367 if (ret || !is_valid_ether_addr(pdata->mac_addr)) { 368 dev_err(dev, "invalid %s property\n", XGBE_MAC_ADDR_PROPERTY); 369 if (!ret) 370 ret = -EINVAL; 371 goto err_io; 372 } 373 374 /* Retrieve the PHY mode - it must be "xgmii" */ 375 ret = device_property_read_string(dev, XGBE_PHY_MODE_PROPERTY, 376 &phy_mode); 377 if (ret || strcmp(phy_mode, phy_modes(PHY_INTERFACE_MODE_XGMII))) { 378 dev_err(dev, "invalid %s property\n", XGBE_PHY_MODE_PROPERTY); 379 if (!ret) 380 ret = -EINVAL; 381 goto err_io; 382 } 383 pdata->phy_mode = PHY_INTERFACE_MODE_XGMII; 384 385 /* Check for per channel interrupt support */ 386 if (device_property_present(dev, XGBE_DMA_IRQS_PROPERTY)) { 387 pdata->per_channel_irq = 1; 388 pdata->channel_irq_mode = XGBE_IRQ_MODE_EDGE; 389 } 390 391 /* Obtain device settings unique to ACPI/OF */ 392 if (pdata->use_acpi) 393 ret = xgbe_acpi_support(pdata); 394 else 395 ret = xgbe_of_support(pdata); 396 if (ret) 397 goto err_io; 398 399 /* Set the DMA coherency values */ 400 attr = device_get_dma_attr(dev); 401 if (attr == DEV_DMA_NOT_SUPPORTED) { 402 dev_err(dev, "DMA is not supported"); 403 ret = -ENODEV; 404 goto err_io; 405 } 406 pdata->coherent = (attr == DEV_DMA_COHERENT); 407 if (pdata->coherent) { 408 pdata->arcr = XGBE_DMA_OS_ARCR; 409 pdata->awcr = XGBE_DMA_OS_AWCR; 410 } else { 411 pdata->arcr = XGBE_DMA_SYS_ARCR; 412 pdata->awcr = XGBE_DMA_SYS_AWCR; 413 } 414 415 /* Set the maximum fifo amounts */ 416 pdata->tx_max_fifo_size = pdata->vdata->tx_max_fifo_size; 417 pdata->rx_max_fifo_size = pdata->vdata->rx_max_fifo_size; 418 419 /* Set the hardware channel and queue counts */ 420 xgbe_set_counts(pdata); 421 422 /* Always have XGMAC and XPCS (auto-negotiation) interrupts */ 423 pdata->irq_count = 2; 424 425 /* Get the device interrupt */ 426 ret = platform_get_irq(pdev, 0); 427 if (ret < 0) 428 goto err_io; 429 pdata->dev_irq = ret; 430 431 /* Get the per channel DMA interrupts */ 432 if (pdata->per_channel_irq) { 433 unsigned int i, max = ARRAY_SIZE(pdata->channel_irq); 434 435 for (i = 0; (i < max) && (dma_irqnum < dma_irqend); i++) { 436 ret = platform_get_irq(pdata->platdev, dma_irqnum++); 437 if (ret < 0) 438 goto err_io; 439 440 pdata->channel_irq[i] = ret; 441 } 442 443 pdata->channel_irq_count = max; 444 445 pdata->irq_count += max; 446 } 447 448 /* Get the auto-negotiation interrupt */ 449 ret = platform_get_irq(phy_pdev, phy_irqnum++); 450 if (ret < 0) 451 goto err_io; 452 pdata->an_irq = ret; 453 454 /* Configure the netdev resource */ 455 ret = xgbe_config_netdev(pdata); 456 if (ret) 457 goto err_io; 458 459 netdev_notice(pdata->netdev, "net device enabled\n"); 460 461 return 0; 462 463 err_io: 464 platform_device_put(phy_pdev); 465 466 err_phydev: 467 xgbe_free_pdata(pdata); 468 469 err_alloc: 470 dev_notice(dev, "net device not enabled\n"); 471 472 return ret; 473 } 474 475 static void xgbe_platform_remove(struct platform_device *pdev) 476 { 477 struct xgbe_prv_data *pdata = platform_get_drvdata(pdev); 478 479 xgbe_deconfig_netdev(pdata); 480 481 platform_device_put(pdata->phy_platdev); 482 483 xgbe_free_pdata(pdata); 484 } 485 486 #ifdef CONFIG_PM_SLEEP 487 static int xgbe_platform_suspend(struct device *dev) 488 { 489 struct xgbe_prv_data *pdata = dev_get_drvdata(dev); 490 struct net_device *netdev = pdata->netdev; 491 int ret = 0; 492 493 DBGPR("-->xgbe_suspend\n"); 494 495 if (netif_running(netdev)) 496 ret = xgbe_powerdown(netdev, XGMAC_DRIVER_CONTEXT); 497 498 pdata->lpm_ctrl = XMDIO_READ(pdata, MDIO_MMD_PCS, MDIO_CTRL1); 499 pdata->lpm_ctrl |= MDIO_CTRL1_LPOWER; 500 XMDIO_WRITE(pdata, MDIO_MMD_PCS, MDIO_CTRL1, pdata->lpm_ctrl); 501 502 DBGPR("<--xgbe_suspend\n"); 503 504 return ret; 505 } 506 507 static int xgbe_platform_resume(struct device *dev) 508 { 509 struct xgbe_prv_data *pdata = dev_get_drvdata(dev); 510 struct net_device *netdev = pdata->netdev; 511 int ret = 0; 512 513 DBGPR("-->xgbe_resume\n"); 514 515 pdata->lpm_ctrl &= ~MDIO_CTRL1_LPOWER; 516 XMDIO_WRITE(pdata, MDIO_MMD_PCS, MDIO_CTRL1, pdata->lpm_ctrl); 517 518 if (netif_running(netdev)) { 519 ret = xgbe_powerup(netdev, XGMAC_DRIVER_CONTEXT); 520 521 /* Schedule a restart in case the link or phy state changed 522 * while we were powered down. 523 */ 524 schedule_work(&pdata->restart_work); 525 } 526 527 DBGPR("<--xgbe_resume\n"); 528 529 return ret; 530 } 531 #endif /* CONFIG_PM_SLEEP */ 532 533 static const struct xgbe_version_data xgbe_v1 = { 534 .init_function_ptrs_phy_impl = xgbe_init_function_ptrs_phy_v1, 535 .xpcs_access = XGBE_XPCS_ACCESS_V1, 536 .tx_max_fifo_size = 81920, 537 .rx_max_fifo_size = 81920, 538 .tx_tstamp_workaround = 1, 539 }; 540 541 static const struct acpi_device_id xgbe_acpi_match[] = { 542 { .id = "AMDI8001", 543 .driver_data = (kernel_ulong_t)&xgbe_v1 }, 544 {}, 545 }; 546 547 MODULE_DEVICE_TABLE(acpi, xgbe_acpi_match); 548 549 static const struct of_device_id xgbe_of_match[] = { 550 { .compatible = "amd,xgbe-seattle-v1a", 551 .data = &xgbe_v1 }, 552 {}, 553 }; 554 555 MODULE_DEVICE_TABLE(of, xgbe_of_match); 556 557 static SIMPLE_DEV_PM_OPS(xgbe_platform_pm_ops, 558 xgbe_platform_suspend, xgbe_platform_resume); 559 560 static struct platform_driver xgbe_driver = { 561 .driver = { 562 .name = XGBE_DRV_NAME, 563 .acpi_match_table = xgbe_acpi_match, 564 .of_match_table = xgbe_of_match, 565 .pm = &xgbe_platform_pm_ops, 566 }, 567 .probe = xgbe_platform_probe, 568 .remove_new = xgbe_platform_remove, 569 }; 570 571 int xgbe_platform_init(void) 572 { 573 return platform_driver_register(&xgbe_driver); 574 } 575 576 void xgbe_platform_exit(void) 577 { 578 platform_driver_unregister(&xgbe_driver); 579 } 580