1 /* 2 * AMD 10Gb Ethernet driver 3 * 4 * This file is available to you under your choice of the following two 5 * licenses: 6 * 7 * License 1: GPLv2 8 * 9 * Copyright (c) 2014 Advanced Micro Devices, Inc. 10 * 11 * This file is free software; you may copy, redistribute and/or modify 12 * it under the terms of the GNU General Public License as published by 13 * the Free Software Foundation, either version 2 of the License, or (at 14 * your option) any later version. 15 * 16 * This file is distributed in the hope that it will be useful, but 17 * WITHOUT ANY WARRANTY; without even the implied warranty of 18 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU 19 * General Public License for more details. 20 * 21 * You should have received a copy of the GNU General Public License 22 * along with this program. If not, see <http://www.gnu.org/licenses/>. 23 * 24 * This file incorporates work covered by the following copyright and 25 * permission notice: 26 * The Synopsys DWC ETHER XGMAC Software Driver and documentation 27 * (hereinafter "Software") is an unsupported proprietary work of Synopsys, 28 * Inc. unless otherwise expressly agreed to in writing between Synopsys 29 * and you. 30 * 31 * The Software IS NOT an item of Licensed Software or Licensed Product 32 * under any End User Software License Agreement or Agreement for Licensed 33 * Product with Synopsys or any supplement thereto. Permission is hereby 34 * granted, free of charge, to any person obtaining a copy of this software 35 * annotated with this license and the Software, to deal in the Software 36 * without restriction, including without limitation the rights to use, 37 * copy, modify, merge, publish, distribute, sublicense, and/or sell copies 38 * of the Software, and to permit persons to whom the Software is furnished 39 * to do so, subject to the following conditions: 40 * 41 * The above copyright notice and this permission notice shall be included 42 * in all copies or substantial portions of the Software. 43 * 44 * THIS SOFTWARE IS BEING DISTRIBUTED BY SYNOPSYS SOLELY ON AN "AS IS" 45 * BASIS AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 46 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A 47 * PARTICULAR PURPOSE ARE HEREBY DISCLAIMED. IN NO EVENT SHALL SYNOPSYS 48 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 49 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 50 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 51 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 52 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 53 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF 54 * THE POSSIBILITY OF SUCH DAMAGE. 55 * 56 * 57 * License 2: Modified BSD 58 * 59 * Copyright (c) 2014 Advanced Micro Devices, Inc. 60 * All rights reserved. 61 * 62 * Redistribution and use in source and binary forms, with or without 63 * modification, are permitted provided that the following conditions are met: 64 * * Redistributions of source code must retain the above copyright 65 * notice, this list of conditions and the following disclaimer. 66 * * Redistributions in binary form must reproduce the above copyright 67 * notice, this list of conditions and the following disclaimer in the 68 * documentation and/or other materials provided with the distribution. 69 * * Neither the name of Advanced Micro Devices, Inc. nor the 70 * names of its contributors may be used to endorse or promote products 71 * derived from this software without specific prior written permission. 72 * 73 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" 74 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 75 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 76 * ARE DISCLAIMED. IN NO EVENT SHALL <COPYRIGHT HOLDER> BE LIABLE FOR ANY 77 * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES 78 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; 79 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND 80 * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 81 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF 82 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 83 * 84 * This file incorporates work covered by the following copyright and 85 * permission notice: 86 * The Synopsys DWC ETHER XGMAC Software Driver and documentation 87 * (hereinafter "Software") is an unsupported proprietary work of Synopsys, 88 * Inc. unless otherwise expressly agreed to in writing between Synopsys 89 * and you. 90 * 91 * The Software IS NOT an item of Licensed Software or Licensed Product 92 * under any End User Software License Agreement or Agreement for Licensed 93 * Product with Synopsys or any supplement thereto. Permission is hereby 94 * granted, free of charge, to any person obtaining a copy of this software 95 * annotated with this license and the Software, to deal in the Software 96 * without restriction, including without limitation the rights to use, 97 * copy, modify, merge, publish, distribute, sublicense, and/or sell copies 98 * of the Software, and to permit persons to whom the Software is furnished 99 * to do so, subject to the following conditions: 100 * 101 * The above copyright notice and this permission notice shall be included 102 * in all copies or substantial portions of the Software. 103 * 104 * THIS SOFTWARE IS BEING DISTRIBUTED BY SYNOPSYS SOLELY ON AN "AS IS" 105 * BASIS AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 106 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A 107 * PARTICULAR PURPOSE ARE HEREBY DISCLAIMED. IN NO EVENT SHALL SYNOPSYS 108 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 109 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 110 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 111 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 112 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 113 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF 114 * THE POSSIBILITY OF SUCH DAMAGE. 115 */ 116 117 #include "xgbe.h" 118 #include "xgbe-common.h" 119 120 static void xgbe_unmap_rdata(struct xgbe_prv_data *, struct xgbe_ring_data *); 121 122 static void xgbe_free_ring(struct xgbe_prv_data *pdata, 123 struct xgbe_ring *ring) 124 { 125 struct xgbe_ring_data *rdata; 126 unsigned int i; 127 128 if (!ring) 129 return; 130 131 if (ring->rdata) { 132 for (i = 0; i < ring->rdesc_count; i++) { 133 rdata = XGBE_GET_DESC_DATA(ring, i); 134 xgbe_unmap_rdata(pdata, rdata); 135 } 136 137 kfree(ring->rdata); 138 ring->rdata = NULL; 139 } 140 141 if (ring->rx_hdr_pa.pages) { 142 dma_unmap_page(pdata->dev, ring->rx_hdr_pa.pages_dma, 143 ring->rx_hdr_pa.pages_len, DMA_FROM_DEVICE); 144 put_page(ring->rx_hdr_pa.pages); 145 146 ring->rx_hdr_pa.pages = NULL; 147 ring->rx_hdr_pa.pages_len = 0; 148 ring->rx_hdr_pa.pages_offset = 0; 149 ring->rx_hdr_pa.pages_dma = 0; 150 } 151 152 if (ring->rx_buf_pa.pages) { 153 dma_unmap_page(pdata->dev, ring->rx_buf_pa.pages_dma, 154 ring->rx_buf_pa.pages_len, DMA_FROM_DEVICE); 155 put_page(ring->rx_buf_pa.pages); 156 157 ring->rx_buf_pa.pages = NULL; 158 ring->rx_buf_pa.pages_len = 0; 159 ring->rx_buf_pa.pages_offset = 0; 160 ring->rx_buf_pa.pages_dma = 0; 161 } 162 163 if (ring->rdesc) { 164 dma_free_coherent(pdata->dev, 165 (sizeof(struct xgbe_ring_desc) * 166 ring->rdesc_count), 167 ring->rdesc, ring->rdesc_dma); 168 ring->rdesc = NULL; 169 } 170 } 171 172 static void xgbe_free_ring_resources(struct xgbe_prv_data *pdata) 173 { 174 struct xgbe_channel *channel; 175 unsigned int i; 176 177 DBGPR("-->xgbe_free_ring_resources\n"); 178 179 channel = pdata->channel; 180 for (i = 0; i < pdata->channel_count; i++, channel++) { 181 xgbe_free_ring(pdata, channel->tx_ring); 182 xgbe_free_ring(pdata, channel->rx_ring); 183 } 184 185 DBGPR("<--xgbe_free_ring_resources\n"); 186 } 187 188 static int xgbe_init_ring(struct xgbe_prv_data *pdata, 189 struct xgbe_ring *ring, unsigned int rdesc_count) 190 { 191 DBGPR("-->xgbe_init_ring\n"); 192 193 if (!ring) 194 return 0; 195 196 /* Descriptors */ 197 ring->rdesc_count = rdesc_count; 198 ring->rdesc = dma_alloc_coherent(pdata->dev, 199 (sizeof(struct xgbe_ring_desc) * 200 rdesc_count), &ring->rdesc_dma, 201 GFP_KERNEL); 202 if (!ring->rdesc) 203 return -ENOMEM; 204 205 /* Descriptor information */ 206 ring->rdata = kcalloc(rdesc_count, sizeof(struct xgbe_ring_data), 207 GFP_KERNEL); 208 if (!ring->rdata) 209 return -ENOMEM; 210 211 netif_dbg(pdata, drv, pdata->netdev, 212 "rdesc=%p, rdesc_dma=%pad, rdata=%p\n", 213 ring->rdesc, &ring->rdesc_dma, ring->rdata); 214 215 DBGPR("<--xgbe_init_ring\n"); 216 217 return 0; 218 } 219 220 static int xgbe_alloc_ring_resources(struct xgbe_prv_data *pdata) 221 { 222 struct xgbe_channel *channel; 223 unsigned int i; 224 int ret; 225 226 DBGPR("-->xgbe_alloc_ring_resources\n"); 227 228 channel = pdata->channel; 229 for (i = 0; i < pdata->channel_count; i++, channel++) { 230 netif_dbg(pdata, drv, pdata->netdev, "%s - Tx ring:\n", 231 channel->name); 232 233 ret = xgbe_init_ring(pdata, channel->tx_ring, 234 pdata->tx_desc_count); 235 if (ret) { 236 netdev_alert(pdata->netdev, 237 "error initializing Tx ring\n"); 238 goto err_ring; 239 } 240 241 netif_dbg(pdata, drv, pdata->netdev, "%s - Rx ring:\n", 242 channel->name); 243 244 ret = xgbe_init_ring(pdata, channel->rx_ring, 245 pdata->rx_desc_count); 246 if (ret) { 247 netdev_alert(pdata->netdev, 248 "error initializing Rx ring\n"); 249 goto err_ring; 250 } 251 } 252 253 DBGPR("<--xgbe_alloc_ring_resources\n"); 254 255 return 0; 256 257 err_ring: 258 xgbe_free_ring_resources(pdata); 259 260 return ret; 261 } 262 263 static int xgbe_alloc_pages(struct xgbe_prv_data *pdata, 264 struct xgbe_page_alloc *pa, gfp_t gfp, int order) 265 { 266 struct page *pages = NULL; 267 dma_addr_t pages_dma; 268 int ret; 269 270 /* Try to obtain pages, decreasing order if necessary */ 271 gfp |= __GFP_COLD | __GFP_COMP | __GFP_NOWARN; 272 while (order >= 0) { 273 pages = alloc_pages(gfp, order); 274 if (pages) 275 break; 276 277 order--; 278 } 279 if (!pages) 280 return -ENOMEM; 281 282 /* Map the pages */ 283 pages_dma = dma_map_page(pdata->dev, pages, 0, 284 PAGE_SIZE << order, DMA_FROM_DEVICE); 285 ret = dma_mapping_error(pdata->dev, pages_dma); 286 if (ret) { 287 put_page(pages); 288 return ret; 289 } 290 291 pa->pages = pages; 292 pa->pages_len = PAGE_SIZE << order; 293 pa->pages_offset = 0; 294 pa->pages_dma = pages_dma; 295 296 return 0; 297 } 298 299 static void xgbe_set_buffer_data(struct xgbe_buffer_data *bd, 300 struct xgbe_page_alloc *pa, 301 unsigned int len) 302 { 303 get_page(pa->pages); 304 bd->pa = *pa; 305 306 bd->dma = pa->pages_dma + pa->pages_offset; 307 bd->dma_len = len; 308 309 pa->pages_offset += len; 310 if ((pa->pages_offset + len) > pa->pages_len) { 311 /* This data descriptor is responsible for unmapping page(s) */ 312 bd->pa_unmap = *pa; 313 314 /* Get a new allocation next time */ 315 pa->pages = NULL; 316 pa->pages_len = 0; 317 pa->pages_offset = 0; 318 pa->pages_dma = 0; 319 } 320 } 321 322 static int xgbe_map_rx_buffer(struct xgbe_prv_data *pdata, 323 struct xgbe_ring *ring, 324 struct xgbe_ring_data *rdata) 325 { 326 int order, ret; 327 328 if (!ring->rx_hdr_pa.pages) { 329 ret = xgbe_alloc_pages(pdata, &ring->rx_hdr_pa, GFP_ATOMIC, 0); 330 if (ret) 331 return ret; 332 } 333 334 if (!ring->rx_buf_pa.pages) { 335 order = max_t(int, PAGE_ALLOC_COSTLY_ORDER - 1, 0); 336 ret = xgbe_alloc_pages(pdata, &ring->rx_buf_pa, GFP_ATOMIC, 337 order); 338 if (ret) 339 return ret; 340 } 341 342 /* Set up the header page info */ 343 xgbe_set_buffer_data(&rdata->rx.hdr, &ring->rx_hdr_pa, 344 XGBE_SKB_ALLOC_SIZE); 345 346 /* Set up the buffer page info */ 347 xgbe_set_buffer_data(&rdata->rx.buf, &ring->rx_buf_pa, 348 pdata->rx_buf_size); 349 350 return 0; 351 } 352 353 static void xgbe_wrapper_tx_descriptor_init(struct xgbe_prv_data *pdata) 354 { 355 struct xgbe_hw_if *hw_if = &pdata->hw_if; 356 struct xgbe_channel *channel; 357 struct xgbe_ring *ring; 358 struct xgbe_ring_data *rdata; 359 struct xgbe_ring_desc *rdesc; 360 dma_addr_t rdesc_dma; 361 unsigned int i, j; 362 363 DBGPR("-->xgbe_wrapper_tx_descriptor_init\n"); 364 365 channel = pdata->channel; 366 for (i = 0; i < pdata->channel_count; i++, channel++) { 367 ring = channel->tx_ring; 368 if (!ring) 369 break; 370 371 rdesc = ring->rdesc; 372 rdesc_dma = ring->rdesc_dma; 373 374 for (j = 0; j < ring->rdesc_count; j++) { 375 rdata = XGBE_GET_DESC_DATA(ring, j); 376 377 rdata->rdesc = rdesc; 378 rdata->rdesc_dma = rdesc_dma; 379 380 rdesc++; 381 rdesc_dma += sizeof(struct xgbe_ring_desc); 382 } 383 384 ring->cur = 0; 385 ring->dirty = 0; 386 memset(&ring->tx, 0, sizeof(ring->tx)); 387 388 hw_if->tx_desc_init(channel); 389 } 390 391 DBGPR("<--xgbe_wrapper_tx_descriptor_init\n"); 392 } 393 394 static void xgbe_wrapper_rx_descriptor_init(struct xgbe_prv_data *pdata) 395 { 396 struct xgbe_hw_if *hw_if = &pdata->hw_if; 397 struct xgbe_channel *channel; 398 struct xgbe_ring *ring; 399 struct xgbe_ring_desc *rdesc; 400 struct xgbe_ring_data *rdata; 401 dma_addr_t rdesc_dma; 402 unsigned int i, j; 403 404 DBGPR("-->xgbe_wrapper_rx_descriptor_init\n"); 405 406 channel = pdata->channel; 407 for (i = 0; i < pdata->channel_count; i++, channel++) { 408 ring = channel->rx_ring; 409 if (!ring) 410 break; 411 412 rdesc = ring->rdesc; 413 rdesc_dma = ring->rdesc_dma; 414 415 for (j = 0; j < ring->rdesc_count; j++) { 416 rdata = XGBE_GET_DESC_DATA(ring, j); 417 418 rdata->rdesc = rdesc; 419 rdata->rdesc_dma = rdesc_dma; 420 421 if (xgbe_map_rx_buffer(pdata, ring, rdata)) 422 break; 423 424 rdesc++; 425 rdesc_dma += sizeof(struct xgbe_ring_desc); 426 } 427 428 ring->cur = 0; 429 ring->dirty = 0; 430 431 hw_if->rx_desc_init(channel); 432 } 433 434 DBGPR("<--xgbe_wrapper_rx_descriptor_init\n"); 435 } 436 437 static void xgbe_unmap_rdata(struct xgbe_prv_data *pdata, 438 struct xgbe_ring_data *rdata) 439 { 440 if (rdata->skb_dma) { 441 if (rdata->mapped_as_page) { 442 dma_unmap_page(pdata->dev, rdata->skb_dma, 443 rdata->skb_dma_len, DMA_TO_DEVICE); 444 } else { 445 dma_unmap_single(pdata->dev, rdata->skb_dma, 446 rdata->skb_dma_len, DMA_TO_DEVICE); 447 } 448 rdata->skb_dma = 0; 449 rdata->skb_dma_len = 0; 450 } 451 452 if (rdata->skb) { 453 dev_kfree_skb_any(rdata->skb); 454 rdata->skb = NULL; 455 } 456 457 if (rdata->rx.hdr.pa.pages) 458 put_page(rdata->rx.hdr.pa.pages); 459 460 if (rdata->rx.hdr.pa_unmap.pages) { 461 dma_unmap_page(pdata->dev, rdata->rx.hdr.pa_unmap.pages_dma, 462 rdata->rx.hdr.pa_unmap.pages_len, 463 DMA_FROM_DEVICE); 464 put_page(rdata->rx.hdr.pa_unmap.pages); 465 } 466 467 if (rdata->rx.buf.pa.pages) 468 put_page(rdata->rx.buf.pa.pages); 469 470 if (rdata->rx.buf.pa_unmap.pages) { 471 dma_unmap_page(pdata->dev, rdata->rx.buf.pa_unmap.pages_dma, 472 rdata->rx.buf.pa_unmap.pages_len, 473 DMA_FROM_DEVICE); 474 put_page(rdata->rx.buf.pa_unmap.pages); 475 } 476 477 memset(&rdata->tx, 0, sizeof(rdata->tx)); 478 memset(&rdata->rx, 0, sizeof(rdata->rx)); 479 480 rdata->mapped_as_page = 0; 481 482 if (rdata->state_saved) { 483 rdata->state_saved = 0; 484 rdata->state.skb = NULL; 485 rdata->state.len = 0; 486 rdata->state.error = 0; 487 } 488 } 489 490 static int xgbe_map_tx_skb(struct xgbe_channel *channel, struct sk_buff *skb) 491 { 492 struct xgbe_prv_data *pdata = channel->pdata; 493 struct xgbe_ring *ring = channel->tx_ring; 494 struct xgbe_ring_data *rdata; 495 struct xgbe_packet_data *packet; 496 struct skb_frag_struct *frag; 497 dma_addr_t skb_dma; 498 unsigned int start_index, cur_index; 499 unsigned int offset, tso, vlan, datalen, len; 500 unsigned int i; 501 502 DBGPR("-->xgbe_map_tx_skb: cur = %d\n", ring->cur); 503 504 offset = 0; 505 start_index = ring->cur; 506 cur_index = ring->cur; 507 508 packet = &ring->packet_data; 509 packet->rdesc_count = 0; 510 packet->length = 0; 511 512 tso = XGMAC_GET_BITS(packet->attributes, TX_PACKET_ATTRIBUTES, 513 TSO_ENABLE); 514 vlan = XGMAC_GET_BITS(packet->attributes, TX_PACKET_ATTRIBUTES, 515 VLAN_CTAG); 516 517 /* Save space for a context descriptor if needed */ 518 if ((tso && (packet->mss != ring->tx.cur_mss)) || 519 (vlan && (packet->vlan_ctag != ring->tx.cur_vlan_ctag))) 520 cur_index++; 521 rdata = XGBE_GET_DESC_DATA(ring, cur_index); 522 523 if (tso) { 524 /* Map the TSO header */ 525 skb_dma = dma_map_single(pdata->dev, skb->data, 526 packet->header_len, DMA_TO_DEVICE); 527 if (dma_mapping_error(pdata->dev, skb_dma)) { 528 netdev_alert(pdata->netdev, "dma_map_single failed\n"); 529 goto err_out; 530 } 531 rdata->skb_dma = skb_dma; 532 rdata->skb_dma_len = packet->header_len; 533 netif_dbg(pdata, tx_queued, pdata->netdev, 534 "skb header: index=%u, dma=%pad, len=%u\n", 535 cur_index, &skb_dma, packet->header_len); 536 537 offset = packet->header_len; 538 539 packet->length += packet->header_len; 540 541 cur_index++; 542 rdata = XGBE_GET_DESC_DATA(ring, cur_index); 543 } 544 545 /* Map the (remainder of the) packet */ 546 for (datalen = skb_headlen(skb) - offset; datalen; ) { 547 len = min_t(unsigned int, datalen, XGBE_TX_MAX_BUF_SIZE); 548 549 skb_dma = dma_map_single(pdata->dev, skb->data + offset, len, 550 DMA_TO_DEVICE); 551 if (dma_mapping_error(pdata->dev, skb_dma)) { 552 netdev_alert(pdata->netdev, "dma_map_single failed\n"); 553 goto err_out; 554 } 555 rdata->skb_dma = skb_dma; 556 rdata->skb_dma_len = len; 557 netif_dbg(pdata, tx_queued, pdata->netdev, 558 "skb data: index=%u, dma=%pad, len=%u\n", 559 cur_index, &skb_dma, len); 560 561 datalen -= len; 562 offset += len; 563 564 packet->length += len; 565 566 cur_index++; 567 rdata = XGBE_GET_DESC_DATA(ring, cur_index); 568 } 569 570 for (i = 0; i < skb_shinfo(skb)->nr_frags; i++) { 571 netif_dbg(pdata, tx_queued, pdata->netdev, 572 "mapping frag %u\n", i); 573 574 frag = &skb_shinfo(skb)->frags[i]; 575 offset = 0; 576 577 for (datalen = skb_frag_size(frag); datalen; ) { 578 len = min_t(unsigned int, datalen, 579 XGBE_TX_MAX_BUF_SIZE); 580 581 skb_dma = skb_frag_dma_map(pdata->dev, frag, offset, 582 len, DMA_TO_DEVICE); 583 if (dma_mapping_error(pdata->dev, skb_dma)) { 584 netdev_alert(pdata->netdev, 585 "skb_frag_dma_map failed\n"); 586 goto err_out; 587 } 588 rdata->skb_dma = skb_dma; 589 rdata->skb_dma_len = len; 590 rdata->mapped_as_page = 1; 591 netif_dbg(pdata, tx_queued, pdata->netdev, 592 "skb frag: index=%u, dma=%pad, len=%u\n", 593 cur_index, &skb_dma, len); 594 595 datalen -= len; 596 offset += len; 597 598 packet->length += len; 599 600 cur_index++; 601 rdata = XGBE_GET_DESC_DATA(ring, cur_index); 602 } 603 } 604 605 /* Save the skb address in the last entry. We always have some data 606 * that has been mapped so rdata is always advanced past the last 607 * piece of mapped data - use the entry pointed to by cur_index - 1. 608 */ 609 rdata = XGBE_GET_DESC_DATA(ring, cur_index - 1); 610 rdata->skb = skb; 611 612 /* Save the number of descriptor entries used */ 613 packet->rdesc_count = cur_index - start_index; 614 615 DBGPR("<--xgbe_map_tx_skb: count=%u\n", packet->rdesc_count); 616 617 return packet->rdesc_count; 618 619 err_out: 620 while (start_index < cur_index) { 621 rdata = XGBE_GET_DESC_DATA(ring, start_index++); 622 xgbe_unmap_rdata(pdata, rdata); 623 } 624 625 DBGPR("<--xgbe_map_tx_skb: count=0\n"); 626 627 return 0; 628 } 629 630 void xgbe_init_function_ptrs_desc(struct xgbe_desc_if *desc_if) 631 { 632 DBGPR("-->xgbe_init_function_ptrs_desc\n"); 633 634 desc_if->alloc_ring_resources = xgbe_alloc_ring_resources; 635 desc_if->free_ring_resources = xgbe_free_ring_resources; 636 desc_if->map_tx_skb = xgbe_map_tx_skb; 637 desc_if->map_rx_buffer = xgbe_map_rx_buffer; 638 desc_if->unmap_rdata = xgbe_unmap_rdata; 639 desc_if->wrapper_tx_desc_init = xgbe_wrapper_tx_descriptor_init; 640 desc_if->wrapper_rx_desc_init = xgbe_wrapper_rx_descriptor_init; 641 642 DBGPR("<--xgbe_init_function_ptrs_desc\n"); 643 } 644