1 /* 2 * Lance ethernet driver for the MIPS processor based 3 * DECstation family 4 * 5 * 6 * adopted from sunlance.c by Richard van den Berg 7 * 8 * Copyright (C) 2002, 2003, 2005, 2006 Maciej W. Rozycki 9 * 10 * additional sources: 11 * - PMAD-AA TURBOchannel Ethernet Module Functional Specification, 12 * Revision 1.2 13 * 14 * History: 15 * 16 * v0.001: The kernel accepts the code and it shows the hardware address. 17 * 18 * v0.002: Removed most sparc stuff, left only some module and dma stuff. 19 * 20 * v0.003: Enhanced base address calculation from proposals by 21 * Harald Koerfgen and Thomas Riemer. 22 * 23 * v0.004: lance-regs is pointing at the right addresses, added prom 24 * check. First start of address mapping and DMA. 25 * 26 * v0.005: started to play around with LANCE-DMA. This driver will not 27 * work for non IOASIC lances. HK 28 * 29 * v0.006: added pointer arrays to lance_private and setup routine for 30 * them in dec_lance_init. HK 31 * 32 * v0.007: Big shit. The LANCE seems to use a different DMA mechanism to 33 * access the init block. This looks like one (short) word at a 34 * time, but the smallest amount the IOASIC can transfer is a 35 * (long) word. So we have a 2-2 padding here. Changed 36 * lance_init_block accordingly. The 16-16 padding for the buffers 37 * seems to be correct. HK 38 * 39 * v0.008: mods to make PMAX_LANCE work. 01/09/1999 triemer 40 * 41 * v0.009: Module support fixes, multiple interfaces support, various 42 * bits. macro 43 * 44 * v0.010: Fixes for the PMAD mapping of the LANCE buffer and for the 45 * PMAX requirement to only use halfword accesses to the 46 * buffer. macro 47 * 48 * v0.011: Converted the PMAD to the driver model. macro 49 */ 50 51 #include <linux/crc32.h> 52 #include <linux/delay.h> 53 #include <linux/errno.h> 54 #include <linux/if_ether.h> 55 #include <linux/init.h> 56 #include <linux/kernel.h> 57 #include <linux/module.h> 58 #include <linux/netdevice.h> 59 #include <linux/etherdevice.h> 60 #include <linux/spinlock.h> 61 #include <linux/stddef.h> 62 #include <linux/string.h> 63 #include <linux/tc.h> 64 #include <linux/types.h> 65 66 #include <asm/addrspace.h> 67 #include <asm/system.h> 68 69 #include <asm/dec/interrupts.h> 70 #include <asm/dec/ioasic.h> 71 #include <asm/dec/ioasic_addrs.h> 72 #include <asm/dec/kn01.h> 73 #include <asm/dec/machtype.h> 74 #include <asm/dec/system.h> 75 76 static char version[] __devinitdata = 77 "declance.c: v0.011 by Linux MIPS DECstation task force\n"; 78 79 MODULE_AUTHOR("Linux MIPS DECstation task force"); 80 MODULE_DESCRIPTION("DEC LANCE (DECstation onboard, PMAD-xx) driver"); 81 MODULE_LICENSE("GPL"); 82 83 #define __unused __attribute__ ((unused)) 84 85 /* 86 * card types 87 */ 88 #define ASIC_LANCE 1 89 #define PMAD_LANCE 2 90 #define PMAX_LANCE 3 91 92 93 #define LE_CSR0 0 94 #define LE_CSR1 1 95 #define LE_CSR2 2 96 #define LE_CSR3 3 97 98 #define LE_MO_PROM 0x8000 /* Enable promiscuous mode */ 99 100 #define LE_C0_ERR 0x8000 /* Error: set if BAB, SQE, MISS or ME is set */ 101 #define LE_C0_BABL 0x4000 /* BAB: Babble: tx timeout. */ 102 #define LE_C0_CERR 0x2000 /* SQE: Signal quality error */ 103 #define LE_C0_MISS 0x1000 /* MISS: Missed a packet */ 104 #define LE_C0_MERR 0x0800 /* ME: Memory error */ 105 #define LE_C0_RINT 0x0400 /* Received interrupt */ 106 #define LE_C0_TINT 0x0200 /* Transmitter Interrupt */ 107 #define LE_C0_IDON 0x0100 /* IFIN: Init finished. */ 108 #define LE_C0_INTR 0x0080 /* Interrupt or error */ 109 #define LE_C0_INEA 0x0040 /* Interrupt enable */ 110 #define LE_C0_RXON 0x0020 /* Receiver on */ 111 #define LE_C0_TXON 0x0010 /* Transmitter on */ 112 #define LE_C0_TDMD 0x0008 /* Transmitter demand */ 113 #define LE_C0_STOP 0x0004 /* Stop the card */ 114 #define LE_C0_STRT 0x0002 /* Start the card */ 115 #define LE_C0_INIT 0x0001 /* Init the card */ 116 117 #define LE_C3_BSWP 0x4 /* SWAP */ 118 #define LE_C3_ACON 0x2 /* ALE Control */ 119 #define LE_C3_BCON 0x1 /* Byte control */ 120 121 /* Receive message descriptor 1 */ 122 #define LE_R1_OWN 0x8000 /* Who owns the entry */ 123 #define LE_R1_ERR 0x4000 /* Error: if FRA, OFL, CRC or BUF is set */ 124 #define LE_R1_FRA 0x2000 /* FRA: Frame error */ 125 #define LE_R1_OFL 0x1000 /* OFL: Frame overflow */ 126 #define LE_R1_CRC 0x0800 /* CRC error */ 127 #define LE_R1_BUF 0x0400 /* BUF: Buffer error */ 128 #define LE_R1_SOP 0x0200 /* Start of packet */ 129 #define LE_R1_EOP 0x0100 /* End of packet */ 130 #define LE_R1_POK 0x0300 /* Packet is complete: SOP + EOP */ 131 132 /* Transmit message descriptor 1 */ 133 #define LE_T1_OWN 0x8000 /* Lance owns the packet */ 134 #define LE_T1_ERR 0x4000 /* Error summary */ 135 #define LE_T1_EMORE 0x1000 /* Error: more than one retry needed */ 136 #define LE_T1_EONE 0x0800 /* Error: one retry needed */ 137 #define LE_T1_EDEF 0x0400 /* Error: deferred */ 138 #define LE_T1_SOP 0x0200 /* Start of packet */ 139 #define LE_T1_EOP 0x0100 /* End of packet */ 140 #define LE_T1_POK 0x0300 /* Packet is complete: SOP + EOP */ 141 142 #define LE_T3_BUF 0x8000 /* Buffer error */ 143 #define LE_T3_UFL 0x4000 /* Error underflow */ 144 #define LE_T3_LCOL 0x1000 /* Error late collision */ 145 #define LE_T3_CLOS 0x0800 /* Error carrier loss */ 146 #define LE_T3_RTY 0x0400 /* Error retry */ 147 #define LE_T3_TDR 0x03ff /* Time Domain Reflectometry counter */ 148 149 /* Define: 2^4 Tx buffers and 2^4 Rx buffers */ 150 151 #ifndef LANCE_LOG_TX_BUFFERS 152 #define LANCE_LOG_TX_BUFFERS 4 153 #define LANCE_LOG_RX_BUFFERS 4 154 #endif 155 156 #define TX_RING_SIZE (1 << (LANCE_LOG_TX_BUFFERS)) 157 #define TX_RING_MOD_MASK (TX_RING_SIZE - 1) 158 159 #define RX_RING_SIZE (1 << (LANCE_LOG_RX_BUFFERS)) 160 #define RX_RING_MOD_MASK (RX_RING_SIZE - 1) 161 162 #define PKT_BUF_SZ 1536 163 #define RX_BUFF_SIZE PKT_BUF_SZ 164 #define TX_BUFF_SIZE PKT_BUF_SZ 165 166 #undef TEST_HITS 167 #define ZERO 0 168 169 /* 170 * The DS2100/3100 have a linear 64 kB buffer which supports halfword 171 * accesses only. Each halfword of the buffer is word-aligned in the 172 * CPU address space. 173 * 174 * The PMAD-AA has a 128 kB buffer on-board. 175 * 176 * The IOASIC LANCE devices use a shared memory region. This region 177 * as seen from the CPU is (max) 128 kB long and has to be on an 128 kB 178 * boundary. The LANCE sees this as a 64 kB long continuous memory 179 * region. 180 * 181 * The LANCE's DMA address is used as an index in this buffer and DMA 182 * takes place in bursts of eight 16-bit words which are packed into 183 * four 32-bit words by the IOASIC. This leads to a strange padding: 184 * 16 bytes of valid data followed by a 16 byte gap :-(. 185 */ 186 187 struct lance_rx_desc { 188 unsigned short rmd0; /* low address of packet */ 189 unsigned short rmd1; /* high address of packet 190 and descriptor bits */ 191 short length; /* 2s complement (negative!) 192 of buffer length */ 193 unsigned short mblength; /* actual number of bytes received */ 194 }; 195 196 struct lance_tx_desc { 197 unsigned short tmd0; /* low address of packet */ 198 unsigned short tmd1; /* high address of packet 199 and descriptor bits */ 200 short length; /* 2s complement (negative!) 201 of buffer length */ 202 unsigned short misc; 203 }; 204 205 206 /* First part of the LANCE initialization block, described in databook. */ 207 struct lance_init_block { 208 unsigned short mode; /* pre-set mode (reg. 15) */ 209 210 unsigned short phys_addr[3]; /* physical ethernet address */ 211 unsigned short filter[4]; /* multicast filter */ 212 213 /* Receive and transmit ring base, along with extra bits. */ 214 unsigned short rx_ptr; /* receive descriptor addr */ 215 unsigned short rx_len; /* receive len and high addr */ 216 unsigned short tx_ptr; /* transmit descriptor addr */ 217 unsigned short tx_len; /* transmit len and high addr */ 218 219 short gap[4]; 220 221 /* The buffer descriptors */ 222 struct lance_rx_desc brx_ring[RX_RING_SIZE]; 223 struct lance_tx_desc btx_ring[TX_RING_SIZE]; 224 }; 225 226 #define BUF_OFFSET_CPU sizeof(struct lance_init_block) 227 #define BUF_OFFSET_LNC sizeof(struct lance_init_block) 228 229 #define shift_off(off, type) \ 230 (type == ASIC_LANCE || type == PMAX_LANCE ? off << 1 : off) 231 232 #define lib_off(rt, type) \ 233 shift_off(offsetof(struct lance_init_block, rt), type) 234 235 #define lib_ptr(ib, rt, type) \ 236 ((volatile u16 *)((u8 *)(ib) + lib_off(rt, type))) 237 238 #define rds_off(rt, type) \ 239 shift_off(offsetof(struct lance_rx_desc, rt), type) 240 241 #define rds_ptr(rd, rt, type) \ 242 ((volatile u16 *)((u8 *)(rd) + rds_off(rt, type))) 243 244 #define tds_off(rt, type) \ 245 shift_off(offsetof(struct lance_tx_desc, rt), type) 246 247 #define tds_ptr(td, rt, type) \ 248 ((volatile u16 *)((u8 *)(td) + tds_off(rt, type))) 249 250 struct lance_private { 251 struct net_device *next; 252 int type; 253 int dma_irq; 254 volatile struct lance_regs *ll; 255 256 spinlock_t lock; 257 258 int rx_new, tx_new; 259 int rx_old, tx_old; 260 261 unsigned short busmaster_regval; 262 263 struct timer_list multicast_timer; 264 265 /* Pointers to the ring buffers as seen from the CPU */ 266 char *rx_buf_ptr_cpu[RX_RING_SIZE]; 267 char *tx_buf_ptr_cpu[TX_RING_SIZE]; 268 269 /* Pointers to the ring buffers as seen from the LANCE */ 270 uint rx_buf_ptr_lnc[RX_RING_SIZE]; 271 uint tx_buf_ptr_lnc[TX_RING_SIZE]; 272 }; 273 274 #define TX_BUFFS_AVAIL ((lp->tx_old<=lp->tx_new)?\ 275 lp->tx_old+TX_RING_MOD_MASK-lp->tx_new:\ 276 lp->tx_old - lp->tx_new-1) 277 278 /* The lance control ports are at an absolute address, machine and tc-slot 279 * dependent. 280 * DECstations do only 32-bit access and the LANCE uses 16 bit addresses, 281 * so we have to give the structure an extra member making rap pointing 282 * at the right address 283 */ 284 struct lance_regs { 285 volatile unsigned short rdp; /* register data port */ 286 unsigned short pad; 287 volatile unsigned short rap; /* register address port */ 288 }; 289 290 int dec_lance_debug = 2; 291 292 static struct tc_driver dec_lance_tc_driver; 293 static struct net_device *root_lance_dev; 294 295 static inline void writereg(volatile unsigned short *regptr, short value) 296 { 297 *regptr = value; 298 iob(); 299 } 300 301 /* Load the CSR registers */ 302 static void load_csrs(struct lance_private *lp) 303 { 304 volatile struct lance_regs *ll = lp->ll; 305 uint leptr; 306 307 /* The address space as seen from the LANCE 308 * begins at address 0. HK 309 */ 310 leptr = 0; 311 312 writereg(&ll->rap, LE_CSR1); 313 writereg(&ll->rdp, (leptr & 0xFFFF)); 314 writereg(&ll->rap, LE_CSR2); 315 writereg(&ll->rdp, leptr >> 16); 316 writereg(&ll->rap, LE_CSR3); 317 writereg(&ll->rdp, lp->busmaster_regval); 318 319 /* Point back to csr0 */ 320 writereg(&ll->rap, LE_CSR0); 321 } 322 323 /* 324 * Our specialized copy routines 325 * 326 */ 327 static void cp_to_buf(const int type, void *to, const void *from, int len) 328 { 329 unsigned short *tp; 330 const unsigned short *fp; 331 unsigned short clen; 332 unsigned char *rtp; 333 const unsigned char *rfp; 334 335 if (type == PMAD_LANCE) { 336 memcpy(to, from, len); 337 } else if (type == PMAX_LANCE) { 338 clen = len >> 1; 339 tp = to; 340 fp = from; 341 342 while (clen--) { 343 *tp++ = *fp++; 344 tp++; 345 } 346 347 clen = len & 1; 348 rtp = tp; 349 rfp = fp; 350 while (clen--) { 351 *rtp++ = *rfp++; 352 } 353 } else { 354 /* 355 * copy 16 Byte chunks 356 */ 357 clen = len >> 4; 358 tp = to; 359 fp = from; 360 while (clen--) { 361 *tp++ = *fp++; 362 *tp++ = *fp++; 363 *tp++ = *fp++; 364 *tp++ = *fp++; 365 *tp++ = *fp++; 366 *tp++ = *fp++; 367 *tp++ = *fp++; 368 *tp++ = *fp++; 369 tp += 8; 370 } 371 372 /* 373 * do the rest, if any. 374 */ 375 clen = len & 15; 376 rtp = (unsigned char *) tp; 377 rfp = (unsigned char *) fp; 378 while (clen--) { 379 *rtp++ = *rfp++; 380 } 381 } 382 383 iob(); 384 } 385 386 static void cp_from_buf(const int type, void *to, const void *from, int len) 387 { 388 unsigned short *tp; 389 const unsigned short *fp; 390 unsigned short clen; 391 unsigned char *rtp; 392 const unsigned char *rfp; 393 394 if (type == PMAD_LANCE) { 395 memcpy(to, from, len); 396 } else if (type == PMAX_LANCE) { 397 clen = len >> 1; 398 tp = to; 399 fp = from; 400 while (clen--) { 401 *tp++ = *fp++; 402 fp++; 403 } 404 405 clen = len & 1; 406 407 rtp = tp; 408 rfp = fp; 409 410 while (clen--) { 411 *rtp++ = *rfp++; 412 } 413 } else { 414 415 /* 416 * copy 16 Byte chunks 417 */ 418 clen = len >> 4; 419 tp = to; 420 fp = from; 421 while (clen--) { 422 *tp++ = *fp++; 423 *tp++ = *fp++; 424 *tp++ = *fp++; 425 *tp++ = *fp++; 426 *tp++ = *fp++; 427 *tp++ = *fp++; 428 *tp++ = *fp++; 429 *tp++ = *fp++; 430 fp += 8; 431 } 432 433 /* 434 * do the rest, if any. 435 */ 436 clen = len & 15; 437 rtp = (unsigned char *) tp; 438 rfp = (unsigned char *) fp; 439 while (clen--) { 440 *rtp++ = *rfp++; 441 } 442 443 444 } 445 446 } 447 448 /* Setup the Lance Rx and Tx rings */ 449 static void lance_init_ring(struct net_device *dev) 450 { 451 struct lance_private *lp = netdev_priv(dev); 452 volatile u16 *ib = (volatile u16 *)dev->mem_start; 453 uint leptr; 454 int i; 455 456 /* Lock out other processes while setting up hardware */ 457 netif_stop_queue(dev); 458 lp->rx_new = lp->tx_new = 0; 459 lp->rx_old = lp->tx_old = 0; 460 461 /* Copy the ethernet address to the lance init block. 462 * XXX bit 0 of the physical address registers has to be zero 463 */ 464 *lib_ptr(ib, phys_addr[0], lp->type) = (dev->dev_addr[1] << 8) | 465 dev->dev_addr[0]; 466 *lib_ptr(ib, phys_addr[1], lp->type) = (dev->dev_addr[3] << 8) | 467 dev->dev_addr[2]; 468 *lib_ptr(ib, phys_addr[2], lp->type) = (dev->dev_addr[5] << 8) | 469 dev->dev_addr[4]; 470 /* Setup the initialization block */ 471 472 /* Setup rx descriptor pointer */ 473 leptr = offsetof(struct lance_init_block, brx_ring); 474 *lib_ptr(ib, rx_len, lp->type) = (LANCE_LOG_RX_BUFFERS << 13) | 475 (leptr >> 16); 476 *lib_ptr(ib, rx_ptr, lp->type) = leptr; 477 if (ZERO) 478 printk("RX ptr: %8.8x(%8.8x)\n", 479 leptr, lib_off(brx_ring, lp->type)); 480 481 /* Setup tx descriptor pointer */ 482 leptr = offsetof(struct lance_init_block, btx_ring); 483 *lib_ptr(ib, tx_len, lp->type) = (LANCE_LOG_TX_BUFFERS << 13) | 484 (leptr >> 16); 485 *lib_ptr(ib, tx_ptr, lp->type) = leptr; 486 if (ZERO) 487 printk("TX ptr: %8.8x(%8.8x)\n", 488 leptr, lib_off(btx_ring, lp->type)); 489 490 if (ZERO) 491 printk("TX rings:\n"); 492 493 /* Setup the Tx ring entries */ 494 for (i = 0; i < TX_RING_SIZE; i++) { 495 leptr = lp->tx_buf_ptr_lnc[i]; 496 *lib_ptr(ib, btx_ring[i].tmd0, lp->type) = leptr; 497 *lib_ptr(ib, btx_ring[i].tmd1, lp->type) = (leptr >> 16) & 498 0xff; 499 *lib_ptr(ib, btx_ring[i].length, lp->type) = 0xf000; 500 /* The ones required by tmd2 */ 501 *lib_ptr(ib, btx_ring[i].misc, lp->type) = 0; 502 if (i < 3 && ZERO) 503 printk("%d: 0x%8.8x(0x%8.8x)\n", 504 i, leptr, (uint)lp->tx_buf_ptr_cpu[i]); 505 } 506 507 /* Setup the Rx ring entries */ 508 if (ZERO) 509 printk("RX rings:\n"); 510 for (i = 0; i < RX_RING_SIZE; i++) { 511 leptr = lp->rx_buf_ptr_lnc[i]; 512 *lib_ptr(ib, brx_ring[i].rmd0, lp->type) = leptr; 513 *lib_ptr(ib, brx_ring[i].rmd1, lp->type) = ((leptr >> 16) & 514 0xff) | 515 LE_R1_OWN; 516 *lib_ptr(ib, brx_ring[i].length, lp->type) = -RX_BUFF_SIZE | 517 0xf000; 518 *lib_ptr(ib, brx_ring[i].mblength, lp->type) = 0; 519 if (i < 3 && ZERO) 520 printk("%d: 0x%8.8x(0x%8.8x)\n", 521 i, leptr, (uint)lp->rx_buf_ptr_cpu[i]); 522 } 523 iob(); 524 } 525 526 static int init_restart_lance(struct lance_private *lp) 527 { 528 volatile struct lance_regs *ll = lp->ll; 529 int i; 530 531 writereg(&ll->rap, LE_CSR0); 532 writereg(&ll->rdp, LE_C0_INIT); 533 534 /* Wait for the lance to complete initialization */ 535 for (i = 0; (i < 100) && !(ll->rdp & LE_C0_IDON); i++) { 536 udelay(10); 537 } 538 if ((i == 100) || (ll->rdp & LE_C0_ERR)) { 539 printk("LANCE unopened after %d ticks, csr0=%4.4x.\n", 540 i, ll->rdp); 541 return -1; 542 } 543 if ((ll->rdp & LE_C0_ERR)) { 544 printk("LANCE unopened after %d ticks, csr0=%4.4x.\n", 545 i, ll->rdp); 546 return -1; 547 } 548 writereg(&ll->rdp, LE_C0_IDON); 549 writereg(&ll->rdp, LE_C0_STRT); 550 writereg(&ll->rdp, LE_C0_INEA); 551 552 return 0; 553 } 554 555 static int lance_rx(struct net_device *dev) 556 { 557 struct lance_private *lp = netdev_priv(dev); 558 volatile u16 *ib = (volatile u16 *)dev->mem_start; 559 volatile u16 *rd; 560 unsigned short bits; 561 int entry, len; 562 struct sk_buff *skb; 563 564 #ifdef TEST_HITS 565 { 566 int i; 567 568 printk("["); 569 for (i = 0; i < RX_RING_SIZE; i++) { 570 if (i == lp->rx_new) 571 printk("%s", *lib_ptr(ib, brx_ring[i].rmd1, 572 lp->type) & 573 LE_R1_OWN ? "_" : "X"); 574 else 575 printk("%s", *lib_ptr(ib, brx_ring[i].rmd1, 576 lp->type) & 577 LE_R1_OWN ? "." : "1"); 578 } 579 printk("]"); 580 } 581 #endif 582 583 for (rd = lib_ptr(ib, brx_ring[lp->rx_new], lp->type); 584 !((bits = *rds_ptr(rd, rmd1, lp->type)) & LE_R1_OWN); 585 rd = lib_ptr(ib, brx_ring[lp->rx_new], lp->type)) { 586 entry = lp->rx_new; 587 588 /* We got an incomplete frame? */ 589 if ((bits & LE_R1_POK) != LE_R1_POK) { 590 dev->stats.rx_over_errors++; 591 dev->stats.rx_errors++; 592 } else if (bits & LE_R1_ERR) { 593 /* Count only the end frame as a rx error, 594 * not the beginning 595 */ 596 if (bits & LE_R1_BUF) 597 dev->stats.rx_fifo_errors++; 598 if (bits & LE_R1_CRC) 599 dev->stats.rx_crc_errors++; 600 if (bits & LE_R1_OFL) 601 dev->stats.rx_over_errors++; 602 if (bits & LE_R1_FRA) 603 dev->stats.rx_frame_errors++; 604 if (bits & LE_R1_EOP) 605 dev->stats.rx_errors++; 606 } else { 607 len = (*rds_ptr(rd, mblength, lp->type) & 0xfff) - 4; 608 skb = dev_alloc_skb(len + 2); 609 610 if (skb == 0) { 611 printk("%s: Memory squeeze, deferring packet.\n", 612 dev->name); 613 dev->stats.rx_dropped++; 614 *rds_ptr(rd, mblength, lp->type) = 0; 615 *rds_ptr(rd, rmd1, lp->type) = 616 ((lp->rx_buf_ptr_lnc[entry] >> 16) & 617 0xff) | LE_R1_OWN; 618 lp->rx_new = (entry + 1) & RX_RING_MOD_MASK; 619 return 0; 620 } 621 dev->stats.rx_bytes += len; 622 623 skb_reserve(skb, 2); /* 16 byte align */ 624 skb_put(skb, len); /* make room */ 625 626 cp_from_buf(lp->type, skb->data, 627 (char *)lp->rx_buf_ptr_cpu[entry], len); 628 629 skb->protocol = eth_type_trans(skb, dev); 630 netif_rx(skb); 631 dev->stats.rx_packets++; 632 } 633 634 /* Return the packet to the pool */ 635 *rds_ptr(rd, mblength, lp->type) = 0; 636 *rds_ptr(rd, length, lp->type) = -RX_BUFF_SIZE | 0xf000; 637 *rds_ptr(rd, rmd1, lp->type) = 638 ((lp->rx_buf_ptr_lnc[entry] >> 16) & 0xff) | LE_R1_OWN; 639 lp->rx_new = (entry + 1) & RX_RING_MOD_MASK; 640 } 641 return 0; 642 } 643 644 static void lance_tx(struct net_device *dev) 645 { 646 struct lance_private *lp = netdev_priv(dev); 647 volatile u16 *ib = (volatile u16 *)dev->mem_start; 648 volatile struct lance_regs *ll = lp->ll; 649 volatile u16 *td; 650 int i, j; 651 int status; 652 653 j = lp->tx_old; 654 655 spin_lock(&lp->lock); 656 657 for (i = j; i != lp->tx_new; i = j) { 658 td = lib_ptr(ib, btx_ring[i], lp->type); 659 /* If we hit a packet not owned by us, stop */ 660 if (*tds_ptr(td, tmd1, lp->type) & LE_T1_OWN) 661 break; 662 663 if (*tds_ptr(td, tmd1, lp->type) & LE_T1_ERR) { 664 status = *tds_ptr(td, misc, lp->type); 665 666 dev->stats.tx_errors++; 667 if (status & LE_T3_RTY) 668 dev->stats.tx_aborted_errors++; 669 if (status & LE_T3_LCOL) 670 dev->stats.tx_window_errors++; 671 672 if (status & LE_T3_CLOS) { 673 dev->stats.tx_carrier_errors++; 674 printk("%s: Carrier Lost\n", dev->name); 675 /* Stop the lance */ 676 writereg(&ll->rap, LE_CSR0); 677 writereg(&ll->rdp, LE_C0_STOP); 678 lance_init_ring(dev); 679 load_csrs(lp); 680 init_restart_lance(lp); 681 goto out; 682 } 683 /* Buffer errors and underflows turn off the 684 * transmitter, restart the adapter. 685 */ 686 if (status & (LE_T3_BUF | LE_T3_UFL)) { 687 dev->stats.tx_fifo_errors++; 688 689 printk("%s: Tx: ERR_BUF|ERR_UFL, restarting\n", 690 dev->name); 691 /* Stop the lance */ 692 writereg(&ll->rap, LE_CSR0); 693 writereg(&ll->rdp, LE_C0_STOP); 694 lance_init_ring(dev); 695 load_csrs(lp); 696 init_restart_lance(lp); 697 goto out; 698 } 699 } else if ((*tds_ptr(td, tmd1, lp->type) & LE_T1_POK) == 700 LE_T1_POK) { 701 /* 702 * So we don't count the packet more than once. 703 */ 704 *tds_ptr(td, tmd1, lp->type) &= ~(LE_T1_POK); 705 706 /* One collision before packet was sent. */ 707 if (*tds_ptr(td, tmd1, lp->type) & LE_T1_EONE) 708 dev->stats.collisions++; 709 710 /* More than one collision, be optimistic. */ 711 if (*tds_ptr(td, tmd1, lp->type) & LE_T1_EMORE) 712 dev->stats.collisions += 2; 713 714 dev->stats.tx_packets++; 715 } 716 j = (j + 1) & TX_RING_MOD_MASK; 717 } 718 lp->tx_old = j; 719 out: 720 if (netif_queue_stopped(dev) && 721 TX_BUFFS_AVAIL > 0) 722 netif_wake_queue(dev); 723 724 spin_unlock(&lp->lock); 725 } 726 727 static irqreturn_t lance_dma_merr_int(int irq, void *dev_id) 728 { 729 struct net_device *dev = dev_id; 730 731 printk(KERN_ERR "%s: DMA error\n", dev->name); 732 return IRQ_HANDLED; 733 } 734 735 static irqreturn_t lance_interrupt(int irq, void *dev_id) 736 { 737 struct net_device *dev = dev_id; 738 struct lance_private *lp = netdev_priv(dev); 739 volatile struct lance_regs *ll = lp->ll; 740 int csr0; 741 742 writereg(&ll->rap, LE_CSR0); 743 csr0 = ll->rdp; 744 745 /* Acknowledge all the interrupt sources ASAP */ 746 writereg(&ll->rdp, csr0 & (LE_C0_INTR | LE_C0_TINT | LE_C0_RINT)); 747 748 if ((csr0 & LE_C0_ERR)) { 749 /* Clear the error condition */ 750 writereg(&ll->rdp, LE_C0_BABL | LE_C0_ERR | LE_C0_MISS | 751 LE_C0_CERR | LE_C0_MERR); 752 } 753 if (csr0 & LE_C0_RINT) 754 lance_rx(dev); 755 756 if (csr0 & LE_C0_TINT) 757 lance_tx(dev); 758 759 if (csr0 & LE_C0_BABL) 760 dev->stats.tx_errors++; 761 762 if (csr0 & LE_C0_MISS) 763 dev->stats.rx_errors++; 764 765 if (csr0 & LE_C0_MERR) { 766 printk("%s: Memory error, status %04x\n", dev->name, csr0); 767 768 writereg(&ll->rdp, LE_C0_STOP); 769 770 lance_init_ring(dev); 771 load_csrs(lp); 772 init_restart_lance(lp); 773 netif_wake_queue(dev); 774 } 775 776 writereg(&ll->rdp, LE_C0_INEA); 777 writereg(&ll->rdp, LE_C0_INEA); 778 return IRQ_HANDLED; 779 } 780 781 static int lance_open(struct net_device *dev) 782 { 783 volatile u16 *ib = (volatile u16 *)dev->mem_start; 784 struct lance_private *lp = netdev_priv(dev); 785 volatile struct lance_regs *ll = lp->ll; 786 int status = 0; 787 788 /* Stop the Lance */ 789 writereg(&ll->rap, LE_CSR0); 790 writereg(&ll->rdp, LE_C0_STOP); 791 792 /* Set mode and clear multicast filter only at device open, 793 * so that lance_init_ring() called at any error will not 794 * forget multicast filters. 795 * 796 * BTW it is common bug in all lance drivers! --ANK 797 */ 798 *lib_ptr(ib, mode, lp->type) = 0; 799 *lib_ptr(ib, filter[0], lp->type) = 0; 800 *lib_ptr(ib, filter[1], lp->type) = 0; 801 *lib_ptr(ib, filter[2], lp->type) = 0; 802 *lib_ptr(ib, filter[3], lp->type) = 0; 803 804 lance_init_ring(dev); 805 load_csrs(lp); 806 807 netif_start_queue(dev); 808 809 /* Associate IRQ with lance_interrupt */ 810 if (request_irq(dev->irq, lance_interrupt, 0, "lance", dev)) { 811 printk("%s: Can't get IRQ %d\n", dev->name, dev->irq); 812 return -EAGAIN; 813 } 814 if (lp->dma_irq >= 0) { 815 unsigned long flags; 816 817 if (request_irq(lp->dma_irq, lance_dma_merr_int, 0, 818 "lance error", dev)) { 819 free_irq(dev->irq, dev); 820 printk("%s: Can't get DMA IRQ %d\n", dev->name, 821 lp->dma_irq); 822 return -EAGAIN; 823 } 824 825 spin_lock_irqsave(&ioasic_ssr_lock, flags); 826 827 fast_mb(); 828 /* Enable I/O ASIC LANCE DMA. */ 829 ioasic_write(IO_REG_SSR, 830 ioasic_read(IO_REG_SSR) | IO_SSR_LANCE_DMA_EN); 831 832 fast_mb(); 833 spin_unlock_irqrestore(&ioasic_ssr_lock, flags); 834 } 835 836 status = init_restart_lance(lp); 837 return status; 838 } 839 840 static int lance_close(struct net_device *dev) 841 { 842 struct lance_private *lp = netdev_priv(dev); 843 volatile struct lance_regs *ll = lp->ll; 844 845 netif_stop_queue(dev); 846 del_timer_sync(&lp->multicast_timer); 847 848 /* Stop the card */ 849 writereg(&ll->rap, LE_CSR0); 850 writereg(&ll->rdp, LE_C0_STOP); 851 852 if (lp->dma_irq >= 0) { 853 unsigned long flags; 854 855 spin_lock_irqsave(&ioasic_ssr_lock, flags); 856 857 fast_mb(); 858 /* Disable I/O ASIC LANCE DMA. */ 859 ioasic_write(IO_REG_SSR, 860 ioasic_read(IO_REG_SSR) & ~IO_SSR_LANCE_DMA_EN); 861 862 fast_iob(); 863 spin_unlock_irqrestore(&ioasic_ssr_lock, flags); 864 865 free_irq(lp->dma_irq, dev); 866 } 867 free_irq(dev->irq, dev); 868 return 0; 869 } 870 871 static inline int lance_reset(struct net_device *dev) 872 { 873 struct lance_private *lp = netdev_priv(dev); 874 volatile struct lance_regs *ll = lp->ll; 875 int status; 876 877 /* Stop the lance */ 878 writereg(&ll->rap, LE_CSR0); 879 writereg(&ll->rdp, LE_C0_STOP); 880 881 lance_init_ring(dev); 882 load_csrs(lp); 883 dev->trans_start = jiffies; /* prevent tx timeout */ 884 status = init_restart_lance(lp); 885 return status; 886 } 887 888 static void lance_tx_timeout(struct net_device *dev) 889 { 890 struct lance_private *lp = netdev_priv(dev); 891 volatile struct lance_regs *ll = lp->ll; 892 893 printk(KERN_ERR "%s: transmit timed out, status %04x, reset\n", 894 dev->name, ll->rdp); 895 lance_reset(dev); 896 netif_wake_queue(dev); 897 } 898 899 static int lance_start_xmit(struct sk_buff *skb, struct net_device *dev) 900 { 901 struct lance_private *lp = netdev_priv(dev); 902 volatile struct lance_regs *ll = lp->ll; 903 volatile u16 *ib = (volatile u16 *)dev->mem_start; 904 unsigned long flags; 905 int entry, len; 906 907 len = skb->len; 908 909 if (len < ETH_ZLEN) { 910 if (skb_padto(skb, ETH_ZLEN)) 911 return NETDEV_TX_OK; 912 len = ETH_ZLEN; 913 } 914 915 dev->stats.tx_bytes += len; 916 917 spin_lock_irqsave(&lp->lock, flags); 918 919 entry = lp->tx_new; 920 *lib_ptr(ib, btx_ring[entry].length, lp->type) = (-len); 921 *lib_ptr(ib, btx_ring[entry].misc, lp->type) = 0; 922 923 cp_to_buf(lp->type, (char *)lp->tx_buf_ptr_cpu[entry], skb->data, len); 924 925 /* Now, give the packet to the lance */ 926 *lib_ptr(ib, btx_ring[entry].tmd1, lp->type) = 927 ((lp->tx_buf_ptr_lnc[entry] >> 16) & 0xff) | 928 (LE_T1_POK | LE_T1_OWN); 929 lp->tx_new = (entry + 1) & TX_RING_MOD_MASK; 930 931 if (TX_BUFFS_AVAIL <= 0) 932 netif_stop_queue(dev); 933 934 /* Kick the lance: transmit now */ 935 writereg(&ll->rdp, LE_C0_INEA | LE_C0_TDMD); 936 937 spin_unlock_irqrestore(&lp->lock, flags); 938 939 dev_kfree_skb(skb); 940 941 return NETDEV_TX_OK; 942 } 943 944 static void lance_load_multicast(struct net_device *dev) 945 { 946 struct lance_private *lp = netdev_priv(dev); 947 volatile u16 *ib = (volatile u16 *)dev->mem_start; 948 struct netdev_hw_addr *ha; 949 u32 crc; 950 951 /* set all multicast bits */ 952 if (dev->flags & IFF_ALLMULTI) { 953 *lib_ptr(ib, filter[0], lp->type) = 0xffff; 954 *lib_ptr(ib, filter[1], lp->type) = 0xffff; 955 *lib_ptr(ib, filter[2], lp->type) = 0xffff; 956 *lib_ptr(ib, filter[3], lp->type) = 0xffff; 957 return; 958 } 959 /* clear the multicast filter */ 960 *lib_ptr(ib, filter[0], lp->type) = 0; 961 *lib_ptr(ib, filter[1], lp->type) = 0; 962 *lib_ptr(ib, filter[2], lp->type) = 0; 963 *lib_ptr(ib, filter[3], lp->type) = 0; 964 965 /* Add addresses */ 966 netdev_for_each_mc_addr(ha, dev) { 967 crc = ether_crc_le(ETH_ALEN, ha->addr); 968 crc = crc >> 26; 969 *lib_ptr(ib, filter[crc >> 4], lp->type) |= 1 << (crc & 0xf); 970 } 971 } 972 973 static void lance_set_multicast(struct net_device *dev) 974 { 975 struct lance_private *lp = netdev_priv(dev); 976 volatile u16 *ib = (volatile u16 *)dev->mem_start; 977 volatile struct lance_regs *ll = lp->ll; 978 979 if (!netif_running(dev)) 980 return; 981 982 if (lp->tx_old != lp->tx_new) { 983 mod_timer(&lp->multicast_timer, jiffies + 4 * HZ/100); 984 netif_wake_queue(dev); 985 return; 986 } 987 988 netif_stop_queue(dev); 989 990 writereg(&ll->rap, LE_CSR0); 991 writereg(&ll->rdp, LE_C0_STOP); 992 993 lance_init_ring(dev); 994 995 if (dev->flags & IFF_PROMISC) { 996 *lib_ptr(ib, mode, lp->type) |= LE_MO_PROM; 997 } else { 998 *lib_ptr(ib, mode, lp->type) &= ~LE_MO_PROM; 999 lance_load_multicast(dev); 1000 } 1001 load_csrs(lp); 1002 init_restart_lance(lp); 1003 netif_wake_queue(dev); 1004 } 1005 1006 static void lance_set_multicast_retry(unsigned long _opaque) 1007 { 1008 struct net_device *dev = (struct net_device *) _opaque; 1009 1010 lance_set_multicast(dev); 1011 } 1012 1013 static const struct net_device_ops lance_netdev_ops = { 1014 .ndo_open = lance_open, 1015 .ndo_stop = lance_close, 1016 .ndo_start_xmit = lance_start_xmit, 1017 .ndo_tx_timeout = lance_tx_timeout, 1018 .ndo_set_rx_mode = lance_set_multicast, 1019 .ndo_change_mtu = eth_change_mtu, 1020 .ndo_validate_addr = eth_validate_addr, 1021 .ndo_set_mac_address = eth_mac_addr, 1022 }; 1023 1024 static int __devinit dec_lance_probe(struct device *bdev, const int type) 1025 { 1026 static unsigned version_printed; 1027 static const char fmt[] = "declance%d"; 1028 char name[10]; 1029 struct net_device *dev; 1030 struct lance_private *lp; 1031 volatile struct lance_regs *ll; 1032 resource_size_t start = 0, len = 0; 1033 int i, ret; 1034 unsigned long esar_base; 1035 unsigned char *esar; 1036 1037 if (dec_lance_debug && version_printed++ == 0) 1038 printk(version); 1039 1040 if (bdev) 1041 snprintf(name, sizeof(name), "%s", dev_name(bdev)); 1042 else { 1043 i = 0; 1044 dev = root_lance_dev; 1045 while (dev) { 1046 i++; 1047 lp = netdev_priv(dev); 1048 dev = lp->next; 1049 } 1050 snprintf(name, sizeof(name), fmt, i); 1051 } 1052 1053 dev = alloc_etherdev(sizeof(struct lance_private)); 1054 if (!dev) { 1055 printk(KERN_ERR "%s: Unable to allocate etherdev, aborting.\n", 1056 name); 1057 ret = -ENOMEM; 1058 goto err_out; 1059 } 1060 1061 /* 1062 * alloc_etherdev ensures the data structures used by the LANCE 1063 * are aligned. 1064 */ 1065 lp = netdev_priv(dev); 1066 spin_lock_init(&lp->lock); 1067 1068 lp->type = type; 1069 switch (type) { 1070 case ASIC_LANCE: 1071 dev->base_addr = CKSEG1ADDR(dec_kn_slot_base + IOASIC_LANCE); 1072 1073 /* buffer space for the on-board LANCE shared memory */ 1074 /* 1075 * FIXME: ugly hack! 1076 */ 1077 dev->mem_start = CKSEG1ADDR(0x00020000); 1078 dev->mem_end = dev->mem_start + 0x00020000; 1079 dev->irq = dec_interrupt[DEC_IRQ_LANCE]; 1080 esar_base = CKSEG1ADDR(dec_kn_slot_base + IOASIC_ESAR); 1081 1082 /* Workaround crash with booting KN04 2.1k from Disk */ 1083 memset((void *)dev->mem_start, 0, 1084 dev->mem_end - dev->mem_start); 1085 1086 /* 1087 * setup the pointer arrays, this sucks [tm] :-( 1088 */ 1089 for (i = 0; i < RX_RING_SIZE; i++) { 1090 lp->rx_buf_ptr_cpu[i] = 1091 (char *)(dev->mem_start + 2 * BUF_OFFSET_CPU + 1092 2 * i * RX_BUFF_SIZE); 1093 lp->rx_buf_ptr_lnc[i] = 1094 (BUF_OFFSET_LNC + i * RX_BUFF_SIZE); 1095 } 1096 for (i = 0; i < TX_RING_SIZE; i++) { 1097 lp->tx_buf_ptr_cpu[i] = 1098 (char *)(dev->mem_start + 2 * BUF_OFFSET_CPU + 1099 2 * RX_RING_SIZE * RX_BUFF_SIZE + 1100 2 * i * TX_BUFF_SIZE); 1101 lp->tx_buf_ptr_lnc[i] = 1102 (BUF_OFFSET_LNC + 1103 RX_RING_SIZE * RX_BUFF_SIZE + 1104 i * TX_BUFF_SIZE); 1105 } 1106 1107 /* Setup I/O ASIC LANCE DMA. */ 1108 lp->dma_irq = dec_interrupt[DEC_IRQ_LANCE_MERR]; 1109 ioasic_write(IO_REG_LANCE_DMA_P, 1110 CPHYSADDR(dev->mem_start) << 3); 1111 1112 break; 1113 #ifdef CONFIG_TC 1114 case PMAD_LANCE: 1115 dev_set_drvdata(bdev, dev); 1116 1117 start = to_tc_dev(bdev)->resource.start; 1118 len = to_tc_dev(bdev)->resource.end - start + 1; 1119 if (!request_mem_region(start, len, dev_name(bdev))) { 1120 printk(KERN_ERR 1121 "%s: Unable to reserve MMIO resource\n", 1122 dev_name(bdev)); 1123 ret = -EBUSY; 1124 goto err_out_dev; 1125 } 1126 1127 dev->mem_start = CKSEG1ADDR(start); 1128 dev->mem_end = dev->mem_start + 0x100000; 1129 dev->base_addr = dev->mem_start + 0x100000; 1130 dev->irq = to_tc_dev(bdev)->interrupt; 1131 esar_base = dev->mem_start + 0x1c0002; 1132 lp->dma_irq = -1; 1133 1134 for (i = 0; i < RX_RING_SIZE; i++) { 1135 lp->rx_buf_ptr_cpu[i] = 1136 (char *)(dev->mem_start + BUF_OFFSET_CPU + 1137 i * RX_BUFF_SIZE); 1138 lp->rx_buf_ptr_lnc[i] = 1139 (BUF_OFFSET_LNC + i * RX_BUFF_SIZE); 1140 } 1141 for (i = 0; i < TX_RING_SIZE; i++) { 1142 lp->tx_buf_ptr_cpu[i] = 1143 (char *)(dev->mem_start + BUF_OFFSET_CPU + 1144 RX_RING_SIZE * RX_BUFF_SIZE + 1145 i * TX_BUFF_SIZE); 1146 lp->tx_buf_ptr_lnc[i] = 1147 (BUF_OFFSET_LNC + 1148 RX_RING_SIZE * RX_BUFF_SIZE + 1149 i * TX_BUFF_SIZE); 1150 } 1151 1152 break; 1153 #endif 1154 case PMAX_LANCE: 1155 dev->irq = dec_interrupt[DEC_IRQ_LANCE]; 1156 dev->base_addr = CKSEG1ADDR(KN01_SLOT_BASE + KN01_LANCE); 1157 dev->mem_start = CKSEG1ADDR(KN01_SLOT_BASE + KN01_LANCE_MEM); 1158 dev->mem_end = dev->mem_start + KN01_SLOT_SIZE; 1159 esar_base = CKSEG1ADDR(KN01_SLOT_BASE + KN01_ESAR + 1); 1160 lp->dma_irq = -1; 1161 1162 /* 1163 * setup the pointer arrays, this sucks [tm] :-( 1164 */ 1165 for (i = 0; i < RX_RING_SIZE; i++) { 1166 lp->rx_buf_ptr_cpu[i] = 1167 (char *)(dev->mem_start + 2 * BUF_OFFSET_CPU + 1168 2 * i * RX_BUFF_SIZE); 1169 lp->rx_buf_ptr_lnc[i] = 1170 (BUF_OFFSET_LNC + i * RX_BUFF_SIZE); 1171 } 1172 for (i = 0; i < TX_RING_SIZE; i++) { 1173 lp->tx_buf_ptr_cpu[i] = 1174 (char *)(dev->mem_start + 2 * BUF_OFFSET_CPU + 1175 2 * RX_RING_SIZE * RX_BUFF_SIZE + 1176 2 * i * TX_BUFF_SIZE); 1177 lp->tx_buf_ptr_lnc[i] = 1178 (BUF_OFFSET_LNC + 1179 RX_RING_SIZE * RX_BUFF_SIZE + 1180 i * TX_BUFF_SIZE); 1181 } 1182 1183 break; 1184 1185 default: 1186 printk(KERN_ERR "%s: declance_init called with unknown type\n", 1187 name); 1188 ret = -ENODEV; 1189 goto err_out_dev; 1190 } 1191 1192 ll = (struct lance_regs *) dev->base_addr; 1193 esar = (unsigned char *) esar_base; 1194 1195 /* prom checks */ 1196 /* First, check for test pattern */ 1197 if (esar[0x60] != 0xff && esar[0x64] != 0x00 && 1198 esar[0x68] != 0x55 && esar[0x6c] != 0xaa) { 1199 printk(KERN_ERR 1200 "%s: Ethernet station address prom not found!\n", 1201 name); 1202 ret = -ENODEV; 1203 goto err_out_resource; 1204 } 1205 /* Check the prom contents */ 1206 for (i = 0; i < 8; i++) { 1207 if (esar[i * 4] != esar[0x3c - i * 4] && 1208 esar[i * 4] != esar[0x40 + i * 4] && 1209 esar[0x3c - i * 4] != esar[0x40 + i * 4]) { 1210 printk(KERN_ERR "%s: Something is wrong with the " 1211 "ethernet station address prom!\n", name); 1212 ret = -ENODEV; 1213 goto err_out_resource; 1214 } 1215 } 1216 1217 /* Copy the ethernet address to the device structure, later to the 1218 * lance initialization block so the lance gets it every time it's 1219 * (re)initialized. 1220 */ 1221 switch (type) { 1222 case ASIC_LANCE: 1223 printk("%s: IOASIC onboard LANCE", name); 1224 break; 1225 case PMAD_LANCE: 1226 printk("%s: PMAD-AA", name); 1227 break; 1228 case PMAX_LANCE: 1229 printk("%s: PMAX onboard LANCE", name); 1230 break; 1231 } 1232 for (i = 0; i < 6; i++) 1233 dev->dev_addr[i] = esar[i * 4]; 1234 1235 printk(", addr = %pM, irq = %d\n", dev->dev_addr, dev->irq); 1236 1237 dev->netdev_ops = &lance_netdev_ops; 1238 dev->watchdog_timeo = 5*HZ; 1239 1240 /* lp->ll is the location of the registers for lance card */ 1241 lp->ll = ll; 1242 1243 /* busmaster_regval (CSR3) should be zero according to the PMAD-AA 1244 * specification. 1245 */ 1246 lp->busmaster_regval = 0; 1247 1248 dev->dma = 0; 1249 1250 /* We cannot sleep if the chip is busy during a 1251 * multicast list update event, because such events 1252 * can occur from interrupts (ex. IPv6). So we 1253 * use a timer to try again later when necessary. -DaveM 1254 */ 1255 init_timer(&lp->multicast_timer); 1256 lp->multicast_timer.data = (unsigned long) dev; 1257 lp->multicast_timer.function = lance_set_multicast_retry; 1258 1259 ret = register_netdev(dev); 1260 if (ret) { 1261 printk(KERN_ERR 1262 "%s: Unable to register netdev, aborting.\n", name); 1263 goto err_out_resource; 1264 } 1265 1266 if (!bdev) { 1267 lp->next = root_lance_dev; 1268 root_lance_dev = dev; 1269 } 1270 1271 printk("%s: registered as %s.\n", name, dev->name); 1272 return 0; 1273 1274 err_out_resource: 1275 if (bdev) 1276 release_mem_region(start, len); 1277 1278 err_out_dev: 1279 free_netdev(dev); 1280 1281 err_out: 1282 return ret; 1283 } 1284 1285 static void __exit dec_lance_remove(struct device *bdev) 1286 { 1287 struct net_device *dev = dev_get_drvdata(bdev); 1288 resource_size_t start, len; 1289 1290 unregister_netdev(dev); 1291 start = to_tc_dev(bdev)->resource.start; 1292 len = to_tc_dev(bdev)->resource.end - start + 1; 1293 release_mem_region(start, len); 1294 free_netdev(dev); 1295 } 1296 1297 /* Find all the lance cards on the system and initialize them */ 1298 static int __init dec_lance_platform_probe(void) 1299 { 1300 int count = 0; 1301 1302 if (dec_interrupt[DEC_IRQ_LANCE] >= 0) { 1303 if (dec_interrupt[DEC_IRQ_LANCE_MERR] >= 0) { 1304 if (dec_lance_probe(NULL, ASIC_LANCE) >= 0) 1305 count++; 1306 } else if (!TURBOCHANNEL) { 1307 if (dec_lance_probe(NULL, PMAX_LANCE) >= 0) 1308 count++; 1309 } 1310 } 1311 1312 return (count > 0) ? 0 : -ENODEV; 1313 } 1314 1315 static void __exit dec_lance_platform_remove(void) 1316 { 1317 while (root_lance_dev) { 1318 struct net_device *dev = root_lance_dev; 1319 struct lance_private *lp = netdev_priv(dev); 1320 1321 unregister_netdev(dev); 1322 root_lance_dev = lp->next; 1323 free_netdev(dev); 1324 } 1325 } 1326 1327 #ifdef CONFIG_TC 1328 static int __devinit dec_lance_tc_probe(struct device *dev); 1329 static int __exit dec_lance_tc_remove(struct device *dev); 1330 1331 static const struct tc_device_id dec_lance_tc_table[] = { 1332 { "DEC ", "PMAD-AA " }, 1333 { } 1334 }; 1335 MODULE_DEVICE_TABLE(tc, dec_lance_tc_table); 1336 1337 static struct tc_driver dec_lance_tc_driver = { 1338 .id_table = dec_lance_tc_table, 1339 .driver = { 1340 .name = "declance", 1341 .bus = &tc_bus_type, 1342 .probe = dec_lance_tc_probe, 1343 .remove = __exit_p(dec_lance_tc_remove), 1344 }, 1345 }; 1346 1347 static int __devinit dec_lance_tc_probe(struct device *dev) 1348 { 1349 int status = dec_lance_probe(dev, PMAD_LANCE); 1350 if (!status) 1351 get_device(dev); 1352 return status; 1353 } 1354 1355 static int __exit dec_lance_tc_remove(struct device *dev) 1356 { 1357 put_device(dev); 1358 dec_lance_remove(dev); 1359 return 0; 1360 } 1361 #endif 1362 1363 static int __init dec_lance_init(void) 1364 { 1365 int status; 1366 1367 status = tc_register_driver(&dec_lance_tc_driver); 1368 if (!status) 1369 dec_lance_platform_probe(); 1370 return status; 1371 } 1372 1373 static void __exit dec_lance_exit(void) 1374 { 1375 dec_lance_platform_remove(); 1376 tc_unregister_driver(&dec_lance_tc_driver); 1377 } 1378 1379 1380 module_init(dec_lance_init); 1381 module_exit(dec_lance_exit); 1382