1 // SPDX-License-Identifier: GPL-2.0 OR Linux-OpenIB 2 /* 3 * Copyright 2015-2020 Amazon.com, Inc. or its affiliates. All rights reserved. 4 */ 5 6 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt 7 8 #ifdef CONFIG_RFS_ACCEL 9 #include <linux/cpu_rmap.h> 10 #endif /* CONFIG_RFS_ACCEL */ 11 #include <linux/ethtool.h> 12 #include <linux/kernel.h> 13 #include <linux/module.h> 14 #include <linux/numa.h> 15 #include <linux/pci.h> 16 #include <linux/utsname.h> 17 #include <linux/version.h> 18 #include <linux/vmalloc.h> 19 #include <net/ip.h> 20 21 #include "ena_netdev.h" 22 #include <linux/bpf_trace.h> 23 #include "ena_pci_id_tbl.h" 24 25 MODULE_AUTHOR("Amazon.com, Inc. or its affiliates"); 26 MODULE_DESCRIPTION(DEVICE_NAME); 27 MODULE_LICENSE("GPL"); 28 29 /* Time in jiffies before concluding the transmitter is hung. */ 30 #define TX_TIMEOUT (5 * HZ) 31 32 #define ENA_MAX_RINGS min_t(unsigned int, ENA_MAX_NUM_IO_QUEUES, num_possible_cpus()) 33 34 #define ENA_NAPI_BUDGET 64 35 36 #define DEFAULT_MSG_ENABLE (NETIF_MSG_DRV | NETIF_MSG_PROBE | NETIF_MSG_IFUP | \ 37 NETIF_MSG_TX_DONE | NETIF_MSG_TX_ERR | NETIF_MSG_RX_ERR) 38 static int debug = -1; 39 module_param(debug, int, 0); 40 MODULE_PARM_DESC(debug, "Debug level (0=none,...,16=all)"); 41 42 static struct ena_aenq_handlers aenq_handlers; 43 44 static struct workqueue_struct *ena_wq; 45 46 MODULE_DEVICE_TABLE(pci, ena_pci_tbl); 47 48 static int ena_rss_init_default(struct ena_adapter *adapter); 49 static void check_for_admin_com_state(struct ena_adapter *adapter); 50 static void ena_destroy_device(struct ena_adapter *adapter, bool graceful); 51 static int ena_restore_device(struct ena_adapter *adapter); 52 53 static void ena_init_io_rings(struct ena_adapter *adapter, 54 int first_index, int count); 55 static void ena_init_napi_in_range(struct ena_adapter *adapter, int first_index, 56 int count); 57 static void ena_del_napi_in_range(struct ena_adapter *adapter, int first_index, 58 int count); 59 static int ena_setup_tx_resources(struct ena_adapter *adapter, int qid); 60 static int ena_setup_tx_resources_in_range(struct ena_adapter *adapter, 61 int first_index, 62 int count); 63 static int ena_create_io_tx_queue(struct ena_adapter *adapter, int qid); 64 static void ena_free_tx_resources(struct ena_adapter *adapter, int qid); 65 static int ena_clean_xdp_irq(struct ena_ring *xdp_ring, u32 budget); 66 static void ena_destroy_all_tx_queues(struct ena_adapter *adapter); 67 static void ena_free_all_io_tx_resources(struct ena_adapter *adapter); 68 static void ena_napi_disable_in_range(struct ena_adapter *adapter, 69 int first_index, int count); 70 static void ena_napi_enable_in_range(struct ena_adapter *adapter, 71 int first_index, int count); 72 static int ena_up(struct ena_adapter *adapter); 73 static void ena_down(struct ena_adapter *adapter); 74 static void ena_unmask_interrupt(struct ena_ring *tx_ring, 75 struct ena_ring *rx_ring); 76 static void ena_update_ring_numa_node(struct ena_ring *tx_ring, 77 struct ena_ring *rx_ring); 78 static void ena_unmap_tx_buff(struct ena_ring *tx_ring, 79 struct ena_tx_buffer *tx_info); 80 static int ena_create_io_tx_queues_in_range(struct ena_adapter *adapter, 81 int first_index, int count); 82 83 /* Increase a stat by cnt while holding syncp seqlock on 32bit machines */ 84 static void ena_increase_stat(u64 *statp, u64 cnt, 85 struct u64_stats_sync *syncp) 86 { 87 u64_stats_update_begin(syncp); 88 (*statp) += cnt; 89 u64_stats_update_end(syncp); 90 } 91 92 static void ena_tx_timeout(struct net_device *dev, unsigned int txqueue) 93 { 94 struct ena_adapter *adapter = netdev_priv(dev); 95 96 /* Change the state of the device to trigger reset 97 * Check that we are not in the middle or a trigger already 98 */ 99 100 if (test_and_set_bit(ENA_FLAG_TRIGGER_RESET, &adapter->flags)) 101 return; 102 103 adapter->reset_reason = ENA_REGS_RESET_OS_NETDEV_WD; 104 ena_increase_stat(&adapter->dev_stats.tx_timeout, 1, &adapter->syncp); 105 106 netif_err(adapter, tx_err, dev, "Transmit time out\n"); 107 } 108 109 static void update_rx_ring_mtu(struct ena_adapter *adapter, int mtu) 110 { 111 int i; 112 113 for (i = 0; i < adapter->num_io_queues; i++) 114 adapter->rx_ring[i].mtu = mtu; 115 } 116 117 static int ena_change_mtu(struct net_device *dev, int new_mtu) 118 { 119 struct ena_adapter *adapter = netdev_priv(dev); 120 int ret; 121 122 ret = ena_com_set_dev_mtu(adapter->ena_dev, new_mtu); 123 if (!ret) { 124 netif_dbg(adapter, drv, dev, "Set MTU to %d\n", new_mtu); 125 update_rx_ring_mtu(adapter, new_mtu); 126 dev->mtu = new_mtu; 127 } else { 128 netif_err(adapter, drv, dev, "Failed to set MTU to %d\n", 129 new_mtu); 130 } 131 132 return ret; 133 } 134 135 static int ena_xmit_common(struct net_device *dev, 136 struct ena_ring *ring, 137 struct ena_tx_buffer *tx_info, 138 struct ena_com_tx_ctx *ena_tx_ctx, 139 u16 next_to_use, 140 u32 bytes) 141 { 142 struct ena_adapter *adapter = netdev_priv(dev); 143 int rc, nb_hw_desc; 144 145 if (unlikely(ena_com_is_doorbell_needed(ring->ena_com_io_sq, 146 ena_tx_ctx))) { 147 netif_dbg(adapter, tx_queued, dev, 148 "llq tx max burst size of queue %d achieved, writing doorbell to send burst\n", 149 ring->qid); 150 ena_com_write_sq_doorbell(ring->ena_com_io_sq); 151 } 152 153 /* prepare the packet's descriptors to dma engine */ 154 rc = ena_com_prepare_tx(ring->ena_com_io_sq, ena_tx_ctx, 155 &nb_hw_desc); 156 157 /* In case there isn't enough space in the queue for the packet, 158 * we simply drop it. All other failure reasons of 159 * ena_com_prepare_tx() are fatal and therefore require a device reset. 160 */ 161 if (unlikely(rc)) { 162 netif_err(adapter, tx_queued, dev, 163 "Failed to prepare tx bufs\n"); 164 ena_increase_stat(&ring->tx_stats.prepare_ctx_err, 1, 165 &ring->syncp); 166 if (rc != -ENOMEM) { 167 adapter->reset_reason = 168 ENA_REGS_RESET_DRIVER_INVALID_STATE; 169 set_bit(ENA_FLAG_TRIGGER_RESET, &adapter->flags); 170 } 171 return rc; 172 } 173 174 u64_stats_update_begin(&ring->syncp); 175 ring->tx_stats.cnt++; 176 ring->tx_stats.bytes += bytes; 177 u64_stats_update_end(&ring->syncp); 178 179 tx_info->tx_descs = nb_hw_desc; 180 tx_info->last_jiffies = jiffies; 181 tx_info->print_once = 0; 182 183 ring->next_to_use = ENA_TX_RING_IDX_NEXT(next_to_use, 184 ring->ring_size); 185 return 0; 186 } 187 188 /* This is the XDP napi callback. XDP queues use a separate napi callback 189 * than Rx/Tx queues. 190 */ 191 static int ena_xdp_io_poll(struct napi_struct *napi, int budget) 192 { 193 struct ena_napi *ena_napi = container_of(napi, struct ena_napi, napi); 194 u32 xdp_work_done, xdp_budget; 195 struct ena_ring *xdp_ring; 196 int napi_comp_call = 0; 197 int ret; 198 199 xdp_ring = ena_napi->xdp_ring; 200 xdp_ring->first_interrupt = ena_napi->first_interrupt; 201 202 xdp_budget = budget; 203 204 if (!test_bit(ENA_FLAG_DEV_UP, &xdp_ring->adapter->flags) || 205 test_bit(ENA_FLAG_TRIGGER_RESET, &xdp_ring->adapter->flags)) { 206 napi_complete_done(napi, 0); 207 return 0; 208 } 209 210 xdp_work_done = ena_clean_xdp_irq(xdp_ring, xdp_budget); 211 212 /* If the device is about to reset or down, avoid unmask 213 * the interrupt and return 0 so NAPI won't reschedule 214 */ 215 if (unlikely(!test_bit(ENA_FLAG_DEV_UP, &xdp_ring->adapter->flags))) { 216 napi_complete_done(napi, 0); 217 ret = 0; 218 } else if (xdp_budget > xdp_work_done) { 219 napi_comp_call = 1; 220 if (napi_complete_done(napi, xdp_work_done)) 221 ena_unmask_interrupt(xdp_ring, NULL); 222 ena_update_ring_numa_node(xdp_ring, NULL); 223 ret = xdp_work_done; 224 } else { 225 ret = xdp_budget; 226 } 227 228 u64_stats_update_begin(&xdp_ring->syncp); 229 xdp_ring->tx_stats.napi_comp += napi_comp_call; 230 xdp_ring->tx_stats.tx_poll++; 231 u64_stats_update_end(&xdp_ring->syncp); 232 233 return ret; 234 } 235 236 static int ena_xdp_tx_map_frame(struct ena_ring *xdp_ring, 237 struct ena_tx_buffer *tx_info, 238 struct xdp_frame *xdpf, 239 void **push_hdr, 240 u32 *push_len) 241 { 242 struct ena_adapter *adapter = xdp_ring->adapter; 243 struct ena_com_buf *ena_buf; 244 dma_addr_t dma = 0; 245 u32 size; 246 247 tx_info->xdpf = xdpf; 248 size = tx_info->xdpf->len; 249 ena_buf = tx_info->bufs; 250 251 /* llq push buffer */ 252 *push_len = min_t(u32, size, xdp_ring->tx_max_header_size); 253 *push_hdr = tx_info->xdpf->data; 254 255 if (size - *push_len > 0) { 256 dma = dma_map_single(xdp_ring->dev, 257 *push_hdr + *push_len, 258 size - *push_len, 259 DMA_TO_DEVICE); 260 if (unlikely(dma_mapping_error(xdp_ring->dev, dma))) 261 goto error_report_dma_error; 262 263 tx_info->map_linear_data = 1; 264 tx_info->num_of_bufs = 1; 265 } 266 267 ena_buf->paddr = dma; 268 ena_buf->len = size; 269 270 return 0; 271 272 error_report_dma_error: 273 ena_increase_stat(&xdp_ring->tx_stats.dma_mapping_err, 1, 274 &xdp_ring->syncp); 275 netif_warn(adapter, tx_queued, adapter->netdev, "Failed to map xdp buff\n"); 276 277 xdp_return_frame_rx_napi(tx_info->xdpf); 278 tx_info->xdpf = NULL; 279 tx_info->num_of_bufs = 0; 280 281 return -EINVAL; 282 } 283 284 static int ena_xdp_xmit_frame(struct ena_ring *xdp_ring, 285 struct net_device *dev, 286 struct xdp_frame *xdpf, 287 int flags) 288 { 289 struct ena_com_tx_ctx ena_tx_ctx = {}; 290 struct ena_tx_buffer *tx_info; 291 u16 next_to_use, req_id; 292 void *push_hdr; 293 u32 push_len; 294 int rc; 295 296 next_to_use = xdp_ring->next_to_use; 297 req_id = xdp_ring->free_ids[next_to_use]; 298 tx_info = &xdp_ring->tx_buffer_info[req_id]; 299 tx_info->num_of_bufs = 0; 300 301 rc = ena_xdp_tx_map_frame(xdp_ring, tx_info, xdpf, &push_hdr, &push_len); 302 if (unlikely(rc)) 303 goto error_drop_packet; 304 305 ena_tx_ctx.ena_bufs = tx_info->bufs; 306 ena_tx_ctx.push_header = push_hdr; 307 ena_tx_ctx.num_bufs = tx_info->num_of_bufs; 308 ena_tx_ctx.req_id = req_id; 309 ena_tx_ctx.header_len = push_len; 310 311 rc = ena_xmit_common(dev, 312 xdp_ring, 313 tx_info, 314 &ena_tx_ctx, 315 next_to_use, 316 xdpf->len); 317 if (rc) 318 goto error_unmap_dma; 319 /* trigger the dma engine. ena_com_write_sq_doorbell() 320 * has a mb 321 */ 322 if (flags & XDP_XMIT_FLUSH) { 323 ena_com_write_sq_doorbell(xdp_ring->ena_com_io_sq); 324 ena_increase_stat(&xdp_ring->tx_stats.doorbells, 1, 325 &xdp_ring->syncp); 326 } 327 328 return rc; 329 330 error_unmap_dma: 331 ena_unmap_tx_buff(xdp_ring, tx_info); 332 tx_info->xdpf = NULL; 333 error_drop_packet: 334 xdp_return_frame(xdpf); 335 return rc; 336 } 337 338 static int ena_xdp_xmit(struct net_device *dev, int n, 339 struct xdp_frame **frames, u32 flags) 340 { 341 struct ena_adapter *adapter = netdev_priv(dev); 342 int qid, i, err, drops = 0; 343 struct ena_ring *xdp_ring; 344 345 if (unlikely(flags & ~XDP_XMIT_FLAGS_MASK)) 346 return -EINVAL; 347 348 if (!test_bit(ENA_FLAG_DEV_UP, &adapter->flags)) 349 return -ENETDOWN; 350 351 /* We assume that all rings have the same XDP program */ 352 if (!READ_ONCE(adapter->rx_ring->xdp_bpf_prog)) 353 return -ENXIO; 354 355 qid = smp_processor_id() % adapter->xdp_num_queues; 356 qid += adapter->xdp_first_ring; 357 xdp_ring = &adapter->tx_ring[qid]; 358 359 /* Other CPU ids might try to send thorugh this queue */ 360 spin_lock(&xdp_ring->xdp_tx_lock); 361 362 for (i = 0; i < n; i++) { 363 err = ena_xdp_xmit_frame(xdp_ring, dev, frames[i], 0); 364 /* The descriptor is freed by ena_xdp_xmit_frame in case 365 * of an error. 366 */ 367 if (err) 368 drops++; 369 } 370 371 /* Ring doorbell to make device aware of the packets */ 372 if (flags & XDP_XMIT_FLUSH) { 373 ena_com_write_sq_doorbell(xdp_ring->ena_com_io_sq); 374 ena_increase_stat(&xdp_ring->tx_stats.doorbells, 1, 375 &xdp_ring->syncp); 376 } 377 378 spin_unlock(&xdp_ring->xdp_tx_lock); 379 380 /* Return number of packets sent */ 381 return n - drops; 382 } 383 384 static int ena_xdp_execute(struct ena_ring *rx_ring, struct xdp_buff *xdp) 385 { 386 struct bpf_prog *xdp_prog; 387 struct ena_ring *xdp_ring; 388 u32 verdict = XDP_PASS; 389 struct xdp_frame *xdpf; 390 u64 *xdp_stat; 391 int qid; 392 393 rcu_read_lock(); 394 xdp_prog = READ_ONCE(rx_ring->xdp_bpf_prog); 395 396 if (!xdp_prog) 397 goto out; 398 399 verdict = bpf_prog_run_xdp(xdp_prog, xdp); 400 401 switch (verdict) { 402 case XDP_TX: 403 xdpf = xdp_convert_buff_to_frame(xdp); 404 if (unlikely(!xdpf)) { 405 trace_xdp_exception(rx_ring->netdev, xdp_prog, verdict); 406 xdp_stat = &rx_ring->rx_stats.xdp_aborted; 407 break; 408 } 409 410 /* Find xmit queue */ 411 qid = rx_ring->qid + rx_ring->adapter->num_io_queues; 412 xdp_ring = &rx_ring->adapter->tx_ring[qid]; 413 414 /* The XDP queues are shared between XDP_TX and XDP_REDIRECT */ 415 spin_lock(&xdp_ring->xdp_tx_lock); 416 417 ena_xdp_xmit_frame(xdp_ring, rx_ring->netdev, xdpf, XDP_XMIT_FLUSH); 418 419 spin_unlock(&xdp_ring->xdp_tx_lock); 420 xdp_stat = &rx_ring->rx_stats.xdp_tx; 421 break; 422 case XDP_REDIRECT: 423 if (likely(!xdp_do_redirect(rx_ring->netdev, xdp, xdp_prog))) { 424 xdp_stat = &rx_ring->rx_stats.xdp_redirect; 425 break; 426 } 427 fallthrough; 428 case XDP_ABORTED: 429 trace_xdp_exception(rx_ring->netdev, xdp_prog, verdict); 430 xdp_stat = &rx_ring->rx_stats.xdp_aborted; 431 break; 432 case XDP_DROP: 433 xdp_stat = &rx_ring->rx_stats.xdp_drop; 434 break; 435 case XDP_PASS: 436 xdp_stat = &rx_ring->rx_stats.xdp_pass; 437 break; 438 default: 439 bpf_warn_invalid_xdp_action(verdict); 440 xdp_stat = &rx_ring->rx_stats.xdp_invalid; 441 } 442 443 ena_increase_stat(xdp_stat, 1, &rx_ring->syncp); 444 out: 445 rcu_read_unlock(); 446 447 return verdict; 448 } 449 450 static void ena_init_all_xdp_queues(struct ena_adapter *adapter) 451 { 452 adapter->xdp_first_ring = adapter->num_io_queues; 453 adapter->xdp_num_queues = adapter->num_io_queues; 454 455 ena_init_io_rings(adapter, 456 adapter->xdp_first_ring, 457 adapter->xdp_num_queues); 458 } 459 460 static int ena_setup_and_create_all_xdp_queues(struct ena_adapter *adapter) 461 { 462 int rc = 0; 463 464 rc = ena_setup_tx_resources_in_range(adapter, adapter->xdp_first_ring, 465 adapter->xdp_num_queues); 466 if (rc) 467 goto setup_err; 468 469 rc = ena_create_io_tx_queues_in_range(adapter, 470 adapter->xdp_first_ring, 471 adapter->xdp_num_queues); 472 if (rc) 473 goto create_err; 474 475 return 0; 476 477 create_err: 478 ena_free_all_io_tx_resources(adapter); 479 setup_err: 480 return rc; 481 } 482 483 /* Provides a way for both kernel and bpf-prog to know 484 * more about the RX-queue a given XDP frame arrived on. 485 */ 486 static int ena_xdp_register_rxq_info(struct ena_ring *rx_ring) 487 { 488 int rc; 489 490 rc = xdp_rxq_info_reg(&rx_ring->xdp_rxq, rx_ring->netdev, rx_ring->qid, 0); 491 492 if (rc) { 493 netif_err(rx_ring->adapter, ifup, rx_ring->netdev, 494 "Failed to register xdp rx queue info. RX queue num %d rc: %d\n", 495 rx_ring->qid, rc); 496 goto err; 497 } 498 499 rc = xdp_rxq_info_reg_mem_model(&rx_ring->xdp_rxq, MEM_TYPE_PAGE_SHARED, 500 NULL); 501 502 if (rc) { 503 netif_err(rx_ring->adapter, ifup, rx_ring->netdev, 504 "Failed to register xdp rx queue info memory model. RX queue num %d rc: %d\n", 505 rx_ring->qid, rc); 506 xdp_rxq_info_unreg(&rx_ring->xdp_rxq); 507 } 508 509 err: 510 return rc; 511 } 512 513 static void ena_xdp_unregister_rxq_info(struct ena_ring *rx_ring) 514 { 515 xdp_rxq_info_unreg_mem_model(&rx_ring->xdp_rxq); 516 xdp_rxq_info_unreg(&rx_ring->xdp_rxq); 517 } 518 519 static void ena_xdp_exchange_program_rx_in_range(struct ena_adapter *adapter, 520 struct bpf_prog *prog, 521 int first, int count) 522 { 523 struct ena_ring *rx_ring; 524 int i = 0; 525 526 for (i = first; i < count; i++) { 527 rx_ring = &adapter->rx_ring[i]; 528 xchg(&rx_ring->xdp_bpf_prog, prog); 529 if (prog) { 530 ena_xdp_register_rxq_info(rx_ring); 531 rx_ring->rx_headroom = XDP_PACKET_HEADROOM; 532 } else { 533 ena_xdp_unregister_rxq_info(rx_ring); 534 rx_ring->rx_headroom = 0; 535 } 536 } 537 } 538 539 static void ena_xdp_exchange_program(struct ena_adapter *adapter, 540 struct bpf_prog *prog) 541 { 542 struct bpf_prog *old_bpf_prog = xchg(&adapter->xdp_bpf_prog, prog); 543 544 ena_xdp_exchange_program_rx_in_range(adapter, 545 prog, 546 0, 547 adapter->num_io_queues); 548 549 if (old_bpf_prog) 550 bpf_prog_put(old_bpf_prog); 551 } 552 553 static int ena_destroy_and_free_all_xdp_queues(struct ena_adapter *adapter) 554 { 555 bool was_up; 556 int rc; 557 558 was_up = test_bit(ENA_FLAG_DEV_UP, &adapter->flags); 559 560 if (was_up) 561 ena_down(adapter); 562 563 adapter->xdp_first_ring = 0; 564 adapter->xdp_num_queues = 0; 565 ena_xdp_exchange_program(adapter, NULL); 566 if (was_up) { 567 rc = ena_up(adapter); 568 if (rc) 569 return rc; 570 } 571 return 0; 572 } 573 574 static int ena_xdp_set(struct net_device *netdev, struct netdev_bpf *bpf) 575 { 576 struct ena_adapter *adapter = netdev_priv(netdev); 577 struct bpf_prog *prog = bpf->prog; 578 struct bpf_prog *old_bpf_prog; 579 int rc, prev_mtu; 580 bool is_up; 581 582 is_up = test_bit(ENA_FLAG_DEV_UP, &adapter->flags); 583 rc = ena_xdp_allowed(adapter); 584 if (rc == ENA_XDP_ALLOWED) { 585 old_bpf_prog = adapter->xdp_bpf_prog; 586 if (prog) { 587 if (!is_up) { 588 ena_init_all_xdp_queues(adapter); 589 } else if (!old_bpf_prog) { 590 ena_down(adapter); 591 ena_init_all_xdp_queues(adapter); 592 } 593 ena_xdp_exchange_program(adapter, prog); 594 595 if (is_up && !old_bpf_prog) { 596 rc = ena_up(adapter); 597 if (rc) 598 return rc; 599 } 600 } else if (old_bpf_prog) { 601 rc = ena_destroy_and_free_all_xdp_queues(adapter); 602 if (rc) 603 return rc; 604 } 605 606 prev_mtu = netdev->max_mtu; 607 netdev->max_mtu = prog ? ENA_XDP_MAX_MTU : adapter->max_mtu; 608 609 if (!old_bpf_prog) 610 netif_info(adapter, drv, adapter->netdev, 611 "XDP program is set, changing the max_mtu from %d to %d", 612 prev_mtu, netdev->max_mtu); 613 614 } else if (rc == ENA_XDP_CURRENT_MTU_TOO_LARGE) { 615 netif_err(adapter, drv, adapter->netdev, 616 "Failed to set xdp program, the current MTU (%d) is larger than the maximum allowed MTU (%lu) while xdp is on", 617 netdev->mtu, ENA_XDP_MAX_MTU); 618 NL_SET_ERR_MSG_MOD(bpf->extack, 619 "Failed to set xdp program, the current MTU is larger than the maximum allowed MTU. Check the dmesg for more info"); 620 return -EINVAL; 621 } else if (rc == ENA_XDP_NO_ENOUGH_QUEUES) { 622 netif_err(adapter, drv, adapter->netdev, 623 "Failed to set xdp program, the Rx/Tx channel count should be at most half of the maximum allowed channel count. The current queue count (%d), the maximal queue count (%d)\n", 624 adapter->num_io_queues, adapter->max_num_io_queues); 625 NL_SET_ERR_MSG_MOD(bpf->extack, 626 "Failed to set xdp program, there is no enough space for allocating XDP queues, Check the dmesg for more info"); 627 return -EINVAL; 628 } 629 630 return 0; 631 } 632 633 /* This is the main xdp callback, it's used by the kernel to set/unset the xdp 634 * program as well as to query the current xdp program id. 635 */ 636 static int ena_xdp(struct net_device *netdev, struct netdev_bpf *bpf) 637 { 638 switch (bpf->command) { 639 case XDP_SETUP_PROG: 640 return ena_xdp_set(netdev, bpf); 641 default: 642 return -EINVAL; 643 } 644 return 0; 645 } 646 647 static int ena_init_rx_cpu_rmap(struct ena_adapter *adapter) 648 { 649 #ifdef CONFIG_RFS_ACCEL 650 u32 i; 651 int rc; 652 653 adapter->netdev->rx_cpu_rmap = alloc_irq_cpu_rmap(adapter->num_io_queues); 654 if (!adapter->netdev->rx_cpu_rmap) 655 return -ENOMEM; 656 for (i = 0; i < adapter->num_io_queues; i++) { 657 int irq_idx = ENA_IO_IRQ_IDX(i); 658 659 rc = irq_cpu_rmap_add(adapter->netdev->rx_cpu_rmap, 660 pci_irq_vector(adapter->pdev, irq_idx)); 661 if (rc) { 662 free_irq_cpu_rmap(adapter->netdev->rx_cpu_rmap); 663 adapter->netdev->rx_cpu_rmap = NULL; 664 return rc; 665 } 666 } 667 #endif /* CONFIG_RFS_ACCEL */ 668 return 0; 669 } 670 671 static void ena_init_io_rings_common(struct ena_adapter *adapter, 672 struct ena_ring *ring, u16 qid) 673 { 674 ring->qid = qid; 675 ring->pdev = adapter->pdev; 676 ring->dev = &adapter->pdev->dev; 677 ring->netdev = adapter->netdev; 678 ring->napi = &adapter->ena_napi[qid].napi; 679 ring->adapter = adapter; 680 ring->ena_dev = adapter->ena_dev; 681 ring->per_napi_packets = 0; 682 ring->cpu = 0; 683 ring->first_interrupt = false; 684 ring->no_interrupt_event_cnt = 0; 685 u64_stats_init(&ring->syncp); 686 } 687 688 static void ena_init_io_rings(struct ena_adapter *adapter, 689 int first_index, int count) 690 { 691 struct ena_com_dev *ena_dev; 692 struct ena_ring *txr, *rxr; 693 int i; 694 695 ena_dev = adapter->ena_dev; 696 697 for (i = first_index; i < first_index + count; i++) { 698 txr = &adapter->tx_ring[i]; 699 rxr = &adapter->rx_ring[i]; 700 701 /* TX common ring state */ 702 ena_init_io_rings_common(adapter, txr, i); 703 704 /* TX specific ring state */ 705 txr->ring_size = adapter->requested_tx_ring_size; 706 txr->tx_max_header_size = ena_dev->tx_max_header_size; 707 txr->tx_mem_queue_type = ena_dev->tx_mem_queue_type; 708 txr->sgl_size = adapter->max_tx_sgl_size; 709 txr->smoothed_interval = 710 ena_com_get_nonadaptive_moderation_interval_tx(ena_dev); 711 txr->disable_meta_caching = adapter->disable_meta_caching; 712 spin_lock_init(&txr->xdp_tx_lock); 713 714 /* Don't init RX queues for xdp queues */ 715 if (!ENA_IS_XDP_INDEX(adapter, i)) { 716 /* RX common ring state */ 717 ena_init_io_rings_common(adapter, rxr, i); 718 719 /* RX specific ring state */ 720 rxr->ring_size = adapter->requested_rx_ring_size; 721 rxr->rx_copybreak = adapter->rx_copybreak; 722 rxr->sgl_size = adapter->max_rx_sgl_size; 723 rxr->smoothed_interval = 724 ena_com_get_nonadaptive_moderation_interval_rx(ena_dev); 725 rxr->empty_rx_queue = 0; 726 adapter->ena_napi[i].dim.mode = DIM_CQ_PERIOD_MODE_START_FROM_EQE; 727 } 728 } 729 } 730 731 /* ena_setup_tx_resources - allocate I/O Tx resources (Descriptors) 732 * @adapter: network interface device structure 733 * @qid: queue index 734 * 735 * Return 0 on success, negative on failure 736 */ 737 static int ena_setup_tx_resources(struct ena_adapter *adapter, int qid) 738 { 739 struct ena_ring *tx_ring = &adapter->tx_ring[qid]; 740 struct ena_irq *ena_irq = &adapter->irq_tbl[ENA_IO_IRQ_IDX(qid)]; 741 int size, i, node; 742 743 if (tx_ring->tx_buffer_info) { 744 netif_err(adapter, ifup, 745 adapter->netdev, "tx_buffer_info info is not NULL"); 746 return -EEXIST; 747 } 748 749 size = sizeof(struct ena_tx_buffer) * tx_ring->ring_size; 750 node = cpu_to_node(ena_irq->cpu); 751 752 tx_ring->tx_buffer_info = vzalloc_node(size, node); 753 if (!tx_ring->tx_buffer_info) { 754 tx_ring->tx_buffer_info = vzalloc(size); 755 if (!tx_ring->tx_buffer_info) 756 goto err_tx_buffer_info; 757 } 758 759 size = sizeof(u16) * tx_ring->ring_size; 760 tx_ring->free_ids = vzalloc_node(size, node); 761 if (!tx_ring->free_ids) { 762 tx_ring->free_ids = vzalloc(size); 763 if (!tx_ring->free_ids) 764 goto err_tx_free_ids; 765 } 766 767 size = tx_ring->tx_max_header_size; 768 tx_ring->push_buf_intermediate_buf = vzalloc_node(size, node); 769 if (!tx_ring->push_buf_intermediate_buf) { 770 tx_ring->push_buf_intermediate_buf = vzalloc(size); 771 if (!tx_ring->push_buf_intermediate_buf) 772 goto err_push_buf_intermediate_buf; 773 } 774 775 /* Req id ring for TX out of order completions */ 776 for (i = 0; i < tx_ring->ring_size; i++) 777 tx_ring->free_ids[i] = i; 778 779 /* Reset tx statistics */ 780 memset(&tx_ring->tx_stats, 0x0, sizeof(tx_ring->tx_stats)); 781 782 tx_ring->next_to_use = 0; 783 tx_ring->next_to_clean = 0; 784 tx_ring->cpu = ena_irq->cpu; 785 return 0; 786 787 err_push_buf_intermediate_buf: 788 vfree(tx_ring->free_ids); 789 tx_ring->free_ids = NULL; 790 err_tx_free_ids: 791 vfree(tx_ring->tx_buffer_info); 792 tx_ring->tx_buffer_info = NULL; 793 err_tx_buffer_info: 794 return -ENOMEM; 795 } 796 797 /* ena_free_tx_resources - Free I/O Tx Resources per Queue 798 * @adapter: network interface device structure 799 * @qid: queue index 800 * 801 * Free all transmit software resources 802 */ 803 static void ena_free_tx_resources(struct ena_adapter *adapter, int qid) 804 { 805 struct ena_ring *tx_ring = &adapter->tx_ring[qid]; 806 807 vfree(tx_ring->tx_buffer_info); 808 tx_ring->tx_buffer_info = NULL; 809 810 vfree(tx_ring->free_ids); 811 tx_ring->free_ids = NULL; 812 813 vfree(tx_ring->push_buf_intermediate_buf); 814 tx_ring->push_buf_intermediate_buf = NULL; 815 } 816 817 static int ena_setup_tx_resources_in_range(struct ena_adapter *adapter, 818 int first_index, 819 int count) 820 { 821 int i, rc = 0; 822 823 for (i = first_index; i < first_index + count; i++) { 824 rc = ena_setup_tx_resources(adapter, i); 825 if (rc) 826 goto err_setup_tx; 827 } 828 829 return 0; 830 831 err_setup_tx: 832 833 netif_err(adapter, ifup, adapter->netdev, 834 "Tx queue %d: allocation failed\n", i); 835 836 /* rewind the index freeing the rings as we go */ 837 while (first_index < i--) 838 ena_free_tx_resources(adapter, i); 839 return rc; 840 } 841 842 static void ena_free_all_io_tx_resources_in_range(struct ena_adapter *adapter, 843 int first_index, int count) 844 { 845 int i; 846 847 for (i = first_index; i < first_index + count; i++) 848 ena_free_tx_resources(adapter, i); 849 } 850 851 /* ena_free_all_io_tx_resources - Free I/O Tx Resources for All Queues 852 * @adapter: board private structure 853 * 854 * Free all transmit software resources 855 */ 856 static void ena_free_all_io_tx_resources(struct ena_adapter *adapter) 857 { 858 ena_free_all_io_tx_resources_in_range(adapter, 859 0, 860 adapter->xdp_num_queues + 861 adapter->num_io_queues); 862 } 863 864 /* ena_setup_rx_resources - allocate I/O Rx resources (Descriptors) 865 * @adapter: network interface device structure 866 * @qid: queue index 867 * 868 * Returns 0 on success, negative on failure 869 */ 870 static int ena_setup_rx_resources(struct ena_adapter *adapter, 871 u32 qid) 872 { 873 struct ena_ring *rx_ring = &adapter->rx_ring[qid]; 874 struct ena_irq *ena_irq = &adapter->irq_tbl[ENA_IO_IRQ_IDX(qid)]; 875 int size, node, i; 876 877 if (rx_ring->rx_buffer_info) { 878 netif_err(adapter, ifup, adapter->netdev, 879 "rx_buffer_info is not NULL"); 880 return -EEXIST; 881 } 882 883 /* alloc extra element so in rx path 884 * we can always prefetch rx_info + 1 885 */ 886 size = sizeof(struct ena_rx_buffer) * (rx_ring->ring_size + 1); 887 node = cpu_to_node(ena_irq->cpu); 888 889 rx_ring->rx_buffer_info = vzalloc_node(size, node); 890 if (!rx_ring->rx_buffer_info) { 891 rx_ring->rx_buffer_info = vzalloc(size); 892 if (!rx_ring->rx_buffer_info) 893 return -ENOMEM; 894 } 895 896 size = sizeof(u16) * rx_ring->ring_size; 897 rx_ring->free_ids = vzalloc_node(size, node); 898 if (!rx_ring->free_ids) { 899 rx_ring->free_ids = vzalloc(size); 900 if (!rx_ring->free_ids) { 901 vfree(rx_ring->rx_buffer_info); 902 rx_ring->rx_buffer_info = NULL; 903 return -ENOMEM; 904 } 905 } 906 907 /* Req id ring for receiving RX pkts out of order */ 908 for (i = 0; i < rx_ring->ring_size; i++) 909 rx_ring->free_ids[i] = i; 910 911 /* Reset rx statistics */ 912 memset(&rx_ring->rx_stats, 0x0, sizeof(rx_ring->rx_stats)); 913 914 rx_ring->next_to_clean = 0; 915 rx_ring->next_to_use = 0; 916 rx_ring->cpu = ena_irq->cpu; 917 918 return 0; 919 } 920 921 /* ena_free_rx_resources - Free I/O Rx Resources 922 * @adapter: network interface device structure 923 * @qid: queue index 924 * 925 * Free all receive software resources 926 */ 927 static void ena_free_rx_resources(struct ena_adapter *adapter, 928 u32 qid) 929 { 930 struct ena_ring *rx_ring = &adapter->rx_ring[qid]; 931 932 vfree(rx_ring->rx_buffer_info); 933 rx_ring->rx_buffer_info = NULL; 934 935 vfree(rx_ring->free_ids); 936 rx_ring->free_ids = NULL; 937 } 938 939 /* ena_setup_all_rx_resources - allocate I/O Rx queues resources for all queues 940 * @adapter: board private structure 941 * 942 * Return 0 on success, negative on failure 943 */ 944 static int ena_setup_all_rx_resources(struct ena_adapter *adapter) 945 { 946 int i, rc = 0; 947 948 for (i = 0; i < adapter->num_io_queues; i++) { 949 rc = ena_setup_rx_resources(adapter, i); 950 if (rc) 951 goto err_setup_rx; 952 } 953 954 return 0; 955 956 err_setup_rx: 957 958 netif_err(adapter, ifup, adapter->netdev, 959 "Rx queue %d: allocation failed\n", i); 960 961 /* rewind the index freeing the rings as we go */ 962 while (i--) 963 ena_free_rx_resources(adapter, i); 964 return rc; 965 } 966 967 /* ena_free_all_io_rx_resources - Free I/O Rx Resources for All Queues 968 * @adapter: board private structure 969 * 970 * Free all receive software resources 971 */ 972 static void ena_free_all_io_rx_resources(struct ena_adapter *adapter) 973 { 974 int i; 975 976 for (i = 0; i < adapter->num_io_queues; i++) 977 ena_free_rx_resources(adapter, i); 978 } 979 980 static int ena_alloc_rx_page(struct ena_ring *rx_ring, 981 struct ena_rx_buffer *rx_info, gfp_t gfp) 982 { 983 int headroom = rx_ring->rx_headroom; 984 struct ena_com_buf *ena_buf; 985 struct page *page; 986 dma_addr_t dma; 987 988 /* restore page offset value in case it has been changed by device */ 989 rx_info->page_offset = headroom; 990 991 /* if previous allocated page is not used */ 992 if (unlikely(rx_info->page)) 993 return 0; 994 995 page = alloc_page(gfp); 996 if (unlikely(!page)) { 997 ena_increase_stat(&rx_ring->rx_stats.page_alloc_fail, 1, 998 &rx_ring->syncp); 999 return -ENOMEM; 1000 } 1001 1002 /* To enable NIC-side port-mirroring, AKA SPAN port, 1003 * we make the buffer readable from the nic as well 1004 */ 1005 dma = dma_map_page(rx_ring->dev, page, 0, ENA_PAGE_SIZE, 1006 DMA_BIDIRECTIONAL); 1007 if (unlikely(dma_mapping_error(rx_ring->dev, dma))) { 1008 ena_increase_stat(&rx_ring->rx_stats.dma_mapping_err, 1, 1009 &rx_ring->syncp); 1010 1011 __free_page(page); 1012 return -EIO; 1013 } 1014 netif_dbg(rx_ring->adapter, rx_status, rx_ring->netdev, 1015 "Allocate page %p, rx_info %p\n", page, rx_info); 1016 1017 rx_info->page = page; 1018 ena_buf = &rx_info->ena_buf; 1019 ena_buf->paddr = dma + headroom; 1020 ena_buf->len = ENA_PAGE_SIZE - headroom; 1021 1022 return 0; 1023 } 1024 1025 static void ena_unmap_rx_buff(struct ena_ring *rx_ring, 1026 struct ena_rx_buffer *rx_info) 1027 { 1028 struct ena_com_buf *ena_buf = &rx_info->ena_buf; 1029 1030 dma_unmap_page(rx_ring->dev, ena_buf->paddr - rx_ring->rx_headroom, 1031 ENA_PAGE_SIZE, 1032 DMA_BIDIRECTIONAL); 1033 } 1034 1035 static void ena_free_rx_page(struct ena_ring *rx_ring, 1036 struct ena_rx_buffer *rx_info) 1037 { 1038 struct page *page = rx_info->page; 1039 1040 if (unlikely(!page)) { 1041 netif_warn(rx_ring->adapter, rx_err, rx_ring->netdev, 1042 "Trying to free unallocated buffer\n"); 1043 return; 1044 } 1045 1046 ena_unmap_rx_buff(rx_ring, rx_info); 1047 1048 __free_page(page); 1049 rx_info->page = NULL; 1050 } 1051 1052 static int ena_refill_rx_bufs(struct ena_ring *rx_ring, u32 num) 1053 { 1054 u16 next_to_use, req_id; 1055 u32 i; 1056 int rc; 1057 1058 next_to_use = rx_ring->next_to_use; 1059 1060 for (i = 0; i < num; i++) { 1061 struct ena_rx_buffer *rx_info; 1062 1063 req_id = rx_ring->free_ids[next_to_use]; 1064 1065 rx_info = &rx_ring->rx_buffer_info[req_id]; 1066 1067 rc = ena_alloc_rx_page(rx_ring, rx_info, 1068 GFP_ATOMIC | __GFP_COMP); 1069 if (unlikely(rc < 0)) { 1070 netif_warn(rx_ring->adapter, rx_err, rx_ring->netdev, 1071 "Failed to allocate buffer for rx queue %d\n", 1072 rx_ring->qid); 1073 break; 1074 } 1075 rc = ena_com_add_single_rx_desc(rx_ring->ena_com_io_sq, 1076 &rx_info->ena_buf, 1077 req_id); 1078 if (unlikely(rc)) { 1079 netif_warn(rx_ring->adapter, rx_status, rx_ring->netdev, 1080 "Failed to add buffer for rx queue %d\n", 1081 rx_ring->qid); 1082 break; 1083 } 1084 next_to_use = ENA_RX_RING_IDX_NEXT(next_to_use, 1085 rx_ring->ring_size); 1086 } 1087 1088 if (unlikely(i < num)) { 1089 ena_increase_stat(&rx_ring->rx_stats.refil_partial, 1, 1090 &rx_ring->syncp); 1091 netif_warn(rx_ring->adapter, rx_err, rx_ring->netdev, 1092 "Refilled rx qid %d with only %d buffers (from %d)\n", 1093 rx_ring->qid, i, num); 1094 } 1095 1096 /* ena_com_write_sq_doorbell issues a wmb() */ 1097 if (likely(i)) 1098 ena_com_write_sq_doorbell(rx_ring->ena_com_io_sq); 1099 1100 rx_ring->next_to_use = next_to_use; 1101 1102 return i; 1103 } 1104 1105 static void ena_free_rx_bufs(struct ena_adapter *adapter, 1106 u32 qid) 1107 { 1108 struct ena_ring *rx_ring = &adapter->rx_ring[qid]; 1109 u32 i; 1110 1111 for (i = 0; i < rx_ring->ring_size; i++) { 1112 struct ena_rx_buffer *rx_info = &rx_ring->rx_buffer_info[i]; 1113 1114 if (rx_info->page) 1115 ena_free_rx_page(rx_ring, rx_info); 1116 } 1117 } 1118 1119 /* ena_refill_all_rx_bufs - allocate all queues Rx buffers 1120 * @adapter: board private structure 1121 */ 1122 static void ena_refill_all_rx_bufs(struct ena_adapter *adapter) 1123 { 1124 struct ena_ring *rx_ring; 1125 int i, rc, bufs_num; 1126 1127 for (i = 0; i < adapter->num_io_queues; i++) { 1128 rx_ring = &adapter->rx_ring[i]; 1129 bufs_num = rx_ring->ring_size - 1; 1130 rc = ena_refill_rx_bufs(rx_ring, bufs_num); 1131 1132 if (unlikely(rc != bufs_num)) 1133 netif_warn(rx_ring->adapter, rx_status, rx_ring->netdev, 1134 "Refilling Queue %d failed. allocated %d buffers from: %d\n", 1135 i, rc, bufs_num); 1136 } 1137 } 1138 1139 static void ena_free_all_rx_bufs(struct ena_adapter *adapter) 1140 { 1141 int i; 1142 1143 for (i = 0; i < adapter->num_io_queues; i++) 1144 ena_free_rx_bufs(adapter, i); 1145 } 1146 1147 static void ena_unmap_tx_buff(struct ena_ring *tx_ring, 1148 struct ena_tx_buffer *tx_info) 1149 { 1150 struct ena_com_buf *ena_buf; 1151 u32 cnt; 1152 int i; 1153 1154 ena_buf = tx_info->bufs; 1155 cnt = tx_info->num_of_bufs; 1156 1157 if (unlikely(!cnt)) 1158 return; 1159 1160 if (tx_info->map_linear_data) { 1161 dma_unmap_single(tx_ring->dev, 1162 dma_unmap_addr(ena_buf, paddr), 1163 dma_unmap_len(ena_buf, len), 1164 DMA_TO_DEVICE); 1165 ena_buf++; 1166 cnt--; 1167 } 1168 1169 /* unmap remaining mapped pages */ 1170 for (i = 0; i < cnt; i++) { 1171 dma_unmap_page(tx_ring->dev, dma_unmap_addr(ena_buf, paddr), 1172 dma_unmap_len(ena_buf, len), DMA_TO_DEVICE); 1173 ena_buf++; 1174 } 1175 } 1176 1177 /* ena_free_tx_bufs - Free Tx Buffers per Queue 1178 * @tx_ring: TX ring for which buffers be freed 1179 */ 1180 static void ena_free_tx_bufs(struct ena_ring *tx_ring) 1181 { 1182 bool print_once = true; 1183 u32 i; 1184 1185 for (i = 0; i < tx_ring->ring_size; i++) { 1186 struct ena_tx_buffer *tx_info = &tx_ring->tx_buffer_info[i]; 1187 1188 if (!tx_info->skb) 1189 continue; 1190 1191 if (print_once) { 1192 netif_notice(tx_ring->adapter, ifdown, tx_ring->netdev, 1193 "Free uncompleted tx skb qid %d idx 0x%x\n", 1194 tx_ring->qid, i); 1195 print_once = false; 1196 } else { 1197 netif_dbg(tx_ring->adapter, ifdown, tx_ring->netdev, 1198 "Free uncompleted tx skb qid %d idx 0x%x\n", 1199 tx_ring->qid, i); 1200 } 1201 1202 ena_unmap_tx_buff(tx_ring, tx_info); 1203 1204 dev_kfree_skb_any(tx_info->skb); 1205 } 1206 netdev_tx_reset_queue(netdev_get_tx_queue(tx_ring->netdev, 1207 tx_ring->qid)); 1208 } 1209 1210 static void ena_free_all_tx_bufs(struct ena_adapter *adapter) 1211 { 1212 struct ena_ring *tx_ring; 1213 int i; 1214 1215 for (i = 0; i < adapter->num_io_queues + adapter->xdp_num_queues; i++) { 1216 tx_ring = &adapter->tx_ring[i]; 1217 ena_free_tx_bufs(tx_ring); 1218 } 1219 } 1220 1221 static void ena_destroy_all_tx_queues(struct ena_adapter *adapter) 1222 { 1223 u16 ena_qid; 1224 int i; 1225 1226 for (i = 0; i < adapter->num_io_queues + adapter->xdp_num_queues; i++) { 1227 ena_qid = ENA_IO_TXQ_IDX(i); 1228 ena_com_destroy_io_queue(adapter->ena_dev, ena_qid); 1229 } 1230 } 1231 1232 static void ena_destroy_all_rx_queues(struct ena_adapter *adapter) 1233 { 1234 u16 ena_qid; 1235 int i; 1236 1237 for (i = 0; i < adapter->num_io_queues; i++) { 1238 ena_qid = ENA_IO_RXQ_IDX(i); 1239 cancel_work_sync(&adapter->ena_napi[i].dim.work); 1240 ena_com_destroy_io_queue(adapter->ena_dev, ena_qid); 1241 } 1242 } 1243 1244 static void ena_destroy_all_io_queues(struct ena_adapter *adapter) 1245 { 1246 ena_destroy_all_tx_queues(adapter); 1247 ena_destroy_all_rx_queues(adapter); 1248 } 1249 1250 static int handle_invalid_req_id(struct ena_ring *ring, u16 req_id, 1251 struct ena_tx_buffer *tx_info, bool is_xdp) 1252 { 1253 if (tx_info) 1254 netif_err(ring->adapter, 1255 tx_done, 1256 ring->netdev, 1257 "tx_info doesn't have valid %s", 1258 is_xdp ? "xdp frame" : "skb"); 1259 else 1260 netif_err(ring->adapter, 1261 tx_done, 1262 ring->netdev, 1263 "Invalid req_id: %hu\n", 1264 req_id); 1265 1266 ena_increase_stat(&ring->tx_stats.bad_req_id, 1, &ring->syncp); 1267 1268 /* Trigger device reset */ 1269 ring->adapter->reset_reason = ENA_REGS_RESET_INV_TX_REQ_ID; 1270 set_bit(ENA_FLAG_TRIGGER_RESET, &ring->adapter->flags); 1271 return -EFAULT; 1272 } 1273 1274 static int validate_tx_req_id(struct ena_ring *tx_ring, u16 req_id) 1275 { 1276 struct ena_tx_buffer *tx_info = NULL; 1277 1278 if (likely(req_id < tx_ring->ring_size)) { 1279 tx_info = &tx_ring->tx_buffer_info[req_id]; 1280 if (likely(tx_info->skb)) 1281 return 0; 1282 } 1283 1284 return handle_invalid_req_id(tx_ring, req_id, tx_info, false); 1285 } 1286 1287 static int validate_xdp_req_id(struct ena_ring *xdp_ring, u16 req_id) 1288 { 1289 struct ena_tx_buffer *tx_info = NULL; 1290 1291 if (likely(req_id < xdp_ring->ring_size)) { 1292 tx_info = &xdp_ring->tx_buffer_info[req_id]; 1293 if (likely(tx_info->xdpf)) 1294 return 0; 1295 } 1296 1297 return handle_invalid_req_id(xdp_ring, req_id, tx_info, true); 1298 } 1299 1300 static int ena_clean_tx_irq(struct ena_ring *tx_ring, u32 budget) 1301 { 1302 struct netdev_queue *txq; 1303 bool above_thresh; 1304 u32 tx_bytes = 0; 1305 u32 total_done = 0; 1306 u16 next_to_clean; 1307 u16 req_id; 1308 int tx_pkts = 0; 1309 int rc; 1310 1311 next_to_clean = tx_ring->next_to_clean; 1312 txq = netdev_get_tx_queue(tx_ring->netdev, tx_ring->qid); 1313 1314 while (tx_pkts < budget) { 1315 struct ena_tx_buffer *tx_info; 1316 struct sk_buff *skb; 1317 1318 rc = ena_com_tx_comp_req_id_get(tx_ring->ena_com_io_cq, 1319 &req_id); 1320 if (rc) 1321 break; 1322 1323 rc = validate_tx_req_id(tx_ring, req_id); 1324 if (rc) 1325 break; 1326 1327 tx_info = &tx_ring->tx_buffer_info[req_id]; 1328 skb = tx_info->skb; 1329 1330 /* prefetch skb_end_pointer() to speedup skb_shinfo(skb) */ 1331 prefetch(&skb->end); 1332 1333 tx_info->skb = NULL; 1334 tx_info->last_jiffies = 0; 1335 1336 ena_unmap_tx_buff(tx_ring, tx_info); 1337 1338 netif_dbg(tx_ring->adapter, tx_done, tx_ring->netdev, 1339 "tx_poll: q %d skb %p completed\n", tx_ring->qid, 1340 skb); 1341 1342 tx_bytes += skb->len; 1343 dev_kfree_skb(skb); 1344 tx_pkts++; 1345 total_done += tx_info->tx_descs; 1346 1347 tx_ring->free_ids[next_to_clean] = req_id; 1348 next_to_clean = ENA_TX_RING_IDX_NEXT(next_to_clean, 1349 tx_ring->ring_size); 1350 } 1351 1352 tx_ring->next_to_clean = next_to_clean; 1353 ena_com_comp_ack(tx_ring->ena_com_io_sq, total_done); 1354 ena_com_update_dev_comp_head(tx_ring->ena_com_io_cq); 1355 1356 netdev_tx_completed_queue(txq, tx_pkts, tx_bytes); 1357 1358 netif_dbg(tx_ring->adapter, tx_done, tx_ring->netdev, 1359 "tx_poll: q %d done. total pkts: %d\n", 1360 tx_ring->qid, tx_pkts); 1361 1362 /* need to make the rings circular update visible to 1363 * ena_start_xmit() before checking for netif_queue_stopped(). 1364 */ 1365 smp_mb(); 1366 1367 above_thresh = ena_com_sq_have_enough_space(tx_ring->ena_com_io_sq, 1368 ENA_TX_WAKEUP_THRESH); 1369 if (unlikely(netif_tx_queue_stopped(txq) && above_thresh)) { 1370 __netif_tx_lock(txq, smp_processor_id()); 1371 above_thresh = 1372 ena_com_sq_have_enough_space(tx_ring->ena_com_io_sq, 1373 ENA_TX_WAKEUP_THRESH); 1374 if (netif_tx_queue_stopped(txq) && above_thresh && 1375 test_bit(ENA_FLAG_DEV_UP, &tx_ring->adapter->flags)) { 1376 netif_tx_wake_queue(txq); 1377 ena_increase_stat(&tx_ring->tx_stats.queue_wakeup, 1, 1378 &tx_ring->syncp); 1379 } 1380 __netif_tx_unlock(txq); 1381 } 1382 1383 return tx_pkts; 1384 } 1385 1386 static struct sk_buff *ena_alloc_skb(struct ena_ring *rx_ring, bool frags) 1387 { 1388 struct sk_buff *skb; 1389 1390 if (frags) 1391 skb = napi_get_frags(rx_ring->napi); 1392 else 1393 skb = netdev_alloc_skb_ip_align(rx_ring->netdev, 1394 rx_ring->rx_copybreak); 1395 1396 if (unlikely(!skb)) { 1397 ena_increase_stat(&rx_ring->rx_stats.skb_alloc_fail, 1, 1398 &rx_ring->syncp); 1399 netif_dbg(rx_ring->adapter, rx_err, rx_ring->netdev, 1400 "Failed to allocate skb. frags: %d\n", frags); 1401 return NULL; 1402 } 1403 1404 return skb; 1405 } 1406 1407 static struct sk_buff *ena_rx_skb(struct ena_ring *rx_ring, 1408 struct ena_com_rx_buf_info *ena_bufs, 1409 u32 descs, 1410 u16 *next_to_clean) 1411 { 1412 struct sk_buff *skb; 1413 struct ena_rx_buffer *rx_info; 1414 u16 len, req_id, buf = 0; 1415 void *va; 1416 1417 len = ena_bufs[buf].len; 1418 req_id = ena_bufs[buf].req_id; 1419 1420 rx_info = &rx_ring->rx_buffer_info[req_id]; 1421 1422 if (unlikely(!rx_info->page)) { 1423 netif_err(rx_ring->adapter, rx_err, rx_ring->netdev, 1424 "Page is NULL\n"); 1425 return NULL; 1426 } 1427 1428 netif_dbg(rx_ring->adapter, rx_status, rx_ring->netdev, 1429 "rx_info %p page %p\n", 1430 rx_info, rx_info->page); 1431 1432 /* save virt address of first buffer */ 1433 va = page_address(rx_info->page) + rx_info->page_offset; 1434 1435 prefetch(va); 1436 1437 if (len <= rx_ring->rx_copybreak) { 1438 skb = ena_alloc_skb(rx_ring, false); 1439 if (unlikely(!skb)) 1440 return NULL; 1441 1442 netif_dbg(rx_ring->adapter, rx_status, rx_ring->netdev, 1443 "RX allocated small packet. len %d. data_len %d\n", 1444 skb->len, skb->data_len); 1445 1446 /* sync this buffer for CPU use */ 1447 dma_sync_single_for_cpu(rx_ring->dev, 1448 dma_unmap_addr(&rx_info->ena_buf, paddr), 1449 len, 1450 DMA_FROM_DEVICE); 1451 skb_copy_to_linear_data(skb, va, len); 1452 dma_sync_single_for_device(rx_ring->dev, 1453 dma_unmap_addr(&rx_info->ena_buf, paddr), 1454 len, 1455 DMA_FROM_DEVICE); 1456 1457 skb_put(skb, len); 1458 skb->protocol = eth_type_trans(skb, rx_ring->netdev); 1459 rx_ring->free_ids[*next_to_clean] = req_id; 1460 *next_to_clean = ENA_RX_RING_IDX_ADD(*next_to_clean, descs, 1461 rx_ring->ring_size); 1462 return skb; 1463 } 1464 1465 skb = ena_alloc_skb(rx_ring, true); 1466 if (unlikely(!skb)) 1467 return NULL; 1468 1469 do { 1470 ena_unmap_rx_buff(rx_ring, rx_info); 1471 1472 skb_add_rx_frag(skb, skb_shinfo(skb)->nr_frags, rx_info->page, 1473 rx_info->page_offset, len, ENA_PAGE_SIZE); 1474 1475 netif_dbg(rx_ring->adapter, rx_status, rx_ring->netdev, 1476 "RX skb updated. len %d. data_len %d\n", 1477 skb->len, skb->data_len); 1478 1479 rx_info->page = NULL; 1480 1481 rx_ring->free_ids[*next_to_clean] = req_id; 1482 *next_to_clean = 1483 ENA_RX_RING_IDX_NEXT(*next_to_clean, 1484 rx_ring->ring_size); 1485 if (likely(--descs == 0)) 1486 break; 1487 1488 buf++; 1489 len = ena_bufs[buf].len; 1490 req_id = ena_bufs[buf].req_id; 1491 1492 rx_info = &rx_ring->rx_buffer_info[req_id]; 1493 } while (1); 1494 1495 return skb; 1496 } 1497 1498 /* ena_rx_checksum - indicate in skb if hw indicated a good cksum 1499 * @adapter: structure containing adapter specific data 1500 * @ena_rx_ctx: received packet context/metadata 1501 * @skb: skb currently being received and modified 1502 */ 1503 static void ena_rx_checksum(struct ena_ring *rx_ring, 1504 struct ena_com_rx_ctx *ena_rx_ctx, 1505 struct sk_buff *skb) 1506 { 1507 /* Rx csum disabled */ 1508 if (unlikely(!(rx_ring->netdev->features & NETIF_F_RXCSUM))) { 1509 skb->ip_summed = CHECKSUM_NONE; 1510 return; 1511 } 1512 1513 /* For fragmented packets the checksum isn't valid */ 1514 if (ena_rx_ctx->frag) { 1515 skb->ip_summed = CHECKSUM_NONE; 1516 return; 1517 } 1518 1519 /* if IP and error */ 1520 if (unlikely((ena_rx_ctx->l3_proto == ENA_ETH_IO_L3_PROTO_IPV4) && 1521 (ena_rx_ctx->l3_csum_err))) { 1522 /* ipv4 checksum error */ 1523 skb->ip_summed = CHECKSUM_NONE; 1524 ena_increase_stat(&rx_ring->rx_stats.bad_csum, 1, 1525 &rx_ring->syncp); 1526 netif_dbg(rx_ring->adapter, rx_err, rx_ring->netdev, 1527 "RX IPv4 header checksum error\n"); 1528 return; 1529 } 1530 1531 /* if TCP/UDP */ 1532 if (likely((ena_rx_ctx->l4_proto == ENA_ETH_IO_L4_PROTO_TCP) || 1533 (ena_rx_ctx->l4_proto == ENA_ETH_IO_L4_PROTO_UDP))) { 1534 if (unlikely(ena_rx_ctx->l4_csum_err)) { 1535 /* TCP/UDP checksum error */ 1536 ena_increase_stat(&rx_ring->rx_stats.bad_csum, 1, 1537 &rx_ring->syncp); 1538 netif_dbg(rx_ring->adapter, rx_err, rx_ring->netdev, 1539 "RX L4 checksum error\n"); 1540 skb->ip_summed = CHECKSUM_NONE; 1541 return; 1542 } 1543 1544 if (likely(ena_rx_ctx->l4_csum_checked)) { 1545 skb->ip_summed = CHECKSUM_UNNECESSARY; 1546 ena_increase_stat(&rx_ring->rx_stats.csum_good, 1, 1547 &rx_ring->syncp); 1548 } else { 1549 ena_increase_stat(&rx_ring->rx_stats.csum_unchecked, 1, 1550 &rx_ring->syncp); 1551 skb->ip_summed = CHECKSUM_NONE; 1552 } 1553 } else { 1554 skb->ip_summed = CHECKSUM_NONE; 1555 return; 1556 } 1557 1558 } 1559 1560 static void ena_set_rx_hash(struct ena_ring *rx_ring, 1561 struct ena_com_rx_ctx *ena_rx_ctx, 1562 struct sk_buff *skb) 1563 { 1564 enum pkt_hash_types hash_type; 1565 1566 if (likely(rx_ring->netdev->features & NETIF_F_RXHASH)) { 1567 if (likely((ena_rx_ctx->l4_proto == ENA_ETH_IO_L4_PROTO_TCP) || 1568 (ena_rx_ctx->l4_proto == ENA_ETH_IO_L4_PROTO_UDP))) 1569 1570 hash_type = PKT_HASH_TYPE_L4; 1571 else 1572 hash_type = PKT_HASH_TYPE_NONE; 1573 1574 /* Override hash type if the packet is fragmented */ 1575 if (ena_rx_ctx->frag) 1576 hash_type = PKT_HASH_TYPE_NONE; 1577 1578 skb_set_hash(skb, ena_rx_ctx->hash, hash_type); 1579 } 1580 } 1581 1582 static int ena_xdp_handle_buff(struct ena_ring *rx_ring, struct xdp_buff *xdp) 1583 { 1584 struct ena_rx_buffer *rx_info; 1585 int ret; 1586 1587 rx_info = &rx_ring->rx_buffer_info[rx_ring->ena_bufs[0].req_id]; 1588 xdp_prepare_buff(xdp, page_address(rx_info->page), 1589 rx_info->page_offset, 1590 rx_ring->ena_bufs[0].len, false); 1591 /* If for some reason we received a bigger packet than 1592 * we expect, then we simply drop it 1593 */ 1594 if (unlikely(rx_ring->ena_bufs[0].len > ENA_XDP_MAX_MTU)) 1595 return XDP_DROP; 1596 1597 ret = ena_xdp_execute(rx_ring, xdp); 1598 1599 /* The xdp program might expand the headers */ 1600 if (ret == XDP_PASS) { 1601 rx_info->page_offset = xdp->data - xdp->data_hard_start; 1602 rx_ring->ena_bufs[0].len = xdp->data_end - xdp->data; 1603 } 1604 1605 return ret; 1606 } 1607 /* ena_clean_rx_irq - Cleanup RX irq 1608 * @rx_ring: RX ring to clean 1609 * @napi: napi handler 1610 * @budget: how many packets driver is allowed to clean 1611 * 1612 * Returns the number of cleaned buffers. 1613 */ 1614 static int ena_clean_rx_irq(struct ena_ring *rx_ring, struct napi_struct *napi, 1615 u32 budget) 1616 { 1617 u16 next_to_clean = rx_ring->next_to_clean; 1618 struct ena_com_rx_ctx ena_rx_ctx; 1619 struct ena_rx_buffer *rx_info; 1620 struct ena_adapter *adapter; 1621 u32 res_budget, work_done; 1622 int rx_copybreak_pkt = 0; 1623 int refill_threshold; 1624 struct sk_buff *skb; 1625 int refill_required; 1626 struct xdp_buff xdp; 1627 int xdp_flags = 0; 1628 int total_len = 0; 1629 int xdp_verdict; 1630 int rc = 0; 1631 int i; 1632 1633 netif_dbg(rx_ring->adapter, rx_status, rx_ring->netdev, 1634 "%s qid %d\n", __func__, rx_ring->qid); 1635 res_budget = budget; 1636 xdp_init_buff(&xdp, ENA_PAGE_SIZE, &rx_ring->xdp_rxq); 1637 1638 do { 1639 xdp_verdict = XDP_PASS; 1640 skb = NULL; 1641 ena_rx_ctx.ena_bufs = rx_ring->ena_bufs; 1642 ena_rx_ctx.max_bufs = rx_ring->sgl_size; 1643 ena_rx_ctx.descs = 0; 1644 ena_rx_ctx.pkt_offset = 0; 1645 rc = ena_com_rx_pkt(rx_ring->ena_com_io_cq, 1646 rx_ring->ena_com_io_sq, 1647 &ena_rx_ctx); 1648 if (unlikely(rc)) 1649 goto error; 1650 1651 if (unlikely(ena_rx_ctx.descs == 0)) 1652 break; 1653 1654 /* First descriptor might have an offset set by the device */ 1655 rx_info = &rx_ring->rx_buffer_info[rx_ring->ena_bufs[0].req_id]; 1656 rx_info->page_offset += ena_rx_ctx.pkt_offset; 1657 1658 netif_dbg(rx_ring->adapter, rx_status, rx_ring->netdev, 1659 "rx_poll: q %d got packet from ena. descs #: %d l3 proto %d l4 proto %d hash: %x\n", 1660 rx_ring->qid, ena_rx_ctx.descs, ena_rx_ctx.l3_proto, 1661 ena_rx_ctx.l4_proto, ena_rx_ctx.hash); 1662 1663 if (ena_xdp_present_ring(rx_ring)) 1664 xdp_verdict = ena_xdp_handle_buff(rx_ring, &xdp); 1665 1666 /* allocate skb and fill it */ 1667 if (xdp_verdict == XDP_PASS) 1668 skb = ena_rx_skb(rx_ring, 1669 rx_ring->ena_bufs, 1670 ena_rx_ctx.descs, 1671 &next_to_clean); 1672 1673 if (unlikely(!skb)) { 1674 for (i = 0; i < ena_rx_ctx.descs; i++) { 1675 int req_id = rx_ring->ena_bufs[i].req_id; 1676 1677 rx_ring->free_ids[next_to_clean] = req_id; 1678 next_to_clean = 1679 ENA_RX_RING_IDX_NEXT(next_to_clean, 1680 rx_ring->ring_size); 1681 1682 /* Packets was passed for transmission, unmap it 1683 * from RX side. 1684 */ 1685 if (xdp_verdict == XDP_TX || xdp_verdict == XDP_REDIRECT) { 1686 ena_unmap_rx_buff(rx_ring, 1687 &rx_ring->rx_buffer_info[req_id]); 1688 rx_ring->rx_buffer_info[req_id].page = NULL; 1689 } 1690 } 1691 if (xdp_verdict != XDP_PASS) { 1692 xdp_flags |= xdp_verdict; 1693 res_budget--; 1694 continue; 1695 } 1696 break; 1697 } 1698 1699 ena_rx_checksum(rx_ring, &ena_rx_ctx, skb); 1700 1701 ena_set_rx_hash(rx_ring, &ena_rx_ctx, skb); 1702 1703 skb_record_rx_queue(skb, rx_ring->qid); 1704 1705 if (rx_ring->ena_bufs[0].len <= rx_ring->rx_copybreak) { 1706 total_len += rx_ring->ena_bufs[0].len; 1707 rx_copybreak_pkt++; 1708 napi_gro_receive(napi, skb); 1709 } else { 1710 total_len += skb->len; 1711 napi_gro_frags(napi); 1712 } 1713 1714 res_budget--; 1715 } while (likely(res_budget)); 1716 1717 work_done = budget - res_budget; 1718 rx_ring->per_napi_packets += work_done; 1719 u64_stats_update_begin(&rx_ring->syncp); 1720 rx_ring->rx_stats.bytes += total_len; 1721 rx_ring->rx_stats.cnt += work_done; 1722 rx_ring->rx_stats.rx_copybreak_pkt += rx_copybreak_pkt; 1723 u64_stats_update_end(&rx_ring->syncp); 1724 1725 rx_ring->next_to_clean = next_to_clean; 1726 1727 refill_required = ena_com_free_q_entries(rx_ring->ena_com_io_sq); 1728 refill_threshold = 1729 min_t(int, rx_ring->ring_size / ENA_RX_REFILL_THRESH_DIVIDER, 1730 ENA_RX_REFILL_THRESH_PACKET); 1731 1732 /* Optimization, try to batch new rx buffers */ 1733 if (refill_required > refill_threshold) { 1734 ena_com_update_dev_comp_head(rx_ring->ena_com_io_cq); 1735 ena_refill_rx_bufs(rx_ring, refill_required); 1736 } 1737 1738 if (xdp_flags & XDP_REDIRECT) 1739 xdp_do_flush_map(); 1740 1741 return work_done; 1742 1743 error: 1744 adapter = netdev_priv(rx_ring->netdev); 1745 1746 if (rc == -ENOSPC) { 1747 ena_increase_stat(&rx_ring->rx_stats.bad_desc_num, 1, 1748 &rx_ring->syncp); 1749 adapter->reset_reason = ENA_REGS_RESET_TOO_MANY_RX_DESCS; 1750 } else { 1751 ena_increase_stat(&rx_ring->rx_stats.bad_req_id, 1, 1752 &rx_ring->syncp); 1753 adapter->reset_reason = ENA_REGS_RESET_INV_RX_REQ_ID; 1754 } 1755 1756 set_bit(ENA_FLAG_TRIGGER_RESET, &adapter->flags); 1757 1758 return 0; 1759 } 1760 1761 static void ena_dim_work(struct work_struct *w) 1762 { 1763 struct dim *dim = container_of(w, struct dim, work); 1764 struct dim_cq_moder cur_moder = 1765 net_dim_get_rx_moderation(dim->mode, dim->profile_ix); 1766 struct ena_napi *ena_napi = container_of(dim, struct ena_napi, dim); 1767 1768 ena_napi->rx_ring->smoothed_interval = cur_moder.usec; 1769 dim->state = DIM_START_MEASURE; 1770 } 1771 1772 static void ena_adjust_adaptive_rx_intr_moderation(struct ena_napi *ena_napi) 1773 { 1774 struct dim_sample dim_sample; 1775 struct ena_ring *rx_ring = ena_napi->rx_ring; 1776 1777 if (!rx_ring->per_napi_packets) 1778 return; 1779 1780 rx_ring->non_empty_napi_events++; 1781 1782 dim_update_sample(rx_ring->non_empty_napi_events, 1783 rx_ring->rx_stats.cnt, 1784 rx_ring->rx_stats.bytes, 1785 &dim_sample); 1786 1787 net_dim(&ena_napi->dim, dim_sample); 1788 1789 rx_ring->per_napi_packets = 0; 1790 } 1791 1792 static void ena_unmask_interrupt(struct ena_ring *tx_ring, 1793 struct ena_ring *rx_ring) 1794 { 1795 struct ena_eth_io_intr_reg intr_reg; 1796 u32 rx_interval = 0; 1797 /* Rx ring can be NULL when for XDP tx queues which don't have an 1798 * accompanying rx_ring pair. 1799 */ 1800 if (rx_ring) 1801 rx_interval = ena_com_get_adaptive_moderation_enabled(rx_ring->ena_dev) ? 1802 rx_ring->smoothed_interval : 1803 ena_com_get_nonadaptive_moderation_interval_rx(rx_ring->ena_dev); 1804 1805 /* Update intr register: rx intr delay, 1806 * tx intr delay and interrupt unmask 1807 */ 1808 ena_com_update_intr_reg(&intr_reg, 1809 rx_interval, 1810 tx_ring->smoothed_interval, 1811 true); 1812 1813 ena_increase_stat(&tx_ring->tx_stats.unmask_interrupt, 1, 1814 &tx_ring->syncp); 1815 1816 /* It is a shared MSI-X. 1817 * Tx and Rx CQ have pointer to it. 1818 * So we use one of them to reach the intr reg 1819 * The Tx ring is used because the rx_ring is NULL for XDP queues 1820 */ 1821 ena_com_unmask_intr(tx_ring->ena_com_io_cq, &intr_reg); 1822 } 1823 1824 static void ena_update_ring_numa_node(struct ena_ring *tx_ring, 1825 struct ena_ring *rx_ring) 1826 { 1827 int cpu = get_cpu(); 1828 int numa_node; 1829 1830 /* Check only one ring since the 2 rings are running on the same cpu */ 1831 if (likely(tx_ring->cpu == cpu)) 1832 goto out; 1833 1834 numa_node = cpu_to_node(cpu); 1835 put_cpu(); 1836 1837 if (numa_node != NUMA_NO_NODE) { 1838 ena_com_update_numa_node(tx_ring->ena_com_io_cq, numa_node); 1839 if (rx_ring) 1840 ena_com_update_numa_node(rx_ring->ena_com_io_cq, 1841 numa_node); 1842 } 1843 1844 tx_ring->cpu = cpu; 1845 if (rx_ring) 1846 rx_ring->cpu = cpu; 1847 1848 return; 1849 out: 1850 put_cpu(); 1851 } 1852 1853 static int ena_clean_xdp_irq(struct ena_ring *xdp_ring, u32 budget) 1854 { 1855 u32 total_done = 0; 1856 u16 next_to_clean; 1857 u32 tx_bytes = 0; 1858 int tx_pkts = 0; 1859 u16 req_id; 1860 int rc; 1861 1862 if (unlikely(!xdp_ring)) 1863 return 0; 1864 next_to_clean = xdp_ring->next_to_clean; 1865 1866 while (tx_pkts < budget) { 1867 struct ena_tx_buffer *tx_info; 1868 struct xdp_frame *xdpf; 1869 1870 rc = ena_com_tx_comp_req_id_get(xdp_ring->ena_com_io_cq, 1871 &req_id); 1872 if (rc) 1873 break; 1874 1875 rc = validate_xdp_req_id(xdp_ring, req_id); 1876 if (rc) 1877 break; 1878 1879 tx_info = &xdp_ring->tx_buffer_info[req_id]; 1880 xdpf = tx_info->xdpf; 1881 1882 tx_info->xdpf = NULL; 1883 tx_info->last_jiffies = 0; 1884 ena_unmap_tx_buff(xdp_ring, tx_info); 1885 1886 netif_dbg(xdp_ring->adapter, tx_done, xdp_ring->netdev, 1887 "tx_poll: q %d skb %p completed\n", xdp_ring->qid, 1888 xdpf); 1889 1890 tx_bytes += xdpf->len; 1891 tx_pkts++; 1892 total_done += tx_info->tx_descs; 1893 1894 xdp_return_frame(xdpf); 1895 xdp_ring->free_ids[next_to_clean] = req_id; 1896 next_to_clean = ENA_TX_RING_IDX_NEXT(next_to_clean, 1897 xdp_ring->ring_size); 1898 } 1899 1900 xdp_ring->next_to_clean = next_to_clean; 1901 ena_com_comp_ack(xdp_ring->ena_com_io_sq, total_done); 1902 ena_com_update_dev_comp_head(xdp_ring->ena_com_io_cq); 1903 1904 netif_dbg(xdp_ring->adapter, tx_done, xdp_ring->netdev, 1905 "tx_poll: q %d done. total pkts: %d\n", 1906 xdp_ring->qid, tx_pkts); 1907 1908 return tx_pkts; 1909 } 1910 1911 static int ena_io_poll(struct napi_struct *napi, int budget) 1912 { 1913 struct ena_napi *ena_napi = container_of(napi, struct ena_napi, napi); 1914 struct ena_ring *tx_ring, *rx_ring; 1915 int tx_work_done; 1916 int rx_work_done = 0; 1917 int tx_budget; 1918 int napi_comp_call = 0; 1919 int ret; 1920 1921 tx_ring = ena_napi->tx_ring; 1922 rx_ring = ena_napi->rx_ring; 1923 1924 tx_ring->first_interrupt = ena_napi->first_interrupt; 1925 rx_ring->first_interrupt = ena_napi->first_interrupt; 1926 1927 tx_budget = tx_ring->ring_size / ENA_TX_POLL_BUDGET_DIVIDER; 1928 1929 if (!test_bit(ENA_FLAG_DEV_UP, &tx_ring->adapter->flags) || 1930 test_bit(ENA_FLAG_TRIGGER_RESET, &tx_ring->adapter->flags)) { 1931 napi_complete_done(napi, 0); 1932 return 0; 1933 } 1934 1935 tx_work_done = ena_clean_tx_irq(tx_ring, tx_budget); 1936 /* On netpoll the budget is zero and the handler should only clean the 1937 * tx completions. 1938 */ 1939 if (likely(budget)) 1940 rx_work_done = ena_clean_rx_irq(rx_ring, napi, budget); 1941 1942 /* If the device is about to reset or down, avoid unmask 1943 * the interrupt and return 0 so NAPI won't reschedule 1944 */ 1945 if (unlikely(!test_bit(ENA_FLAG_DEV_UP, &tx_ring->adapter->flags) || 1946 test_bit(ENA_FLAG_TRIGGER_RESET, &tx_ring->adapter->flags))) { 1947 napi_complete_done(napi, 0); 1948 ret = 0; 1949 1950 } else if ((budget > rx_work_done) && (tx_budget > tx_work_done)) { 1951 napi_comp_call = 1; 1952 1953 /* Update numa and unmask the interrupt only when schedule 1954 * from the interrupt context (vs from sk_busy_loop) 1955 */ 1956 if (napi_complete_done(napi, rx_work_done) && 1957 READ_ONCE(ena_napi->interrupts_masked)) { 1958 smp_rmb(); /* make sure interrupts_masked is read */ 1959 WRITE_ONCE(ena_napi->interrupts_masked, false); 1960 /* We apply adaptive moderation on Rx path only. 1961 * Tx uses static interrupt moderation. 1962 */ 1963 if (ena_com_get_adaptive_moderation_enabled(rx_ring->ena_dev)) 1964 ena_adjust_adaptive_rx_intr_moderation(ena_napi); 1965 1966 ena_unmask_interrupt(tx_ring, rx_ring); 1967 } 1968 1969 ena_update_ring_numa_node(tx_ring, rx_ring); 1970 1971 ret = rx_work_done; 1972 } else { 1973 ret = budget; 1974 } 1975 1976 u64_stats_update_begin(&tx_ring->syncp); 1977 tx_ring->tx_stats.napi_comp += napi_comp_call; 1978 tx_ring->tx_stats.tx_poll++; 1979 u64_stats_update_end(&tx_ring->syncp); 1980 1981 return ret; 1982 } 1983 1984 static irqreturn_t ena_intr_msix_mgmnt(int irq, void *data) 1985 { 1986 struct ena_adapter *adapter = (struct ena_adapter *)data; 1987 1988 ena_com_admin_q_comp_intr_handler(adapter->ena_dev); 1989 1990 /* Don't call the aenq handler before probe is done */ 1991 if (likely(test_bit(ENA_FLAG_DEVICE_RUNNING, &adapter->flags))) 1992 ena_com_aenq_intr_handler(adapter->ena_dev, data); 1993 1994 return IRQ_HANDLED; 1995 } 1996 1997 /* ena_intr_msix_io - MSI-X Interrupt Handler for Tx/Rx 1998 * @irq: interrupt number 1999 * @data: pointer to a network interface private napi device structure 2000 */ 2001 static irqreturn_t ena_intr_msix_io(int irq, void *data) 2002 { 2003 struct ena_napi *ena_napi = data; 2004 2005 ena_napi->first_interrupt = true; 2006 2007 WRITE_ONCE(ena_napi->interrupts_masked, true); 2008 smp_wmb(); /* write interrupts_masked before calling napi */ 2009 2010 napi_schedule_irqoff(&ena_napi->napi); 2011 2012 return IRQ_HANDLED; 2013 } 2014 2015 /* Reserve a single MSI-X vector for management (admin + aenq). 2016 * plus reserve one vector for each potential io queue. 2017 * the number of potential io queues is the minimum of what the device 2018 * supports and the number of vCPUs. 2019 */ 2020 static int ena_enable_msix(struct ena_adapter *adapter) 2021 { 2022 int msix_vecs, irq_cnt; 2023 2024 if (test_bit(ENA_FLAG_MSIX_ENABLED, &adapter->flags)) { 2025 netif_err(adapter, probe, adapter->netdev, 2026 "Error, MSI-X is already enabled\n"); 2027 return -EPERM; 2028 } 2029 2030 /* Reserved the max msix vectors we might need */ 2031 msix_vecs = ENA_MAX_MSIX_VEC(adapter->max_num_io_queues); 2032 netif_dbg(adapter, probe, adapter->netdev, 2033 "Trying to enable MSI-X, vectors %d\n", msix_vecs); 2034 2035 irq_cnt = pci_alloc_irq_vectors(adapter->pdev, ENA_MIN_MSIX_VEC, 2036 msix_vecs, PCI_IRQ_MSIX); 2037 2038 if (irq_cnt < 0) { 2039 netif_err(adapter, probe, adapter->netdev, 2040 "Failed to enable MSI-X. irq_cnt %d\n", irq_cnt); 2041 return -ENOSPC; 2042 } 2043 2044 if (irq_cnt != msix_vecs) { 2045 netif_notice(adapter, probe, adapter->netdev, 2046 "Enable only %d MSI-X (out of %d), reduce the number of queues\n", 2047 irq_cnt, msix_vecs); 2048 adapter->num_io_queues = irq_cnt - ENA_ADMIN_MSIX_VEC; 2049 } 2050 2051 if (ena_init_rx_cpu_rmap(adapter)) 2052 netif_warn(adapter, probe, adapter->netdev, 2053 "Failed to map IRQs to CPUs\n"); 2054 2055 adapter->msix_vecs = irq_cnt; 2056 set_bit(ENA_FLAG_MSIX_ENABLED, &adapter->flags); 2057 2058 return 0; 2059 } 2060 2061 static void ena_setup_mgmnt_intr(struct ena_adapter *adapter) 2062 { 2063 u32 cpu; 2064 2065 snprintf(adapter->irq_tbl[ENA_MGMNT_IRQ_IDX].name, 2066 ENA_IRQNAME_SIZE, "ena-mgmnt@pci:%s", 2067 pci_name(adapter->pdev)); 2068 adapter->irq_tbl[ENA_MGMNT_IRQ_IDX].handler = 2069 ena_intr_msix_mgmnt; 2070 adapter->irq_tbl[ENA_MGMNT_IRQ_IDX].data = adapter; 2071 adapter->irq_tbl[ENA_MGMNT_IRQ_IDX].vector = 2072 pci_irq_vector(adapter->pdev, ENA_MGMNT_IRQ_IDX); 2073 cpu = cpumask_first(cpu_online_mask); 2074 adapter->irq_tbl[ENA_MGMNT_IRQ_IDX].cpu = cpu; 2075 cpumask_set_cpu(cpu, 2076 &adapter->irq_tbl[ENA_MGMNT_IRQ_IDX].affinity_hint_mask); 2077 } 2078 2079 static void ena_setup_io_intr(struct ena_adapter *adapter) 2080 { 2081 struct net_device *netdev; 2082 int irq_idx, i, cpu; 2083 int io_queue_count; 2084 2085 netdev = adapter->netdev; 2086 io_queue_count = adapter->num_io_queues + adapter->xdp_num_queues; 2087 2088 for (i = 0; i < io_queue_count; i++) { 2089 irq_idx = ENA_IO_IRQ_IDX(i); 2090 cpu = i % num_online_cpus(); 2091 2092 snprintf(adapter->irq_tbl[irq_idx].name, ENA_IRQNAME_SIZE, 2093 "%s-Tx-Rx-%d", netdev->name, i); 2094 adapter->irq_tbl[irq_idx].handler = ena_intr_msix_io; 2095 adapter->irq_tbl[irq_idx].data = &adapter->ena_napi[i]; 2096 adapter->irq_tbl[irq_idx].vector = 2097 pci_irq_vector(adapter->pdev, irq_idx); 2098 adapter->irq_tbl[irq_idx].cpu = cpu; 2099 2100 cpumask_set_cpu(cpu, 2101 &adapter->irq_tbl[irq_idx].affinity_hint_mask); 2102 } 2103 } 2104 2105 static int ena_request_mgmnt_irq(struct ena_adapter *adapter) 2106 { 2107 unsigned long flags = 0; 2108 struct ena_irq *irq; 2109 int rc; 2110 2111 irq = &adapter->irq_tbl[ENA_MGMNT_IRQ_IDX]; 2112 rc = request_irq(irq->vector, irq->handler, flags, irq->name, 2113 irq->data); 2114 if (rc) { 2115 netif_err(adapter, probe, adapter->netdev, 2116 "Failed to request admin irq\n"); 2117 return rc; 2118 } 2119 2120 netif_dbg(adapter, probe, adapter->netdev, 2121 "Set affinity hint of mgmnt irq.to 0x%lx (irq vector: %d)\n", 2122 irq->affinity_hint_mask.bits[0], irq->vector); 2123 2124 irq_set_affinity_hint(irq->vector, &irq->affinity_hint_mask); 2125 2126 return rc; 2127 } 2128 2129 static int ena_request_io_irq(struct ena_adapter *adapter) 2130 { 2131 u32 io_queue_count = adapter->num_io_queues + adapter->xdp_num_queues; 2132 unsigned long flags = 0; 2133 struct ena_irq *irq; 2134 int rc = 0, i, k; 2135 2136 if (!test_bit(ENA_FLAG_MSIX_ENABLED, &adapter->flags)) { 2137 netif_err(adapter, ifup, adapter->netdev, 2138 "Failed to request I/O IRQ: MSI-X is not enabled\n"); 2139 return -EINVAL; 2140 } 2141 2142 for (i = ENA_IO_IRQ_FIRST_IDX; i < ENA_MAX_MSIX_VEC(io_queue_count); i++) { 2143 irq = &adapter->irq_tbl[i]; 2144 rc = request_irq(irq->vector, irq->handler, flags, irq->name, 2145 irq->data); 2146 if (rc) { 2147 netif_err(adapter, ifup, adapter->netdev, 2148 "Failed to request I/O IRQ. index %d rc %d\n", 2149 i, rc); 2150 goto err; 2151 } 2152 2153 netif_dbg(adapter, ifup, adapter->netdev, 2154 "Set affinity hint of irq. index %d to 0x%lx (irq vector: %d)\n", 2155 i, irq->affinity_hint_mask.bits[0], irq->vector); 2156 2157 irq_set_affinity_hint(irq->vector, &irq->affinity_hint_mask); 2158 } 2159 2160 return rc; 2161 2162 err: 2163 for (k = ENA_IO_IRQ_FIRST_IDX; k < i; k++) { 2164 irq = &adapter->irq_tbl[k]; 2165 free_irq(irq->vector, irq->data); 2166 } 2167 2168 return rc; 2169 } 2170 2171 static void ena_free_mgmnt_irq(struct ena_adapter *adapter) 2172 { 2173 struct ena_irq *irq; 2174 2175 irq = &adapter->irq_tbl[ENA_MGMNT_IRQ_IDX]; 2176 synchronize_irq(irq->vector); 2177 irq_set_affinity_hint(irq->vector, NULL); 2178 free_irq(irq->vector, irq->data); 2179 } 2180 2181 static void ena_free_io_irq(struct ena_adapter *adapter) 2182 { 2183 u32 io_queue_count = adapter->num_io_queues + adapter->xdp_num_queues; 2184 struct ena_irq *irq; 2185 int i; 2186 2187 #ifdef CONFIG_RFS_ACCEL 2188 if (adapter->msix_vecs >= 1) { 2189 free_irq_cpu_rmap(adapter->netdev->rx_cpu_rmap); 2190 adapter->netdev->rx_cpu_rmap = NULL; 2191 } 2192 #endif /* CONFIG_RFS_ACCEL */ 2193 2194 for (i = ENA_IO_IRQ_FIRST_IDX; i < ENA_MAX_MSIX_VEC(io_queue_count); i++) { 2195 irq = &adapter->irq_tbl[i]; 2196 irq_set_affinity_hint(irq->vector, NULL); 2197 free_irq(irq->vector, irq->data); 2198 } 2199 } 2200 2201 static void ena_disable_msix(struct ena_adapter *adapter) 2202 { 2203 if (test_and_clear_bit(ENA_FLAG_MSIX_ENABLED, &adapter->flags)) 2204 pci_free_irq_vectors(adapter->pdev); 2205 } 2206 2207 static void ena_disable_io_intr_sync(struct ena_adapter *adapter) 2208 { 2209 u32 io_queue_count = adapter->num_io_queues + adapter->xdp_num_queues; 2210 int i; 2211 2212 if (!netif_running(adapter->netdev)) 2213 return; 2214 2215 for (i = ENA_IO_IRQ_FIRST_IDX; i < ENA_MAX_MSIX_VEC(io_queue_count); i++) 2216 synchronize_irq(adapter->irq_tbl[i].vector); 2217 } 2218 2219 static void ena_del_napi_in_range(struct ena_adapter *adapter, 2220 int first_index, 2221 int count) 2222 { 2223 int i; 2224 2225 for (i = first_index; i < first_index + count; i++) { 2226 netif_napi_del(&adapter->ena_napi[i].napi); 2227 2228 WARN_ON(!ENA_IS_XDP_INDEX(adapter, i) && 2229 adapter->ena_napi[i].xdp_ring); 2230 } 2231 } 2232 2233 static void ena_init_napi_in_range(struct ena_adapter *adapter, 2234 int first_index, int count) 2235 { 2236 int i; 2237 2238 for (i = first_index; i < first_index + count; i++) { 2239 struct ena_napi *napi = &adapter->ena_napi[i]; 2240 2241 netif_napi_add(adapter->netdev, 2242 &napi->napi, 2243 ENA_IS_XDP_INDEX(adapter, i) ? ena_xdp_io_poll : ena_io_poll, 2244 ENA_NAPI_BUDGET); 2245 2246 if (!ENA_IS_XDP_INDEX(adapter, i)) { 2247 napi->rx_ring = &adapter->rx_ring[i]; 2248 napi->tx_ring = &adapter->tx_ring[i]; 2249 } else { 2250 napi->xdp_ring = &adapter->tx_ring[i]; 2251 } 2252 napi->qid = i; 2253 } 2254 } 2255 2256 static void ena_napi_disable_in_range(struct ena_adapter *adapter, 2257 int first_index, 2258 int count) 2259 { 2260 int i; 2261 2262 for (i = first_index; i < first_index + count; i++) 2263 napi_disable(&adapter->ena_napi[i].napi); 2264 } 2265 2266 static void ena_napi_enable_in_range(struct ena_adapter *adapter, 2267 int first_index, 2268 int count) 2269 { 2270 int i; 2271 2272 for (i = first_index; i < first_index + count; i++) 2273 napi_enable(&adapter->ena_napi[i].napi); 2274 } 2275 2276 /* Configure the Rx forwarding */ 2277 static int ena_rss_configure(struct ena_adapter *adapter) 2278 { 2279 struct ena_com_dev *ena_dev = adapter->ena_dev; 2280 int rc; 2281 2282 /* In case the RSS table wasn't initialized by probe */ 2283 if (!ena_dev->rss.tbl_log_size) { 2284 rc = ena_rss_init_default(adapter); 2285 if (rc && (rc != -EOPNOTSUPP)) { 2286 netif_err(adapter, ifup, adapter->netdev, 2287 "Failed to init RSS rc: %d\n", rc); 2288 return rc; 2289 } 2290 } 2291 2292 /* Set indirect table */ 2293 rc = ena_com_indirect_table_set(ena_dev); 2294 if (unlikely(rc && rc != -EOPNOTSUPP)) 2295 return rc; 2296 2297 /* Configure hash function (if supported) */ 2298 rc = ena_com_set_hash_function(ena_dev); 2299 if (unlikely(rc && (rc != -EOPNOTSUPP))) 2300 return rc; 2301 2302 /* Configure hash inputs (if supported) */ 2303 rc = ena_com_set_hash_ctrl(ena_dev); 2304 if (unlikely(rc && (rc != -EOPNOTSUPP))) 2305 return rc; 2306 2307 return 0; 2308 } 2309 2310 static int ena_up_complete(struct ena_adapter *adapter) 2311 { 2312 int rc; 2313 2314 rc = ena_rss_configure(adapter); 2315 if (rc) 2316 return rc; 2317 2318 ena_change_mtu(adapter->netdev, adapter->netdev->mtu); 2319 2320 ena_refill_all_rx_bufs(adapter); 2321 2322 /* enable transmits */ 2323 netif_tx_start_all_queues(adapter->netdev); 2324 2325 ena_napi_enable_in_range(adapter, 2326 0, 2327 adapter->xdp_num_queues + adapter->num_io_queues); 2328 2329 return 0; 2330 } 2331 2332 static int ena_create_io_tx_queue(struct ena_adapter *adapter, int qid) 2333 { 2334 struct ena_com_create_io_ctx ctx; 2335 struct ena_com_dev *ena_dev; 2336 struct ena_ring *tx_ring; 2337 u32 msix_vector; 2338 u16 ena_qid; 2339 int rc; 2340 2341 ena_dev = adapter->ena_dev; 2342 2343 tx_ring = &adapter->tx_ring[qid]; 2344 msix_vector = ENA_IO_IRQ_IDX(qid); 2345 ena_qid = ENA_IO_TXQ_IDX(qid); 2346 2347 memset(&ctx, 0x0, sizeof(ctx)); 2348 2349 ctx.direction = ENA_COM_IO_QUEUE_DIRECTION_TX; 2350 ctx.qid = ena_qid; 2351 ctx.mem_queue_type = ena_dev->tx_mem_queue_type; 2352 ctx.msix_vector = msix_vector; 2353 ctx.queue_size = tx_ring->ring_size; 2354 ctx.numa_node = cpu_to_node(tx_ring->cpu); 2355 2356 rc = ena_com_create_io_queue(ena_dev, &ctx); 2357 if (rc) { 2358 netif_err(adapter, ifup, adapter->netdev, 2359 "Failed to create I/O TX queue num %d rc: %d\n", 2360 qid, rc); 2361 return rc; 2362 } 2363 2364 rc = ena_com_get_io_handlers(ena_dev, ena_qid, 2365 &tx_ring->ena_com_io_sq, 2366 &tx_ring->ena_com_io_cq); 2367 if (rc) { 2368 netif_err(adapter, ifup, adapter->netdev, 2369 "Failed to get TX queue handlers. TX queue num %d rc: %d\n", 2370 qid, rc); 2371 ena_com_destroy_io_queue(ena_dev, ena_qid); 2372 return rc; 2373 } 2374 2375 ena_com_update_numa_node(tx_ring->ena_com_io_cq, ctx.numa_node); 2376 return rc; 2377 } 2378 2379 static int ena_create_io_tx_queues_in_range(struct ena_adapter *adapter, 2380 int first_index, int count) 2381 { 2382 struct ena_com_dev *ena_dev = adapter->ena_dev; 2383 int rc, i; 2384 2385 for (i = first_index; i < first_index + count; i++) { 2386 rc = ena_create_io_tx_queue(adapter, i); 2387 if (rc) 2388 goto create_err; 2389 } 2390 2391 return 0; 2392 2393 create_err: 2394 while (i-- > first_index) 2395 ena_com_destroy_io_queue(ena_dev, ENA_IO_TXQ_IDX(i)); 2396 2397 return rc; 2398 } 2399 2400 static int ena_create_io_rx_queue(struct ena_adapter *adapter, int qid) 2401 { 2402 struct ena_com_dev *ena_dev; 2403 struct ena_com_create_io_ctx ctx; 2404 struct ena_ring *rx_ring; 2405 u32 msix_vector; 2406 u16 ena_qid; 2407 int rc; 2408 2409 ena_dev = adapter->ena_dev; 2410 2411 rx_ring = &adapter->rx_ring[qid]; 2412 msix_vector = ENA_IO_IRQ_IDX(qid); 2413 ena_qid = ENA_IO_RXQ_IDX(qid); 2414 2415 memset(&ctx, 0x0, sizeof(ctx)); 2416 2417 ctx.qid = ena_qid; 2418 ctx.direction = ENA_COM_IO_QUEUE_DIRECTION_RX; 2419 ctx.mem_queue_type = ENA_ADMIN_PLACEMENT_POLICY_HOST; 2420 ctx.msix_vector = msix_vector; 2421 ctx.queue_size = rx_ring->ring_size; 2422 ctx.numa_node = cpu_to_node(rx_ring->cpu); 2423 2424 rc = ena_com_create_io_queue(ena_dev, &ctx); 2425 if (rc) { 2426 netif_err(adapter, ifup, adapter->netdev, 2427 "Failed to create I/O RX queue num %d rc: %d\n", 2428 qid, rc); 2429 return rc; 2430 } 2431 2432 rc = ena_com_get_io_handlers(ena_dev, ena_qid, 2433 &rx_ring->ena_com_io_sq, 2434 &rx_ring->ena_com_io_cq); 2435 if (rc) { 2436 netif_err(adapter, ifup, adapter->netdev, 2437 "Failed to get RX queue handlers. RX queue num %d rc: %d\n", 2438 qid, rc); 2439 goto err; 2440 } 2441 2442 ena_com_update_numa_node(rx_ring->ena_com_io_cq, ctx.numa_node); 2443 2444 return rc; 2445 err: 2446 ena_com_destroy_io_queue(ena_dev, ena_qid); 2447 return rc; 2448 } 2449 2450 static int ena_create_all_io_rx_queues(struct ena_adapter *adapter) 2451 { 2452 struct ena_com_dev *ena_dev = adapter->ena_dev; 2453 int rc, i; 2454 2455 for (i = 0; i < adapter->num_io_queues; i++) { 2456 rc = ena_create_io_rx_queue(adapter, i); 2457 if (rc) 2458 goto create_err; 2459 INIT_WORK(&adapter->ena_napi[i].dim.work, ena_dim_work); 2460 } 2461 2462 return 0; 2463 2464 create_err: 2465 while (i--) { 2466 cancel_work_sync(&adapter->ena_napi[i].dim.work); 2467 ena_com_destroy_io_queue(ena_dev, ENA_IO_RXQ_IDX(i)); 2468 } 2469 2470 return rc; 2471 } 2472 2473 static void set_io_rings_size(struct ena_adapter *adapter, 2474 int new_tx_size, 2475 int new_rx_size) 2476 { 2477 int i; 2478 2479 for (i = 0; i < adapter->num_io_queues; i++) { 2480 adapter->tx_ring[i].ring_size = new_tx_size; 2481 adapter->rx_ring[i].ring_size = new_rx_size; 2482 } 2483 } 2484 2485 /* This function allows queue allocation to backoff when the system is 2486 * low on memory. If there is not enough memory to allocate io queues 2487 * the driver will try to allocate smaller queues. 2488 * 2489 * The backoff algorithm is as follows: 2490 * 1. Try to allocate TX and RX and if successful. 2491 * 1.1. return success 2492 * 2493 * 2. Divide by 2 the size of the larger of RX and TX queues (or both if their size is the same). 2494 * 2495 * 3. If TX or RX is smaller than 256 2496 * 3.1. return failure. 2497 * 4. else 2498 * 4.1. go back to 1. 2499 */ 2500 static int create_queues_with_size_backoff(struct ena_adapter *adapter) 2501 { 2502 int rc, cur_rx_ring_size, cur_tx_ring_size; 2503 int new_rx_ring_size, new_tx_ring_size; 2504 2505 /* current queue sizes might be set to smaller than the requested 2506 * ones due to past queue allocation failures. 2507 */ 2508 set_io_rings_size(adapter, adapter->requested_tx_ring_size, 2509 adapter->requested_rx_ring_size); 2510 2511 while (1) { 2512 if (ena_xdp_present(adapter)) { 2513 rc = ena_setup_and_create_all_xdp_queues(adapter); 2514 2515 if (rc) 2516 goto err_setup_tx; 2517 } 2518 rc = ena_setup_tx_resources_in_range(adapter, 2519 0, 2520 adapter->num_io_queues); 2521 if (rc) 2522 goto err_setup_tx; 2523 2524 rc = ena_create_io_tx_queues_in_range(adapter, 2525 0, 2526 adapter->num_io_queues); 2527 if (rc) 2528 goto err_create_tx_queues; 2529 2530 rc = ena_setup_all_rx_resources(adapter); 2531 if (rc) 2532 goto err_setup_rx; 2533 2534 rc = ena_create_all_io_rx_queues(adapter); 2535 if (rc) 2536 goto err_create_rx_queues; 2537 2538 return 0; 2539 2540 err_create_rx_queues: 2541 ena_free_all_io_rx_resources(adapter); 2542 err_setup_rx: 2543 ena_destroy_all_tx_queues(adapter); 2544 err_create_tx_queues: 2545 ena_free_all_io_tx_resources(adapter); 2546 err_setup_tx: 2547 if (rc != -ENOMEM) { 2548 netif_err(adapter, ifup, adapter->netdev, 2549 "Queue creation failed with error code %d\n", 2550 rc); 2551 return rc; 2552 } 2553 2554 cur_tx_ring_size = adapter->tx_ring[0].ring_size; 2555 cur_rx_ring_size = adapter->rx_ring[0].ring_size; 2556 2557 netif_err(adapter, ifup, adapter->netdev, 2558 "Not enough memory to create queues with sizes TX=%d, RX=%d\n", 2559 cur_tx_ring_size, cur_rx_ring_size); 2560 2561 new_tx_ring_size = cur_tx_ring_size; 2562 new_rx_ring_size = cur_rx_ring_size; 2563 2564 /* Decrease the size of the larger queue, or 2565 * decrease both if they are the same size. 2566 */ 2567 if (cur_rx_ring_size <= cur_tx_ring_size) 2568 new_tx_ring_size = cur_tx_ring_size / 2; 2569 if (cur_rx_ring_size >= cur_tx_ring_size) 2570 new_rx_ring_size = cur_rx_ring_size / 2; 2571 2572 if (new_tx_ring_size < ENA_MIN_RING_SIZE || 2573 new_rx_ring_size < ENA_MIN_RING_SIZE) { 2574 netif_err(adapter, ifup, adapter->netdev, 2575 "Queue creation failed with the smallest possible queue size of %d for both queues. Not retrying with smaller queues\n", 2576 ENA_MIN_RING_SIZE); 2577 return rc; 2578 } 2579 2580 netif_err(adapter, ifup, adapter->netdev, 2581 "Retrying queue creation with sizes TX=%d, RX=%d\n", 2582 new_tx_ring_size, 2583 new_rx_ring_size); 2584 2585 set_io_rings_size(adapter, new_tx_ring_size, 2586 new_rx_ring_size); 2587 } 2588 } 2589 2590 static int ena_up(struct ena_adapter *adapter) 2591 { 2592 int io_queue_count, rc, i; 2593 2594 netif_dbg(adapter, ifup, adapter->netdev, "%s\n", __func__); 2595 2596 io_queue_count = adapter->num_io_queues + adapter->xdp_num_queues; 2597 ena_setup_io_intr(adapter); 2598 2599 /* napi poll functions should be initialized before running 2600 * request_irq(), to handle a rare condition where there is a pending 2601 * interrupt, causing the ISR to fire immediately while the poll 2602 * function wasn't set yet, causing a null dereference 2603 */ 2604 ena_init_napi_in_range(adapter, 0, io_queue_count); 2605 2606 rc = ena_request_io_irq(adapter); 2607 if (rc) 2608 goto err_req_irq; 2609 2610 rc = create_queues_with_size_backoff(adapter); 2611 if (rc) 2612 goto err_create_queues_with_backoff; 2613 2614 rc = ena_up_complete(adapter); 2615 if (rc) 2616 goto err_up; 2617 2618 if (test_bit(ENA_FLAG_LINK_UP, &adapter->flags)) 2619 netif_carrier_on(adapter->netdev); 2620 2621 ena_increase_stat(&adapter->dev_stats.interface_up, 1, 2622 &adapter->syncp); 2623 2624 set_bit(ENA_FLAG_DEV_UP, &adapter->flags); 2625 2626 /* Enable completion queues interrupt */ 2627 for (i = 0; i < adapter->num_io_queues; i++) 2628 ena_unmask_interrupt(&adapter->tx_ring[i], 2629 &adapter->rx_ring[i]); 2630 2631 /* schedule napi in case we had pending packets 2632 * from the last time we disable napi 2633 */ 2634 for (i = 0; i < io_queue_count; i++) 2635 napi_schedule(&adapter->ena_napi[i].napi); 2636 2637 return rc; 2638 2639 err_up: 2640 ena_destroy_all_tx_queues(adapter); 2641 ena_free_all_io_tx_resources(adapter); 2642 ena_destroy_all_rx_queues(adapter); 2643 ena_free_all_io_rx_resources(adapter); 2644 err_create_queues_with_backoff: 2645 ena_free_io_irq(adapter); 2646 err_req_irq: 2647 ena_del_napi_in_range(adapter, 0, io_queue_count); 2648 2649 return rc; 2650 } 2651 2652 static void ena_down(struct ena_adapter *adapter) 2653 { 2654 int io_queue_count = adapter->num_io_queues + adapter->xdp_num_queues; 2655 2656 netif_info(adapter, ifdown, adapter->netdev, "%s\n", __func__); 2657 2658 clear_bit(ENA_FLAG_DEV_UP, &adapter->flags); 2659 2660 ena_increase_stat(&adapter->dev_stats.interface_down, 1, 2661 &adapter->syncp); 2662 2663 netif_carrier_off(adapter->netdev); 2664 netif_tx_disable(adapter->netdev); 2665 2666 /* After this point the napi handler won't enable the tx queue */ 2667 ena_napi_disable_in_range(adapter, 0, io_queue_count); 2668 2669 /* After destroy the queue there won't be any new interrupts */ 2670 2671 if (test_bit(ENA_FLAG_TRIGGER_RESET, &adapter->flags)) { 2672 int rc; 2673 2674 rc = ena_com_dev_reset(adapter->ena_dev, adapter->reset_reason); 2675 if (rc) 2676 netif_err(adapter, ifdown, adapter->netdev, 2677 "Device reset failed\n"); 2678 /* stop submitting admin commands on a device that was reset */ 2679 ena_com_set_admin_running_state(adapter->ena_dev, false); 2680 } 2681 2682 ena_destroy_all_io_queues(adapter); 2683 2684 ena_disable_io_intr_sync(adapter); 2685 ena_free_io_irq(adapter); 2686 ena_del_napi_in_range(adapter, 0, io_queue_count); 2687 2688 ena_free_all_tx_bufs(adapter); 2689 ena_free_all_rx_bufs(adapter); 2690 ena_free_all_io_tx_resources(adapter); 2691 ena_free_all_io_rx_resources(adapter); 2692 } 2693 2694 /* ena_open - Called when a network interface is made active 2695 * @netdev: network interface device structure 2696 * 2697 * Returns 0 on success, negative value on failure 2698 * 2699 * The open entry point is called when a network interface is made 2700 * active by the system (IFF_UP). At this point all resources needed 2701 * for transmit and receive operations are allocated, the interrupt 2702 * handler is registered with the OS, the watchdog timer is started, 2703 * and the stack is notified that the interface is ready. 2704 */ 2705 static int ena_open(struct net_device *netdev) 2706 { 2707 struct ena_adapter *adapter = netdev_priv(netdev); 2708 int rc; 2709 2710 /* Notify the stack of the actual queue counts. */ 2711 rc = netif_set_real_num_tx_queues(netdev, adapter->num_io_queues); 2712 if (rc) { 2713 netif_err(adapter, ifup, netdev, "Can't set num tx queues\n"); 2714 return rc; 2715 } 2716 2717 rc = netif_set_real_num_rx_queues(netdev, adapter->num_io_queues); 2718 if (rc) { 2719 netif_err(adapter, ifup, netdev, "Can't set num rx queues\n"); 2720 return rc; 2721 } 2722 2723 rc = ena_up(adapter); 2724 if (rc) 2725 return rc; 2726 2727 return rc; 2728 } 2729 2730 /* ena_close - Disables a network interface 2731 * @netdev: network interface device structure 2732 * 2733 * Returns 0, this is not allowed to fail 2734 * 2735 * The close entry point is called when an interface is de-activated 2736 * by the OS. The hardware is still under the drivers control, but 2737 * needs to be disabled. A global MAC reset is issued to stop the 2738 * hardware, and all transmit and receive resources are freed. 2739 */ 2740 static int ena_close(struct net_device *netdev) 2741 { 2742 struct ena_adapter *adapter = netdev_priv(netdev); 2743 2744 netif_dbg(adapter, ifdown, netdev, "%s\n", __func__); 2745 2746 if (!test_bit(ENA_FLAG_DEVICE_RUNNING, &adapter->flags)) 2747 return 0; 2748 2749 if (test_bit(ENA_FLAG_DEV_UP, &adapter->flags)) 2750 ena_down(adapter); 2751 2752 /* Check for device status and issue reset if needed*/ 2753 check_for_admin_com_state(adapter); 2754 if (unlikely(test_bit(ENA_FLAG_TRIGGER_RESET, &adapter->flags))) { 2755 netif_err(adapter, ifdown, adapter->netdev, 2756 "Destroy failure, restarting device\n"); 2757 ena_dump_stats_to_dmesg(adapter); 2758 /* rtnl lock already obtained in dev_ioctl() layer */ 2759 ena_destroy_device(adapter, false); 2760 ena_restore_device(adapter); 2761 } 2762 2763 return 0; 2764 } 2765 2766 int ena_update_queue_sizes(struct ena_adapter *adapter, 2767 u32 new_tx_size, 2768 u32 new_rx_size) 2769 { 2770 bool dev_was_up; 2771 2772 dev_was_up = test_bit(ENA_FLAG_DEV_UP, &adapter->flags); 2773 ena_close(adapter->netdev); 2774 adapter->requested_tx_ring_size = new_tx_size; 2775 adapter->requested_rx_ring_size = new_rx_size; 2776 ena_init_io_rings(adapter, 2777 0, 2778 adapter->xdp_num_queues + 2779 adapter->num_io_queues); 2780 return dev_was_up ? ena_up(adapter) : 0; 2781 } 2782 2783 int ena_update_queue_count(struct ena_adapter *adapter, u32 new_channel_count) 2784 { 2785 struct ena_com_dev *ena_dev = adapter->ena_dev; 2786 int prev_channel_count; 2787 bool dev_was_up; 2788 2789 dev_was_up = test_bit(ENA_FLAG_DEV_UP, &adapter->flags); 2790 ena_close(adapter->netdev); 2791 prev_channel_count = adapter->num_io_queues; 2792 adapter->num_io_queues = new_channel_count; 2793 if (ena_xdp_present(adapter) && 2794 ena_xdp_allowed(adapter) == ENA_XDP_ALLOWED) { 2795 adapter->xdp_first_ring = new_channel_count; 2796 adapter->xdp_num_queues = new_channel_count; 2797 if (prev_channel_count > new_channel_count) 2798 ena_xdp_exchange_program_rx_in_range(adapter, 2799 NULL, 2800 new_channel_count, 2801 prev_channel_count); 2802 else 2803 ena_xdp_exchange_program_rx_in_range(adapter, 2804 adapter->xdp_bpf_prog, 2805 prev_channel_count, 2806 new_channel_count); 2807 } 2808 2809 /* We need to destroy the rss table so that the indirection 2810 * table will be reinitialized by ena_up() 2811 */ 2812 ena_com_rss_destroy(ena_dev); 2813 ena_init_io_rings(adapter, 2814 0, 2815 adapter->xdp_num_queues + 2816 adapter->num_io_queues); 2817 return dev_was_up ? ena_open(adapter->netdev) : 0; 2818 } 2819 2820 static void ena_tx_csum(struct ena_com_tx_ctx *ena_tx_ctx, 2821 struct sk_buff *skb, 2822 bool disable_meta_caching) 2823 { 2824 u32 mss = skb_shinfo(skb)->gso_size; 2825 struct ena_com_tx_meta *ena_meta = &ena_tx_ctx->ena_meta; 2826 u8 l4_protocol = 0; 2827 2828 if ((skb->ip_summed == CHECKSUM_PARTIAL) || mss) { 2829 ena_tx_ctx->l4_csum_enable = 1; 2830 if (mss) { 2831 ena_tx_ctx->tso_enable = 1; 2832 ena_meta->l4_hdr_len = tcp_hdr(skb)->doff; 2833 ena_tx_ctx->l4_csum_partial = 0; 2834 } else { 2835 ena_tx_ctx->tso_enable = 0; 2836 ena_meta->l4_hdr_len = 0; 2837 ena_tx_ctx->l4_csum_partial = 1; 2838 } 2839 2840 switch (ip_hdr(skb)->version) { 2841 case IPVERSION: 2842 ena_tx_ctx->l3_proto = ENA_ETH_IO_L3_PROTO_IPV4; 2843 if (ip_hdr(skb)->frag_off & htons(IP_DF)) 2844 ena_tx_ctx->df = 1; 2845 if (mss) 2846 ena_tx_ctx->l3_csum_enable = 1; 2847 l4_protocol = ip_hdr(skb)->protocol; 2848 break; 2849 case 6: 2850 ena_tx_ctx->l3_proto = ENA_ETH_IO_L3_PROTO_IPV6; 2851 l4_protocol = ipv6_hdr(skb)->nexthdr; 2852 break; 2853 default: 2854 break; 2855 } 2856 2857 if (l4_protocol == IPPROTO_TCP) 2858 ena_tx_ctx->l4_proto = ENA_ETH_IO_L4_PROTO_TCP; 2859 else 2860 ena_tx_ctx->l4_proto = ENA_ETH_IO_L4_PROTO_UDP; 2861 2862 ena_meta->mss = mss; 2863 ena_meta->l3_hdr_len = skb_network_header_len(skb); 2864 ena_meta->l3_hdr_offset = skb_network_offset(skb); 2865 ena_tx_ctx->meta_valid = 1; 2866 } else if (disable_meta_caching) { 2867 memset(ena_meta, 0, sizeof(*ena_meta)); 2868 ena_tx_ctx->meta_valid = 1; 2869 } else { 2870 ena_tx_ctx->meta_valid = 0; 2871 } 2872 } 2873 2874 static int ena_check_and_linearize_skb(struct ena_ring *tx_ring, 2875 struct sk_buff *skb) 2876 { 2877 int num_frags, header_len, rc; 2878 2879 num_frags = skb_shinfo(skb)->nr_frags; 2880 header_len = skb_headlen(skb); 2881 2882 if (num_frags < tx_ring->sgl_size) 2883 return 0; 2884 2885 if ((num_frags == tx_ring->sgl_size) && 2886 (header_len < tx_ring->tx_max_header_size)) 2887 return 0; 2888 2889 ena_increase_stat(&tx_ring->tx_stats.linearize, 1, &tx_ring->syncp); 2890 2891 rc = skb_linearize(skb); 2892 if (unlikely(rc)) { 2893 ena_increase_stat(&tx_ring->tx_stats.linearize_failed, 1, 2894 &tx_ring->syncp); 2895 } 2896 2897 return rc; 2898 } 2899 2900 static int ena_tx_map_skb(struct ena_ring *tx_ring, 2901 struct ena_tx_buffer *tx_info, 2902 struct sk_buff *skb, 2903 void **push_hdr, 2904 u16 *header_len) 2905 { 2906 struct ena_adapter *adapter = tx_ring->adapter; 2907 struct ena_com_buf *ena_buf; 2908 dma_addr_t dma; 2909 u32 skb_head_len, frag_len, last_frag; 2910 u16 push_len = 0; 2911 u16 delta = 0; 2912 int i = 0; 2913 2914 skb_head_len = skb_headlen(skb); 2915 tx_info->skb = skb; 2916 ena_buf = tx_info->bufs; 2917 2918 if (tx_ring->tx_mem_queue_type == ENA_ADMIN_PLACEMENT_POLICY_DEV) { 2919 /* When the device is LLQ mode, the driver will copy 2920 * the header into the device memory space. 2921 * the ena_com layer assume the header is in a linear 2922 * memory space. 2923 * This assumption might be wrong since part of the header 2924 * can be in the fragmented buffers. 2925 * Use skb_header_pointer to make sure the header is in a 2926 * linear memory space. 2927 */ 2928 2929 push_len = min_t(u32, skb->len, tx_ring->tx_max_header_size); 2930 *push_hdr = skb_header_pointer(skb, 0, push_len, 2931 tx_ring->push_buf_intermediate_buf); 2932 *header_len = push_len; 2933 if (unlikely(skb->data != *push_hdr)) { 2934 ena_increase_stat(&tx_ring->tx_stats.llq_buffer_copy, 1, 2935 &tx_ring->syncp); 2936 2937 delta = push_len - skb_head_len; 2938 } 2939 } else { 2940 *push_hdr = NULL; 2941 *header_len = min_t(u32, skb_head_len, 2942 tx_ring->tx_max_header_size); 2943 } 2944 2945 netif_dbg(adapter, tx_queued, adapter->netdev, 2946 "skb: %p header_buf->vaddr: %p push_len: %d\n", skb, 2947 *push_hdr, push_len); 2948 2949 if (skb_head_len > push_len) { 2950 dma = dma_map_single(tx_ring->dev, skb->data + push_len, 2951 skb_head_len - push_len, DMA_TO_DEVICE); 2952 if (unlikely(dma_mapping_error(tx_ring->dev, dma))) 2953 goto error_report_dma_error; 2954 2955 ena_buf->paddr = dma; 2956 ena_buf->len = skb_head_len - push_len; 2957 2958 ena_buf++; 2959 tx_info->num_of_bufs++; 2960 tx_info->map_linear_data = 1; 2961 } else { 2962 tx_info->map_linear_data = 0; 2963 } 2964 2965 last_frag = skb_shinfo(skb)->nr_frags; 2966 2967 for (i = 0; i < last_frag; i++) { 2968 const skb_frag_t *frag = &skb_shinfo(skb)->frags[i]; 2969 2970 frag_len = skb_frag_size(frag); 2971 2972 if (unlikely(delta >= frag_len)) { 2973 delta -= frag_len; 2974 continue; 2975 } 2976 2977 dma = skb_frag_dma_map(tx_ring->dev, frag, delta, 2978 frag_len - delta, DMA_TO_DEVICE); 2979 if (unlikely(dma_mapping_error(tx_ring->dev, dma))) 2980 goto error_report_dma_error; 2981 2982 ena_buf->paddr = dma; 2983 ena_buf->len = frag_len - delta; 2984 ena_buf++; 2985 tx_info->num_of_bufs++; 2986 delta = 0; 2987 } 2988 2989 return 0; 2990 2991 error_report_dma_error: 2992 ena_increase_stat(&tx_ring->tx_stats.dma_mapping_err, 1, 2993 &tx_ring->syncp); 2994 netif_warn(adapter, tx_queued, adapter->netdev, "Failed to map skb\n"); 2995 2996 tx_info->skb = NULL; 2997 2998 tx_info->num_of_bufs += i; 2999 ena_unmap_tx_buff(tx_ring, tx_info); 3000 3001 return -EINVAL; 3002 } 3003 3004 /* Called with netif_tx_lock. */ 3005 static netdev_tx_t ena_start_xmit(struct sk_buff *skb, struct net_device *dev) 3006 { 3007 struct ena_adapter *adapter = netdev_priv(dev); 3008 struct ena_tx_buffer *tx_info; 3009 struct ena_com_tx_ctx ena_tx_ctx; 3010 struct ena_ring *tx_ring; 3011 struct netdev_queue *txq; 3012 void *push_hdr; 3013 u16 next_to_use, req_id, header_len; 3014 int qid, rc; 3015 3016 netif_dbg(adapter, tx_queued, dev, "%s skb %p\n", __func__, skb); 3017 /* Determine which tx ring we will be placed on */ 3018 qid = skb_get_queue_mapping(skb); 3019 tx_ring = &adapter->tx_ring[qid]; 3020 txq = netdev_get_tx_queue(dev, qid); 3021 3022 rc = ena_check_and_linearize_skb(tx_ring, skb); 3023 if (unlikely(rc)) 3024 goto error_drop_packet; 3025 3026 skb_tx_timestamp(skb); 3027 3028 next_to_use = tx_ring->next_to_use; 3029 req_id = tx_ring->free_ids[next_to_use]; 3030 tx_info = &tx_ring->tx_buffer_info[req_id]; 3031 tx_info->num_of_bufs = 0; 3032 3033 WARN(tx_info->skb, "SKB isn't NULL req_id %d\n", req_id); 3034 3035 rc = ena_tx_map_skb(tx_ring, tx_info, skb, &push_hdr, &header_len); 3036 if (unlikely(rc)) 3037 goto error_drop_packet; 3038 3039 memset(&ena_tx_ctx, 0x0, sizeof(struct ena_com_tx_ctx)); 3040 ena_tx_ctx.ena_bufs = tx_info->bufs; 3041 ena_tx_ctx.push_header = push_hdr; 3042 ena_tx_ctx.num_bufs = tx_info->num_of_bufs; 3043 ena_tx_ctx.req_id = req_id; 3044 ena_tx_ctx.header_len = header_len; 3045 3046 /* set flags and meta data */ 3047 ena_tx_csum(&ena_tx_ctx, skb, tx_ring->disable_meta_caching); 3048 3049 rc = ena_xmit_common(dev, 3050 tx_ring, 3051 tx_info, 3052 &ena_tx_ctx, 3053 next_to_use, 3054 skb->len); 3055 if (rc) 3056 goto error_unmap_dma; 3057 3058 netdev_tx_sent_queue(txq, skb->len); 3059 3060 /* stop the queue when no more space available, the packet can have up 3061 * to sgl_size + 2. one for the meta descriptor and one for header 3062 * (if the header is larger than tx_max_header_size). 3063 */ 3064 if (unlikely(!ena_com_sq_have_enough_space(tx_ring->ena_com_io_sq, 3065 tx_ring->sgl_size + 2))) { 3066 netif_dbg(adapter, tx_queued, dev, "%s stop queue %d\n", 3067 __func__, qid); 3068 3069 netif_tx_stop_queue(txq); 3070 ena_increase_stat(&tx_ring->tx_stats.queue_stop, 1, 3071 &tx_ring->syncp); 3072 3073 /* There is a rare condition where this function decide to 3074 * stop the queue but meanwhile clean_tx_irq updates 3075 * next_to_completion and terminates. 3076 * The queue will remain stopped forever. 3077 * To solve this issue add a mb() to make sure that 3078 * netif_tx_stop_queue() write is vissible before checking if 3079 * there is additional space in the queue. 3080 */ 3081 smp_mb(); 3082 3083 if (ena_com_sq_have_enough_space(tx_ring->ena_com_io_sq, 3084 ENA_TX_WAKEUP_THRESH)) { 3085 netif_tx_wake_queue(txq); 3086 ena_increase_stat(&tx_ring->tx_stats.queue_wakeup, 1, 3087 &tx_ring->syncp); 3088 } 3089 } 3090 3091 if (netif_xmit_stopped(txq) || !netdev_xmit_more()) { 3092 /* trigger the dma engine. ena_com_write_sq_doorbell() 3093 * has a mb 3094 */ 3095 ena_com_write_sq_doorbell(tx_ring->ena_com_io_sq); 3096 ena_increase_stat(&tx_ring->tx_stats.doorbells, 1, 3097 &tx_ring->syncp); 3098 } 3099 3100 return NETDEV_TX_OK; 3101 3102 error_unmap_dma: 3103 ena_unmap_tx_buff(tx_ring, tx_info); 3104 tx_info->skb = NULL; 3105 3106 error_drop_packet: 3107 dev_kfree_skb(skb); 3108 return NETDEV_TX_OK; 3109 } 3110 3111 static u16 ena_select_queue(struct net_device *dev, struct sk_buff *skb, 3112 struct net_device *sb_dev) 3113 { 3114 u16 qid; 3115 /* we suspect that this is good for in--kernel network services that 3116 * want to loop incoming skb rx to tx in normal user generated traffic, 3117 * most probably we will not get to this 3118 */ 3119 if (skb_rx_queue_recorded(skb)) 3120 qid = skb_get_rx_queue(skb); 3121 else 3122 qid = netdev_pick_tx(dev, skb, NULL); 3123 3124 return qid; 3125 } 3126 3127 static void ena_config_host_info(struct ena_com_dev *ena_dev, struct pci_dev *pdev) 3128 { 3129 struct device *dev = &pdev->dev; 3130 struct ena_admin_host_info *host_info; 3131 int rc; 3132 3133 /* Allocate only the host info */ 3134 rc = ena_com_allocate_host_info(ena_dev); 3135 if (rc) { 3136 dev_err(dev, "Cannot allocate host info\n"); 3137 return; 3138 } 3139 3140 host_info = ena_dev->host_attr.host_info; 3141 3142 host_info->bdf = (pdev->bus->number << 8) | pdev->devfn; 3143 host_info->os_type = ENA_ADMIN_OS_LINUX; 3144 host_info->kernel_ver = LINUX_VERSION_CODE; 3145 strlcpy(host_info->kernel_ver_str, utsname()->version, 3146 sizeof(host_info->kernel_ver_str) - 1); 3147 host_info->os_dist = 0; 3148 strncpy(host_info->os_dist_str, utsname()->release, 3149 sizeof(host_info->os_dist_str) - 1); 3150 host_info->driver_version = 3151 (DRV_MODULE_GEN_MAJOR) | 3152 (DRV_MODULE_GEN_MINOR << ENA_ADMIN_HOST_INFO_MINOR_SHIFT) | 3153 (DRV_MODULE_GEN_SUBMINOR << ENA_ADMIN_HOST_INFO_SUB_MINOR_SHIFT) | 3154 ("K"[0] << ENA_ADMIN_HOST_INFO_MODULE_TYPE_SHIFT); 3155 host_info->num_cpus = num_online_cpus(); 3156 3157 host_info->driver_supported_features = 3158 ENA_ADMIN_HOST_INFO_RX_OFFSET_MASK | 3159 ENA_ADMIN_HOST_INFO_INTERRUPT_MODERATION_MASK | 3160 ENA_ADMIN_HOST_INFO_RX_BUF_MIRRORING_MASK | 3161 ENA_ADMIN_HOST_INFO_RSS_CONFIGURABLE_FUNCTION_KEY_MASK; 3162 3163 rc = ena_com_set_host_attributes(ena_dev); 3164 if (rc) { 3165 if (rc == -EOPNOTSUPP) 3166 dev_warn(dev, "Cannot set host attributes\n"); 3167 else 3168 dev_err(dev, "Cannot set host attributes\n"); 3169 3170 goto err; 3171 } 3172 3173 return; 3174 3175 err: 3176 ena_com_delete_host_info(ena_dev); 3177 } 3178 3179 static void ena_config_debug_area(struct ena_adapter *adapter) 3180 { 3181 u32 debug_area_size; 3182 int rc, ss_count; 3183 3184 ss_count = ena_get_sset_count(adapter->netdev, ETH_SS_STATS); 3185 if (ss_count <= 0) { 3186 netif_err(adapter, drv, adapter->netdev, 3187 "SS count is negative\n"); 3188 return; 3189 } 3190 3191 /* allocate 32 bytes for each string and 64bit for the value */ 3192 debug_area_size = ss_count * ETH_GSTRING_LEN + sizeof(u64) * ss_count; 3193 3194 rc = ena_com_allocate_debug_area(adapter->ena_dev, debug_area_size); 3195 if (rc) { 3196 netif_err(adapter, drv, adapter->netdev, 3197 "Cannot allocate debug area\n"); 3198 return; 3199 } 3200 3201 rc = ena_com_set_host_attributes(adapter->ena_dev); 3202 if (rc) { 3203 if (rc == -EOPNOTSUPP) 3204 netif_warn(adapter, drv, adapter->netdev, 3205 "Cannot set host attributes\n"); 3206 else 3207 netif_err(adapter, drv, adapter->netdev, 3208 "Cannot set host attributes\n"); 3209 goto err; 3210 } 3211 3212 return; 3213 err: 3214 ena_com_delete_debug_area(adapter->ena_dev); 3215 } 3216 3217 int ena_update_hw_stats(struct ena_adapter *adapter) 3218 { 3219 int rc = 0; 3220 3221 rc = ena_com_get_eni_stats(adapter->ena_dev, &adapter->eni_stats); 3222 if (rc) { 3223 dev_info_once(&adapter->pdev->dev, "Failed to get ENI stats\n"); 3224 return rc; 3225 } 3226 3227 return 0; 3228 } 3229 3230 static void ena_get_stats64(struct net_device *netdev, 3231 struct rtnl_link_stats64 *stats) 3232 { 3233 struct ena_adapter *adapter = netdev_priv(netdev); 3234 struct ena_ring *rx_ring, *tx_ring; 3235 unsigned int start; 3236 u64 rx_drops; 3237 u64 tx_drops; 3238 int i; 3239 3240 if (!test_bit(ENA_FLAG_DEV_UP, &adapter->flags)) 3241 return; 3242 3243 for (i = 0; i < adapter->num_io_queues; i++) { 3244 u64 bytes, packets; 3245 3246 tx_ring = &adapter->tx_ring[i]; 3247 3248 do { 3249 start = u64_stats_fetch_begin_irq(&tx_ring->syncp); 3250 packets = tx_ring->tx_stats.cnt; 3251 bytes = tx_ring->tx_stats.bytes; 3252 } while (u64_stats_fetch_retry_irq(&tx_ring->syncp, start)); 3253 3254 stats->tx_packets += packets; 3255 stats->tx_bytes += bytes; 3256 3257 rx_ring = &adapter->rx_ring[i]; 3258 3259 do { 3260 start = u64_stats_fetch_begin_irq(&rx_ring->syncp); 3261 packets = rx_ring->rx_stats.cnt; 3262 bytes = rx_ring->rx_stats.bytes; 3263 } while (u64_stats_fetch_retry_irq(&rx_ring->syncp, start)); 3264 3265 stats->rx_packets += packets; 3266 stats->rx_bytes += bytes; 3267 } 3268 3269 do { 3270 start = u64_stats_fetch_begin_irq(&adapter->syncp); 3271 rx_drops = adapter->dev_stats.rx_drops; 3272 tx_drops = adapter->dev_stats.tx_drops; 3273 } while (u64_stats_fetch_retry_irq(&adapter->syncp, start)); 3274 3275 stats->rx_dropped = rx_drops; 3276 stats->tx_dropped = tx_drops; 3277 3278 stats->multicast = 0; 3279 stats->collisions = 0; 3280 3281 stats->rx_length_errors = 0; 3282 stats->rx_crc_errors = 0; 3283 stats->rx_frame_errors = 0; 3284 stats->rx_fifo_errors = 0; 3285 stats->rx_missed_errors = 0; 3286 stats->tx_window_errors = 0; 3287 3288 stats->rx_errors = 0; 3289 stats->tx_errors = 0; 3290 } 3291 3292 static const struct net_device_ops ena_netdev_ops = { 3293 .ndo_open = ena_open, 3294 .ndo_stop = ena_close, 3295 .ndo_start_xmit = ena_start_xmit, 3296 .ndo_select_queue = ena_select_queue, 3297 .ndo_get_stats64 = ena_get_stats64, 3298 .ndo_tx_timeout = ena_tx_timeout, 3299 .ndo_change_mtu = ena_change_mtu, 3300 .ndo_set_mac_address = NULL, 3301 .ndo_validate_addr = eth_validate_addr, 3302 .ndo_bpf = ena_xdp, 3303 .ndo_xdp_xmit = ena_xdp_xmit, 3304 }; 3305 3306 static int ena_device_validate_params(struct ena_adapter *adapter, 3307 struct ena_com_dev_get_features_ctx *get_feat_ctx) 3308 { 3309 struct net_device *netdev = adapter->netdev; 3310 int rc; 3311 3312 rc = ether_addr_equal(get_feat_ctx->dev_attr.mac_addr, 3313 adapter->mac_addr); 3314 if (!rc) { 3315 netif_err(adapter, drv, netdev, 3316 "Error, mac address are different\n"); 3317 return -EINVAL; 3318 } 3319 3320 if (get_feat_ctx->dev_attr.max_mtu < netdev->mtu) { 3321 netif_err(adapter, drv, netdev, 3322 "Error, device max mtu is smaller than netdev MTU\n"); 3323 return -EINVAL; 3324 } 3325 3326 return 0; 3327 } 3328 3329 static void set_default_llq_configurations(struct ena_llq_configurations *llq_config) 3330 { 3331 llq_config->llq_header_location = ENA_ADMIN_INLINE_HEADER; 3332 llq_config->llq_stride_ctrl = ENA_ADMIN_MULTIPLE_DESCS_PER_ENTRY; 3333 llq_config->llq_num_decs_before_header = ENA_ADMIN_LLQ_NUM_DESCS_BEFORE_HEADER_2; 3334 llq_config->llq_ring_entry_size = ENA_ADMIN_LIST_ENTRY_SIZE_128B; 3335 llq_config->llq_ring_entry_size_value = 128; 3336 } 3337 3338 static int ena_set_queues_placement_policy(struct pci_dev *pdev, 3339 struct ena_com_dev *ena_dev, 3340 struct ena_admin_feature_llq_desc *llq, 3341 struct ena_llq_configurations *llq_default_configurations) 3342 { 3343 int rc; 3344 u32 llq_feature_mask; 3345 3346 llq_feature_mask = 1 << ENA_ADMIN_LLQ; 3347 if (!(ena_dev->supported_features & llq_feature_mask)) { 3348 dev_err(&pdev->dev, 3349 "LLQ is not supported Fallback to host mode policy.\n"); 3350 ena_dev->tx_mem_queue_type = ENA_ADMIN_PLACEMENT_POLICY_HOST; 3351 return 0; 3352 } 3353 3354 rc = ena_com_config_dev_mode(ena_dev, llq, llq_default_configurations); 3355 if (unlikely(rc)) { 3356 dev_err(&pdev->dev, 3357 "Failed to configure the device mode. Fallback to host mode policy.\n"); 3358 ena_dev->tx_mem_queue_type = ENA_ADMIN_PLACEMENT_POLICY_HOST; 3359 } 3360 3361 return 0; 3362 } 3363 3364 static int ena_map_llq_mem_bar(struct pci_dev *pdev, struct ena_com_dev *ena_dev, 3365 int bars) 3366 { 3367 bool has_mem_bar = !!(bars & BIT(ENA_MEM_BAR)); 3368 3369 if (!has_mem_bar) { 3370 if (ena_dev->tx_mem_queue_type == ENA_ADMIN_PLACEMENT_POLICY_DEV) { 3371 dev_err(&pdev->dev, 3372 "ENA device does not expose LLQ bar. Fallback to host mode policy.\n"); 3373 ena_dev->tx_mem_queue_type = ENA_ADMIN_PLACEMENT_POLICY_HOST; 3374 } 3375 3376 return 0; 3377 } 3378 3379 ena_dev->mem_bar = devm_ioremap_wc(&pdev->dev, 3380 pci_resource_start(pdev, ENA_MEM_BAR), 3381 pci_resource_len(pdev, ENA_MEM_BAR)); 3382 3383 if (!ena_dev->mem_bar) 3384 return -EFAULT; 3385 3386 return 0; 3387 } 3388 3389 static int ena_device_init(struct ena_com_dev *ena_dev, struct pci_dev *pdev, 3390 struct ena_com_dev_get_features_ctx *get_feat_ctx, 3391 bool *wd_state) 3392 { 3393 struct ena_llq_configurations llq_config; 3394 struct device *dev = &pdev->dev; 3395 bool readless_supported; 3396 u32 aenq_groups; 3397 int dma_width; 3398 int rc; 3399 3400 rc = ena_com_mmio_reg_read_request_init(ena_dev); 3401 if (rc) { 3402 dev_err(dev, "Failed to init mmio read less\n"); 3403 return rc; 3404 } 3405 3406 /* The PCIe configuration space revision id indicate if mmio reg 3407 * read is disabled 3408 */ 3409 readless_supported = !(pdev->revision & ENA_MMIO_DISABLE_REG_READ); 3410 ena_com_set_mmio_read_mode(ena_dev, readless_supported); 3411 3412 rc = ena_com_dev_reset(ena_dev, ENA_REGS_RESET_NORMAL); 3413 if (rc) { 3414 dev_err(dev, "Can not reset device\n"); 3415 goto err_mmio_read_less; 3416 } 3417 3418 rc = ena_com_validate_version(ena_dev); 3419 if (rc) { 3420 dev_err(dev, "Device version is too low\n"); 3421 goto err_mmio_read_less; 3422 } 3423 3424 dma_width = ena_com_get_dma_width(ena_dev); 3425 if (dma_width < 0) { 3426 dev_err(dev, "Invalid dma width value %d", dma_width); 3427 rc = dma_width; 3428 goto err_mmio_read_less; 3429 } 3430 3431 rc = dma_set_mask_and_coherent(dev, DMA_BIT_MASK(dma_width)); 3432 if (rc) { 3433 dev_err(dev, "dma_set_mask_and_coherent failed %d\n", rc); 3434 goto err_mmio_read_less; 3435 } 3436 3437 /* ENA admin level init */ 3438 rc = ena_com_admin_init(ena_dev, &aenq_handlers); 3439 if (rc) { 3440 dev_err(dev, 3441 "Can not initialize ena admin queue with device\n"); 3442 goto err_mmio_read_less; 3443 } 3444 3445 /* To enable the msix interrupts the driver needs to know the number 3446 * of queues. So the driver uses polling mode to retrieve this 3447 * information 3448 */ 3449 ena_com_set_admin_polling_mode(ena_dev, true); 3450 3451 ena_config_host_info(ena_dev, pdev); 3452 3453 /* Get Device Attributes*/ 3454 rc = ena_com_get_dev_attr_feat(ena_dev, get_feat_ctx); 3455 if (rc) { 3456 dev_err(dev, "Cannot get attribute for ena device rc=%d\n", rc); 3457 goto err_admin_init; 3458 } 3459 3460 /* Try to turn all the available aenq groups */ 3461 aenq_groups = BIT(ENA_ADMIN_LINK_CHANGE) | 3462 BIT(ENA_ADMIN_FATAL_ERROR) | 3463 BIT(ENA_ADMIN_WARNING) | 3464 BIT(ENA_ADMIN_NOTIFICATION) | 3465 BIT(ENA_ADMIN_KEEP_ALIVE); 3466 3467 aenq_groups &= get_feat_ctx->aenq.supported_groups; 3468 3469 rc = ena_com_set_aenq_config(ena_dev, aenq_groups); 3470 if (rc) { 3471 dev_err(dev, "Cannot configure aenq groups rc= %d\n", rc); 3472 goto err_admin_init; 3473 } 3474 3475 *wd_state = !!(aenq_groups & BIT(ENA_ADMIN_KEEP_ALIVE)); 3476 3477 set_default_llq_configurations(&llq_config); 3478 3479 rc = ena_set_queues_placement_policy(pdev, ena_dev, &get_feat_ctx->llq, 3480 &llq_config); 3481 if (rc) { 3482 dev_err(dev, "ENA device init failed\n"); 3483 goto err_admin_init; 3484 } 3485 3486 return 0; 3487 3488 err_admin_init: 3489 ena_com_delete_host_info(ena_dev); 3490 ena_com_admin_destroy(ena_dev); 3491 err_mmio_read_less: 3492 ena_com_mmio_reg_read_request_destroy(ena_dev); 3493 3494 return rc; 3495 } 3496 3497 static int ena_enable_msix_and_set_admin_interrupts(struct ena_adapter *adapter) 3498 { 3499 struct ena_com_dev *ena_dev = adapter->ena_dev; 3500 struct device *dev = &adapter->pdev->dev; 3501 int rc; 3502 3503 rc = ena_enable_msix(adapter); 3504 if (rc) { 3505 dev_err(dev, "Can not reserve msix vectors\n"); 3506 return rc; 3507 } 3508 3509 ena_setup_mgmnt_intr(adapter); 3510 3511 rc = ena_request_mgmnt_irq(adapter); 3512 if (rc) { 3513 dev_err(dev, "Can not setup management interrupts\n"); 3514 goto err_disable_msix; 3515 } 3516 3517 ena_com_set_admin_polling_mode(ena_dev, false); 3518 3519 ena_com_admin_aenq_enable(ena_dev); 3520 3521 return 0; 3522 3523 err_disable_msix: 3524 ena_disable_msix(adapter); 3525 3526 return rc; 3527 } 3528 3529 static void ena_destroy_device(struct ena_adapter *adapter, bool graceful) 3530 { 3531 struct net_device *netdev = adapter->netdev; 3532 struct ena_com_dev *ena_dev = adapter->ena_dev; 3533 bool dev_up; 3534 3535 if (!test_bit(ENA_FLAG_DEVICE_RUNNING, &adapter->flags)) 3536 return; 3537 3538 netif_carrier_off(netdev); 3539 3540 del_timer_sync(&adapter->timer_service); 3541 3542 dev_up = test_bit(ENA_FLAG_DEV_UP, &adapter->flags); 3543 adapter->dev_up_before_reset = dev_up; 3544 if (!graceful) 3545 ena_com_set_admin_running_state(ena_dev, false); 3546 3547 if (test_bit(ENA_FLAG_DEV_UP, &adapter->flags)) 3548 ena_down(adapter); 3549 3550 /* Stop the device from sending AENQ events (in case reset flag is set 3551 * and device is up, ena_down() already reset the device. 3552 */ 3553 if (!(test_bit(ENA_FLAG_TRIGGER_RESET, &adapter->flags) && dev_up)) 3554 ena_com_dev_reset(adapter->ena_dev, adapter->reset_reason); 3555 3556 ena_free_mgmnt_irq(adapter); 3557 3558 ena_disable_msix(adapter); 3559 3560 ena_com_abort_admin_commands(ena_dev); 3561 3562 ena_com_wait_for_abort_completion(ena_dev); 3563 3564 ena_com_admin_destroy(ena_dev); 3565 3566 ena_com_mmio_reg_read_request_destroy(ena_dev); 3567 3568 /* return reset reason to default value */ 3569 adapter->reset_reason = ENA_REGS_RESET_NORMAL; 3570 3571 clear_bit(ENA_FLAG_TRIGGER_RESET, &adapter->flags); 3572 clear_bit(ENA_FLAG_DEVICE_RUNNING, &adapter->flags); 3573 } 3574 3575 static int ena_restore_device(struct ena_adapter *adapter) 3576 { 3577 struct ena_com_dev_get_features_ctx get_feat_ctx; 3578 struct ena_com_dev *ena_dev = adapter->ena_dev; 3579 struct pci_dev *pdev = adapter->pdev; 3580 bool wd_state; 3581 int rc; 3582 3583 set_bit(ENA_FLAG_ONGOING_RESET, &adapter->flags); 3584 rc = ena_device_init(ena_dev, adapter->pdev, &get_feat_ctx, &wd_state); 3585 if (rc) { 3586 dev_err(&pdev->dev, "Can not initialize device\n"); 3587 goto err; 3588 } 3589 adapter->wd_state = wd_state; 3590 3591 rc = ena_device_validate_params(adapter, &get_feat_ctx); 3592 if (rc) { 3593 dev_err(&pdev->dev, "Validation of device parameters failed\n"); 3594 goto err_device_destroy; 3595 } 3596 3597 rc = ena_enable_msix_and_set_admin_interrupts(adapter); 3598 if (rc) { 3599 dev_err(&pdev->dev, "Enable MSI-X failed\n"); 3600 goto err_device_destroy; 3601 } 3602 /* If the interface was up before the reset bring it up */ 3603 if (adapter->dev_up_before_reset) { 3604 rc = ena_up(adapter); 3605 if (rc) { 3606 dev_err(&pdev->dev, "Failed to create I/O queues\n"); 3607 goto err_disable_msix; 3608 } 3609 } 3610 3611 set_bit(ENA_FLAG_DEVICE_RUNNING, &adapter->flags); 3612 3613 clear_bit(ENA_FLAG_ONGOING_RESET, &adapter->flags); 3614 if (test_bit(ENA_FLAG_LINK_UP, &adapter->flags)) 3615 netif_carrier_on(adapter->netdev); 3616 3617 mod_timer(&adapter->timer_service, round_jiffies(jiffies + HZ)); 3618 adapter->last_keep_alive_jiffies = jiffies; 3619 3620 dev_err(&pdev->dev, "Device reset completed successfully\n"); 3621 3622 return rc; 3623 err_disable_msix: 3624 ena_free_mgmnt_irq(adapter); 3625 ena_disable_msix(adapter); 3626 err_device_destroy: 3627 ena_com_abort_admin_commands(ena_dev); 3628 ena_com_wait_for_abort_completion(ena_dev); 3629 ena_com_admin_destroy(ena_dev); 3630 ena_com_dev_reset(ena_dev, ENA_REGS_RESET_DRIVER_INVALID_STATE); 3631 ena_com_mmio_reg_read_request_destroy(ena_dev); 3632 err: 3633 clear_bit(ENA_FLAG_DEVICE_RUNNING, &adapter->flags); 3634 clear_bit(ENA_FLAG_ONGOING_RESET, &adapter->flags); 3635 dev_err(&pdev->dev, 3636 "Reset attempt failed. Can not reset the device\n"); 3637 3638 return rc; 3639 } 3640 3641 static void ena_fw_reset_device(struct work_struct *work) 3642 { 3643 struct ena_adapter *adapter = 3644 container_of(work, struct ena_adapter, reset_task); 3645 3646 rtnl_lock(); 3647 3648 if (likely(test_bit(ENA_FLAG_TRIGGER_RESET, &adapter->flags))) { 3649 ena_destroy_device(adapter, false); 3650 ena_restore_device(adapter); 3651 } 3652 3653 rtnl_unlock(); 3654 } 3655 3656 static int check_for_rx_interrupt_queue(struct ena_adapter *adapter, 3657 struct ena_ring *rx_ring) 3658 { 3659 if (likely(rx_ring->first_interrupt)) 3660 return 0; 3661 3662 if (ena_com_cq_empty(rx_ring->ena_com_io_cq)) 3663 return 0; 3664 3665 rx_ring->no_interrupt_event_cnt++; 3666 3667 if (rx_ring->no_interrupt_event_cnt == ENA_MAX_NO_INTERRUPT_ITERATIONS) { 3668 netif_err(adapter, rx_err, adapter->netdev, 3669 "Potential MSIX issue on Rx side Queue = %d. Reset the device\n", 3670 rx_ring->qid); 3671 adapter->reset_reason = ENA_REGS_RESET_MISS_INTERRUPT; 3672 smp_mb__before_atomic(); 3673 set_bit(ENA_FLAG_TRIGGER_RESET, &adapter->flags); 3674 return -EIO; 3675 } 3676 3677 return 0; 3678 } 3679 3680 static int check_missing_comp_in_tx_queue(struct ena_adapter *adapter, 3681 struct ena_ring *tx_ring) 3682 { 3683 struct ena_tx_buffer *tx_buf; 3684 unsigned long last_jiffies; 3685 u32 missed_tx = 0; 3686 int i, rc = 0; 3687 3688 for (i = 0; i < tx_ring->ring_size; i++) { 3689 tx_buf = &tx_ring->tx_buffer_info[i]; 3690 last_jiffies = tx_buf->last_jiffies; 3691 3692 if (last_jiffies == 0) 3693 /* no pending Tx at this location */ 3694 continue; 3695 3696 if (unlikely(!tx_ring->first_interrupt && time_is_before_jiffies(last_jiffies + 3697 2 * adapter->missing_tx_completion_to))) { 3698 /* If after graceful period interrupt is still not 3699 * received, we schedule a reset 3700 */ 3701 netif_err(adapter, tx_err, adapter->netdev, 3702 "Potential MSIX issue on Tx side Queue = %d. Reset the device\n", 3703 tx_ring->qid); 3704 adapter->reset_reason = ENA_REGS_RESET_MISS_INTERRUPT; 3705 smp_mb__before_atomic(); 3706 set_bit(ENA_FLAG_TRIGGER_RESET, &adapter->flags); 3707 return -EIO; 3708 } 3709 3710 if (unlikely(time_is_before_jiffies(last_jiffies + 3711 adapter->missing_tx_completion_to))) { 3712 if (!tx_buf->print_once) 3713 netif_notice(adapter, tx_err, adapter->netdev, 3714 "Found a Tx that wasn't completed on time, qid %d, index %d.\n", 3715 tx_ring->qid, i); 3716 3717 tx_buf->print_once = 1; 3718 missed_tx++; 3719 } 3720 } 3721 3722 if (unlikely(missed_tx > adapter->missing_tx_completion_threshold)) { 3723 netif_err(adapter, tx_err, adapter->netdev, 3724 "The number of lost tx completions is above the threshold (%d > %d). Reset the device\n", 3725 missed_tx, 3726 adapter->missing_tx_completion_threshold); 3727 adapter->reset_reason = 3728 ENA_REGS_RESET_MISS_TX_CMPL; 3729 set_bit(ENA_FLAG_TRIGGER_RESET, &adapter->flags); 3730 rc = -EIO; 3731 } 3732 3733 ena_increase_stat(&tx_ring->tx_stats.missed_tx, missed_tx, 3734 &tx_ring->syncp); 3735 3736 return rc; 3737 } 3738 3739 static void check_for_missing_completions(struct ena_adapter *adapter) 3740 { 3741 struct ena_ring *tx_ring; 3742 struct ena_ring *rx_ring; 3743 int i, budget, rc; 3744 int io_queue_count; 3745 3746 io_queue_count = adapter->xdp_num_queues + adapter->num_io_queues; 3747 /* Make sure the driver doesn't turn the device in other process */ 3748 smp_rmb(); 3749 3750 if (!test_bit(ENA_FLAG_DEV_UP, &adapter->flags)) 3751 return; 3752 3753 if (test_bit(ENA_FLAG_TRIGGER_RESET, &adapter->flags)) 3754 return; 3755 3756 if (adapter->missing_tx_completion_to == ENA_HW_HINTS_NO_TIMEOUT) 3757 return; 3758 3759 budget = ENA_MONITORED_TX_QUEUES; 3760 3761 for (i = adapter->last_monitored_tx_qid; i < io_queue_count; i++) { 3762 tx_ring = &adapter->tx_ring[i]; 3763 rx_ring = &adapter->rx_ring[i]; 3764 3765 rc = check_missing_comp_in_tx_queue(adapter, tx_ring); 3766 if (unlikely(rc)) 3767 return; 3768 3769 rc = !ENA_IS_XDP_INDEX(adapter, i) ? 3770 check_for_rx_interrupt_queue(adapter, rx_ring) : 0; 3771 if (unlikely(rc)) 3772 return; 3773 3774 budget--; 3775 if (!budget) 3776 break; 3777 } 3778 3779 adapter->last_monitored_tx_qid = i % io_queue_count; 3780 } 3781 3782 /* trigger napi schedule after 2 consecutive detections */ 3783 #define EMPTY_RX_REFILL 2 3784 /* For the rare case where the device runs out of Rx descriptors and the 3785 * napi handler failed to refill new Rx descriptors (due to a lack of memory 3786 * for example). 3787 * This case will lead to a deadlock: 3788 * The device won't send interrupts since all the new Rx packets will be dropped 3789 * The napi handler won't allocate new Rx descriptors so the device will be 3790 * able to send new packets. 3791 * 3792 * This scenario can happen when the kernel's vm.min_free_kbytes is too small. 3793 * It is recommended to have at least 512MB, with a minimum of 128MB for 3794 * constrained environment). 3795 * 3796 * When such a situation is detected - Reschedule napi 3797 */ 3798 static void check_for_empty_rx_ring(struct ena_adapter *adapter) 3799 { 3800 struct ena_ring *rx_ring; 3801 int i, refill_required; 3802 3803 if (!test_bit(ENA_FLAG_DEV_UP, &adapter->flags)) 3804 return; 3805 3806 if (test_bit(ENA_FLAG_TRIGGER_RESET, &adapter->flags)) 3807 return; 3808 3809 for (i = 0; i < adapter->num_io_queues; i++) { 3810 rx_ring = &adapter->rx_ring[i]; 3811 3812 refill_required = ena_com_free_q_entries(rx_ring->ena_com_io_sq); 3813 if (unlikely(refill_required == (rx_ring->ring_size - 1))) { 3814 rx_ring->empty_rx_queue++; 3815 3816 if (rx_ring->empty_rx_queue >= EMPTY_RX_REFILL) { 3817 ena_increase_stat(&rx_ring->rx_stats.empty_rx_ring, 1, 3818 &rx_ring->syncp); 3819 3820 netif_err(adapter, drv, adapter->netdev, 3821 "Trigger refill for ring %d\n", i); 3822 3823 napi_schedule(rx_ring->napi); 3824 rx_ring->empty_rx_queue = 0; 3825 } 3826 } else { 3827 rx_ring->empty_rx_queue = 0; 3828 } 3829 } 3830 } 3831 3832 /* Check for keep alive expiration */ 3833 static void check_for_missing_keep_alive(struct ena_adapter *adapter) 3834 { 3835 unsigned long keep_alive_expired; 3836 3837 if (!adapter->wd_state) 3838 return; 3839 3840 if (adapter->keep_alive_timeout == ENA_HW_HINTS_NO_TIMEOUT) 3841 return; 3842 3843 keep_alive_expired = adapter->last_keep_alive_jiffies + 3844 adapter->keep_alive_timeout; 3845 if (unlikely(time_is_before_jiffies(keep_alive_expired))) { 3846 netif_err(adapter, drv, adapter->netdev, 3847 "Keep alive watchdog timeout.\n"); 3848 ena_increase_stat(&adapter->dev_stats.wd_expired, 1, 3849 &adapter->syncp); 3850 adapter->reset_reason = ENA_REGS_RESET_KEEP_ALIVE_TO; 3851 set_bit(ENA_FLAG_TRIGGER_RESET, &adapter->flags); 3852 } 3853 } 3854 3855 static void check_for_admin_com_state(struct ena_adapter *adapter) 3856 { 3857 if (unlikely(!ena_com_get_admin_running_state(adapter->ena_dev))) { 3858 netif_err(adapter, drv, adapter->netdev, 3859 "ENA admin queue is not in running state!\n"); 3860 ena_increase_stat(&adapter->dev_stats.admin_q_pause, 1, 3861 &adapter->syncp); 3862 adapter->reset_reason = ENA_REGS_RESET_ADMIN_TO; 3863 set_bit(ENA_FLAG_TRIGGER_RESET, &adapter->flags); 3864 } 3865 } 3866 3867 static void ena_update_hints(struct ena_adapter *adapter, 3868 struct ena_admin_ena_hw_hints *hints) 3869 { 3870 struct net_device *netdev = adapter->netdev; 3871 3872 if (hints->admin_completion_tx_timeout) 3873 adapter->ena_dev->admin_queue.completion_timeout = 3874 hints->admin_completion_tx_timeout * 1000; 3875 3876 if (hints->mmio_read_timeout) 3877 /* convert to usec */ 3878 adapter->ena_dev->mmio_read.reg_read_to = 3879 hints->mmio_read_timeout * 1000; 3880 3881 if (hints->missed_tx_completion_count_threshold_to_reset) 3882 adapter->missing_tx_completion_threshold = 3883 hints->missed_tx_completion_count_threshold_to_reset; 3884 3885 if (hints->missing_tx_completion_timeout) { 3886 if (hints->missing_tx_completion_timeout == ENA_HW_HINTS_NO_TIMEOUT) 3887 adapter->missing_tx_completion_to = ENA_HW_HINTS_NO_TIMEOUT; 3888 else 3889 adapter->missing_tx_completion_to = 3890 msecs_to_jiffies(hints->missing_tx_completion_timeout); 3891 } 3892 3893 if (hints->netdev_wd_timeout) 3894 netdev->watchdog_timeo = msecs_to_jiffies(hints->netdev_wd_timeout); 3895 3896 if (hints->driver_watchdog_timeout) { 3897 if (hints->driver_watchdog_timeout == ENA_HW_HINTS_NO_TIMEOUT) 3898 adapter->keep_alive_timeout = ENA_HW_HINTS_NO_TIMEOUT; 3899 else 3900 adapter->keep_alive_timeout = 3901 msecs_to_jiffies(hints->driver_watchdog_timeout); 3902 } 3903 } 3904 3905 static void ena_update_host_info(struct ena_admin_host_info *host_info, 3906 struct net_device *netdev) 3907 { 3908 host_info->supported_network_features[0] = 3909 netdev->features & GENMASK_ULL(31, 0); 3910 host_info->supported_network_features[1] = 3911 (netdev->features & GENMASK_ULL(63, 32)) >> 32; 3912 } 3913 3914 static void ena_timer_service(struct timer_list *t) 3915 { 3916 struct ena_adapter *adapter = from_timer(adapter, t, timer_service); 3917 u8 *debug_area = adapter->ena_dev->host_attr.debug_area_virt_addr; 3918 struct ena_admin_host_info *host_info = 3919 adapter->ena_dev->host_attr.host_info; 3920 3921 check_for_missing_keep_alive(adapter); 3922 3923 check_for_admin_com_state(adapter); 3924 3925 check_for_missing_completions(adapter); 3926 3927 check_for_empty_rx_ring(adapter); 3928 3929 if (debug_area) 3930 ena_dump_stats_to_buf(adapter, debug_area); 3931 3932 if (host_info) 3933 ena_update_host_info(host_info, adapter->netdev); 3934 3935 if (unlikely(test_bit(ENA_FLAG_TRIGGER_RESET, &adapter->flags))) { 3936 netif_err(adapter, drv, adapter->netdev, 3937 "Trigger reset is on\n"); 3938 ena_dump_stats_to_dmesg(adapter); 3939 queue_work(ena_wq, &adapter->reset_task); 3940 return; 3941 } 3942 3943 /* Reset the timer */ 3944 mod_timer(&adapter->timer_service, round_jiffies(jiffies + HZ)); 3945 } 3946 3947 static u32 ena_calc_max_io_queue_num(struct pci_dev *pdev, 3948 struct ena_com_dev *ena_dev, 3949 struct ena_com_dev_get_features_ctx *get_feat_ctx) 3950 { 3951 u32 io_tx_sq_num, io_tx_cq_num, io_rx_num, max_num_io_queues; 3952 3953 if (ena_dev->supported_features & BIT(ENA_ADMIN_MAX_QUEUES_EXT)) { 3954 struct ena_admin_queue_ext_feature_fields *max_queue_ext = 3955 &get_feat_ctx->max_queue_ext.max_queue_ext; 3956 io_rx_num = min_t(u32, max_queue_ext->max_rx_sq_num, 3957 max_queue_ext->max_rx_cq_num); 3958 3959 io_tx_sq_num = max_queue_ext->max_tx_sq_num; 3960 io_tx_cq_num = max_queue_ext->max_tx_cq_num; 3961 } else { 3962 struct ena_admin_queue_feature_desc *max_queues = 3963 &get_feat_ctx->max_queues; 3964 io_tx_sq_num = max_queues->max_sq_num; 3965 io_tx_cq_num = max_queues->max_cq_num; 3966 io_rx_num = min_t(u32, io_tx_sq_num, io_tx_cq_num); 3967 } 3968 3969 /* In case of LLQ use the llq fields for the tx SQ/CQ */ 3970 if (ena_dev->tx_mem_queue_type == ENA_ADMIN_PLACEMENT_POLICY_DEV) 3971 io_tx_sq_num = get_feat_ctx->llq.max_llq_num; 3972 3973 max_num_io_queues = min_t(u32, num_online_cpus(), ENA_MAX_NUM_IO_QUEUES); 3974 max_num_io_queues = min_t(u32, max_num_io_queues, io_rx_num); 3975 max_num_io_queues = min_t(u32, max_num_io_queues, io_tx_sq_num); 3976 max_num_io_queues = min_t(u32, max_num_io_queues, io_tx_cq_num); 3977 /* 1 IRQ for for mgmnt and 1 IRQs for each IO direction */ 3978 max_num_io_queues = min_t(u32, max_num_io_queues, pci_msix_vec_count(pdev) - 1); 3979 if (unlikely(!max_num_io_queues)) { 3980 dev_err(&pdev->dev, "The device doesn't have io queues\n"); 3981 return -EFAULT; 3982 } 3983 3984 return max_num_io_queues; 3985 } 3986 3987 static void ena_set_dev_offloads(struct ena_com_dev_get_features_ctx *feat, 3988 struct net_device *netdev) 3989 { 3990 netdev_features_t dev_features = 0; 3991 3992 /* Set offload features */ 3993 if (feat->offload.tx & 3994 ENA_ADMIN_FEATURE_OFFLOAD_DESC_TX_L4_IPV4_CSUM_PART_MASK) 3995 dev_features |= NETIF_F_IP_CSUM; 3996 3997 if (feat->offload.tx & 3998 ENA_ADMIN_FEATURE_OFFLOAD_DESC_TX_L4_IPV6_CSUM_PART_MASK) 3999 dev_features |= NETIF_F_IPV6_CSUM; 4000 4001 if (feat->offload.tx & ENA_ADMIN_FEATURE_OFFLOAD_DESC_TSO_IPV4_MASK) 4002 dev_features |= NETIF_F_TSO; 4003 4004 if (feat->offload.tx & ENA_ADMIN_FEATURE_OFFLOAD_DESC_TSO_IPV6_MASK) 4005 dev_features |= NETIF_F_TSO6; 4006 4007 if (feat->offload.tx & ENA_ADMIN_FEATURE_OFFLOAD_DESC_TSO_ECN_MASK) 4008 dev_features |= NETIF_F_TSO_ECN; 4009 4010 if (feat->offload.rx_supported & 4011 ENA_ADMIN_FEATURE_OFFLOAD_DESC_RX_L4_IPV4_CSUM_MASK) 4012 dev_features |= NETIF_F_RXCSUM; 4013 4014 if (feat->offload.rx_supported & 4015 ENA_ADMIN_FEATURE_OFFLOAD_DESC_RX_L4_IPV6_CSUM_MASK) 4016 dev_features |= NETIF_F_RXCSUM; 4017 4018 netdev->features = 4019 dev_features | 4020 NETIF_F_SG | 4021 NETIF_F_RXHASH | 4022 NETIF_F_HIGHDMA; 4023 4024 netdev->hw_features |= netdev->features; 4025 netdev->vlan_features |= netdev->features; 4026 } 4027 4028 static void ena_set_conf_feat_params(struct ena_adapter *adapter, 4029 struct ena_com_dev_get_features_ctx *feat) 4030 { 4031 struct net_device *netdev = adapter->netdev; 4032 4033 /* Copy mac address */ 4034 if (!is_valid_ether_addr(feat->dev_attr.mac_addr)) { 4035 eth_hw_addr_random(netdev); 4036 ether_addr_copy(adapter->mac_addr, netdev->dev_addr); 4037 } else { 4038 ether_addr_copy(adapter->mac_addr, feat->dev_attr.mac_addr); 4039 ether_addr_copy(netdev->dev_addr, adapter->mac_addr); 4040 } 4041 4042 /* Set offload features */ 4043 ena_set_dev_offloads(feat, netdev); 4044 4045 adapter->max_mtu = feat->dev_attr.max_mtu; 4046 netdev->max_mtu = adapter->max_mtu; 4047 netdev->min_mtu = ENA_MIN_MTU; 4048 } 4049 4050 static int ena_rss_init_default(struct ena_adapter *adapter) 4051 { 4052 struct ena_com_dev *ena_dev = adapter->ena_dev; 4053 struct device *dev = &adapter->pdev->dev; 4054 int rc, i; 4055 u32 val; 4056 4057 rc = ena_com_rss_init(ena_dev, ENA_RX_RSS_TABLE_LOG_SIZE); 4058 if (unlikely(rc)) { 4059 dev_err(dev, "Cannot init indirect table\n"); 4060 goto err_rss_init; 4061 } 4062 4063 for (i = 0; i < ENA_RX_RSS_TABLE_SIZE; i++) { 4064 val = ethtool_rxfh_indir_default(i, adapter->num_io_queues); 4065 rc = ena_com_indirect_table_fill_entry(ena_dev, i, 4066 ENA_IO_RXQ_IDX(val)); 4067 if (unlikely(rc && (rc != -EOPNOTSUPP))) { 4068 dev_err(dev, "Cannot fill indirect table\n"); 4069 goto err_fill_indir; 4070 } 4071 } 4072 4073 rc = ena_com_fill_hash_function(ena_dev, ENA_ADMIN_TOEPLITZ, NULL, 4074 ENA_HASH_KEY_SIZE, 0xFFFFFFFF); 4075 if (unlikely(rc && (rc != -EOPNOTSUPP))) { 4076 dev_err(dev, "Cannot fill hash function\n"); 4077 goto err_fill_indir; 4078 } 4079 4080 rc = ena_com_set_default_hash_ctrl(ena_dev); 4081 if (unlikely(rc && (rc != -EOPNOTSUPP))) { 4082 dev_err(dev, "Cannot fill hash control\n"); 4083 goto err_fill_indir; 4084 } 4085 4086 return 0; 4087 4088 err_fill_indir: 4089 ena_com_rss_destroy(ena_dev); 4090 err_rss_init: 4091 4092 return rc; 4093 } 4094 4095 static void ena_release_bars(struct ena_com_dev *ena_dev, struct pci_dev *pdev) 4096 { 4097 int release_bars = pci_select_bars(pdev, IORESOURCE_MEM) & ENA_BAR_MASK; 4098 4099 pci_release_selected_regions(pdev, release_bars); 4100 } 4101 4102 4103 static int ena_calc_io_queue_size(struct ena_calc_queue_size_ctx *ctx) 4104 { 4105 struct ena_admin_feature_llq_desc *llq = &ctx->get_feat_ctx->llq; 4106 struct ena_com_dev *ena_dev = ctx->ena_dev; 4107 u32 tx_queue_size = ENA_DEFAULT_RING_SIZE; 4108 u32 rx_queue_size = ENA_DEFAULT_RING_SIZE; 4109 u32 max_tx_queue_size; 4110 u32 max_rx_queue_size; 4111 4112 if (ena_dev->supported_features & BIT(ENA_ADMIN_MAX_QUEUES_EXT)) { 4113 struct ena_admin_queue_ext_feature_fields *max_queue_ext = 4114 &ctx->get_feat_ctx->max_queue_ext.max_queue_ext; 4115 max_rx_queue_size = min_t(u32, max_queue_ext->max_rx_cq_depth, 4116 max_queue_ext->max_rx_sq_depth); 4117 max_tx_queue_size = max_queue_ext->max_tx_cq_depth; 4118 4119 if (ena_dev->tx_mem_queue_type == ENA_ADMIN_PLACEMENT_POLICY_DEV) 4120 max_tx_queue_size = min_t(u32, max_tx_queue_size, 4121 llq->max_llq_depth); 4122 else 4123 max_tx_queue_size = min_t(u32, max_tx_queue_size, 4124 max_queue_ext->max_tx_sq_depth); 4125 4126 ctx->max_tx_sgl_size = min_t(u16, ENA_PKT_MAX_BUFS, 4127 max_queue_ext->max_per_packet_tx_descs); 4128 ctx->max_rx_sgl_size = min_t(u16, ENA_PKT_MAX_BUFS, 4129 max_queue_ext->max_per_packet_rx_descs); 4130 } else { 4131 struct ena_admin_queue_feature_desc *max_queues = 4132 &ctx->get_feat_ctx->max_queues; 4133 max_rx_queue_size = min_t(u32, max_queues->max_cq_depth, 4134 max_queues->max_sq_depth); 4135 max_tx_queue_size = max_queues->max_cq_depth; 4136 4137 if (ena_dev->tx_mem_queue_type == ENA_ADMIN_PLACEMENT_POLICY_DEV) 4138 max_tx_queue_size = min_t(u32, max_tx_queue_size, 4139 llq->max_llq_depth); 4140 else 4141 max_tx_queue_size = min_t(u32, max_tx_queue_size, 4142 max_queues->max_sq_depth); 4143 4144 ctx->max_tx_sgl_size = min_t(u16, ENA_PKT_MAX_BUFS, 4145 max_queues->max_packet_tx_descs); 4146 ctx->max_rx_sgl_size = min_t(u16, ENA_PKT_MAX_BUFS, 4147 max_queues->max_packet_rx_descs); 4148 } 4149 4150 max_tx_queue_size = rounddown_pow_of_two(max_tx_queue_size); 4151 max_rx_queue_size = rounddown_pow_of_two(max_rx_queue_size); 4152 4153 tx_queue_size = clamp_val(tx_queue_size, ENA_MIN_RING_SIZE, 4154 max_tx_queue_size); 4155 rx_queue_size = clamp_val(rx_queue_size, ENA_MIN_RING_SIZE, 4156 max_rx_queue_size); 4157 4158 tx_queue_size = rounddown_pow_of_two(tx_queue_size); 4159 rx_queue_size = rounddown_pow_of_two(rx_queue_size); 4160 4161 ctx->max_tx_queue_size = max_tx_queue_size; 4162 ctx->max_rx_queue_size = max_rx_queue_size; 4163 ctx->tx_queue_size = tx_queue_size; 4164 ctx->rx_queue_size = rx_queue_size; 4165 4166 return 0; 4167 } 4168 4169 /* ena_probe - Device Initialization Routine 4170 * @pdev: PCI device information struct 4171 * @ent: entry in ena_pci_tbl 4172 * 4173 * Returns 0 on success, negative on failure 4174 * 4175 * ena_probe initializes an adapter identified by a pci_dev structure. 4176 * The OS initialization, configuring of the adapter private structure, 4177 * and a hardware reset occur. 4178 */ 4179 static int ena_probe(struct pci_dev *pdev, const struct pci_device_id *ent) 4180 { 4181 struct ena_calc_queue_size_ctx calc_queue_ctx = {}; 4182 struct ena_com_dev_get_features_ctx get_feat_ctx; 4183 struct ena_com_dev *ena_dev = NULL; 4184 struct ena_adapter *adapter; 4185 struct net_device *netdev; 4186 static int adapters_found; 4187 u32 max_num_io_queues; 4188 bool wd_state; 4189 int bars, rc; 4190 4191 dev_dbg(&pdev->dev, "%s\n", __func__); 4192 4193 rc = pci_enable_device_mem(pdev); 4194 if (rc) { 4195 dev_err(&pdev->dev, "pci_enable_device_mem() failed!\n"); 4196 return rc; 4197 } 4198 4199 rc = dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(ENA_MAX_PHYS_ADDR_SIZE_BITS)); 4200 if (rc) { 4201 dev_err(&pdev->dev, "dma_set_mask_and_coherent failed %d\n", rc); 4202 goto err_disable_device; 4203 } 4204 4205 pci_set_master(pdev); 4206 4207 ena_dev = vzalloc(sizeof(*ena_dev)); 4208 if (!ena_dev) { 4209 rc = -ENOMEM; 4210 goto err_disable_device; 4211 } 4212 4213 bars = pci_select_bars(pdev, IORESOURCE_MEM) & ENA_BAR_MASK; 4214 rc = pci_request_selected_regions(pdev, bars, DRV_MODULE_NAME); 4215 if (rc) { 4216 dev_err(&pdev->dev, "pci_request_selected_regions failed %d\n", 4217 rc); 4218 goto err_free_ena_dev; 4219 } 4220 4221 ena_dev->reg_bar = devm_ioremap(&pdev->dev, 4222 pci_resource_start(pdev, ENA_REG_BAR), 4223 pci_resource_len(pdev, ENA_REG_BAR)); 4224 if (!ena_dev->reg_bar) { 4225 dev_err(&pdev->dev, "Failed to remap regs bar\n"); 4226 rc = -EFAULT; 4227 goto err_free_region; 4228 } 4229 4230 ena_dev->ena_min_poll_delay_us = ENA_ADMIN_POLL_DELAY_US; 4231 4232 ena_dev->dmadev = &pdev->dev; 4233 4234 netdev = alloc_etherdev_mq(sizeof(struct ena_adapter), ENA_MAX_RINGS); 4235 if (!netdev) { 4236 dev_err(&pdev->dev, "alloc_etherdev_mq failed\n"); 4237 rc = -ENOMEM; 4238 goto err_free_region; 4239 } 4240 4241 SET_NETDEV_DEV(netdev, &pdev->dev); 4242 adapter = netdev_priv(netdev); 4243 adapter->ena_dev = ena_dev; 4244 adapter->netdev = netdev; 4245 adapter->pdev = pdev; 4246 adapter->msg_enable = netif_msg_init(debug, DEFAULT_MSG_ENABLE); 4247 4248 ena_dev->net_device = netdev; 4249 4250 pci_set_drvdata(pdev, adapter); 4251 4252 rc = ena_device_init(ena_dev, pdev, &get_feat_ctx, &wd_state); 4253 if (rc) { 4254 dev_err(&pdev->dev, "ENA device init failed\n"); 4255 if (rc == -ETIME) 4256 rc = -EPROBE_DEFER; 4257 goto err_netdev_destroy; 4258 } 4259 4260 rc = ena_map_llq_mem_bar(pdev, ena_dev, bars); 4261 if (rc) { 4262 dev_err(&pdev->dev, "ENA llq bar mapping failed\n"); 4263 goto err_device_destroy; 4264 } 4265 4266 calc_queue_ctx.ena_dev = ena_dev; 4267 calc_queue_ctx.get_feat_ctx = &get_feat_ctx; 4268 calc_queue_ctx.pdev = pdev; 4269 4270 /* Initial TX and RX interrupt delay. Assumes 1 usec granularity. 4271 * Updated during device initialization with the real granularity 4272 */ 4273 ena_dev->intr_moder_tx_interval = ENA_INTR_INITIAL_TX_INTERVAL_USECS; 4274 ena_dev->intr_moder_rx_interval = ENA_INTR_INITIAL_RX_INTERVAL_USECS; 4275 ena_dev->intr_delay_resolution = ENA_DEFAULT_INTR_DELAY_RESOLUTION; 4276 max_num_io_queues = ena_calc_max_io_queue_num(pdev, ena_dev, &get_feat_ctx); 4277 rc = ena_calc_io_queue_size(&calc_queue_ctx); 4278 if (rc || !max_num_io_queues) { 4279 rc = -EFAULT; 4280 goto err_device_destroy; 4281 } 4282 4283 ena_set_conf_feat_params(adapter, &get_feat_ctx); 4284 4285 adapter->reset_reason = ENA_REGS_RESET_NORMAL; 4286 4287 adapter->requested_tx_ring_size = calc_queue_ctx.tx_queue_size; 4288 adapter->requested_rx_ring_size = calc_queue_ctx.rx_queue_size; 4289 adapter->max_tx_ring_size = calc_queue_ctx.max_tx_queue_size; 4290 adapter->max_rx_ring_size = calc_queue_ctx.max_rx_queue_size; 4291 adapter->max_tx_sgl_size = calc_queue_ctx.max_tx_sgl_size; 4292 adapter->max_rx_sgl_size = calc_queue_ctx.max_rx_sgl_size; 4293 4294 adapter->num_io_queues = max_num_io_queues; 4295 adapter->max_num_io_queues = max_num_io_queues; 4296 adapter->last_monitored_tx_qid = 0; 4297 4298 adapter->xdp_first_ring = 0; 4299 adapter->xdp_num_queues = 0; 4300 4301 adapter->rx_copybreak = ENA_DEFAULT_RX_COPYBREAK; 4302 if (ena_dev->tx_mem_queue_type == ENA_ADMIN_PLACEMENT_POLICY_DEV) 4303 adapter->disable_meta_caching = 4304 !!(get_feat_ctx.llq.accel_mode.u.get.supported_flags & 4305 BIT(ENA_ADMIN_DISABLE_META_CACHING)); 4306 4307 adapter->wd_state = wd_state; 4308 4309 snprintf(adapter->name, ENA_NAME_MAX_LEN, "ena_%d", adapters_found); 4310 4311 rc = ena_com_init_interrupt_moderation(adapter->ena_dev); 4312 if (rc) { 4313 dev_err(&pdev->dev, 4314 "Failed to query interrupt moderation feature\n"); 4315 goto err_device_destroy; 4316 } 4317 ena_init_io_rings(adapter, 4318 0, 4319 adapter->xdp_num_queues + 4320 adapter->num_io_queues); 4321 4322 netdev->netdev_ops = &ena_netdev_ops; 4323 netdev->watchdog_timeo = TX_TIMEOUT; 4324 ena_set_ethtool_ops(netdev); 4325 4326 netdev->priv_flags |= IFF_UNICAST_FLT; 4327 4328 u64_stats_init(&adapter->syncp); 4329 4330 rc = ena_enable_msix_and_set_admin_interrupts(adapter); 4331 if (rc) { 4332 dev_err(&pdev->dev, 4333 "Failed to enable and set the admin interrupts\n"); 4334 goto err_worker_destroy; 4335 } 4336 rc = ena_rss_init_default(adapter); 4337 if (rc && (rc != -EOPNOTSUPP)) { 4338 dev_err(&pdev->dev, "Cannot init RSS rc: %d\n", rc); 4339 goto err_free_msix; 4340 } 4341 4342 ena_config_debug_area(adapter); 4343 4344 if (!ena_update_hw_stats(adapter)) 4345 adapter->eni_stats_supported = true; 4346 else 4347 adapter->eni_stats_supported = false; 4348 4349 memcpy(adapter->netdev->perm_addr, adapter->mac_addr, netdev->addr_len); 4350 4351 netif_carrier_off(netdev); 4352 4353 rc = register_netdev(netdev); 4354 if (rc) { 4355 dev_err(&pdev->dev, "Cannot register net device\n"); 4356 goto err_rss; 4357 } 4358 4359 INIT_WORK(&adapter->reset_task, ena_fw_reset_device); 4360 4361 adapter->last_keep_alive_jiffies = jiffies; 4362 adapter->keep_alive_timeout = ENA_DEVICE_KALIVE_TIMEOUT; 4363 adapter->missing_tx_completion_to = TX_TIMEOUT; 4364 adapter->missing_tx_completion_threshold = MAX_NUM_OF_TIMEOUTED_PACKETS; 4365 4366 ena_update_hints(adapter, &get_feat_ctx.hw_hints); 4367 4368 timer_setup(&adapter->timer_service, ena_timer_service, 0); 4369 mod_timer(&adapter->timer_service, round_jiffies(jiffies + HZ)); 4370 4371 dev_info(&pdev->dev, 4372 "%s found at mem %lx, mac addr %pM\n", 4373 DEVICE_NAME, (long)pci_resource_start(pdev, 0), 4374 netdev->dev_addr); 4375 4376 set_bit(ENA_FLAG_DEVICE_RUNNING, &adapter->flags); 4377 4378 adapters_found++; 4379 4380 return 0; 4381 4382 err_rss: 4383 ena_com_delete_debug_area(ena_dev); 4384 ena_com_rss_destroy(ena_dev); 4385 err_free_msix: 4386 ena_com_dev_reset(ena_dev, ENA_REGS_RESET_INIT_ERR); 4387 /* stop submitting admin commands on a device that was reset */ 4388 ena_com_set_admin_running_state(ena_dev, false); 4389 ena_free_mgmnt_irq(adapter); 4390 ena_disable_msix(adapter); 4391 err_worker_destroy: 4392 del_timer(&adapter->timer_service); 4393 err_device_destroy: 4394 ena_com_delete_host_info(ena_dev); 4395 ena_com_admin_destroy(ena_dev); 4396 err_netdev_destroy: 4397 free_netdev(netdev); 4398 err_free_region: 4399 ena_release_bars(ena_dev, pdev); 4400 err_free_ena_dev: 4401 vfree(ena_dev); 4402 err_disable_device: 4403 pci_disable_device(pdev); 4404 return rc; 4405 } 4406 4407 /*****************************************************************************/ 4408 4409 /* __ena_shutoff - Helper used in both PCI remove/shutdown routines 4410 * @pdev: PCI device information struct 4411 * @shutdown: Is it a shutdown operation? If false, means it is a removal 4412 * 4413 * __ena_shutoff is a helper routine that does the real work on shutdown and 4414 * removal paths; the difference between those paths is with regards to whether 4415 * dettach or unregister the netdevice. 4416 */ 4417 static void __ena_shutoff(struct pci_dev *pdev, bool shutdown) 4418 { 4419 struct ena_adapter *adapter = pci_get_drvdata(pdev); 4420 struct ena_com_dev *ena_dev; 4421 struct net_device *netdev; 4422 4423 ena_dev = adapter->ena_dev; 4424 netdev = adapter->netdev; 4425 4426 #ifdef CONFIG_RFS_ACCEL 4427 if ((adapter->msix_vecs >= 1) && (netdev->rx_cpu_rmap)) { 4428 free_irq_cpu_rmap(netdev->rx_cpu_rmap); 4429 netdev->rx_cpu_rmap = NULL; 4430 } 4431 #endif /* CONFIG_RFS_ACCEL */ 4432 4433 /* Make sure timer and reset routine won't be called after 4434 * freeing device resources. 4435 */ 4436 del_timer_sync(&adapter->timer_service); 4437 cancel_work_sync(&adapter->reset_task); 4438 4439 rtnl_lock(); /* lock released inside the below if-else block */ 4440 adapter->reset_reason = ENA_REGS_RESET_SHUTDOWN; 4441 ena_destroy_device(adapter, true); 4442 if (shutdown) { 4443 netif_device_detach(netdev); 4444 dev_close(netdev); 4445 rtnl_unlock(); 4446 } else { 4447 rtnl_unlock(); 4448 unregister_netdev(netdev); 4449 free_netdev(netdev); 4450 } 4451 4452 ena_com_rss_destroy(ena_dev); 4453 4454 ena_com_delete_debug_area(ena_dev); 4455 4456 ena_com_delete_host_info(ena_dev); 4457 4458 ena_release_bars(ena_dev, pdev); 4459 4460 pci_disable_device(pdev); 4461 4462 vfree(ena_dev); 4463 } 4464 4465 /* ena_remove - Device Removal Routine 4466 * @pdev: PCI device information struct 4467 * 4468 * ena_remove is called by the PCI subsystem to alert the driver 4469 * that it should release a PCI device. 4470 */ 4471 4472 static void ena_remove(struct pci_dev *pdev) 4473 { 4474 __ena_shutoff(pdev, false); 4475 } 4476 4477 /* ena_shutdown - Device Shutdown Routine 4478 * @pdev: PCI device information struct 4479 * 4480 * ena_shutdown is called by the PCI subsystem to alert the driver that 4481 * a shutdown/reboot (or kexec) is happening and device must be disabled. 4482 */ 4483 4484 static void ena_shutdown(struct pci_dev *pdev) 4485 { 4486 __ena_shutoff(pdev, true); 4487 } 4488 4489 /* ena_suspend - PM suspend callback 4490 * @dev_d: Device information struct 4491 */ 4492 static int __maybe_unused ena_suspend(struct device *dev_d) 4493 { 4494 struct pci_dev *pdev = to_pci_dev(dev_d); 4495 struct ena_adapter *adapter = pci_get_drvdata(pdev); 4496 4497 ena_increase_stat(&adapter->dev_stats.suspend, 1, &adapter->syncp); 4498 4499 rtnl_lock(); 4500 if (unlikely(test_bit(ENA_FLAG_TRIGGER_RESET, &adapter->flags))) { 4501 dev_err(&pdev->dev, 4502 "Ignoring device reset request as the device is being suspended\n"); 4503 clear_bit(ENA_FLAG_TRIGGER_RESET, &adapter->flags); 4504 } 4505 ena_destroy_device(adapter, true); 4506 rtnl_unlock(); 4507 return 0; 4508 } 4509 4510 /* ena_resume - PM resume callback 4511 * @dev_d: Device information struct 4512 */ 4513 static int __maybe_unused ena_resume(struct device *dev_d) 4514 { 4515 struct ena_adapter *adapter = dev_get_drvdata(dev_d); 4516 int rc; 4517 4518 ena_increase_stat(&adapter->dev_stats.resume, 1, &adapter->syncp); 4519 4520 rtnl_lock(); 4521 rc = ena_restore_device(adapter); 4522 rtnl_unlock(); 4523 return rc; 4524 } 4525 4526 static SIMPLE_DEV_PM_OPS(ena_pm_ops, ena_suspend, ena_resume); 4527 4528 static struct pci_driver ena_pci_driver = { 4529 .name = DRV_MODULE_NAME, 4530 .id_table = ena_pci_tbl, 4531 .probe = ena_probe, 4532 .remove = ena_remove, 4533 .shutdown = ena_shutdown, 4534 .driver.pm = &ena_pm_ops, 4535 .sriov_configure = pci_sriov_configure_simple, 4536 }; 4537 4538 static int __init ena_init(void) 4539 { 4540 ena_wq = create_singlethread_workqueue(DRV_MODULE_NAME); 4541 if (!ena_wq) { 4542 pr_err("Failed to create workqueue\n"); 4543 return -ENOMEM; 4544 } 4545 4546 return pci_register_driver(&ena_pci_driver); 4547 } 4548 4549 static void __exit ena_cleanup(void) 4550 { 4551 pci_unregister_driver(&ena_pci_driver); 4552 4553 if (ena_wq) { 4554 destroy_workqueue(ena_wq); 4555 ena_wq = NULL; 4556 } 4557 } 4558 4559 /****************************************************************************** 4560 ******************************** AENQ Handlers ******************************* 4561 *****************************************************************************/ 4562 /* ena_update_on_link_change: 4563 * Notify the network interface about the change in link status 4564 */ 4565 static void ena_update_on_link_change(void *adapter_data, 4566 struct ena_admin_aenq_entry *aenq_e) 4567 { 4568 struct ena_adapter *adapter = (struct ena_adapter *)adapter_data; 4569 struct ena_admin_aenq_link_change_desc *aenq_desc = 4570 (struct ena_admin_aenq_link_change_desc *)aenq_e; 4571 int status = aenq_desc->flags & 4572 ENA_ADMIN_AENQ_LINK_CHANGE_DESC_LINK_STATUS_MASK; 4573 4574 if (status) { 4575 netif_dbg(adapter, ifup, adapter->netdev, "%s\n", __func__); 4576 set_bit(ENA_FLAG_LINK_UP, &adapter->flags); 4577 if (!test_bit(ENA_FLAG_ONGOING_RESET, &adapter->flags)) 4578 netif_carrier_on(adapter->netdev); 4579 } else { 4580 clear_bit(ENA_FLAG_LINK_UP, &adapter->flags); 4581 netif_carrier_off(adapter->netdev); 4582 } 4583 } 4584 4585 static void ena_keep_alive_wd(void *adapter_data, 4586 struct ena_admin_aenq_entry *aenq_e) 4587 { 4588 struct ena_adapter *adapter = (struct ena_adapter *)adapter_data; 4589 struct ena_admin_aenq_keep_alive_desc *desc; 4590 u64 rx_drops; 4591 u64 tx_drops; 4592 4593 desc = (struct ena_admin_aenq_keep_alive_desc *)aenq_e; 4594 adapter->last_keep_alive_jiffies = jiffies; 4595 4596 rx_drops = ((u64)desc->rx_drops_high << 32) | desc->rx_drops_low; 4597 tx_drops = ((u64)desc->tx_drops_high << 32) | desc->tx_drops_low; 4598 4599 u64_stats_update_begin(&adapter->syncp); 4600 /* These stats are accumulated by the device, so the counters indicate 4601 * all drops since last reset. 4602 */ 4603 adapter->dev_stats.rx_drops = rx_drops; 4604 adapter->dev_stats.tx_drops = tx_drops; 4605 u64_stats_update_end(&adapter->syncp); 4606 } 4607 4608 static void ena_notification(void *adapter_data, 4609 struct ena_admin_aenq_entry *aenq_e) 4610 { 4611 struct ena_adapter *adapter = (struct ena_adapter *)adapter_data; 4612 struct ena_admin_ena_hw_hints *hints; 4613 4614 WARN(aenq_e->aenq_common_desc.group != ENA_ADMIN_NOTIFICATION, 4615 "Invalid group(%x) expected %x\n", 4616 aenq_e->aenq_common_desc.group, 4617 ENA_ADMIN_NOTIFICATION); 4618 4619 switch (aenq_e->aenq_common_desc.syndrome) { 4620 case ENA_ADMIN_UPDATE_HINTS: 4621 hints = (struct ena_admin_ena_hw_hints *) 4622 (&aenq_e->inline_data_w4); 4623 ena_update_hints(adapter, hints); 4624 break; 4625 default: 4626 netif_err(adapter, drv, adapter->netdev, 4627 "Invalid aenq notification link state %d\n", 4628 aenq_e->aenq_common_desc.syndrome); 4629 } 4630 } 4631 4632 /* This handler will called for unknown event group or unimplemented handlers*/ 4633 static void unimplemented_aenq_handler(void *data, 4634 struct ena_admin_aenq_entry *aenq_e) 4635 { 4636 struct ena_adapter *adapter = (struct ena_adapter *)data; 4637 4638 netif_err(adapter, drv, adapter->netdev, 4639 "Unknown event was received or event with unimplemented handler\n"); 4640 } 4641 4642 static struct ena_aenq_handlers aenq_handlers = { 4643 .handlers = { 4644 [ENA_ADMIN_LINK_CHANGE] = ena_update_on_link_change, 4645 [ENA_ADMIN_NOTIFICATION] = ena_notification, 4646 [ENA_ADMIN_KEEP_ALIVE] = ena_keep_alive_wd, 4647 }, 4648 .unimplemented_handler = unimplemented_aenq_handler 4649 }; 4650 4651 module_init(ena_init); 4652 module_exit(ena_cleanup); 4653