xref: /linux/drivers/net/ethernet/amazon/ena/ena_netdev.c (revision d0f482bb06f9447d44d2cae0386a0bd768c3cc16)
1 // SPDX-License-Identifier: GPL-2.0 OR Linux-OpenIB
2 /*
3  * Copyright 2015-2020 Amazon.com, Inc. or its affiliates. All rights reserved.
4  */
5 
6 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
7 
8 #ifdef CONFIG_RFS_ACCEL
9 #include <linux/cpu_rmap.h>
10 #endif /* CONFIG_RFS_ACCEL */
11 #include <linux/ethtool.h>
12 #include <linux/kernel.h>
13 #include <linux/module.h>
14 #include <linux/numa.h>
15 #include <linux/pci.h>
16 #include <linux/utsname.h>
17 #include <linux/version.h>
18 #include <linux/vmalloc.h>
19 #include <net/ip.h>
20 
21 #include "ena_netdev.h"
22 #include <linux/bpf_trace.h>
23 #include "ena_pci_id_tbl.h"
24 
25 MODULE_AUTHOR("Amazon.com, Inc. or its affiliates");
26 MODULE_DESCRIPTION(DEVICE_NAME);
27 MODULE_LICENSE("GPL");
28 
29 /* Time in jiffies before concluding the transmitter is hung. */
30 #define TX_TIMEOUT  (5 * HZ)
31 
32 #define ENA_MAX_RINGS min_t(unsigned int, ENA_MAX_NUM_IO_QUEUES, num_possible_cpus())
33 
34 #define ENA_NAPI_BUDGET 64
35 
36 #define DEFAULT_MSG_ENABLE (NETIF_MSG_DRV | NETIF_MSG_PROBE | NETIF_MSG_IFUP | \
37 		NETIF_MSG_TX_DONE | NETIF_MSG_TX_ERR | NETIF_MSG_RX_ERR)
38 
39 static struct ena_aenq_handlers aenq_handlers;
40 
41 static struct workqueue_struct *ena_wq;
42 
43 MODULE_DEVICE_TABLE(pci, ena_pci_tbl);
44 
45 static int ena_rss_init_default(struct ena_adapter *adapter);
46 static void check_for_admin_com_state(struct ena_adapter *adapter);
47 static void ena_destroy_device(struct ena_adapter *adapter, bool graceful);
48 static int ena_restore_device(struct ena_adapter *adapter);
49 
50 static void ena_init_io_rings(struct ena_adapter *adapter,
51 			      int first_index, int count);
52 static void ena_init_napi_in_range(struct ena_adapter *adapter, int first_index,
53 				   int count);
54 static void ena_del_napi_in_range(struct ena_adapter *adapter, int first_index,
55 				  int count);
56 static int ena_setup_tx_resources(struct ena_adapter *adapter, int qid);
57 static int ena_setup_tx_resources_in_range(struct ena_adapter *adapter,
58 					   int first_index,
59 					   int count);
60 static int ena_create_io_tx_queue(struct ena_adapter *adapter, int qid);
61 static void ena_free_tx_resources(struct ena_adapter *adapter, int qid);
62 static int ena_clean_xdp_irq(struct ena_ring *xdp_ring, u32 budget);
63 static void ena_destroy_all_tx_queues(struct ena_adapter *adapter);
64 static void ena_free_all_io_tx_resources(struct ena_adapter *adapter);
65 static void ena_napi_disable_in_range(struct ena_adapter *adapter,
66 				      int first_index, int count);
67 static void ena_napi_enable_in_range(struct ena_adapter *adapter,
68 				     int first_index, int count);
69 static int ena_up(struct ena_adapter *adapter);
70 static void ena_down(struct ena_adapter *adapter);
71 static void ena_unmask_interrupt(struct ena_ring *tx_ring,
72 				 struct ena_ring *rx_ring);
73 static void ena_update_ring_numa_node(struct ena_ring *tx_ring,
74 				      struct ena_ring *rx_ring);
75 static void ena_unmap_tx_buff(struct ena_ring *tx_ring,
76 			      struct ena_tx_buffer *tx_info);
77 static int ena_create_io_tx_queues_in_range(struct ena_adapter *adapter,
78 					    int first_index, int count);
79 
80 /* Increase a stat by cnt while holding syncp seqlock on 32bit machines */
81 static void ena_increase_stat(u64 *statp, u64 cnt,
82 			      struct u64_stats_sync *syncp)
83 {
84 	u64_stats_update_begin(syncp);
85 	(*statp) += cnt;
86 	u64_stats_update_end(syncp);
87 }
88 
89 static void ena_ring_tx_doorbell(struct ena_ring *tx_ring)
90 {
91 	ena_com_write_sq_doorbell(tx_ring->ena_com_io_sq);
92 	ena_increase_stat(&tx_ring->tx_stats.doorbells, 1, &tx_ring->syncp);
93 }
94 
95 static void ena_tx_timeout(struct net_device *dev, unsigned int txqueue)
96 {
97 	struct ena_adapter *adapter = netdev_priv(dev);
98 
99 	/* Change the state of the device to trigger reset
100 	 * Check that we are not in the middle or a trigger already
101 	 */
102 
103 	if (test_and_set_bit(ENA_FLAG_TRIGGER_RESET, &adapter->flags))
104 		return;
105 
106 	adapter->reset_reason = ENA_REGS_RESET_OS_NETDEV_WD;
107 	ena_increase_stat(&adapter->dev_stats.tx_timeout, 1, &adapter->syncp);
108 
109 	netif_err(adapter, tx_err, dev, "Transmit time out\n");
110 }
111 
112 static void update_rx_ring_mtu(struct ena_adapter *adapter, int mtu)
113 {
114 	int i;
115 
116 	for (i = 0; i < adapter->num_io_queues; i++)
117 		adapter->rx_ring[i].mtu = mtu;
118 }
119 
120 static int ena_change_mtu(struct net_device *dev, int new_mtu)
121 {
122 	struct ena_adapter *adapter = netdev_priv(dev);
123 	int ret;
124 
125 	ret = ena_com_set_dev_mtu(adapter->ena_dev, new_mtu);
126 	if (!ret) {
127 		netif_dbg(adapter, drv, dev, "Set MTU to %d\n", new_mtu);
128 		update_rx_ring_mtu(adapter, new_mtu);
129 		dev->mtu = new_mtu;
130 	} else {
131 		netif_err(adapter, drv, dev, "Failed to set MTU to %d\n",
132 			  new_mtu);
133 	}
134 
135 	return ret;
136 }
137 
138 static int ena_xmit_common(struct net_device *dev,
139 			   struct ena_ring *ring,
140 			   struct ena_tx_buffer *tx_info,
141 			   struct ena_com_tx_ctx *ena_tx_ctx,
142 			   u16 next_to_use,
143 			   u32 bytes)
144 {
145 	struct ena_adapter *adapter = netdev_priv(dev);
146 	int rc, nb_hw_desc;
147 
148 	if (unlikely(ena_com_is_doorbell_needed(ring->ena_com_io_sq,
149 						ena_tx_ctx))) {
150 		netif_dbg(adapter, tx_queued, dev,
151 			  "llq tx max burst size of queue %d achieved, writing doorbell to send burst\n",
152 			  ring->qid);
153 		ena_ring_tx_doorbell(ring);
154 	}
155 
156 	/* prepare the packet's descriptors to dma engine */
157 	rc = ena_com_prepare_tx(ring->ena_com_io_sq, ena_tx_ctx,
158 				&nb_hw_desc);
159 
160 	/* In case there isn't enough space in the queue for the packet,
161 	 * we simply drop it. All other failure reasons of
162 	 * ena_com_prepare_tx() are fatal and therefore require a device reset.
163 	 */
164 	if (unlikely(rc)) {
165 		netif_err(adapter, tx_queued, dev,
166 			  "Failed to prepare tx bufs\n");
167 		ena_increase_stat(&ring->tx_stats.prepare_ctx_err, 1,
168 				  &ring->syncp);
169 		if (rc != -ENOMEM) {
170 			adapter->reset_reason =
171 				ENA_REGS_RESET_DRIVER_INVALID_STATE;
172 			set_bit(ENA_FLAG_TRIGGER_RESET, &adapter->flags);
173 		}
174 		return rc;
175 	}
176 
177 	u64_stats_update_begin(&ring->syncp);
178 	ring->tx_stats.cnt++;
179 	ring->tx_stats.bytes += bytes;
180 	u64_stats_update_end(&ring->syncp);
181 
182 	tx_info->tx_descs = nb_hw_desc;
183 	tx_info->last_jiffies = jiffies;
184 	tx_info->print_once = 0;
185 
186 	ring->next_to_use = ENA_TX_RING_IDX_NEXT(next_to_use,
187 						 ring->ring_size);
188 	return 0;
189 }
190 
191 /* This is the XDP napi callback. XDP queues use a separate napi callback
192  * than Rx/Tx queues.
193  */
194 static int ena_xdp_io_poll(struct napi_struct *napi, int budget)
195 {
196 	struct ena_napi *ena_napi = container_of(napi, struct ena_napi, napi);
197 	u32 xdp_work_done, xdp_budget;
198 	struct ena_ring *xdp_ring;
199 	int napi_comp_call = 0;
200 	int ret;
201 
202 	xdp_ring = ena_napi->xdp_ring;
203 
204 	xdp_budget = budget;
205 
206 	if (!test_bit(ENA_FLAG_DEV_UP, &xdp_ring->adapter->flags) ||
207 	    test_bit(ENA_FLAG_TRIGGER_RESET, &xdp_ring->adapter->flags)) {
208 		napi_complete_done(napi, 0);
209 		return 0;
210 	}
211 
212 	xdp_work_done = ena_clean_xdp_irq(xdp_ring, xdp_budget);
213 
214 	/* If the device is about to reset or down, avoid unmask
215 	 * the interrupt and return 0 so NAPI won't reschedule
216 	 */
217 	if (unlikely(!test_bit(ENA_FLAG_DEV_UP, &xdp_ring->adapter->flags))) {
218 		napi_complete_done(napi, 0);
219 		ret = 0;
220 	} else if (xdp_budget > xdp_work_done) {
221 		napi_comp_call = 1;
222 		if (napi_complete_done(napi, xdp_work_done))
223 			ena_unmask_interrupt(xdp_ring, NULL);
224 		ena_update_ring_numa_node(xdp_ring, NULL);
225 		ret = xdp_work_done;
226 	} else {
227 		ret = xdp_budget;
228 	}
229 
230 	u64_stats_update_begin(&xdp_ring->syncp);
231 	xdp_ring->tx_stats.napi_comp += napi_comp_call;
232 	xdp_ring->tx_stats.tx_poll++;
233 	u64_stats_update_end(&xdp_ring->syncp);
234 	xdp_ring->tx_stats.last_napi_jiffies = jiffies;
235 
236 	return ret;
237 }
238 
239 static int ena_xdp_tx_map_frame(struct ena_ring *xdp_ring,
240 				struct ena_tx_buffer *tx_info,
241 				struct xdp_frame *xdpf,
242 				struct ena_com_tx_ctx *ena_tx_ctx)
243 {
244 	struct ena_adapter *adapter = xdp_ring->adapter;
245 	struct ena_com_buf *ena_buf;
246 	int push_len = 0;
247 	dma_addr_t dma;
248 	void *data;
249 	u32 size;
250 
251 	tx_info->xdpf = xdpf;
252 	data = tx_info->xdpf->data;
253 	size = tx_info->xdpf->len;
254 
255 	if (xdp_ring->tx_mem_queue_type == ENA_ADMIN_PLACEMENT_POLICY_DEV) {
256 		/* Designate part of the packet for LLQ */
257 		push_len = min_t(u32, size, xdp_ring->tx_max_header_size);
258 
259 		ena_tx_ctx->push_header = data;
260 
261 		size -= push_len;
262 		data += push_len;
263 	}
264 
265 	ena_tx_ctx->header_len = push_len;
266 
267 	if (size > 0) {
268 		dma = dma_map_single(xdp_ring->dev,
269 				     data,
270 				     size,
271 				     DMA_TO_DEVICE);
272 		if (unlikely(dma_mapping_error(xdp_ring->dev, dma)))
273 			goto error_report_dma_error;
274 
275 		tx_info->map_linear_data = 0;
276 
277 		ena_buf = tx_info->bufs;
278 		ena_buf->paddr = dma;
279 		ena_buf->len = size;
280 
281 		ena_tx_ctx->ena_bufs = ena_buf;
282 		ena_tx_ctx->num_bufs = tx_info->num_of_bufs = 1;
283 	}
284 
285 	return 0;
286 
287 error_report_dma_error:
288 	ena_increase_stat(&xdp_ring->tx_stats.dma_mapping_err, 1,
289 			  &xdp_ring->syncp);
290 	netif_warn(adapter, tx_queued, adapter->netdev, "Failed to map xdp buff\n");
291 
292 	return -EINVAL;
293 }
294 
295 static int ena_xdp_xmit_frame(struct ena_ring *xdp_ring,
296 			      struct net_device *dev,
297 			      struct xdp_frame *xdpf,
298 			      int flags)
299 {
300 	struct ena_com_tx_ctx ena_tx_ctx = {};
301 	struct ena_tx_buffer *tx_info;
302 	u16 next_to_use, req_id;
303 	int rc;
304 
305 	next_to_use = xdp_ring->next_to_use;
306 	req_id = xdp_ring->free_ids[next_to_use];
307 	tx_info = &xdp_ring->tx_buffer_info[req_id];
308 	tx_info->num_of_bufs = 0;
309 
310 	rc = ena_xdp_tx_map_frame(xdp_ring, tx_info, xdpf, &ena_tx_ctx);
311 	if (unlikely(rc))
312 		return rc;
313 
314 	ena_tx_ctx.req_id = req_id;
315 
316 	rc = ena_xmit_common(dev,
317 			     xdp_ring,
318 			     tx_info,
319 			     &ena_tx_ctx,
320 			     next_to_use,
321 			     xdpf->len);
322 	if (rc)
323 		goto error_unmap_dma;
324 
325 	/* trigger the dma engine. ena_ring_tx_doorbell()
326 	 * calls a memory barrier inside it.
327 	 */
328 	if (flags & XDP_XMIT_FLUSH)
329 		ena_ring_tx_doorbell(xdp_ring);
330 
331 	return rc;
332 
333 error_unmap_dma:
334 	ena_unmap_tx_buff(xdp_ring, tx_info);
335 	tx_info->xdpf = NULL;
336 	return rc;
337 }
338 
339 static int ena_xdp_xmit(struct net_device *dev, int n,
340 			struct xdp_frame **frames, u32 flags)
341 {
342 	struct ena_adapter *adapter = netdev_priv(dev);
343 	struct ena_ring *xdp_ring;
344 	int qid, i, nxmit = 0;
345 
346 	if (unlikely(flags & ~XDP_XMIT_FLAGS_MASK))
347 		return -EINVAL;
348 
349 	if (!test_bit(ENA_FLAG_DEV_UP, &adapter->flags))
350 		return -ENETDOWN;
351 
352 	/* We assume that all rings have the same XDP program */
353 	if (!READ_ONCE(adapter->rx_ring->xdp_bpf_prog))
354 		return -ENXIO;
355 
356 	qid = smp_processor_id() % adapter->xdp_num_queues;
357 	qid += adapter->xdp_first_ring;
358 	xdp_ring = &adapter->tx_ring[qid];
359 
360 	/* Other CPU ids might try to send thorugh this queue */
361 	spin_lock(&xdp_ring->xdp_tx_lock);
362 
363 	for (i = 0; i < n; i++) {
364 		if (ena_xdp_xmit_frame(xdp_ring, dev, frames[i], 0))
365 			break;
366 		nxmit++;
367 	}
368 
369 	/* Ring doorbell to make device aware of the packets */
370 	if (flags & XDP_XMIT_FLUSH)
371 		ena_ring_tx_doorbell(xdp_ring);
372 
373 	spin_unlock(&xdp_ring->xdp_tx_lock);
374 
375 	/* Return number of packets sent */
376 	return nxmit;
377 }
378 
379 static int ena_xdp_execute(struct ena_ring *rx_ring, struct xdp_buff *xdp)
380 {
381 	struct bpf_prog *xdp_prog;
382 	struct ena_ring *xdp_ring;
383 	u32 verdict = XDP_PASS;
384 	struct xdp_frame *xdpf;
385 	u64 *xdp_stat;
386 
387 	rcu_read_lock();
388 	xdp_prog = READ_ONCE(rx_ring->xdp_bpf_prog);
389 
390 	if (!xdp_prog)
391 		goto out;
392 
393 	verdict = bpf_prog_run_xdp(xdp_prog, xdp);
394 
395 	switch (verdict) {
396 	case XDP_TX:
397 		xdpf = xdp_convert_buff_to_frame(xdp);
398 		if (unlikely(!xdpf)) {
399 			trace_xdp_exception(rx_ring->netdev, xdp_prog, verdict);
400 			xdp_stat = &rx_ring->rx_stats.xdp_aborted;
401 			verdict = XDP_ABORTED;
402 			break;
403 		}
404 
405 		/* Find xmit queue */
406 		xdp_ring = rx_ring->xdp_ring;
407 
408 		/* The XDP queues are shared between XDP_TX and XDP_REDIRECT */
409 		spin_lock(&xdp_ring->xdp_tx_lock);
410 
411 		if (ena_xdp_xmit_frame(xdp_ring, rx_ring->netdev, xdpf,
412 				       XDP_XMIT_FLUSH))
413 			xdp_return_frame(xdpf);
414 
415 		spin_unlock(&xdp_ring->xdp_tx_lock);
416 		xdp_stat = &rx_ring->rx_stats.xdp_tx;
417 		break;
418 	case XDP_REDIRECT:
419 		if (likely(!xdp_do_redirect(rx_ring->netdev, xdp, xdp_prog))) {
420 			xdp_stat = &rx_ring->rx_stats.xdp_redirect;
421 			break;
422 		}
423 		trace_xdp_exception(rx_ring->netdev, xdp_prog, verdict);
424 		xdp_stat = &rx_ring->rx_stats.xdp_aborted;
425 		verdict = XDP_ABORTED;
426 		break;
427 	case XDP_ABORTED:
428 		trace_xdp_exception(rx_ring->netdev, xdp_prog, verdict);
429 		xdp_stat = &rx_ring->rx_stats.xdp_aborted;
430 		break;
431 	case XDP_DROP:
432 		xdp_stat = &rx_ring->rx_stats.xdp_drop;
433 		break;
434 	case XDP_PASS:
435 		xdp_stat = &rx_ring->rx_stats.xdp_pass;
436 		break;
437 	default:
438 		bpf_warn_invalid_xdp_action(verdict);
439 		xdp_stat = &rx_ring->rx_stats.xdp_invalid;
440 	}
441 
442 	ena_increase_stat(xdp_stat, 1, &rx_ring->syncp);
443 out:
444 	rcu_read_unlock();
445 
446 	return verdict;
447 }
448 
449 static void ena_init_all_xdp_queues(struct ena_adapter *adapter)
450 {
451 	adapter->xdp_first_ring = adapter->num_io_queues;
452 	adapter->xdp_num_queues = adapter->num_io_queues;
453 
454 	ena_init_io_rings(adapter,
455 			  adapter->xdp_first_ring,
456 			  adapter->xdp_num_queues);
457 }
458 
459 static int ena_setup_and_create_all_xdp_queues(struct ena_adapter *adapter)
460 {
461 	int rc = 0;
462 
463 	rc = ena_setup_tx_resources_in_range(adapter, adapter->xdp_first_ring,
464 					     adapter->xdp_num_queues);
465 	if (rc)
466 		goto setup_err;
467 
468 	rc = ena_create_io_tx_queues_in_range(adapter,
469 					      adapter->xdp_first_ring,
470 					      adapter->xdp_num_queues);
471 	if (rc)
472 		goto create_err;
473 
474 	return 0;
475 
476 create_err:
477 	ena_free_all_io_tx_resources(adapter);
478 setup_err:
479 	return rc;
480 }
481 
482 /* Provides a way for both kernel and bpf-prog to know
483  * more about the RX-queue a given XDP frame arrived on.
484  */
485 static int ena_xdp_register_rxq_info(struct ena_ring *rx_ring)
486 {
487 	int rc;
488 
489 	rc = xdp_rxq_info_reg(&rx_ring->xdp_rxq, rx_ring->netdev, rx_ring->qid, 0);
490 
491 	if (rc) {
492 		netif_err(rx_ring->adapter, ifup, rx_ring->netdev,
493 			  "Failed to register xdp rx queue info. RX queue num %d rc: %d\n",
494 			  rx_ring->qid, rc);
495 		goto err;
496 	}
497 
498 	rc = xdp_rxq_info_reg_mem_model(&rx_ring->xdp_rxq, MEM_TYPE_PAGE_SHARED,
499 					NULL);
500 
501 	if (rc) {
502 		netif_err(rx_ring->adapter, ifup, rx_ring->netdev,
503 			  "Failed to register xdp rx queue info memory model. RX queue num %d rc: %d\n",
504 			  rx_ring->qid, rc);
505 		xdp_rxq_info_unreg(&rx_ring->xdp_rxq);
506 	}
507 
508 err:
509 	return rc;
510 }
511 
512 static void ena_xdp_unregister_rxq_info(struct ena_ring *rx_ring)
513 {
514 	xdp_rxq_info_unreg_mem_model(&rx_ring->xdp_rxq);
515 	xdp_rxq_info_unreg(&rx_ring->xdp_rxq);
516 }
517 
518 static void ena_xdp_exchange_program_rx_in_range(struct ena_adapter *adapter,
519 						 struct bpf_prog *prog,
520 						 int first, int count)
521 {
522 	struct ena_ring *rx_ring;
523 	int i = 0;
524 
525 	for (i = first; i < count; i++) {
526 		rx_ring = &adapter->rx_ring[i];
527 		xchg(&rx_ring->xdp_bpf_prog, prog);
528 		if (prog) {
529 			ena_xdp_register_rxq_info(rx_ring);
530 			rx_ring->rx_headroom = XDP_PACKET_HEADROOM;
531 		} else {
532 			ena_xdp_unregister_rxq_info(rx_ring);
533 			rx_ring->rx_headroom = NET_SKB_PAD;
534 		}
535 	}
536 }
537 
538 static void ena_xdp_exchange_program(struct ena_adapter *adapter,
539 				     struct bpf_prog *prog)
540 {
541 	struct bpf_prog *old_bpf_prog = xchg(&adapter->xdp_bpf_prog, prog);
542 
543 	ena_xdp_exchange_program_rx_in_range(adapter,
544 					     prog,
545 					     0,
546 					     adapter->num_io_queues);
547 
548 	if (old_bpf_prog)
549 		bpf_prog_put(old_bpf_prog);
550 }
551 
552 static int ena_destroy_and_free_all_xdp_queues(struct ena_adapter *adapter)
553 {
554 	bool was_up;
555 	int rc;
556 
557 	was_up = test_bit(ENA_FLAG_DEV_UP, &adapter->flags);
558 
559 	if (was_up)
560 		ena_down(adapter);
561 
562 	adapter->xdp_first_ring = 0;
563 	adapter->xdp_num_queues = 0;
564 	ena_xdp_exchange_program(adapter, NULL);
565 	if (was_up) {
566 		rc = ena_up(adapter);
567 		if (rc)
568 			return rc;
569 	}
570 	return 0;
571 }
572 
573 static int ena_xdp_set(struct net_device *netdev, struct netdev_bpf *bpf)
574 {
575 	struct ena_adapter *adapter = netdev_priv(netdev);
576 	struct bpf_prog *prog = bpf->prog;
577 	struct bpf_prog *old_bpf_prog;
578 	int rc, prev_mtu;
579 	bool is_up;
580 
581 	is_up = test_bit(ENA_FLAG_DEV_UP, &adapter->flags);
582 	rc = ena_xdp_allowed(adapter);
583 	if (rc == ENA_XDP_ALLOWED) {
584 		old_bpf_prog = adapter->xdp_bpf_prog;
585 		if (prog) {
586 			if (!is_up) {
587 				ena_init_all_xdp_queues(adapter);
588 			} else if (!old_bpf_prog) {
589 				ena_down(adapter);
590 				ena_init_all_xdp_queues(adapter);
591 			}
592 			ena_xdp_exchange_program(adapter, prog);
593 
594 			if (is_up && !old_bpf_prog) {
595 				rc = ena_up(adapter);
596 				if (rc)
597 					return rc;
598 			}
599 		} else if (old_bpf_prog) {
600 			rc = ena_destroy_and_free_all_xdp_queues(adapter);
601 			if (rc)
602 				return rc;
603 		}
604 
605 		prev_mtu = netdev->max_mtu;
606 		netdev->max_mtu = prog ? ENA_XDP_MAX_MTU : adapter->max_mtu;
607 
608 		if (!old_bpf_prog)
609 			netif_info(adapter, drv, adapter->netdev,
610 				   "XDP program is set, changing the max_mtu from %d to %d",
611 				   prev_mtu, netdev->max_mtu);
612 
613 	} else if (rc == ENA_XDP_CURRENT_MTU_TOO_LARGE) {
614 		netif_err(adapter, drv, adapter->netdev,
615 			  "Failed to set xdp program, the current MTU (%d) is larger than the maximum allowed MTU (%lu) while xdp is on",
616 			  netdev->mtu, ENA_XDP_MAX_MTU);
617 		NL_SET_ERR_MSG_MOD(bpf->extack,
618 				   "Failed to set xdp program, the current MTU is larger than the maximum allowed MTU. Check the dmesg for more info");
619 		return -EINVAL;
620 	} else if (rc == ENA_XDP_NO_ENOUGH_QUEUES) {
621 		netif_err(adapter, drv, adapter->netdev,
622 			  "Failed to set xdp program, the Rx/Tx channel count should be at most half of the maximum allowed channel count. The current queue count (%d), the maximal queue count (%d)\n",
623 			  adapter->num_io_queues, adapter->max_num_io_queues);
624 		NL_SET_ERR_MSG_MOD(bpf->extack,
625 				   "Failed to set xdp program, there is no enough space for allocating XDP queues, Check the dmesg for more info");
626 		return -EINVAL;
627 	}
628 
629 	return 0;
630 }
631 
632 /* This is the main xdp callback, it's used by the kernel to set/unset the xdp
633  * program as well as to query the current xdp program id.
634  */
635 static int ena_xdp(struct net_device *netdev, struct netdev_bpf *bpf)
636 {
637 	switch (bpf->command) {
638 	case XDP_SETUP_PROG:
639 		return ena_xdp_set(netdev, bpf);
640 	default:
641 		return -EINVAL;
642 	}
643 	return 0;
644 }
645 
646 static int ena_init_rx_cpu_rmap(struct ena_adapter *adapter)
647 {
648 #ifdef CONFIG_RFS_ACCEL
649 	u32 i;
650 	int rc;
651 
652 	adapter->netdev->rx_cpu_rmap = alloc_irq_cpu_rmap(adapter->num_io_queues);
653 	if (!adapter->netdev->rx_cpu_rmap)
654 		return -ENOMEM;
655 	for (i = 0; i < adapter->num_io_queues; i++) {
656 		int irq_idx = ENA_IO_IRQ_IDX(i);
657 
658 		rc = irq_cpu_rmap_add(adapter->netdev->rx_cpu_rmap,
659 				      pci_irq_vector(adapter->pdev, irq_idx));
660 		if (rc) {
661 			free_irq_cpu_rmap(adapter->netdev->rx_cpu_rmap);
662 			adapter->netdev->rx_cpu_rmap = NULL;
663 			return rc;
664 		}
665 	}
666 #endif /* CONFIG_RFS_ACCEL */
667 	return 0;
668 }
669 
670 static void ena_init_io_rings_common(struct ena_adapter *adapter,
671 				     struct ena_ring *ring, u16 qid)
672 {
673 	ring->qid = qid;
674 	ring->pdev = adapter->pdev;
675 	ring->dev = &adapter->pdev->dev;
676 	ring->netdev = adapter->netdev;
677 	ring->napi = &adapter->ena_napi[qid].napi;
678 	ring->adapter = adapter;
679 	ring->ena_dev = adapter->ena_dev;
680 	ring->per_napi_packets = 0;
681 	ring->cpu = 0;
682 	ring->no_interrupt_event_cnt = 0;
683 	u64_stats_init(&ring->syncp);
684 }
685 
686 static void ena_init_io_rings(struct ena_adapter *adapter,
687 			      int first_index, int count)
688 {
689 	struct ena_com_dev *ena_dev;
690 	struct ena_ring *txr, *rxr;
691 	int i;
692 
693 	ena_dev = adapter->ena_dev;
694 
695 	for (i = first_index; i < first_index + count; i++) {
696 		txr = &adapter->tx_ring[i];
697 		rxr = &adapter->rx_ring[i];
698 
699 		/* TX common ring state */
700 		ena_init_io_rings_common(adapter, txr, i);
701 
702 		/* TX specific ring state */
703 		txr->ring_size = adapter->requested_tx_ring_size;
704 		txr->tx_max_header_size = ena_dev->tx_max_header_size;
705 		txr->tx_mem_queue_type = ena_dev->tx_mem_queue_type;
706 		txr->sgl_size = adapter->max_tx_sgl_size;
707 		txr->smoothed_interval =
708 			ena_com_get_nonadaptive_moderation_interval_tx(ena_dev);
709 		txr->disable_meta_caching = adapter->disable_meta_caching;
710 		spin_lock_init(&txr->xdp_tx_lock);
711 
712 		/* Don't init RX queues for xdp queues */
713 		if (!ENA_IS_XDP_INDEX(adapter, i)) {
714 			/* RX common ring state */
715 			ena_init_io_rings_common(adapter, rxr, i);
716 
717 			/* RX specific ring state */
718 			rxr->ring_size = adapter->requested_rx_ring_size;
719 			rxr->rx_copybreak = adapter->rx_copybreak;
720 			rxr->sgl_size = adapter->max_rx_sgl_size;
721 			rxr->smoothed_interval =
722 				ena_com_get_nonadaptive_moderation_interval_rx(ena_dev);
723 			rxr->empty_rx_queue = 0;
724 			rxr->rx_headroom = NET_SKB_PAD;
725 			adapter->ena_napi[i].dim.mode = DIM_CQ_PERIOD_MODE_START_FROM_EQE;
726 			rxr->xdp_ring = &adapter->tx_ring[i + adapter->num_io_queues];
727 		}
728 	}
729 }
730 
731 /* ena_setup_tx_resources - allocate I/O Tx resources (Descriptors)
732  * @adapter: network interface device structure
733  * @qid: queue index
734  *
735  * Return 0 on success, negative on failure
736  */
737 static int ena_setup_tx_resources(struct ena_adapter *adapter, int qid)
738 {
739 	struct ena_ring *tx_ring = &adapter->tx_ring[qid];
740 	struct ena_irq *ena_irq = &adapter->irq_tbl[ENA_IO_IRQ_IDX(qid)];
741 	int size, i, node;
742 
743 	if (tx_ring->tx_buffer_info) {
744 		netif_err(adapter, ifup,
745 			  adapter->netdev, "tx_buffer_info info is not NULL");
746 		return -EEXIST;
747 	}
748 
749 	size = sizeof(struct ena_tx_buffer) * tx_ring->ring_size;
750 	node = cpu_to_node(ena_irq->cpu);
751 
752 	tx_ring->tx_buffer_info = vzalloc_node(size, node);
753 	if (!tx_ring->tx_buffer_info) {
754 		tx_ring->tx_buffer_info = vzalloc(size);
755 		if (!tx_ring->tx_buffer_info)
756 			goto err_tx_buffer_info;
757 	}
758 
759 	size = sizeof(u16) * tx_ring->ring_size;
760 	tx_ring->free_ids = vzalloc_node(size, node);
761 	if (!tx_ring->free_ids) {
762 		tx_ring->free_ids = vzalloc(size);
763 		if (!tx_ring->free_ids)
764 			goto err_tx_free_ids;
765 	}
766 
767 	size = tx_ring->tx_max_header_size;
768 	tx_ring->push_buf_intermediate_buf = vzalloc_node(size, node);
769 	if (!tx_ring->push_buf_intermediate_buf) {
770 		tx_ring->push_buf_intermediate_buf = vzalloc(size);
771 		if (!tx_ring->push_buf_intermediate_buf)
772 			goto err_push_buf_intermediate_buf;
773 	}
774 
775 	/* Req id ring for TX out of order completions */
776 	for (i = 0; i < tx_ring->ring_size; i++)
777 		tx_ring->free_ids[i] = i;
778 
779 	/* Reset tx statistics */
780 	memset(&tx_ring->tx_stats, 0x0, sizeof(tx_ring->tx_stats));
781 
782 	tx_ring->next_to_use = 0;
783 	tx_ring->next_to_clean = 0;
784 	tx_ring->cpu = ena_irq->cpu;
785 	return 0;
786 
787 err_push_buf_intermediate_buf:
788 	vfree(tx_ring->free_ids);
789 	tx_ring->free_ids = NULL;
790 err_tx_free_ids:
791 	vfree(tx_ring->tx_buffer_info);
792 	tx_ring->tx_buffer_info = NULL;
793 err_tx_buffer_info:
794 	return -ENOMEM;
795 }
796 
797 /* ena_free_tx_resources - Free I/O Tx Resources per Queue
798  * @adapter: network interface device structure
799  * @qid: queue index
800  *
801  * Free all transmit software resources
802  */
803 static void ena_free_tx_resources(struct ena_adapter *adapter, int qid)
804 {
805 	struct ena_ring *tx_ring = &adapter->tx_ring[qid];
806 
807 	vfree(tx_ring->tx_buffer_info);
808 	tx_ring->tx_buffer_info = NULL;
809 
810 	vfree(tx_ring->free_ids);
811 	tx_ring->free_ids = NULL;
812 
813 	vfree(tx_ring->push_buf_intermediate_buf);
814 	tx_ring->push_buf_intermediate_buf = NULL;
815 }
816 
817 static int ena_setup_tx_resources_in_range(struct ena_adapter *adapter,
818 					   int first_index,
819 					   int count)
820 {
821 	int i, rc = 0;
822 
823 	for (i = first_index; i < first_index + count; i++) {
824 		rc = ena_setup_tx_resources(adapter, i);
825 		if (rc)
826 			goto err_setup_tx;
827 	}
828 
829 	return 0;
830 
831 err_setup_tx:
832 
833 	netif_err(adapter, ifup, adapter->netdev,
834 		  "Tx queue %d: allocation failed\n", i);
835 
836 	/* rewind the index freeing the rings as we go */
837 	while (first_index < i--)
838 		ena_free_tx_resources(adapter, i);
839 	return rc;
840 }
841 
842 static void ena_free_all_io_tx_resources_in_range(struct ena_adapter *adapter,
843 						  int first_index, int count)
844 {
845 	int i;
846 
847 	for (i = first_index; i < first_index + count; i++)
848 		ena_free_tx_resources(adapter, i);
849 }
850 
851 /* ena_free_all_io_tx_resources - Free I/O Tx Resources for All Queues
852  * @adapter: board private structure
853  *
854  * Free all transmit software resources
855  */
856 static void ena_free_all_io_tx_resources(struct ena_adapter *adapter)
857 {
858 	ena_free_all_io_tx_resources_in_range(adapter,
859 					      0,
860 					      adapter->xdp_num_queues +
861 					      adapter->num_io_queues);
862 }
863 
864 /* ena_setup_rx_resources - allocate I/O Rx resources (Descriptors)
865  * @adapter: network interface device structure
866  * @qid: queue index
867  *
868  * Returns 0 on success, negative on failure
869  */
870 static int ena_setup_rx_resources(struct ena_adapter *adapter,
871 				  u32 qid)
872 {
873 	struct ena_ring *rx_ring = &adapter->rx_ring[qid];
874 	struct ena_irq *ena_irq = &adapter->irq_tbl[ENA_IO_IRQ_IDX(qid)];
875 	int size, node, i;
876 
877 	if (rx_ring->rx_buffer_info) {
878 		netif_err(adapter, ifup, adapter->netdev,
879 			  "rx_buffer_info is not NULL");
880 		return -EEXIST;
881 	}
882 
883 	/* alloc extra element so in rx path
884 	 * we can always prefetch rx_info + 1
885 	 */
886 	size = sizeof(struct ena_rx_buffer) * (rx_ring->ring_size + 1);
887 	node = cpu_to_node(ena_irq->cpu);
888 
889 	rx_ring->rx_buffer_info = vzalloc_node(size, node);
890 	if (!rx_ring->rx_buffer_info) {
891 		rx_ring->rx_buffer_info = vzalloc(size);
892 		if (!rx_ring->rx_buffer_info)
893 			return -ENOMEM;
894 	}
895 
896 	size = sizeof(u16) * rx_ring->ring_size;
897 	rx_ring->free_ids = vzalloc_node(size, node);
898 	if (!rx_ring->free_ids) {
899 		rx_ring->free_ids = vzalloc(size);
900 		if (!rx_ring->free_ids) {
901 			vfree(rx_ring->rx_buffer_info);
902 			rx_ring->rx_buffer_info = NULL;
903 			return -ENOMEM;
904 		}
905 	}
906 
907 	/* Req id ring for receiving RX pkts out of order */
908 	for (i = 0; i < rx_ring->ring_size; i++)
909 		rx_ring->free_ids[i] = i;
910 
911 	/* Reset rx statistics */
912 	memset(&rx_ring->rx_stats, 0x0, sizeof(rx_ring->rx_stats));
913 
914 	rx_ring->next_to_clean = 0;
915 	rx_ring->next_to_use = 0;
916 	rx_ring->cpu = ena_irq->cpu;
917 
918 	return 0;
919 }
920 
921 /* ena_free_rx_resources - Free I/O Rx Resources
922  * @adapter: network interface device structure
923  * @qid: queue index
924  *
925  * Free all receive software resources
926  */
927 static void ena_free_rx_resources(struct ena_adapter *adapter,
928 				  u32 qid)
929 {
930 	struct ena_ring *rx_ring = &adapter->rx_ring[qid];
931 
932 	vfree(rx_ring->rx_buffer_info);
933 	rx_ring->rx_buffer_info = NULL;
934 
935 	vfree(rx_ring->free_ids);
936 	rx_ring->free_ids = NULL;
937 }
938 
939 /* ena_setup_all_rx_resources - allocate I/O Rx queues resources for all queues
940  * @adapter: board private structure
941  *
942  * Return 0 on success, negative on failure
943  */
944 static int ena_setup_all_rx_resources(struct ena_adapter *adapter)
945 {
946 	int i, rc = 0;
947 
948 	for (i = 0; i < adapter->num_io_queues; i++) {
949 		rc = ena_setup_rx_resources(adapter, i);
950 		if (rc)
951 			goto err_setup_rx;
952 	}
953 
954 	return 0;
955 
956 err_setup_rx:
957 
958 	netif_err(adapter, ifup, adapter->netdev,
959 		  "Rx queue %d: allocation failed\n", i);
960 
961 	/* rewind the index freeing the rings as we go */
962 	while (i--)
963 		ena_free_rx_resources(adapter, i);
964 	return rc;
965 }
966 
967 /* ena_free_all_io_rx_resources - Free I/O Rx Resources for All Queues
968  * @adapter: board private structure
969  *
970  * Free all receive software resources
971  */
972 static void ena_free_all_io_rx_resources(struct ena_adapter *adapter)
973 {
974 	int i;
975 
976 	for (i = 0; i < adapter->num_io_queues; i++)
977 		ena_free_rx_resources(adapter, i);
978 }
979 
980 static struct page *ena_alloc_map_page(struct ena_ring *rx_ring,
981 				       dma_addr_t *dma)
982 {
983 	struct page *page;
984 
985 	/* This would allocate the page on the same NUMA node the executing code
986 	 * is running on.
987 	 */
988 	page = dev_alloc_page();
989 	if (!page) {
990 		ena_increase_stat(&rx_ring->rx_stats.page_alloc_fail, 1,
991 				  &rx_ring->syncp);
992 		return ERR_PTR(-ENOSPC);
993 	}
994 
995 	/* To enable NIC-side port-mirroring, AKA SPAN port,
996 	 * we make the buffer readable from the nic as well
997 	 */
998 	*dma = dma_map_page(rx_ring->dev, page, 0, ENA_PAGE_SIZE,
999 			    DMA_BIDIRECTIONAL);
1000 	if (unlikely(dma_mapping_error(rx_ring->dev, *dma))) {
1001 		ena_increase_stat(&rx_ring->rx_stats.dma_mapping_err, 1,
1002 				  &rx_ring->syncp);
1003 		__free_page(page);
1004 		return ERR_PTR(-EIO);
1005 	}
1006 
1007 	return page;
1008 }
1009 
1010 static int ena_alloc_rx_buffer(struct ena_ring *rx_ring,
1011 			       struct ena_rx_buffer *rx_info)
1012 {
1013 	int headroom = rx_ring->rx_headroom;
1014 	struct ena_com_buf *ena_buf;
1015 	struct page *page;
1016 	dma_addr_t dma;
1017 	int tailroom;
1018 
1019 	/* restore page offset value in case it has been changed by device */
1020 	rx_info->page_offset = headroom;
1021 
1022 	/* if previous allocated page is not used */
1023 	if (unlikely(rx_info->page))
1024 		return 0;
1025 
1026 	/* We handle DMA here */
1027 	page = ena_alloc_map_page(rx_ring, &dma);
1028 	if (unlikely(IS_ERR(page)))
1029 		return PTR_ERR(page);
1030 
1031 	netif_dbg(rx_ring->adapter, rx_status, rx_ring->netdev,
1032 		  "Allocate page %p, rx_info %p\n", page, rx_info);
1033 
1034 	tailroom = SKB_DATA_ALIGN(sizeof(struct skb_shared_info));
1035 
1036 	rx_info->page = page;
1037 	ena_buf = &rx_info->ena_buf;
1038 	ena_buf->paddr = dma + headroom;
1039 	ena_buf->len = ENA_PAGE_SIZE - headroom - tailroom;
1040 
1041 	return 0;
1042 }
1043 
1044 static void ena_unmap_rx_buff(struct ena_ring *rx_ring,
1045 			      struct ena_rx_buffer *rx_info)
1046 {
1047 	struct ena_com_buf *ena_buf = &rx_info->ena_buf;
1048 
1049 	dma_unmap_page(rx_ring->dev, ena_buf->paddr - rx_ring->rx_headroom,
1050 		       ENA_PAGE_SIZE,
1051 		       DMA_BIDIRECTIONAL);
1052 }
1053 
1054 static void ena_free_rx_page(struct ena_ring *rx_ring,
1055 			     struct ena_rx_buffer *rx_info)
1056 {
1057 	struct page *page = rx_info->page;
1058 
1059 	if (unlikely(!page)) {
1060 		netif_warn(rx_ring->adapter, rx_err, rx_ring->netdev,
1061 			   "Trying to free unallocated buffer\n");
1062 		return;
1063 	}
1064 
1065 	ena_unmap_rx_buff(rx_ring, rx_info);
1066 
1067 	__free_page(page);
1068 	rx_info->page = NULL;
1069 }
1070 
1071 static int ena_refill_rx_bufs(struct ena_ring *rx_ring, u32 num)
1072 {
1073 	u16 next_to_use, req_id;
1074 	u32 i;
1075 	int rc;
1076 
1077 	next_to_use = rx_ring->next_to_use;
1078 
1079 	for (i = 0; i < num; i++) {
1080 		struct ena_rx_buffer *rx_info;
1081 
1082 		req_id = rx_ring->free_ids[next_to_use];
1083 
1084 		rx_info = &rx_ring->rx_buffer_info[req_id];
1085 
1086 		rc = ena_alloc_rx_buffer(rx_ring, rx_info);
1087 		if (unlikely(rc < 0)) {
1088 			netif_warn(rx_ring->adapter, rx_err, rx_ring->netdev,
1089 				   "Failed to allocate buffer for rx queue %d\n",
1090 				   rx_ring->qid);
1091 			break;
1092 		}
1093 		rc = ena_com_add_single_rx_desc(rx_ring->ena_com_io_sq,
1094 						&rx_info->ena_buf,
1095 						req_id);
1096 		if (unlikely(rc)) {
1097 			netif_warn(rx_ring->adapter, rx_status, rx_ring->netdev,
1098 				   "Failed to add buffer for rx queue %d\n",
1099 				   rx_ring->qid);
1100 			break;
1101 		}
1102 		next_to_use = ENA_RX_RING_IDX_NEXT(next_to_use,
1103 						   rx_ring->ring_size);
1104 	}
1105 
1106 	if (unlikely(i < num)) {
1107 		ena_increase_stat(&rx_ring->rx_stats.refil_partial, 1,
1108 				  &rx_ring->syncp);
1109 		netif_warn(rx_ring->adapter, rx_err, rx_ring->netdev,
1110 			   "Refilled rx qid %d with only %d buffers (from %d)\n",
1111 			   rx_ring->qid, i, num);
1112 	}
1113 
1114 	/* ena_com_write_sq_doorbell issues a wmb() */
1115 	if (likely(i))
1116 		ena_com_write_sq_doorbell(rx_ring->ena_com_io_sq);
1117 
1118 	rx_ring->next_to_use = next_to_use;
1119 
1120 	return i;
1121 }
1122 
1123 static void ena_free_rx_bufs(struct ena_adapter *adapter,
1124 			     u32 qid)
1125 {
1126 	struct ena_ring *rx_ring = &adapter->rx_ring[qid];
1127 	u32 i;
1128 
1129 	for (i = 0; i < rx_ring->ring_size; i++) {
1130 		struct ena_rx_buffer *rx_info = &rx_ring->rx_buffer_info[i];
1131 
1132 		if (rx_info->page)
1133 			ena_free_rx_page(rx_ring, rx_info);
1134 	}
1135 }
1136 
1137 /* ena_refill_all_rx_bufs - allocate all queues Rx buffers
1138  * @adapter: board private structure
1139  */
1140 static void ena_refill_all_rx_bufs(struct ena_adapter *adapter)
1141 {
1142 	struct ena_ring *rx_ring;
1143 	int i, rc, bufs_num;
1144 
1145 	for (i = 0; i < adapter->num_io_queues; i++) {
1146 		rx_ring = &adapter->rx_ring[i];
1147 		bufs_num = rx_ring->ring_size - 1;
1148 		rc = ena_refill_rx_bufs(rx_ring, bufs_num);
1149 
1150 		if (unlikely(rc != bufs_num))
1151 			netif_warn(rx_ring->adapter, rx_status, rx_ring->netdev,
1152 				   "Refilling Queue %d failed. allocated %d buffers from: %d\n",
1153 				   i, rc, bufs_num);
1154 	}
1155 }
1156 
1157 static void ena_free_all_rx_bufs(struct ena_adapter *adapter)
1158 {
1159 	int i;
1160 
1161 	for (i = 0; i < adapter->num_io_queues; i++)
1162 		ena_free_rx_bufs(adapter, i);
1163 }
1164 
1165 static void ena_unmap_tx_buff(struct ena_ring *tx_ring,
1166 			      struct ena_tx_buffer *tx_info)
1167 {
1168 	struct ena_com_buf *ena_buf;
1169 	u32 cnt;
1170 	int i;
1171 
1172 	ena_buf = tx_info->bufs;
1173 	cnt = tx_info->num_of_bufs;
1174 
1175 	if (unlikely(!cnt))
1176 		return;
1177 
1178 	if (tx_info->map_linear_data) {
1179 		dma_unmap_single(tx_ring->dev,
1180 				 dma_unmap_addr(ena_buf, paddr),
1181 				 dma_unmap_len(ena_buf, len),
1182 				 DMA_TO_DEVICE);
1183 		ena_buf++;
1184 		cnt--;
1185 	}
1186 
1187 	/* unmap remaining mapped pages */
1188 	for (i = 0; i < cnt; i++) {
1189 		dma_unmap_page(tx_ring->dev, dma_unmap_addr(ena_buf, paddr),
1190 			       dma_unmap_len(ena_buf, len), DMA_TO_DEVICE);
1191 		ena_buf++;
1192 	}
1193 }
1194 
1195 /* ena_free_tx_bufs - Free Tx Buffers per Queue
1196  * @tx_ring: TX ring for which buffers be freed
1197  */
1198 static void ena_free_tx_bufs(struct ena_ring *tx_ring)
1199 {
1200 	bool print_once = true;
1201 	u32 i;
1202 
1203 	for (i = 0; i < tx_ring->ring_size; i++) {
1204 		struct ena_tx_buffer *tx_info = &tx_ring->tx_buffer_info[i];
1205 
1206 		if (!tx_info->skb)
1207 			continue;
1208 
1209 		if (print_once) {
1210 			netif_notice(tx_ring->adapter, ifdown, tx_ring->netdev,
1211 				     "Free uncompleted tx skb qid %d idx 0x%x\n",
1212 				     tx_ring->qid, i);
1213 			print_once = false;
1214 		} else {
1215 			netif_dbg(tx_ring->adapter, ifdown, tx_ring->netdev,
1216 				  "Free uncompleted tx skb qid %d idx 0x%x\n",
1217 				  tx_ring->qid, i);
1218 		}
1219 
1220 		ena_unmap_tx_buff(tx_ring, tx_info);
1221 
1222 		dev_kfree_skb_any(tx_info->skb);
1223 	}
1224 	netdev_tx_reset_queue(netdev_get_tx_queue(tx_ring->netdev,
1225 						  tx_ring->qid));
1226 }
1227 
1228 static void ena_free_all_tx_bufs(struct ena_adapter *adapter)
1229 {
1230 	struct ena_ring *tx_ring;
1231 	int i;
1232 
1233 	for (i = 0; i < adapter->num_io_queues + adapter->xdp_num_queues; i++) {
1234 		tx_ring = &adapter->tx_ring[i];
1235 		ena_free_tx_bufs(tx_ring);
1236 	}
1237 }
1238 
1239 static void ena_destroy_all_tx_queues(struct ena_adapter *adapter)
1240 {
1241 	u16 ena_qid;
1242 	int i;
1243 
1244 	for (i = 0; i < adapter->num_io_queues + adapter->xdp_num_queues; i++) {
1245 		ena_qid = ENA_IO_TXQ_IDX(i);
1246 		ena_com_destroy_io_queue(adapter->ena_dev, ena_qid);
1247 	}
1248 }
1249 
1250 static void ena_destroy_all_rx_queues(struct ena_adapter *adapter)
1251 {
1252 	u16 ena_qid;
1253 	int i;
1254 
1255 	for (i = 0; i < adapter->num_io_queues; i++) {
1256 		ena_qid = ENA_IO_RXQ_IDX(i);
1257 		cancel_work_sync(&adapter->ena_napi[i].dim.work);
1258 		ena_com_destroy_io_queue(adapter->ena_dev, ena_qid);
1259 	}
1260 }
1261 
1262 static void ena_destroy_all_io_queues(struct ena_adapter *adapter)
1263 {
1264 	ena_destroy_all_tx_queues(adapter);
1265 	ena_destroy_all_rx_queues(adapter);
1266 }
1267 
1268 static int handle_invalid_req_id(struct ena_ring *ring, u16 req_id,
1269 				 struct ena_tx_buffer *tx_info, bool is_xdp)
1270 {
1271 	if (tx_info)
1272 		netif_err(ring->adapter,
1273 			  tx_done,
1274 			  ring->netdev,
1275 			  "tx_info doesn't have valid %s",
1276 			   is_xdp ? "xdp frame" : "skb");
1277 	else
1278 		netif_err(ring->adapter,
1279 			  tx_done,
1280 			  ring->netdev,
1281 			  "Invalid req_id: %hu\n",
1282 			  req_id);
1283 
1284 	ena_increase_stat(&ring->tx_stats.bad_req_id, 1, &ring->syncp);
1285 
1286 	/* Trigger device reset */
1287 	ring->adapter->reset_reason = ENA_REGS_RESET_INV_TX_REQ_ID;
1288 	set_bit(ENA_FLAG_TRIGGER_RESET, &ring->adapter->flags);
1289 	return -EFAULT;
1290 }
1291 
1292 static int validate_tx_req_id(struct ena_ring *tx_ring, u16 req_id)
1293 {
1294 	struct ena_tx_buffer *tx_info = NULL;
1295 
1296 	if (likely(req_id < tx_ring->ring_size)) {
1297 		tx_info = &tx_ring->tx_buffer_info[req_id];
1298 		if (likely(tx_info->skb))
1299 			return 0;
1300 	}
1301 
1302 	return handle_invalid_req_id(tx_ring, req_id, tx_info, false);
1303 }
1304 
1305 static int validate_xdp_req_id(struct ena_ring *xdp_ring, u16 req_id)
1306 {
1307 	struct ena_tx_buffer *tx_info = NULL;
1308 
1309 	if (likely(req_id < xdp_ring->ring_size)) {
1310 		tx_info = &xdp_ring->tx_buffer_info[req_id];
1311 		if (likely(tx_info->xdpf))
1312 			return 0;
1313 	}
1314 
1315 	return handle_invalid_req_id(xdp_ring, req_id, tx_info, true);
1316 }
1317 
1318 static int ena_clean_tx_irq(struct ena_ring *tx_ring, u32 budget)
1319 {
1320 	struct netdev_queue *txq;
1321 	bool above_thresh;
1322 	u32 tx_bytes = 0;
1323 	u32 total_done = 0;
1324 	u16 next_to_clean;
1325 	u16 req_id;
1326 	int tx_pkts = 0;
1327 	int rc;
1328 
1329 	next_to_clean = tx_ring->next_to_clean;
1330 	txq = netdev_get_tx_queue(tx_ring->netdev, tx_ring->qid);
1331 
1332 	while (tx_pkts < budget) {
1333 		struct ena_tx_buffer *tx_info;
1334 		struct sk_buff *skb;
1335 
1336 		rc = ena_com_tx_comp_req_id_get(tx_ring->ena_com_io_cq,
1337 						&req_id);
1338 		if (rc)
1339 			break;
1340 
1341 		rc = validate_tx_req_id(tx_ring, req_id);
1342 		if (rc)
1343 			break;
1344 
1345 		tx_info = &tx_ring->tx_buffer_info[req_id];
1346 		skb = tx_info->skb;
1347 
1348 		/* prefetch skb_end_pointer() to speedup skb_shinfo(skb) */
1349 		prefetch(&skb->end);
1350 
1351 		tx_info->skb = NULL;
1352 		tx_info->last_jiffies = 0;
1353 
1354 		ena_unmap_tx_buff(tx_ring, tx_info);
1355 
1356 		netif_dbg(tx_ring->adapter, tx_done, tx_ring->netdev,
1357 			  "tx_poll: q %d skb %p completed\n", tx_ring->qid,
1358 			  skb);
1359 
1360 		tx_bytes += skb->len;
1361 		dev_kfree_skb(skb);
1362 		tx_pkts++;
1363 		total_done += tx_info->tx_descs;
1364 
1365 		tx_ring->free_ids[next_to_clean] = req_id;
1366 		next_to_clean = ENA_TX_RING_IDX_NEXT(next_to_clean,
1367 						     tx_ring->ring_size);
1368 	}
1369 
1370 	tx_ring->next_to_clean = next_to_clean;
1371 	ena_com_comp_ack(tx_ring->ena_com_io_sq, total_done);
1372 	ena_com_update_dev_comp_head(tx_ring->ena_com_io_cq);
1373 
1374 	netdev_tx_completed_queue(txq, tx_pkts, tx_bytes);
1375 
1376 	netif_dbg(tx_ring->adapter, tx_done, tx_ring->netdev,
1377 		  "tx_poll: q %d done. total pkts: %d\n",
1378 		  tx_ring->qid, tx_pkts);
1379 
1380 	/* need to make the rings circular update visible to
1381 	 * ena_start_xmit() before checking for netif_queue_stopped().
1382 	 */
1383 	smp_mb();
1384 
1385 	above_thresh = ena_com_sq_have_enough_space(tx_ring->ena_com_io_sq,
1386 						    ENA_TX_WAKEUP_THRESH);
1387 	if (unlikely(netif_tx_queue_stopped(txq) && above_thresh)) {
1388 		__netif_tx_lock(txq, smp_processor_id());
1389 		above_thresh =
1390 			ena_com_sq_have_enough_space(tx_ring->ena_com_io_sq,
1391 						     ENA_TX_WAKEUP_THRESH);
1392 		if (netif_tx_queue_stopped(txq) && above_thresh &&
1393 		    test_bit(ENA_FLAG_DEV_UP, &tx_ring->adapter->flags)) {
1394 			netif_tx_wake_queue(txq);
1395 			ena_increase_stat(&tx_ring->tx_stats.queue_wakeup, 1,
1396 					  &tx_ring->syncp);
1397 		}
1398 		__netif_tx_unlock(txq);
1399 	}
1400 
1401 	return tx_pkts;
1402 }
1403 
1404 static struct sk_buff *ena_alloc_skb(struct ena_ring *rx_ring, void *first_frag)
1405 {
1406 	struct sk_buff *skb;
1407 
1408 	if (!first_frag)
1409 		skb = netdev_alloc_skb_ip_align(rx_ring->netdev,
1410 						rx_ring->rx_copybreak);
1411 	else
1412 		skb = build_skb(first_frag, ENA_PAGE_SIZE);
1413 
1414 	if (unlikely(!skb)) {
1415 		ena_increase_stat(&rx_ring->rx_stats.skb_alloc_fail, 1,
1416 				  &rx_ring->syncp);
1417 
1418 		netif_dbg(rx_ring->adapter, rx_err, rx_ring->netdev,
1419 			  "Failed to allocate skb. first_frag %s\n",
1420 			  first_frag ? "provided" : "not provided");
1421 		return NULL;
1422 	}
1423 
1424 	return skb;
1425 }
1426 
1427 static struct sk_buff *ena_rx_skb(struct ena_ring *rx_ring,
1428 				  struct ena_com_rx_buf_info *ena_bufs,
1429 				  u32 descs,
1430 				  u16 *next_to_clean)
1431 {
1432 	struct ena_rx_buffer *rx_info;
1433 	u16 len, req_id, buf = 0;
1434 	struct sk_buff *skb;
1435 	void *page_addr;
1436 	u32 page_offset;
1437 	void *data_addr;
1438 
1439 	len = ena_bufs[buf].len;
1440 	req_id = ena_bufs[buf].req_id;
1441 
1442 	rx_info = &rx_ring->rx_buffer_info[req_id];
1443 
1444 	if (unlikely(!rx_info->page)) {
1445 		netif_err(rx_ring->adapter, rx_err, rx_ring->netdev,
1446 			  "Page is NULL\n");
1447 		return NULL;
1448 	}
1449 
1450 	netif_dbg(rx_ring->adapter, rx_status, rx_ring->netdev,
1451 		  "rx_info %p page %p\n",
1452 		  rx_info, rx_info->page);
1453 
1454 	/* save virt address of first buffer */
1455 	page_addr = page_address(rx_info->page);
1456 	page_offset = rx_info->page_offset;
1457 	data_addr = page_addr + page_offset;
1458 
1459 	prefetch(data_addr);
1460 
1461 	if (len <= rx_ring->rx_copybreak) {
1462 		skb = ena_alloc_skb(rx_ring, NULL);
1463 		if (unlikely(!skb))
1464 			return NULL;
1465 
1466 		netif_dbg(rx_ring->adapter, rx_status, rx_ring->netdev,
1467 			  "RX allocated small packet. len %d. data_len %d\n",
1468 			  skb->len, skb->data_len);
1469 
1470 		/* sync this buffer for CPU use */
1471 		dma_sync_single_for_cpu(rx_ring->dev,
1472 					dma_unmap_addr(&rx_info->ena_buf, paddr),
1473 					len,
1474 					DMA_FROM_DEVICE);
1475 		skb_copy_to_linear_data(skb, data_addr, len);
1476 		dma_sync_single_for_device(rx_ring->dev,
1477 					   dma_unmap_addr(&rx_info->ena_buf, paddr),
1478 					   len,
1479 					   DMA_FROM_DEVICE);
1480 
1481 		skb_put(skb, len);
1482 		skb->protocol = eth_type_trans(skb, rx_ring->netdev);
1483 		rx_ring->free_ids[*next_to_clean] = req_id;
1484 		*next_to_clean = ENA_RX_RING_IDX_ADD(*next_to_clean, descs,
1485 						     rx_ring->ring_size);
1486 		return skb;
1487 	}
1488 
1489 	ena_unmap_rx_buff(rx_ring, rx_info);
1490 
1491 	skb = ena_alloc_skb(rx_ring, page_addr);
1492 	if (unlikely(!skb))
1493 		return NULL;
1494 
1495 	/* Populate skb's linear part */
1496 	skb_reserve(skb, page_offset);
1497 	skb_put(skb, len);
1498 	skb->protocol = eth_type_trans(skb, rx_ring->netdev);
1499 
1500 	do {
1501 		netif_dbg(rx_ring->adapter, rx_status, rx_ring->netdev,
1502 			  "RX skb updated. len %d. data_len %d\n",
1503 			  skb->len, skb->data_len);
1504 
1505 		rx_info->page = NULL;
1506 
1507 		rx_ring->free_ids[*next_to_clean] = req_id;
1508 		*next_to_clean =
1509 			ENA_RX_RING_IDX_NEXT(*next_to_clean,
1510 					     rx_ring->ring_size);
1511 		if (likely(--descs == 0))
1512 			break;
1513 
1514 		buf++;
1515 		len = ena_bufs[buf].len;
1516 		req_id = ena_bufs[buf].req_id;
1517 
1518 		rx_info = &rx_ring->rx_buffer_info[req_id];
1519 
1520 		ena_unmap_rx_buff(rx_ring, rx_info);
1521 
1522 		skb_add_rx_frag(skb, skb_shinfo(skb)->nr_frags, rx_info->page,
1523 				rx_info->page_offset, len, ENA_PAGE_SIZE);
1524 
1525 	} while (1);
1526 
1527 	return skb;
1528 }
1529 
1530 /* ena_rx_checksum - indicate in skb if hw indicated a good cksum
1531  * @adapter: structure containing adapter specific data
1532  * @ena_rx_ctx: received packet context/metadata
1533  * @skb: skb currently being received and modified
1534  */
1535 static void ena_rx_checksum(struct ena_ring *rx_ring,
1536 				   struct ena_com_rx_ctx *ena_rx_ctx,
1537 				   struct sk_buff *skb)
1538 {
1539 	/* Rx csum disabled */
1540 	if (unlikely(!(rx_ring->netdev->features & NETIF_F_RXCSUM))) {
1541 		skb->ip_summed = CHECKSUM_NONE;
1542 		return;
1543 	}
1544 
1545 	/* For fragmented packets the checksum isn't valid */
1546 	if (ena_rx_ctx->frag) {
1547 		skb->ip_summed = CHECKSUM_NONE;
1548 		return;
1549 	}
1550 
1551 	/* if IP and error */
1552 	if (unlikely((ena_rx_ctx->l3_proto == ENA_ETH_IO_L3_PROTO_IPV4) &&
1553 		     (ena_rx_ctx->l3_csum_err))) {
1554 		/* ipv4 checksum error */
1555 		skb->ip_summed = CHECKSUM_NONE;
1556 		ena_increase_stat(&rx_ring->rx_stats.bad_csum, 1,
1557 				  &rx_ring->syncp);
1558 		netif_dbg(rx_ring->adapter, rx_err, rx_ring->netdev,
1559 			  "RX IPv4 header checksum error\n");
1560 		return;
1561 	}
1562 
1563 	/* if TCP/UDP */
1564 	if (likely((ena_rx_ctx->l4_proto == ENA_ETH_IO_L4_PROTO_TCP) ||
1565 		   (ena_rx_ctx->l4_proto == ENA_ETH_IO_L4_PROTO_UDP))) {
1566 		if (unlikely(ena_rx_ctx->l4_csum_err)) {
1567 			/* TCP/UDP checksum error */
1568 			ena_increase_stat(&rx_ring->rx_stats.bad_csum, 1,
1569 					  &rx_ring->syncp);
1570 			netif_dbg(rx_ring->adapter, rx_err, rx_ring->netdev,
1571 				  "RX L4 checksum error\n");
1572 			skb->ip_summed = CHECKSUM_NONE;
1573 			return;
1574 		}
1575 
1576 		if (likely(ena_rx_ctx->l4_csum_checked)) {
1577 			skb->ip_summed = CHECKSUM_UNNECESSARY;
1578 			ena_increase_stat(&rx_ring->rx_stats.csum_good, 1,
1579 					  &rx_ring->syncp);
1580 		} else {
1581 			ena_increase_stat(&rx_ring->rx_stats.csum_unchecked, 1,
1582 					  &rx_ring->syncp);
1583 			skb->ip_summed = CHECKSUM_NONE;
1584 		}
1585 	} else {
1586 		skb->ip_summed = CHECKSUM_NONE;
1587 		return;
1588 	}
1589 
1590 }
1591 
1592 static void ena_set_rx_hash(struct ena_ring *rx_ring,
1593 			    struct ena_com_rx_ctx *ena_rx_ctx,
1594 			    struct sk_buff *skb)
1595 {
1596 	enum pkt_hash_types hash_type;
1597 
1598 	if (likely(rx_ring->netdev->features & NETIF_F_RXHASH)) {
1599 		if (likely((ena_rx_ctx->l4_proto == ENA_ETH_IO_L4_PROTO_TCP) ||
1600 			   (ena_rx_ctx->l4_proto == ENA_ETH_IO_L4_PROTO_UDP)))
1601 
1602 			hash_type = PKT_HASH_TYPE_L4;
1603 		else
1604 			hash_type = PKT_HASH_TYPE_NONE;
1605 
1606 		/* Override hash type if the packet is fragmented */
1607 		if (ena_rx_ctx->frag)
1608 			hash_type = PKT_HASH_TYPE_NONE;
1609 
1610 		skb_set_hash(skb, ena_rx_ctx->hash, hash_type);
1611 	}
1612 }
1613 
1614 static int ena_xdp_handle_buff(struct ena_ring *rx_ring, struct xdp_buff *xdp)
1615 {
1616 	struct ena_rx_buffer *rx_info;
1617 	int ret;
1618 
1619 	rx_info = &rx_ring->rx_buffer_info[rx_ring->ena_bufs[0].req_id];
1620 	xdp_prepare_buff(xdp, page_address(rx_info->page),
1621 			 rx_info->page_offset,
1622 			 rx_ring->ena_bufs[0].len, false);
1623 	/* If for some reason we received a bigger packet than
1624 	 * we expect, then we simply drop it
1625 	 */
1626 	if (unlikely(rx_ring->ena_bufs[0].len > ENA_XDP_MAX_MTU))
1627 		return XDP_DROP;
1628 
1629 	ret = ena_xdp_execute(rx_ring, xdp);
1630 
1631 	/* The xdp program might expand the headers */
1632 	if (ret == XDP_PASS) {
1633 		rx_info->page_offset = xdp->data - xdp->data_hard_start;
1634 		rx_ring->ena_bufs[0].len = xdp->data_end - xdp->data;
1635 	}
1636 
1637 	return ret;
1638 }
1639 /* ena_clean_rx_irq - Cleanup RX irq
1640  * @rx_ring: RX ring to clean
1641  * @napi: napi handler
1642  * @budget: how many packets driver is allowed to clean
1643  *
1644  * Returns the number of cleaned buffers.
1645  */
1646 static int ena_clean_rx_irq(struct ena_ring *rx_ring, struct napi_struct *napi,
1647 			    u32 budget)
1648 {
1649 	u16 next_to_clean = rx_ring->next_to_clean;
1650 	struct ena_com_rx_ctx ena_rx_ctx;
1651 	struct ena_rx_buffer *rx_info;
1652 	struct ena_adapter *adapter;
1653 	u32 res_budget, work_done;
1654 	int rx_copybreak_pkt = 0;
1655 	int refill_threshold;
1656 	struct sk_buff *skb;
1657 	int refill_required;
1658 	struct xdp_buff xdp;
1659 	int xdp_flags = 0;
1660 	int total_len = 0;
1661 	int xdp_verdict;
1662 	int rc = 0;
1663 	int i;
1664 
1665 	netif_dbg(rx_ring->adapter, rx_status, rx_ring->netdev,
1666 		  "%s qid %d\n", __func__, rx_ring->qid);
1667 	res_budget = budget;
1668 	xdp_init_buff(&xdp, ENA_PAGE_SIZE, &rx_ring->xdp_rxq);
1669 
1670 	do {
1671 		xdp_verdict = XDP_PASS;
1672 		skb = NULL;
1673 		ena_rx_ctx.ena_bufs = rx_ring->ena_bufs;
1674 		ena_rx_ctx.max_bufs = rx_ring->sgl_size;
1675 		ena_rx_ctx.descs = 0;
1676 		ena_rx_ctx.pkt_offset = 0;
1677 		rc = ena_com_rx_pkt(rx_ring->ena_com_io_cq,
1678 				    rx_ring->ena_com_io_sq,
1679 				    &ena_rx_ctx);
1680 		if (unlikely(rc))
1681 			goto error;
1682 
1683 		if (unlikely(ena_rx_ctx.descs == 0))
1684 			break;
1685 
1686 		/* First descriptor might have an offset set by the device */
1687 		rx_info = &rx_ring->rx_buffer_info[rx_ring->ena_bufs[0].req_id];
1688 		rx_info->page_offset += ena_rx_ctx.pkt_offset;
1689 
1690 		netif_dbg(rx_ring->adapter, rx_status, rx_ring->netdev,
1691 			  "rx_poll: q %d got packet from ena. descs #: %d l3 proto %d l4 proto %d hash: %x\n",
1692 			  rx_ring->qid, ena_rx_ctx.descs, ena_rx_ctx.l3_proto,
1693 			  ena_rx_ctx.l4_proto, ena_rx_ctx.hash);
1694 
1695 		if (ena_xdp_present_ring(rx_ring))
1696 			xdp_verdict = ena_xdp_handle_buff(rx_ring, &xdp);
1697 
1698 		/* allocate skb and fill it */
1699 		if (xdp_verdict == XDP_PASS)
1700 			skb = ena_rx_skb(rx_ring,
1701 					 rx_ring->ena_bufs,
1702 					 ena_rx_ctx.descs,
1703 					 &next_to_clean);
1704 
1705 		if (unlikely(!skb)) {
1706 			for (i = 0; i < ena_rx_ctx.descs; i++) {
1707 				int req_id = rx_ring->ena_bufs[i].req_id;
1708 
1709 				rx_ring->free_ids[next_to_clean] = req_id;
1710 				next_to_clean =
1711 					ENA_RX_RING_IDX_NEXT(next_to_clean,
1712 							     rx_ring->ring_size);
1713 
1714 				/* Packets was passed for transmission, unmap it
1715 				 * from RX side.
1716 				 */
1717 				if (xdp_verdict == XDP_TX || xdp_verdict == XDP_REDIRECT) {
1718 					ena_unmap_rx_buff(rx_ring,
1719 							  &rx_ring->rx_buffer_info[req_id]);
1720 					rx_ring->rx_buffer_info[req_id].page = NULL;
1721 				}
1722 			}
1723 			if (xdp_verdict != XDP_PASS) {
1724 				xdp_flags |= xdp_verdict;
1725 				res_budget--;
1726 				continue;
1727 			}
1728 			break;
1729 		}
1730 
1731 		ena_rx_checksum(rx_ring, &ena_rx_ctx, skb);
1732 
1733 		ena_set_rx_hash(rx_ring, &ena_rx_ctx, skb);
1734 
1735 		skb_record_rx_queue(skb, rx_ring->qid);
1736 
1737 		if (rx_ring->ena_bufs[0].len <= rx_ring->rx_copybreak)
1738 			rx_copybreak_pkt++;
1739 
1740 		total_len += skb->len;
1741 
1742 		napi_gro_receive(napi, skb);
1743 
1744 		res_budget--;
1745 	} while (likely(res_budget));
1746 
1747 	work_done = budget - res_budget;
1748 	rx_ring->per_napi_packets += work_done;
1749 	u64_stats_update_begin(&rx_ring->syncp);
1750 	rx_ring->rx_stats.bytes += total_len;
1751 	rx_ring->rx_stats.cnt += work_done;
1752 	rx_ring->rx_stats.rx_copybreak_pkt += rx_copybreak_pkt;
1753 	u64_stats_update_end(&rx_ring->syncp);
1754 
1755 	rx_ring->next_to_clean = next_to_clean;
1756 
1757 	refill_required = ena_com_free_q_entries(rx_ring->ena_com_io_sq);
1758 	refill_threshold =
1759 		min_t(int, rx_ring->ring_size / ENA_RX_REFILL_THRESH_DIVIDER,
1760 		      ENA_RX_REFILL_THRESH_PACKET);
1761 
1762 	/* Optimization, try to batch new rx buffers */
1763 	if (refill_required > refill_threshold) {
1764 		ena_com_update_dev_comp_head(rx_ring->ena_com_io_cq);
1765 		ena_refill_rx_bufs(rx_ring, refill_required);
1766 	}
1767 
1768 	if (xdp_flags & XDP_REDIRECT)
1769 		xdp_do_flush_map();
1770 
1771 	return work_done;
1772 
1773 error:
1774 	adapter = netdev_priv(rx_ring->netdev);
1775 
1776 	if (rc == -ENOSPC) {
1777 		ena_increase_stat(&rx_ring->rx_stats.bad_desc_num, 1,
1778 				  &rx_ring->syncp);
1779 		adapter->reset_reason = ENA_REGS_RESET_TOO_MANY_RX_DESCS;
1780 	} else {
1781 		ena_increase_stat(&rx_ring->rx_stats.bad_req_id, 1,
1782 				  &rx_ring->syncp);
1783 		adapter->reset_reason = ENA_REGS_RESET_INV_RX_REQ_ID;
1784 	}
1785 
1786 	set_bit(ENA_FLAG_TRIGGER_RESET, &adapter->flags);
1787 
1788 	return 0;
1789 }
1790 
1791 static void ena_dim_work(struct work_struct *w)
1792 {
1793 	struct dim *dim = container_of(w, struct dim, work);
1794 	struct dim_cq_moder cur_moder =
1795 		net_dim_get_rx_moderation(dim->mode, dim->profile_ix);
1796 	struct ena_napi *ena_napi = container_of(dim, struct ena_napi, dim);
1797 
1798 	ena_napi->rx_ring->smoothed_interval = cur_moder.usec;
1799 	dim->state = DIM_START_MEASURE;
1800 }
1801 
1802 static void ena_adjust_adaptive_rx_intr_moderation(struct ena_napi *ena_napi)
1803 {
1804 	struct dim_sample dim_sample;
1805 	struct ena_ring *rx_ring = ena_napi->rx_ring;
1806 
1807 	if (!rx_ring->per_napi_packets)
1808 		return;
1809 
1810 	rx_ring->non_empty_napi_events++;
1811 
1812 	dim_update_sample(rx_ring->non_empty_napi_events,
1813 			  rx_ring->rx_stats.cnt,
1814 			  rx_ring->rx_stats.bytes,
1815 			  &dim_sample);
1816 
1817 	net_dim(&ena_napi->dim, dim_sample);
1818 
1819 	rx_ring->per_napi_packets = 0;
1820 }
1821 
1822 static void ena_unmask_interrupt(struct ena_ring *tx_ring,
1823 					struct ena_ring *rx_ring)
1824 {
1825 	struct ena_eth_io_intr_reg intr_reg;
1826 	u32 rx_interval = 0;
1827 	/* Rx ring can be NULL when for XDP tx queues which don't have an
1828 	 * accompanying rx_ring pair.
1829 	 */
1830 	if (rx_ring)
1831 		rx_interval = ena_com_get_adaptive_moderation_enabled(rx_ring->ena_dev) ?
1832 			rx_ring->smoothed_interval :
1833 			ena_com_get_nonadaptive_moderation_interval_rx(rx_ring->ena_dev);
1834 
1835 	/* Update intr register: rx intr delay,
1836 	 * tx intr delay and interrupt unmask
1837 	 */
1838 	ena_com_update_intr_reg(&intr_reg,
1839 				rx_interval,
1840 				tx_ring->smoothed_interval,
1841 				true);
1842 
1843 	ena_increase_stat(&tx_ring->tx_stats.unmask_interrupt, 1,
1844 			  &tx_ring->syncp);
1845 
1846 	/* It is a shared MSI-X.
1847 	 * Tx and Rx CQ have pointer to it.
1848 	 * So we use one of them to reach the intr reg
1849 	 * The Tx ring is used because the rx_ring is NULL for XDP queues
1850 	 */
1851 	ena_com_unmask_intr(tx_ring->ena_com_io_cq, &intr_reg);
1852 }
1853 
1854 static void ena_update_ring_numa_node(struct ena_ring *tx_ring,
1855 					     struct ena_ring *rx_ring)
1856 {
1857 	int cpu = get_cpu();
1858 	int numa_node;
1859 
1860 	/* Check only one ring since the 2 rings are running on the same cpu */
1861 	if (likely(tx_ring->cpu == cpu))
1862 		goto out;
1863 
1864 	numa_node = cpu_to_node(cpu);
1865 	put_cpu();
1866 
1867 	if (numa_node != NUMA_NO_NODE) {
1868 		ena_com_update_numa_node(tx_ring->ena_com_io_cq, numa_node);
1869 		if (rx_ring)
1870 			ena_com_update_numa_node(rx_ring->ena_com_io_cq,
1871 						 numa_node);
1872 	}
1873 
1874 	tx_ring->cpu = cpu;
1875 	if (rx_ring)
1876 		rx_ring->cpu = cpu;
1877 
1878 	return;
1879 out:
1880 	put_cpu();
1881 }
1882 
1883 static int ena_clean_xdp_irq(struct ena_ring *xdp_ring, u32 budget)
1884 {
1885 	u32 total_done = 0;
1886 	u16 next_to_clean;
1887 	u32 tx_bytes = 0;
1888 	int tx_pkts = 0;
1889 	u16 req_id;
1890 	int rc;
1891 
1892 	if (unlikely(!xdp_ring))
1893 		return 0;
1894 	next_to_clean = xdp_ring->next_to_clean;
1895 
1896 	while (tx_pkts < budget) {
1897 		struct ena_tx_buffer *tx_info;
1898 		struct xdp_frame *xdpf;
1899 
1900 		rc = ena_com_tx_comp_req_id_get(xdp_ring->ena_com_io_cq,
1901 						&req_id);
1902 		if (rc)
1903 			break;
1904 
1905 		rc = validate_xdp_req_id(xdp_ring, req_id);
1906 		if (rc)
1907 			break;
1908 
1909 		tx_info = &xdp_ring->tx_buffer_info[req_id];
1910 		xdpf = tx_info->xdpf;
1911 
1912 		tx_info->xdpf = NULL;
1913 		tx_info->last_jiffies = 0;
1914 		ena_unmap_tx_buff(xdp_ring, tx_info);
1915 
1916 		netif_dbg(xdp_ring->adapter, tx_done, xdp_ring->netdev,
1917 			  "tx_poll: q %d skb %p completed\n", xdp_ring->qid,
1918 			  xdpf);
1919 
1920 		tx_bytes += xdpf->len;
1921 		tx_pkts++;
1922 		total_done += tx_info->tx_descs;
1923 
1924 		xdp_return_frame(xdpf);
1925 		xdp_ring->free_ids[next_to_clean] = req_id;
1926 		next_to_clean = ENA_TX_RING_IDX_NEXT(next_to_clean,
1927 						     xdp_ring->ring_size);
1928 	}
1929 
1930 	xdp_ring->next_to_clean = next_to_clean;
1931 	ena_com_comp_ack(xdp_ring->ena_com_io_sq, total_done);
1932 	ena_com_update_dev_comp_head(xdp_ring->ena_com_io_cq);
1933 
1934 	netif_dbg(xdp_ring->adapter, tx_done, xdp_ring->netdev,
1935 		  "tx_poll: q %d done. total pkts: %d\n",
1936 		  xdp_ring->qid, tx_pkts);
1937 
1938 	return tx_pkts;
1939 }
1940 
1941 static int ena_io_poll(struct napi_struct *napi, int budget)
1942 {
1943 	struct ena_napi *ena_napi = container_of(napi, struct ena_napi, napi);
1944 	struct ena_ring *tx_ring, *rx_ring;
1945 	int tx_work_done;
1946 	int rx_work_done = 0;
1947 	int tx_budget;
1948 	int napi_comp_call = 0;
1949 	int ret;
1950 
1951 	tx_ring = ena_napi->tx_ring;
1952 	rx_ring = ena_napi->rx_ring;
1953 
1954 	tx_budget = tx_ring->ring_size / ENA_TX_POLL_BUDGET_DIVIDER;
1955 
1956 	if (!test_bit(ENA_FLAG_DEV_UP, &tx_ring->adapter->flags) ||
1957 	    test_bit(ENA_FLAG_TRIGGER_RESET, &tx_ring->adapter->flags)) {
1958 		napi_complete_done(napi, 0);
1959 		return 0;
1960 	}
1961 
1962 	tx_work_done = ena_clean_tx_irq(tx_ring, tx_budget);
1963 	/* On netpoll the budget is zero and the handler should only clean the
1964 	 * tx completions.
1965 	 */
1966 	if (likely(budget))
1967 		rx_work_done = ena_clean_rx_irq(rx_ring, napi, budget);
1968 
1969 	/* If the device is about to reset or down, avoid unmask
1970 	 * the interrupt and return 0 so NAPI won't reschedule
1971 	 */
1972 	if (unlikely(!test_bit(ENA_FLAG_DEV_UP, &tx_ring->adapter->flags) ||
1973 		     test_bit(ENA_FLAG_TRIGGER_RESET, &tx_ring->adapter->flags))) {
1974 		napi_complete_done(napi, 0);
1975 		ret = 0;
1976 
1977 	} else if ((budget > rx_work_done) && (tx_budget > tx_work_done)) {
1978 		napi_comp_call = 1;
1979 
1980 		/* Update numa and unmask the interrupt only when schedule
1981 		 * from the interrupt context (vs from sk_busy_loop)
1982 		 */
1983 		if (napi_complete_done(napi, rx_work_done) &&
1984 		    READ_ONCE(ena_napi->interrupts_masked)) {
1985 			smp_rmb(); /* make sure interrupts_masked is read */
1986 			WRITE_ONCE(ena_napi->interrupts_masked, false);
1987 			/* We apply adaptive moderation on Rx path only.
1988 			 * Tx uses static interrupt moderation.
1989 			 */
1990 			if (ena_com_get_adaptive_moderation_enabled(rx_ring->ena_dev))
1991 				ena_adjust_adaptive_rx_intr_moderation(ena_napi);
1992 
1993 			ena_unmask_interrupt(tx_ring, rx_ring);
1994 		}
1995 
1996 		ena_update_ring_numa_node(tx_ring, rx_ring);
1997 
1998 		ret = rx_work_done;
1999 	} else {
2000 		ret = budget;
2001 	}
2002 
2003 	u64_stats_update_begin(&tx_ring->syncp);
2004 	tx_ring->tx_stats.napi_comp += napi_comp_call;
2005 	tx_ring->tx_stats.tx_poll++;
2006 	u64_stats_update_end(&tx_ring->syncp);
2007 
2008 	tx_ring->tx_stats.last_napi_jiffies = jiffies;
2009 
2010 	return ret;
2011 }
2012 
2013 static irqreturn_t ena_intr_msix_mgmnt(int irq, void *data)
2014 {
2015 	struct ena_adapter *adapter = (struct ena_adapter *)data;
2016 
2017 	ena_com_admin_q_comp_intr_handler(adapter->ena_dev);
2018 
2019 	/* Don't call the aenq handler before probe is done */
2020 	if (likely(test_bit(ENA_FLAG_DEVICE_RUNNING, &adapter->flags)))
2021 		ena_com_aenq_intr_handler(adapter->ena_dev, data);
2022 
2023 	return IRQ_HANDLED;
2024 }
2025 
2026 /* ena_intr_msix_io - MSI-X Interrupt Handler for Tx/Rx
2027  * @irq: interrupt number
2028  * @data: pointer to a network interface private napi device structure
2029  */
2030 static irqreturn_t ena_intr_msix_io(int irq, void *data)
2031 {
2032 	struct ena_napi *ena_napi = data;
2033 
2034 	/* Used to check HW health */
2035 	WRITE_ONCE(ena_napi->first_interrupt, true);
2036 
2037 	WRITE_ONCE(ena_napi->interrupts_masked, true);
2038 	smp_wmb(); /* write interrupts_masked before calling napi */
2039 
2040 	napi_schedule_irqoff(&ena_napi->napi);
2041 
2042 	return IRQ_HANDLED;
2043 }
2044 
2045 /* Reserve a single MSI-X vector for management (admin + aenq).
2046  * plus reserve one vector for each potential io queue.
2047  * the number of potential io queues is the minimum of what the device
2048  * supports and the number of vCPUs.
2049  */
2050 static int ena_enable_msix(struct ena_adapter *adapter)
2051 {
2052 	int msix_vecs, irq_cnt;
2053 
2054 	if (test_bit(ENA_FLAG_MSIX_ENABLED, &adapter->flags)) {
2055 		netif_err(adapter, probe, adapter->netdev,
2056 			  "Error, MSI-X is already enabled\n");
2057 		return -EPERM;
2058 	}
2059 
2060 	/* Reserved the max msix vectors we might need */
2061 	msix_vecs = ENA_MAX_MSIX_VEC(adapter->max_num_io_queues);
2062 	netif_dbg(adapter, probe, adapter->netdev,
2063 		  "Trying to enable MSI-X, vectors %d\n", msix_vecs);
2064 
2065 	irq_cnt = pci_alloc_irq_vectors(adapter->pdev, ENA_MIN_MSIX_VEC,
2066 					msix_vecs, PCI_IRQ_MSIX);
2067 
2068 	if (irq_cnt < 0) {
2069 		netif_err(adapter, probe, adapter->netdev,
2070 			  "Failed to enable MSI-X. irq_cnt %d\n", irq_cnt);
2071 		return -ENOSPC;
2072 	}
2073 
2074 	if (irq_cnt != msix_vecs) {
2075 		netif_notice(adapter, probe, adapter->netdev,
2076 			     "Enable only %d MSI-X (out of %d), reduce the number of queues\n",
2077 			     irq_cnt, msix_vecs);
2078 		adapter->num_io_queues = irq_cnt - ENA_ADMIN_MSIX_VEC;
2079 	}
2080 
2081 	if (ena_init_rx_cpu_rmap(adapter))
2082 		netif_warn(adapter, probe, adapter->netdev,
2083 			   "Failed to map IRQs to CPUs\n");
2084 
2085 	adapter->msix_vecs = irq_cnt;
2086 	set_bit(ENA_FLAG_MSIX_ENABLED, &adapter->flags);
2087 
2088 	return 0;
2089 }
2090 
2091 static void ena_setup_mgmnt_intr(struct ena_adapter *adapter)
2092 {
2093 	u32 cpu;
2094 
2095 	snprintf(adapter->irq_tbl[ENA_MGMNT_IRQ_IDX].name,
2096 		 ENA_IRQNAME_SIZE, "ena-mgmnt@pci:%s",
2097 		 pci_name(adapter->pdev));
2098 	adapter->irq_tbl[ENA_MGMNT_IRQ_IDX].handler =
2099 		ena_intr_msix_mgmnt;
2100 	adapter->irq_tbl[ENA_MGMNT_IRQ_IDX].data = adapter;
2101 	adapter->irq_tbl[ENA_MGMNT_IRQ_IDX].vector =
2102 		pci_irq_vector(adapter->pdev, ENA_MGMNT_IRQ_IDX);
2103 	cpu = cpumask_first(cpu_online_mask);
2104 	adapter->irq_tbl[ENA_MGMNT_IRQ_IDX].cpu = cpu;
2105 	cpumask_set_cpu(cpu,
2106 			&adapter->irq_tbl[ENA_MGMNT_IRQ_IDX].affinity_hint_mask);
2107 }
2108 
2109 static void ena_setup_io_intr(struct ena_adapter *adapter)
2110 {
2111 	struct net_device *netdev;
2112 	int irq_idx, i, cpu;
2113 	int io_queue_count;
2114 
2115 	netdev = adapter->netdev;
2116 	io_queue_count = adapter->num_io_queues + adapter->xdp_num_queues;
2117 
2118 	for (i = 0; i < io_queue_count; i++) {
2119 		irq_idx = ENA_IO_IRQ_IDX(i);
2120 		cpu = i % num_online_cpus();
2121 
2122 		snprintf(adapter->irq_tbl[irq_idx].name, ENA_IRQNAME_SIZE,
2123 			 "%s-Tx-Rx-%d", netdev->name, i);
2124 		adapter->irq_tbl[irq_idx].handler = ena_intr_msix_io;
2125 		adapter->irq_tbl[irq_idx].data = &adapter->ena_napi[i];
2126 		adapter->irq_tbl[irq_idx].vector =
2127 			pci_irq_vector(adapter->pdev, irq_idx);
2128 		adapter->irq_tbl[irq_idx].cpu = cpu;
2129 
2130 		cpumask_set_cpu(cpu,
2131 				&adapter->irq_tbl[irq_idx].affinity_hint_mask);
2132 	}
2133 }
2134 
2135 static int ena_request_mgmnt_irq(struct ena_adapter *adapter)
2136 {
2137 	unsigned long flags = 0;
2138 	struct ena_irq *irq;
2139 	int rc;
2140 
2141 	irq = &adapter->irq_tbl[ENA_MGMNT_IRQ_IDX];
2142 	rc = request_irq(irq->vector, irq->handler, flags, irq->name,
2143 			 irq->data);
2144 	if (rc) {
2145 		netif_err(adapter, probe, adapter->netdev,
2146 			  "Failed to request admin irq\n");
2147 		return rc;
2148 	}
2149 
2150 	netif_dbg(adapter, probe, adapter->netdev,
2151 		  "Set affinity hint of mgmnt irq.to 0x%lx (irq vector: %d)\n",
2152 		  irq->affinity_hint_mask.bits[0], irq->vector);
2153 
2154 	irq_set_affinity_hint(irq->vector, &irq->affinity_hint_mask);
2155 
2156 	return rc;
2157 }
2158 
2159 static int ena_request_io_irq(struct ena_adapter *adapter)
2160 {
2161 	u32 io_queue_count = adapter->num_io_queues + adapter->xdp_num_queues;
2162 	unsigned long flags = 0;
2163 	struct ena_irq *irq;
2164 	int rc = 0, i, k;
2165 
2166 	if (!test_bit(ENA_FLAG_MSIX_ENABLED, &adapter->flags)) {
2167 		netif_err(adapter, ifup, adapter->netdev,
2168 			  "Failed to request I/O IRQ: MSI-X is not enabled\n");
2169 		return -EINVAL;
2170 	}
2171 
2172 	for (i = ENA_IO_IRQ_FIRST_IDX; i < ENA_MAX_MSIX_VEC(io_queue_count); i++) {
2173 		irq = &adapter->irq_tbl[i];
2174 		rc = request_irq(irq->vector, irq->handler, flags, irq->name,
2175 				 irq->data);
2176 		if (rc) {
2177 			netif_err(adapter, ifup, adapter->netdev,
2178 				  "Failed to request I/O IRQ. index %d rc %d\n",
2179 				   i, rc);
2180 			goto err;
2181 		}
2182 
2183 		netif_dbg(adapter, ifup, adapter->netdev,
2184 			  "Set affinity hint of irq. index %d to 0x%lx (irq vector: %d)\n",
2185 			  i, irq->affinity_hint_mask.bits[0], irq->vector);
2186 
2187 		irq_set_affinity_hint(irq->vector, &irq->affinity_hint_mask);
2188 	}
2189 
2190 	return rc;
2191 
2192 err:
2193 	for (k = ENA_IO_IRQ_FIRST_IDX; k < i; k++) {
2194 		irq = &adapter->irq_tbl[k];
2195 		free_irq(irq->vector, irq->data);
2196 	}
2197 
2198 	return rc;
2199 }
2200 
2201 static void ena_free_mgmnt_irq(struct ena_adapter *adapter)
2202 {
2203 	struct ena_irq *irq;
2204 
2205 	irq = &adapter->irq_tbl[ENA_MGMNT_IRQ_IDX];
2206 	synchronize_irq(irq->vector);
2207 	irq_set_affinity_hint(irq->vector, NULL);
2208 	free_irq(irq->vector, irq->data);
2209 }
2210 
2211 static void ena_free_io_irq(struct ena_adapter *adapter)
2212 {
2213 	u32 io_queue_count = adapter->num_io_queues + adapter->xdp_num_queues;
2214 	struct ena_irq *irq;
2215 	int i;
2216 
2217 #ifdef CONFIG_RFS_ACCEL
2218 	if (adapter->msix_vecs >= 1) {
2219 		free_irq_cpu_rmap(adapter->netdev->rx_cpu_rmap);
2220 		adapter->netdev->rx_cpu_rmap = NULL;
2221 	}
2222 #endif /* CONFIG_RFS_ACCEL */
2223 
2224 	for (i = ENA_IO_IRQ_FIRST_IDX; i < ENA_MAX_MSIX_VEC(io_queue_count); i++) {
2225 		irq = &adapter->irq_tbl[i];
2226 		irq_set_affinity_hint(irq->vector, NULL);
2227 		free_irq(irq->vector, irq->data);
2228 	}
2229 }
2230 
2231 static void ena_disable_msix(struct ena_adapter *adapter)
2232 {
2233 	if (test_and_clear_bit(ENA_FLAG_MSIX_ENABLED, &adapter->flags))
2234 		pci_free_irq_vectors(adapter->pdev);
2235 }
2236 
2237 static void ena_disable_io_intr_sync(struct ena_adapter *adapter)
2238 {
2239 	u32 io_queue_count = adapter->num_io_queues + adapter->xdp_num_queues;
2240 	int i;
2241 
2242 	if (!netif_running(adapter->netdev))
2243 		return;
2244 
2245 	for (i = ENA_IO_IRQ_FIRST_IDX; i < ENA_MAX_MSIX_VEC(io_queue_count); i++)
2246 		synchronize_irq(adapter->irq_tbl[i].vector);
2247 }
2248 
2249 static void ena_del_napi_in_range(struct ena_adapter *adapter,
2250 				  int first_index,
2251 				  int count)
2252 {
2253 	int i;
2254 
2255 	for (i = first_index; i < first_index + count; i++) {
2256 		netif_napi_del(&adapter->ena_napi[i].napi);
2257 
2258 		WARN_ON(!ENA_IS_XDP_INDEX(adapter, i) &&
2259 			adapter->ena_napi[i].xdp_ring);
2260 	}
2261 }
2262 
2263 static void ena_init_napi_in_range(struct ena_adapter *adapter,
2264 				   int first_index, int count)
2265 {
2266 	int i;
2267 
2268 	for (i = first_index; i < first_index + count; i++) {
2269 		struct ena_napi *napi = &adapter->ena_napi[i];
2270 
2271 		netif_napi_add(adapter->netdev,
2272 			       &napi->napi,
2273 			       ENA_IS_XDP_INDEX(adapter, i) ? ena_xdp_io_poll : ena_io_poll,
2274 			       ENA_NAPI_BUDGET);
2275 
2276 		if (!ENA_IS_XDP_INDEX(adapter, i)) {
2277 			napi->rx_ring = &adapter->rx_ring[i];
2278 			napi->tx_ring = &adapter->tx_ring[i];
2279 		} else {
2280 			napi->xdp_ring = &adapter->tx_ring[i];
2281 		}
2282 		napi->qid = i;
2283 	}
2284 }
2285 
2286 static void ena_napi_disable_in_range(struct ena_adapter *adapter,
2287 				      int first_index,
2288 				      int count)
2289 {
2290 	int i;
2291 
2292 	for (i = first_index; i < first_index + count; i++)
2293 		napi_disable(&adapter->ena_napi[i].napi);
2294 }
2295 
2296 static void ena_napi_enable_in_range(struct ena_adapter *adapter,
2297 				     int first_index,
2298 				     int count)
2299 {
2300 	int i;
2301 
2302 	for (i = first_index; i < first_index + count; i++)
2303 		napi_enable(&adapter->ena_napi[i].napi);
2304 }
2305 
2306 /* Configure the Rx forwarding */
2307 static int ena_rss_configure(struct ena_adapter *adapter)
2308 {
2309 	struct ena_com_dev *ena_dev = adapter->ena_dev;
2310 	int rc;
2311 
2312 	/* In case the RSS table wasn't initialized by probe */
2313 	if (!ena_dev->rss.tbl_log_size) {
2314 		rc = ena_rss_init_default(adapter);
2315 		if (rc && (rc != -EOPNOTSUPP)) {
2316 			netif_err(adapter, ifup, adapter->netdev,
2317 				  "Failed to init RSS rc: %d\n", rc);
2318 			return rc;
2319 		}
2320 	}
2321 
2322 	/* Set indirect table */
2323 	rc = ena_com_indirect_table_set(ena_dev);
2324 	if (unlikely(rc && rc != -EOPNOTSUPP))
2325 		return rc;
2326 
2327 	/* Configure hash function (if supported) */
2328 	rc = ena_com_set_hash_function(ena_dev);
2329 	if (unlikely(rc && (rc != -EOPNOTSUPP)))
2330 		return rc;
2331 
2332 	/* Configure hash inputs (if supported) */
2333 	rc = ena_com_set_hash_ctrl(ena_dev);
2334 	if (unlikely(rc && (rc != -EOPNOTSUPP)))
2335 		return rc;
2336 
2337 	return 0;
2338 }
2339 
2340 static int ena_up_complete(struct ena_adapter *adapter)
2341 {
2342 	int rc;
2343 
2344 	rc = ena_rss_configure(adapter);
2345 	if (rc)
2346 		return rc;
2347 
2348 	ena_change_mtu(adapter->netdev, adapter->netdev->mtu);
2349 
2350 	ena_refill_all_rx_bufs(adapter);
2351 
2352 	/* enable transmits */
2353 	netif_tx_start_all_queues(adapter->netdev);
2354 
2355 	ena_napi_enable_in_range(adapter,
2356 				 0,
2357 				 adapter->xdp_num_queues + adapter->num_io_queues);
2358 
2359 	return 0;
2360 }
2361 
2362 static int ena_create_io_tx_queue(struct ena_adapter *adapter, int qid)
2363 {
2364 	struct ena_com_create_io_ctx ctx;
2365 	struct ena_com_dev *ena_dev;
2366 	struct ena_ring *tx_ring;
2367 	u32 msix_vector;
2368 	u16 ena_qid;
2369 	int rc;
2370 
2371 	ena_dev = adapter->ena_dev;
2372 
2373 	tx_ring = &adapter->tx_ring[qid];
2374 	msix_vector = ENA_IO_IRQ_IDX(qid);
2375 	ena_qid = ENA_IO_TXQ_IDX(qid);
2376 
2377 	memset(&ctx, 0x0, sizeof(ctx));
2378 
2379 	ctx.direction = ENA_COM_IO_QUEUE_DIRECTION_TX;
2380 	ctx.qid = ena_qid;
2381 	ctx.mem_queue_type = ena_dev->tx_mem_queue_type;
2382 	ctx.msix_vector = msix_vector;
2383 	ctx.queue_size = tx_ring->ring_size;
2384 	ctx.numa_node = cpu_to_node(tx_ring->cpu);
2385 
2386 	rc = ena_com_create_io_queue(ena_dev, &ctx);
2387 	if (rc) {
2388 		netif_err(adapter, ifup, adapter->netdev,
2389 			  "Failed to create I/O TX queue num %d rc: %d\n",
2390 			  qid, rc);
2391 		return rc;
2392 	}
2393 
2394 	rc = ena_com_get_io_handlers(ena_dev, ena_qid,
2395 				     &tx_ring->ena_com_io_sq,
2396 				     &tx_ring->ena_com_io_cq);
2397 	if (rc) {
2398 		netif_err(adapter, ifup, adapter->netdev,
2399 			  "Failed to get TX queue handlers. TX queue num %d rc: %d\n",
2400 			  qid, rc);
2401 		ena_com_destroy_io_queue(ena_dev, ena_qid);
2402 		return rc;
2403 	}
2404 
2405 	ena_com_update_numa_node(tx_ring->ena_com_io_cq, ctx.numa_node);
2406 	return rc;
2407 }
2408 
2409 static int ena_create_io_tx_queues_in_range(struct ena_adapter *adapter,
2410 					    int first_index, int count)
2411 {
2412 	struct ena_com_dev *ena_dev = adapter->ena_dev;
2413 	int rc, i;
2414 
2415 	for (i = first_index; i < first_index + count; i++) {
2416 		rc = ena_create_io_tx_queue(adapter, i);
2417 		if (rc)
2418 			goto create_err;
2419 	}
2420 
2421 	return 0;
2422 
2423 create_err:
2424 	while (i-- > first_index)
2425 		ena_com_destroy_io_queue(ena_dev, ENA_IO_TXQ_IDX(i));
2426 
2427 	return rc;
2428 }
2429 
2430 static int ena_create_io_rx_queue(struct ena_adapter *adapter, int qid)
2431 {
2432 	struct ena_com_dev *ena_dev;
2433 	struct ena_com_create_io_ctx ctx;
2434 	struct ena_ring *rx_ring;
2435 	u32 msix_vector;
2436 	u16 ena_qid;
2437 	int rc;
2438 
2439 	ena_dev = adapter->ena_dev;
2440 
2441 	rx_ring = &adapter->rx_ring[qid];
2442 	msix_vector = ENA_IO_IRQ_IDX(qid);
2443 	ena_qid = ENA_IO_RXQ_IDX(qid);
2444 
2445 	memset(&ctx, 0x0, sizeof(ctx));
2446 
2447 	ctx.qid = ena_qid;
2448 	ctx.direction = ENA_COM_IO_QUEUE_DIRECTION_RX;
2449 	ctx.mem_queue_type = ENA_ADMIN_PLACEMENT_POLICY_HOST;
2450 	ctx.msix_vector = msix_vector;
2451 	ctx.queue_size = rx_ring->ring_size;
2452 	ctx.numa_node = cpu_to_node(rx_ring->cpu);
2453 
2454 	rc = ena_com_create_io_queue(ena_dev, &ctx);
2455 	if (rc) {
2456 		netif_err(adapter, ifup, adapter->netdev,
2457 			  "Failed to create I/O RX queue num %d rc: %d\n",
2458 			  qid, rc);
2459 		return rc;
2460 	}
2461 
2462 	rc = ena_com_get_io_handlers(ena_dev, ena_qid,
2463 				     &rx_ring->ena_com_io_sq,
2464 				     &rx_ring->ena_com_io_cq);
2465 	if (rc) {
2466 		netif_err(adapter, ifup, adapter->netdev,
2467 			  "Failed to get RX queue handlers. RX queue num %d rc: %d\n",
2468 			  qid, rc);
2469 		goto err;
2470 	}
2471 
2472 	ena_com_update_numa_node(rx_ring->ena_com_io_cq, ctx.numa_node);
2473 
2474 	return rc;
2475 err:
2476 	ena_com_destroy_io_queue(ena_dev, ena_qid);
2477 	return rc;
2478 }
2479 
2480 static int ena_create_all_io_rx_queues(struct ena_adapter *adapter)
2481 {
2482 	struct ena_com_dev *ena_dev = adapter->ena_dev;
2483 	int rc, i;
2484 
2485 	for (i = 0; i < adapter->num_io_queues; i++) {
2486 		rc = ena_create_io_rx_queue(adapter, i);
2487 		if (rc)
2488 			goto create_err;
2489 		INIT_WORK(&adapter->ena_napi[i].dim.work, ena_dim_work);
2490 	}
2491 
2492 	return 0;
2493 
2494 create_err:
2495 	while (i--) {
2496 		cancel_work_sync(&adapter->ena_napi[i].dim.work);
2497 		ena_com_destroy_io_queue(ena_dev, ENA_IO_RXQ_IDX(i));
2498 	}
2499 
2500 	return rc;
2501 }
2502 
2503 static void set_io_rings_size(struct ena_adapter *adapter,
2504 			      int new_tx_size,
2505 			      int new_rx_size)
2506 {
2507 	int i;
2508 
2509 	for (i = 0; i < adapter->num_io_queues; i++) {
2510 		adapter->tx_ring[i].ring_size = new_tx_size;
2511 		adapter->rx_ring[i].ring_size = new_rx_size;
2512 	}
2513 }
2514 
2515 /* This function allows queue allocation to backoff when the system is
2516  * low on memory. If there is not enough memory to allocate io queues
2517  * the driver will try to allocate smaller queues.
2518  *
2519  * The backoff algorithm is as follows:
2520  *  1. Try to allocate TX and RX and if successful.
2521  *  1.1. return success
2522  *
2523  *  2. Divide by 2 the size of the larger of RX and TX queues (or both if their size is the same).
2524  *
2525  *  3. If TX or RX is smaller than 256
2526  *  3.1. return failure.
2527  *  4. else
2528  *  4.1. go back to 1.
2529  */
2530 static int create_queues_with_size_backoff(struct ena_adapter *adapter)
2531 {
2532 	int rc, cur_rx_ring_size, cur_tx_ring_size;
2533 	int new_rx_ring_size, new_tx_ring_size;
2534 
2535 	/* current queue sizes might be set to smaller than the requested
2536 	 * ones due to past queue allocation failures.
2537 	 */
2538 	set_io_rings_size(adapter, adapter->requested_tx_ring_size,
2539 			  adapter->requested_rx_ring_size);
2540 
2541 	while (1) {
2542 		if (ena_xdp_present(adapter)) {
2543 			rc = ena_setup_and_create_all_xdp_queues(adapter);
2544 
2545 			if (rc)
2546 				goto err_setup_tx;
2547 		}
2548 		rc = ena_setup_tx_resources_in_range(adapter,
2549 						     0,
2550 						     adapter->num_io_queues);
2551 		if (rc)
2552 			goto err_setup_tx;
2553 
2554 		rc = ena_create_io_tx_queues_in_range(adapter,
2555 						      0,
2556 						      adapter->num_io_queues);
2557 		if (rc)
2558 			goto err_create_tx_queues;
2559 
2560 		rc = ena_setup_all_rx_resources(adapter);
2561 		if (rc)
2562 			goto err_setup_rx;
2563 
2564 		rc = ena_create_all_io_rx_queues(adapter);
2565 		if (rc)
2566 			goto err_create_rx_queues;
2567 
2568 		return 0;
2569 
2570 err_create_rx_queues:
2571 		ena_free_all_io_rx_resources(adapter);
2572 err_setup_rx:
2573 		ena_destroy_all_tx_queues(adapter);
2574 err_create_tx_queues:
2575 		ena_free_all_io_tx_resources(adapter);
2576 err_setup_tx:
2577 		if (rc != -ENOMEM) {
2578 			netif_err(adapter, ifup, adapter->netdev,
2579 				  "Queue creation failed with error code %d\n",
2580 				  rc);
2581 			return rc;
2582 		}
2583 
2584 		cur_tx_ring_size = adapter->tx_ring[0].ring_size;
2585 		cur_rx_ring_size = adapter->rx_ring[0].ring_size;
2586 
2587 		netif_err(adapter, ifup, adapter->netdev,
2588 			  "Not enough memory to create queues with sizes TX=%d, RX=%d\n",
2589 			  cur_tx_ring_size, cur_rx_ring_size);
2590 
2591 		new_tx_ring_size = cur_tx_ring_size;
2592 		new_rx_ring_size = cur_rx_ring_size;
2593 
2594 		/* Decrease the size of the larger queue, or
2595 		 * decrease both if they are the same size.
2596 		 */
2597 		if (cur_rx_ring_size <= cur_tx_ring_size)
2598 			new_tx_ring_size = cur_tx_ring_size / 2;
2599 		if (cur_rx_ring_size >= cur_tx_ring_size)
2600 			new_rx_ring_size = cur_rx_ring_size / 2;
2601 
2602 		if (new_tx_ring_size < ENA_MIN_RING_SIZE ||
2603 		    new_rx_ring_size < ENA_MIN_RING_SIZE) {
2604 			netif_err(adapter, ifup, adapter->netdev,
2605 				  "Queue creation failed with the smallest possible queue size of %d for both queues. Not retrying with smaller queues\n",
2606 				  ENA_MIN_RING_SIZE);
2607 			return rc;
2608 		}
2609 
2610 		netif_err(adapter, ifup, adapter->netdev,
2611 			  "Retrying queue creation with sizes TX=%d, RX=%d\n",
2612 			  new_tx_ring_size,
2613 			  new_rx_ring_size);
2614 
2615 		set_io_rings_size(adapter, new_tx_ring_size,
2616 				  new_rx_ring_size);
2617 	}
2618 }
2619 
2620 static int ena_up(struct ena_adapter *adapter)
2621 {
2622 	int io_queue_count, rc, i;
2623 
2624 	netif_dbg(adapter, ifup, adapter->netdev, "%s\n", __func__);
2625 
2626 	io_queue_count = adapter->num_io_queues + adapter->xdp_num_queues;
2627 	ena_setup_io_intr(adapter);
2628 
2629 	/* napi poll functions should be initialized before running
2630 	 * request_irq(), to handle a rare condition where there is a pending
2631 	 * interrupt, causing the ISR to fire immediately while the poll
2632 	 * function wasn't set yet, causing a null dereference
2633 	 */
2634 	ena_init_napi_in_range(adapter, 0, io_queue_count);
2635 
2636 	rc = ena_request_io_irq(adapter);
2637 	if (rc)
2638 		goto err_req_irq;
2639 
2640 	rc = create_queues_with_size_backoff(adapter);
2641 	if (rc)
2642 		goto err_create_queues_with_backoff;
2643 
2644 	rc = ena_up_complete(adapter);
2645 	if (rc)
2646 		goto err_up;
2647 
2648 	if (test_bit(ENA_FLAG_LINK_UP, &adapter->flags))
2649 		netif_carrier_on(adapter->netdev);
2650 
2651 	ena_increase_stat(&adapter->dev_stats.interface_up, 1,
2652 			  &adapter->syncp);
2653 
2654 	set_bit(ENA_FLAG_DEV_UP, &adapter->flags);
2655 
2656 	/* Enable completion queues interrupt */
2657 	for (i = 0; i < adapter->num_io_queues; i++)
2658 		ena_unmask_interrupt(&adapter->tx_ring[i],
2659 				     &adapter->rx_ring[i]);
2660 
2661 	/* schedule napi in case we had pending packets
2662 	 * from the last time we disable napi
2663 	 */
2664 	for (i = 0; i < io_queue_count; i++)
2665 		napi_schedule(&adapter->ena_napi[i].napi);
2666 
2667 	return rc;
2668 
2669 err_up:
2670 	ena_destroy_all_tx_queues(adapter);
2671 	ena_free_all_io_tx_resources(adapter);
2672 	ena_destroy_all_rx_queues(adapter);
2673 	ena_free_all_io_rx_resources(adapter);
2674 err_create_queues_with_backoff:
2675 	ena_free_io_irq(adapter);
2676 err_req_irq:
2677 	ena_del_napi_in_range(adapter, 0, io_queue_count);
2678 
2679 	return rc;
2680 }
2681 
2682 static void ena_down(struct ena_adapter *adapter)
2683 {
2684 	int io_queue_count = adapter->num_io_queues + adapter->xdp_num_queues;
2685 
2686 	netif_info(adapter, ifdown, adapter->netdev, "%s\n", __func__);
2687 
2688 	clear_bit(ENA_FLAG_DEV_UP, &adapter->flags);
2689 
2690 	ena_increase_stat(&adapter->dev_stats.interface_down, 1,
2691 			  &adapter->syncp);
2692 
2693 	netif_carrier_off(adapter->netdev);
2694 	netif_tx_disable(adapter->netdev);
2695 
2696 	/* After this point the napi handler won't enable the tx queue */
2697 	ena_napi_disable_in_range(adapter, 0, io_queue_count);
2698 
2699 	/* After destroy the queue there won't be any new interrupts */
2700 
2701 	if (test_bit(ENA_FLAG_TRIGGER_RESET, &adapter->flags)) {
2702 		int rc;
2703 
2704 		rc = ena_com_dev_reset(adapter->ena_dev, adapter->reset_reason);
2705 		if (rc)
2706 			netif_err(adapter, ifdown, adapter->netdev,
2707 				  "Device reset failed\n");
2708 		/* stop submitting admin commands on a device that was reset */
2709 		ena_com_set_admin_running_state(adapter->ena_dev, false);
2710 	}
2711 
2712 	ena_destroy_all_io_queues(adapter);
2713 
2714 	ena_disable_io_intr_sync(adapter);
2715 	ena_free_io_irq(adapter);
2716 	ena_del_napi_in_range(adapter, 0, io_queue_count);
2717 
2718 	ena_free_all_tx_bufs(adapter);
2719 	ena_free_all_rx_bufs(adapter);
2720 	ena_free_all_io_tx_resources(adapter);
2721 	ena_free_all_io_rx_resources(adapter);
2722 }
2723 
2724 /* ena_open - Called when a network interface is made active
2725  * @netdev: network interface device structure
2726  *
2727  * Returns 0 on success, negative value on failure
2728  *
2729  * The open entry point is called when a network interface is made
2730  * active by the system (IFF_UP).  At this point all resources needed
2731  * for transmit and receive operations are allocated, the interrupt
2732  * handler is registered with the OS, the watchdog timer is started,
2733  * and the stack is notified that the interface is ready.
2734  */
2735 static int ena_open(struct net_device *netdev)
2736 {
2737 	struct ena_adapter *adapter = netdev_priv(netdev);
2738 	int rc;
2739 
2740 	/* Notify the stack of the actual queue counts. */
2741 	rc = netif_set_real_num_tx_queues(netdev, adapter->num_io_queues);
2742 	if (rc) {
2743 		netif_err(adapter, ifup, netdev, "Can't set num tx queues\n");
2744 		return rc;
2745 	}
2746 
2747 	rc = netif_set_real_num_rx_queues(netdev, adapter->num_io_queues);
2748 	if (rc) {
2749 		netif_err(adapter, ifup, netdev, "Can't set num rx queues\n");
2750 		return rc;
2751 	}
2752 
2753 	rc = ena_up(adapter);
2754 	if (rc)
2755 		return rc;
2756 
2757 	return rc;
2758 }
2759 
2760 /* ena_close - Disables a network interface
2761  * @netdev: network interface device structure
2762  *
2763  * Returns 0, this is not allowed to fail
2764  *
2765  * The close entry point is called when an interface is de-activated
2766  * by the OS.  The hardware is still under the drivers control, but
2767  * needs to be disabled.  A global MAC reset is issued to stop the
2768  * hardware, and all transmit and receive resources are freed.
2769  */
2770 static int ena_close(struct net_device *netdev)
2771 {
2772 	struct ena_adapter *adapter = netdev_priv(netdev);
2773 
2774 	netif_dbg(adapter, ifdown, netdev, "%s\n", __func__);
2775 
2776 	if (!test_bit(ENA_FLAG_DEVICE_RUNNING, &adapter->flags))
2777 		return 0;
2778 
2779 	if (test_bit(ENA_FLAG_DEV_UP, &adapter->flags))
2780 		ena_down(adapter);
2781 
2782 	/* Check for device status and issue reset if needed*/
2783 	check_for_admin_com_state(adapter);
2784 	if (unlikely(test_bit(ENA_FLAG_TRIGGER_RESET, &adapter->flags))) {
2785 		netif_err(adapter, ifdown, adapter->netdev,
2786 			  "Destroy failure, restarting device\n");
2787 		ena_dump_stats_to_dmesg(adapter);
2788 		/* rtnl lock already obtained in dev_ioctl() layer */
2789 		ena_destroy_device(adapter, false);
2790 		ena_restore_device(adapter);
2791 	}
2792 
2793 	return 0;
2794 }
2795 
2796 int ena_update_queue_sizes(struct ena_adapter *adapter,
2797 			   u32 new_tx_size,
2798 			   u32 new_rx_size)
2799 {
2800 	bool dev_was_up;
2801 
2802 	dev_was_up = test_bit(ENA_FLAG_DEV_UP, &adapter->flags);
2803 	ena_close(adapter->netdev);
2804 	adapter->requested_tx_ring_size = new_tx_size;
2805 	adapter->requested_rx_ring_size = new_rx_size;
2806 	ena_init_io_rings(adapter,
2807 			  0,
2808 			  adapter->xdp_num_queues +
2809 			  adapter->num_io_queues);
2810 	return dev_was_up ? ena_up(adapter) : 0;
2811 }
2812 
2813 int ena_update_queue_count(struct ena_adapter *adapter, u32 new_channel_count)
2814 {
2815 	struct ena_com_dev *ena_dev = adapter->ena_dev;
2816 	int prev_channel_count;
2817 	bool dev_was_up;
2818 
2819 	dev_was_up = test_bit(ENA_FLAG_DEV_UP, &adapter->flags);
2820 	ena_close(adapter->netdev);
2821 	prev_channel_count = adapter->num_io_queues;
2822 	adapter->num_io_queues = new_channel_count;
2823 	if (ena_xdp_present(adapter) &&
2824 	    ena_xdp_allowed(adapter) == ENA_XDP_ALLOWED) {
2825 		adapter->xdp_first_ring = new_channel_count;
2826 		adapter->xdp_num_queues = new_channel_count;
2827 		if (prev_channel_count > new_channel_count)
2828 			ena_xdp_exchange_program_rx_in_range(adapter,
2829 							     NULL,
2830 							     new_channel_count,
2831 							     prev_channel_count);
2832 		else
2833 			ena_xdp_exchange_program_rx_in_range(adapter,
2834 							     adapter->xdp_bpf_prog,
2835 							     prev_channel_count,
2836 							     new_channel_count);
2837 	}
2838 
2839 	/* We need to destroy the rss table so that the indirection
2840 	 * table will be reinitialized by ena_up()
2841 	 */
2842 	ena_com_rss_destroy(ena_dev);
2843 	ena_init_io_rings(adapter,
2844 			  0,
2845 			  adapter->xdp_num_queues +
2846 			  adapter->num_io_queues);
2847 	return dev_was_up ? ena_open(adapter->netdev) : 0;
2848 }
2849 
2850 static void ena_tx_csum(struct ena_com_tx_ctx *ena_tx_ctx,
2851 			struct sk_buff *skb,
2852 			bool disable_meta_caching)
2853 {
2854 	u32 mss = skb_shinfo(skb)->gso_size;
2855 	struct ena_com_tx_meta *ena_meta = &ena_tx_ctx->ena_meta;
2856 	u8 l4_protocol = 0;
2857 
2858 	if ((skb->ip_summed == CHECKSUM_PARTIAL) || mss) {
2859 		ena_tx_ctx->l4_csum_enable = 1;
2860 		if (mss) {
2861 			ena_tx_ctx->tso_enable = 1;
2862 			ena_meta->l4_hdr_len = tcp_hdr(skb)->doff;
2863 			ena_tx_ctx->l4_csum_partial = 0;
2864 		} else {
2865 			ena_tx_ctx->tso_enable = 0;
2866 			ena_meta->l4_hdr_len = 0;
2867 			ena_tx_ctx->l4_csum_partial = 1;
2868 		}
2869 
2870 		switch (ip_hdr(skb)->version) {
2871 		case IPVERSION:
2872 			ena_tx_ctx->l3_proto = ENA_ETH_IO_L3_PROTO_IPV4;
2873 			if (ip_hdr(skb)->frag_off & htons(IP_DF))
2874 				ena_tx_ctx->df = 1;
2875 			if (mss)
2876 				ena_tx_ctx->l3_csum_enable = 1;
2877 			l4_protocol = ip_hdr(skb)->protocol;
2878 			break;
2879 		case 6:
2880 			ena_tx_ctx->l3_proto = ENA_ETH_IO_L3_PROTO_IPV6;
2881 			l4_protocol = ipv6_hdr(skb)->nexthdr;
2882 			break;
2883 		default:
2884 			break;
2885 		}
2886 
2887 		if (l4_protocol == IPPROTO_TCP)
2888 			ena_tx_ctx->l4_proto = ENA_ETH_IO_L4_PROTO_TCP;
2889 		else
2890 			ena_tx_ctx->l4_proto = ENA_ETH_IO_L4_PROTO_UDP;
2891 
2892 		ena_meta->mss = mss;
2893 		ena_meta->l3_hdr_len = skb_network_header_len(skb);
2894 		ena_meta->l3_hdr_offset = skb_network_offset(skb);
2895 		ena_tx_ctx->meta_valid = 1;
2896 	} else if (disable_meta_caching) {
2897 		memset(ena_meta, 0, sizeof(*ena_meta));
2898 		ena_tx_ctx->meta_valid = 1;
2899 	} else {
2900 		ena_tx_ctx->meta_valid = 0;
2901 	}
2902 }
2903 
2904 static int ena_check_and_linearize_skb(struct ena_ring *tx_ring,
2905 				       struct sk_buff *skb)
2906 {
2907 	int num_frags, header_len, rc;
2908 
2909 	num_frags = skb_shinfo(skb)->nr_frags;
2910 	header_len = skb_headlen(skb);
2911 
2912 	if (num_frags < tx_ring->sgl_size)
2913 		return 0;
2914 
2915 	if ((num_frags == tx_ring->sgl_size) &&
2916 	    (header_len < tx_ring->tx_max_header_size))
2917 		return 0;
2918 
2919 	ena_increase_stat(&tx_ring->tx_stats.linearize, 1, &tx_ring->syncp);
2920 
2921 	rc = skb_linearize(skb);
2922 	if (unlikely(rc)) {
2923 		ena_increase_stat(&tx_ring->tx_stats.linearize_failed, 1,
2924 				  &tx_ring->syncp);
2925 	}
2926 
2927 	return rc;
2928 }
2929 
2930 static int ena_tx_map_skb(struct ena_ring *tx_ring,
2931 			  struct ena_tx_buffer *tx_info,
2932 			  struct sk_buff *skb,
2933 			  void **push_hdr,
2934 			  u16 *header_len)
2935 {
2936 	struct ena_adapter *adapter = tx_ring->adapter;
2937 	struct ena_com_buf *ena_buf;
2938 	dma_addr_t dma;
2939 	u32 skb_head_len, frag_len, last_frag;
2940 	u16 push_len = 0;
2941 	u16 delta = 0;
2942 	int i = 0;
2943 
2944 	skb_head_len = skb_headlen(skb);
2945 	tx_info->skb = skb;
2946 	ena_buf = tx_info->bufs;
2947 
2948 	if (tx_ring->tx_mem_queue_type == ENA_ADMIN_PLACEMENT_POLICY_DEV) {
2949 		/* When the device is LLQ mode, the driver will copy
2950 		 * the header into the device memory space.
2951 		 * the ena_com layer assume the header is in a linear
2952 		 * memory space.
2953 		 * This assumption might be wrong since part of the header
2954 		 * can be in the fragmented buffers.
2955 		 * Use skb_header_pointer to make sure the header is in a
2956 		 * linear memory space.
2957 		 */
2958 
2959 		push_len = min_t(u32, skb->len, tx_ring->tx_max_header_size);
2960 		*push_hdr = skb_header_pointer(skb, 0, push_len,
2961 					       tx_ring->push_buf_intermediate_buf);
2962 		*header_len = push_len;
2963 		if (unlikely(skb->data != *push_hdr)) {
2964 			ena_increase_stat(&tx_ring->tx_stats.llq_buffer_copy, 1,
2965 					  &tx_ring->syncp);
2966 
2967 			delta = push_len - skb_head_len;
2968 		}
2969 	} else {
2970 		*push_hdr = NULL;
2971 		*header_len = min_t(u32, skb_head_len,
2972 				    tx_ring->tx_max_header_size);
2973 	}
2974 
2975 	netif_dbg(adapter, tx_queued, adapter->netdev,
2976 		  "skb: %p header_buf->vaddr: %p push_len: %d\n", skb,
2977 		  *push_hdr, push_len);
2978 
2979 	if (skb_head_len > push_len) {
2980 		dma = dma_map_single(tx_ring->dev, skb->data + push_len,
2981 				     skb_head_len - push_len, DMA_TO_DEVICE);
2982 		if (unlikely(dma_mapping_error(tx_ring->dev, dma)))
2983 			goto error_report_dma_error;
2984 
2985 		ena_buf->paddr = dma;
2986 		ena_buf->len = skb_head_len - push_len;
2987 
2988 		ena_buf++;
2989 		tx_info->num_of_bufs++;
2990 		tx_info->map_linear_data = 1;
2991 	} else {
2992 		tx_info->map_linear_data = 0;
2993 	}
2994 
2995 	last_frag = skb_shinfo(skb)->nr_frags;
2996 
2997 	for (i = 0; i < last_frag; i++) {
2998 		const skb_frag_t *frag = &skb_shinfo(skb)->frags[i];
2999 
3000 		frag_len = skb_frag_size(frag);
3001 
3002 		if (unlikely(delta >= frag_len)) {
3003 			delta -= frag_len;
3004 			continue;
3005 		}
3006 
3007 		dma = skb_frag_dma_map(tx_ring->dev, frag, delta,
3008 				       frag_len - delta, DMA_TO_DEVICE);
3009 		if (unlikely(dma_mapping_error(tx_ring->dev, dma)))
3010 			goto error_report_dma_error;
3011 
3012 		ena_buf->paddr = dma;
3013 		ena_buf->len = frag_len - delta;
3014 		ena_buf++;
3015 		tx_info->num_of_bufs++;
3016 		delta = 0;
3017 	}
3018 
3019 	return 0;
3020 
3021 error_report_dma_error:
3022 	ena_increase_stat(&tx_ring->tx_stats.dma_mapping_err, 1,
3023 			  &tx_ring->syncp);
3024 	netif_warn(adapter, tx_queued, adapter->netdev, "Failed to map skb\n");
3025 
3026 	tx_info->skb = NULL;
3027 
3028 	tx_info->num_of_bufs += i;
3029 	ena_unmap_tx_buff(tx_ring, tx_info);
3030 
3031 	return -EINVAL;
3032 }
3033 
3034 /* Called with netif_tx_lock. */
3035 static netdev_tx_t ena_start_xmit(struct sk_buff *skb, struct net_device *dev)
3036 {
3037 	struct ena_adapter *adapter = netdev_priv(dev);
3038 	struct ena_tx_buffer *tx_info;
3039 	struct ena_com_tx_ctx ena_tx_ctx;
3040 	struct ena_ring *tx_ring;
3041 	struct netdev_queue *txq;
3042 	void *push_hdr;
3043 	u16 next_to_use, req_id, header_len;
3044 	int qid, rc;
3045 
3046 	netif_dbg(adapter, tx_queued, dev, "%s skb %p\n", __func__, skb);
3047 	/*  Determine which tx ring we will be placed on */
3048 	qid = skb_get_queue_mapping(skb);
3049 	tx_ring = &adapter->tx_ring[qid];
3050 	txq = netdev_get_tx_queue(dev, qid);
3051 
3052 	rc = ena_check_and_linearize_skb(tx_ring, skb);
3053 	if (unlikely(rc))
3054 		goto error_drop_packet;
3055 
3056 	skb_tx_timestamp(skb);
3057 
3058 	next_to_use = tx_ring->next_to_use;
3059 	req_id = tx_ring->free_ids[next_to_use];
3060 	tx_info = &tx_ring->tx_buffer_info[req_id];
3061 	tx_info->num_of_bufs = 0;
3062 
3063 	WARN(tx_info->skb, "SKB isn't NULL req_id %d\n", req_id);
3064 
3065 	rc = ena_tx_map_skb(tx_ring, tx_info, skb, &push_hdr, &header_len);
3066 	if (unlikely(rc))
3067 		goto error_drop_packet;
3068 
3069 	memset(&ena_tx_ctx, 0x0, sizeof(struct ena_com_tx_ctx));
3070 	ena_tx_ctx.ena_bufs = tx_info->bufs;
3071 	ena_tx_ctx.push_header = push_hdr;
3072 	ena_tx_ctx.num_bufs = tx_info->num_of_bufs;
3073 	ena_tx_ctx.req_id = req_id;
3074 	ena_tx_ctx.header_len = header_len;
3075 
3076 	/* set flags and meta data */
3077 	ena_tx_csum(&ena_tx_ctx, skb, tx_ring->disable_meta_caching);
3078 
3079 	rc = ena_xmit_common(dev,
3080 			     tx_ring,
3081 			     tx_info,
3082 			     &ena_tx_ctx,
3083 			     next_to_use,
3084 			     skb->len);
3085 	if (rc)
3086 		goto error_unmap_dma;
3087 
3088 	netdev_tx_sent_queue(txq, skb->len);
3089 
3090 	/* stop the queue when no more space available, the packet can have up
3091 	 * to sgl_size + 2. one for the meta descriptor and one for header
3092 	 * (if the header is larger than tx_max_header_size).
3093 	 */
3094 	if (unlikely(!ena_com_sq_have_enough_space(tx_ring->ena_com_io_sq,
3095 						   tx_ring->sgl_size + 2))) {
3096 		netif_dbg(adapter, tx_queued, dev, "%s stop queue %d\n",
3097 			  __func__, qid);
3098 
3099 		netif_tx_stop_queue(txq);
3100 		ena_increase_stat(&tx_ring->tx_stats.queue_stop, 1,
3101 				  &tx_ring->syncp);
3102 
3103 		/* There is a rare condition where this function decide to
3104 		 * stop the queue but meanwhile clean_tx_irq updates
3105 		 * next_to_completion and terminates.
3106 		 * The queue will remain stopped forever.
3107 		 * To solve this issue add a mb() to make sure that
3108 		 * netif_tx_stop_queue() write is vissible before checking if
3109 		 * there is additional space in the queue.
3110 		 */
3111 		smp_mb();
3112 
3113 		if (ena_com_sq_have_enough_space(tx_ring->ena_com_io_sq,
3114 						 ENA_TX_WAKEUP_THRESH)) {
3115 			netif_tx_wake_queue(txq);
3116 			ena_increase_stat(&tx_ring->tx_stats.queue_wakeup, 1,
3117 					  &tx_ring->syncp);
3118 		}
3119 	}
3120 
3121 	if (netif_xmit_stopped(txq) || !netdev_xmit_more())
3122 		/* trigger the dma engine. ena_ring_tx_doorbell()
3123 		 * calls a memory barrier inside it.
3124 		 */
3125 		ena_ring_tx_doorbell(tx_ring);
3126 
3127 	return NETDEV_TX_OK;
3128 
3129 error_unmap_dma:
3130 	ena_unmap_tx_buff(tx_ring, tx_info);
3131 	tx_info->skb = NULL;
3132 
3133 error_drop_packet:
3134 	dev_kfree_skb(skb);
3135 	return NETDEV_TX_OK;
3136 }
3137 
3138 static u16 ena_select_queue(struct net_device *dev, struct sk_buff *skb,
3139 			    struct net_device *sb_dev)
3140 {
3141 	u16 qid;
3142 	/* we suspect that this is good for in--kernel network services that
3143 	 * want to loop incoming skb rx to tx in normal user generated traffic,
3144 	 * most probably we will not get to this
3145 	 */
3146 	if (skb_rx_queue_recorded(skb))
3147 		qid = skb_get_rx_queue(skb);
3148 	else
3149 		qid = netdev_pick_tx(dev, skb, NULL);
3150 
3151 	return qid;
3152 }
3153 
3154 static void ena_config_host_info(struct ena_com_dev *ena_dev, struct pci_dev *pdev)
3155 {
3156 	struct device *dev = &pdev->dev;
3157 	struct ena_admin_host_info *host_info;
3158 	int rc;
3159 
3160 	/* Allocate only the host info */
3161 	rc = ena_com_allocate_host_info(ena_dev);
3162 	if (rc) {
3163 		dev_err(dev, "Cannot allocate host info\n");
3164 		return;
3165 	}
3166 
3167 	host_info = ena_dev->host_attr.host_info;
3168 
3169 	host_info->bdf = (pdev->bus->number << 8) | pdev->devfn;
3170 	host_info->os_type = ENA_ADMIN_OS_LINUX;
3171 	host_info->kernel_ver = LINUX_VERSION_CODE;
3172 	strlcpy(host_info->kernel_ver_str, utsname()->version,
3173 		sizeof(host_info->kernel_ver_str) - 1);
3174 	host_info->os_dist = 0;
3175 	strncpy(host_info->os_dist_str, utsname()->release,
3176 		sizeof(host_info->os_dist_str) - 1);
3177 	host_info->driver_version =
3178 		(DRV_MODULE_GEN_MAJOR) |
3179 		(DRV_MODULE_GEN_MINOR << ENA_ADMIN_HOST_INFO_MINOR_SHIFT) |
3180 		(DRV_MODULE_GEN_SUBMINOR << ENA_ADMIN_HOST_INFO_SUB_MINOR_SHIFT) |
3181 		("K"[0] << ENA_ADMIN_HOST_INFO_MODULE_TYPE_SHIFT);
3182 	host_info->num_cpus = num_online_cpus();
3183 
3184 	host_info->driver_supported_features =
3185 		ENA_ADMIN_HOST_INFO_RX_OFFSET_MASK |
3186 		ENA_ADMIN_HOST_INFO_INTERRUPT_MODERATION_MASK |
3187 		ENA_ADMIN_HOST_INFO_RX_BUF_MIRRORING_MASK |
3188 		ENA_ADMIN_HOST_INFO_RSS_CONFIGURABLE_FUNCTION_KEY_MASK;
3189 
3190 	rc = ena_com_set_host_attributes(ena_dev);
3191 	if (rc) {
3192 		if (rc == -EOPNOTSUPP)
3193 			dev_warn(dev, "Cannot set host attributes\n");
3194 		else
3195 			dev_err(dev, "Cannot set host attributes\n");
3196 
3197 		goto err;
3198 	}
3199 
3200 	return;
3201 
3202 err:
3203 	ena_com_delete_host_info(ena_dev);
3204 }
3205 
3206 static void ena_config_debug_area(struct ena_adapter *adapter)
3207 {
3208 	u32 debug_area_size;
3209 	int rc, ss_count;
3210 
3211 	ss_count = ena_get_sset_count(adapter->netdev, ETH_SS_STATS);
3212 	if (ss_count <= 0) {
3213 		netif_err(adapter, drv, adapter->netdev,
3214 			  "SS count is negative\n");
3215 		return;
3216 	}
3217 
3218 	/* allocate 32 bytes for each string and 64bit for the value */
3219 	debug_area_size = ss_count * ETH_GSTRING_LEN + sizeof(u64) * ss_count;
3220 
3221 	rc = ena_com_allocate_debug_area(adapter->ena_dev, debug_area_size);
3222 	if (rc) {
3223 		netif_err(adapter, drv, adapter->netdev,
3224 			  "Cannot allocate debug area\n");
3225 		return;
3226 	}
3227 
3228 	rc = ena_com_set_host_attributes(adapter->ena_dev);
3229 	if (rc) {
3230 		if (rc == -EOPNOTSUPP)
3231 			netif_warn(adapter, drv, adapter->netdev,
3232 				   "Cannot set host attributes\n");
3233 		else
3234 			netif_err(adapter, drv, adapter->netdev,
3235 				  "Cannot set host attributes\n");
3236 		goto err;
3237 	}
3238 
3239 	return;
3240 err:
3241 	ena_com_delete_debug_area(adapter->ena_dev);
3242 }
3243 
3244 int ena_update_hw_stats(struct ena_adapter *adapter)
3245 {
3246 	int rc = 0;
3247 
3248 	rc = ena_com_get_eni_stats(adapter->ena_dev, &adapter->eni_stats);
3249 	if (rc) {
3250 		dev_info_once(&adapter->pdev->dev, "Failed to get ENI stats\n");
3251 		return rc;
3252 	}
3253 
3254 	return 0;
3255 }
3256 
3257 static void ena_get_stats64(struct net_device *netdev,
3258 			    struct rtnl_link_stats64 *stats)
3259 {
3260 	struct ena_adapter *adapter = netdev_priv(netdev);
3261 	struct ena_ring *rx_ring, *tx_ring;
3262 	unsigned int start;
3263 	u64 rx_drops;
3264 	u64 tx_drops;
3265 	int i;
3266 
3267 	if (!test_bit(ENA_FLAG_DEV_UP, &adapter->flags))
3268 		return;
3269 
3270 	for (i = 0; i < adapter->num_io_queues; i++) {
3271 		u64 bytes, packets;
3272 
3273 		tx_ring = &adapter->tx_ring[i];
3274 
3275 		do {
3276 			start = u64_stats_fetch_begin_irq(&tx_ring->syncp);
3277 			packets = tx_ring->tx_stats.cnt;
3278 			bytes = tx_ring->tx_stats.bytes;
3279 		} while (u64_stats_fetch_retry_irq(&tx_ring->syncp, start));
3280 
3281 		stats->tx_packets += packets;
3282 		stats->tx_bytes += bytes;
3283 
3284 		rx_ring = &adapter->rx_ring[i];
3285 
3286 		do {
3287 			start = u64_stats_fetch_begin_irq(&rx_ring->syncp);
3288 			packets = rx_ring->rx_stats.cnt;
3289 			bytes = rx_ring->rx_stats.bytes;
3290 		} while (u64_stats_fetch_retry_irq(&rx_ring->syncp, start));
3291 
3292 		stats->rx_packets += packets;
3293 		stats->rx_bytes += bytes;
3294 	}
3295 
3296 	do {
3297 		start = u64_stats_fetch_begin_irq(&adapter->syncp);
3298 		rx_drops = adapter->dev_stats.rx_drops;
3299 		tx_drops = adapter->dev_stats.tx_drops;
3300 	} while (u64_stats_fetch_retry_irq(&adapter->syncp, start));
3301 
3302 	stats->rx_dropped = rx_drops;
3303 	stats->tx_dropped = tx_drops;
3304 
3305 	stats->multicast = 0;
3306 	stats->collisions = 0;
3307 
3308 	stats->rx_length_errors = 0;
3309 	stats->rx_crc_errors = 0;
3310 	stats->rx_frame_errors = 0;
3311 	stats->rx_fifo_errors = 0;
3312 	stats->rx_missed_errors = 0;
3313 	stats->tx_window_errors = 0;
3314 
3315 	stats->rx_errors = 0;
3316 	stats->tx_errors = 0;
3317 }
3318 
3319 static const struct net_device_ops ena_netdev_ops = {
3320 	.ndo_open		= ena_open,
3321 	.ndo_stop		= ena_close,
3322 	.ndo_start_xmit		= ena_start_xmit,
3323 	.ndo_select_queue	= ena_select_queue,
3324 	.ndo_get_stats64	= ena_get_stats64,
3325 	.ndo_tx_timeout		= ena_tx_timeout,
3326 	.ndo_change_mtu		= ena_change_mtu,
3327 	.ndo_set_mac_address	= NULL,
3328 	.ndo_validate_addr	= eth_validate_addr,
3329 	.ndo_bpf		= ena_xdp,
3330 	.ndo_xdp_xmit		= ena_xdp_xmit,
3331 };
3332 
3333 static int ena_device_validate_params(struct ena_adapter *adapter,
3334 				      struct ena_com_dev_get_features_ctx *get_feat_ctx)
3335 {
3336 	struct net_device *netdev = adapter->netdev;
3337 	int rc;
3338 
3339 	rc = ether_addr_equal(get_feat_ctx->dev_attr.mac_addr,
3340 			      adapter->mac_addr);
3341 	if (!rc) {
3342 		netif_err(adapter, drv, netdev,
3343 			  "Error, mac address are different\n");
3344 		return -EINVAL;
3345 	}
3346 
3347 	if (get_feat_ctx->dev_attr.max_mtu < netdev->mtu) {
3348 		netif_err(adapter, drv, netdev,
3349 			  "Error, device max mtu is smaller than netdev MTU\n");
3350 		return -EINVAL;
3351 	}
3352 
3353 	return 0;
3354 }
3355 
3356 static void set_default_llq_configurations(struct ena_llq_configurations *llq_config)
3357 {
3358 	llq_config->llq_header_location = ENA_ADMIN_INLINE_HEADER;
3359 	llq_config->llq_stride_ctrl = ENA_ADMIN_MULTIPLE_DESCS_PER_ENTRY;
3360 	llq_config->llq_num_decs_before_header = ENA_ADMIN_LLQ_NUM_DESCS_BEFORE_HEADER_2;
3361 	llq_config->llq_ring_entry_size = ENA_ADMIN_LIST_ENTRY_SIZE_128B;
3362 	llq_config->llq_ring_entry_size_value = 128;
3363 }
3364 
3365 static int ena_set_queues_placement_policy(struct pci_dev *pdev,
3366 					   struct ena_com_dev *ena_dev,
3367 					   struct ena_admin_feature_llq_desc *llq,
3368 					   struct ena_llq_configurations *llq_default_configurations)
3369 {
3370 	int rc;
3371 	u32 llq_feature_mask;
3372 
3373 	llq_feature_mask = 1 << ENA_ADMIN_LLQ;
3374 	if (!(ena_dev->supported_features & llq_feature_mask)) {
3375 		dev_warn(&pdev->dev,
3376 			"LLQ is not supported Fallback to host mode policy.\n");
3377 		ena_dev->tx_mem_queue_type = ENA_ADMIN_PLACEMENT_POLICY_HOST;
3378 		return 0;
3379 	}
3380 
3381 	rc = ena_com_config_dev_mode(ena_dev, llq, llq_default_configurations);
3382 	if (unlikely(rc)) {
3383 		dev_err(&pdev->dev,
3384 			"Failed to configure the device mode.  Fallback to host mode policy.\n");
3385 		ena_dev->tx_mem_queue_type = ENA_ADMIN_PLACEMENT_POLICY_HOST;
3386 	}
3387 
3388 	return 0;
3389 }
3390 
3391 static int ena_map_llq_mem_bar(struct pci_dev *pdev, struct ena_com_dev *ena_dev,
3392 			       int bars)
3393 {
3394 	bool has_mem_bar = !!(bars & BIT(ENA_MEM_BAR));
3395 
3396 	if (!has_mem_bar) {
3397 		if (ena_dev->tx_mem_queue_type == ENA_ADMIN_PLACEMENT_POLICY_DEV) {
3398 			dev_err(&pdev->dev,
3399 				"ENA device does not expose LLQ bar. Fallback to host mode policy.\n");
3400 			ena_dev->tx_mem_queue_type = ENA_ADMIN_PLACEMENT_POLICY_HOST;
3401 		}
3402 
3403 		return 0;
3404 	}
3405 
3406 	ena_dev->mem_bar = devm_ioremap_wc(&pdev->dev,
3407 					   pci_resource_start(pdev, ENA_MEM_BAR),
3408 					   pci_resource_len(pdev, ENA_MEM_BAR));
3409 
3410 	if (!ena_dev->mem_bar)
3411 		return -EFAULT;
3412 
3413 	return 0;
3414 }
3415 
3416 static int ena_device_init(struct ena_com_dev *ena_dev, struct pci_dev *pdev,
3417 			   struct ena_com_dev_get_features_ctx *get_feat_ctx,
3418 			   bool *wd_state)
3419 {
3420 	struct ena_llq_configurations llq_config;
3421 	struct device *dev = &pdev->dev;
3422 	bool readless_supported;
3423 	u32 aenq_groups;
3424 	int dma_width;
3425 	int rc;
3426 
3427 	rc = ena_com_mmio_reg_read_request_init(ena_dev);
3428 	if (rc) {
3429 		dev_err(dev, "Failed to init mmio read less\n");
3430 		return rc;
3431 	}
3432 
3433 	/* The PCIe configuration space revision id indicate if mmio reg
3434 	 * read is disabled
3435 	 */
3436 	readless_supported = !(pdev->revision & ENA_MMIO_DISABLE_REG_READ);
3437 	ena_com_set_mmio_read_mode(ena_dev, readless_supported);
3438 
3439 	rc = ena_com_dev_reset(ena_dev, ENA_REGS_RESET_NORMAL);
3440 	if (rc) {
3441 		dev_err(dev, "Can not reset device\n");
3442 		goto err_mmio_read_less;
3443 	}
3444 
3445 	rc = ena_com_validate_version(ena_dev);
3446 	if (rc) {
3447 		dev_err(dev, "Device version is too low\n");
3448 		goto err_mmio_read_less;
3449 	}
3450 
3451 	dma_width = ena_com_get_dma_width(ena_dev);
3452 	if (dma_width < 0) {
3453 		dev_err(dev, "Invalid dma width value %d", dma_width);
3454 		rc = dma_width;
3455 		goto err_mmio_read_less;
3456 	}
3457 
3458 	rc = dma_set_mask_and_coherent(dev, DMA_BIT_MASK(dma_width));
3459 	if (rc) {
3460 		dev_err(dev, "dma_set_mask_and_coherent failed %d\n", rc);
3461 		goto err_mmio_read_less;
3462 	}
3463 
3464 	/* ENA admin level init */
3465 	rc = ena_com_admin_init(ena_dev, &aenq_handlers);
3466 	if (rc) {
3467 		dev_err(dev,
3468 			"Can not initialize ena admin queue with device\n");
3469 		goto err_mmio_read_less;
3470 	}
3471 
3472 	/* To enable the msix interrupts the driver needs to know the number
3473 	 * of queues. So the driver uses polling mode to retrieve this
3474 	 * information
3475 	 */
3476 	ena_com_set_admin_polling_mode(ena_dev, true);
3477 
3478 	ena_config_host_info(ena_dev, pdev);
3479 
3480 	/* Get Device Attributes*/
3481 	rc = ena_com_get_dev_attr_feat(ena_dev, get_feat_ctx);
3482 	if (rc) {
3483 		dev_err(dev, "Cannot get attribute for ena device rc=%d\n", rc);
3484 		goto err_admin_init;
3485 	}
3486 
3487 	/* Try to turn all the available aenq groups */
3488 	aenq_groups = BIT(ENA_ADMIN_LINK_CHANGE) |
3489 		BIT(ENA_ADMIN_FATAL_ERROR) |
3490 		BIT(ENA_ADMIN_WARNING) |
3491 		BIT(ENA_ADMIN_NOTIFICATION) |
3492 		BIT(ENA_ADMIN_KEEP_ALIVE);
3493 
3494 	aenq_groups &= get_feat_ctx->aenq.supported_groups;
3495 
3496 	rc = ena_com_set_aenq_config(ena_dev, aenq_groups);
3497 	if (rc) {
3498 		dev_err(dev, "Cannot configure aenq groups rc= %d\n", rc);
3499 		goto err_admin_init;
3500 	}
3501 
3502 	*wd_state = !!(aenq_groups & BIT(ENA_ADMIN_KEEP_ALIVE));
3503 
3504 	set_default_llq_configurations(&llq_config);
3505 
3506 	rc = ena_set_queues_placement_policy(pdev, ena_dev, &get_feat_ctx->llq,
3507 					     &llq_config);
3508 	if (rc) {
3509 		dev_err(dev, "ENA device init failed\n");
3510 		goto err_admin_init;
3511 	}
3512 
3513 	return 0;
3514 
3515 err_admin_init:
3516 	ena_com_delete_host_info(ena_dev);
3517 	ena_com_admin_destroy(ena_dev);
3518 err_mmio_read_less:
3519 	ena_com_mmio_reg_read_request_destroy(ena_dev);
3520 
3521 	return rc;
3522 }
3523 
3524 static int ena_enable_msix_and_set_admin_interrupts(struct ena_adapter *adapter)
3525 {
3526 	struct ena_com_dev *ena_dev = adapter->ena_dev;
3527 	struct device *dev = &adapter->pdev->dev;
3528 	int rc;
3529 
3530 	rc = ena_enable_msix(adapter);
3531 	if (rc) {
3532 		dev_err(dev, "Can not reserve msix vectors\n");
3533 		return rc;
3534 	}
3535 
3536 	ena_setup_mgmnt_intr(adapter);
3537 
3538 	rc = ena_request_mgmnt_irq(adapter);
3539 	if (rc) {
3540 		dev_err(dev, "Can not setup management interrupts\n");
3541 		goto err_disable_msix;
3542 	}
3543 
3544 	ena_com_set_admin_polling_mode(ena_dev, false);
3545 
3546 	ena_com_admin_aenq_enable(ena_dev);
3547 
3548 	return 0;
3549 
3550 err_disable_msix:
3551 	ena_disable_msix(adapter);
3552 
3553 	return rc;
3554 }
3555 
3556 static void ena_destroy_device(struct ena_adapter *adapter, bool graceful)
3557 {
3558 	struct net_device *netdev = adapter->netdev;
3559 	struct ena_com_dev *ena_dev = adapter->ena_dev;
3560 	bool dev_up;
3561 
3562 	if (!test_bit(ENA_FLAG_DEVICE_RUNNING, &adapter->flags))
3563 		return;
3564 
3565 	netif_carrier_off(netdev);
3566 
3567 	del_timer_sync(&adapter->timer_service);
3568 
3569 	dev_up = test_bit(ENA_FLAG_DEV_UP, &adapter->flags);
3570 	adapter->dev_up_before_reset = dev_up;
3571 	if (!graceful)
3572 		ena_com_set_admin_running_state(ena_dev, false);
3573 
3574 	if (test_bit(ENA_FLAG_DEV_UP, &adapter->flags))
3575 		ena_down(adapter);
3576 
3577 	/* Stop the device from sending AENQ events (in case reset flag is set
3578 	 *  and device is up, ena_down() already reset the device.
3579 	 */
3580 	if (!(test_bit(ENA_FLAG_TRIGGER_RESET, &adapter->flags) && dev_up))
3581 		ena_com_dev_reset(adapter->ena_dev, adapter->reset_reason);
3582 
3583 	ena_free_mgmnt_irq(adapter);
3584 
3585 	ena_disable_msix(adapter);
3586 
3587 	ena_com_abort_admin_commands(ena_dev);
3588 
3589 	ena_com_wait_for_abort_completion(ena_dev);
3590 
3591 	ena_com_admin_destroy(ena_dev);
3592 
3593 	ena_com_mmio_reg_read_request_destroy(ena_dev);
3594 
3595 	/* return reset reason to default value */
3596 	adapter->reset_reason = ENA_REGS_RESET_NORMAL;
3597 
3598 	clear_bit(ENA_FLAG_TRIGGER_RESET, &adapter->flags);
3599 	clear_bit(ENA_FLAG_DEVICE_RUNNING, &adapter->flags);
3600 }
3601 
3602 static int ena_restore_device(struct ena_adapter *adapter)
3603 {
3604 	struct ena_com_dev_get_features_ctx get_feat_ctx;
3605 	struct ena_com_dev *ena_dev = adapter->ena_dev;
3606 	struct pci_dev *pdev = adapter->pdev;
3607 	bool wd_state;
3608 	int rc;
3609 
3610 	set_bit(ENA_FLAG_ONGOING_RESET, &adapter->flags);
3611 	rc = ena_device_init(ena_dev, adapter->pdev, &get_feat_ctx, &wd_state);
3612 	if (rc) {
3613 		dev_err(&pdev->dev, "Can not initialize device\n");
3614 		goto err;
3615 	}
3616 	adapter->wd_state = wd_state;
3617 
3618 	rc = ena_device_validate_params(adapter, &get_feat_ctx);
3619 	if (rc) {
3620 		dev_err(&pdev->dev, "Validation of device parameters failed\n");
3621 		goto err_device_destroy;
3622 	}
3623 
3624 	rc = ena_enable_msix_and_set_admin_interrupts(adapter);
3625 	if (rc) {
3626 		dev_err(&pdev->dev, "Enable MSI-X failed\n");
3627 		goto err_device_destroy;
3628 	}
3629 	/* If the interface was up before the reset bring it up */
3630 	if (adapter->dev_up_before_reset) {
3631 		rc = ena_up(adapter);
3632 		if (rc) {
3633 			dev_err(&pdev->dev, "Failed to create I/O queues\n");
3634 			goto err_disable_msix;
3635 		}
3636 	}
3637 
3638 	set_bit(ENA_FLAG_DEVICE_RUNNING, &adapter->flags);
3639 
3640 	clear_bit(ENA_FLAG_ONGOING_RESET, &adapter->flags);
3641 	if (test_bit(ENA_FLAG_LINK_UP, &adapter->flags))
3642 		netif_carrier_on(adapter->netdev);
3643 
3644 	mod_timer(&adapter->timer_service, round_jiffies(jiffies + HZ));
3645 	adapter->last_keep_alive_jiffies = jiffies;
3646 
3647 	dev_err(&pdev->dev, "Device reset completed successfully\n");
3648 
3649 	return rc;
3650 err_disable_msix:
3651 	ena_free_mgmnt_irq(adapter);
3652 	ena_disable_msix(adapter);
3653 err_device_destroy:
3654 	ena_com_abort_admin_commands(ena_dev);
3655 	ena_com_wait_for_abort_completion(ena_dev);
3656 	ena_com_admin_destroy(ena_dev);
3657 	ena_com_dev_reset(ena_dev, ENA_REGS_RESET_DRIVER_INVALID_STATE);
3658 	ena_com_mmio_reg_read_request_destroy(ena_dev);
3659 err:
3660 	clear_bit(ENA_FLAG_DEVICE_RUNNING, &adapter->flags);
3661 	clear_bit(ENA_FLAG_ONGOING_RESET, &adapter->flags);
3662 	dev_err(&pdev->dev,
3663 		"Reset attempt failed. Can not reset the device\n");
3664 
3665 	return rc;
3666 }
3667 
3668 static void ena_fw_reset_device(struct work_struct *work)
3669 {
3670 	struct ena_adapter *adapter =
3671 		container_of(work, struct ena_adapter, reset_task);
3672 
3673 	rtnl_lock();
3674 
3675 	if (likely(test_bit(ENA_FLAG_TRIGGER_RESET, &adapter->flags))) {
3676 		ena_destroy_device(adapter, false);
3677 		ena_restore_device(adapter);
3678 	}
3679 
3680 	rtnl_unlock();
3681 }
3682 
3683 static int check_for_rx_interrupt_queue(struct ena_adapter *adapter,
3684 					struct ena_ring *rx_ring)
3685 {
3686 	struct ena_napi *ena_napi = container_of(rx_ring->napi, struct ena_napi, napi);
3687 
3688 	if (likely(READ_ONCE(ena_napi->first_interrupt)))
3689 		return 0;
3690 
3691 	if (ena_com_cq_empty(rx_ring->ena_com_io_cq))
3692 		return 0;
3693 
3694 	rx_ring->no_interrupt_event_cnt++;
3695 
3696 	if (rx_ring->no_interrupt_event_cnt == ENA_MAX_NO_INTERRUPT_ITERATIONS) {
3697 		netif_err(adapter, rx_err, adapter->netdev,
3698 			  "Potential MSIX issue on Rx side Queue = %d. Reset the device\n",
3699 			  rx_ring->qid);
3700 		adapter->reset_reason = ENA_REGS_RESET_MISS_INTERRUPT;
3701 		smp_mb__before_atomic();
3702 		set_bit(ENA_FLAG_TRIGGER_RESET, &adapter->flags);
3703 		return -EIO;
3704 	}
3705 
3706 	return 0;
3707 }
3708 
3709 static int check_missing_comp_in_tx_queue(struct ena_adapter *adapter,
3710 					  struct ena_ring *tx_ring)
3711 {
3712 	struct ena_napi *ena_napi = container_of(tx_ring->napi, struct ena_napi, napi);
3713 	unsigned int time_since_last_napi;
3714 	unsigned int missing_tx_comp_to;
3715 	bool is_tx_comp_time_expired;
3716 	struct ena_tx_buffer *tx_buf;
3717 	unsigned long last_jiffies;
3718 	u32 missed_tx = 0;
3719 	int i, rc = 0;
3720 
3721 	for (i = 0; i < tx_ring->ring_size; i++) {
3722 		tx_buf = &tx_ring->tx_buffer_info[i];
3723 		last_jiffies = tx_buf->last_jiffies;
3724 
3725 		if (last_jiffies == 0)
3726 			/* no pending Tx at this location */
3727 			continue;
3728 
3729 		is_tx_comp_time_expired = time_is_before_jiffies(last_jiffies +
3730 			 2 * adapter->missing_tx_completion_to);
3731 
3732 		if (unlikely(!READ_ONCE(ena_napi->first_interrupt) && is_tx_comp_time_expired)) {
3733 			/* If after graceful period interrupt is still not
3734 			 * received, we schedule a reset
3735 			 */
3736 			netif_err(adapter, tx_err, adapter->netdev,
3737 				  "Potential MSIX issue on Tx side Queue = %d. Reset the device\n",
3738 				  tx_ring->qid);
3739 			adapter->reset_reason = ENA_REGS_RESET_MISS_INTERRUPT;
3740 			smp_mb__before_atomic();
3741 			set_bit(ENA_FLAG_TRIGGER_RESET, &adapter->flags);
3742 			return -EIO;
3743 		}
3744 
3745 		is_tx_comp_time_expired = time_is_before_jiffies(last_jiffies +
3746 			adapter->missing_tx_completion_to);
3747 
3748 		if (unlikely(is_tx_comp_time_expired)) {
3749 			if (!tx_buf->print_once) {
3750 				time_since_last_napi = jiffies_to_usecs(jiffies - tx_ring->tx_stats.last_napi_jiffies);
3751 				missing_tx_comp_to = jiffies_to_msecs(adapter->missing_tx_completion_to);
3752 				netif_notice(adapter, tx_err, adapter->netdev,
3753 					     "Found a Tx that wasn't completed on time, qid %d, index %d. %u usecs have passed since last napi execution. Missing Tx timeout value %u msecs\n",
3754 					     tx_ring->qid, i, time_since_last_napi, missing_tx_comp_to);
3755 			}
3756 
3757 			tx_buf->print_once = 1;
3758 			missed_tx++;
3759 		}
3760 	}
3761 
3762 	if (unlikely(missed_tx > adapter->missing_tx_completion_threshold)) {
3763 		netif_err(adapter, tx_err, adapter->netdev,
3764 			  "The number of lost tx completions is above the threshold (%d > %d). Reset the device\n",
3765 			  missed_tx,
3766 			  adapter->missing_tx_completion_threshold);
3767 		adapter->reset_reason =
3768 			ENA_REGS_RESET_MISS_TX_CMPL;
3769 		set_bit(ENA_FLAG_TRIGGER_RESET, &adapter->flags);
3770 		rc = -EIO;
3771 	}
3772 
3773 	ena_increase_stat(&tx_ring->tx_stats.missed_tx, missed_tx,
3774 			  &tx_ring->syncp);
3775 
3776 	return rc;
3777 }
3778 
3779 static void check_for_missing_completions(struct ena_adapter *adapter)
3780 {
3781 	struct ena_ring *tx_ring;
3782 	struct ena_ring *rx_ring;
3783 	int i, budget, rc;
3784 	int io_queue_count;
3785 
3786 	io_queue_count = adapter->xdp_num_queues + adapter->num_io_queues;
3787 	/* Make sure the driver doesn't turn the device in other process */
3788 	smp_rmb();
3789 
3790 	if (!test_bit(ENA_FLAG_DEV_UP, &adapter->flags))
3791 		return;
3792 
3793 	if (test_bit(ENA_FLAG_TRIGGER_RESET, &adapter->flags))
3794 		return;
3795 
3796 	if (adapter->missing_tx_completion_to == ENA_HW_HINTS_NO_TIMEOUT)
3797 		return;
3798 
3799 	budget = ENA_MONITORED_TX_QUEUES;
3800 
3801 	for (i = adapter->last_monitored_tx_qid; i < io_queue_count; i++) {
3802 		tx_ring = &adapter->tx_ring[i];
3803 		rx_ring = &adapter->rx_ring[i];
3804 
3805 		rc = check_missing_comp_in_tx_queue(adapter, tx_ring);
3806 		if (unlikely(rc))
3807 			return;
3808 
3809 		rc =  !ENA_IS_XDP_INDEX(adapter, i) ?
3810 			check_for_rx_interrupt_queue(adapter, rx_ring) : 0;
3811 		if (unlikely(rc))
3812 			return;
3813 
3814 		budget--;
3815 		if (!budget)
3816 			break;
3817 	}
3818 
3819 	adapter->last_monitored_tx_qid = i % io_queue_count;
3820 }
3821 
3822 /* trigger napi schedule after 2 consecutive detections */
3823 #define EMPTY_RX_REFILL 2
3824 /* For the rare case where the device runs out of Rx descriptors and the
3825  * napi handler failed to refill new Rx descriptors (due to a lack of memory
3826  * for example).
3827  * This case will lead to a deadlock:
3828  * The device won't send interrupts since all the new Rx packets will be dropped
3829  * The napi handler won't allocate new Rx descriptors so the device will be
3830  * able to send new packets.
3831  *
3832  * This scenario can happen when the kernel's vm.min_free_kbytes is too small.
3833  * It is recommended to have at least 512MB, with a minimum of 128MB for
3834  * constrained environment).
3835  *
3836  * When such a situation is detected - Reschedule napi
3837  */
3838 static void check_for_empty_rx_ring(struct ena_adapter *adapter)
3839 {
3840 	struct ena_ring *rx_ring;
3841 	int i, refill_required;
3842 
3843 	if (!test_bit(ENA_FLAG_DEV_UP, &adapter->flags))
3844 		return;
3845 
3846 	if (test_bit(ENA_FLAG_TRIGGER_RESET, &adapter->flags))
3847 		return;
3848 
3849 	for (i = 0; i < adapter->num_io_queues; i++) {
3850 		rx_ring = &adapter->rx_ring[i];
3851 
3852 		refill_required = ena_com_free_q_entries(rx_ring->ena_com_io_sq);
3853 		if (unlikely(refill_required == (rx_ring->ring_size - 1))) {
3854 			rx_ring->empty_rx_queue++;
3855 
3856 			if (rx_ring->empty_rx_queue >= EMPTY_RX_REFILL) {
3857 				ena_increase_stat(&rx_ring->rx_stats.empty_rx_ring, 1,
3858 						  &rx_ring->syncp);
3859 
3860 				netif_err(adapter, drv, adapter->netdev,
3861 					  "Trigger refill for ring %d\n", i);
3862 
3863 				napi_schedule(rx_ring->napi);
3864 				rx_ring->empty_rx_queue = 0;
3865 			}
3866 		} else {
3867 			rx_ring->empty_rx_queue = 0;
3868 		}
3869 	}
3870 }
3871 
3872 /* Check for keep alive expiration */
3873 static void check_for_missing_keep_alive(struct ena_adapter *adapter)
3874 {
3875 	unsigned long keep_alive_expired;
3876 
3877 	if (!adapter->wd_state)
3878 		return;
3879 
3880 	if (adapter->keep_alive_timeout == ENA_HW_HINTS_NO_TIMEOUT)
3881 		return;
3882 
3883 	keep_alive_expired = adapter->last_keep_alive_jiffies +
3884 			     adapter->keep_alive_timeout;
3885 	if (unlikely(time_is_before_jiffies(keep_alive_expired))) {
3886 		netif_err(adapter, drv, adapter->netdev,
3887 			  "Keep alive watchdog timeout.\n");
3888 		ena_increase_stat(&adapter->dev_stats.wd_expired, 1,
3889 				  &adapter->syncp);
3890 		adapter->reset_reason = ENA_REGS_RESET_KEEP_ALIVE_TO;
3891 		set_bit(ENA_FLAG_TRIGGER_RESET, &adapter->flags);
3892 	}
3893 }
3894 
3895 static void check_for_admin_com_state(struct ena_adapter *adapter)
3896 {
3897 	if (unlikely(!ena_com_get_admin_running_state(adapter->ena_dev))) {
3898 		netif_err(adapter, drv, adapter->netdev,
3899 			  "ENA admin queue is not in running state!\n");
3900 		ena_increase_stat(&adapter->dev_stats.admin_q_pause, 1,
3901 				  &adapter->syncp);
3902 		adapter->reset_reason = ENA_REGS_RESET_ADMIN_TO;
3903 		set_bit(ENA_FLAG_TRIGGER_RESET, &adapter->flags);
3904 	}
3905 }
3906 
3907 static void ena_update_hints(struct ena_adapter *adapter,
3908 			     struct ena_admin_ena_hw_hints *hints)
3909 {
3910 	struct net_device *netdev = adapter->netdev;
3911 
3912 	if (hints->admin_completion_tx_timeout)
3913 		adapter->ena_dev->admin_queue.completion_timeout =
3914 			hints->admin_completion_tx_timeout * 1000;
3915 
3916 	if (hints->mmio_read_timeout)
3917 		/* convert to usec */
3918 		adapter->ena_dev->mmio_read.reg_read_to =
3919 			hints->mmio_read_timeout * 1000;
3920 
3921 	if (hints->missed_tx_completion_count_threshold_to_reset)
3922 		adapter->missing_tx_completion_threshold =
3923 			hints->missed_tx_completion_count_threshold_to_reset;
3924 
3925 	if (hints->missing_tx_completion_timeout) {
3926 		if (hints->missing_tx_completion_timeout == ENA_HW_HINTS_NO_TIMEOUT)
3927 			adapter->missing_tx_completion_to = ENA_HW_HINTS_NO_TIMEOUT;
3928 		else
3929 			adapter->missing_tx_completion_to =
3930 				msecs_to_jiffies(hints->missing_tx_completion_timeout);
3931 	}
3932 
3933 	if (hints->netdev_wd_timeout)
3934 		netdev->watchdog_timeo = msecs_to_jiffies(hints->netdev_wd_timeout);
3935 
3936 	if (hints->driver_watchdog_timeout) {
3937 		if (hints->driver_watchdog_timeout == ENA_HW_HINTS_NO_TIMEOUT)
3938 			adapter->keep_alive_timeout = ENA_HW_HINTS_NO_TIMEOUT;
3939 		else
3940 			adapter->keep_alive_timeout =
3941 				msecs_to_jiffies(hints->driver_watchdog_timeout);
3942 	}
3943 }
3944 
3945 static void ena_update_host_info(struct ena_admin_host_info *host_info,
3946 				 struct net_device *netdev)
3947 {
3948 	host_info->supported_network_features[0] =
3949 		netdev->features & GENMASK_ULL(31, 0);
3950 	host_info->supported_network_features[1] =
3951 		(netdev->features & GENMASK_ULL(63, 32)) >> 32;
3952 }
3953 
3954 static void ena_timer_service(struct timer_list *t)
3955 {
3956 	struct ena_adapter *adapter = from_timer(adapter, t, timer_service);
3957 	u8 *debug_area = adapter->ena_dev->host_attr.debug_area_virt_addr;
3958 	struct ena_admin_host_info *host_info =
3959 		adapter->ena_dev->host_attr.host_info;
3960 
3961 	check_for_missing_keep_alive(adapter);
3962 
3963 	check_for_admin_com_state(adapter);
3964 
3965 	check_for_missing_completions(adapter);
3966 
3967 	check_for_empty_rx_ring(adapter);
3968 
3969 	if (debug_area)
3970 		ena_dump_stats_to_buf(adapter, debug_area);
3971 
3972 	if (host_info)
3973 		ena_update_host_info(host_info, adapter->netdev);
3974 
3975 	if (unlikely(test_bit(ENA_FLAG_TRIGGER_RESET, &adapter->flags))) {
3976 		netif_err(adapter, drv, adapter->netdev,
3977 			  "Trigger reset is on\n");
3978 		ena_dump_stats_to_dmesg(adapter);
3979 		queue_work(ena_wq, &adapter->reset_task);
3980 		return;
3981 	}
3982 
3983 	/* Reset the timer */
3984 	mod_timer(&adapter->timer_service, round_jiffies(jiffies + HZ));
3985 }
3986 
3987 static u32 ena_calc_max_io_queue_num(struct pci_dev *pdev,
3988 				     struct ena_com_dev *ena_dev,
3989 				     struct ena_com_dev_get_features_ctx *get_feat_ctx)
3990 {
3991 	u32 io_tx_sq_num, io_tx_cq_num, io_rx_num, max_num_io_queues;
3992 
3993 	if (ena_dev->supported_features & BIT(ENA_ADMIN_MAX_QUEUES_EXT)) {
3994 		struct ena_admin_queue_ext_feature_fields *max_queue_ext =
3995 			&get_feat_ctx->max_queue_ext.max_queue_ext;
3996 		io_rx_num = min_t(u32, max_queue_ext->max_rx_sq_num,
3997 				  max_queue_ext->max_rx_cq_num);
3998 
3999 		io_tx_sq_num = max_queue_ext->max_tx_sq_num;
4000 		io_tx_cq_num = max_queue_ext->max_tx_cq_num;
4001 	} else {
4002 		struct ena_admin_queue_feature_desc *max_queues =
4003 			&get_feat_ctx->max_queues;
4004 		io_tx_sq_num = max_queues->max_sq_num;
4005 		io_tx_cq_num = max_queues->max_cq_num;
4006 		io_rx_num = min_t(u32, io_tx_sq_num, io_tx_cq_num);
4007 	}
4008 
4009 	/* In case of LLQ use the llq fields for the tx SQ/CQ */
4010 	if (ena_dev->tx_mem_queue_type == ENA_ADMIN_PLACEMENT_POLICY_DEV)
4011 		io_tx_sq_num = get_feat_ctx->llq.max_llq_num;
4012 
4013 	max_num_io_queues = min_t(u32, num_online_cpus(), ENA_MAX_NUM_IO_QUEUES);
4014 	max_num_io_queues = min_t(u32, max_num_io_queues, io_rx_num);
4015 	max_num_io_queues = min_t(u32, max_num_io_queues, io_tx_sq_num);
4016 	max_num_io_queues = min_t(u32, max_num_io_queues, io_tx_cq_num);
4017 	/* 1 IRQ for mgmnt and 1 IRQs for each IO direction */
4018 	max_num_io_queues = min_t(u32, max_num_io_queues, pci_msix_vec_count(pdev) - 1);
4019 	if (unlikely(!max_num_io_queues)) {
4020 		dev_err(&pdev->dev, "The device doesn't have io queues\n");
4021 		return -EFAULT;
4022 	}
4023 
4024 	return max_num_io_queues;
4025 }
4026 
4027 static void ena_set_dev_offloads(struct ena_com_dev_get_features_ctx *feat,
4028 				 struct net_device *netdev)
4029 {
4030 	netdev_features_t dev_features = 0;
4031 
4032 	/* Set offload features */
4033 	if (feat->offload.tx &
4034 		ENA_ADMIN_FEATURE_OFFLOAD_DESC_TX_L4_IPV4_CSUM_PART_MASK)
4035 		dev_features |= NETIF_F_IP_CSUM;
4036 
4037 	if (feat->offload.tx &
4038 		ENA_ADMIN_FEATURE_OFFLOAD_DESC_TX_L4_IPV6_CSUM_PART_MASK)
4039 		dev_features |= NETIF_F_IPV6_CSUM;
4040 
4041 	if (feat->offload.tx & ENA_ADMIN_FEATURE_OFFLOAD_DESC_TSO_IPV4_MASK)
4042 		dev_features |= NETIF_F_TSO;
4043 
4044 	if (feat->offload.tx & ENA_ADMIN_FEATURE_OFFLOAD_DESC_TSO_IPV6_MASK)
4045 		dev_features |= NETIF_F_TSO6;
4046 
4047 	if (feat->offload.tx & ENA_ADMIN_FEATURE_OFFLOAD_DESC_TSO_ECN_MASK)
4048 		dev_features |= NETIF_F_TSO_ECN;
4049 
4050 	if (feat->offload.rx_supported &
4051 		ENA_ADMIN_FEATURE_OFFLOAD_DESC_RX_L4_IPV4_CSUM_MASK)
4052 		dev_features |= NETIF_F_RXCSUM;
4053 
4054 	if (feat->offload.rx_supported &
4055 		ENA_ADMIN_FEATURE_OFFLOAD_DESC_RX_L4_IPV6_CSUM_MASK)
4056 		dev_features |= NETIF_F_RXCSUM;
4057 
4058 	netdev->features =
4059 		dev_features |
4060 		NETIF_F_SG |
4061 		NETIF_F_RXHASH |
4062 		NETIF_F_HIGHDMA;
4063 
4064 	netdev->hw_features |= netdev->features;
4065 	netdev->vlan_features |= netdev->features;
4066 }
4067 
4068 static void ena_set_conf_feat_params(struct ena_adapter *adapter,
4069 				     struct ena_com_dev_get_features_ctx *feat)
4070 {
4071 	struct net_device *netdev = adapter->netdev;
4072 
4073 	/* Copy mac address */
4074 	if (!is_valid_ether_addr(feat->dev_attr.mac_addr)) {
4075 		eth_hw_addr_random(netdev);
4076 		ether_addr_copy(adapter->mac_addr, netdev->dev_addr);
4077 	} else {
4078 		ether_addr_copy(adapter->mac_addr, feat->dev_attr.mac_addr);
4079 		ether_addr_copy(netdev->dev_addr, adapter->mac_addr);
4080 	}
4081 
4082 	/* Set offload features */
4083 	ena_set_dev_offloads(feat, netdev);
4084 
4085 	adapter->max_mtu = feat->dev_attr.max_mtu;
4086 	netdev->max_mtu = adapter->max_mtu;
4087 	netdev->min_mtu = ENA_MIN_MTU;
4088 }
4089 
4090 static int ena_rss_init_default(struct ena_adapter *adapter)
4091 {
4092 	struct ena_com_dev *ena_dev = adapter->ena_dev;
4093 	struct device *dev = &adapter->pdev->dev;
4094 	int rc, i;
4095 	u32 val;
4096 
4097 	rc = ena_com_rss_init(ena_dev, ENA_RX_RSS_TABLE_LOG_SIZE);
4098 	if (unlikely(rc)) {
4099 		dev_err(dev, "Cannot init indirect table\n");
4100 		goto err_rss_init;
4101 	}
4102 
4103 	for (i = 0; i < ENA_RX_RSS_TABLE_SIZE; i++) {
4104 		val = ethtool_rxfh_indir_default(i, adapter->num_io_queues);
4105 		rc = ena_com_indirect_table_fill_entry(ena_dev, i,
4106 						       ENA_IO_RXQ_IDX(val));
4107 		if (unlikely(rc && (rc != -EOPNOTSUPP))) {
4108 			dev_err(dev, "Cannot fill indirect table\n");
4109 			goto err_fill_indir;
4110 		}
4111 	}
4112 
4113 	rc = ena_com_fill_hash_function(ena_dev, ENA_ADMIN_TOEPLITZ, NULL,
4114 					ENA_HASH_KEY_SIZE, 0xFFFFFFFF);
4115 	if (unlikely(rc && (rc != -EOPNOTSUPP))) {
4116 		dev_err(dev, "Cannot fill hash function\n");
4117 		goto err_fill_indir;
4118 	}
4119 
4120 	rc = ena_com_set_default_hash_ctrl(ena_dev);
4121 	if (unlikely(rc && (rc != -EOPNOTSUPP))) {
4122 		dev_err(dev, "Cannot fill hash control\n");
4123 		goto err_fill_indir;
4124 	}
4125 
4126 	return 0;
4127 
4128 err_fill_indir:
4129 	ena_com_rss_destroy(ena_dev);
4130 err_rss_init:
4131 
4132 	return rc;
4133 }
4134 
4135 static void ena_release_bars(struct ena_com_dev *ena_dev, struct pci_dev *pdev)
4136 {
4137 	int release_bars = pci_select_bars(pdev, IORESOURCE_MEM) & ENA_BAR_MASK;
4138 
4139 	pci_release_selected_regions(pdev, release_bars);
4140 }
4141 
4142 
4143 static int ena_calc_io_queue_size(struct ena_calc_queue_size_ctx *ctx)
4144 {
4145 	struct ena_admin_feature_llq_desc *llq = &ctx->get_feat_ctx->llq;
4146 	struct ena_com_dev *ena_dev = ctx->ena_dev;
4147 	u32 tx_queue_size = ENA_DEFAULT_RING_SIZE;
4148 	u32 rx_queue_size = ENA_DEFAULT_RING_SIZE;
4149 	u32 max_tx_queue_size;
4150 	u32 max_rx_queue_size;
4151 
4152 	if (ena_dev->supported_features & BIT(ENA_ADMIN_MAX_QUEUES_EXT)) {
4153 		struct ena_admin_queue_ext_feature_fields *max_queue_ext =
4154 			&ctx->get_feat_ctx->max_queue_ext.max_queue_ext;
4155 		max_rx_queue_size = min_t(u32, max_queue_ext->max_rx_cq_depth,
4156 					  max_queue_ext->max_rx_sq_depth);
4157 		max_tx_queue_size = max_queue_ext->max_tx_cq_depth;
4158 
4159 		if (ena_dev->tx_mem_queue_type == ENA_ADMIN_PLACEMENT_POLICY_DEV)
4160 			max_tx_queue_size = min_t(u32, max_tx_queue_size,
4161 						  llq->max_llq_depth);
4162 		else
4163 			max_tx_queue_size = min_t(u32, max_tx_queue_size,
4164 						  max_queue_ext->max_tx_sq_depth);
4165 
4166 		ctx->max_tx_sgl_size = min_t(u16, ENA_PKT_MAX_BUFS,
4167 					     max_queue_ext->max_per_packet_tx_descs);
4168 		ctx->max_rx_sgl_size = min_t(u16, ENA_PKT_MAX_BUFS,
4169 					     max_queue_ext->max_per_packet_rx_descs);
4170 	} else {
4171 		struct ena_admin_queue_feature_desc *max_queues =
4172 			&ctx->get_feat_ctx->max_queues;
4173 		max_rx_queue_size = min_t(u32, max_queues->max_cq_depth,
4174 					  max_queues->max_sq_depth);
4175 		max_tx_queue_size = max_queues->max_cq_depth;
4176 
4177 		if (ena_dev->tx_mem_queue_type == ENA_ADMIN_PLACEMENT_POLICY_DEV)
4178 			max_tx_queue_size = min_t(u32, max_tx_queue_size,
4179 						  llq->max_llq_depth);
4180 		else
4181 			max_tx_queue_size = min_t(u32, max_tx_queue_size,
4182 						  max_queues->max_sq_depth);
4183 
4184 		ctx->max_tx_sgl_size = min_t(u16, ENA_PKT_MAX_BUFS,
4185 					     max_queues->max_packet_tx_descs);
4186 		ctx->max_rx_sgl_size = min_t(u16, ENA_PKT_MAX_BUFS,
4187 					     max_queues->max_packet_rx_descs);
4188 	}
4189 
4190 	max_tx_queue_size = rounddown_pow_of_two(max_tx_queue_size);
4191 	max_rx_queue_size = rounddown_pow_of_two(max_rx_queue_size);
4192 
4193 	tx_queue_size = clamp_val(tx_queue_size, ENA_MIN_RING_SIZE,
4194 				  max_tx_queue_size);
4195 	rx_queue_size = clamp_val(rx_queue_size, ENA_MIN_RING_SIZE,
4196 				  max_rx_queue_size);
4197 
4198 	tx_queue_size = rounddown_pow_of_two(tx_queue_size);
4199 	rx_queue_size = rounddown_pow_of_two(rx_queue_size);
4200 
4201 	ctx->max_tx_queue_size = max_tx_queue_size;
4202 	ctx->max_rx_queue_size = max_rx_queue_size;
4203 	ctx->tx_queue_size = tx_queue_size;
4204 	ctx->rx_queue_size = rx_queue_size;
4205 
4206 	return 0;
4207 }
4208 
4209 /* ena_probe - Device Initialization Routine
4210  * @pdev: PCI device information struct
4211  * @ent: entry in ena_pci_tbl
4212  *
4213  * Returns 0 on success, negative on failure
4214  *
4215  * ena_probe initializes an adapter identified by a pci_dev structure.
4216  * The OS initialization, configuring of the adapter private structure,
4217  * and a hardware reset occur.
4218  */
4219 static int ena_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
4220 {
4221 	struct ena_calc_queue_size_ctx calc_queue_ctx = {};
4222 	struct ena_com_dev_get_features_ctx get_feat_ctx;
4223 	struct ena_com_dev *ena_dev = NULL;
4224 	struct ena_adapter *adapter;
4225 	struct net_device *netdev;
4226 	static int adapters_found;
4227 	u32 max_num_io_queues;
4228 	bool wd_state;
4229 	int bars, rc;
4230 
4231 	dev_dbg(&pdev->dev, "%s\n", __func__);
4232 
4233 	rc = pci_enable_device_mem(pdev);
4234 	if (rc) {
4235 		dev_err(&pdev->dev, "pci_enable_device_mem() failed!\n");
4236 		return rc;
4237 	}
4238 
4239 	rc = dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(ENA_MAX_PHYS_ADDR_SIZE_BITS));
4240 	if (rc) {
4241 		dev_err(&pdev->dev, "dma_set_mask_and_coherent failed %d\n", rc);
4242 		goto err_disable_device;
4243 	}
4244 
4245 	pci_set_master(pdev);
4246 
4247 	ena_dev = vzalloc(sizeof(*ena_dev));
4248 	if (!ena_dev) {
4249 		rc = -ENOMEM;
4250 		goto err_disable_device;
4251 	}
4252 
4253 	bars = pci_select_bars(pdev, IORESOURCE_MEM) & ENA_BAR_MASK;
4254 	rc = pci_request_selected_regions(pdev, bars, DRV_MODULE_NAME);
4255 	if (rc) {
4256 		dev_err(&pdev->dev, "pci_request_selected_regions failed %d\n",
4257 			rc);
4258 		goto err_free_ena_dev;
4259 	}
4260 
4261 	ena_dev->reg_bar = devm_ioremap(&pdev->dev,
4262 					pci_resource_start(pdev, ENA_REG_BAR),
4263 					pci_resource_len(pdev, ENA_REG_BAR));
4264 	if (!ena_dev->reg_bar) {
4265 		dev_err(&pdev->dev, "Failed to remap regs bar\n");
4266 		rc = -EFAULT;
4267 		goto err_free_region;
4268 	}
4269 
4270 	ena_dev->ena_min_poll_delay_us = ENA_ADMIN_POLL_DELAY_US;
4271 
4272 	ena_dev->dmadev = &pdev->dev;
4273 
4274 	netdev = alloc_etherdev_mq(sizeof(struct ena_adapter), ENA_MAX_RINGS);
4275 	if (!netdev) {
4276 		dev_err(&pdev->dev, "alloc_etherdev_mq failed\n");
4277 		rc = -ENOMEM;
4278 		goto err_free_region;
4279 	}
4280 
4281 	SET_NETDEV_DEV(netdev, &pdev->dev);
4282 	adapter = netdev_priv(netdev);
4283 	adapter->ena_dev = ena_dev;
4284 	adapter->netdev = netdev;
4285 	adapter->pdev = pdev;
4286 	adapter->msg_enable = DEFAULT_MSG_ENABLE;
4287 
4288 	ena_dev->net_device = netdev;
4289 
4290 	pci_set_drvdata(pdev, adapter);
4291 
4292 	rc = ena_device_init(ena_dev, pdev, &get_feat_ctx, &wd_state);
4293 	if (rc) {
4294 		dev_err(&pdev->dev, "ENA device init failed\n");
4295 		if (rc == -ETIME)
4296 			rc = -EPROBE_DEFER;
4297 		goto err_netdev_destroy;
4298 	}
4299 
4300 	rc = ena_map_llq_mem_bar(pdev, ena_dev, bars);
4301 	if (rc) {
4302 		dev_err(&pdev->dev, "ENA llq bar mapping failed\n");
4303 		goto err_device_destroy;
4304 	}
4305 
4306 	calc_queue_ctx.ena_dev = ena_dev;
4307 	calc_queue_ctx.get_feat_ctx = &get_feat_ctx;
4308 	calc_queue_ctx.pdev = pdev;
4309 
4310 	/* Initial TX and RX interrupt delay. Assumes 1 usec granularity.
4311 	 * Updated during device initialization with the real granularity
4312 	 */
4313 	ena_dev->intr_moder_tx_interval = ENA_INTR_INITIAL_TX_INTERVAL_USECS;
4314 	ena_dev->intr_moder_rx_interval = ENA_INTR_INITIAL_RX_INTERVAL_USECS;
4315 	ena_dev->intr_delay_resolution = ENA_DEFAULT_INTR_DELAY_RESOLUTION;
4316 	max_num_io_queues = ena_calc_max_io_queue_num(pdev, ena_dev, &get_feat_ctx);
4317 	rc = ena_calc_io_queue_size(&calc_queue_ctx);
4318 	if (rc || !max_num_io_queues) {
4319 		rc = -EFAULT;
4320 		goto err_device_destroy;
4321 	}
4322 
4323 	ena_set_conf_feat_params(adapter, &get_feat_ctx);
4324 
4325 	adapter->reset_reason = ENA_REGS_RESET_NORMAL;
4326 
4327 	adapter->requested_tx_ring_size = calc_queue_ctx.tx_queue_size;
4328 	adapter->requested_rx_ring_size = calc_queue_ctx.rx_queue_size;
4329 	adapter->max_tx_ring_size = calc_queue_ctx.max_tx_queue_size;
4330 	adapter->max_rx_ring_size = calc_queue_ctx.max_rx_queue_size;
4331 	adapter->max_tx_sgl_size = calc_queue_ctx.max_tx_sgl_size;
4332 	adapter->max_rx_sgl_size = calc_queue_ctx.max_rx_sgl_size;
4333 
4334 	adapter->num_io_queues = max_num_io_queues;
4335 	adapter->max_num_io_queues = max_num_io_queues;
4336 	adapter->last_monitored_tx_qid = 0;
4337 
4338 	adapter->xdp_first_ring = 0;
4339 	adapter->xdp_num_queues = 0;
4340 
4341 	adapter->rx_copybreak = ENA_DEFAULT_RX_COPYBREAK;
4342 	if (ena_dev->tx_mem_queue_type == ENA_ADMIN_PLACEMENT_POLICY_DEV)
4343 		adapter->disable_meta_caching =
4344 			!!(get_feat_ctx.llq.accel_mode.u.get.supported_flags &
4345 			   BIT(ENA_ADMIN_DISABLE_META_CACHING));
4346 
4347 	adapter->wd_state = wd_state;
4348 
4349 	snprintf(adapter->name, ENA_NAME_MAX_LEN, "ena_%d", adapters_found);
4350 
4351 	rc = ena_com_init_interrupt_moderation(adapter->ena_dev);
4352 	if (rc) {
4353 		dev_err(&pdev->dev,
4354 			"Failed to query interrupt moderation feature\n");
4355 		goto err_device_destroy;
4356 	}
4357 	ena_init_io_rings(adapter,
4358 			  0,
4359 			  adapter->xdp_num_queues +
4360 			  adapter->num_io_queues);
4361 
4362 	netdev->netdev_ops = &ena_netdev_ops;
4363 	netdev->watchdog_timeo = TX_TIMEOUT;
4364 	ena_set_ethtool_ops(netdev);
4365 
4366 	netdev->priv_flags |= IFF_UNICAST_FLT;
4367 
4368 	u64_stats_init(&adapter->syncp);
4369 
4370 	rc = ena_enable_msix_and_set_admin_interrupts(adapter);
4371 	if (rc) {
4372 		dev_err(&pdev->dev,
4373 			"Failed to enable and set the admin interrupts\n");
4374 		goto err_worker_destroy;
4375 	}
4376 	rc = ena_rss_init_default(adapter);
4377 	if (rc && (rc != -EOPNOTSUPP)) {
4378 		dev_err(&pdev->dev, "Cannot init RSS rc: %d\n", rc);
4379 		goto err_free_msix;
4380 	}
4381 
4382 	ena_config_debug_area(adapter);
4383 
4384 	if (!ena_update_hw_stats(adapter))
4385 		adapter->eni_stats_supported = true;
4386 	else
4387 		adapter->eni_stats_supported = false;
4388 
4389 	memcpy(adapter->netdev->perm_addr, adapter->mac_addr, netdev->addr_len);
4390 
4391 	netif_carrier_off(netdev);
4392 
4393 	rc = register_netdev(netdev);
4394 	if (rc) {
4395 		dev_err(&pdev->dev, "Cannot register net device\n");
4396 		goto err_rss;
4397 	}
4398 
4399 	INIT_WORK(&adapter->reset_task, ena_fw_reset_device);
4400 
4401 	adapter->last_keep_alive_jiffies = jiffies;
4402 	adapter->keep_alive_timeout = ENA_DEVICE_KALIVE_TIMEOUT;
4403 	adapter->missing_tx_completion_to = TX_TIMEOUT;
4404 	adapter->missing_tx_completion_threshold = MAX_NUM_OF_TIMEOUTED_PACKETS;
4405 
4406 	ena_update_hints(adapter, &get_feat_ctx.hw_hints);
4407 
4408 	timer_setup(&adapter->timer_service, ena_timer_service, 0);
4409 	mod_timer(&adapter->timer_service, round_jiffies(jiffies + HZ));
4410 
4411 	dev_info(&pdev->dev,
4412 		 "%s found at mem %lx, mac addr %pM\n",
4413 		 DEVICE_NAME, (long)pci_resource_start(pdev, 0),
4414 		 netdev->dev_addr);
4415 
4416 	set_bit(ENA_FLAG_DEVICE_RUNNING, &adapter->flags);
4417 
4418 	adapters_found++;
4419 
4420 	return 0;
4421 
4422 err_rss:
4423 	ena_com_delete_debug_area(ena_dev);
4424 	ena_com_rss_destroy(ena_dev);
4425 err_free_msix:
4426 	ena_com_dev_reset(ena_dev, ENA_REGS_RESET_INIT_ERR);
4427 	/* stop submitting admin commands on a device that was reset */
4428 	ena_com_set_admin_running_state(ena_dev, false);
4429 	ena_free_mgmnt_irq(adapter);
4430 	ena_disable_msix(adapter);
4431 err_worker_destroy:
4432 	del_timer(&adapter->timer_service);
4433 err_device_destroy:
4434 	ena_com_delete_host_info(ena_dev);
4435 	ena_com_admin_destroy(ena_dev);
4436 err_netdev_destroy:
4437 	free_netdev(netdev);
4438 err_free_region:
4439 	ena_release_bars(ena_dev, pdev);
4440 err_free_ena_dev:
4441 	vfree(ena_dev);
4442 err_disable_device:
4443 	pci_disable_device(pdev);
4444 	return rc;
4445 }
4446 
4447 /*****************************************************************************/
4448 
4449 /* __ena_shutoff - Helper used in both PCI remove/shutdown routines
4450  * @pdev: PCI device information struct
4451  * @shutdown: Is it a shutdown operation? If false, means it is a removal
4452  *
4453  * __ena_shutoff is a helper routine that does the real work on shutdown and
4454  * removal paths; the difference between those paths is with regards to whether
4455  * dettach or unregister the netdevice.
4456  */
4457 static void __ena_shutoff(struct pci_dev *pdev, bool shutdown)
4458 {
4459 	struct ena_adapter *adapter = pci_get_drvdata(pdev);
4460 	struct ena_com_dev *ena_dev;
4461 	struct net_device *netdev;
4462 
4463 	ena_dev = adapter->ena_dev;
4464 	netdev = adapter->netdev;
4465 
4466 #ifdef CONFIG_RFS_ACCEL
4467 	if ((adapter->msix_vecs >= 1) && (netdev->rx_cpu_rmap)) {
4468 		free_irq_cpu_rmap(netdev->rx_cpu_rmap);
4469 		netdev->rx_cpu_rmap = NULL;
4470 	}
4471 #endif /* CONFIG_RFS_ACCEL */
4472 
4473 	/* Make sure timer and reset routine won't be called after
4474 	 * freeing device resources.
4475 	 */
4476 	del_timer_sync(&adapter->timer_service);
4477 	cancel_work_sync(&adapter->reset_task);
4478 
4479 	rtnl_lock(); /* lock released inside the below if-else block */
4480 	adapter->reset_reason = ENA_REGS_RESET_SHUTDOWN;
4481 	ena_destroy_device(adapter, true);
4482 	if (shutdown) {
4483 		netif_device_detach(netdev);
4484 		dev_close(netdev);
4485 		rtnl_unlock();
4486 	} else {
4487 		rtnl_unlock();
4488 		unregister_netdev(netdev);
4489 		free_netdev(netdev);
4490 	}
4491 
4492 	ena_com_rss_destroy(ena_dev);
4493 
4494 	ena_com_delete_debug_area(ena_dev);
4495 
4496 	ena_com_delete_host_info(ena_dev);
4497 
4498 	ena_release_bars(ena_dev, pdev);
4499 
4500 	pci_disable_device(pdev);
4501 
4502 	vfree(ena_dev);
4503 }
4504 
4505 /* ena_remove - Device Removal Routine
4506  * @pdev: PCI device information struct
4507  *
4508  * ena_remove is called by the PCI subsystem to alert the driver
4509  * that it should release a PCI device.
4510  */
4511 
4512 static void ena_remove(struct pci_dev *pdev)
4513 {
4514 	__ena_shutoff(pdev, false);
4515 }
4516 
4517 /* ena_shutdown - Device Shutdown Routine
4518  * @pdev: PCI device information struct
4519  *
4520  * ena_shutdown is called by the PCI subsystem to alert the driver that
4521  * a shutdown/reboot (or kexec) is happening and device must be disabled.
4522  */
4523 
4524 static void ena_shutdown(struct pci_dev *pdev)
4525 {
4526 	__ena_shutoff(pdev, true);
4527 }
4528 
4529 /* ena_suspend - PM suspend callback
4530  * @dev_d: Device information struct
4531  */
4532 static int __maybe_unused ena_suspend(struct device *dev_d)
4533 {
4534 	struct pci_dev *pdev = to_pci_dev(dev_d);
4535 	struct ena_adapter *adapter = pci_get_drvdata(pdev);
4536 
4537 	ena_increase_stat(&adapter->dev_stats.suspend, 1, &adapter->syncp);
4538 
4539 	rtnl_lock();
4540 	if (unlikely(test_bit(ENA_FLAG_TRIGGER_RESET, &adapter->flags))) {
4541 		dev_err(&pdev->dev,
4542 			"Ignoring device reset request as the device is being suspended\n");
4543 		clear_bit(ENA_FLAG_TRIGGER_RESET, &adapter->flags);
4544 	}
4545 	ena_destroy_device(adapter, true);
4546 	rtnl_unlock();
4547 	return 0;
4548 }
4549 
4550 /* ena_resume - PM resume callback
4551  * @dev_d: Device information struct
4552  */
4553 static int __maybe_unused ena_resume(struct device *dev_d)
4554 {
4555 	struct ena_adapter *adapter = dev_get_drvdata(dev_d);
4556 	int rc;
4557 
4558 	ena_increase_stat(&adapter->dev_stats.resume, 1, &adapter->syncp);
4559 
4560 	rtnl_lock();
4561 	rc = ena_restore_device(adapter);
4562 	rtnl_unlock();
4563 	return rc;
4564 }
4565 
4566 static SIMPLE_DEV_PM_OPS(ena_pm_ops, ena_suspend, ena_resume);
4567 
4568 static struct pci_driver ena_pci_driver = {
4569 	.name		= DRV_MODULE_NAME,
4570 	.id_table	= ena_pci_tbl,
4571 	.probe		= ena_probe,
4572 	.remove		= ena_remove,
4573 	.shutdown	= ena_shutdown,
4574 	.driver.pm	= &ena_pm_ops,
4575 	.sriov_configure = pci_sriov_configure_simple,
4576 };
4577 
4578 static int __init ena_init(void)
4579 {
4580 	ena_wq = create_singlethread_workqueue(DRV_MODULE_NAME);
4581 	if (!ena_wq) {
4582 		pr_err("Failed to create workqueue\n");
4583 		return -ENOMEM;
4584 	}
4585 
4586 	return pci_register_driver(&ena_pci_driver);
4587 }
4588 
4589 static void __exit ena_cleanup(void)
4590 {
4591 	pci_unregister_driver(&ena_pci_driver);
4592 
4593 	if (ena_wq) {
4594 		destroy_workqueue(ena_wq);
4595 		ena_wq = NULL;
4596 	}
4597 }
4598 
4599 /******************************************************************************
4600  ******************************** AENQ Handlers *******************************
4601  *****************************************************************************/
4602 /* ena_update_on_link_change:
4603  * Notify the network interface about the change in link status
4604  */
4605 static void ena_update_on_link_change(void *adapter_data,
4606 				      struct ena_admin_aenq_entry *aenq_e)
4607 {
4608 	struct ena_adapter *adapter = (struct ena_adapter *)adapter_data;
4609 	struct ena_admin_aenq_link_change_desc *aenq_desc =
4610 		(struct ena_admin_aenq_link_change_desc *)aenq_e;
4611 	int status = aenq_desc->flags &
4612 		ENA_ADMIN_AENQ_LINK_CHANGE_DESC_LINK_STATUS_MASK;
4613 
4614 	if (status) {
4615 		netif_dbg(adapter, ifup, adapter->netdev, "%s\n", __func__);
4616 		set_bit(ENA_FLAG_LINK_UP, &adapter->flags);
4617 		if (!test_bit(ENA_FLAG_ONGOING_RESET, &adapter->flags))
4618 			netif_carrier_on(adapter->netdev);
4619 	} else {
4620 		clear_bit(ENA_FLAG_LINK_UP, &adapter->flags);
4621 		netif_carrier_off(adapter->netdev);
4622 	}
4623 }
4624 
4625 static void ena_keep_alive_wd(void *adapter_data,
4626 			      struct ena_admin_aenq_entry *aenq_e)
4627 {
4628 	struct ena_adapter *adapter = (struct ena_adapter *)adapter_data;
4629 	struct ena_admin_aenq_keep_alive_desc *desc;
4630 	u64 rx_drops;
4631 	u64 tx_drops;
4632 
4633 	desc = (struct ena_admin_aenq_keep_alive_desc *)aenq_e;
4634 	adapter->last_keep_alive_jiffies = jiffies;
4635 
4636 	rx_drops = ((u64)desc->rx_drops_high << 32) | desc->rx_drops_low;
4637 	tx_drops = ((u64)desc->tx_drops_high << 32) | desc->tx_drops_low;
4638 
4639 	u64_stats_update_begin(&adapter->syncp);
4640 	/* These stats are accumulated by the device, so the counters indicate
4641 	 * all drops since last reset.
4642 	 */
4643 	adapter->dev_stats.rx_drops = rx_drops;
4644 	adapter->dev_stats.tx_drops = tx_drops;
4645 	u64_stats_update_end(&adapter->syncp);
4646 }
4647 
4648 static void ena_notification(void *adapter_data,
4649 			     struct ena_admin_aenq_entry *aenq_e)
4650 {
4651 	struct ena_adapter *adapter = (struct ena_adapter *)adapter_data;
4652 	struct ena_admin_ena_hw_hints *hints;
4653 
4654 	WARN(aenq_e->aenq_common_desc.group != ENA_ADMIN_NOTIFICATION,
4655 	     "Invalid group(%x) expected %x\n",
4656 	     aenq_e->aenq_common_desc.group,
4657 	     ENA_ADMIN_NOTIFICATION);
4658 
4659 	switch (aenq_e->aenq_common_desc.syndrome) {
4660 	case ENA_ADMIN_UPDATE_HINTS:
4661 		hints = (struct ena_admin_ena_hw_hints *)
4662 			(&aenq_e->inline_data_w4);
4663 		ena_update_hints(adapter, hints);
4664 		break;
4665 	default:
4666 		netif_err(adapter, drv, adapter->netdev,
4667 			  "Invalid aenq notification link state %d\n",
4668 			  aenq_e->aenq_common_desc.syndrome);
4669 	}
4670 }
4671 
4672 /* This handler will called for unknown event group or unimplemented handlers*/
4673 static void unimplemented_aenq_handler(void *data,
4674 				       struct ena_admin_aenq_entry *aenq_e)
4675 {
4676 	struct ena_adapter *adapter = (struct ena_adapter *)data;
4677 
4678 	netif_err(adapter, drv, adapter->netdev,
4679 		  "Unknown event was received or event with unimplemented handler\n");
4680 }
4681 
4682 static struct ena_aenq_handlers aenq_handlers = {
4683 	.handlers = {
4684 		[ENA_ADMIN_LINK_CHANGE] = ena_update_on_link_change,
4685 		[ENA_ADMIN_NOTIFICATION] = ena_notification,
4686 		[ENA_ADMIN_KEEP_ALIVE] = ena_keep_alive_wd,
4687 	},
4688 	.unimplemented_handler = unimplemented_aenq_handler
4689 };
4690 
4691 module_init(ena_init);
4692 module_exit(ena_cleanup);
4693