1 /* 2 * Copyright 2015 Amazon.com, Inc. or its affiliates. 3 * 4 * This software is available to you under a choice of one of two 5 * licenses. You may choose to be licensed under the terms of the GNU 6 * General Public License (GPL) Version 2, available from the file 7 * COPYING in the main directory of this source tree, or the 8 * BSD license below: 9 * 10 * Redistribution and use in source and binary forms, with or 11 * without modification, are permitted provided that the following 12 * conditions are met: 13 * 14 * - Redistributions of source code must retain the above 15 * copyright notice, this list of conditions and the following 16 * disclaimer. 17 * 18 * - Redistributions in binary form must reproduce the above 19 * copyright notice, this list of conditions and the following 20 * disclaimer in the documentation and/or other materials 21 * provided with the distribution. 22 * 23 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, 24 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF 25 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND 26 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS 27 * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN 28 * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN 29 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE 30 * SOFTWARE. 31 */ 32 33 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt 34 35 #ifdef CONFIG_RFS_ACCEL 36 #include <linux/cpu_rmap.h> 37 #endif /* CONFIG_RFS_ACCEL */ 38 #include <linux/ethtool.h> 39 #include <linux/if_vlan.h> 40 #include <linux/kernel.h> 41 #include <linux/module.h> 42 #include <linux/numa.h> 43 #include <linux/pci.h> 44 #include <linux/utsname.h> 45 #include <linux/version.h> 46 #include <linux/vmalloc.h> 47 #include <net/ip.h> 48 49 #include "ena_netdev.h" 50 #include "ena_pci_id_tbl.h" 51 52 static char version[] = DEVICE_NAME " v" DRV_MODULE_VERSION "\n"; 53 54 MODULE_AUTHOR("Amazon.com, Inc. or its affiliates"); 55 MODULE_DESCRIPTION(DEVICE_NAME); 56 MODULE_LICENSE("GPL"); 57 MODULE_VERSION(DRV_MODULE_VERSION); 58 59 /* Time in jiffies before concluding the transmitter is hung. */ 60 #define TX_TIMEOUT (5 * HZ) 61 62 #define ENA_NAPI_BUDGET 64 63 64 #define DEFAULT_MSG_ENABLE (NETIF_MSG_DRV | NETIF_MSG_PROBE | NETIF_MSG_IFUP | \ 65 NETIF_MSG_TX_DONE | NETIF_MSG_TX_ERR | NETIF_MSG_RX_ERR) 66 static int debug = -1; 67 module_param(debug, int, 0); 68 MODULE_PARM_DESC(debug, "Debug level (0=none,...,16=all)"); 69 70 static struct ena_aenq_handlers aenq_handlers; 71 72 static struct workqueue_struct *ena_wq; 73 74 MODULE_DEVICE_TABLE(pci, ena_pci_tbl); 75 76 static int ena_rss_init_default(struct ena_adapter *adapter); 77 static void check_for_admin_com_state(struct ena_adapter *adapter); 78 static void ena_destroy_device(struct ena_adapter *adapter, bool graceful); 79 static int ena_restore_device(struct ena_adapter *adapter); 80 81 static void ena_tx_timeout(struct net_device *dev) 82 { 83 struct ena_adapter *adapter = netdev_priv(dev); 84 85 /* Change the state of the device to trigger reset 86 * Check that we are not in the middle or a trigger already 87 */ 88 89 if (test_and_set_bit(ENA_FLAG_TRIGGER_RESET, &adapter->flags)) 90 return; 91 92 adapter->reset_reason = ENA_REGS_RESET_OS_NETDEV_WD; 93 u64_stats_update_begin(&adapter->syncp); 94 adapter->dev_stats.tx_timeout++; 95 u64_stats_update_end(&adapter->syncp); 96 97 netif_err(adapter, tx_err, dev, "Transmit time out\n"); 98 } 99 100 static void update_rx_ring_mtu(struct ena_adapter *adapter, int mtu) 101 { 102 int i; 103 104 for (i = 0; i < adapter->num_queues; i++) 105 adapter->rx_ring[i].mtu = mtu; 106 } 107 108 static int ena_change_mtu(struct net_device *dev, int new_mtu) 109 { 110 struct ena_adapter *adapter = netdev_priv(dev); 111 int ret; 112 113 ret = ena_com_set_dev_mtu(adapter->ena_dev, new_mtu); 114 if (!ret) { 115 netif_dbg(adapter, drv, dev, "set MTU to %d\n", new_mtu); 116 update_rx_ring_mtu(adapter, new_mtu); 117 dev->mtu = new_mtu; 118 } else { 119 netif_err(adapter, drv, dev, "Failed to set MTU to %d\n", 120 new_mtu); 121 } 122 123 return ret; 124 } 125 126 static int ena_init_rx_cpu_rmap(struct ena_adapter *adapter) 127 { 128 #ifdef CONFIG_RFS_ACCEL 129 u32 i; 130 int rc; 131 132 adapter->netdev->rx_cpu_rmap = alloc_irq_cpu_rmap(adapter->num_queues); 133 if (!adapter->netdev->rx_cpu_rmap) 134 return -ENOMEM; 135 for (i = 0; i < adapter->num_queues; i++) { 136 int irq_idx = ENA_IO_IRQ_IDX(i); 137 138 rc = irq_cpu_rmap_add(adapter->netdev->rx_cpu_rmap, 139 pci_irq_vector(adapter->pdev, irq_idx)); 140 if (rc) { 141 free_irq_cpu_rmap(adapter->netdev->rx_cpu_rmap); 142 adapter->netdev->rx_cpu_rmap = NULL; 143 return rc; 144 } 145 } 146 #endif /* CONFIG_RFS_ACCEL */ 147 return 0; 148 } 149 150 static void ena_init_io_rings_common(struct ena_adapter *adapter, 151 struct ena_ring *ring, u16 qid) 152 { 153 ring->qid = qid; 154 ring->pdev = adapter->pdev; 155 ring->dev = &adapter->pdev->dev; 156 ring->netdev = adapter->netdev; 157 ring->napi = &adapter->ena_napi[qid].napi; 158 ring->adapter = adapter; 159 ring->ena_dev = adapter->ena_dev; 160 ring->per_napi_packets = 0; 161 ring->per_napi_bytes = 0; 162 ring->cpu = 0; 163 ring->first_interrupt = false; 164 ring->no_interrupt_event_cnt = 0; 165 u64_stats_init(&ring->syncp); 166 } 167 168 static void ena_init_io_rings(struct ena_adapter *adapter) 169 { 170 struct ena_com_dev *ena_dev; 171 struct ena_ring *txr, *rxr; 172 int i; 173 174 ena_dev = adapter->ena_dev; 175 176 for (i = 0; i < adapter->num_queues; i++) { 177 txr = &adapter->tx_ring[i]; 178 rxr = &adapter->rx_ring[i]; 179 180 /* TX/RX common ring state */ 181 ena_init_io_rings_common(adapter, txr, i); 182 ena_init_io_rings_common(adapter, rxr, i); 183 184 /* TX specific ring state */ 185 txr->ring_size = adapter->tx_ring_size; 186 txr->tx_max_header_size = ena_dev->tx_max_header_size; 187 txr->tx_mem_queue_type = ena_dev->tx_mem_queue_type; 188 txr->sgl_size = adapter->max_tx_sgl_size; 189 txr->smoothed_interval = 190 ena_com_get_nonadaptive_moderation_interval_tx(ena_dev); 191 192 /* RX specific ring state */ 193 rxr->ring_size = adapter->rx_ring_size; 194 rxr->rx_copybreak = adapter->rx_copybreak; 195 rxr->sgl_size = adapter->max_rx_sgl_size; 196 rxr->smoothed_interval = 197 ena_com_get_nonadaptive_moderation_interval_rx(ena_dev); 198 rxr->empty_rx_queue = 0; 199 } 200 } 201 202 /* ena_setup_tx_resources - allocate I/O Tx resources (Descriptors) 203 * @adapter: network interface device structure 204 * @qid: queue index 205 * 206 * Return 0 on success, negative on failure 207 */ 208 static int ena_setup_tx_resources(struct ena_adapter *adapter, int qid) 209 { 210 struct ena_ring *tx_ring = &adapter->tx_ring[qid]; 211 struct ena_irq *ena_irq = &adapter->irq_tbl[ENA_IO_IRQ_IDX(qid)]; 212 int size, i, node; 213 214 if (tx_ring->tx_buffer_info) { 215 netif_err(adapter, ifup, 216 adapter->netdev, "tx_buffer_info info is not NULL"); 217 return -EEXIST; 218 } 219 220 size = sizeof(struct ena_tx_buffer) * tx_ring->ring_size; 221 node = cpu_to_node(ena_irq->cpu); 222 223 tx_ring->tx_buffer_info = vzalloc_node(size, node); 224 if (!tx_ring->tx_buffer_info) { 225 tx_ring->tx_buffer_info = vzalloc(size); 226 if (!tx_ring->tx_buffer_info) 227 return -ENOMEM; 228 } 229 230 size = sizeof(u16) * tx_ring->ring_size; 231 tx_ring->free_tx_ids = vzalloc_node(size, node); 232 if (!tx_ring->free_tx_ids) { 233 tx_ring->free_tx_ids = vzalloc(size); 234 if (!tx_ring->free_tx_ids) { 235 vfree(tx_ring->tx_buffer_info); 236 return -ENOMEM; 237 } 238 } 239 240 /* Req id ring for TX out of order completions */ 241 for (i = 0; i < tx_ring->ring_size; i++) 242 tx_ring->free_tx_ids[i] = i; 243 244 /* Reset tx statistics */ 245 memset(&tx_ring->tx_stats, 0x0, sizeof(tx_ring->tx_stats)); 246 247 tx_ring->next_to_use = 0; 248 tx_ring->next_to_clean = 0; 249 tx_ring->cpu = ena_irq->cpu; 250 return 0; 251 } 252 253 /* ena_free_tx_resources - Free I/O Tx Resources per Queue 254 * @adapter: network interface device structure 255 * @qid: queue index 256 * 257 * Free all transmit software resources 258 */ 259 static void ena_free_tx_resources(struct ena_adapter *adapter, int qid) 260 { 261 struct ena_ring *tx_ring = &adapter->tx_ring[qid]; 262 263 vfree(tx_ring->tx_buffer_info); 264 tx_ring->tx_buffer_info = NULL; 265 266 vfree(tx_ring->free_tx_ids); 267 tx_ring->free_tx_ids = NULL; 268 } 269 270 /* ena_setup_all_tx_resources - allocate I/O Tx queues resources for All queues 271 * @adapter: private structure 272 * 273 * Return 0 on success, negative on failure 274 */ 275 static int ena_setup_all_tx_resources(struct ena_adapter *adapter) 276 { 277 int i, rc = 0; 278 279 for (i = 0; i < adapter->num_queues; i++) { 280 rc = ena_setup_tx_resources(adapter, i); 281 if (rc) 282 goto err_setup_tx; 283 } 284 285 return 0; 286 287 err_setup_tx: 288 289 netif_err(adapter, ifup, adapter->netdev, 290 "Tx queue %d: allocation failed\n", i); 291 292 /* rewind the index freeing the rings as we go */ 293 while (i--) 294 ena_free_tx_resources(adapter, i); 295 return rc; 296 } 297 298 /* ena_free_all_io_tx_resources - Free I/O Tx Resources for All Queues 299 * @adapter: board private structure 300 * 301 * Free all transmit software resources 302 */ 303 static void ena_free_all_io_tx_resources(struct ena_adapter *adapter) 304 { 305 int i; 306 307 for (i = 0; i < adapter->num_queues; i++) 308 ena_free_tx_resources(adapter, i); 309 } 310 311 static inline int validate_rx_req_id(struct ena_ring *rx_ring, u16 req_id) 312 { 313 if (likely(req_id < rx_ring->ring_size)) 314 return 0; 315 316 netif_err(rx_ring->adapter, rx_err, rx_ring->netdev, 317 "Invalid rx req_id: %hu\n", req_id); 318 319 u64_stats_update_begin(&rx_ring->syncp); 320 rx_ring->rx_stats.bad_req_id++; 321 u64_stats_update_end(&rx_ring->syncp); 322 323 /* Trigger device reset */ 324 rx_ring->adapter->reset_reason = ENA_REGS_RESET_INV_RX_REQ_ID; 325 set_bit(ENA_FLAG_TRIGGER_RESET, &rx_ring->adapter->flags); 326 return -EFAULT; 327 } 328 329 /* ena_setup_rx_resources - allocate I/O Rx resources (Descriptors) 330 * @adapter: network interface device structure 331 * @qid: queue index 332 * 333 * Returns 0 on success, negative on failure 334 */ 335 static int ena_setup_rx_resources(struct ena_adapter *adapter, 336 u32 qid) 337 { 338 struct ena_ring *rx_ring = &adapter->rx_ring[qid]; 339 struct ena_irq *ena_irq = &adapter->irq_tbl[ENA_IO_IRQ_IDX(qid)]; 340 int size, node, i; 341 342 if (rx_ring->rx_buffer_info) { 343 netif_err(adapter, ifup, adapter->netdev, 344 "rx_buffer_info is not NULL"); 345 return -EEXIST; 346 } 347 348 /* alloc extra element so in rx path 349 * we can always prefetch rx_info + 1 350 */ 351 size = sizeof(struct ena_rx_buffer) * (rx_ring->ring_size + 1); 352 node = cpu_to_node(ena_irq->cpu); 353 354 rx_ring->rx_buffer_info = vzalloc_node(size, node); 355 if (!rx_ring->rx_buffer_info) { 356 rx_ring->rx_buffer_info = vzalloc(size); 357 if (!rx_ring->rx_buffer_info) 358 return -ENOMEM; 359 } 360 361 size = sizeof(u16) * rx_ring->ring_size; 362 rx_ring->free_rx_ids = vzalloc_node(size, node); 363 if (!rx_ring->free_rx_ids) { 364 rx_ring->free_rx_ids = vzalloc(size); 365 if (!rx_ring->free_rx_ids) { 366 vfree(rx_ring->rx_buffer_info); 367 return -ENOMEM; 368 } 369 } 370 371 /* Req id ring for receiving RX pkts out of order */ 372 for (i = 0; i < rx_ring->ring_size; i++) 373 rx_ring->free_rx_ids[i] = i; 374 375 /* Reset rx statistics */ 376 memset(&rx_ring->rx_stats, 0x0, sizeof(rx_ring->rx_stats)); 377 378 rx_ring->next_to_clean = 0; 379 rx_ring->next_to_use = 0; 380 rx_ring->cpu = ena_irq->cpu; 381 382 return 0; 383 } 384 385 /* ena_free_rx_resources - Free I/O Rx Resources 386 * @adapter: network interface device structure 387 * @qid: queue index 388 * 389 * Free all receive software resources 390 */ 391 static void ena_free_rx_resources(struct ena_adapter *adapter, 392 u32 qid) 393 { 394 struct ena_ring *rx_ring = &adapter->rx_ring[qid]; 395 396 vfree(rx_ring->rx_buffer_info); 397 rx_ring->rx_buffer_info = NULL; 398 399 vfree(rx_ring->free_rx_ids); 400 rx_ring->free_rx_ids = NULL; 401 } 402 403 /* ena_setup_all_rx_resources - allocate I/O Rx queues resources for all queues 404 * @adapter: board private structure 405 * 406 * Return 0 on success, negative on failure 407 */ 408 static int ena_setup_all_rx_resources(struct ena_adapter *adapter) 409 { 410 int i, rc = 0; 411 412 for (i = 0; i < adapter->num_queues; i++) { 413 rc = ena_setup_rx_resources(adapter, i); 414 if (rc) 415 goto err_setup_rx; 416 } 417 418 return 0; 419 420 err_setup_rx: 421 422 netif_err(adapter, ifup, adapter->netdev, 423 "Rx queue %d: allocation failed\n", i); 424 425 /* rewind the index freeing the rings as we go */ 426 while (i--) 427 ena_free_rx_resources(adapter, i); 428 return rc; 429 } 430 431 /* ena_free_all_io_rx_resources - Free I/O Rx Resources for All Queues 432 * @adapter: board private structure 433 * 434 * Free all receive software resources 435 */ 436 static void ena_free_all_io_rx_resources(struct ena_adapter *adapter) 437 { 438 int i; 439 440 for (i = 0; i < adapter->num_queues; i++) 441 ena_free_rx_resources(adapter, i); 442 } 443 444 static inline int ena_alloc_rx_page(struct ena_ring *rx_ring, 445 struct ena_rx_buffer *rx_info, gfp_t gfp) 446 { 447 struct ena_com_buf *ena_buf; 448 struct page *page; 449 dma_addr_t dma; 450 451 /* if previous allocated page is not used */ 452 if (unlikely(rx_info->page)) 453 return 0; 454 455 page = alloc_page(gfp); 456 if (unlikely(!page)) { 457 u64_stats_update_begin(&rx_ring->syncp); 458 rx_ring->rx_stats.page_alloc_fail++; 459 u64_stats_update_end(&rx_ring->syncp); 460 return -ENOMEM; 461 } 462 463 dma = dma_map_page(rx_ring->dev, page, 0, ENA_PAGE_SIZE, 464 DMA_FROM_DEVICE); 465 if (unlikely(dma_mapping_error(rx_ring->dev, dma))) { 466 u64_stats_update_begin(&rx_ring->syncp); 467 rx_ring->rx_stats.dma_mapping_err++; 468 u64_stats_update_end(&rx_ring->syncp); 469 470 __free_page(page); 471 return -EIO; 472 } 473 netif_dbg(rx_ring->adapter, rx_status, rx_ring->netdev, 474 "alloc page %p, rx_info %p\n", page, rx_info); 475 476 rx_info->page = page; 477 rx_info->page_offset = 0; 478 ena_buf = &rx_info->ena_buf; 479 ena_buf->paddr = dma; 480 ena_buf->len = ENA_PAGE_SIZE; 481 482 return 0; 483 } 484 485 static void ena_free_rx_page(struct ena_ring *rx_ring, 486 struct ena_rx_buffer *rx_info) 487 { 488 struct page *page = rx_info->page; 489 struct ena_com_buf *ena_buf = &rx_info->ena_buf; 490 491 if (unlikely(!page)) { 492 netif_warn(rx_ring->adapter, rx_err, rx_ring->netdev, 493 "Trying to free unallocated buffer\n"); 494 return; 495 } 496 497 dma_unmap_page(rx_ring->dev, ena_buf->paddr, ENA_PAGE_SIZE, 498 DMA_FROM_DEVICE); 499 500 __free_page(page); 501 rx_info->page = NULL; 502 } 503 504 static int ena_refill_rx_bufs(struct ena_ring *rx_ring, u32 num) 505 { 506 u16 next_to_use, req_id; 507 u32 i; 508 int rc; 509 510 next_to_use = rx_ring->next_to_use; 511 512 for (i = 0; i < num; i++) { 513 struct ena_rx_buffer *rx_info; 514 515 req_id = rx_ring->free_rx_ids[next_to_use]; 516 rc = validate_rx_req_id(rx_ring, req_id); 517 if (unlikely(rc < 0)) 518 break; 519 520 rx_info = &rx_ring->rx_buffer_info[req_id]; 521 522 523 rc = ena_alloc_rx_page(rx_ring, rx_info, 524 GFP_ATOMIC | __GFP_COMP); 525 if (unlikely(rc < 0)) { 526 netif_warn(rx_ring->adapter, rx_err, rx_ring->netdev, 527 "failed to alloc buffer for rx queue %d\n", 528 rx_ring->qid); 529 break; 530 } 531 rc = ena_com_add_single_rx_desc(rx_ring->ena_com_io_sq, 532 &rx_info->ena_buf, 533 req_id); 534 if (unlikely(rc)) { 535 netif_warn(rx_ring->adapter, rx_status, rx_ring->netdev, 536 "failed to add buffer for rx queue %d\n", 537 rx_ring->qid); 538 break; 539 } 540 next_to_use = ENA_RX_RING_IDX_NEXT(next_to_use, 541 rx_ring->ring_size); 542 } 543 544 if (unlikely(i < num)) { 545 u64_stats_update_begin(&rx_ring->syncp); 546 rx_ring->rx_stats.refil_partial++; 547 u64_stats_update_end(&rx_ring->syncp); 548 netdev_warn(rx_ring->netdev, 549 "refilled rx qid %d with only %d buffers (from %d)\n", 550 rx_ring->qid, i, num); 551 } 552 553 /* ena_com_write_sq_doorbell issues a wmb() */ 554 if (likely(i)) 555 ena_com_write_sq_doorbell(rx_ring->ena_com_io_sq); 556 557 rx_ring->next_to_use = next_to_use; 558 559 return i; 560 } 561 562 static void ena_free_rx_bufs(struct ena_adapter *adapter, 563 u32 qid) 564 { 565 struct ena_ring *rx_ring = &adapter->rx_ring[qid]; 566 u32 i; 567 568 for (i = 0; i < rx_ring->ring_size; i++) { 569 struct ena_rx_buffer *rx_info = &rx_ring->rx_buffer_info[i]; 570 571 if (rx_info->page) 572 ena_free_rx_page(rx_ring, rx_info); 573 } 574 } 575 576 /* ena_refill_all_rx_bufs - allocate all queues Rx buffers 577 * @adapter: board private structure 578 * 579 */ 580 static void ena_refill_all_rx_bufs(struct ena_adapter *adapter) 581 { 582 struct ena_ring *rx_ring; 583 int i, rc, bufs_num; 584 585 for (i = 0; i < adapter->num_queues; i++) { 586 rx_ring = &adapter->rx_ring[i]; 587 bufs_num = rx_ring->ring_size - 1; 588 rc = ena_refill_rx_bufs(rx_ring, bufs_num); 589 590 if (unlikely(rc != bufs_num)) 591 netif_warn(rx_ring->adapter, rx_status, rx_ring->netdev, 592 "refilling Queue %d failed. allocated %d buffers from: %d\n", 593 i, rc, bufs_num); 594 } 595 } 596 597 static void ena_free_all_rx_bufs(struct ena_adapter *adapter) 598 { 599 int i; 600 601 for (i = 0; i < adapter->num_queues; i++) 602 ena_free_rx_bufs(adapter, i); 603 } 604 605 /* ena_free_tx_bufs - Free Tx Buffers per Queue 606 * @tx_ring: TX ring for which buffers be freed 607 */ 608 static void ena_free_tx_bufs(struct ena_ring *tx_ring) 609 { 610 bool print_once = true; 611 u32 i; 612 613 for (i = 0; i < tx_ring->ring_size; i++) { 614 struct ena_tx_buffer *tx_info = &tx_ring->tx_buffer_info[i]; 615 struct ena_com_buf *ena_buf; 616 int nr_frags; 617 int j; 618 619 if (!tx_info->skb) 620 continue; 621 622 if (print_once) { 623 netdev_notice(tx_ring->netdev, 624 "free uncompleted tx skb qid %d idx 0x%x\n", 625 tx_ring->qid, i); 626 print_once = false; 627 } else { 628 netdev_dbg(tx_ring->netdev, 629 "free uncompleted tx skb qid %d idx 0x%x\n", 630 tx_ring->qid, i); 631 } 632 633 ena_buf = tx_info->bufs; 634 dma_unmap_single(tx_ring->dev, 635 ena_buf->paddr, 636 ena_buf->len, 637 DMA_TO_DEVICE); 638 639 /* unmap remaining mapped pages */ 640 nr_frags = tx_info->num_of_bufs - 1; 641 for (j = 0; j < nr_frags; j++) { 642 ena_buf++; 643 dma_unmap_page(tx_ring->dev, 644 ena_buf->paddr, 645 ena_buf->len, 646 DMA_TO_DEVICE); 647 } 648 649 dev_kfree_skb_any(tx_info->skb); 650 } 651 netdev_tx_reset_queue(netdev_get_tx_queue(tx_ring->netdev, 652 tx_ring->qid)); 653 } 654 655 static void ena_free_all_tx_bufs(struct ena_adapter *adapter) 656 { 657 struct ena_ring *tx_ring; 658 int i; 659 660 for (i = 0; i < adapter->num_queues; i++) { 661 tx_ring = &adapter->tx_ring[i]; 662 ena_free_tx_bufs(tx_ring); 663 } 664 } 665 666 static void ena_destroy_all_tx_queues(struct ena_adapter *adapter) 667 { 668 u16 ena_qid; 669 int i; 670 671 for (i = 0; i < adapter->num_queues; i++) { 672 ena_qid = ENA_IO_TXQ_IDX(i); 673 ena_com_destroy_io_queue(adapter->ena_dev, ena_qid); 674 } 675 } 676 677 static void ena_destroy_all_rx_queues(struct ena_adapter *adapter) 678 { 679 u16 ena_qid; 680 int i; 681 682 for (i = 0; i < adapter->num_queues; i++) { 683 ena_qid = ENA_IO_RXQ_IDX(i); 684 ena_com_destroy_io_queue(adapter->ena_dev, ena_qid); 685 } 686 } 687 688 static void ena_destroy_all_io_queues(struct ena_adapter *adapter) 689 { 690 ena_destroy_all_tx_queues(adapter); 691 ena_destroy_all_rx_queues(adapter); 692 } 693 694 static int validate_tx_req_id(struct ena_ring *tx_ring, u16 req_id) 695 { 696 struct ena_tx_buffer *tx_info = NULL; 697 698 if (likely(req_id < tx_ring->ring_size)) { 699 tx_info = &tx_ring->tx_buffer_info[req_id]; 700 if (likely(tx_info->skb)) 701 return 0; 702 } 703 704 if (tx_info) 705 netif_err(tx_ring->adapter, tx_done, tx_ring->netdev, 706 "tx_info doesn't have valid skb\n"); 707 else 708 netif_err(tx_ring->adapter, tx_done, tx_ring->netdev, 709 "Invalid req_id: %hu\n", req_id); 710 711 u64_stats_update_begin(&tx_ring->syncp); 712 tx_ring->tx_stats.bad_req_id++; 713 u64_stats_update_end(&tx_ring->syncp); 714 715 /* Trigger device reset */ 716 tx_ring->adapter->reset_reason = ENA_REGS_RESET_INV_TX_REQ_ID; 717 set_bit(ENA_FLAG_TRIGGER_RESET, &tx_ring->adapter->flags); 718 return -EFAULT; 719 } 720 721 static int ena_clean_tx_irq(struct ena_ring *tx_ring, u32 budget) 722 { 723 struct netdev_queue *txq; 724 bool above_thresh; 725 u32 tx_bytes = 0; 726 u32 total_done = 0; 727 u16 next_to_clean; 728 u16 req_id; 729 int tx_pkts = 0; 730 int rc; 731 732 next_to_clean = tx_ring->next_to_clean; 733 txq = netdev_get_tx_queue(tx_ring->netdev, tx_ring->qid); 734 735 while (tx_pkts < budget) { 736 struct ena_tx_buffer *tx_info; 737 struct sk_buff *skb; 738 struct ena_com_buf *ena_buf; 739 int i, nr_frags; 740 741 rc = ena_com_tx_comp_req_id_get(tx_ring->ena_com_io_cq, 742 &req_id); 743 if (rc) 744 break; 745 746 rc = validate_tx_req_id(tx_ring, req_id); 747 if (rc) 748 break; 749 750 tx_info = &tx_ring->tx_buffer_info[req_id]; 751 skb = tx_info->skb; 752 753 /* prefetch skb_end_pointer() to speedup skb_shinfo(skb) */ 754 prefetch(&skb->end); 755 756 tx_info->skb = NULL; 757 tx_info->last_jiffies = 0; 758 759 if (likely(tx_info->num_of_bufs != 0)) { 760 ena_buf = tx_info->bufs; 761 762 dma_unmap_single(tx_ring->dev, 763 dma_unmap_addr(ena_buf, paddr), 764 dma_unmap_len(ena_buf, len), 765 DMA_TO_DEVICE); 766 767 /* unmap remaining mapped pages */ 768 nr_frags = tx_info->num_of_bufs - 1; 769 for (i = 0; i < nr_frags; i++) { 770 ena_buf++; 771 dma_unmap_page(tx_ring->dev, 772 dma_unmap_addr(ena_buf, paddr), 773 dma_unmap_len(ena_buf, len), 774 DMA_TO_DEVICE); 775 } 776 } 777 778 netif_dbg(tx_ring->adapter, tx_done, tx_ring->netdev, 779 "tx_poll: q %d skb %p completed\n", tx_ring->qid, 780 skb); 781 782 tx_bytes += skb->len; 783 dev_kfree_skb(skb); 784 tx_pkts++; 785 total_done += tx_info->tx_descs; 786 787 tx_ring->free_tx_ids[next_to_clean] = req_id; 788 next_to_clean = ENA_TX_RING_IDX_NEXT(next_to_clean, 789 tx_ring->ring_size); 790 } 791 792 tx_ring->next_to_clean = next_to_clean; 793 ena_com_comp_ack(tx_ring->ena_com_io_sq, total_done); 794 ena_com_update_dev_comp_head(tx_ring->ena_com_io_cq); 795 796 netdev_tx_completed_queue(txq, tx_pkts, tx_bytes); 797 798 netif_dbg(tx_ring->adapter, tx_done, tx_ring->netdev, 799 "tx_poll: q %d done. total pkts: %d\n", 800 tx_ring->qid, tx_pkts); 801 802 /* need to make the rings circular update visible to 803 * ena_start_xmit() before checking for netif_queue_stopped(). 804 */ 805 smp_mb(); 806 807 above_thresh = ena_com_sq_empty_space(tx_ring->ena_com_io_sq) > 808 ENA_TX_WAKEUP_THRESH; 809 if (unlikely(netif_tx_queue_stopped(txq) && above_thresh)) { 810 __netif_tx_lock(txq, smp_processor_id()); 811 above_thresh = ena_com_sq_empty_space(tx_ring->ena_com_io_sq) > 812 ENA_TX_WAKEUP_THRESH; 813 if (netif_tx_queue_stopped(txq) && above_thresh) { 814 netif_tx_wake_queue(txq); 815 u64_stats_update_begin(&tx_ring->syncp); 816 tx_ring->tx_stats.queue_wakeup++; 817 u64_stats_update_end(&tx_ring->syncp); 818 } 819 __netif_tx_unlock(txq); 820 } 821 822 tx_ring->per_napi_bytes += tx_bytes; 823 tx_ring->per_napi_packets += tx_pkts; 824 825 return tx_pkts; 826 } 827 828 static struct sk_buff *ena_alloc_skb(struct ena_ring *rx_ring, bool frags) 829 { 830 struct sk_buff *skb; 831 832 if (frags) 833 skb = napi_get_frags(rx_ring->napi); 834 else 835 skb = netdev_alloc_skb_ip_align(rx_ring->netdev, 836 rx_ring->rx_copybreak); 837 838 if (unlikely(!skb)) { 839 u64_stats_update_begin(&rx_ring->syncp); 840 rx_ring->rx_stats.skb_alloc_fail++; 841 u64_stats_update_end(&rx_ring->syncp); 842 netif_dbg(rx_ring->adapter, rx_err, rx_ring->netdev, 843 "Failed to allocate skb. frags: %d\n", frags); 844 return NULL; 845 } 846 847 return skb; 848 } 849 850 static struct sk_buff *ena_rx_skb(struct ena_ring *rx_ring, 851 struct ena_com_rx_buf_info *ena_bufs, 852 u32 descs, 853 u16 *next_to_clean) 854 { 855 struct sk_buff *skb; 856 struct ena_rx_buffer *rx_info; 857 u16 len, req_id, buf = 0; 858 void *va; 859 860 len = ena_bufs[buf].len; 861 req_id = ena_bufs[buf].req_id; 862 rx_info = &rx_ring->rx_buffer_info[req_id]; 863 864 if (unlikely(!rx_info->page)) { 865 netif_err(rx_ring->adapter, rx_err, rx_ring->netdev, 866 "Page is NULL\n"); 867 return NULL; 868 } 869 870 netif_dbg(rx_ring->adapter, rx_status, rx_ring->netdev, 871 "rx_info %p page %p\n", 872 rx_info, rx_info->page); 873 874 /* save virt address of first buffer */ 875 va = page_address(rx_info->page) + rx_info->page_offset; 876 prefetch(va + NET_IP_ALIGN); 877 878 if (len <= rx_ring->rx_copybreak) { 879 skb = ena_alloc_skb(rx_ring, false); 880 if (unlikely(!skb)) 881 return NULL; 882 883 netif_dbg(rx_ring->adapter, rx_status, rx_ring->netdev, 884 "rx allocated small packet. len %d. data_len %d\n", 885 skb->len, skb->data_len); 886 887 /* sync this buffer for CPU use */ 888 dma_sync_single_for_cpu(rx_ring->dev, 889 dma_unmap_addr(&rx_info->ena_buf, paddr), 890 len, 891 DMA_FROM_DEVICE); 892 skb_copy_to_linear_data(skb, va, len); 893 dma_sync_single_for_device(rx_ring->dev, 894 dma_unmap_addr(&rx_info->ena_buf, paddr), 895 len, 896 DMA_FROM_DEVICE); 897 898 skb_put(skb, len); 899 skb->protocol = eth_type_trans(skb, rx_ring->netdev); 900 rx_ring->free_rx_ids[*next_to_clean] = req_id; 901 *next_to_clean = ENA_RX_RING_IDX_ADD(*next_to_clean, descs, 902 rx_ring->ring_size); 903 return skb; 904 } 905 906 skb = ena_alloc_skb(rx_ring, true); 907 if (unlikely(!skb)) 908 return NULL; 909 910 do { 911 dma_unmap_page(rx_ring->dev, 912 dma_unmap_addr(&rx_info->ena_buf, paddr), 913 ENA_PAGE_SIZE, DMA_FROM_DEVICE); 914 915 skb_add_rx_frag(skb, skb_shinfo(skb)->nr_frags, rx_info->page, 916 rx_info->page_offset, len, ENA_PAGE_SIZE); 917 918 netif_dbg(rx_ring->adapter, rx_status, rx_ring->netdev, 919 "rx skb updated. len %d. data_len %d\n", 920 skb->len, skb->data_len); 921 922 rx_info->page = NULL; 923 924 rx_ring->free_rx_ids[*next_to_clean] = req_id; 925 *next_to_clean = 926 ENA_RX_RING_IDX_NEXT(*next_to_clean, 927 rx_ring->ring_size); 928 if (likely(--descs == 0)) 929 break; 930 931 buf++; 932 len = ena_bufs[buf].len; 933 req_id = ena_bufs[buf].req_id; 934 rx_info = &rx_ring->rx_buffer_info[req_id]; 935 } while (1); 936 937 return skb; 938 } 939 940 /* ena_rx_checksum - indicate in skb if hw indicated a good cksum 941 * @adapter: structure containing adapter specific data 942 * @ena_rx_ctx: received packet context/metadata 943 * @skb: skb currently being received and modified 944 */ 945 static inline void ena_rx_checksum(struct ena_ring *rx_ring, 946 struct ena_com_rx_ctx *ena_rx_ctx, 947 struct sk_buff *skb) 948 { 949 /* Rx csum disabled */ 950 if (unlikely(!(rx_ring->netdev->features & NETIF_F_RXCSUM))) { 951 skb->ip_summed = CHECKSUM_NONE; 952 return; 953 } 954 955 /* For fragmented packets the checksum isn't valid */ 956 if (ena_rx_ctx->frag) { 957 skb->ip_summed = CHECKSUM_NONE; 958 return; 959 } 960 961 /* if IP and error */ 962 if (unlikely((ena_rx_ctx->l3_proto == ENA_ETH_IO_L3_PROTO_IPV4) && 963 (ena_rx_ctx->l3_csum_err))) { 964 /* ipv4 checksum error */ 965 skb->ip_summed = CHECKSUM_NONE; 966 u64_stats_update_begin(&rx_ring->syncp); 967 rx_ring->rx_stats.bad_csum++; 968 u64_stats_update_end(&rx_ring->syncp); 969 netif_dbg(rx_ring->adapter, rx_err, rx_ring->netdev, 970 "RX IPv4 header checksum error\n"); 971 return; 972 } 973 974 /* if TCP/UDP */ 975 if (likely((ena_rx_ctx->l4_proto == ENA_ETH_IO_L4_PROTO_TCP) || 976 (ena_rx_ctx->l4_proto == ENA_ETH_IO_L4_PROTO_UDP))) { 977 if (unlikely(ena_rx_ctx->l4_csum_err)) { 978 /* TCP/UDP checksum error */ 979 u64_stats_update_begin(&rx_ring->syncp); 980 rx_ring->rx_stats.bad_csum++; 981 u64_stats_update_end(&rx_ring->syncp); 982 netif_dbg(rx_ring->adapter, rx_err, rx_ring->netdev, 983 "RX L4 checksum error\n"); 984 skb->ip_summed = CHECKSUM_NONE; 985 return; 986 } 987 988 skb->ip_summed = CHECKSUM_UNNECESSARY; 989 } 990 } 991 992 static void ena_set_rx_hash(struct ena_ring *rx_ring, 993 struct ena_com_rx_ctx *ena_rx_ctx, 994 struct sk_buff *skb) 995 { 996 enum pkt_hash_types hash_type; 997 998 if (likely(rx_ring->netdev->features & NETIF_F_RXHASH)) { 999 if (likely((ena_rx_ctx->l4_proto == ENA_ETH_IO_L4_PROTO_TCP) || 1000 (ena_rx_ctx->l4_proto == ENA_ETH_IO_L4_PROTO_UDP))) 1001 1002 hash_type = PKT_HASH_TYPE_L4; 1003 else 1004 hash_type = PKT_HASH_TYPE_NONE; 1005 1006 /* Override hash type if the packet is fragmented */ 1007 if (ena_rx_ctx->frag) 1008 hash_type = PKT_HASH_TYPE_NONE; 1009 1010 skb_set_hash(skb, ena_rx_ctx->hash, hash_type); 1011 } 1012 } 1013 1014 /* ena_clean_rx_irq - Cleanup RX irq 1015 * @rx_ring: RX ring to clean 1016 * @napi: napi handler 1017 * @budget: how many packets driver is allowed to clean 1018 * 1019 * Returns the number of cleaned buffers. 1020 */ 1021 static int ena_clean_rx_irq(struct ena_ring *rx_ring, struct napi_struct *napi, 1022 u32 budget) 1023 { 1024 u16 next_to_clean = rx_ring->next_to_clean; 1025 u32 res_budget, work_done; 1026 1027 struct ena_com_rx_ctx ena_rx_ctx; 1028 struct ena_adapter *adapter; 1029 struct sk_buff *skb; 1030 int refill_required; 1031 int refill_threshold; 1032 int rc = 0; 1033 int total_len = 0; 1034 int rx_copybreak_pkt = 0; 1035 int i; 1036 1037 netif_dbg(rx_ring->adapter, rx_status, rx_ring->netdev, 1038 "%s qid %d\n", __func__, rx_ring->qid); 1039 res_budget = budget; 1040 1041 do { 1042 ena_rx_ctx.ena_bufs = rx_ring->ena_bufs; 1043 ena_rx_ctx.max_bufs = rx_ring->sgl_size; 1044 ena_rx_ctx.descs = 0; 1045 rc = ena_com_rx_pkt(rx_ring->ena_com_io_cq, 1046 rx_ring->ena_com_io_sq, 1047 &ena_rx_ctx); 1048 if (unlikely(rc)) 1049 goto error; 1050 1051 if (unlikely(ena_rx_ctx.descs == 0)) 1052 break; 1053 1054 netif_dbg(rx_ring->adapter, rx_status, rx_ring->netdev, 1055 "rx_poll: q %d got packet from ena. descs #: %d l3 proto %d l4 proto %d hash: %x\n", 1056 rx_ring->qid, ena_rx_ctx.descs, ena_rx_ctx.l3_proto, 1057 ena_rx_ctx.l4_proto, ena_rx_ctx.hash); 1058 1059 /* allocate skb and fill it */ 1060 skb = ena_rx_skb(rx_ring, rx_ring->ena_bufs, ena_rx_ctx.descs, 1061 &next_to_clean); 1062 1063 /* exit if we failed to retrieve a buffer */ 1064 if (unlikely(!skb)) { 1065 for (i = 0; i < ena_rx_ctx.descs; i++) { 1066 rx_ring->free_tx_ids[next_to_clean] = 1067 rx_ring->ena_bufs[i].req_id; 1068 next_to_clean = 1069 ENA_RX_RING_IDX_NEXT(next_to_clean, 1070 rx_ring->ring_size); 1071 } 1072 break; 1073 } 1074 1075 ena_rx_checksum(rx_ring, &ena_rx_ctx, skb); 1076 1077 ena_set_rx_hash(rx_ring, &ena_rx_ctx, skb); 1078 1079 skb_record_rx_queue(skb, rx_ring->qid); 1080 1081 if (rx_ring->ena_bufs[0].len <= rx_ring->rx_copybreak) { 1082 total_len += rx_ring->ena_bufs[0].len; 1083 rx_copybreak_pkt++; 1084 napi_gro_receive(napi, skb); 1085 } else { 1086 total_len += skb->len; 1087 napi_gro_frags(napi); 1088 } 1089 1090 res_budget--; 1091 } while (likely(res_budget)); 1092 1093 work_done = budget - res_budget; 1094 rx_ring->per_napi_bytes += total_len; 1095 rx_ring->per_napi_packets += work_done; 1096 u64_stats_update_begin(&rx_ring->syncp); 1097 rx_ring->rx_stats.bytes += total_len; 1098 rx_ring->rx_stats.cnt += work_done; 1099 rx_ring->rx_stats.rx_copybreak_pkt += rx_copybreak_pkt; 1100 u64_stats_update_end(&rx_ring->syncp); 1101 1102 rx_ring->next_to_clean = next_to_clean; 1103 1104 refill_required = ena_com_sq_empty_space(rx_ring->ena_com_io_sq); 1105 refill_threshold = rx_ring->ring_size / ENA_RX_REFILL_THRESH_DIVIDER; 1106 1107 /* Optimization, try to batch new rx buffers */ 1108 if (refill_required > refill_threshold) { 1109 ena_com_update_dev_comp_head(rx_ring->ena_com_io_cq); 1110 ena_refill_rx_bufs(rx_ring, refill_required); 1111 } 1112 1113 return work_done; 1114 1115 error: 1116 adapter = netdev_priv(rx_ring->netdev); 1117 1118 u64_stats_update_begin(&rx_ring->syncp); 1119 rx_ring->rx_stats.bad_desc_num++; 1120 u64_stats_update_end(&rx_ring->syncp); 1121 1122 /* Too many desc from the device. Trigger reset */ 1123 adapter->reset_reason = ENA_REGS_RESET_TOO_MANY_RX_DESCS; 1124 set_bit(ENA_FLAG_TRIGGER_RESET, &adapter->flags); 1125 1126 return 0; 1127 } 1128 1129 inline void ena_adjust_intr_moderation(struct ena_ring *rx_ring, 1130 struct ena_ring *tx_ring) 1131 { 1132 /* We apply adaptive moderation on Rx path only. 1133 * Tx uses static interrupt moderation. 1134 */ 1135 ena_com_calculate_interrupt_delay(rx_ring->ena_dev, 1136 rx_ring->per_napi_packets, 1137 rx_ring->per_napi_bytes, 1138 &rx_ring->smoothed_interval, 1139 &rx_ring->moder_tbl_idx); 1140 1141 /* Reset per napi packets/bytes */ 1142 tx_ring->per_napi_packets = 0; 1143 tx_ring->per_napi_bytes = 0; 1144 rx_ring->per_napi_packets = 0; 1145 rx_ring->per_napi_bytes = 0; 1146 } 1147 1148 static inline void ena_unmask_interrupt(struct ena_ring *tx_ring, 1149 struct ena_ring *rx_ring) 1150 { 1151 struct ena_eth_io_intr_reg intr_reg; 1152 1153 /* Update intr register: rx intr delay, 1154 * tx intr delay and interrupt unmask 1155 */ 1156 ena_com_update_intr_reg(&intr_reg, 1157 rx_ring->smoothed_interval, 1158 tx_ring->smoothed_interval, 1159 true); 1160 1161 /* It is a shared MSI-X. 1162 * Tx and Rx CQ have pointer to it. 1163 * So we use one of them to reach the intr reg 1164 */ 1165 ena_com_unmask_intr(rx_ring->ena_com_io_cq, &intr_reg); 1166 } 1167 1168 static inline void ena_update_ring_numa_node(struct ena_ring *tx_ring, 1169 struct ena_ring *rx_ring) 1170 { 1171 int cpu = get_cpu(); 1172 int numa_node; 1173 1174 /* Check only one ring since the 2 rings are running on the same cpu */ 1175 if (likely(tx_ring->cpu == cpu)) 1176 goto out; 1177 1178 numa_node = cpu_to_node(cpu); 1179 put_cpu(); 1180 1181 if (numa_node != NUMA_NO_NODE) { 1182 ena_com_update_numa_node(tx_ring->ena_com_io_cq, numa_node); 1183 ena_com_update_numa_node(rx_ring->ena_com_io_cq, numa_node); 1184 } 1185 1186 tx_ring->cpu = cpu; 1187 rx_ring->cpu = cpu; 1188 1189 return; 1190 out: 1191 put_cpu(); 1192 } 1193 1194 static int ena_io_poll(struct napi_struct *napi, int budget) 1195 { 1196 struct ena_napi *ena_napi = container_of(napi, struct ena_napi, napi); 1197 struct ena_ring *tx_ring, *rx_ring; 1198 1199 u32 tx_work_done; 1200 u32 rx_work_done; 1201 int tx_budget; 1202 int napi_comp_call = 0; 1203 int ret; 1204 1205 tx_ring = ena_napi->tx_ring; 1206 rx_ring = ena_napi->rx_ring; 1207 1208 tx_budget = tx_ring->ring_size / ENA_TX_POLL_BUDGET_DIVIDER; 1209 1210 if (!test_bit(ENA_FLAG_DEV_UP, &tx_ring->adapter->flags) || 1211 test_bit(ENA_FLAG_TRIGGER_RESET, &tx_ring->adapter->flags)) { 1212 napi_complete_done(napi, 0); 1213 return 0; 1214 } 1215 1216 tx_work_done = ena_clean_tx_irq(tx_ring, tx_budget); 1217 rx_work_done = ena_clean_rx_irq(rx_ring, napi, budget); 1218 1219 /* If the device is about to reset or down, avoid unmask 1220 * the interrupt and return 0 so NAPI won't reschedule 1221 */ 1222 if (unlikely(!test_bit(ENA_FLAG_DEV_UP, &tx_ring->adapter->flags) || 1223 test_bit(ENA_FLAG_TRIGGER_RESET, &tx_ring->adapter->flags))) { 1224 napi_complete_done(napi, 0); 1225 ret = 0; 1226 1227 } else if ((budget > rx_work_done) && (tx_budget > tx_work_done)) { 1228 napi_comp_call = 1; 1229 1230 /* Update numa and unmask the interrupt only when schedule 1231 * from the interrupt context (vs from sk_busy_loop) 1232 */ 1233 if (napi_complete_done(napi, rx_work_done)) { 1234 /* Tx and Rx share the same interrupt vector */ 1235 if (ena_com_get_adaptive_moderation_enabled(rx_ring->ena_dev)) 1236 ena_adjust_intr_moderation(rx_ring, tx_ring); 1237 1238 ena_unmask_interrupt(tx_ring, rx_ring); 1239 } 1240 1241 ena_update_ring_numa_node(tx_ring, rx_ring); 1242 1243 ret = rx_work_done; 1244 } else { 1245 ret = budget; 1246 } 1247 1248 u64_stats_update_begin(&tx_ring->syncp); 1249 tx_ring->tx_stats.napi_comp += napi_comp_call; 1250 tx_ring->tx_stats.tx_poll++; 1251 u64_stats_update_end(&tx_ring->syncp); 1252 1253 return ret; 1254 } 1255 1256 static irqreturn_t ena_intr_msix_mgmnt(int irq, void *data) 1257 { 1258 struct ena_adapter *adapter = (struct ena_adapter *)data; 1259 1260 ena_com_admin_q_comp_intr_handler(adapter->ena_dev); 1261 1262 /* Don't call the aenq handler before probe is done */ 1263 if (likely(test_bit(ENA_FLAG_DEVICE_RUNNING, &adapter->flags))) 1264 ena_com_aenq_intr_handler(adapter->ena_dev, data); 1265 1266 return IRQ_HANDLED; 1267 } 1268 1269 /* ena_intr_msix_io - MSI-X Interrupt Handler for Tx/Rx 1270 * @irq: interrupt number 1271 * @data: pointer to a network interface private napi device structure 1272 */ 1273 static irqreturn_t ena_intr_msix_io(int irq, void *data) 1274 { 1275 struct ena_napi *ena_napi = data; 1276 1277 ena_napi->tx_ring->first_interrupt = true; 1278 ena_napi->rx_ring->first_interrupt = true; 1279 1280 napi_schedule_irqoff(&ena_napi->napi); 1281 1282 return IRQ_HANDLED; 1283 } 1284 1285 /* Reserve a single MSI-X vector for management (admin + aenq). 1286 * plus reserve one vector for each potential io queue. 1287 * the number of potential io queues is the minimum of what the device 1288 * supports and the number of vCPUs. 1289 */ 1290 static int ena_enable_msix(struct ena_adapter *adapter, int num_queues) 1291 { 1292 int msix_vecs, irq_cnt; 1293 1294 if (test_bit(ENA_FLAG_MSIX_ENABLED, &adapter->flags)) { 1295 netif_err(adapter, probe, adapter->netdev, 1296 "Error, MSI-X is already enabled\n"); 1297 return -EPERM; 1298 } 1299 1300 /* Reserved the max msix vectors we might need */ 1301 msix_vecs = ENA_MAX_MSIX_VEC(num_queues); 1302 1303 netif_dbg(adapter, probe, adapter->netdev, 1304 "trying to enable MSI-X, vectors %d\n", msix_vecs); 1305 1306 irq_cnt = pci_alloc_irq_vectors(adapter->pdev, ENA_MIN_MSIX_VEC, 1307 msix_vecs, PCI_IRQ_MSIX); 1308 1309 if (irq_cnt < 0) { 1310 netif_err(adapter, probe, adapter->netdev, 1311 "Failed to enable MSI-X. irq_cnt %d\n", irq_cnt); 1312 return -ENOSPC; 1313 } 1314 1315 if (irq_cnt != msix_vecs) { 1316 netif_notice(adapter, probe, adapter->netdev, 1317 "enable only %d MSI-X (out of %d), reduce the number of queues\n", 1318 irq_cnt, msix_vecs); 1319 adapter->num_queues = irq_cnt - ENA_ADMIN_MSIX_VEC; 1320 } 1321 1322 if (ena_init_rx_cpu_rmap(adapter)) 1323 netif_warn(adapter, probe, adapter->netdev, 1324 "Failed to map IRQs to CPUs\n"); 1325 1326 adapter->msix_vecs = irq_cnt; 1327 set_bit(ENA_FLAG_MSIX_ENABLED, &adapter->flags); 1328 1329 return 0; 1330 } 1331 1332 static void ena_setup_mgmnt_intr(struct ena_adapter *adapter) 1333 { 1334 u32 cpu; 1335 1336 snprintf(adapter->irq_tbl[ENA_MGMNT_IRQ_IDX].name, 1337 ENA_IRQNAME_SIZE, "ena-mgmnt@pci:%s", 1338 pci_name(adapter->pdev)); 1339 adapter->irq_tbl[ENA_MGMNT_IRQ_IDX].handler = 1340 ena_intr_msix_mgmnt; 1341 adapter->irq_tbl[ENA_MGMNT_IRQ_IDX].data = adapter; 1342 adapter->irq_tbl[ENA_MGMNT_IRQ_IDX].vector = 1343 pci_irq_vector(adapter->pdev, ENA_MGMNT_IRQ_IDX); 1344 cpu = cpumask_first(cpu_online_mask); 1345 adapter->irq_tbl[ENA_MGMNT_IRQ_IDX].cpu = cpu; 1346 cpumask_set_cpu(cpu, 1347 &adapter->irq_tbl[ENA_MGMNT_IRQ_IDX].affinity_hint_mask); 1348 } 1349 1350 static void ena_setup_io_intr(struct ena_adapter *adapter) 1351 { 1352 struct net_device *netdev; 1353 int irq_idx, i, cpu; 1354 1355 netdev = adapter->netdev; 1356 1357 for (i = 0; i < adapter->num_queues; i++) { 1358 irq_idx = ENA_IO_IRQ_IDX(i); 1359 cpu = i % num_online_cpus(); 1360 1361 snprintf(adapter->irq_tbl[irq_idx].name, ENA_IRQNAME_SIZE, 1362 "%s-Tx-Rx-%d", netdev->name, i); 1363 adapter->irq_tbl[irq_idx].handler = ena_intr_msix_io; 1364 adapter->irq_tbl[irq_idx].data = &adapter->ena_napi[i]; 1365 adapter->irq_tbl[irq_idx].vector = 1366 pci_irq_vector(adapter->pdev, irq_idx); 1367 adapter->irq_tbl[irq_idx].cpu = cpu; 1368 1369 cpumask_set_cpu(cpu, 1370 &adapter->irq_tbl[irq_idx].affinity_hint_mask); 1371 } 1372 } 1373 1374 static int ena_request_mgmnt_irq(struct ena_adapter *adapter) 1375 { 1376 unsigned long flags = 0; 1377 struct ena_irq *irq; 1378 int rc; 1379 1380 irq = &adapter->irq_tbl[ENA_MGMNT_IRQ_IDX]; 1381 rc = request_irq(irq->vector, irq->handler, flags, irq->name, 1382 irq->data); 1383 if (rc) { 1384 netif_err(adapter, probe, adapter->netdev, 1385 "failed to request admin irq\n"); 1386 return rc; 1387 } 1388 1389 netif_dbg(adapter, probe, adapter->netdev, 1390 "set affinity hint of mgmnt irq.to 0x%lx (irq vector: %d)\n", 1391 irq->affinity_hint_mask.bits[0], irq->vector); 1392 1393 irq_set_affinity_hint(irq->vector, &irq->affinity_hint_mask); 1394 1395 return rc; 1396 } 1397 1398 static int ena_request_io_irq(struct ena_adapter *adapter) 1399 { 1400 unsigned long flags = 0; 1401 struct ena_irq *irq; 1402 int rc = 0, i, k; 1403 1404 if (!test_bit(ENA_FLAG_MSIX_ENABLED, &adapter->flags)) { 1405 netif_err(adapter, ifup, adapter->netdev, 1406 "Failed to request I/O IRQ: MSI-X is not enabled\n"); 1407 return -EINVAL; 1408 } 1409 1410 for (i = ENA_IO_IRQ_FIRST_IDX; i < adapter->msix_vecs; i++) { 1411 irq = &adapter->irq_tbl[i]; 1412 rc = request_irq(irq->vector, irq->handler, flags, irq->name, 1413 irq->data); 1414 if (rc) { 1415 netif_err(adapter, ifup, adapter->netdev, 1416 "Failed to request I/O IRQ. index %d rc %d\n", 1417 i, rc); 1418 goto err; 1419 } 1420 1421 netif_dbg(adapter, ifup, adapter->netdev, 1422 "set affinity hint of irq. index %d to 0x%lx (irq vector: %d)\n", 1423 i, irq->affinity_hint_mask.bits[0], irq->vector); 1424 1425 irq_set_affinity_hint(irq->vector, &irq->affinity_hint_mask); 1426 } 1427 1428 return rc; 1429 1430 err: 1431 for (k = ENA_IO_IRQ_FIRST_IDX; k < i; k++) { 1432 irq = &adapter->irq_tbl[k]; 1433 free_irq(irq->vector, irq->data); 1434 } 1435 1436 return rc; 1437 } 1438 1439 static void ena_free_mgmnt_irq(struct ena_adapter *adapter) 1440 { 1441 struct ena_irq *irq; 1442 1443 irq = &adapter->irq_tbl[ENA_MGMNT_IRQ_IDX]; 1444 synchronize_irq(irq->vector); 1445 irq_set_affinity_hint(irq->vector, NULL); 1446 free_irq(irq->vector, irq->data); 1447 } 1448 1449 static void ena_free_io_irq(struct ena_adapter *adapter) 1450 { 1451 struct ena_irq *irq; 1452 int i; 1453 1454 #ifdef CONFIG_RFS_ACCEL 1455 if (adapter->msix_vecs >= 1) { 1456 free_irq_cpu_rmap(adapter->netdev->rx_cpu_rmap); 1457 adapter->netdev->rx_cpu_rmap = NULL; 1458 } 1459 #endif /* CONFIG_RFS_ACCEL */ 1460 1461 for (i = ENA_IO_IRQ_FIRST_IDX; i < adapter->msix_vecs; i++) { 1462 irq = &adapter->irq_tbl[i]; 1463 irq_set_affinity_hint(irq->vector, NULL); 1464 free_irq(irq->vector, irq->data); 1465 } 1466 } 1467 1468 static void ena_disable_msix(struct ena_adapter *adapter) 1469 { 1470 if (test_and_clear_bit(ENA_FLAG_MSIX_ENABLED, &adapter->flags)) 1471 pci_free_irq_vectors(adapter->pdev); 1472 } 1473 1474 static void ena_disable_io_intr_sync(struct ena_adapter *adapter) 1475 { 1476 int i; 1477 1478 if (!netif_running(adapter->netdev)) 1479 return; 1480 1481 for (i = ENA_IO_IRQ_FIRST_IDX; i < adapter->msix_vecs; i++) 1482 synchronize_irq(adapter->irq_tbl[i].vector); 1483 } 1484 1485 static void ena_del_napi(struct ena_adapter *adapter) 1486 { 1487 int i; 1488 1489 for (i = 0; i < adapter->num_queues; i++) 1490 netif_napi_del(&adapter->ena_napi[i].napi); 1491 } 1492 1493 static void ena_init_napi(struct ena_adapter *adapter) 1494 { 1495 struct ena_napi *napi; 1496 int i; 1497 1498 for (i = 0; i < adapter->num_queues; i++) { 1499 napi = &adapter->ena_napi[i]; 1500 1501 netif_napi_add(adapter->netdev, 1502 &adapter->ena_napi[i].napi, 1503 ena_io_poll, 1504 ENA_NAPI_BUDGET); 1505 napi->rx_ring = &adapter->rx_ring[i]; 1506 napi->tx_ring = &adapter->tx_ring[i]; 1507 napi->qid = i; 1508 } 1509 } 1510 1511 static void ena_napi_disable_all(struct ena_adapter *adapter) 1512 { 1513 int i; 1514 1515 for (i = 0; i < adapter->num_queues; i++) 1516 napi_disable(&adapter->ena_napi[i].napi); 1517 } 1518 1519 static void ena_napi_enable_all(struct ena_adapter *adapter) 1520 { 1521 int i; 1522 1523 for (i = 0; i < adapter->num_queues; i++) 1524 napi_enable(&adapter->ena_napi[i].napi); 1525 } 1526 1527 static void ena_restore_ethtool_params(struct ena_adapter *adapter) 1528 { 1529 adapter->tx_usecs = 0; 1530 adapter->rx_usecs = 0; 1531 adapter->tx_frames = 1; 1532 adapter->rx_frames = 1; 1533 } 1534 1535 /* Configure the Rx forwarding */ 1536 static int ena_rss_configure(struct ena_adapter *adapter) 1537 { 1538 struct ena_com_dev *ena_dev = adapter->ena_dev; 1539 int rc; 1540 1541 /* In case the RSS table wasn't initialized by probe */ 1542 if (!ena_dev->rss.tbl_log_size) { 1543 rc = ena_rss_init_default(adapter); 1544 if (rc && (rc != -EOPNOTSUPP)) { 1545 netif_err(adapter, ifup, adapter->netdev, 1546 "Failed to init RSS rc: %d\n", rc); 1547 return rc; 1548 } 1549 } 1550 1551 /* Set indirect table */ 1552 rc = ena_com_indirect_table_set(ena_dev); 1553 if (unlikely(rc && rc != -EOPNOTSUPP)) 1554 return rc; 1555 1556 /* Configure hash function (if supported) */ 1557 rc = ena_com_set_hash_function(ena_dev); 1558 if (unlikely(rc && (rc != -EOPNOTSUPP))) 1559 return rc; 1560 1561 /* Configure hash inputs (if supported) */ 1562 rc = ena_com_set_hash_ctrl(ena_dev); 1563 if (unlikely(rc && (rc != -EOPNOTSUPP))) 1564 return rc; 1565 1566 return 0; 1567 } 1568 1569 static int ena_up_complete(struct ena_adapter *adapter) 1570 { 1571 int rc; 1572 1573 rc = ena_rss_configure(adapter); 1574 if (rc) 1575 return rc; 1576 1577 ena_init_napi(adapter); 1578 1579 ena_change_mtu(adapter->netdev, adapter->netdev->mtu); 1580 1581 ena_refill_all_rx_bufs(adapter); 1582 1583 /* enable transmits */ 1584 netif_tx_start_all_queues(adapter->netdev); 1585 1586 ena_restore_ethtool_params(adapter); 1587 1588 ena_napi_enable_all(adapter); 1589 1590 return 0; 1591 } 1592 1593 static int ena_create_io_tx_queue(struct ena_adapter *adapter, int qid) 1594 { 1595 struct ena_com_create_io_ctx ctx = { 0 }; 1596 struct ena_com_dev *ena_dev; 1597 struct ena_ring *tx_ring; 1598 u32 msix_vector; 1599 u16 ena_qid; 1600 int rc; 1601 1602 ena_dev = adapter->ena_dev; 1603 1604 tx_ring = &adapter->tx_ring[qid]; 1605 msix_vector = ENA_IO_IRQ_IDX(qid); 1606 ena_qid = ENA_IO_TXQ_IDX(qid); 1607 1608 ctx.direction = ENA_COM_IO_QUEUE_DIRECTION_TX; 1609 ctx.qid = ena_qid; 1610 ctx.mem_queue_type = ena_dev->tx_mem_queue_type; 1611 ctx.msix_vector = msix_vector; 1612 ctx.queue_size = adapter->tx_ring_size; 1613 ctx.numa_node = cpu_to_node(tx_ring->cpu); 1614 1615 rc = ena_com_create_io_queue(ena_dev, &ctx); 1616 if (rc) { 1617 netif_err(adapter, ifup, adapter->netdev, 1618 "Failed to create I/O TX queue num %d rc: %d\n", 1619 qid, rc); 1620 return rc; 1621 } 1622 1623 rc = ena_com_get_io_handlers(ena_dev, ena_qid, 1624 &tx_ring->ena_com_io_sq, 1625 &tx_ring->ena_com_io_cq); 1626 if (rc) { 1627 netif_err(adapter, ifup, adapter->netdev, 1628 "Failed to get TX queue handlers. TX queue num %d rc: %d\n", 1629 qid, rc); 1630 ena_com_destroy_io_queue(ena_dev, ena_qid); 1631 return rc; 1632 } 1633 1634 ena_com_update_numa_node(tx_ring->ena_com_io_cq, ctx.numa_node); 1635 return rc; 1636 } 1637 1638 static int ena_create_all_io_tx_queues(struct ena_adapter *adapter) 1639 { 1640 struct ena_com_dev *ena_dev = adapter->ena_dev; 1641 int rc, i; 1642 1643 for (i = 0; i < adapter->num_queues; i++) { 1644 rc = ena_create_io_tx_queue(adapter, i); 1645 if (rc) 1646 goto create_err; 1647 } 1648 1649 return 0; 1650 1651 create_err: 1652 while (i--) 1653 ena_com_destroy_io_queue(ena_dev, ENA_IO_TXQ_IDX(i)); 1654 1655 return rc; 1656 } 1657 1658 static int ena_create_io_rx_queue(struct ena_adapter *adapter, int qid) 1659 { 1660 struct ena_com_dev *ena_dev; 1661 struct ena_com_create_io_ctx ctx = { 0 }; 1662 struct ena_ring *rx_ring; 1663 u32 msix_vector; 1664 u16 ena_qid; 1665 int rc; 1666 1667 ena_dev = adapter->ena_dev; 1668 1669 rx_ring = &adapter->rx_ring[qid]; 1670 msix_vector = ENA_IO_IRQ_IDX(qid); 1671 ena_qid = ENA_IO_RXQ_IDX(qid); 1672 1673 ctx.qid = ena_qid; 1674 ctx.direction = ENA_COM_IO_QUEUE_DIRECTION_RX; 1675 ctx.mem_queue_type = ENA_ADMIN_PLACEMENT_POLICY_HOST; 1676 ctx.msix_vector = msix_vector; 1677 ctx.queue_size = adapter->rx_ring_size; 1678 ctx.numa_node = cpu_to_node(rx_ring->cpu); 1679 1680 rc = ena_com_create_io_queue(ena_dev, &ctx); 1681 if (rc) { 1682 netif_err(adapter, ifup, adapter->netdev, 1683 "Failed to create I/O RX queue num %d rc: %d\n", 1684 qid, rc); 1685 return rc; 1686 } 1687 1688 rc = ena_com_get_io_handlers(ena_dev, ena_qid, 1689 &rx_ring->ena_com_io_sq, 1690 &rx_ring->ena_com_io_cq); 1691 if (rc) { 1692 netif_err(adapter, ifup, adapter->netdev, 1693 "Failed to get RX queue handlers. RX queue num %d rc: %d\n", 1694 qid, rc); 1695 ena_com_destroy_io_queue(ena_dev, ena_qid); 1696 return rc; 1697 } 1698 1699 ena_com_update_numa_node(rx_ring->ena_com_io_cq, ctx.numa_node); 1700 1701 return rc; 1702 } 1703 1704 static int ena_create_all_io_rx_queues(struct ena_adapter *adapter) 1705 { 1706 struct ena_com_dev *ena_dev = adapter->ena_dev; 1707 int rc, i; 1708 1709 for (i = 0; i < adapter->num_queues; i++) { 1710 rc = ena_create_io_rx_queue(adapter, i); 1711 if (rc) 1712 goto create_err; 1713 } 1714 1715 return 0; 1716 1717 create_err: 1718 while (i--) 1719 ena_com_destroy_io_queue(ena_dev, ENA_IO_RXQ_IDX(i)); 1720 1721 return rc; 1722 } 1723 1724 static int ena_up(struct ena_adapter *adapter) 1725 { 1726 int rc, i; 1727 1728 netdev_dbg(adapter->netdev, "%s\n", __func__); 1729 1730 ena_setup_io_intr(adapter); 1731 1732 rc = ena_request_io_irq(adapter); 1733 if (rc) 1734 goto err_req_irq; 1735 1736 /* allocate transmit descriptors */ 1737 rc = ena_setup_all_tx_resources(adapter); 1738 if (rc) 1739 goto err_setup_tx; 1740 1741 /* allocate receive descriptors */ 1742 rc = ena_setup_all_rx_resources(adapter); 1743 if (rc) 1744 goto err_setup_rx; 1745 1746 /* Create TX queues */ 1747 rc = ena_create_all_io_tx_queues(adapter); 1748 if (rc) 1749 goto err_create_tx_queues; 1750 1751 /* Create RX queues */ 1752 rc = ena_create_all_io_rx_queues(adapter); 1753 if (rc) 1754 goto err_create_rx_queues; 1755 1756 rc = ena_up_complete(adapter); 1757 if (rc) 1758 goto err_up; 1759 1760 if (test_bit(ENA_FLAG_LINK_UP, &adapter->flags)) 1761 netif_carrier_on(adapter->netdev); 1762 1763 u64_stats_update_begin(&adapter->syncp); 1764 adapter->dev_stats.interface_up++; 1765 u64_stats_update_end(&adapter->syncp); 1766 1767 set_bit(ENA_FLAG_DEV_UP, &adapter->flags); 1768 1769 /* Enable completion queues interrupt */ 1770 for (i = 0; i < adapter->num_queues; i++) 1771 ena_unmask_interrupt(&adapter->tx_ring[i], 1772 &adapter->rx_ring[i]); 1773 1774 /* schedule napi in case we had pending packets 1775 * from the last time we disable napi 1776 */ 1777 for (i = 0; i < adapter->num_queues; i++) 1778 napi_schedule(&adapter->ena_napi[i].napi); 1779 1780 return rc; 1781 1782 err_up: 1783 ena_destroy_all_rx_queues(adapter); 1784 err_create_rx_queues: 1785 ena_destroy_all_tx_queues(adapter); 1786 err_create_tx_queues: 1787 ena_free_all_io_rx_resources(adapter); 1788 err_setup_rx: 1789 ena_free_all_io_tx_resources(adapter); 1790 err_setup_tx: 1791 ena_free_io_irq(adapter); 1792 err_req_irq: 1793 1794 return rc; 1795 } 1796 1797 static void ena_down(struct ena_adapter *adapter) 1798 { 1799 netif_info(adapter, ifdown, adapter->netdev, "%s\n", __func__); 1800 1801 clear_bit(ENA_FLAG_DEV_UP, &adapter->flags); 1802 1803 u64_stats_update_begin(&adapter->syncp); 1804 adapter->dev_stats.interface_down++; 1805 u64_stats_update_end(&adapter->syncp); 1806 1807 netif_carrier_off(adapter->netdev); 1808 netif_tx_disable(adapter->netdev); 1809 1810 /* After this point the napi handler won't enable the tx queue */ 1811 ena_napi_disable_all(adapter); 1812 1813 /* After destroy the queue there won't be any new interrupts */ 1814 1815 if (test_bit(ENA_FLAG_TRIGGER_RESET, &adapter->flags)) { 1816 int rc; 1817 1818 rc = ena_com_dev_reset(adapter->ena_dev, adapter->reset_reason); 1819 if (rc) 1820 dev_err(&adapter->pdev->dev, "Device reset failed\n"); 1821 } 1822 1823 ena_destroy_all_io_queues(adapter); 1824 1825 ena_disable_io_intr_sync(adapter); 1826 ena_free_io_irq(adapter); 1827 ena_del_napi(adapter); 1828 1829 ena_free_all_tx_bufs(adapter); 1830 ena_free_all_rx_bufs(adapter); 1831 ena_free_all_io_tx_resources(adapter); 1832 ena_free_all_io_rx_resources(adapter); 1833 } 1834 1835 /* ena_open - Called when a network interface is made active 1836 * @netdev: network interface device structure 1837 * 1838 * Returns 0 on success, negative value on failure 1839 * 1840 * The open entry point is called when a network interface is made 1841 * active by the system (IFF_UP). At this point all resources needed 1842 * for transmit and receive operations are allocated, the interrupt 1843 * handler is registered with the OS, the watchdog timer is started, 1844 * and the stack is notified that the interface is ready. 1845 */ 1846 static int ena_open(struct net_device *netdev) 1847 { 1848 struct ena_adapter *adapter = netdev_priv(netdev); 1849 int rc; 1850 1851 /* Notify the stack of the actual queue counts. */ 1852 rc = netif_set_real_num_tx_queues(netdev, adapter->num_queues); 1853 if (rc) { 1854 netif_err(adapter, ifup, netdev, "Can't set num tx queues\n"); 1855 return rc; 1856 } 1857 1858 rc = netif_set_real_num_rx_queues(netdev, adapter->num_queues); 1859 if (rc) { 1860 netif_err(adapter, ifup, netdev, "Can't set num rx queues\n"); 1861 return rc; 1862 } 1863 1864 rc = ena_up(adapter); 1865 if (rc) 1866 return rc; 1867 1868 return rc; 1869 } 1870 1871 /* ena_close - Disables a network interface 1872 * @netdev: network interface device structure 1873 * 1874 * Returns 0, this is not allowed to fail 1875 * 1876 * The close entry point is called when an interface is de-activated 1877 * by the OS. The hardware is still under the drivers control, but 1878 * needs to be disabled. A global MAC reset is issued to stop the 1879 * hardware, and all transmit and receive resources are freed. 1880 */ 1881 static int ena_close(struct net_device *netdev) 1882 { 1883 struct ena_adapter *adapter = netdev_priv(netdev); 1884 1885 netif_dbg(adapter, ifdown, netdev, "%s\n", __func__); 1886 1887 if (test_bit(ENA_FLAG_DEV_UP, &adapter->flags)) 1888 ena_down(adapter); 1889 1890 /* Check for device status and issue reset if needed*/ 1891 check_for_admin_com_state(adapter); 1892 if (unlikely(test_bit(ENA_FLAG_TRIGGER_RESET, &adapter->flags))) { 1893 netif_err(adapter, ifdown, adapter->netdev, 1894 "Destroy failure, restarting device\n"); 1895 ena_dump_stats_to_dmesg(adapter); 1896 /* rtnl lock already obtained in dev_ioctl() layer */ 1897 ena_destroy_device(adapter, false); 1898 ena_restore_device(adapter); 1899 } 1900 1901 return 0; 1902 } 1903 1904 static void ena_tx_csum(struct ena_com_tx_ctx *ena_tx_ctx, struct sk_buff *skb) 1905 { 1906 u32 mss = skb_shinfo(skb)->gso_size; 1907 struct ena_com_tx_meta *ena_meta = &ena_tx_ctx->ena_meta; 1908 u8 l4_protocol = 0; 1909 1910 if ((skb->ip_summed == CHECKSUM_PARTIAL) || mss) { 1911 ena_tx_ctx->l4_csum_enable = 1; 1912 if (mss) { 1913 ena_tx_ctx->tso_enable = 1; 1914 ena_meta->l4_hdr_len = tcp_hdr(skb)->doff; 1915 ena_tx_ctx->l4_csum_partial = 0; 1916 } else { 1917 ena_tx_ctx->tso_enable = 0; 1918 ena_meta->l4_hdr_len = 0; 1919 ena_tx_ctx->l4_csum_partial = 1; 1920 } 1921 1922 switch (ip_hdr(skb)->version) { 1923 case IPVERSION: 1924 ena_tx_ctx->l3_proto = ENA_ETH_IO_L3_PROTO_IPV4; 1925 if (ip_hdr(skb)->frag_off & htons(IP_DF)) 1926 ena_tx_ctx->df = 1; 1927 if (mss) 1928 ena_tx_ctx->l3_csum_enable = 1; 1929 l4_protocol = ip_hdr(skb)->protocol; 1930 break; 1931 case 6: 1932 ena_tx_ctx->l3_proto = ENA_ETH_IO_L3_PROTO_IPV6; 1933 l4_protocol = ipv6_hdr(skb)->nexthdr; 1934 break; 1935 default: 1936 break; 1937 } 1938 1939 if (l4_protocol == IPPROTO_TCP) 1940 ena_tx_ctx->l4_proto = ENA_ETH_IO_L4_PROTO_TCP; 1941 else 1942 ena_tx_ctx->l4_proto = ENA_ETH_IO_L4_PROTO_UDP; 1943 1944 ena_meta->mss = mss; 1945 ena_meta->l3_hdr_len = skb_network_header_len(skb); 1946 ena_meta->l3_hdr_offset = skb_network_offset(skb); 1947 ena_tx_ctx->meta_valid = 1; 1948 1949 } else { 1950 ena_tx_ctx->meta_valid = 0; 1951 } 1952 } 1953 1954 static int ena_check_and_linearize_skb(struct ena_ring *tx_ring, 1955 struct sk_buff *skb) 1956 { 1957 int num_frags, header_len, rc; 1958 1959 num_frags = skb_shinfo(skb)->nr_frags; 1960 header_len = skb_headlen(skb); 1961 1962 if (num_frags < tx_ring->sgl_size) 1963 return 0; 1964 1965 if ((num_frags == tx_ring->sgl_size) && 1966 (header_len < tx_ring->tx_max_header_size)) 1967 return 0; 1968 1969 u64_stats_update_begin(&tx_ring->syncp); 1970 tx_ring->tx_stats.linearize++; 1971 u64_stats_update_end(&tx_ring->syncp); 1972 1973 rc = skb_linearize(skb); 1974 if (unlikely(rc)) { 1975 u64_stats_update_begin(&tx_ring->syncp); 1976 tx_ring->tx_stats.linearize_failed++; 1977 u64_stats_update_end(&tx_ring->syncp); 1978 } 1979 1980 return rc; 1981 } 1982 1983 /* Called with netif_tx_lock. */ 1984 static netdev_tx_t ena_start_xmit(struct sk_buff *skb, struct net_device *dev) 1985 { 1986 struct ena_adapter *adapter = netdev_priv(dev); 1987 struct ena_tx_buffer *tx_info; 1988 struct ena_com_tx_ctx ena_tx_ctx; 1989 struct ena_ring *tx_ring; 1990 struct netdev_queue *txq; 1991 struct ena_com_buf *ena_buf; 1992 void *push_hdr; 1993 u32 len, last_frag; 1994 u16 next_to_use; 1995 u16 req_id; 1996 u16 push_len; 1997 u16 header_len; 1998 dma_addr_t dma; 1999 int qid, rc, nb_hw_desc; 2000 int i = -1; 2001 2002 netif_dbg(adapter, tx_queued, dev, "%s skb %p\n", __func__, skb); 2003 /* Determine which tx ring we will be placed on */ 2004 qid = skb_get_queue_mapping(skb); 2005 tx_ring = &adapter->tx_ring[qid]; 2006 txq = netdev_get_tx_queue(dev, qid); 2007 2008 rc = ena_check_and_linearize_skb(tx_ring, skb); 2009 if (unlikely(rc)) 2010 goto error_drop_packet; 2011 2012 skb_tx_timestamp(skb); 2013 len = skb_headlen(skb); 2014 2015 next_to_use = tx_ring->next_to_use; 2016 req_id = tx_ring->free_tx_ids[next_to_use]; 2017 tx_info = &tx_ring->tx_buffer_info[req_id]; 2018 tx_info->num_of_bufs = 0; 2019 2020 WARN(tx_info->skb, "SKB isn't NULL req_id %d\n", req_id); 2021 ena_buf = tx_info->bufs; 2022 tx_info->skb = skb; 2023 2024 if (tx_ring->tx_mem_queue_type == ENA_ADMIN_PLACEMENT_POLICY_DEV) { 2025 /* prepared the push buffer */ 2026 push_len = min_t(u32, len, tx_ring->tx_max_header_size); 2027 header_len = push_len; 2028 push_hdr = skb->data; 2029 } else { 2030 push_len = 0; 2031 header_len = min_t(u32, len, tx_ring->tx_max_header_size); 2032 push_hdr = NULL; 2033 } 2034 2035 netif_dbg(adapter, tx_queued, dev, 2036 "skb: %p header_buf->vaddr: %p push_len: %d\n", skb, 2037 push_hdr, push_len); 2038 2039 if (len > push_len) { 2040 dma = dma_map_single(tx_ring->dev, skb->data + push_len, 2041 len - push_len, DMA_TO_DEVICE); 2042 if (dma_mapping_error(tx_ring->dev, dma)) 2043 goto error_report_dma_error; 2044 2045 ena_buf->paddr = dma; 2046 ena_buf->len = len - push_len; 2047 2048 ena_buf++; 2049 tx_info->num_of_bufs++; 2050 } 2051 2052 last_frag = skb_shinfo(skb)->nr_frags; 2053 2054 for (i = 0; i < last_frag; i++) { 2055 const skb_frag_t *frag = &skb_shinfo(skb)->frags[i]; 2056 2057 len = skb_frag_size(frag); 2058 dma = skb_frag_dma_map(tx_ring->dev, frag, 0, len, 2059 DMA_TO_DEVICE); 2060 if (dma_mapping_error(tx_ring->dev, dma)) 2061 goto error_report_dma_error; 2062 2063 ena_buf->paddr = dma; 2064 ena_buf->len = len; 2065 ena_buf++; 2066 } 2067 2068 tx_info->num_of_bufs += last_frag; 2069 2070 memset(&ena_tx_ctx, 0x0, sizeof(struct ena_com_tx_ctx)); 2071 ena_tx_ctx.ena_bufs = tx_info->bufs; 2072 ena_tx_ctx.push_header = push_hdr; 2073 ena_tx_ctx.num_bufs = tx_info->num_of_bufs; 2074 ena_tx_ctx.req_id = req_id; 2075 ena_tx_ctx.header_len = header_len; 2076 2077 /* set flags and meta data */ 2078 ena_tx_csum(&ena_tx_ctx, skb); 2079 2080 /* prepare the packet's descriptors to dma engine */ 2081 rc = ena_com_prepare_tx(tx_ring->ena_com_io_sq, &ena_tx_ctx, 2082 &nb_hw_desc); 2083 2084 if (unlikely(rc)) { 2085 netif_err(adapter, tx_queued, dev, 2086 "failed to prepare tx bufs\n"); 2087 u64_stats_update_begin(&tx_ring->syncp); 2088 tx_ring->tx_stats.queue_stop++; 2089 tx_ring->tx_stats.prepare_ctx_err++; 2090 u64_stats_update_end(&tx_ring->syncp); 2091 netif_tx_stop_queue(txq); 2092 goto error_unmap_dma; 2093 } 2094 2095 netdev_tx_sent_queue(txq, skb->len); 2096 2097 u64_stats_update_begin(&tx_ring->syncp); 2098 tx_ring->tx_stats.cnt++; 2099 tx_ring->tx_stats.bytes += skb->len; 2100 u64_stats_update_end(&tx_ring->syncp); 2101 2102 tx_info->tx_descs = nb_hw_desc; 2103 tx_info->last_jiffies = jiffies; 2104 tx_info->print_once = 0; 2105 2106 tx_ring->next_to_use = ENA_TX_RING_IDX_NEXT(next_to_use, 2107 tx_ring->ring_size); 2108 2109 /* stop the queue when no more space available, the packet can have up 2110 * to sgl_size + 2. one for the meta descriptor and one for header 2111 * (if the header is larger than tx_max_header_size). 2112 */ 2113 if (unlikely(ena_com_sq_empty_space(tx_ring->ena_com_io_sq) < 2114 (tx_ring->sgl_size + 2))) { 2115 netif_dbg(adapter, tx_queued, dev, "%s stop queue %d\n", 2116 __func__, qid); 2117 2118 netif_tx_stop_queue(txq); 2119 u64_stats_update_begin(&tx_ring->syncp); 2120 tx_ring->tx_stats.queue_stop++; 2121 u64_stats_update_end(&tx_ring->syncp); 2122 2123 /* There is a rare condition where this function decide to 2124 * stop the queue but meanwhile clean_tx_irq updates 2125 * next_to_completion and terminates. 2126 * The queue will remain stopped forever. 2127 * To solve this issue add a mb() to make sure that 2128 * netif_tx_stop_queue() write is vissible before checking if 2129 * there is additional space in the queue. 2130 */ 2131 smp_mb(); 2132 2133 if (ena_com_sq_empty_space(tx_ring->ena_com_io_sq) 2134 > ENA_TX_WAKEUP_THRESH) { 2135 netif_tx_wake_queue(txq); 2136 u64_stats_update_begin(&tx_ring->syncp); 2137 tx_ring->tx_stats.queue_wakeup++; 2138 u64_stats_update_end(&tx_ring->syncp); 2139 } 2140 } 2141 2142 if (netif_xmit_stopped(txq) || !skb->xmit_more) { 2143 /* trigger the dma engine. ena_com_write_sq_doorbell() 2144 * has a mb 2145 */ 2146 ena_com_write_sq_doorbell(tx_ring->ena_com_io_sq); 2147 u64_stats_update_begin(&tx_ring->syncp); 2148 tx_ring->tx_stats.doorbells++; 2149 u64_stats_update_end(&tx_ring->syncp); 2150 } 2151 2152 return NETDEV_TX_OK; 2153 2154 error_report_dma_error: 2155 u64_stats_update_begin(&tx_ring->syncp); 2156 tx_ring->tx_stats.dma_mapping_err++; 2157 u64_stats_update_end(&tx_ring->syncp); 2158 netdev_warn(adapter->netdev, "failed to map skb\n"); 2159 2160 tx_info->skb = NULL; 2161 2162 error_unmap_dma: 2163 if (i >= 0) { 2164 /* save value of frag that failed */ 2165 last_frag = i; 2166 2167 /* start back at beginning and unmap skb */ 2168 tx_info->skb = NULL; 2169 ena_buf = tx_info->bufs; 2170 dma_unmap_single(tx_ring->dev, dma_unmap_addr(ena_buf, paddr), 2171 dma_unmap_len(ena_buf, len), DMA_TO_DEVICE); 2172 2173 /* unmap remaining mapped pages */ 2174 for (i = 0; i < last_frag; i++) { 2175 ena_buf++; 2176 dma_unmap_page(tx_ring->dev, dma_unmap_addr(ena_buf, paddr), 2177 dma_unmap_len(ena_buf, len), DMA_TO_DEVICE); 2178 } 2179 } 2180 2181 error_drop_packet: 2182 2183 dev_kfree_skb(skb); 2184 return NETDEV_TX_OK; 2185 } 2186 2187 static u16 ena_select_queue(struct net_device *dev, struct sk_buff *skb, 2188 struct net_device *sb_dev, 2189 select_queue_fallback_t fallback) 2190 { 2191 u16 qid; 2192 /* we suspect that this is good for in--kernel network services that 2193 * want to loop incoming skb rx to tx in normal user generated traffic, 2194 * most probably we will not get to this 2195 */ 2196 if (skb_rx_queue_recorded(skb)) 2197 qid = skb_get_rx_queue(skb); 2198 else 2199 qid = fallback(dev, skb, NULL); 2200 2201 return qid; 2202 } 2203 2204 static void ena_config_host_info(struct ena_com_dev *ena_dev) 2205 { 2206 struct ena_admin_host_info *host_info; 2207 int rc; 2208 2209 /* Allocate only the host info */ 2210 rc = ena_com_allocate_host_info(ena_dev); 2211 if (rc) { 2212 pr_err("Cannot allocate host info\n"); 2213 return; 2214 } 2215 2216 host_info = ena_dev->host_attr.host_info; 2217 2218 host_info->os_type = ENA_ADMIN_OS_LINUX; 2219 host_info->kernel_ver = LINUX_VERSION_CODE; 2220 strncpy(host_info->kernel_ver_str, utsname()->version, 2221 sizeof(host_info->kernel_ver_str) - 1); 2222 host_info->os_dist = 0; 2223 strncpy(host_info->os_dist_str, utsname()->release, 2224 sizeof(host_info->os_dist_str) - 1); 2225 host_info->driver_version = 2226 (DRV_MODULE_VER_MAJOR) | 2227 (DRV_MODULE_VER_MINOR << ENA_ADMIN_HOST_INFO_MINOR_SHIFT) | 2228 (DRV_MODULE_VER_SUBMINOR << ENA_ADMIN_HOST_INFO_SUB_MINOR_SHIFT); 2229 2230 rc = ena_com_set_host_attributes(ena_dev); 2231 if (rc) { 2232 if (rc == -EOPNOTSUPP) 2233 pr_warn("Cannot set host attributes\n"); 2234 else 2235 pr_err("Cannot set host attributes\n"); 2236 2237 goto err; 2238 } 2239 2240 return; 2241 2242 err: 2243 ena_com_delete_host_info(ena_dev); 2244 } 2245 2246 static void ena_config_debug_area(struct ena_adapter *adapter) 2247 { 2248 u32 debug_area_size; 2249 int rc, ss_count; 2250 2251 ss_count = ena_get_sset_count(adapter->netdev, ETH_SS_STATS); 2252 if (ss_count <= 0) { 2253 netif_err(adapter, drv, adapter->netdev, 2254 "SS count is negative\n"); 2255 return; 2256 } 2257 2258 /* allocate 32 bytes for each string and 64bit for the value */ 2259 debug_area_size = ss_count * ETH_GSTRING_LEN + sizeof(u64) * ss_count; 2260 2261 rc = ena_com_allocate_debug_area(adapter->ena_dev, debug_area_size); 2262 if (rc) { 2263 pr_err("Cannot allocate debug area\n"); 2264 return; 2265 } 2266 2267 rc = ena_com_set_host_attributes(adapter->ena_dev); 2268 if (rc) { 2269 if (rc == -EOPNOTSUPP) 2270 netif_warn(adapter, drv, adapter->netdev, 2271 "Cannot set host attributes\n"); 2272 else 2273 netif_err(adapter, drv, adapter->netdev, 2274 "Cannot set host attributes\n"); 2275 goto err; 2276 } 2277 2278 return; 2279 err: 2280 ena_com_delete_debug_area(adapter->ena_dev); 2281 } 2282 2283 static void ena_get_stats64(struct net_device *netdev, 2284 struct rtnl_link_stats64 *stats) 2285 { 2286 struct ena_adapter *adapter = netdev_priv(netdev); 2287 struct ena_ring *rx_ring, *tx_ring; 2288 unsigned int start; 2289 u64 rx_drops; 2290 int i; 2291 2292 if (!test_bit(ENA_FLAG_DEV_UP, &adapter->flags)) 2293 return; 2294 2295 for (i = 0; i < adapter->num_queues; i++) { 2296 u64 bytes, packets; 2297 2298 tx_ring = &adapter->tx_ring[i]; 2299 2300 do { 2301 start = u64_stats_fetch_begin_irq(&tx_ring->syncp); 2302 packets = tx_ring->tx_stats.cnt; 2303 bytes = tx_ring->tx_stats.bytes; 2304 } while (u64_stats_fetch_retry_irq(&tx_ring->syncp, start)); 2305 2306 stats->tx_packets += packets; 2307 stats->tx_bytes += bytes; 2308 2309 rx_ring = &adapter->rx_ring[i]; 2310 2311 do { 2312 start = u64_stats_fetch_begin_irq(&rx_ring->syncp); 2313 packets = rx_ring->rx_stats.cnt; 2314 bytes = rx_ring->rx_stats.bytes; 2315 } while (u64_stats_fetch_retry_irq(&rx_ring->syncp, start)); 2316 2317 stats->rx_packets += packets; 2318 stats->rx_bytes += bytes; 2319 } 2320 2321 do { 2322 start = u64_stats_fetch_begin_irq(&adapter->syncp); 2323 rx_drops = adapter->dev_stats.rx_drops; 2324 } while (u64_stats_fetch_retry_irq(&adapter->syncp, start)); 2325 2326 stats->rx_dropped = rx_drops; 2327 2328 stats->multicast = 0; 2329 stats->collisions = 0; 2330 2331 stats->rx_length_errors = 0; 2332 stats->rx_crc_errors = 0; 2333 stats->rx_frame_errors = 0; 2334 stats->rx_fifo_errors = 0; 2335 stats->rx_missed_errors = 0; 2336 stats->tx_window_errors = 0; 2337 2338 stats->rx_errors = 0; 2339 stats->tx_errors = 0; 2340 } 2341 2342 static const struct net_device_ops ena_netdev_ops = { 2343 .ndo_open = ena_open, 2344 .ndo_stop = ena_close, 2345 .ndo_start_xmit = ena_start_xmit, 2346 .ndo_select_queue = ena_select_queue, 2347 .ndo_get_stats64 = ena_get_stats64, 2348 .ndo_tx_timeout = ena_tx_timeout, 2349 .ndo_change_mtu = ena_change_mtu, 2350 .ndo_set_mac_address = NULL, 2351 .ndo_validate_addr = eth_validate_addr, 2352 }; 2353 2354 static int ena_device_validate_params(struct ena_adapter *adapter, 2355 struct ena_com_dev_get_features_ctx *get_feat_ctx) 2356 { 2357 struct net_device *netdev = adapter->netdev; 2358 int rc; 2359 2360 rc = ether_addr_equal(get_feat_ctx->dev_attr.mac_addr, 2361 adapter->mac_addr); 2362 if (!rc) { 2363 netif_err(adapter, drv, netdev, 2364 "Error, mac address are different\n"); 2365 return -EINVAL; 2366 } 2367 2368 if ((get_feat_ctx->max_queues.max_cq_num < adapter->num_queues) || 2369 (get_feat_ctx->max_queues.max_sq_num < adapter->num_queues)) { 2370 netif_err(adapter, drv, netdev, 2371 "Error, device doesn't support enough queues\n"); 2372 return -EINVAL; 2373 } 2374 2375 if (get_feat_ctx->dev_attr.max_mtu < netdev->mtu) { 2376 netif_err(adapter, drv, netdev, 2377 "Error, device max mtu is smaller than netdev MTU\n"); 2378 return -EINVAL; 2379 } 2380 2381 return 0; 2382 } 2383 2384 static int ena_device_init(struct ena_com_dev *ena_dev, struct pci_dev *pdev, 2385 struct ena_com_dev_get_features_ctx *get_feat_ctx, 2386 bool *wd_state) 2387 { 2388 struct device *dev = &pdev->dev; 2389 bool readless_supported; 2390 u32 aenq_groups; 2391 int dma_width; 2392 int rc; 2393 2394 rc = ena_com_mmio_reg_read_request_init(ena_dev); 2395 if (rc) { 2396 dev_err(dev, "failed to init mmio read less\n"); 2397 return rc; 2398 } 2399 2400 /* The PCIe configuration space revision id indicate if mmio reg 2401 * read is disabled 2402 */ 2403 readless_supported = !(pdev->revision & ENA_MMIO_DISABLE_REG_READ); 2404 ena_com_set_mmio_read_mode(ena_dev, readless_supported); 2405 2406 rc = ena_com_dev_reset(ena_dev, ENA_REGS_RESET_NORMAL); 2407 if (rc) { 2408 dev_err(dev, "Can not reset device\n"); 2409 goto err_mmio_read_less; 2410 } 2411 2412 rc = ena_com_validate_version(ena_dev); 2413 if (rc) { 2414 dev_err(dev, "device version is too low\n"); 2415 goto err_mmio_read_less; 2416 } 2417 2418 dma_width = ena_com_get_dma_width(ena_dev); 2419 if (dma_width < 0) { 2420 dev_err(dev, "Invalid dma width value %d", dma_width); 2421 rc = dma_width; 2422 goto err_mmio_read_less; 2423 } 2424 2425 rc = pci_set_dma_mask(pdev, DMA_BIT_MASK(dma_width)); 2426 if (rc) { 2427 dev_err(dev, "pci_set_dma_mask failed 0x%x\n", rc); 2428 goto err_mmio_read_less; 2429 } 2430 2431 rc = pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(dma_width)); 2432 if (rc) { 2433 dev_err(dev, "err_pci_set_consistent_dma_mask failed 0x%x\n", 2434 rc); 2435 goto err_mmio_read_less; 2436 } 2437 2438 /* ENA admin level init */ 2439 rc = ena_com_admin_init(ena_dev, &aenq_handlers, true); 2440 if (rc) { 2441 dev_err(dev, 2442 "Can not initialize ena admin queue with device\n"); 2443 goto err_mmio_read_less; 2444 } 2445 2446 /* To enable the msix interrupts the driver needs to know the number 2447 * of queues. So the driver uses polling mode to retrieve this 2448 * information 2449 */ 2450 ena_com_set_admin_polling_mode(ena_dev, true); 2451 2452 ena_config_host_info(ena_dev); 2453 2454 /* Get Device Attributes*/ 2455 rc = ena_com_get_dev_attr_feat(ena_dev, get_feat_ctx); 2456 if (rc) { 2457 dev_err(dev, "Cannot get attribute for ena device rc=%d\n", rc); 2458 goto err_admin_init; 2459 } 2460 2461 /* Try to turn all the available aenq groups */ 2462 aenq_groups = BIT(ENA_ADMIN_LINK_CHANGE) | 2463 BIT(ENA_ADMIN_FATAL_ERROR) | 2464 BIT(ENA_ADMIN_WARNING) | 2465 BIT(ENA_ADMIN_NOTIFICATION) | 2466 BIT(ENA_ADMIN_KEEP_ALIVE); 2467 2468 aenq_groups &= get_feat_ctx->aenq.supported_groups; 2469 2470 rc = ena_com_set_aenq_config(ena_dev, aenq_groups); 2471 if (rc) { 2472 dev_err(dev, "Cannot configure aenq groups rc= %d\n", rc); 2473 goto err_admin_init; 2474 } 2475 2476 *wd_state = !!(aenq_groups & BIT(ENA_ADMIN_KEEP_ALIVE)); 2477 2478 return 0; 2479 2480 err_admin_init: 2481 ena_com_delete_host_info(ena_dev); 2482 ena_com_admin_destroy(ena_dev); 2483 err_mmio_read_less: 2484 ena_com_mmio_reg_read_request_destroy(ena_dev); 2485 2486 return rc; 2487 } 2488 2489 static int ena_enable_msix_and_set_admin_interrupts(struct ena_adapter *adapter, 2490 int io_vectors) 2491 { 2492 struct ena_com_dev *ena_dev = adapter->ena_dev; 2493 struct device *dev = &adapter->pdev->dev; 2494 int rc; 2495 2496 rc = ena_enable_msix(adapter, io_vectors); 2497 if (rc) { 2498 dev_err(dev, "Can not reserve msix vectors\n"); 2499 return rc; 2500 } 2501 2502 ena_setup_mgmnt_intr(adapter); 2503 2504 rc = ena_request_mgmnt_irq(adapter); 2505 if (rc) { 2506 dev_err(dev, "Can not setup management interrupts\n"); 2507 goto err_disable_msix; 2508 } 2509 2510 ena_com_set_admin_polling_mode(ena_dev, false); 2511 2512 ena_com_admin_aenq_enable(ena_dev); 2513 2514 return 0; 2515 2516 err_disable_msix: 2517 ena_disable_msix(adapter); 2518 2519 return rc; 2520 } 2521 2522 static void ena_destroy_device(struct ena_adapter *adapter, bool graceful) 2523 { 2524 struct net_device *netdev = adapter->netdev; 2525 struct ena_com_dev *ena_dev = adapter->ena_dev; 2526 bool dev_up; 2527 2528 if (!test_bit(ENA_FLAG_DEVICE_RUNNING, &adapter->flags)) 2529 return; 2530 2531 netif_carrier_off(netdev); 2532 2533 del_timer_sync(&adapter->timer_service); 2534 2535 dev_up = test_bit(ENA_FLAG_DEV_UP, &adapter->flags); 2536 adapter->dev_up_before_reset = dev_up; 2537 2538 if (!graceful) 2539 ena_com_set_admin_running_state(ena_dev, false); 2540 2541 if (test_bit(ENA_FLAG_DEV_UP, &adapter->flags)) 2542 ena_down(adapter); 2543 2544 /* Before releasing the ENA resources, a device reset is required. 2545 * (to prevent the device from accessing them). 2546 * In case the reset flag is set and the device is up, ena_down() 2547 * already perform the reset, so it can be skipped. 2548 */ 2549 if (!(test_bit(ENA_FLAG_TRIGGER_RESET, &adapter->flags) && dev_up)) 2550 ena_com_dev_reset(adapter->ena_dev, adapter->reset_reason); 2551 2552 ena_free_mgmnt_irq(adapter); 2553 2554 ena_disable_msix(adapter); 2555 2556 ena_com_abort_admin_commands(ena_dev); 2557 2558 ena_com_wait_for_abort_completion(ena_dev); 2559 2560 ena_com_admin_destroy(ena_dev); 2561 2562 ena_com_mmio_reg_read_request_destroy(ena_dev); 2563 2564 adapter->reset_reason = ENA_REGS_RESET_NORMAL; 2565 2566 clear_bit(ENA_FLAG_TRIGGER_RESET, &adapter->flags); 2567 clear_bit(ENA_FLAG_DEVICE_RUNNING, &adapter->flags); 2568 } 2569 2570 static int ena_restore_device(struct ena_adapter *adapter) 2571 { 2572 struct ena_com_dev_get_features_ctx get_feat_ctx; 2573 struct ena_com_dev *ena_dev = adapter->ena_dev; 2574 struct pci_dev *pdev = adapter->pdev; 2575 bool wd_state; 2576 int rc; 2577 2578 set_bit(ENA_FLAG_ONGOING_RESET, &adapter->flags); 2579 rc = ena_device_init(ena_dev, adapter->pdev, &get_feat_ctx, &wd_state); 2580 if (rc) { 2581 dev_err(&pdev->dev, "Can not initialize device\n"); 2582 goto err; 2583 } 2584 adapter->wd_state = wd_state; 2585 2586 rc = ena_device_validate_params(adapter, &get_feat_ctx); 2587 if (rc) { 2588 dev_err(&pdev->dev, "Validation of device parameters failed\n"); 2589 goto err_device_destroy; 2590 } 2591 2592 clear_bit(ENA_FLAG_ONGOING_RESET, &adapter->flags); 2593 /* Make sure we don't have a race with AENQ Links state handler */ 2594 if (test_bit(ENA_FLAG_LINK_UP, &adapter->flags)) 2595 netif_carrier_on(adapter->netdev); 2596 2597 rc = ena_enable_msix_and_set_admin_interrupts(adapter, 2598 adapter->num_queues); 2599 if (rc) { 2600 dev_err(&pdev->dev, "Enable MSI-X failed\n"); 2601 goto err_device_destroy; 2602 } 2603 /* If the interface was up before the reset bring it up */ 2604 if (adapter->dev_up_before_reset) { 2605 rc = ena_up(adapter); 2606 if (rc) { 2607 dev_err(&pdev->dev, "Failed to create I/O queues\n"); 2608 goto err_disable_msix; 2609 } 2610 } 2611 2612 set_bit(ENA_FLAG_DEVICE_RUNNING, &adapter->flags); 2613 mod_timer(&adapter->timer_service, round_jiffies(jiffies + HZ)); 2614 dev_err(&pdev->dev, "Device reset completed successfully\n"); 2615 2616 return rc; 2617 err_disable_msix: 2618 ena_free_mgmnt_irq(adapter); 2619 ena_disable_msix(adapter); 2620 err_device_destroy: 2621 ena_com_admin_destroy(ena_dev); 2622 err: 2623 clear_bit(ENA_FLAG_DEVICE_RUNNING, &adapter->flags); 2624 clear_bit(ENA_FLAG_ONGOING_RESET, &adapter->flags); 2625 dev_err(&pdev->dev, 2626 "Reset attempt failed. Can not reset the device\n"); 2627 2628 return rc; 2629 } 2630 2631 static void ena_fw_reset_device(struct work_struct *work) 2632 { 2633 struct ena_adapter *adapter = 2634 container_of(work, struct ena_adapter, reset_task); 2635 struct pci_dev *pdev = adapter->pdev; 2636 2637 if (unlikely(!test_bit(ENA_FLAG_TRIGGER_RESET, &adapter->flags))) { 2638 dev_err(&pdev->dev, 2639 "device reset schedule while reset bit is off\n"); 2640 return; 2641 } 2642 rtnl_lock(); 2643 ena_destroy_device(adapter, false); 2644 ena_restore_device(adapter); 2645 rtnl_unlock(); 2646 } 2647 2648 static int check_for_rx_interrupt_queue(struct ena_adapter *adapter, 2649 struct ena_ring *rx_ring) 2650 { 2651 if (likely(rx_ring->first_interrupt)) 2652 return 0; 2653 2654 if (ena_com_cq_empty(rx_ring->ena_com_io_cq)) 2655 return 0; 2656 2657 rx_ring->no_interrupt_event_cnt++; 2658 2659 if (rx_ring->no_interrupt_event_cnt == ENA_MAX_NO_INTERRUPT_ITERATIONS) { 2660 netif_err(adapter, rx_err, adapter->netdev, 2661 "Potential MSIX issue on Rx side Queue = %d. Reset the device\n", 2662 rx_ring->qid); 2663 adapter->reset_reason = ENA_REGS_RESET_MISS_INTERRUPT; 2664 smp_mb__before_atomic(); 2665 set_bit(ENA_FLAG_TRIGGER_RESET, &adapter->flags); 2666 return -EIO; 2667 } 2668 2669 return 0; 2670 } 2671 2672 static int check_missing_comp_in_tx_queue(struct ena_adapter *adapter, 2673 struct ena_ring *tx_ring) 2674 { 2675 struct ena_tx_buffer *tx_buf; 2676 unsigned long last_jiffies; 2677 u32 missed_tx = 0; 2678 int i, rc = 0; 2679 2680 for (i = 0; i < tx_ring->ring_size; i++) { 2681 tx_buf = &tx_ring->tx_buffer_info[i]; 2682 last_jiffies = tx_buf->last_jiffies; 2683 2684 if (last_jiffies == 0) 2685 /* no pending Tx at this location */ 2686 continue; 2687 2688 if (unlikely(!tx_ring->first_interrupt && time_is_before_jiffies(last_jiffies + 2689 2 * adapter->missing_tx_completion_to))) { 2690 /* If after graceful period interrupt is still not 2691 * received, we schedule a reset 2692 */ 2693 netif_err(adapter, tx_err, adapter->netdev, 2694 "Potential MSIX issue on Tx side Queue = %d. Reset the device\n", 2695 tx_ring->qid); 2696 adapter->reset_reason = ENA_REGS_RESET_MISS_INTERRUPT; 2697 smp_mb__before_atomic(); 2698 set_bit(ENA_FLAG_TRIGGER_RESET, &adapter->flags); 2699 return -EIO; 2700 } 2701 2702 if (unlikely(time_is_before_jiffies(last_jiffies + 2703 adapter->missing_tx_completion_to))) { 2704 if (!tx_buf->print_once) 2705 netif_notice(adapter, tx_err, adapter->netdev, 2706 "Found a Tx that wasn't completed on time, qid %d, index %d.\n", 2707 tx_ring->qid, i); 2708 2709 tx_buf->print_once = 1; 2710 missed_tx++; 2711 } 2712 } 2713 2714 if (unlikely(missed_tx > adapter->missing_tx_completion_threshold)) { 2715 netif_err(adapter, tx_err, adapter->netdev, 2716 "The number of lost tx completions is above the threshold (%d > %d). Reset the device\n", 2717 missed_tx, 2718 adapter->missing_tx_completion_threshold); 2719 adapter->reset_reason = 2720 ENA_REGS_RESET_MISS_TX_CMPL; 2721 set_bit(ENA_FLAG_TRIGGER_RESET, &adapter->flags); 2722 rc = -EIO; 2723 } 2724 2725 u64_stats_update_begin(&tx_ring->syncp); 2726 tx_ring->tx_stats.missed_tx = missed_tx; 2727 u64_stats_update_end(&tx_ring->syncp); 2728 2729 return rc; 2730 } 2731 2732 static void check_for_missing_completions(struct ena_adapter *adapter) 2733 { 2734 struct ena_ring *tx_ring; 2735 struct ena_ring *rx_ring; 2736 int i, budget, rc; 2737 2738 /* Make sure the driver doesn't turn the device in other process */ 2739 smp_rmb(); 2740 2741 if (!test_bit(ENA_FLAG_DEV_UP, &adapter->flags)) 2742 return; 2743 2744 if (test_bit(ENA_FLAG_TRIGGER_RESET, &adapter->flags)) 2745 return; 2746 2747 if (adapter->missing_tx_completion_to == ENA_HW_HINTS_NO_TIMEOUT) 2748 return; 2749 2750 budget = ENA_MONITORED_TX_QUEUES; 2751 2752 for (i = adapter->last_monitored_tx_qid; i < adapter->num_queues; i++) { 2753 tx_ring = &adapter->tx_ring[i]; 2754 rx_ring = &adapter->rx_ring[i]; 2755 2756 rc = check_missing_comp_in_tx_queue(adapter, tx_ring); 2757 if (unlikely(rc)) 2758 return; 2759 2760 rc = check_for_rx_interrupt_queue(adapter, rx_ring); 2761 if (unlikely(rc)) 2762 return; 2763 2764 budget--; 2765 if (!budget) 2766 break; 2767 } 2768 2769 adapter->last_monitored_tx_qid = i % adapter->num_queues; 2770 } 2771 2772 /* trigger napi schedule after 2 consecutive detections */ 2773 #define EMPTY_RX_REFILL 2 2774 /* For the rare case where the device runs out of Rx descriptors and the 2775 * napi handler failed to refill new Rx descriptors (due to a lack of memory 2776 * for example). 2777 * This case will lead to a deadlock: 2778 * The device won't send interrupts since all the new Rx packets will be dropped 2779 * The napi handler won't allocate new Rx descriptors so the device will be 2780 * able to send new packets. 2781 * 2782 * This scenario can happen when the kernel's vm.min_free_kbytes is too small. 2783 * It is recommended to have at least 512MB, with a minimum of 128MB for 2784 * constrained environment). 2785 * 2786 * When such a situation is detected - Reschedule napi 2787 */ 2788 static void check_for_empty_rx_ring(struct ena_adapter *adapter) 2789 { 2790 struct ena_ring *rx_ring; 2791 int i, refill_required; 2792 2793 if (!test_bit(ENA_FLAG_DEV_UP, &adapter->flags)) 2794 return; 2795 2796 if (test_bit(ENA_FLAG_TRIGGER_RESET, &adapter->flags)) 2797 return; 2798 2799 for (i = 0; i < adapter->num_queues; i++) { 2800 rx_ring = &adapter->rx_ring[i]; 2801 2802 refill_required = 2803 ena_com_sq_empty_space(rx_ring->ena_com_io_sq); 2804 if (unlikely(refill_required == (rx_ring->ring_size - 1))) { 2805 rx_ring->empty_rx_queue++; 2806 2807 if (rx_ring->empty_rx_queue >= EMPTY_RX_REFILL) { 2808 u64_stats_update_begin(&rx_ring->syncp); 2809 rx_ring->rx_stats.empty_rx_ring++; 2810 u64_stats_update_end(&rx_ring->syncp); 2811 2812 netif_err(adapter, drv, adapter->netdev, 2813 "trigger refill for ring %d\n", i); 2814 2815 napi_schedule(rx_ring->napi); 2816 rx_ring->empty_rx_queue = 0; 2817 } 2818 } else { 2819 rx_ring->empty_rx_queue = 0; 2820 } 2821 } 2822 } 2823 2824 /* Check for keep alive expiration */ 2825 static void check_for_missing_keep_alive(struct ena_adapter *adapter) 2826 { 2827 unsigned long keep_alive_expired; 2828 2829 if (!adapter->wd_state) 2830 return; 2831 2832 if (adapter->keep_alive_timeout == ENA_HW_HINTS_NO_TIMEOUT) 2833 return; 2834 2835 keep_alive_expired = round_jiffies(adapter->last_keep_alive_jiffies + 2836 adapter->keep_alive_timeout); 2837 if (unlikely(time_is_before_jiffies(keep_alive_expired))) { 2838 netif_err(adapter, drv, adapter->netdev, 2839 "Keep alive watchdog timeout.\n"); 2840 u64_stats_update_begin(&adapter->syncp); 2841 adapter->dev_stats.wd_expired++; 2842 u64_stats_update_end(&adapter->syncp); 2843 adapter->reset_reason = ENA_REGS_RESET_KEEP_ALIVE_TO; 2844 set_bit(ENA_FLAG_TRIGGER_RESET, &adapter->flags); 2845 } 2846 } 2847 2848 static void check_for_admin_com_state(struct ena_adapter *adapter) 2849 { 2850 if (unlikely(!ena_com_get_admin_running_state(adapter->ena_dev))) { 2851 netif_err(adapter, drv, adapter->netdev, 2852 "ENA admin queue is not in running state!\n"); 2853 u64_stats_update_begin(&adapter->syncp); 2854 adapter->dev_stats.admin_q_pause++; 2855 u64_stats_update_end(&adapter->syncp); 2856 adapter->reset_reason = ENA_REGS_RESET_ADMIN_TO; 2857 set_bit(ENA_FLAG_TRIGGER_RESET, &adapter->flags); 2858 } 2859 } 2860 2861 static void ena_update_hints(struct ena_adapter *adapter, 2862 struct ena_admin_ena_hw_hints *hints) 2863 { 2864 struct net_device *netdev = adapter->netdev; 2865 2866 if (hints->admin_completion_tx_timeout) 2867 adapter->ena_dev->admin_queue.completion_timeout = 2868 hints->admin_completion_tx_timeout * 1000; 2869 2870 if (hints->mmio_read_timeout) 2871 /* convert to usec */ 2872 adapter->ena_dev->mmio_read.reg_read_to = 2873 hints->mmio_read_timeout * 1000; 2874 2875 if (hints->missed_tx_completion_count_threshold_to_reset) 2876 adapter->missing_tx_completion_threshold = 2877 hints->missed_tx_completion_count_threshold_to_reset; 2878 2879 if (hints->missing_tx_completion_timeout) { 2880 if (hints->missing_tx_completion_timeout == ENA_HW_HINTS_NO_TIMEOUT) 2881 adapter->missing_tx_completion_to = ENA_HW_HINTS_NO_TIMEOUT; 2882 else 2883 adapter->missing_tx_completion_to = 2884 msecs_to_jiffies(hints->missing_tx_completion_timeout); 2885 } 2886 2887 if (hints->netdev_wd_timeout) 2888 netdev->watchdog_timeo = msecs_to_jiffies(hints->netdev_wd_timeout); 2889 2890 if (hints->driver_watchdog_timeout) { 2891 if (hints->driver_watchdog_timeout == ENA_HW_HINTS_NO_TIMEOUT) 2892 adapter->keep_alive_timeout = ENA_HW_HINTS_NO_TIMEOUT; 2893 else 2894 adapter->keep_alive_timeout = 2895 msecs_to_jiffies(hints->driver_watchdog_timeout); 2896 } 2897 } 2898 2899 static void ena_update_host_info(struct ena_admin_host_info *host_info, 2900 struct net_device *netdev) 2901 { 2902 host_info->supported_network_features[0] = 2903 netdev->features & GENMASK_ULL(31, 0); 2904 host_info->supported_network_features[1] = 2905 (netdev->features & GENMASK_ULL(63, 32)) >> 32; 2906 } 2907 2908 static void ena_timer_service(struct timer_list *t) 2909 { 2910 struct ena_adapter *adapter = from_timer(adapter, t, timer_service); 2911 u8 *debug_area = adapter->ena_dev->host_attr.debug_area_virt_addr; 2912 struct ena_admin_host_info *host_info = 2913 adapter->ena_dev->host_attr.host_info; 2914 2915 check_for_missing_keep_alive(adapter); 2916 2917 check_for_admin_com_state(adapter); 2918 2919 check_for_missing_completions(adapter); 2920 2921 check_for_empty_rx_ring(adapter); 2922 2923 if (debug_area) 2924 ena_dump_stats_to_buf(adapter, debug_area); 2925 2926 if (host_info) 2927 ena_update_host_info(host_info, adapter->netdev); 2928 2929 if (unlikely(test_bit(ENA_FLAG_TRIGGER_RESET, &adapter->flags))) { 2930 netif_err(adapter, drv, adapter->netdev, 2931 "Trigger reset is on\n"); 2932 ena_dump_stats_to_dmesg(adapter); 2933 queue_work(ena_wq, &adapter->reset_task); 2934 return; 2935 } 2936 2937 /* Reset the timer */ 2938 mod_timer(&adapter->timer_service, jiffies + HZ); 2939 } 2940 2941 static int ena_calc_io_queue_num(struct pci_dev *pdev, 2942 struct ena_com_dev *ena_dev, 2943 struct ena_com_dev_get_features_ctx *get_feat_ctx) 2944 { 2945 int io_sq_num, io_queue_num; 2946 2947 /* In case of LLQ use the llq number in the get feature cmd */ 2948 if (ena_dev->tx_mem_queue_type == ENA_ADMIN_PLACEMENT_POLICY_DEV) { 2949 io_sq_num = get_feat_ctx->max_queues.max_llq_num; 2950 2951 if (io_sq_num == 0) { 2952 dev_err(&pdev->dev, 2953 "Trying to use LLQ but llq_num is 0. Fall back into regular queues\n"); 2954 2955 ena_dev->tx_mem_queue_type = 2956 ENA_ADMIN_PLACEMENT_POLICY_HOST; 2957 io_sq_num = get_feat_ctx->max_queues.max_sq_num; 2958 } 2959 } else { 2960 io_sq_num = get_feat_ctx->max_queues.max_sq_num; 2961 } 2962 2963 io_queue_num = min_t(int, num_online_cpus(), ENA_MAX_NUM_IO_QUEUES); 2964 io_queue_num = min_t(int, io_queue_num, io_sq_num); 2965 io_queue_num = min_t(int, io_queue_num, 2966 get_feat_ctx->max_queues.max_cq_num); 2967 /* 1 IRQ for for mgmnt and 1 IRQs for each IO direction */ 2968 io_queue_num = min_t(int, io_queue_num, pci_msix_vec_count(pdev) - 1); 2969 if (unlikely(!io_queue_num)) { 2970 dev_err(&pdev->dev, "The device doesn't have io queues\n"); 2971 return -EFAULT; 2972 } 2973 2974 return io_queue_num; 2975 } 2976 2977 static void ena_set_push_mode(struct pci_dev *pdev, struct ena_com_dev *ena_dev, 2978 struct ena_com_dev_get_features_ctx *get_feat_ctx) 2979 { 2980 bool has_mem_bar; 2981 2982 has_mem_bar = pci_select_bars(pdev, IORESOURCE_MEM) & BIT(ENA_MEM_BAR); 2983 2984 /* Enable push mode if device supports LLQ */ 2985 if (has_mem_bar && (get_feat_ctx->max_queues.max_llq_num > 0)) 2986 ena_dev->tx_mem_queue_type = ENA_ADMIN_PLACEMENT_POLICY_DEV; 2987 else 2988 ena_dev->tx_mem_queue_type = ENA_ADMIN_PLACEMENT_POLICY_HOST; 2989 } 2990 2991 static void ena_set_dev_offloads(struct ena_com_dev_get_features_ctx *feat, 2992 struct net_device *netdev) 2993 { 2994 netdev_features_t dev_features = 0; 2995 2996 /* Set offload features */ 2997 if (feat->offload.tx & 2998 ENA_ADMIN_FEATURE_OFFLOAD_DESC_TX_L4_IPV4_CSUM_PART_MASK) 2999 dev_features |= NETIF_F_IP_CSUM; 3000 3001 if (feat->offload.tx & 3002 ENA_ADMIN_FEATURE_OFFLOAD_DESC_TX_L4_IPV6_CSUM_PART_MASK) 3003 dev_features |= NETIF_F_IPV6_CSUM; 3004 3005 if (feat->offload.tx & ENA_ADMIN_FEATURE_OFFLOAD_DESC_TSO_IPV4_MASK) 3006 dev_features |= NETIF_F_TSO; 3007 3008 if (feat->offload.tx & ENA_ADMIN_FEATURE_OFFLOAD_DESC_TSO_IPV6_MASK) 3009 dev_features |= NETIF_F_TSO6; 3010 3011 if (feat->offload.tx & ENA_ADMIN_FEATURE_OFFLOAD_DESC_TSO_ECN_MASK) 3012 dev_features |= NETIF_F_TSO_ECN; 3013 3014 if (feat->offload.rx_supported & 3015 ENA_ADMIN_FEATURE_OFFLOAD_DESC_RX_L4_IPV4_CSUM_MASK) 3016 dev_features |= NETIF_F_RXCSUM; 3017 3018 if (feat->offload.rx_supported & 3019 ENA_ADMIN_FEATURE_OFFLOAD_DESC_RX_L4_IPV6_CSUM_MASK) 3020 dev_features |= NETIF_F_RXCSUM; 3021 3022 netdev->features = 3023 dev_features | 3024 NETIF_F_SG | 3025 NETIF_F_RXHASH | 3026 NETIF_F_HIGHDMA; 3027 3028 netdev->hw_features |= netdev->features; 3029 netdev->vlan_features |= netdev->features; 3030 } 3031 3032 static void ena_set_conf_feat_params(struct ena_adapter *adapter, 3033 struct ena_com_dev_get_features_ctx *feat) 3034 { 3035 struct net_device *netdev = adapter->netdev; 3036 3037 /* Copy mac address */ 3038 if (!is_valid_ether_addr(feat->dev_attr.mac_addr)) { 3039 eth_hw_addr_random(netdev); 3040 ether_addr_copy(adapter->mac_addr, netdev->dev_addr); 3041 } else { 3042 ether_addr_copy(adapter->mac_addr, feat->dev_attr.mac_addr); 3043 ether_addr_copy(netdev->dev_addr, adapter->mac_addr); 3044 } 3045 3046 /* Set offload features */ 3047 ena_set_dev_offloads(feat, netdev); 3048 3049 adapter->max_mtu = feat->dev_attr.max_mtu; 3050 netdev->max_mtu = adapter->max_mtu; 3051 netdev->min_mtu = ENA_MIN_MTU; 3052 } 3053 3054 static int ena_rss_init_default(struct ena_adapter *adapter) 3055 { 3056 struct ena_com_dev *ena_dev = adapter->ena_dev; 3057 struct device *dev = &adapter->pdev->dev; 3058 int rc, i; 3059 u32 val; 3060 3061 rc = ena_com_rss_init(ena_dev, ENA_RX_RSS_TABLE_LOG_SIZE); 3062 if (unlikely(rc)) { 3063 dev_err(dev, "Cannot init indirect table\n"); 3064 goto err_rss_init; 3065 } 3066 3067 for (i = 0; i < ENA_RX_RSS_TABLE_SIZE; i++) { 3068 val = ethtool_rxfh_indir_default(i, adapter->num_queues); 3069 rc = ena_com_indirect_table_fill_entry(ena_dev, i, 3070 ENA_IO_RXQ_IDX(val)); 3071 if (unlikely(rc && (rc != -EOPNOTSUPP))) { 3072 dev_err(dev, "Cannot fill indirect table\n"); 3073 goto err_fill_indir; 3074 } 3075 } 3076 3077 rc = ena_com_fill_hash_function(ena_dev, ENA_ADMIN_CRC32, NULL, 3078 ENA_HASH_KEY_SIZE, 0xFFFFFFFF); 3079 if (unlikely(rc && (rc != -EOPNOTSUPP))) { 3080 dev_err(dev, "Cannot fill hash function\n"); 3081 goto err_fill_indir; 3082 } 3083 3084 rc = ena_com_set_default_hash_ctrl(ena_dev); 3085 if (unlikely(rc && (rc != -EOPNOTSUPP))) { 3086 dev_err(dev, "Cannot fill hash control\n"); 3087 goto err_fill_indir; 3088 } 3089 3090 return 0; 3091 3092 err_fill_indir: 3093 ena_com_rss_destroy(ena_dev); 3094 err_rss_init: 3095 3096 return rc; 3097 } 3098 3099 static void ena_release_bars(struct ena_com_dev *ena_dev, struct pci_dev *pdev) 3100 { 3101 int release_bars; 3102 3103 if (ena_dev->mem_bar) 3104 devm_iounmap(&pdev->dev, ena_dev->mem_bar); 3105 3106 if (ena_dev->reg_bar) 3107 devm_iounmap(&pdev->dev, ena_dev->reg_bar); 3108 3109 release_bars = pci_select_bars(pdev, IORESOURCE_MEM) & ENA_BAR_MASK; 3110 pci_release_selected_regions(pdev, release_bars); 3111 } 3112 3113 static int ena_calc_queue_size(struct pci_dev *pdev, 3114 struct ena_com_dev *ena_dev, 3115 u16 *max_tx_sgl_size, 3116 u16 *max_rx_sgl_size, 3117 struct ena_com_dev_get_features_ctx *get_feat_ctx) 3118 { 3119 u32 queue_size = ENA_DEFAULT_RING_SIZE; 3120 3121 queue_size = min_t(u32, queue_size, 3122 get_feat_ctx->max_queues.max_cq_depth); 3123 queue_size = min_t(u32, queue_size, 3124 get_feat_ctx->max_queues.max_sq_depth); 3125 3126 if (ena_dev->tx_mem_queue_type == ENA_ADMIN_PLACEMENT_POLICY_DEV) 3127 queue_size = min_t(u32, queue_size, 3128 get_feat_ctx->max_queues.max_llq_depth); 3129 3130 queue_size = rounddown_pow_of_two(queue_size); 3131 3132 if (unlikely(!queue_size)) { 3133 dev_err(&pdev->dev, "Invalid queue size\n"); 3134 return -EFAULT; 3135 } 3136 3137 *max_tx_sgl_size = min_t(u16, ENA_PKT_MAX_BUFS, 3138 get_feat_ctx->max_queues.max_packet_tx_descs); 3139 *max_rx_sgl_size = min_t(u16, ENA_PKT_MAX_BUFS, 3140 get_feat_ctx->max_queues.max_packet_rx_descs); 3141 3142 return queue_size; 3143 } 3144 3145 /* ena_probe - Device Initialization Routine 3146 * @pdev: PCI device information struct 3147 * @ent: entry in ena_pci_tbl 3148 * 3149 * Returns 0 on success, negative on failure 3150 * 3151 * ena_probe initializes an adapter identified by a pci_dev structure. 3152 * The OS initialization, configuring of the adapter private structure, 3153 * and a hardware reset occur. 3154 */ 3155 static int ena_probe(struct pci_dev *pdev, const struct pci_device_id *ent) 3156 { 3157 struct ena_com_dev_get_features_ctx get_feat_ctx; 3158 static int version_printed; 3159 struct net_device *netdev; 3160 struct ena_adapter *adapter; 3161 struct ena_com_dev *ena_dev = NULL; 3162 static int adapters_found; 3163 int io_queue_num, bars, rc; 3164 int queue_size; 3165 u16 tx_sgl_size = 0; 3166 u16 rx_sgl_size = 0; 3167 bool wd_state; 3168 3169 dev_dbg(&pdev->dev, "%s\n", __func__); 3170 3171 if (version_printed++ == 0) 3172 dev_info(&pdev->dev, "%s", version); 3173 3174 rc = pci_enable_device_mem(pdev); 3175 if (rc) { 3176 dev_err(&pdev->dev, "pci_enable_device_mem() failed!\n"); 3177 return rc; 3178 } 3179 3180 pci_set_master(pdev); 3181 3182 ena_dev = vzalloc(sizeof(*ena_dev)); 3183 if (!ena_dev) { 3184 rc = -ENOMEM; 3185 goto err_disable_device; 3186 } 3187 3188 bars = pci_select_bars(pdev, IORESOURCE_MEM) & ENA_BAR_MASK; 3189 rc = pci_request_selected_regions(pdev, bars, DRV_MODULE_NAME); 3190 if (rc) { 3191 dev_err(&pdev->dev, "pci_request_selected_regions failed %d\n", 3192 rc); 3193 goto err_free_ena_dev; 3194 } 3195 3196 ena_dev->reg_bar = devm_ioremap(&pdev->dev, 3197 pci_resource_start(pdev, ENA_REG_BAR), 3198 pci_resource_len(pdev, ENA_REG_BAR)); 3199 if (!ena_dev->reg_bar) { 3200 dev_err(&pdev->dev, "failed to remap regs bar\n"); 3201 rc = -EFAULT; 3202 goto err_free_region; 3203 } 3204 3205 ena_dev->dmadev = &pdev->dev; 3206 3207 rc = ena_device_init(ena_dev, pdev, &get_feat_ctx, &wd_state); 3208 if (rc) { 3209 dev_err(&pdev->dev, "ena device init failed\n"); 3210 if (rc == -ETIME) 3211 rc = -EPROBE_DEFER; 3212 goto err_free_region; 3213 } 3214 3215 ena_set_push_mode(pdev, ena_dev, &get_feat_ctx); 3216 3217 if (ena_dev->tx_mem_queue_type == ENA_ADMIN_PLACEMENT_POLICY_DEV) { 3218 ena_dev->mem_bar = devm_ioremap_wc(&pdev->dev, 3219 pci_resource_start(pdev, ENA_MEM_BAR), 3220 pci_resource_len(pdev, ENA_MEM_BAR)); 3221 if (!ena_dev->mem_bar) { 3222 rc = -EFAULT; 3223 goto err_device_destroy; 3224 } 3225 } 3226 3227 /* initial Tx interrupt delay, Assumes 1 usec granularity. 3228 * Updated during device initialization with the real granularity 3229 */ 3230 ena_dev->intr_moder_tx_interval = ENA_INTR_INITIAL_TX_INTERVAL_USECS; 3231 io_queue_num = ena_calc_io_queue_num(pdev, ena_dev, &get_feat_ctx); 3232 queue_size = ena_calc_queue_size(pdev, ena_dev, &tx_sgl_size, 3233 &rx_sgl_size, &get_feat_ctx); 3234 if ((queue_size <= 0) || (io_queue_num <= 0)) { 3235 rc = -EFAULT; 3236 goto err_device_destroy; 3237 } 3238 3239 dev_info(&pdev->dev, "creating %d io queues. queue size: %d\n", 3240 io_queue_num, queue_size); 3241 3242 /* dev zeroed in init_etherdev */ 3243 netdev = alloc_etherdev_mq(sizeof(struct ena_adapter), io_queue_num); 3244 if (!netdev) { 3245 dev_err(&pdev->dev, "alloc_etherdev_mq failed\n"); 3246 rc = -ENOMEM; 3247 goto err_device_destroy; 3248 } 3249 3250 SET_NETDEV_DEV(netdev, &pdev->dev); 3251 3252 adapter = netdev_priv(netdev); 3253 pci_set_drvdata(pdev, adapter); 3254 3255 adapter->ena_dev = ena_dev; 3256 adapter->netdev = netdev; 3257 adapter->pdev = pdev; 3258 3259 ena_set_conf_feat_params(adapter, &get_feat_ctx); 3260 3261 adapter->msg_enable = netif_msg_init(debug, DEFAULT_MSG_ENABLE); 3262 adapter->reset_reason = ENA_REGS_RESET_NORMAL; 3263 3264 adapter->tx_ring_size = queue_size; 3265 adapter->rx_ring_size = queue_size; 3266 3267 adapter->max_tx_sgl_size = tx_sgl_size; 3268 adapter->max_rx_sgl_size = rx_sgl_size; 3269 3270 adapter->num_queues = io_queue_num; 3271 adapter->last_monitored_tx_qid = 0; 3272 3273 adapter->rx_copybreak = ENA_DEFAULT_RX_COPYBREAK; 3274 adapter->wd_state = wd_state; 3275 3276 snprintf(adapter->name, ENA_NAME_MAX_LEN, "ena_%d", adapters_found); 3277 3278 rc = ena_com_init_interrupt_moderation(adapter->ena_dev); 3279 if (rc) { 3280 dev_err(&pdev->dev, 3281 "Failed to query interrupt moderation feature\n"); 3282 goto err_netdev_destroy; 3283 } 3284 ena_init_io_rings(adapter); 3285 3286 netdev->netdev_ops = &ena_netdev_ops; 3287 netdev->watchdog_timeo = TX_TIMEOUT; 3288 ena_set_ethtool_ops(netdev); 3289 3290 netdev->priv_flags |= IFF_UNICAST_FLT; 3291 3292 u64_stats_init(&adapter->syncp); 3293 3294 rc = ena_enable_msix_and_set_admin_interrupts(adapter, io_queue_num); 3295 if (rc) { 3296 dev_err(&pdev->dev, 3297 "Failed to enable and set the admin interrupts\n"); 3298 goto err_worker_destroy; 3299 } 3300 rc = ena_rss_init_default(adapter); 3301 if (rc && (rc != -EOPNOTSUPP)) { 3302 dev_err(&pdev->dev, "Cannot init RSS rc: %d\n", rc); 3303 goto err_free_msix; 3304 } 3305 3306 ena_config_debug_area(adapter); 3307 3308 memcpy(adapter->netdev->perm_addr, adapter->mac_addr, netdev->addr_len); 3309 3310 netif_carrier_off(netdev); 3311 3312 rc = register_netdev(netdev); 3313 if (rc) { 3314 dev_err(&pdev->dev, "Cannot register net device\n"); 3315 goto err_rss; 3316 } 3317 3318 INIT_WORK(&adapter->reset_task, ena_fw_reset_device); 3319 3320 adapter->last_keep_alive_jiffies = jiffies; 3321 adapter->keep_alive_timeout = ENA_DEVICE_KALIVE_TIMEOUT; 3322 adapter->missing_tx_completion_to = TX_TIMEOUT; 3323 adapter->missing_tx_completion_threshold = MAX_NUM_OF_TIMEOUTED_PACKETS; 3324 3325 ena_update_hints(adapter, &get_feat_ctx.hw_hints); 3326 3327 timer_setup(&adapter->timer_service, ena_timer_service, 0); 3328 mod_timer(&adapter->timer_service, round_jiffies(jiffies + HZ)); 3329 3330 dev_info(&pdev->dev, "%s found at mem %lx, mac addr %pM Queues %d\n", 3331 DEVICE_NAME, (long)pci_resource_start(pdev, 0), 3332 netdev->dev_addr, io_queue_num); 3333 3334 set_bit(ENA_FLAG_DEVICE_RUNNING, &adapter->flags); 3335 3336 adapters_found++; 3337 3338 return 0; 3339 3340 err_rss: 3341 ena_com_delete_debug_area(ena_dev); 3342 ena_com_rss_destroy(ena_dev); 3343 err_free_msix: 3344 ena_com_dev_reset(ena_dev, ENA_REGS_RESET_INIT_ERR); 3345 ena_free_mgmnt_irq(adapter); 3346 ena_disable_msix(adapter); 3347 err_worker_destroy: 3348 ena_com_destroy_interrupt_moderation(ena_dev); 3349 del_timer(&adapter->timer_service); 3350 err_netdev_destroy: 3351 free_netdev(netdev); 3352 err_device_destroy: 3353 ena_com_delete_host_info(ena_dev); 3354 ena_com_admin_destroy(ena_dev); 3355 err_free_region: 3356 ena_release_bars(ena_dev, pdev); 3357 err_free_ena_dev: 3358 vfree(ena_dev); 3359 err_disable_device: 3360 pci_disable_device(pdev); 3361 return rc; 3362 } 3363 3364 /*****************************************************************************/ 3365 3366 /* ena_remove - Device Removal Routine 3367 * @pdev: PCI device information struct 3368 * 3369 * ena_remove is called by the PCI subsystem to alert the driver 3370 * that it should release a PCI device. 3371 */ 3372 static void ena_remove(struct pci_dev *pdev) 3373 { 3374 struct ena_adapter *adapter = pci_get_drvdata(pdev); 3375 struct ena_com_dev *ena_dev; 3376 struct net_device *netdev; 3377 3378 ena_dev = adapter->ena_dev; 3379 netdev = adapter->netdev; 3380 3381 #ifdef CONFIG_RFS_ACCEL 3382 if ((adapter->msix_vecs >= 1) && (netdev->rx_cpu_rmap)) { 3383 free_irq_cpu_rmap(netdev->rx_cpu_rmap); 3384 netdev->rx_cpu_rmap = NULL; 3385 } 3386 #endif /* CONFIG_RFS_ACCEL */ 3387 del_timer_sync(&adapter->timer_service); 3388 3389 cancel_work_sync(&adapter->reset_task); 3390 3391 unregister_netdev(netdev); 3392 3393 /* If the device is running then we want to make sure the device will be 3394 * reset to make sure no more events will be issued by the device. 3395 */ 3396 if (test_bit(ENA_FLAG_DEVICE_RUNNING, &adapter->flags)) 3397 set_bit(ENA_FLAG_TRIGGER_RESET, &adapter->flags); 3398 3399 rtnl_lock(); 3400 ena_destroy_device(adapter, true); 3401 rtnl_unlock(); 3402 3403 free_netdev(netdev); 3404 3405 ena_com_rss_destroy(ena_dev); 3406 3407 ena_com_delete_debug_area(ena_dev); 3408 3409 ena_com_delete_host_info(ena_dev); 3410 3411 ena_release_bars(ena_dev, pdev); 3412 3413 pci_disable_device(pdev); 3414 3415 ena_com_destroy_interrupt_moderation(ena_dev); 3416 3417 vfree(ena_dev); 3418 } 3419 3420 #ifdef CONFIG_PM 3421 /* ena_suspend - PM suspend callback 3422 * @pdev: PCI device information struct 3423 * @state:power state 3424 */ 3425 static int ena_suspend(struct pci_dev *pdev, pm_message_t state) 3426 { 3427 struct ena_adapter *adapter = pci_get_drvdata(pdev); 3428 3429 u64_stats_update_begin(&adapter->syncp); 3430 adapter->dev_stats.suspend++; 3431 u64_stats_update_end(&adapter->syncp); 3432 3433 rtnl_lock(); 3434 if (unlikely(test_bit(ENA_FLAG_TRIGGER_RESET, &adapter->flags))) { 3435 dev_err(&pdev->dev, 3436 "ignoring device reset request as the device is being suspended\n"); 3437 clear_bit(ENA_FLAG_TRIGGER_RESET, &adapter->flags); 3438 } 3439 ena_destroy_device(adapter, true); 3440 rtnl_unlock(); 3441 return 0; 3442 } 3443 3444 /* ena_resume - PM resume callback 3445 * @pdev: PCI device information struct 3446 * 3447 */ 3448 static int ena_resume(struct pci_dev *pdev) 3449 { 3450 struct ena_adapter *adapter = pci_get_drvdata(pdev); 3451 int rc; 3452 3453 u64_stats_update_begin(&adapter->syncp); 3454 adapter->dev_stats.resume++; 3455 u64_stats_update_end(&adapter->syncp); 3456 3457 rtnl_lock(); 3458 rc = ena_restore_device(adapter); 3459 rtnl_unlock(); 3460 return rc; 3461 } 3462 #endif 3463 3464 static struct pci_driver ena_pci_driver = { 3465 .name = DRV_MODULE_NAME, 3466 .id_table = ena_pci_tbl, 3467 .probe = ena_probe, 3468 .remove = ena_remove, 3469 #ifdef CONFIG_PM 3470 .suspend = ena_suspend, 3471 .resume = ena_resume, 3472 #endif 3473 .sriov_configure = pci_sriov_configure_simple, 3474 }; 3475 3476 static int __init ena_init(void) 3477 { 3478 pr_info("%s", version); 3479 3480 ena_wq = create_singlethread_workqueue(DRV_MODULE_NAME); 3481 if (!ena_wq) { 3482 pr_err("Failed to create workqueue\n"); 3483 return -ENOMEM; 3484 } 3485 3486 return pci_register_driver(&ena_pci_driver); 3487 } 3488 3489 static void __exit ena_cleanup(void) 3490 { 3491 pci_unregister_driver(&ena_pci_driver); 3492 3493 if (ena_wq) { 3494 destroy_workqueue(ena_wq); 3495 ena_wq = NULL; 3496 } 3497 } 3498 3499 /****************************************************************************** 3500 ******************************** AENQ Handlers ******************************* 3501 *****************************************************************************/ 3502 /* ena_update_on_link_change: 3503 * Notify the network interface about the change in link status 3504 */ 3505 static void ena_update_on_link_change(void *adapter_data, 3506 struct ena_admin_aenq_entry *aenq_e) 3507 { 3508 struct ena_adapter *adapter = (struct ena_adapter *)adapter_data; 3509 struct ena_admin_aenq_link_change_desc *aenq_desc = 3510 (struct ena_admin_aenq_link_change_desc *)aenq_e; 3511 int status = aenq_desc->flags & 3512 ENA_ADMIN_AENQ_LINK_CHANGE_DESC_LINK_STATUS_MASK; 3513 3514 if (status) { 3515 netdev_dbg(adapter->netdev, "%s\n", __func__); 3516 set_bit(ENA_FLAG_LINK_UP, &adapter->flags); 3517 if (!test_bit(ENA_FLAG_ONGOING_RESET, &adapter->flags)) 3518 netif_carrier_on(adapter->netdev); 3519 } else { 3520 clear_bit(ENA_FLAG_LINK_UP, &adapter->flags); 3521 netif_carrier_off(adapter->netdev); 3522 } 3523 } 3524 3525 static void ena_keep_alive_wd(void *adapter_data, 3526 struct ena_admin_aenq_entry *aenq_e) 3527 { 3528 struct ena_adapter *adapter = (struct ena_adapter *)adapter_data; 3529 struct ena_admin_aenq_keep_alive_desc *desc; 3530 u64 rx_drops; 3531 3532 desc = (struct ena_admin_aenq_keep_alive_desc *)aenq_e; 3533 adapter->last_keep_alive_jiffies = jiffies; 3534 3535 rx_drops = ((u64)desc->rx_drops_high << 32) | desc->rx_drops_low; 3536 3537 u64_stats_update_begin(&adapter->syncp); 3538 adapter->dev_stats.rx_drops = rx_drops; 3539 u64_stats_update_end(&adapter->syncp); 3540 } 3541 3542 static void ena_notification(void *adapter_data, 3543 struct ena_admin_aenq_entry *aenq_e) 3544 { 3545 struct ena_adapter *adapter = (struct ena_adapter *)adapter_data; 3546 struct ena_admin_ena_hw_hints *hints; 3547 3548 WARN(aenq_e->aenq_common_desc.group != ENA_ADMIN_NOTIFICATION, 3549 "Invalid group(%x) expected %x\n", 3550 aenq_e->aenq_common_desc.group, 3551 ENA_ADMIN_NOTIFICATION); 3552 3553 switch (aenq_e->aenq_common_desc.syndrom) { 3554 case ENA_ADMIN_UPDATE_HINTS: 3555 hints = (struct ena_admin_ena_hw_hints *) 3556 (&aenq_e->inline_data_w4); 3557 ena_update_hints(adapter, hints); 3558 break; 3559 default: 3560 netif_err(adapter, drv, adapter->netdev, 3561 "Invalid aenq notification link state %d\n", 3562 aenq_e->aenq_common_desc.syndrom); 3563 } 3564 } 3565 3566 /* This handler will called for unknown event group or unimplemented handlers*/ 3567 static void unimplemented_aenq_handler(void *data, 3568 struct ena_admin_aenq_entry *aenq_e) 3569 { 3570 struct ena_adapter *adapter = (struct ena_adapter *)data; 3571 3572 netif_err(adapter, drv, adapter->netdev, 3573 "Unknown event was received or event with unimplemented handler\n"); 3574 } 3575 3576 static struct ena_aenq_handlers aenq_handlers = { 3577 .handlers = { 3578 [ENA_ADMIN_LINK_CHANGE] = ena_update_on_link_change, 3579 [ENA_ADMIN_NOTIFICATION] = ena_notification, 3580 [ENA_ADMIN_KEEP_ALIVE] = ena_keep_alive_wd, 3581 }, 3582 .unimplemented_handler = unimplemented_aenq_handler 3583 }; 3584 3585 module_init(ena_init); 3586 module_exit(ena_cleanup); 3587