1 // SPDX-License-Identifier: GPL-2.0 OR Linux-OpenIB 2 /* 3 * Copyright 2015-2020 Amazon.com, Inc. or its affiliates. All rights reserved. 4 */ 5 6 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt 7 8 #ifdef CONFIG_RFS_ACCEL 9 #include <linux/cpu_rmap.h> 10 #endif /* CONFIG_RFS_ACCEL */ 11 #include <linux/ethtool.h> 12 #include <linux/kernel.h> 13 #include <linux/module.h> 14 #include <linux/numa.h> 15 #include <linux/pci.h> 16 #include <linux/utsname.h> 17 #include <linux/version.h> 18 #include <linux/vmalloc.h> 19 #include <net/ip.h> 20 21 #include "ena_netdev.h" 22 #include <linux/bpf_trace.h> 23 #include "ena_pci_id_tbl.h" 24 25 MODULE_AUTHOR("Amazon.com, Inc. or its affiliates"); 26 MODULE_DESCRIPTION(DEVICE_NAME); 27 MODULE_LICENSE("GPL"); 28 29 /* Time in jiffies before concluding the transmitter is hung. */ 30 #define TX_TIMEOUT (5 * HZ) 31 32 #define ENA_MAX_RINGS min_t(unsigned int, ENA_MAX_NUM_IO_QUEUES, num_possible_cpus()) 33 34 #define DEFAULT_MSG_ENABLE (NETIF_MSG_DRV | NETIF_MSG_PROBE | NETIF_MSG_IFUP | \ 35 NETIF_MSG_TX_DONE | NETIF_MSG_TX_ERR | NETIF_MSG_RX_ERR) 36 37 static struct ena_aenq_handlers aenq_handlers; 38 39 static struct workqueue_struct *ena_wq; 40 41 MODULE_DEVICE_TABLE(pci, ena_pci_tbl); 42 43 static int ena_rss_init_default(struct ena_adapter *adapter); 44 static void check_for_admin_com_state(struct ena_adapter *adapter); 45 static void ena_destroy_device(struct ena_adapter *adapter, bool graceful); 46 static int ena_restore_device(struct ena_adapter *adapter); 47 48 static void ena_init_io_rings(struct ena_adapter *adapter, 49 int first_index, int count); 50 static void ena_init_napi_in_range(struct ena_adapter *adapter, int first_index, 51 int count); 52 static void ena_del_napi_in_range(struct ena_adapter *adapter, int first_index, 53 int count); 54 static int ena_setup_tx_resources(struct ena_adapter *adapter, int qid); 55 static int ena_setup_tx_resources_in_range(struct ena_adapter *adapter, 56 int first_index, 57 int count); 58 static int ena_create_io_tx_queue(struct ena_adapter *adapter, int qid); 59 static void ena_free_tx_resources(struct ena_adapter *adapter, int qid); 60 static int ena_clean_xdp_irq(struct ena_ring *xdp_ring, u32 budget); 61 static void ena_destroy_all_tx_queues(struct ena_adapter *adapter); 62 static void ena_free_all_io_tx_resources(struct ena_adapter *adapter); 63 static void ena_napi_disable_in_range(struct ena_adapter *adapter, 64 int first_index, int count); 65 static void ena_napi_enable_in_range(struct ena_adapter *adapter, 66 int first_index, int count); 67 static int ena_up(struct ena_adapter *adapter); 68 static void ena_down(struct ena_adapter *adapter); 69 static void ena_unmask_interrupt(struct ena_ring *tx_ring, 70 struct ena_ring *rx_ring); 71 static void ena_update_ring_numa_node(struct ena_ring *tx_ring, 72 struct ena_ring *rx_ring); 73 static void ena_unmap_tx_buff(struct ena_ring *tx_ring, 74 struct ena_tx_buffer *tx_info); 75 static int ena_create_io_tx_queues_in_range(struct ena_adapter *adapter, 76 int first_index, int count); 77 78 /* Increase a stat by cnt while holding syncp seqlock on 32bit machines */ 79 static void ena_increase_stat(u64 *statp, u64 cnt, 80 struct u64_stats_sync *syncp) 81 { 82 u64_stats_update_begin(syncp); 83 (*statp) += cnt; 84 u64_stats_update_end(syncp); 85 } 86 87 static void ena_ring_tx_doorbell(struct ena_ring *tx_ring) 88 { 89 ena_com_write_sq_doorbell(tx_ring->ena_com_io_sq); 90 ena_increase_stat(&tx_ring->tx_stats.doorbells, 1, &tx_ring->syncp); 91 } 92 93 static void ena_tx_timeout(struct net_device *dev, unsigned int txqueue) 94 { 95 struct ena_adapter *adapter = netdev_priv(dev); 96 97 /* Change the state of the device to trigger reset 98 * Check that we are not in the middle or a trigger already 99 */ 100 101 if (test_and_set_bit(ENA_FLAG_TRIGGER_RESET, &adapter->flags)) 102 return; 103 104 ena_reset_device(adapter, ENA_REGS_RESET_OS_NETDEV_WD); 105 ena_increase_stat(&adapter->dev_stats.tx_timeout, 1, &adapter->syncp); 106 107 netif_err(adapter, tx_err, dev, "Transmit time out\n"); 108 } 109 110 static void update_rx_ring_mtu(struct ena_adapter *adapter, int mtu) 111 { 112 int i; 113 114 for (i = 0; i < adapter->num_io_queues; i++) 115 adapter->rx_ring[i].mtu = mtu; 116 } 117 118 static int ena_change_mtu(struct net_device *dev, int new_mtu) 119 { 120 struct ena_adapter *adapter = netdev_priv(dev); 121 int ret; 122 123 ret = ena_com_set_dev_mtu(adapter->ena_dev, new_mtu); 124 if (!ret) { 125 netif_dbg(adapter, drv, dev, "Set MTU to %d\n", new_mtu); 126 update_rx_ring_mtu(adapter, new_mtu); 127 dev->mtu = new_mtu; 128 } else { 129 netif_err(adapter, drv, dev, "Failed to set MTU to %d\n", 130 new_mtu); 131 } 132 133 return ret; 134 } 135 136 static int ena_xmit_common(struct net_device *dev, 137 struct ena_ring *ring, 138 struct ena_tx_buffer *tx_info, 139 struct ena_com_tx_ctx *ena_tx_ctx, 140 u16 next_to_use, 141 u32 bytes) 142 { 143 struct ena_adapter *adapter = netdev_priv(dev); 144 int rc, nb_hw_desc; 145 146 if (unlikely(ena_com_is_doorbell_needed(ring->ena_com_io_sq, 147 ena_tx_ctx))) { 148 netif_dbg(adapter, tx_queued, dev, 149 "llq tx max burst size of queue %d achieved, writing doorbell to send burst\n", 150 ring->qid); 151 ena_ring_tx_doorbell(ring); 152 } 153 154 /* prepare the packet's descriptors to dma engine */ 155 rc = ena_com_prepare_tx(ring->ena_com_io_sq, ena_tx_ctx, 156 &nb_hw_desc); 157 158 /* In case there isn't enough space in the queue for the packet, 159 * we simply drop it. All other failure reasons of 160 * ena_com_prepare_tx() are fatal and therefore require a device reset. 161 */ 162 if (unlikely(rc)) { 163 netif_err(adapter, tx_queued, dev, 164 "Failed to prepare tx bufs\n"); 165 ena_increase_stat(&ring->tx_stats.prepare_ctx_err, 1, 166 &ring->syncp); 167 if (rc != -ENOMEM) 168 ena_reset_device(adapter, 169 ENA_REGS_RESET_DRIVER_INVALID_STATE); 170 return rc; 171 } 172 173 u64_stats_update_begin(&ring->syncp); 174 ring->tx_stats.cnt++; 175 ring->tx_stats.bytes += bytes; 176 u64_stats_update_end(&ring->syncp); 177 178 tx_info->tx_descs = nb_hw_desc; 179 tx_info->last_jiffies = jiffies; 180 tx_info->print_once = 0; 181 182 ring->next_to_use = ENA_TX_RING_IDX_NEXT(next_to_use, 183 ring->ring_size); 184 return 0; 185 } 186 187 /* This is the XDP napi callback. XDP queues use a separate napi callback 188 * than Rx/Tx queues. 189 */ 190 static int ena_xdp_io_poll(struct napi_struct *napi, int budget) 191 { 192 struct ena_napi *ena_napi = container_of(napi, struct ena_napi, napi); 193 u32 xdp_work_done, xdp_budget; 194 struct ena_ring *xdp_ring; 195 int napi_comp_call = 0; 196 int ret; 197 198 xdp_ring = ena_napi->xdp_ring; 199 200 xdp_budget = budget; 201 202 if (!test_bit(ENA_FLAG_DEV_UP, &xdp_ring->adapter->flags) || 203 test_bit(ENA_FLAG_TRIGGER_RESET, &xdp_ring->adapter->flags)) { 204 napi_complete_done(napi, 0); 205 return 0; 206 } 207 208 xdp_work_done = ena_clean_xdp_irq(xdp_ring, xdp_budget); 209 210 /* If the device is about to reset or down, avoid unmask 211 * the interrupt and return 0 so NAPI won't reschedule 212 */ 213 if (unlikely(!test_bit(ENA_FLAG_DEV_UP, &xdp_ring->adapter->flags))) { 214 napi_complete_done(napi, 0); 215 ret = 0; 216 } else if (xdp_budget > xdp_work_done) { 217 napi_comp_call = 1; 218 if (napi_complete_done(napi, xdp_work_done)) 219 ena_unmask_interrupt(xdp_ring, NULL); 220 ena_update_ring_numa_node(xdp_ring, NULL); 221 ret = xdp_work_done; 222 } else { 223 ret = xdp_budget; 224 } 225 226 u64_stats_update_begin(&xdp_ring->syncp); 227 xdp_ring->tx_stats.napi_comp += napi_comp_call; 228 xdp_ring->tx_stats.tx_poll++; 229 u64_stats_update_end(&xdp_ring->syncp); 230 xdp_ring->tx_stats.last_napi_jiffies = jiffies; 231 232 return ret; 233 } 234 235 static int ena_xdp_tx_map_frame(struct ena_ring *xdp_ring, 236 struct ena_tx_buffer *tx_info, 237 struct xdp_frame *xdpf, 238 struct ena_com_tx_ctx *ena_tx_ctx) 239 { 240 struct ena_adapter *adapter = xdp_ring->adapter; 241 struct ena_com_buf *ena_buf; 242 int push_len = 0; 243 dma_addr_t dma; 244 void *data; 245 u32 size; 246 247 tx_info->xdpf = xdpf; 248 data = tx_info->xdpf->data; 249 size = tx_info->xdpf->len; 250 251 if (xdp_ring->tx_mem_queue_type == ENA_ADMIN_PLACEMENT_POLICY_DEV) { 252 /* Designate part of the packet for LLQ */ 253 push_len = min_t(u32, size, xdp_ring->tx_max_header_size); 254 255 ena_tx_ctx->push_header = data; 256 257 size -= push_len; 258 data += push_len; 259 } 260 261 ena_tx_ctx->header_len = push_len; 262 263 if (size > 0) { 264 dma = dma_map_single(xdp_ring->dev, 265 data, 266 size, 267 DMA_TO_DEVICE); 268 if (unlikely(dma_mapping_error(xdp_ring->dev, dma))) 269 goto error_report_dma_error; 270 271 tx_info->map_linear_data = 0; 272 273 ena_buf = tx_info->bufs; 274 ena_buf->paddr = dma; 275 ena_buf->len = size; 276 277 ena_tx_ctx->ena_bufs = ena_buf; 278 ena_tx_ctx->num_bufs = tx_info->num_of_bufs = 1; 279 } 280 281 return 0; 282 283 error_report_dma_error: 284 ena_increase_stat(&xdp_ring->tx_stats.dma_mapping_err, 1, 285 &xdp_ring->syncp); 286 netif_warn(adapter, tx_queued, adapter->netdev, "Failed to map xdp buff\n"); 287 288 return -EINVAL; 289 } 290 291 static int ena_xdp_xmit_frame(struct ena_ring *xdp_ring, 292 struct net_device *dev, 293 struct xdp_frame *xdpf, 294 int flags) 295 { 296 struct ena_com_tx_ctx ena_tx_ctx = {}; 297 struct ena_tx_buffer *tx_info; 298 u16 next_to_use, req_id; 299 int rc; 300 301 next_to_use = xdp_ring->next_to_use; 302 req_id = xdp_ring->free_ids[next_to_use]; 303 tx_info = &xdp_ring->tx_buffer_info[req_id]; 304 tx_info->num_of_bufs = 0; 305 306 rc = ena_xdp_tx_map_frame(xdp_ring, tx_info, xdpf, &ena_tx_ctx); 307 if (unlikely(rc)) 308 return rc; 309 310 ena_tx_ctx.req_id = req_id; 311 312 rc = ena_xmit_common(dev, 313 xdp_ring, 314 tx_info, 315 &ena_tx_ctx, 316 next_to_use, 317 xdpf->len); 318 if (rc) 319 goto error_unmap_dma; 320 321 /* trigger the dma engine. ena_ring_tx_doorbell() 322 * calls a memory barrier inside it. 323 */ 324 if (flags & XDP_XMIT_FLUSH) 325 ena_ring_tx_doorbell(xdp_ring); 326 327 return rc; 328 329 error_unmap_dma: 330 ena_unmap_tx_buff(xdp_ring, tx_info); 331 tx_info->xdpf = NULL; 332 return rc; 333 } 334 335 static int ena_xdp_xmit(struct net_device *dev, int n, 336 struct xdp_frame **frames, u32 flags) 337 { 338 struct ena_adapter *adapter = netdev_priv(dev); 339 struct ena_ring *xdp_ring; 340 int qid, i, nxmit = 0; 341 342 if (unlikely(flags & ~XDP_XMIT_FLAGS_MASK)) 343 return -EINVAL; 344 345 if (!test_bit(ENA_FLAG_DEV_UP, &adapter->flags)) 346 return -ENETDOWN; 347 348 /* We assume that all rings have the same XDP program */ 349 if (!READ_ONCE(adapter->rx_ring->xdp_bpf_prog)) 350 return -ENXIO; 351 352 qid = smp_processor_id() % adapter->xdp_num_queues; 353 qid += adapter->xdp_first_ring; 354 xdp_ring = &adapter->tx_ring[qid]; 355 356 /* Other CPU ids might try to send thorugh this queue */ 357 spin_lock(&xdp_ring->xdp_tx_lock); 358 359 for (i = 0; i < n; i++) { 360 if (ena_xdp_xmit_frame(xdp_ring, dev, frames[i], 0)) 361 break; 362 nxmit++; 363 } 364 365 /* Ring doorbell to make device aware of the packets */ 366 if (flags & XDP_XMIT_FLUSH) 367 ena_ring_tx_doorbell(xdp_ring); 368 369 spin_unlock(&xdp_ring->xdp_tx_lock); 370 371 /* Return number of packets sent */ 372 return nxmit; 373 } 374 375 static int ena_xdp_execute(struct ena_ring *rx_ring, struct xdp_buff *xdp) 376 { 377 u32 verdict = ENA_XDP_PASS; 378 struct bpf_prog *xdp_prog; 379 struct ena_ring *xdp_ring; 380 struct xdp_frame *xdpf; 381 u64 *xdp_stat; 382 383 xdp_prog = READ_ONCE(rx_ring->xdp_bpf_prog); 384 385 if (!xdp_prog) 386 goto out; 387 388 verdict = bpf_prog_run_xdp(xdp_prog, xdp); 389 390 switch (verdict) { 391 case XDP_TX: 392 xdpf = xdp_convert_buff_to_frame(xdp); 393 if (unlikely(!xdpf)) { 394 trace_xdp_exception(rx_ring->netdev, xdp_prog, verdict); 395 xdp_stat = &rx_ring->rx_stats.xdp_aborted; 396 verdict = ENA_XDP_DROP; 397 break; 398 } 399 400 /* Find xmit queue */ 401 xdp_ring = rx_ring->xdp_ring; 402 403 /* The XDP queues are shared between XDP_TX and XDP_REDIRECT */ 404 spin_lock(&xdp_ring->xdp_tx_lock); 405 406 if (ena_xdp_xmit_frame(xdp_ring, rx_ring->netdev, xdpf, 407 XDP_XMIT_FLUSH)) 408 xdp_return_frame(xdpf); 409 410 spin_unlock(&xdp_ring->xdp_tx_lock); 411 xdp_stat = &rx_ring->rx_stats.xdp_tx; 412 verdict = ENA_XDP_TX; 413 break; 414 case XDP_REDIRECT: 415 if (likely(!xdp_do_redirect(rx_ring->netdev, xdp, xdp_prog))) { 416 xdp_stat = &rx_ring->rx_stats.xdp_redirect; 417 verdict = ENA_XDP_REDIRECT; 418 break; 419 } 420 trace_xdp_exception(rx_ring->netdev, xdp_prog, verdict); 421 xdp_stat = &rx_ring->rx_stats.xdp_aborted; 422 verdict = ENA_XDP_DROP; 423 break; 424 case XDP_ABORTED: 425 trace_xdp_exception(rx_ring->netdev, xdp_prog, verdict); 426 xdp_stat = &rx_ring->rx_stats.xdp_aborted; 427 verdict = ENA_XDP_DROP; 428 break; 429 case XDP_DROP: 430 xdp_stat = &rx_ring->rx_stats.xdp_drop; 431 verdict = ENA_XDP_DROP; 432 break; 433 case XDP_PASS: 434 xdp_stat = &rx_ring->rx_stats.xdp_pass; 435 verdict = ENA_XDP_PASS; 436 break; 437 default: 438 bpf_warn_invalid_xdp_action(rx_ring->netdev, xdp_prog, verdict); 439 xdp_stat = &rx_ring->rx_stats.xdp_invalid; 440 verdict = ENA_XDP_DROP; 441 } 442 443 ena_increase_stat(xdp_stat, 1, &rx_ring->syncp); 444 out: 445 return verdict; 446 } 447 448 static void ena_init_all_xdp_queues(struct ena_adapter *adapter) 449 { 450 adapter->xdp_first_ring = adapter->num_io_queues; 451 adapter->xdp_num_queues = adapter->num_io_queues; 452 453 ena_init_io_rings(adapter, 454 adapter->xdp_first_ring, 455 adapter->xdp_num_queues); 456 } 457 458 static int ena_setup_and_create_all_xdp_queues(struct ena_adapter *adapter) 459 { 460 int rc = 0; 461 462 rc = ena_setup_tx_resources_in_range(adapter, adapter->xdp_first_ring, 463 adapter->xdp_num_queues); 464 if (rc) 465 goto setup_err; 466 467 rc = ena_create_io_tx_queues_in_range(adapter, 468 adapter->xdp_first_ring, 469 adapter->xdp_num_queues); 470 if (rc) 471 goto create_err; 472 473 return 0; 474 475 create_err: 476 ena_free_all_io_tx_resources(adapter); 477 setup_err: 478 return rc; 479 } 480 481 /* Provides a way for both kernel and bpf-prog to know 482 * more about the RX-queue a given XDP frame arrived on. 483 */ 484 static int ena_xdp_register_rxq_info(struct ena_ring *rx_ring) 485 { 486 int rc; 487 488 rc = xdp_rxq_info_reg(&rx_ring->xdp_rxq, rx_ring->netdev, rx_ring->qid, 0); 489 490 if (rc) { 491 netif_err(rx_ring->adapter, ifup, rx_ring->netdev, 492 "Failed to register xdp rx queue info. RX queue num %d rc: %d\n", 493 rx_ring->qid, rc); 494 goto err; 495 } 496 497 rc = xdp_rxq_info_reg_mem_model(&rx_ring->xdp_rxq, MEM_TYPE_PAGE_SHARED, 498 NULL); 499 500 if (rc) { 501 netif_err(rx_ring->adapter, ifup, rx_ring->netdev, 502 "Failed to register xdp rx queue info memory model. RX queue num %d rc: %d\n", 503 rx_ring->qid, rc); 504 xdp_rxq_info_unreg(&rx_ring->xdp_rxq); 505 } 506 507 err: 508 return rc; 509 } 510 511 static void ena_xdp_unregister_rxq_info(struct ena_ring *rx_ring) 512 { 513 xdp_rxq_info_unreg_mem_model(&rx_ring->xdp_rxq); 514 xdp_rxq_info_unreg(&rx_ring->xdp_rxq); 515 } 516 517 static void ena_xdp_exchange_program_rx_in_range(struct ena_adapter *adapter, 518 struct bpf_prog *prog, 519 int first, int count) 520 { 521 struct bpf_prog *old_bpf_prog; 522 struct ena_ring *rx_ring; 523 int i = 0; 524 525 for (i = first; i < count; i++) { 526 rx_ring = &adapter->rx_ring[i]; 527 old_bpf_prog = xchg(&rx_ring->xdp_bpf_prog, prog); 528 529 if (!old_bpf_prog && prog) { 530 ena_xdp_register_rxq_info(rx_ring); 531 rx_ring->rx_headroom = XDP_PACKET_HEADROOM; 532 } else if (old_bpf_prog && !prog) { 533 ena_xdp_unregister_rxq_info(rx_ring); 534 rx_ring->rx_headroom = NET_SKB_PAD; 535 } 536 } 537 } 538 539 static void ena_xdp_exchange_program(struct ena_adapter *adapter, 540 struct bpf_prog *prog) 541 { 542 struct bpf_prog *old_bpf_prog = xchg(&adapter->xdp_bpf_prog, prog); 543 544 ena_xdp_exchange_program_rx_in_range(adapter, 545 prog, 546 0, 547 adapter->num_io_queues); 548 549 if (old_bpf_prog) 550 bpf_prog_put(old_bpf_prog); 551 } 552 553 static int ena_destroy_and_free_all_xdp_queues(struct ena_adapter *adapter) 554 { 555 bool was_up; 556 int rc; 557 558 was_up = test_bit(ENA_FLAG_DEV_UP, &adapter->flags); 559 560 if (was_up) 561 ena_down(adapter); 562 563 adapter->xdp_first_ring = 0; 564 adapter->xdp_num_queues = 0; 565 ena_xdp_exchange_program(adapter, NULL); 566 if (was_up) { 567 rc = ena_up(adapter); 568 if (rc) 569 return rc; 570 } 571 return 0; 572 } 573 574 static int ena_xdp_set(struct net_device *netdev, struct netdev_bpf *bpf) 575 { 576 struct ena_adapter *adapter = netdev_priv(netdev); 577 struct bpf_prog *prog = bpf->prog; 578 struct bpf_prog *old_bpf_prog; 579 int rc, prev_mtu; 580 bool is_up; 581 582 is_up = test_bit(ENA_FLAG_DEV_UP, &adapter->flags); 583 rc = ena_xdp_allowed(adapter); 584 if (rc == ENA_XDP_ALLOWED) { 585 old_bpf_prog = adapter->xdp_bpf_prog; 586 if (prog) { 587 if (!is_up) { 588 ena_init_all_xdp_queues(adapter); 589 } else if (!old_bpf_prog) { 590 ena_down(adapter); 591 ena_init_all_xdp_queues(adapter); 592 } 593 ena_xdp_exchange_program(adapter, prog); 594 595 if (is_up && !old_bpf_prog) { 596 rc = ena_up(adapter); 597 if (rc) 598 return rc; 599 } 600 xdp_features_set_redirect_target(netdev, false); 601 } else if (old_bpf_prog) { 602 xdp_features_clear_redirect_target(netdev); 603 rc = ena_destroy_and_free_all_xdp_queues(adapter); 604 if (rc) 605 return rc; 606 } 607 608 prev_mtu = netdev->max_mtu; 609 netdev->max_mtu = prog ? ENA_XDP_MAX_MTU : adapter->max_mtu; 610 611 if (!old_bpf_prog) 612 netif_info(adapter, drv, adapter->netdev, 613 "XDP program is set, changing the max_mtu from %d to %d", 614 prev_mtu, netdev->max_mtu); 615 616 } else if (rc == ENA_XDP_CURRENT_MTU_TOO_LARGE) { 617 netif_err(adapter, drv, adapter->netdev, 618 "Failed to set xdp program, the current MTU (%d) is larger than the maximum allowed MTU (%lu) while xdp is on", 619 netdev->mtu, ENA_XDP_MAX_MTU); 620 NL_SET_ERR_MSG_MOD(bpf->extack, 621 "Failed to set xdp program, the current MTU is larger than the maximum allowed MTU. Check the dmesg for more info"); 622 return -EINVAL; 623 } else if (rc == ENA_XDP_NO_ENOUGH_QUEUES) { 624 netif_err(adapter, drv, adapter->netdev, 625 "Failed to set xdp program, the Rx/Tx channel count should be at most half of the maximum allowed channel count. The current queue count (%d), the maximal queue count (%d)\n", 626 adapter->num_io_queues, adapter->max_num_io_queues); 627 NL_SET_ERR_MSG_MOD(bpf->extack, 628 "Failed to set xdp program, there is no enough space for allocating XDP queues, Check the dmesg for more info"); 629 return -EINVAL; 630 } 631 632 return 0; 633 } 634 635 /* This is the main xdp callback, it's used by the kernel to set/unset the xdp 636 * program as well as to query the current xdp program id. 637 */ 638 static int ena_xdp(struct net_device *netdev, struct netdev_bpf *bpf) 639 { 640 switch (bpf->command) { 641 case XDP_SETUP_PROG: 642 return ena_xdp_set(netdev, bpf); 643 default: 644 return -EINVAL; 645 } 646 return 0; 647 } 648 649 static int ena_init_rx_cpu_rmap(struct ena_adapter *adapter) 650 { 651 #ifdef CONFIG_RFS_ACCEL 652 u32 i; 653 int rc; 654 655 adapter->netdev->rx_cpu_rmap = alloc_irq_cpu_rmap(adapter->num_io_queues); 656 if (!adapter->netdev->rx_cpu_rmap) 657 return -ENOMEM; 658 for (i = 0; i < adapter->num_io_queues; i++) { 659 int irq_idx = ENA_IO_IRQ_IDX(i); 660 661 rc = irq_cpu_rmap_add(adapter->netdev->rx_cpu_rmap, 662 pci_irq_vector(adapter->pdev, irq_idx)); 663 if (rc) { 664 free_irq_cpu_rmap(adapter->netdev->rx_cpu_rmap); 665 adapter->netdev->rx_cpu_rmap = NULL; 666 return rc; 667 } 668 } 669 #endif /* CONFIG_RFS_ACCEL */ 670 return 0; 671 } 672 673 static void ena_init_io_rings_common(struct ena_adapter *adapter, 674 struct ena_ring *ring, u16 qid) 675 { 676 ring->qid = qid; 677 ring->pdev = adapter->pdev; 678 ring->dev = &adapter->pdev->dev; 679 ring->netdev = adapter->netdev; 680 ring->napi = &adapter->ena_napi[qid].napi; 681 ring->adapter = adapter; 682 ring->ena_dev = adapter->ena_dev; 683 ring->per_napi_packets = 0; 684 ring->cpu = 0; 685 ring->numa_node = 0; 686 ring->no_interrupt_event_cnt = 0; 687 u64_stats_init(&ring->syncp); 688 } 689 690 static void ena_init_io_rings(struct ena_adapter *adapter, 691 int first_index, int count) 692 { 693 struct ena_com_dev *ena_dev; 694 struct ena_ring *txr, *rxr; 695 int i; 696 697 ena_dev = adapter->ena_dev; 698 699 for (i = first_index; i < first_index + count; i++) { 700 txr = &adapter->tx_ring[i]; 701 rxr = &adapter->rx_ring[i]; 702 703 /* TX common ring state */ 704 ena_init_io_rings_common(adapter, txr, i); 705 706 /* TX specific ring state */ 707 txr->ring_size = adapter->requested_tx_ring_size; 708 txr->tx_max_header_size = ena_dev->tx_max_header_size; 709 txr->tx_mem_queue_type = ena_dev->tx_mem_queue_type; 710 txr->sgl_size = adapter->max_tx_sgl_size; 711 txr->smoothed_interval = 712 ena_com_get_nonadaptive_moderation_interval_tx(ena_dev); 713 txr->disable_meta_caching = adapter->disable_meta_caching; 714 spin_lock_init(&txr->xdp_tx_lock); 715 716 /* Don't init RX queues for xdp queues */ 717 if (!ENA_IS_XDP_INDEX(adapter, i)) { 718 /* RX common ring state */ 719 ena_init_io_rings_common(adapter, rxr, i); 720 721 /* RX specific ring state */ 722 rxr->ring_size = adapter->requested_rx_ring_size; 723 rxr->rx_copybreak = adapter->rx_copybreak; 724 rxr->sgl_size = adapter->max_rx_sgl_size; 725 rxr->smoothed_interval = 726 ena_com_get_nonadaptive_moderation_interval_rx(ena_dev); 727 rxr->empty_rx_queue = 0; 728 rxr->rx_headroom = NET_SKB_PAD; 729 adapter->ena_napi[i].dim.mode = DIM_CQ_PERIOD_MODE_START_FROM_EQE; 730 rxr->xdp_ring = &adapter->tx_ring[i + adapter->num_io_queues]; 731 } 732 } 733 } 734 735 /* ena_setup_tx_resources - allocate I/O Tx resources (Descriptors) 736 * @adapter: network interface device structure 737 * @qid: queue index 738 * 739 * Return 0 on success, negative on failure 740 */ 741 static int ena_setup_tx_resources(struct ena_adapter *adapter, int qid) 742 { 743 struct ena_ring *tx_ring = &adapter->tx_ring[qid]; 744 struct ena_irq *ena_irq = &adapter->irq_tbl[ENA_IO_IRQ_IDX(qid)]; 745 int size, i, node; 746 747 if (tx_ring->tx_buffer_info) { 748 netif_err(adapter, ifup, 749 adapter->netdev, "tx_buffer_info info is not NULL"); 750 return -EEXIST; 751 } 752 753 size = sizeof(struct ena_tx_buffer) * tx_ring->ring_size; 754 node = cpu_to_node(ena_irq->cpu); 755 756 tx_ring->tx_buffer_info = vzalloc_node(size, node); 757 if (!tx_ring->tx_buffer_info) { 758 tx_ring->tx_buffer_info = vzalloc(size); 759 if (!tx_ring->tx_buffer_info) 760 goto err_tx_buffer_info; 761 } 762 763 size = sizeof(u16) * tx_ring->ring_size; 764 tx_ring->free_ids = vzalloc_node(size, node); 765 if (!tx_ring->free_ids) { 766 tx_ring->free_ids = vzalloc(size); 767 if (!tx_ring->free_ids) 768 goto err_tx_free_ids; 769 } 770 771 size = tx_ring->tx_max_header_size; 772 tx_ring->push_buf_intermediate_buf = vzalloc_node(size, node); 773 if (!tx_ring->push_buf_intermediate_buf) { 774 tx_ring->push_buf_intermediate_buf = vzalloc(size); 775 if (!tx_ring->push_buf_intermediate_buf) 776 goto err_push_buf_intermediate_buf; 777 } 778 779 /* Req id ring for TX out of order completions */ 780 for (i = 0; i < tx_ring->ring_size; i++) 781 tx_ring->free_ids[i] = i; 782 783 /* Reset tx statistics */ 784 memset(&tx_ring->tx_stats, 0x0, sizeof(tx_ring->tx_stats)); 785 786 tx_ring->next_to_use = 0; 787 tx_ring->next_to_clean = 0; 788 tx_ring->cpu = ena_irq->cpu; 789 tx_ring->numa_node = node; 790 return 0; 791 792 err_push_buf_intermediate_buf: 793 vfree(tx_ring->free_ids); 794 tx_ring->free_ids = NULL; 795 err_tx_free_ids: 796 vfree(tx_ring->tx_buffer_info); 797 tx_ring->tx_buffer_info = NULL; 798 err_tx_buffer_info: 799 return -ENOMEM; 800 } 801 802 /* ena_free_tx_resources - Free I/O Tx Resources per Queue 803 * @adapter: network interface device structure 804 * @qid: queue index 805 * 806 * Free all transmit software resources 807 */ 808 static void ena_free_tx_resources(struct ena_adapter *adapter, int qid) 809 { 810 struct ena_ring *tx_ring = &adapter->tx_ring[qid]; 811 812 vfree(tx_ring->tx_buffer_info); 813 tx_ring->tx_buffer_info = NULL; 814 815 vfree(tx_ring->free_ids); 816 tx_ring->free_ids = NULL; 817 818 vfree(tx_ring->push_buf_intermediate_buf); 819 tx_ring->push_buf_intermediate_buf = NULL; 820 } 821 822 static int ena_setup_tx_resources_in_range(struct ena_adapter *adapter, 823 int first_index, 824 int count) 825 { 826 int i, rc = 0; 827 828 for (i = first_index; i < first_index + count; i++) { 829 rc = ena_setup_tx_resources(adapter, i); 830 if (rc) 831 goto err_setup_tx; 832 } 833 834 return 0; 835 836 err_setup_tx: 837 838 netif_err(adapter, ifup, adapter->netdev, 839 "Tx queue %d: allocation failed\n", i); 840 841 /* rewind the index freeing the rings as we go */ 842 while (first_index < i--) 843 ena_free_tx_resources(adapter, i); 844 return rc; 845 } 846 847 static void ena_free_all_io_tx_resources_in_range(struct ena_adapter *adapter, 848 int first_index, int count) 849 { 850 int i; 851 852 for (i = first_index; i < first_index + count; i++) 853 ena_free_tx_resources(adapter, i); 854 } 855 856 /* ena_free_all_io_tx_resources - Free I/O Tx Resources for All Queues 857 * @adapter: board private structure 858 * 859 * Free all transmit software resources 860 */ 861 static void ena_free_all_io_tx_resources(struct ena_adapter *adapter) 862 { 863 ena_free_all_io_tx_resources_in_range(adapter, 864 0, 865 adapter->xdp_num_queues + 866 adapter->num_io_queues); 867 } 868 869 /* ena_setup_rx_resources - allocate I/O Rx resources (Descriptors) 870 * @adapter: network interface device structure 871 * @qid: queue index 872 * 873 * Returns 0 on success, negative on failure 874 */ 875 static int ena_setup_rx_resources(struct ena_adapter *adapter, 876 u32 qid) 877 { 878 struct ena_ring *rx_ring = &adapter->rx_ring[qid]; 879 struct ena_irq *ena_irq = &adapter->irq_tbl[ENA_IO_IRQ_IDX(qid)]; 880 int size, node, i; 881 882 if (rx_ring->rx_buffer_info) { 883 netif_err(adapter, ifup, adapter->netdev, 884 "rx_buffer_info is not NULL"); 885 return -EEXIST; 886 } 887 888 /* alloc extra element so in rx path 889 * we can always prefetch rx_info + 1 890 */ 891 size = sizeof(struct ena_rx_buffer) * (rx_ring->ring_size + 1); 892 node = cpu_to_node(ena_irq->cpu); 893 894 rx_ring->rx_buffer_info = vzalloc_node(size, node); 895 if (!rx_ring->rx_buffer_info) { 896 rx_ring->rx_buffer_info = vzalloc(size); 897 if (!rx_ring->rx_buffer_info) 898 return -ENOMEM; 899 } 900 901 size = sizeof(u16) * rx_ring->ring_size; 902 rx_ring->free_ids = vzalloc_node(size, node); 903 if (!rx_ring->free_ids) { 904 rx_ring->free_ids = vzalloc(size); 905 if (!rx_ring->free_ids) { 906 vfree(rx_ring->rx_buffer_info); 907 rx_ring->rx_buffer_info = NULL; 908 return -ENOMEM; 909 } 910 } 911 912 /* Req id ring for receiving RX pkts out of order */ 913 for (i = 0; i < rx_ring->ring_size; i++) 914 rx_ring->free_ids[i] = i; 915 916 /* Reset rx statistics */ 917 memset(&rx_ring->rx_stats, 0x0, sizeof(rx_ring->rx_stats)); 918 919 rx_ring->next_to_clean = 0; 920 rx_ring->next_to_use = 0; 921 rx_ring->cpu = ena_irq->cpu; 922 rx_ring->numa_node = node; 923 924 return 0; 925 } 926 927 /* ena_free_rx_resources - Free I/O Rx Resources 928 * @adapter: network interface device structure 929 * @qid: queue index 930 * 931 * Free all receive software resources 932 */ 933 static void ena_free_rx_resources(struct ena_adapter *adapter, 934 u32 qid) 935 { 936 struct ena_ring *rx_ring = &adapter->rx_ring[qid]; 937 938 vfree(rx_ring->rx_buffer_info); 939 rx_ring->rx_buffer_info = NULL; 940 941 vfree(rx_ring->free_ids); 942 rx_ring->free_ids = NULL; 943 } 944 945 /* ena_setup_all_rx_resources - allocate I/O Rx queues resources for all queues 946 * @adapter: board private structure 947 * 948 * Return 0 on success, negative on failure 949 */ 950 static int ena_setup_all_rx_resources(struct ena_adapter *adapter) 951 { 952 int i, rc = 0; 953 954 for (i = 0; i < adapter->num_io_queues; i++) { 955 rc = ena_setup_rx_resources(adapter, i); 956 if (rc) 957 goto err_setup_rx; 958 } 959 960 return 0; 961 962 err_setup_rx: 963 964 netif_err(adapter, ifup, adapter->netdev, 965 "Rx queue %d: allocation failed\n", i); 966 967 /* rewind the index freeing the rings as we go */ 968 while (i--) 969 ena_free_rx_resources(adapter, i); 970 return rc; 971 } 972 973 /* ena_free_all_io_rx_resources - Free I/O Rx Resources for All Queues 974 * @adapter: board private structure 975 * 976 * Free all receive software resources 977 */ 978 static void ena_free_all_io_rx_resources(struct ena_adapter *adapter) 979 { 980 int i; 981 982 for (i = 0; i < adapter->num_io_queues; i++) 983 ena_free_rx_resources(adapter, i); 984 } 985 986 static struct page *ena_alloc_map_page(struct ena_ring *rx_ring, 987 dma_addr_t *dma) 988 { 989 struct page *page; 990 991 /* This would allocate the page on the same NUMA node the executing code 992 * is running on. 993 */ 994 page = dev_alloc_page(); 995 if (!page) { 996 ena_increase_stat(&rx_ring->rx_stats.page_alloc_fail, 1, 997 &rx_ring->syncp); 998 return ERR_PTR(-ENOSPC); 999 } 1000 1001 /* To enable NIC-side port-mirroring, AKA SPAN port, 1002 * we make the buffer readable from the nic as well 1003 */ 1004 *dma = dma_map_page(rx_ring->dev, page, 0, ENA_PAGE_SIZE, 1005 DMA_BIDIRECTIONAL); 1006 if (unlikely(dma_mapping_error(rx_ring->dev, *dma))) { 1007 ena_increase_stat(&rx_ring->rx_stats.dma_mapping_err, 1, 1008 &rx_ring->syncp); 1009 __free_page(page); 1010 return ERR_PTR(-EIO); 1011 } 1012 1013 return page; 1014 } 1015 1016 static int ena_alloc_rx_buffer(struct ena_ring *rx_ring, 1017 struct ena_rx_buffer *rx_info) 1018 { 1019 int headroom = rx_ring->rx_headroom; 1020 struct ena_com_buf *ena_buf; 1021 struct page *page; 1022 dma_addr_t dma; 1023 int tailroom; 1024 1025 /* restore page offset value in case it has been changed by device */ 1026 rx_info->page_offset = headroom; 1027 1028 /* if previous allocated page is not used */ 1029 if (unlikely(rx_info->page)) 1030 return 0; 1031 1032 /* We handle DMA here */ 1033 page = ena_alloc_map_page(rx_ring, &dma); 1034 if (unlikely(IS_ERR(page))) 1035 return PTR_ERR(page); 1036 1037 netif_dbg(rx_ring->adapter, rx_status, rx_ring->netdev, 1038 "Allocate page %p, rx_info %p\n", page, rx_info); 1039 1040 tailroom = SKB_DATA_ALIGN(sizeof(struct skb_shared_info)); 1041 1042 rx_info->page = page; 1043 ena_buf = &rx_info->ena_buf; 1044 ena_buf->paddr = dma + headroom; 1045 ena_buf->len = ENA_PAGE_SIZE - headroom - tailroom; 1046 1047 return 0; 1048 } 1049 1050 static void ena_unmap_rx_buff(struct ena_ring *rx_ring, 1051 struct ena_rx_buffer *rx_info) 1052 { 1053 struct ena_com_buf *ena_buf = &rx_info->ena_buf; 1054 1055 dma_unmap_page(rx_ring->dev, ena_buf->paddr - rx_ring->rx_headroom, 1056 ENA_PAGE_SIZE, 1057 DMA_BIDIRECTIONAL); 1058 } 1059 1060 static void ena_free_rx_page(struct ena_ring *rx_ring, 1061 struct ena_rx_buffer *rx_info) 1062 { 1063 struct page *page = rx_info->page; 1064 1065 if (unlikely(!page)) { 1066 netif_warn(rx_ring->adapter, rx_err, rx_ring->netdev, 1067 "Trying to free unallocated buffer\n"); 1068 return; 1069 } 1070 1071 ena_unmap_rx_buff(rx_ring, rx_info); 1072 1073 __free_page(page); 1074 rx_info->page = NULL; 1075 } 1076 1077 static int ena_refill_rx_bufs(struct ena_ring *rx_ring, u32 num) 1078 { 1079 u16 next_to_use, req_id; 1080 u32 i; 1081 int rc; 1082 1083 next_to_use = rx_ring->next_to_use; 1084 1085 for (i = 0; i < num; i++) { 1086 struct ena_rx_buffer *rx_info; 1087 1088 req_id = rx_ring->free_ids[next_to_use]; 1089 1090 rx_info = &rx_ring->rx_buffer_info[req_id]; 1091 1092 rc = ena_alloc_rx_buffer(rx_ring, rx_info); 1093 if (unlikely(rc < 0)) { 1094 netif_warn(rx_ring->adapter, rx_err, rx_ring->netdev, 1095 "Failed to allocate buffer for rx queue %d\n", 1096 rx_ring->qid); 1097 break; 1098 } 1099 rc = ena_com_add_single_rx_desc(rx_ring->ena_com_io_sq, 1100 &rx_info->ena_buf, 1101 req_id); 1102 if (unlikely(rc)) { 1103 netif_warn(rx_ring->adapter, rx_status, rx_ring->netdev, 1104 "Failed to add buffer for rx queue %d\n", 1105 rx_ring->qid); 1106 break; 1107 } 1108 next_to_use = ENA_RX_RING_IDX_NEXT(next_to_use, 1109 rx_ring->ring_size); 1110 } 1111 1112 if (unlikely(i < num)) { 1113 ena_increase_stat(&rx_ring->rx_stats.refil_partial, 1, 1114 &rx_ring->syncp); 1115 netif_warn(rx_ring->adapter, rx_err, rx_ring->netdev, 1116 "Refilled rx qid %d with only %d buffers (from %d)\n", 1117 rx_ring->qid, i, num); 1118 } 1119 1120 /* ena_com_write_sq_doorbell issues a wmb() */ 1121 if (likely(i)) 1122 ena_com_write_sq_doorbell(rx_ring->ena_com_io_sq); 1123 1124 rx_ring->next_to_use = next_to_use; 1125 1126 return i; 1127 } 1128 1129 static void ena_free_rx_bufs(struct ena_adapter *adapter, 1130 u32 qid) 1131 { 1132 struct ena_ring *rx_ring = &adapter->rx_ring[qid]; 1133 u32 i; 1134 1135 for (i = 0; i < rx_ring->ring_size; i++) { 1136 struct ena_rx_buffer *rx_info = &rx_ring->rx_buffer_info[i]; 1137 1138 if (rx_info->page) 1139 ena_free_rx_page(rx_ring, rx_info); 1140 } 1141 } 1142 1143 /* ena_refill_all_rx_bufs - allocate all queues Rx buffers 1144 * @adapter: board private structure 1145 */ 1146 static void ena_refill_all_rx_bufs(struct ena_adapter *adapter) 1147 { 1148 struct ena_ring *rx_ring; 1149 int i, rc, bufs_num; 1150 1151 for (i = 0; i < adapter->num_io_queues; i++) { 1152 rx_ring = &adapter->rx_ring[i]; 1153 bufs_num = rx_ring->ring_size - 1; 1154 rc = ena_refill_rx_bufs(rx_ring, bufs_num); 1155 1156 if (unlikely(rc != bufs_num)) 1157 netif_warn(rx_ring->adapter, rx_status, rx_ring->netdev, 1158 "Refilling Queue %d failed. allocated %d buffers from: %d\n", 1159 i, rc, bufs_num); 1160 } 1161 } 1162 1163 static void ena_free_all_rx_bufs(struct ena_adapter *adapter) 1164 { 1165 int i; 1166 1167 for (i = 0; i < adapter->num_io_queues; i++) 1168 ena_free_rx_bufs(adapter, i); 1169 } 1170 1171 static void ena_unmap_tx_buff(struct ena_ring *tx_ring, 1172 struct ena_tx_buffer *tx_info) 1173 { 1174 struct ena_com_buf *ena_buf; 1175 u32 cnt; 1176 int i; 1177 1178 ena_buf = tx_info->bufs; 1179 cnt = tx_info->num_of_bufs; 1180 1181 if (unlikely(!cnt)) 1182 return; 1183 1184 if (tx_info->map_linear_data) { 1185 dma_unmap_single(tx_ring->dev, 1186 dma_unmap_addr(ena_buf, paddr), 1187 dma_unmap_len(ena_buf, len), 1188 DMA_TO_DEVICE); 1189 ena_buf++; 1190 cnt--; 1191 } 1192 1193 /* unmap remaining mapped pages */ 1194 for (i = 0; i < cnt; i++) { 1195 dma_unmap_page(tx_ring->dev, dma_unmap_addr(ena_buf, paddr), 1196 dma_unmap_len(ena_buf, len), DMA_TO_DEVICE); 1197 ena_buf++; 1198 } 1199 } 1200 1201 /* ena_free_tx_bufs - Free Tx Buffers per Queue 1202 * @tx_ring: TX ring for which buffers be freed 1203 */ 1204 static void ena_free_tx_bufs(struct ena_ring *tx_ring) 1205 { 1206 bool print_once = true; 1207 u32 i; 1208 1209 for (i = 0; i < tx_ring->ring_size; i++) { 1210 struct ena_tx_buffer *tx_info = &tx_ring->tx_buffer_info[i]; 1211 1212 if (!tx_info->skb) 1213 continue; 1214 1215 if (print_once) { 1216 netif_notice(tx_ring->adapter, ifdown, tx_ring->netdev, 1217 "Free uncompleted tx skb qid %d idx 0x%x\n", 1218 tx_ring->qid, i); 1219 print_once = false; 1220 } else { 1221 netif_dbg(tx_ring->adapter, ifdown, tx_ring->netdev, 1222 "Free uncompleted tx skb qid %d idx 0x%x\n", 1223 tx_ring->qid, i); 1224 } 1225 1226 ena_unmap_tx_buff(tx_ring, tx_info); 1227 1228 dev_kfree_skb_any(tx_info->skb); 1229 } 1230 netdev_tx_reset_queue(netdev_get_tx_queue(tx_ring->netdev, 1231 tx_ring->qid)); 1232 } 1233 1234 static void ena_free_all_tx_bufs(struct ena_adapter *adapter) 1235 { 1236 struct ena_ring *tx_ring; 1237 int i; 1238 1239 for (i = 0; i < adapter->num_io_queues + adapter->xdp_num_queues; i++) { 1240 tx_ring = &adapter->tx_ring[i]; 1241 ena_free_tx_bufs(tx_ring); 1242 } 1243 } 1244 1245 static void ena_destroy_all_tx_queues(struct ena_adapter *adapter) 1246 { 1247 u16 ena_qid; 1248 int i; 1249 1250 for (i = 0; i < adapter->num_io_queues + adapter->xdp_num_queues; i++) { 1251 ena_qid = ENA_IO_TXQ_IDX(i); 1252 ena_com_destroy_io_queue(adapter->ena_dev, ena_qid); 1253 } 1254 } 1255 1256 static void ena_destroy_all_rx_queues(struct ena_adapter *adapter) 1257 { 1258 u16 ena_qid; 1259 int i; 1260 1261 for (i = 0; i < adapter->num_io_queues; i++) { 1262 ena_qid = ENA_IO_RXQ_IDX(i); 1263 cancel_work_sync(&adapter->ena_napi[i].dim.work); 1264 ena_com_destroy_io_queue(adapter->ena_dev, ena_qid); 1265 } 1266 } 1267 1268 static void ena_destroy_all_io_queues(struct ena_adapter *adapter) 1269 { 1270 ena_destroy_all_tx_queues(adapter); 1271 ena_destroy_all_rx_queues(adapter); 1272 } 1273 1274 static int handle_invalid_req_id(struct ena_ring *ring, u16 req_id, 1275 struct ena_tx_buffer *tx_info, bool is_xdp) 1276 { 1277 if (tx_info) 1278 netif_err(ring->adapter, 1279 tx_done, 1280 ring->netdev, 1281 "tx_info doesn't have valid %s. qid %u req_id %u", 1282 is_xdp ? "xdp frame" : "skb", ring->qid, req_id); 1283 else 1284 netif_err(ring->adapter, 1285 tx_done, 1286 ring->netdev, 1287 "Invalid req_id %u in qid %u\n", 1288 req_id, ring->qid); 1289 1290 ena_increase_stat(&ring->tx_stats.bad_req_id, 1, &ring->syncp); 1291 ena_reset_device(ring->adapter, ENA_REGS_RESET_INV_TX_REQ_ID); 1292 1293 return -EFAULT; 1294 } 1295 1296 static int validate_tx_req_id(struct ena_ring *tx_ring, u16 req_id) 1297 { 1298 struct ena_tx_buffer *tx_info; 1299 1300 tx_info = &tx_ring->tx_buffer_info[req_id]; 1301 if (likely(tx_info->skb)) 1302 return 0; 1303 1304 return handle_invalid_req_id(tx_ring, req_id, tx_info, false); 1305 } 1306 1307 static int validate_xdp_req_id(struct ena_ring *xdp_ring, u16 req_id) 1308 { 1309 struct ena_tx_buffer *tx_info; 1310 1311 tx_info = &xdp_ring->tx_buffer_info[req_id]; 1312 if (likely(tx_info->xdpf)) 1313 return 0; 1314 1315 return handle_invalid_req_id(xdp_ring, req_id, tx_info, true); 1316 } 1317 1318 static int ena_clean_tx_irq(struct ena_ring *tx_ring, u32 budget) 1319 { 1320 struct netdev_queue *txq; 1321 bool above_thresh; 1322 u32 tx_bytes = 0; 1323 u32 total_done = 0; 1324 u16 next_to_clean; 1325 u16 req_id; 1326 int tx_pkts = 0; 1327 int rc; 1328 1329 next_to_clean = tx_ring->next_to_clean; 1330 txq = netdev_get_tx_queue(tx_ring->netdev, tx_ring->qid); 1331 1332 while (tx_pkts < budget) { 1333 struct ena_tx_buffer *tx_info; 1334 struct sk_buff *skb; 1335 1336 rc = ena_com_tx_comp_req_id_get(tx_ring->ena_com_io_cq, 1337 &req_id); 1338 if (rc) { 1339 if (unlikely(rc == -EINVAL)) 1340 handle_invalid_req_id(tx_ring, req_id, NULL, 1341 false); 1342 break; 1343 } 1344 1345 /* validate that the request id points to a valid skb */ 1346 rc = validate_tx_req_id(tx_ring, req_id); 1347 if (rc) 1348 break; 1349 1350 tx_info = &tx_ring->tx_buffer_info[req_id]; 1351 skb = tx_info->skb; 1352 1353 /* prefetch skb_end_pointer() to speedup skb_shinfo(skb) */ 1354 prefetch(&skb->end); 1355 1356 tx_info->skb = NULL; 1357 tx_info->last_jiffies = 0; 1358 1359 ena_unmap_tx_buff(tx_ring, tx_info); 1360 1361 netif_dbg(tx_ring->adapter, tx_done, tx_ring->netdev, 1362 "tx_poll: q %d skb %p completed\n", tx_ring->qid, 1363 skb); 1364 1365 tx_bytes += skb->len; 1366 dev_kfree_skb(skb); 1367 tx_pkts++; 1368 total_done += tx_info->tx_descs; 1369 1370 tx_ring->free_ids[next_to_clean] = req_id; 1371 next_to_clean = ENA_TX_RING_IDX_NEXT(next_to_clean, 1372 tx_ring->ring_size); 1373 } 1374 1375 tx_ring->next_to_clean = next_to_clean; 1376 ena_com_comp_ack(tx_ring->ena_com_io_sq, total_done); 1377 ena_com_update_dev_comp_head(tx_ring->ena_com_io_cq); 1378 1379 netdev_tx_completed_queue(txq, tx_pkts, tx_bytes); 1380 1381 netif_dbg(tx_ring->adapter, tx_done, tx_ring->netdev, 1382 "tx_poll: q %d done. total pkts: %d\n", 1383 tx_ring->qid, tx_pkts); 1384 1385 /* need to make the rings circular update visible to 1386 * ena_start_xmit() before checking for netif_queue_stopped(). 1387 */ 1388 smp_mb(); 1389 1390 above_thresh = ena_com_sq_have_enough_space(tx_ring->ena_com_io_sq, 1391 ENA_TX_WAKEUP_THRESH); 1392 if (unlikely(netif_tx_queue_stopped(txq) && above_thresh)) { 1393 __netif_tx_lock(txq, smp_processor_id()); 1394 above_thresh = 1395 ena_com_sq_have_enough_space(tx_ring->ena_com_io_sq, 1396 ENA_TX_WAKEUP_THRESH); 1397 if (netif_tx_queue_stopped(txq) && above_thresh && 1398 test_bit(ENA_FLAG_DEV_UP, &tx_ring->adapter->flags)) { 1399 netif_tx_wake_queue(txq); 1400 ena_increase_stat(&tx_ring->tx_stats.queue_wakeup, 1, 1401 &tx_ring->syncp); 1402 } 1403 __netif_tx_unlock(txq); 1404 } 1405 1406 return tx_pkts; 1407 } 1408 1409 static struct sk_buff *ena_alloc_skb(struct ena_ring *rx_ring, void *first_frag) 1410 { 1411 struct sk_buff *skb; 1412 1413 if (!first_frag) 1414 skb = napi_alloc_skb(rx_ring->napi, rx_ring->rx_copybreak); 1415 else 1416 skb = napi_build_skb(first_frag, ENA_PAGE_SIZE); 1417 1418 if (unlikely(!skb)) { 1419 ena_increase_stat(&rx_ring->rx_stats.skb_alloc_fail, 1, 1420 &rx_ring->syncp); 1421 1422 netif_dbg(rx_ring->adapter, rx_err, rx_ring->netdev, 1423 "Failed to allocate skb. first_frag %s\n", 1424 first_frag ? "provided" : "not provided"); 1425 return NULL; 1426 } 1427 1428 return skb; 1429 } 1430 1431 static struct sk_buff *ena_rx_skb(struct ena_ring *rx_ring, 1432 struct ena_com_rx_buf_info *ena_bufs, 1433 u32 descs, 1434 u16 *next_to_clean) 1435 { 1436 struct ena_rx_buffer *rx_info; 1437 struct ena_adapter *adapter; 1438 u16 len, req_id, buf = 0; 1439 struct sk_buff *skb; 1440 void *page_addr; 1441 u32 page_offset; 1442 void *data_addr; 1443 1444 len = ena_bufs[buf].len; 1445 req_id = ena_bufs[buf].req_id; 1446 1447 rx_info = &rx_ring->rx_buffer_info[req_id]; 1448 1449 if (unlikely(!rx_info->page)) { 1450 adapter = rx_ring->adapter; 1451 netif_err(adapter, rx_err, rx_ring->netdev, 1452 "Page is NULL. qid %u req_id %u\n", rx_ring->qid, req_id); 1453 ena_increase_stat(&rx_ring->rx_stats.bad_req_id, 1, &rx_ring->syncp); 1454 ena_reset_device(adapter, ENA_REGS_RESET_INV_RX_REQ_ID); 1455 return NULL; 1456 } 1457 1458 netif_dbg(rx_ring->adapter, rx_status, rx_ring->netdev, 1459 "rx_info %p page %p\n", 1460 rx_info, rx_info->page); 1461 1462 /* save virt address of first buffer */ 1463 page_addr = page_address(rx_info->page); 1464 page_offset = rx_info->page_offset; 1465 data_addr = page_addr + page_offset; 1466 1467 prefetch(data_addr); 1468 1469 if (len <= rx_ring->rx_copybreak) { 1470 skb = ena_alloc_skb(rx_ring, NULL); 1471 if (unlikely(!skb)) 1472 return NULL; 1473 1474 netif_dbg(rx_ring->adapter, rx_status, rx_ring->netdev, 1475 "RX allocated small packet. len %d. data_len %d\n", 1476 skb->len, skb->data_len); 1477 1478 /* sync this buffer for CPU use */ 1479 dma_sync_single_for_cpu(rx_ring->dev, 1480 dma_unmap_addr(&rx_info->ena_buf, paddr), 1481 len, 1482 DMA_FROM_DEVICE); 1483 skb_copy_to_linear_data(skb, data_addr, len); 1484 dma_sync_single_for_device(rx_ring->dev, 1485 dma_unmap_addr(&rx_info->ena_buf, paddr), 1486 len, 1487 DMA_FROM_DEVICE); 1488 1489 skb_put(skb, len); 1490 skb->protocol = eth_type_trans(skb, rx_ring->netdev); 1491 rx_ring->free_ids[*next_to_clean] = req_id; 1492 *next_to_clean = ENA_RX_RING_IDX_ADD(*next_to_clean, descs, 1493 rx_ring->ring_size); 1494 return skb; 1495 } 1496 1497 ena_unmap_rx_buff(rx_ring, rx_info); 1498 1499 skb = ena_alloc_skb(rx_ring, page_addr); 1500 if (unlikely(!skb)) 1501 return NULL; 1502 1503 /* Populate skb's linear part */ 1504 skb_reserve(skb, page_offset); 1505 skb_put(skb, len); 1506 skb->protocol = eth_type_trans(skb, rx_ring->netdev); 1507 1508 do { 1509 netif_dbg(rx_ring->adapter, rx_status, rx_ring->netdev, 1510 "RX skb updated. len %d. data_len %d\n", 1511 skb->len, skb->data_len); 1512 1513 rx_info->page = NULL; 1514 1515 rx_ring->free_ids[*next_to_clean] = req_id; 1516 *next_to_clean = 1517 ENA_RX_RING_IDX_NEXT(*next_to_clean, 1518 rx_ring->ring_size); 1519 if (likely(--descs == 0)) 1520 break; 1521 1522 buf++; 1523 len = ena_bufs[buf].len; 1524 req_id = ena_bufs[buf].req_id; 1525 1526 rx_info = &rx_ring->rx_buffer_info[req_id]; 1527 1528 ena_unmap_rx_buff(rx_ring, rx_info); 1529 1530 skb_add_rx_frag(skb, skb_shinfo(skb)->nr_frags, rx_info->page, 1531 rx_info->page_offset, len, ENA_PAGE_SIZE); 1532 1533 } while (1); 1534 1535 return skb; 1536 } 1537 1538 /* ena_rx_checksum - indicate in skb if hw indicated a good cksum 1539 * @adapter: structure containing adapter specific data 1540 * @ena_rx_ctx: received packet context/metadata 1541 * @skb: skb currently being received and modified 1542 */ 1543 static void ena_rx_checksum(struct ena_ring *rx_ring, 1544 struct ena_com_rx_ctx *ena_rx_ctx, 1545 struct sk_buff *skb) 1546 { 1547 /* Rx csum disabled */ 1548 if (unlikely(!(rx_ring->netdev->features & NETIF_F_RXCSUM))) { 1549 skb->ip_summed = CHECKSUM_NONE; 1550 return; 1551 } 1552 1553 /* For fragmented packets the checksum isn't valid */ 1554 if (ena_rx_ctx->frag) { 1555 skb->ip_summed = CHECKSUM_NONE; 1556 return; 1557 } 1558 1559 /* if IP and error */ 1560 if (unlikely((ena_rx_ctx->l3_proto == ENA_ETH_IO_L3_PROTO_IPV4) && 1561 (ena_rx_ctx->l3_csum_err))) { 1562 /* ipv4 checksum error */ 1563 skb->ip_summed = CHECKSUM_NONE; 1564 ena_increase_stat(&rx_ring->rx_stats.csum_bad, 1, 1565 &rx_ring->syncp); 1566 netif_dbg(rx_ring->adapter, rx_err, rx_ring->netdev, 1567 "RX IPv4 header checksum error\n"); 1568 return; 1569 } 1570 1571 /* if TCP/UDP */ 1572 if (likely((ena_rx_ctx->l4_proto == ENA_ETH_IO_L4_PROTO_TCP) || 1573 (ena_rx_ctx->l4_proto == ENA_ETH_IO_L4_PROTO_UDP))) { 1574 if (unlikely(ena_rx_ctx->l4_csum_err)) { 1575 /* TCP/UDP checksum error */ 1576 ena_increase_stat(&rx_ring->rx_stats.csum_bad, 1, 1577 &rx_ring->syncp); 1578 netif_dbg(rx_ring->adapter, rx_err, rx_ring->netdev, 1579 "RX L4 checksum error\n"); 1580 skb->ip_summed = CHECKSUM_NONE; 1581 return; 1582 } 1583 1584 if (likely(ena_rx_ctx->l4_csum_checked)) { 1585 skb->ip_summed = CHECKSUM_UNNECESSARY; 1586 ena_increase_stat(&rx_ring->rx_stats.csum_good, 1, 1587 &rx_ring->syncp); 1588 } else { 1589 ena_increase_stat(&rx_ring->rx_stats.csum_unchecked, 1, 1590 &rx_ring->syncp); 1591 skb->ip_summed = CHECKSUM_NONE; 1592 } 1593 } else { 1594 skb->ip_summed = CHECKSUM_NONE; 1595 return; 1596 } 1597 1598 } 1599 1600 static void ena_set_rx_hash(struct ena_ring *rx_ring, 1601 struct ena_com_rx_ctx *ena_rx_ctx, 1602 struct sk_buff *skb) 1603 { 1604 enum pkt_hash_types hash_type; 1605 1606 if (likely(rx_ring->netdev->features & NETIF_F_RXHASH)) { 1607 if (likely((ena_rx_ctx->l4_proto == ENA_ETH_IO_L4_PROTO_TCP) || 1608 (ena_rx_ctx->l4_proto == ENA_ETH_IO_L4_PROTO_UDP))) 1609 1610 hash_type = PKT_HASH_TYPE_L4; 1611 else 1612 hash_type = PKT_HASH_TYPE_NONE; 1613 1614 /* Override hash type if the packet is fragmented */ 1615 if (ena_rx_ctx->frag) 1616 hash_type = PKT_HASH_TYPE_NONE; 1617 1618 skb_set_hash(skb, ena_rx_ctx->hash, hash_type); 1619 } 1620 } 1621 1622 static int ena_xdp_handle_buff(struct ena_ring *rx_ring, struct xdp_buff *xdp) 1623 { 1624 struct ena_rx_buffer *rx_info; 1625 int ret; 1626 1627 rx_info = &rx_ring->rx_buffer_info[rx_ring->ena_bufs[0].req_id]; 1628 xdp_prepare_buff(xdp, page_address(rx_info->page), 1629 rx_info->page_offset, 1630 rx_ring->ena_bufs[0].len, false); 1631 /* If for some reason we received a bigger packet than 1632 * we expect, then we simply drop it 1633 */ 1634 if (unlikely(rx_ring->ena_bufs[0].len > ENA_XDP_MAX_MTU)) 1635 return ENA_XDP_DROP; 1636 1637 ret = ena_xdp_execute(rx_ring, xdp); 1638 1639 /* The xdp program might expand the headers */ 1640 if (ret == ENA_XDP_PASS) { 1641 rx_info->page_offset = xdp->data - xdp->data_hard_start; 1642 rx_ring->ena_bufs[0].len = xdp->data_end - xdp->data; 1643 } 1644 1645 return ret; 1646 } 1647 /* ena_clean_rx_irq - Cleanup RX irq 1648 * @rx_ring: RX ring to clean 1649 * @napi: napi handler 1650 * @budget: how many packets driver is allowed to clean 1651 * 1652 * Returns the number of cleaned buffers. 1653 */ 1654 static int ena_clean_rx_irq(struct ena_ring *rx_ring, struct napi_struct *napi, 1655 u32 budget) 1656 { 1657 u16 next_to_clean = rx_ring->next_to_clean; 1658 struct ena_com_rx_ctx ena_rx_ctx; 1659 struct ena_rx_buffer *rx_info; 1660 struct ena_adapter *adapter; 1661 u32 res_budget, work_done; 1662 int rx_copybreak_pkt = 0; 1663 int refill_threshold; 1664 struct sk_buff *skb; 1665 int refill_required; 1666 struct xdp_buff xdp; 1667 int xdp_flags = 0; 1668 int total_len = 0; 1669 int xdp_verdict; 1670 int rc = 0; 1671 int i; 1672 1673 netif_dbg(rx_ring->adapter, rx_status, rx_ring->netdev, 1674 "%s qid %d\n", __func__, rx_ring->qid); 1675 res_budget = budget; 1676 xdp_init_buff(&xdp, ENA_PAGE_SIZE, &rx_ring->xdp_rxq); 1677 1678 do { 1679 xdp_verdict = ENA_XDP_PASS; 1680 skb = NULL; 1681 ena_rx_ctx.ena_bufs = rx_ring->ena_bufs; 1682 ena_rx_ctx.max_bufs = rx_ring->sgl_size; 1683 ena_rx_ctx.descs = 0; 1684 ena_rx_ctx.pkt_offset = 0; 1685 rc = ena_com_rx_pkt(rx_ring->ena_com_io_cq, 1686 rx_ring->ena_com_io_sq, 1687 &ena_rx_ctx); 1688 if (unlikely(rc)) 1689 goto error; 1690 1691 if (unlikely(ena_rx_ctx.descs == 0)) 1692 break; 1693 1694 /* First descriptor might have an offset set by the device */ 1695 rx_info = &rx_ring->rx_buffer_info[rx_ring->ena_bufs[0].req_id]; 1696 rx_info->page_offset += ena_rx_ctx.pkt_offset; 1697 1698 netif_dbg(rx_ring->adapter, rx_status, rx_ring->netdev, 1699 "rx_poll: q %d got packet from ena. descs #: %d l3 proto %d l4 proto %d hash: %x\n", 1700 rx_ring->qid, ena_rx_ctx.descs, ena_rx_ctx.l3_proto, 1701 ena_rx_ctx.l4_proto, ena_rx_ctx.hash); 1702 1703 if (ena_xdp_present_ring(rx_ring)) 1704 xdp_verdict = ena_xdp_handle_buff(rx_ring, &xdp); 1705 1706 /* allocate skb and fill it */ 1707 if (xdp_verdict == ENA_XDP_PASS) 1708 skb = ena_rx_skb(rx_ring, 1709 rx_ring->ena_bufs, 1710 ena_rx_ctx.descs, 1711 &next_to_clean); 1712 1713 if (unlikely(!skb)) { 1714 for (i = 0; i < ena_rx_ctx.descs; i++) { 1715 int req_id = rx_ring->ena_bufs[i].req_id; 1716 1717 rx_ring->free_ids[next_to_clean] = req_id; 1718 next_to_clean = 1719 ENA_RX_RING_IDX_NEXT(next_to_clean, 1720 rx_ring->ring_size); 1721 1722 /* Packets was passed for transmission, unmap it 1723 * from RX side. 1724 */ 1725 if (xdp_verdict & ENA_XDP_FORWARDED) { 1726 ena_unmap_rx_buff(rx_ring, 1727 &rx_ring->rx_buffer_info[req_id]); 1728 rx_ring->rx_buffer_info[req_id].page = NULL; 1729 } 1730 } 1731 if (xdp_verdict != ENA_XDP_PASS) { 1732 xdp_flags |= xdp_verdict; 1733 total_len += ena_rx_ctx.ena_bufs[0].len; 1734 res_budget--; 1735 continue; 1736 } 1737 break; 1738 } 1739 1740 ena_rx_checksum(rx_ring, &ena_rx_ctx, skb); 1741 1742 ena_set_rx_hash(rx_ring, &ena_rx_ctx, skb); 1743 1744 skb_record_rx_queue(skb, rx_ring->qid); 1745 1746 if (rx_ring->ena_bufs[0].len <= rx_ring->rx_copybreak) 1747 rx_copybreak_pkt++; 1748 1749 total_len += skb->len; 1750 1751 napi_gro_receive(napi, skb); 1752 1753 res_budget--; 1754 } while (likely(res_budget)); 1755 1756 work_done = budget - res_budget; 1757 rx_ring->per_napi_packets += work_done; 1758 u64_stats_update_begin(&rx_ring->syncp); 1759 rx_ring->rx_stats.bytes += total_len; 1760 rx_ring->rx_stats.cnt += work_done; 1761 rx_ring->rx_stats.rx_copybreak_pkt += rx_copybreak_pkt; 1762 u64_stats_update_end(&rx_ring->syncp); 1763 1764 rx_ring->next_to_clean = next_to_clean; 1765 1766 refill_required = ena_com_free_q_entries(rx_ring->ena_com_io_sq); 1767 refill_threshold = 1768 min_t(int, rx_ring->ring_size / ENA_RX_REFILL_THRESH_DIVIDER, 1769 ENA_RX_REFILL_THRESH_PACKET); 1770 1771 /* Optimization, try to batch new rx buffers */ 1772 if (refill_required > refill_threshold) { 1773 ena_com_update_dev_comp_head(rx_ring->ena_com_io_cq); 1774 ena_refill_rx_bufs(rx_ring, refill_required); 1775 } 1776 1777 if (xdp_flags & ENA_XDP_REDIRECT) 1778 xdp_do_flush_map(); 1779 1780 return work_done; 1781 1782 error: 1783 adapter = netdev_priv(rx_ring->netdev); 1784 1785 if (rc == -ENOSPC) { 1786 ena_increase_stat(&rx_ring->rx_stats.bad_desc_num, 1, 1787 &rx_ring->syncp); 1788 ena_reset_device(adapter, ENA_REGS_RESET_TOO_MANY_RX_DESCS); 1789 } else { 1790 ena_increase_stat(&rx_ring->rx_stats.bad_req_id, 1, 1791 &rx_ring->syncp); 1792 ena_reset_device(adapter, ENA_REGS_RESET_INV_RX_REQ_ID); 1793 } 1794 return 0; 1795 } 1796 1797 static void ena_dim_work(struct work_struct *w) 1798 { 1799 struct dim *dim = container_of(w, struct dim, work); 1800 struct dim_cq_moder cur_moder = 1801 net_dim_get_rx_moderation(dim->mode, dim->profile_ix); 1802 struct ena_napi *ena_napi = container_of(dim, struct ena_napi, dim); 1803 1804 ena_napi->rx_ring->smoothed_interval = cur_moder.usec; 1805 dim->state = DIM_START_MEASURE; 1806 } 1807 1808 static void ena_adjust_adaptive_rx_intr_moderation(struct ena_napi *ena_napi) 1809 { 1810 struct dim_sample dim_sample; 1811 struct ena_ring *rx_ring = ena_napi->rx_ring; 1812 1813 if (!rx_ring->per_napi_packets) 1814 return; 1815 1816 rx_ring->non_empty_napi_events++; 1817 1818 dim_update_sample(rx_ring->non_empty_napi_events, 1819 rx_ring->rx_stats.cnt, 1820 rx_ring->rx_stats.bytes, 1821 &dim_sample); 1822 1823 net_dim(&ena_napi->dim, dim_sample); 1824 1825 rx_ring->per_napi_packets = 0; 1826 } 1827 1828 static void ena_unmask_interrupt(struct ena_ring *tx_ring, 1829 struct ena_ring *rx_ring) 1830 { 1831 u32 rx_interval = tx_ring->smoothed_interval; 1832 struct ena_eth_io_intr_reg intr_reg; 1833 1834 /* Rx ring can be NULL when for XDP tx queues which don't have an 1835 * accompanying rx_ring pair. 1836 */ 1837 if (rx_ring) 1838 rx_interval = ena_com_get_adaptive_moderation_enabled(rx_ring->ena_dev) ? 1839 rx_ring->smoothed_interval : 1840 ena_com_get_nonadaptive_moderation_interval_rx(rx_ring->ena_dev); 1841 1842 /* Update intr register: rx intr delay, 1843 * tx intr delay and interrupt unmask 1844 */ 1845 ena_com_update_intr_reg(&intr_reg, 1846 rx_interval, 1847 tx_ring->smoothed_interval, 1848 true); 1849 1850 ena_increase_stat(&tx_ring->tx_stats.unmask_interrupt, 1, 1851 &tx_ring->syncp); 1852 1853 /* It is a shared MSI-X. 1854 * Tx and Rx CQ have pointer to it. 1855 * So we use one of them to reach the intr reg 1856 * The Tx ring is used because the rx_ring is NULL for XDP queues 1857 */ 1858 ena_com_unmask_intr(tx_ring->ena_com_io_cq, &intr_reg); 1859 } 1860 1861 static void ena_update_ring_numa_node(struct ena_ring *tx_ring, 1862 struct ena_ring *rx_ring) 1863 { 1864 int cpu = get_cpu(); 1865 int numa_node; 1866 1867 /* Check only one ring since the 2 rings are running on the same cpu */ 1868 if (likely(tx_ring->cpu == cpu)) 1869 goto out; 1870 1871 tx_ring->cpu = cpu; 1872 if (rx_ring) 1873 rx_ring->cpu = cpu; 1874 1875 numa_node = cpu_to_node(cpu); 1876 1877 if (likely(tx_ring->numa_node == numa_node)) 1878 goto out; 1879 1880 put_cpu(); 1881 1882 if (numa_node != NUMA_NO_NODE) { 1883 ena_com_update_numa_node(tx_ring->ena_com_io_cq, numa_node); 1884 tx_ring->numa_node = numa_node; 1885 if (rx_ring) { 1886 rx_ring->numa_node = numa_node; 1887 ena_com_update_numa_node(rx_ring->ena_com_io_cq, 1888 numa_node); 1889 } 1890 } 1891 1892 return; 1893 out: 1894 put_cpu(); 1895 } 1896 1897 static int ena_clean_xdp_irq(struct ena_ring *xdp_ring, u32 budget) 1898 { 1899 u32 total_done = 0; 1900 u16 next_to_clean; 1901 int tx_pkts = 0; 1902 u16 req_id; 1903 int rc; 1904 1905 if (unlikely(!xdp_ring)) 1906 return 0; 1907 next_to_clean = xdp_ring->next_to_clean; 1908 1909 while (tx_pkts < budget) { 1910 struct ena_tx_buffer *tx_info; 1911 struct xdp_frame *xdpf; 1912 1913 rc = ena_com_tx_comp_req_id_get(xdp_ring->ena_com_io_cq, 1914 &req_id); 1915 if (rc) { 1916 if (unlikely(rc == -EINVAL)) 1917 handle_invalid_req_id(xdp_ring, req_id, NULL, 1918 true); 1919 break; 1920 } 1921 1922 /* validate that the request id points to a valid xdp_frame */ 1923 rc = validate_xdp_req_id(xdp_ring, req_id); 1924 if (rc) 1925 break; 1926 1927 tx_info = &xdp_ring->tx_buffer_info[req_id]; 1928 xdpf = tx_info->xdpf; 1929 1930 tx_info->xdpf = NULL; 1931 tx_info->last_jiffies = 0; 1932 ena_unmap_tx_buff(xdp_ring, tx_info); 1933 1934 netif_dbg(xdp_ring->adapter, tx_done, xdp_ring->netdev, 1935 "tx_poll: q %d skb %p completed\n", xdp_ring->qid, 1936 xdpf); 1937 1938 tx_pkts++; 1939 total_done += tx_info->tx_descs; 1940 1941 xdp_return_frame(xdpf); 1942 xdp_ring->free_ids[next_to_clean] = req_id; 1943 next_to_clean = ENA_TX_RING_IDX_NEXT(next_to_clean, 1944 xdp_ring->ring_size); 1945 } 1946 1947 xdp_ring->next_to_clean = next_to_clean; 1948 ena_com_comp_ack(xdp_ring->ena_com_io_sq, total_done); 1949 ena_com_update_dev_comp_head(xdp_ring->ena_com_io_cq); 1950 1951 netif_dbg(xdp_ring->adapter, tx_done, xdp_ring->netdev, 1952 "tx_poll: q %d done. total pkts: %d\n", 1953 xdp_ring->qid, tx_pkts); 1954 1955 return tx_pkts; 1956 } 1957 1958 static int ena_io_poll(struct napi_struct *napi, int budget) 1959 { 1960 struct ena_napi *ena_napi = container_of(napi, struct ena_napi, napi); 1961 struct ena_ring *tx_ring, *rx_ring; 1962 int tx_work_done; 1963 int rx_work_done = 0; 1964 int tx_budget; 1965 int napi_comp_call = 0; 1966 int ret; 1967 1968 tx_ring = ena_napi->tx_ring; 1969 rx_ring = ena_napi->rx_ring; 1970 1971 tx_budget = tx_ring->ring_size / ENA_TX_POLL_BUDGET_DIVIDER; 1972 1973 if (!test_bit(ENA_FLAG_DEV_UP, &tx_ring->adapter->flags) || 1974 test_bit(ENA_FLAG_TRIGGER_RESET, &tx_ring->adapter->flags)) { 1975 napi_complete_done(napi, 0); 1976 return 0; 1977 } 1978 1979 tx_work_done = ena_clean_tx_irq(tx_ring, tx_budget); 1980 /* On netpoll the budget is zero and the handler should only clean the 1981 * tx completions. 1982 */ 1983 if (likely(budget)) 1984 rx_work_done = ena_clean_rx_irq(rx_ring, napi, budget); 1985 1986 /* If the device is about to reset or down, avoid unmask 1987 * the interrupt and return 0 so NAPI won't reschedule 1988 */ 1989 if (unlikely(!test_bit(ENA_FLAG_DEV_UP, &tx_ring->adapter->flags) || 1990 test_bit(ENA_FLAG_TRIGGER_RESET, &tx_ring->adapter->flags))) { 1991 napi_complete_done(napi, 0); 1992 ret = 0; 1993 1994 } else if ((budget > rx_work_done) && (tx_budget > tx_work_done)) { 1995 napi_comp_call = 1; 1996 1997 /* Update numa and unmask the interrupt only when schedule 1998 * from the interrupt context (vs from sk_busy_loop) 1999 */ 2000 if (napi_complete_done(napi, rx_work_done) && 2001 READ_ONCE(ena_napi->interrupts_masked)) { 2002 smp_rmb(); /* make sure interrupts_masked is read */ 2003 WRITE_ONCE(ena_napi->interrupts_masked, false); 2004 /* We apply adaptive moderation on Rx path only. 2005 * Tx uses static interrupt moderation. 2006 */ 2007 if (ena_com_get_adaptive_moderation_enabled(rx_ring->ena_dev)) 2008 ena_adjust_adaptive_rx_intr_moderation(ena_napi); 2009 2010 ena_update_ring_numa_node(tx_ring, rx_ring); 2011 ena_unmask_interrupt(tx_ring, rx_ring); 2012 } 2013 2014 ret = rx_work_done; 2015 } else { 2016 ret = budget; 2017 } 2018 2019 u64_stats_update_begin(&tx_ring->syncp); 2020 tx_ring->tx_stats.napi_comp += napi_comp_call; 2021 tx_ring->tx_stats.tx_poll++; 2022 u64_stats_update_end(&tx_ring->syncp); 2023 2024 tx_ring->tx_stats.last_napi_jiffies = jiffies; 2025 2026 return ret; 2027 } 2028 2029 static irqreturn_t ena_intr_msix_mgmnt(int irq, void *data) 2030 { 2031 struct ena_adapter *adapter = (struct ena_adapter *)data; 2032 2033 ena_com_admin_q_comp_intr_handler(adapter->ena_dev); 2034 2035 /* Don't call the aenq handler before probe is done */ 2036 if (likely(test_bit(ENA_FLAG_DEVICE_RUNNING, &adapter->flags))) 2037 ena_com_aenq_intr_handler(adapter->ena_dev, data); 2038 2039 return IRQ_HANDLED; 2040 } 2041 2042 /* ena_intr_msix_io - MSI-X Interrupt Handler for Tx/Rx 2043 * @irq: interrupt number 2044 * @data: pointer to a network interface private napi device structure 2045 */ 2046 static irqreturn_t ena_intr_msix_io(int irq, void *data) 2047 { 2048 struct ena_napi *ena_napi = data; 2049 2050 /* Used to check HW health */ 2051 WRITE_ONCE(ena_napi->first_interrupt, true); 2052 2053 WRITE_ONCE(ena_napi->interrupts_masked, true); 2054 smp_wmb(); /* write interrupts_masked before calling napi */ 2055 2056 napi_schedule_irqoff(&ena_napi->napi); 2057 2058 return IRQ_HANDLED; 2059 } 2060 2061 /* Reserve a single MSI-X vector for management (admin + aenq). 2062 * plus reserve one vector for each potential io queue. 2063 * the number of potential io queues is the minimum of what the device 2064 * supports and the number of vCPUs. 2065 */ 2066 static int ena_enable_msix(struct ena_adapter *adapter) 2067 { 2068 int msix_vecs, irq_cnt; 2069 2070 if (test_bit(ENA_FLAG_MSIX_ENABLED, &adapter->flags)) { 2071 netif_err(adapter, probe, adapter->netdev, 2072 "Error, MSI-X is already enabled\n"); 2073 return -EPERM; 2074 } 2075 2076 /* Reserved the max msix vectors we might need */ 2077 msix_vecs = ENA_MAX_MSIX_VEC(adapter->max_num_io_queues); 2078 netif_dbg(adapter, probe, adapter->netdev, 2079 "Trying to enable MSI-X, vectors %d\n", msix_vecs); 2080 2081 irq_cnt = pci_alloc_irq_vectors(adapter->pdev, ENA_MIN_MSIX_VEC, 2082 msix_vecs, PCI_IRQ_MSIX); 2083 2084 if (irq_cnt < 0) { 2085 netif_err(adapter, probe, adapter->netdev, 2086 "Failed to enable MSI-X. irq_cnt %d\n", irq_cnt); 2087 return -ENOSPC; 2088 } 2089 2090 if (irq_cnt != msix_vecs) { 2091 netif_notice(adapter, probe, adapter->netdev, 2092 "Enable only %d MSI-X (out of %d), reduce the number of queues\n", 2093 irq_cnt, msix_vecs); 2094 adapter->num_io_queues = irq_cnt - ENA_ADMIN_MSIX_VEC; 2095 } 2096 2097 if (ena_init_rx_cpu_rmap(adapter)) 2098 netif_warn(adapter, probe, adapter->netdev, 2099 "Failed to map IRQs to CPUs\n"); 2100 2101 adapter->msix_vecs = irq_cnt; 2102 set_bit(ENA_FLAG_MSIX_ENABLED, &adapter->flags); 2103 2104 return 0; 2105 } 2106 2107 static void ena_setup_mgmnt_intr(struct ena_adapter *adapter) 2108 { 2109 u32 cpu; 2110 2111 snprintf(adapter->irq_tbl[ENA_MGMNT_IRQ_IDX].name, 2112 ENA_IRQNAME_SIZE, "ena-mgmnt@pci:%s", 2113 pci_name(adapter->pdev)); 2114 adapter->irq_tbl[ENA_MGMNT_IRQ_IDX].handler = 2115 ena_intr_msix_mgmnt; 2116 adapter->irq_tbl[ENA_MGMNT_IRQ_IDX].data = adapter; 2117 adapter->irq_tbl[ENA_MGMNT_IRQ_IDX].vector = 2118 pci_irq_vector(adapter->pdev, ENA_MGMNT_IRQ_IDX); 2119 cpu = cpumask_first(cpu_online_mask); 2120 adapter->irq_tbl[ENA_MGMNT_IRQ_IDX].cpu = cpu; 2121 cpumask_set_cpu(cpu, 2122 &adapter->irq_tbl[ENA_MGMNT_IRQ_IDX].affinity_hint_mask); 2123 } 2124 2125 static void ena_setup_io_intr(struct ena_adapter *adapter) 2126 { 2127 struct net_device *netdev; 2128 int irq_idx, i, cpu; 2129 int io_queue_count; 2130 2131 netdev = adapter->netdev; 2132 io_queue_count = adapter->num_io_queues + adapter->xdp_num_queues; 2133 2134 for (i = 0; i < io_queue_count; i++) { 2135 irq_idx = ENA_IO_IRQ_IDX(i); 2136 cpu = i % num_online_cpus(); 2137 2138 snprintf(adapter->irq_tbl[irq_idx].name, ENA_IRQNAME_SIZE, 2139 "%s-Tx-Rx-%d", netdev->name, i); 2140 adapter->irq_tbl[irq_idx].handler = ena_intr_msix_io; 2141 adapter->irq_tbl[irq_idx].data = &adapter->ena_napi[i]; 2142 adapter->irq_tbl[irq_idx].vector = 2143 pci_irq_vector(adapter->pdev, irq_idx); 2144 adapter->irq_tbl[irq_idx].cpu = cpu; 2145 2146 cpumask_set_cpu(cpu, 2147 &adapter->irq_tbl[irq_idx].affinity_hint_mask); 2148 } 2149 } 2150 2151 static int ena_request_mgmnt_irq(struct ena_adapter *adapter) 2152 { 2153 unsigned long flags = 0; 2154 struct ena_irq *irq; 2155 int rc; 2156 2157 irq = &adapter->irq_tbl[ENA_MGMNT_IRQ_IDX]; 2158 rc = request_irq(irq->vector, irq->handler, flags, irq->name, 2159 irq->data); 2160 if (rc) { 2161 netif_err(adapter, probe, adapter->netdev, 2162 "Failed to request admin irq\n"); 2163 return rc; 2164 } 2165 2166 netif_dbg(adapter, probe, adapter->netdev, 2167 "Set affinity hint of mgmnt irq.to 0x%lx (irq vector: %d)\n", 2168 irq->affinity_hint_mask.bits[0], irq->vector); 2169 2170 irq_set_affinity_hint(irq->vector, &irq->affinity_hint_mask); 2171 2172 return rc; 2173 } 2174 2175 static int ena_request_io_irq(struct ena_adapter *adapter) 2176 { 2177 u32 io_queue_count = adapter->num_io_queues + adapter->xdp_num_queues; 2178 unsigned long flags = 0; 2179 struct ena_irq *irq; 2180 int rc = 0, i, k; 2181 2182 if (!test_bit(ENA_FLAG_MSIX_ENABLED, &adapter->flags)) { 2183 netif_err(adapter, ifup, adapter->netdev, 2184 "Failed to request I/O IRQ: MSI-X is not enabled\n"); 2185 return -EINVAL; 2186 } 2187 2188 for (i = ENA_IO_IRQ_FIRST_IDX; i < ENA_MAX_MSIX_VEC(io_queue_count); i++) { 2189 irq = &adapter->irq_tbl[i]; 2190 rc = request_irq(irq->vector, irq->handler, flags, irq->name, 2191 irq->data); 2192 if (rc) { 2193 netif_err(adapter, ifup, adapter->netdev, 2194 "Failed to request I/O IRQ. index %d rc %d\n", 2195 i, rc); 2196 goto err; 2197 } 2198 2199 netif_dbg(adapter, ifup, adapter->netdev, 2200 "Set affinity hint of irq. index %d to 0x%lx (irq vector: %d)\n", 2201 i, irq->affinity_hint_mask.bits[0], irq->vector); 2202 2203 irq_set_affinity_hint(irq->vector, &irq->affinity_hint_mask); 2204 } 2205 2206 return rc; 2207 2208 err: 2209 for (k = ENA_IO_IRQ_FIRST_IDX; k < i; k++) { 2210 irq = &adapter->irq_tbl[k]; 2211 free_irq(irq->vector, irq->data); 2212 } 2213 2214 return rc; 2215 } 2216 2217 static void ena_free_mgmnt_irq(struct ena_adapter *adapter) 2218 { 2219 struct ena_irq *irq; 2220 2221 irq = &adapter->irq_tbl[ENA_MGMNT_IRQ_IDX]; 2222 synchronize_irq(irq->vector); 2223 irq_set_affinity_hint(irq->vector, NULL); 2224 free_irq(irq->vector, irq->data); 2225 } 2226 2227 static void ena_free_io_irq(struct ena_adapter *adapter) 2228 { 2229 u32 io_queue_count = adapter->num_io_queues + adapter->xdp_num_queues; 2230 struct ena_irq *irq; 2231 int i; 2232 2233 #ifdef CONFIG_RFS_ACCEL 2234 if (adapter->msix_vecs >= 1) { 2235 free_irq_cpu_rmap(adapter->netdev->rx_cpu_rmap); 2236 adapter->netdev->rx_cpu_rmap = NULL; 2237 } 2238 #endif /* CONFIG_RFS_ACCEL */ 2239 2240 for (i = ENA_IO_IRQ_FIRST_IDX; i < ENA_MAX_MSIX_VEC(io_queue_count); i++) { 2241 irq = &adapter->irq_tbl[i]; 2242 irq_set_affinity_hint(irq->vector, NULL); 2243 free_irq(irq->vector, irq->data); 2244 } 2245 } 2246 2247 static void ena_disable_msix(struct ena_adapter *adapter) 2248 { 2249 if (test_and_clear_bit(ENA_FLAG_MSIX_ENABLED, &adapter->flags)) 2250 pci_free_irq_vectors(adapter->pdev); 2251 } 2252 2253 static void ena_disable_io_intr_sync(struct ena_adapter *adapter) 2254 { 2255 u32 io_queue_count = adapter->num_io_queues + adapter->xdp_num_queues; 2256 int i; 2257 2258 if (!netif_running(adapter->netdev)) 2259 return; 2260 2261 for (i = ENA_IO_IRQ_FIRST_IDX; i < ENA_MAX_MSIX_VEC(io_queue_count); i++) 2262 synchronize_irq(adapter->irq_tbl[i].vector); 2263 } 2264 2265 static void ena_del_napi_in_range(struct ena_adapter *adapter, 2266 int first_index, 2267 int count) 2268 { 2269 int i; 2270 2271 for (i = first_index; i < first_index + count; i++) { 2272 netif_napi_del(&adapter->ena_napi[i].napi); 2273 2274 WARN_ON(!ENA_IS_XDP_INDEX(adapter, i) && 2275 adapter->ena_napi[i].xdp_ring); 2276 } 2277 } 2278 2279 static void ena_init_napi_in_range(struct ena_adapter *adapter, 2280 int first_index, int count) 2281 { 2282 int i; 2283 2284 for (i = first_index; i < first_index + count; i++) { 2285 struct ena_napi *napi = &adapter->ena_napi[i]; 2286 2287 netif_napi_add(adapter->netdev, &napi->napi, 2288 ENA_IS_XDP_INDEX(adapter, i) ? ena_xdp_io_poll : ena_io_poll); 2289 2290 if (!ENA_IS_XDP_INDEX(adapter, i)) { 2291 napi->rx_ring = &adapter->rx_ring[i]; 2292 napi->tx_ring = &adapter->tx_ring[i]; 2293 } else { 2294 napi->xdp_ring = &adapter->tx_ring[i]; 2295 } 2296 napi->qid = i; 2297 } 2298 } 2299 2300 static void ena_napi_disable_in_range(struct ena_adapter *adapter, 2301 int first_index, 2302 int count) 2303 { 2304 int i; 2305 2306 for (i = first_index; i < first_index + count; i++) 2307 napi_disable(&adapter->ena_napi[i].napi); 2308 } 2309 2310 static void ena_napi_enable_in_range(struct ena_adapter *adapter, 2311 int first_index, 2312 int count) 2313 { 2314 int i; 2315 2316 for (i = first_index; i < first_index + count; i++) 2317 napi_enable(&adapter->ena_napi[i].napi); 2318 } 2319 2320 /* Configure the Rx forwarding */ 2321 static int ena_rss_configure(struct ena_adapter *adapter) 2322 { 2323 struct ena_com_dev *ena_dev = adapter->ena_dev; 2324 int rc; 2325 2326 /* In case the RSS table wasn't initialized by probe */ 2327 if (!ena_dev->rss.tbl_log_size) { 2328 rc = ena_rss_init_default(adapter); 2329 if (rc && (rc != -EOPNOTSUPP)) { 2330 netif_err(adapter, ifup, adapter->netdev, 2331 "Failed to init RSS rc: %d\n", rc); 2332 return rc; 2333 } 2334 } 2335 2336 /* Set indirect table */ 2337 rc = ena_com_indirect_table_set(ena_dev); 2338 if (unlikely(rc && rc != -EOPNOTSUPP)) 2339 return rc; 2340 2341 /* Configure hash function (if supported) */ 2342 rc = ena_com_set_hash_function(ena_dev); 2343 if (unlikely(rc && (rc != -EOPNOTSUPP))) 2344 return rc; 2345 2346 /* Configure hash inputs (if supported) */ 2347 rc = ena_com_set_hash_ctrl(ena_dev); 2348 if (unlikely(rc && (rc != -EOPNOTSUPP))) 2349 return rc; 2350 2351 return 0; 2352 } 2353 2354 static int ena_up_complete(struct ena_adapter *adapter) 2355 { 2356 int rc; 2357 2358 rc = ena_rss_configure(adapter); 2359 if (rc) 2360 return rc; 2361 2362 ena_change_mtu(adapter->netdev, adapter->netdev->mtu); 2363 2364 ena_refill_all_rx_bufs(adapter); 2365 2366 /* enable transmits */ 2367 netif_tx_start_all_queues(adapter->netdev); 2368 2369 ena_napi_enable_in_range(adapter, 2370 0, 2371 adapter->xdp_num_queues + adapter->num_io_queues); 2372 2373 return 0; 2374 } 2375 2376 static int ena_create_io_tx_queue(struct ena_adapter *adapter, int qid) 2377 { 2378 struct ena_com_create_io_ctx ctx; 2379 struct ena_com_dev *ena_dev; 2380 struct ena_ring *tx_ring; 2381 u32 msix_vector; 2382 u16 ena_qid; 2383 int rc; 2384 2385 ena_dev = adapter->ena_dev; 2386 2387 tx_ring = &adapter->tx_ring[qid]; 2388 msix_vector = ENA_IO_IRQ_IDX(qid); 2389 ena_qid = ENA_IO_TXQ_IDX(qid); 2390 2391 memset(&ctx, 0x0, sizeof(ctx)); 2392 2393 ctx.direction = ENA_COM_IO_QUEUE_DIRECTION_TX; 2394 ctx.qid = ena_qid; 2395 ctx.mem_queue_type = ena_dev->tx_mem_queue_type; 2396 ctx.msix_vector = msix_vector; 2397 ctx.queue_size = tx_ring->ring_size; 2398 ctx.numa_node = tx_ring->numa_node; 2399 2400 rc = ena_com_create_io_queue(ena_dev, &ctx); 2401 if (rc) { 2402 netif_err(adapter, ifup, adapter->netdev, 2403 "Failed to create I/O TX queue num %d rc: %d\n", 2404 qid, rc); 2405 return rc; 2406 } 2407 2408 rc = ena_com_get_io_handlers(ena_dev, ena_qid, 2409 &tx_ring->ena_com_io_sq, 2410 &tx_ring->ena_com_io_cq); 2411 if (rc) { 2412 netif_err(adapter, ifup, adapter->netdev, 2413 "Failed to get TX queue handlers. TX queue num %d rc: %d\n", 2414 qid, rc); 2415 ena_com_destroy_io_queue(ena_dev, ena_qid); 2416 return rc; 2417 } 2418 2419 ena_com_update_numa_node(tx_ring->ena_com_io_cq, ctx.numa_node); 2420 return rc; 2421 } 2422 2423 static int ena_create_io_tx_queues_in_range(struct ena_adapter *adapter, 2424 int first_index, int count) 2425 { 2426 struct ena_com_dev *ena_dev = adapter->ena_dev; 2427 int rc, i; 2428 2429 for (i = first_index; i < first_index + count; i++) { 2430 rc = ena_create_io_tx_queue(adapter, i); 2431 if (rc) 2432 goto create_err; 2433 } 2434 2435 return 0; 2436 2437 create_err: 2438 while (i-- > first_index) 2439 ena_com_destroy_io_queue(ena_dev, ENA_IO_TXQ_IDX(i)); 2440 2441 return rc; 2442 } 2443 2444 static int ena_create_io_rx_queue(struct ena_adapter *adapter, int qid) 2445 { 2446 struct ena_com_dev *ena_dev; 2447 struct ena_com_create_io_ctx ctx; 2448 struct ena_ring *rx_ring; 2449 u32 msix_vector; 2450 u16 ena_qid; 2451 int rc; 2452 2453 ena_dev = adapter->ena_dev; 2454 2455 rx_ring = &adapter->rx_ring[qid]; 2456 msix_vector = ENA_IO_IRQ_IDX(qid); 2457 ena_qid = ENA_IO_RXQ_IDX(qid); 2458 2459 memset(&ctx, 0x0, sizeof(ctx)); 2460 2461 ctx.qid = ena_qid; 2462 ctx.direction = ENA_COM_IO_QUEUE_DIRECTION_RX; 2463 ctx.mem_queue_type = ENA_ADMIN_PLACEMENT_POLICY_HOST; 2464 ctx.msix_vector = msix_vector; 2465 ctx.queue_size = rx_ring->ring_size; 2466 ctx.numa_node = rx_ring->numa_node; 2467 2468 rc = ena_com_create_io_queue(ena_dev, &ctx); 2469 if (rc) { 2470 netif_err(adapter, ifup, adapter->netdev, 2471 "Failed to create I/O RX queue num %d rc: %d\n", 2472 qid, rc); 2473 return rc; 2474 } 2475 2476 rc = ena_com_get_io_handlers(ena_dev, ena_qid, 2477 &rx_ring->ena_com_io_sq, 2478 &rx_ring->ena_com_io_cq); 2479 if (rc) { 2480 netif_err(adapter, ifup, adapter->netdev, 2481 "Failed to get RX queue handlers. RX queue num %d rc: %d\n", 2482 qid, rc); 2483 goto err; 2484 } 2485 2486 ena_com_update_numa_node(rx_ring->ena_com_io_cq, ctx.numa_node); 2487 2488 return rc; 2489 err: 2490 ena_com_destroy_io_queue(ena_dev, ena_qid); 2491 return rc; 2492 } 2493 2494 static int ena_create_all_io_rx_queues(struct ena_adapter *adapter) 2495 { 2496 struct ena_com_dev *ena_dev = adapter->ena_dev; 2497 int rc, i; 2498 2499 for (i = 0; i < adapter->num_io_queues; i++) { 2500 rc = ena_create_io_rx_queue(adapter, i); 2501 if (rc) 2502 goto create_err; 2503 INIT_WORK(&adapter->ena_napi[i].dim.work, ena_dim_work); 2504 } 2505 2506 return 0; 2507 2508 create_err: 2509 while (i--) { 2510 cancel_work_sync(&adapter->ena_napi[i].dim.work); 2511 ena_com_destroy_io_queue(ena_dev, ENA_IO_RXQ_IDX(i)); 2512 } 2513 2514 return rc; 2515 } 2516 2517 static void set_io_rings_size(struct ena_adapter *adapter, 2518 int new_tx_size, 2519 int new_rx_size) 2520 { 2521 int i; 2522 2523 for (i = 0; i < adapter->num_io_queues; i++) { 2524 adapter->tx_ring[i].ring_size = new_tx_size; 2525 adapter->rx_ring[i].ring_size = new_rx_size; 2526 } 2527 } 2528 2529 /* This function allows queue allocation to backoff when the system is 2530 * low on memory. If there is not enough memory to allocate io queues 2531 * the driver will try to allocate smaller queues. 2532 * 2533 * The backoff algorithm is as follows: 2534 * 1. Try to allocate TX and RX and if successful. 2535 * 1.1. return success 2536 * 2537 * 2. Divide by 2 the size of the larger of RX and TX queues (or both if their size is the same). 2538 * 2539 * 3. If TX or RX is smaller than 256 2540 * 3.1. return failure. 2541 * 4. else 2542 * 4.1. go back to 1. 2543 */ 2544 static int create_queues_with_size_backoff(struct ena_adapter *adapter) 2545 { 2546 int rc, cur_rx_ring_size, cur_tx_ring_size; 2547 int new_rx_ring_size, new_tx_ring_size; 2548 2549 /* current queue sizes might be set to smaller than the requested 2550 * ones due to past queue allocation failures. 2551 */ 2552 set_io_rings_size(adapter, adapter->requested_tx_ring_size, 2553 adapter->requested_rx_ring_size); 2554 2555 while (1) { 2556 if (ena_xdp_present(adapter)) { 2557 rc = ena_setup_and_create_all_xdp_queues(adapter); 2558 2559 if (rc) 2560 goto err_setup_tx; 2561 } 2562 rc = ena_setup_tx_resources_in_range(adapter, 2563 0, 2564 adapter->num_io_queues); 2565 if (rc) 2566 goto err_setup_tx; 2567 2568 rc = ena_create_io_tx_queues_in_range(adapter, 2569 0, 2570 adapter->num_io_queues); 2571 if (rc) 2572 goto err_create_tx_queues; 2573 2574 rc = ena_setup_all_rx_resources(adapter); 2575 if (rc) 2576 goto err_setup_rx; 2577 2578 rc = ena_create_all_io_rx_queues(adapter); 2579 if (rc) 2580 goto err_create_rx_queues; 2581 2582 return 0; 2583 2584 err_create_rx_queues: 2585 ena_free_all_io_rx_resources(adapter); 2586 err_setup_rx: 2587 ena_destroy_all_tx_queues(adapter); 2588 err_create_tx_queues: 2589 ena_free_all_io_tx_resources(adapter); 2590 err_setup_tx: 2591 if (rc != -ENOMEM) { 2592 netif_err(adapter, ifup, adapter->netdev, 2593 "Queue creation failed with error code %d\n", 2594 rc); 2595 return rc; 2596 } 2597 2598 cur_tx_ring_size = adapter->tx_ring[0].ring_size; 2599 cur_rx_ring_size = adapter->rx_ring[0].ring_size; 2600 2601 netif_err(adapter, ifup, adapter->netdev, 2602 "Not enough memory to create queues with sizes TX=%d, RX=%d\n", 2603 cur_tx_ring_size, cur_rx_ring_size); 2604 2605 new_tx_ring_size = cur_tx_ring_size; 2606 new_rx_ring_size = cur_rx_ring_size; 2607 2608 /* Decrease the size of the larger queue, or 2609 * decrease both if they are the same size. 2610 */ 2611 if (cur_rx_ring_size <= cur_tx_ring_size) 2612 new_tx_ring_size = cur_tx_ring_size / 2; 2613 if (cur_rx_ring_size >= cur_tx_ring_size) 2614 new_rx_ring_size = cur_rx_ring_size / 2; 2615 2616 if (new_tx_ring_size < ENA_MIN_RING_SIZE || 2617 new_rx_ring_size < ENA_MIN_RING_SIZE) { 2618 netif_err(adapter, ifup, adapter->netdev, 2619 "Queue creation failed with the smallest possible queue size of %d for both queues. Not retrying with smaller queues\n", 2620 ENA_MIN_RING_SIZE); 2621 return rc; 2622 } 2623 2624 netif_err(adapter, ifup, adapter->netdev, 2625 "Retrying queue creation with sizes TX=%d, RX=%d\n", 2626 new_tx_ring_size, 2627 new_rx_ring_size); 2628 2629 set_io_rings_size(adapter, new_tx_ring_size, 2630 new_rx_ring_size); 2631 } 2632 } 2633 2634 static int ena_up(struct ena_adapter *adapter) 2635 { 2636 int io_queue_count, rc, i; 2637 2638 netif_dbg(adapter, ifup, adapter->netdev, "%s\n", __func__); 2639 2640 io_queue_count = adapter->num_io_queues + adapter->xdp_num_queues; 2641 ena_setup_io_intr(adapter); 2642 2643 /* napi poll functions should be initialized before running 2644 * request_irq(), to handle a rare condition where there is a pending 2645 * interrupt, causing the ISR to fire immediately while the poll 2646 * function wasn't set yet, causing a null dereference 2647 */ 2648 ena_init_napi_in_range(adapter, 0, io_queue_count); 2649 2650 rc = ena_request_io_irq(adapter); 2651 if (rc) 2652 goto err_req_irq; 2653 2654 rc = create_queues_with_size_backoff(adapter); 2655 if (rc) 2656 goto err_create_queues_with_backoff; 2657 2658 rc = ena_up_complete(adapter); 2659 if (rc) 2660 goto err_up; 2661 2662 if (test_bit(ENA_FLAG_LINK_UP, &adapter->flags)) 2663 netif_carrier_on(adapter->netdev); 2664 2665 ena_increase_stat(&adapter->dev_stats.interface_up, 1, 2666 &adapter->syncp); 2667 2668 set_bit(ENA_FLAG_DEV_UP, &adapter->flags); 2669 2670 /* Enable completion queues interrupt */ 2671 for (i = 0; i < adapter->num_io_queues; i++) 2672 ena_unmask_interrupt(&adapter->tx_ring[i], 2673 &adapter->rx_ring[i]); 2674 2675 /* schedule napi in case we had pending packets 2676 * from the last time we disable napi 2677 */ 2678 for (i = 0; i < io_queue_count; i++) 2679 napi_schedule(&adapter->ena_napi[i].napi); 2680 2681 return rc; 2682 2683 err_up: 2684 ena_destroy_all_tx_queues(adapter); 2685 ena_free_all_io_tx_resources(adapter); 2686 ena_destroy_all_rx_queues(adapter); 2687 ena_free_all_io_rx_resources(adapter); 2688 err_create_queues_with_backoff: 2689 ena_free_io_irq(adapter); 2690 err_req_irq: 2691 ena_del_napi_in_range(adapter, 0, io_queue_count); 2692 2693 return rc; 2694 } 2695 2696 static void ena_down(struct ena_adapter *adapter) 2697 { 2698 int io_queue_count = adapter->num_io_queues + adapter->xdp_num_queues; 2699 2700 netif_info(adapter, ifdown, adapter->netdev, "%s\n", __func__); 2701 2702 clear_bit(ENA_FLAG_DEV_UP, &adapter->flags); 2703 2704 ena_increase_stat(&adapter->dev_stats.interface_down, 1, 2705 &adapter->syncp); 2706 2707 netif_carrier_off(adapter->netdev); 2708 netif_tx_disable(adapter->netdev); 2709 2710 /* After this point the napi handler won't enable the tx queue */ 2711 ena_napi_disable_in_range(adapter, 0, io_queue_count); 2712 2713 /* After destroy the queue there won't be any new interrupts */ 2714 2715 if (test_bit(ENA_FLAG_TRIGGER_RESET, &adapter->flags)) { 2716 int rc; 2717 2718 rc = ena_com_dev_reset(adapter->ena_dev, adapter->reset_reason); 2719 if (rc) 2720 netif_err(adapter, ifdown, adapter->netdev, 2721 "Device reset failed\n"); 2722 /* stop submitting admin commands on a device that was reset */ 2723 ena_com_set_admin_running_state(adapter->ena_dev, false); 2724 } 2725 2726 ena_destroy_all_io_queues(adapter); 2727 2728 ena_disable_io_intr_sync(adapter); 2729 ena_free_io_irq(adapter); 2730 ena_del_napi_in_range(adapter, 0, io_queue_count); 2731 2732 ena_free_all_tx_bufs(adapter); 2733 ena_free_all_rx_bufs(adapter); 2734 ena_free_all_io_tx_resources(adapter); 2735 ena_free_all_io_rx_resources(adapter); 2736 } 2737 2738 /* ena_open - Called when a network interface is made active 2739 * @netdev: network interface device structure 2740 * 2741 * Returns 0 on success, negative value on failure 2742 * 2743 * The open entry point is called when a network interface is made 2744 * active by the system (IFF_UP). At this point all resources needed 2745 * for transmit and receive operations are allocated, the interrupt 2746 * handler is registered with the OS, the watchdog timer is started, 2747 * and the stack is notified that the interface is ready. 2748 */ 2749 static int ena_open(struct net_device *netdev) 2750 { 2751 struct ena_adapter *adapter = netdev_priv(netdev); 2752 int rc; 2753 2754 /* Notify the stack of the actual queue counts. */ 2755 rc = netif_set_real_num_tx_queues(netdev, adapter->num_io_queues); 2756 if (rc) { 2757 netif_err(adapter, ifup, netdev, "Can't set num tx queues\n"); 2758 return rc; 2759 } 2760 2761 rc = netif_set_real_num_rx_queues(netdev, adapter->num_io_queues); 2762 if (rc) { 2763 netif_err(adapter, ifup, netdev, "Can't set num rx queues\n"); 2764 return rc; 2765 } 2766 2767 rc = ena_up(adapter); 2768 if (rc) 2769 return rc; 2770 2771 return rc; 2772 } 2773 2774 /* ena_close - Disables a network interface 2775 * @netdev: network interface device structure 2776 * 2777 * Returns 0, this is not allowed to fail 2778 * 2779 * The close entry point is called when an interface is de-activated 2780 * by the OS. The hardware is still under the drivers control, but 2781 * needs to be disabled. A global MAC reset is issued to stop the 2782 * hardware, and all transmit and receive resources are freed. 2783 */ 2784 static int ena_close(struct net_device *netdev) 2785 { 2786 struct ena_adapter *adapter = netdev_priv(netdev); 2787 2788 netif_dbg(adapter, ifdown, netdev, "%s\n", __func__); 2789 2790 if (!test_bit(ENA_FLAG_DEVICE_RUNNING, &adapter->flags)) 2791 return 0; 2792 2793 if (test_bit(ENA_FLAG_DEV_UP, &adapter->flags)) 2794 ena_down(adapter); 2795 2796 /* Check for device status and issue reset if needed*/ 2797 check_for_admin_com_state(adapter); 2798 if (unlikely(test_bit(ENA_FLAG_TRIGGER_RESET, &adapter->flags))) { 2799 netif_err(adapter, ifdown, adapter->netdev, 2800 "Destroy failure, restarting device\n"); 2801 ena_dump_stats_to_dmesg(adapter); 2802 /* rtnl lock already obtained in dev_ioctl() layer */ 2803 ena_destroy_device(adapter, false); 2804 ena_restore_device(adapter); 2805 } 2806 2807 return 0; 2808 } 2809 2810 int ena_update_queue_params(struct ena_adapter *adapter, 2811 u32 new_tx_size, 2812 u32 new_rx_size, 2813 u32 new_llq_header_len) 2814 { 2815 bool dev_was_up, large_llq_changed = false; 2816 int rc = 0; 2817 2818 dev_was_up = test_bit(ENA_FLAG_DEV_UP, &adapter->flags); 2819 ena_close(adapter->netdev); 2820 adapter->requested_tx_ring_size = new_tx_size; 2821 adapter->requested_rx_ring_size = new_rx_size; 2822 ena_init_io_rings(adapter, 2823 0, 2824 adapter->xdp_num_queues + 2825 adapter->num_io_queues); 2826 2827 large_llq_changed = adapter->ena_dev->tx_mem_queue_type == 2828 ENA_ADMIN_PLACEMENT_POLICY_DEV; 2829 large_llq_changed &= 2830 new_llq_header_len != adapter->ena_dev->tx_max_header_size; 2831 2832 /* a check that the configuration is valid is done by caller */ 2833 if (large_llq_changed) { 2834 adapter->large_llq_header_enabled = !adapter->large_llq_header_enabled; 2835 2836 ena_destroy_device(adapter, false); 2837 rc = ena_restore_device(adapter); 2838 } 2839 2840 return dev_was_up && !rc ? ena_up(adapter) : rc; 2841 } 2842 2843 int ena_set_rx_copybreak(struct ena_adapter *adapter, u32 rx_copybreak) 2844 { 2845 struct ena_ring *rx_ring; 2846 int i; 2847 2848 if (rx_copybreak > min_t(u16, adapter->netdev->mtu, ENA_PAGE_SIZE)) 2849 return -EINVAL; 2850 2851 adapter->rx_copybreak = rx_copybreak; 2852 2853 for (i = 0; i < adapter->num_io_queues; i++) { 2854 rx_ring = &adapter->rx_ring[i]; 2855 rx_ring->rx_copybreak = rx_copybreak; 2856 } 2857 2858 return 0; 2859 } 2860 2861 int ena_update_queue_count(struct ena_adapter *adapter, u32 new_channel_count) 2862 { 2863 struct ena_com_dev *ena_dev = adapter->ena_dev; 2864 int prev_channel_count; 2865 bool dev_was_up; 2866 2867 dev_was_up = test_bit(ENA_FLAG_DEV_UP, &adapter->flags); 2868 ena_close(adapter->netdev); 2869 prev_channel_count = adapter->num_io_queues; 2870 adapter->num_io_queues = new_channel_count; 2871 if (ena_xdp_present(adapter) && 2872 ena_xdp_allowed(adapter) == ENA_XDP_ALLOWED) { 2873 adapter->xdp_first_ring = new_channel_count; 2874 adapter->xdp_num_queues = new_channel_count; 2875 if (prev_channel_count > new_channel_count) 2876 ena_xdp_exchange_program_rx_in_range(adapter, 2877 NULL, 2878 new_channel_count, 2879 prev_channel_count); 2880 else 2881 ena_xdp_exchange_program_rx_in_range(adapter, 2882 adapter->xdp_bpf_prog, 2883 prev_channel_count, 2884 new_channel_count); 2885 } 2886 2887 /* We need to destroy the rss table so that the indirection 2888 * table will be reinitialized by ena_up() 2889 */ 2890 ena_com_rss_destroy(ena_dev); 2891 ena_init_io_rings(adapter, 2892 0, 2893 adapter->xdp_num_queues + 2894 adapter->num_io_queues); 2895 return dev_was_up ? ena_open(adapter->netdev) : 0; 2896 } 2897 2898 static void ena_tx_csum(struct ena_com_tx_ctx *ena_tx_ctx, 2899 struct sk_buff *skb, 2900 bool disable_meta_caching) 2901 { 2902 u32 mss = skb_shinfo(skb)->gso_size; 2903 struct ena_com_tx_meta *ena_meta = &ena_tx_ctx->ena_meta; 2904 u8 l4_protocol = 0; 2905 2906 if ((skb->ip_summed == CHECKSUM_PARTIAL) || mss) { 2907 ena_tx_ctx->l4_csum_enable = 1; 2908 if (mss) { 2909 ena_tx_ctx->tso_enable = 1; 2910 ena_meta->l4_hdr_len = tcp_hdr(skb)->doff; 2911 ena_tx_ctx->l4_csum_partial = 0; 2912 } else { 2913 ena_tx_ctx->tso_enable = 0; 2914 ena_meta->l4_hdr_len = 0; 2915 ena_tx_ctx->l4_csum_partial = 1; 2916 } 2917 2918 switch (ip_hdr(skb)->version) { 2919 case IPVERSION: 2920 ena_tx_ctx->l3_proto = ENA_ETH_IO_L3_PROTO_IPV4; 2921 if (ip_hdr(skb)->frag_off & htons(IP_DF)) 2922 ena_tx_ctx->df = 1; 2923 if (mss) 2924 ena_tx_ctx->l3_csum_enable = 1; 2925 l4_protocol = ip_hdr(skb)->protocol; 2926 break; 2927 case 6: 2928 ena_tx_ctx->l3_proto = ENA_ETH_IO_L3_PROTO_IPV6; 2929 l4_protocol = ipv6_hdr(skb)->nexthdr; 2930 break; 2931 default: 2932 break; 2933 } 2934 2935 if (l4_protocol == IPPROTO_TCP) 2936 ena_tx_ctx->l4_proto = ENA_ETH_IO_L4_PROTO_TCP; 2937 else 2938 ena_tx_ctx->l4_proto = ENA_ETH_IO_L4_PROTO_UDP; 2939 2940 ena_meta->mss = mss; 2941 ena_meta->l3_hdr_len = skb_network_header_len(skb); 2942 ena_meta->l3_hdr_offset = skb_network_offset(skb); 2943 ena_tx_ctx->meta_valid = 1; 2944 } else if (disable_meta_caching) { 2945 memset(ena_meta, 0, sizeof(*ena_meta)); 2946 ena_tx_ctx->meta_valid = 1; 2947 } else { 2948 ena_tx_ctx->meta_valid = 0; 2949 } 2950 } 2951 2952 static int ena_check_and_linearize_skb(struct ena_ring *tx_ring, 2953 struct sk_buff *skb) 2954 { 2955 int num_frags, header_len, rc; 2956 2957 num_frags = skb_shinfo(skb)->nr_frags; 2958 header_len = skb_headlen(skb); 2959 2960 if (num_frags < tx_ring->sgl_size) 2961 return 0; 2962 2963 if ((num_frags == tx_ring->sgl_size) && 2964 (header_len < tx_ring->tx_max_header_size)) 2965 return 0; 2966 2967 ena_increase_stat(&tx_ring->tx_stats.linearize, 1, &tx_ring->syncp); 2968 2969 rc = skb_linearize(skb); 2970 if (unlikely(rc)) { 2971 ena_increase_stat(&tx_ring->tx_stats.linearize_failed, 1, 2972 &tx_ring->syncp); 2973 } 2974 2975 return rc; 2976 } 2977 2978 static int ena_tx_map_skb(struct ena_ring *tx_ring, 2979 struct ena_tx_buffer *tx_info, 2980 struct sk_buff *skb, 2981 void **push_hdr, 2982 u16 *header_len) 2983 { 2984 struct ena_adapter *adapter = tx_ring->adapter; 2985 struct ena_com_buf *ena_buf; 2986 dma_addr_t dma; 2987 u32 skb_head_len, frag_len, last_frag; 2988 u16 push_len = 0; 2989 u16 delta = 0; 2990 int i = 0; 2991 2992 skb_head_len = skb_headlen(skb); 2993 tx_info->skb = skb; 2994 ena_buf = tx_info->bufs; 2995 2996 if (tx_ring->tx_mem_queue_type == ENA_ADMIN_PLACEMENT_POLICY_DEV) { 2997 /* When the device is LLQ mode, the driver will copy 2998 * the header into the device memory space. 2999 * the ena_com layer assume the header is in a linear 3000 * memory space. 3001 * This assumption might be wrong since part of the header 3002 * can be in the fragmented buffers. 3003 * Use skb_header_pointer to make sure the header is in a 3004 * linear memory space. 3005 */ 3006 3007 push_len = min_t(u32, skb->len, tx_ring->tx_max_header_size); 3008 *push_hdr = skb_header_pointer(skb, 0, push_len, 3009 tx_ring->push_buf_intermediate_buf); 3010 *header_len = push_len; 3011 if (unlikely(skb->data != *push_hdr)) { 3012 ena_increase_stat(&tx_ring->tx_stats.llq_buffer_copy, 1, 3013 &tx_ring->syncp); 3014 3015 delta = push_len - skb_head_len; 3016 } 3017 } else { 3018 *push_hdr = NULL; 3019 *header_len = min_t(u32, skb_head_len, 3020 tx_ring->tx_max_header_size); 3021 } 3022 3023 netif_dbg(adapter, tx_queued, adapter->netdev, 3024 "skb: %p header_buf->vaddr: %p push_len: %d\n", skb, 3025 *push_hdr, push_len); 3026 3027 if (skb_head_len > push_len) { 3028 dma = dma_map_single(tx_ring->dev, skb->data + push_len, 3029 skb_head_len - push_len, DMA_TO_DEVICE); 3030 if (unlikely(dma_mapping_error(tx_ring->dev, dma))) 3031 goto error_report_dma_error; 3032 3033 ena_buf->paddr = dma; 3034 ena_buf->len = skb_head_len - push_len; 3035 3036 ena_buf++; 3037 tx_info->num_of_bufs++; 3038 tx_info->map_linear_data = 1; 3039 } else { 3040 tx_info->map_linear_data = 0; 3041 } 3042 3043 last_frag = skb_shinfo(skb)->nr_frags; 3044 3045 for (i = 0; i < last_frag; i++) { 3046 const skb_frag_t *frag = &skb_shinfo(skb)->frags[i]; 3047 3048 frag_len = skb_frag_size(frag); 3049 3050 if (unlikely(delta >= frag_len)) { 3051 delta -= frag_len; 3052 continue; 3053 } 3054 3055 dma = skb_frag_dma_map(tx_ring->dev, frag, delta, 3056 frag_len - delta, DMA_TO_DEVICE); 3057 if (unlikely(dma_mapping_error(tx_ring->dev, dma))) 3058 goto error_report_dma_error; 3059 3060 ena_buf->paddr = dma; 3061 ena_buf->len = frag_len - delta; 3062 ena_buf++; 3063 tx_info->num_of_bufs++; 3064 delta = 0; 3065 } 3066 3067 return 0; 3068 3069 error_report_dma_error: 3070 ena_increase_stat(&tx_ring->tx_stats.dma_mapping_err, 1, 3071 &tx_ring->syncp); 3072 netif_warn(adapter, tx_queued, adapter->netdev, "Failed to map skb\n"); 3073 3074 tx_info->skb = NULL; 3075 3076 tx_info->num_of_bufs += i; 3077 ena_unmap_tx_buff(tx_ring, tx_info); 3078 3079 return -EINVAL; 3080 } 3081 3082 /* Called with netif_tx_lock. */ 3083 static netdev_tx_t ena_start_xmit(struct sk_buff *skb, struct net_device *dev) 3084 { 3085 struct ena_adapter *adapter = netdev_priv(dev); 3086 struct ena_tx_buffer *tx_info; 3087 struct ena_com_tx_ctx ena_tx_ctx; 3088 struct ena_ring *tx_ring; 3089 struct netdev_queue *txq; 3090 void *push_hdr; 3091 u16 next_to_use, req_id, header_len; 3092 int qid, rc; 3093 3094 netif_dbg(adapter, tx_queued, dev, "%s skb %p\n", __func__, skb); 3095 /* Determine which tx ring we will be placed on */ 3096 qid = skb_get_queue_mapping(skb); 3097 tx_ring = &adapter->tx_ring[qid]; 3098 txq = netdev_get_tx_queue(dev, qid); 3099 3100 rc = ena_check_and_linearize_skb(tx_ring, skb); 3101 if (unlikely(rc)) 3102 goto error_drop_packet; 3103 3104 skb_tx_timestamp(skb); 3105 3106 next_to_use = tx_ring->next_to_use; 3107 req_id = tx_ring->free_ids[next_to_use]; 3108 tx_info = &tx_ring->tx_buffer_info[req_id]; 3109 tx_info->num_of_bufs = 0; 3110 3111 WARN(tx_info->skb, "SKB isn't NULL req_id %d\n", req_id); 3112 3113 rc = ena_tx_map_skb(tx_ring, tx_info, skb, &push_hdr, &header_len); 3114 if (unlikely(rc)) 3115 goto error_drop_packet; 3116 3117 memset(&ena_tx_ctx, 0x0, sizeof(struct ena_com_tx_ctx)); 3118 ena_tx_ctx.ena_bufs = tx_info->bufs; 3119 ena_tx_ctx.push_header = push_hdr; 3120 ena_tx_ctx.num_bufs = tx_info->num_of_bufs; 3121 ena_tx_ctx.req_id = req_id; 3122 ena_tx_ctx.header_len = header_len; 3123 3124 /* set flags and meta data */ 3125 ena_tx_csum(&ena_tx_ctx, skb, tx_ring->disable_meta_caching); 3126 3127 rc = ena_xmit_common(dev, 3128 tx_ring, 3129 tx_info, 3130 &ena_tx_ctx, 3131 next_to_use, 3132 skb->len); 3133 if (rc) 3134 goto error_unmap_dma; 3135 3136 netdev_tx_sent_queue(txq, skb->len); 3137 3138 /* stop the queue when no more space available, the packet can have up 3139 * to sgl_size + 2. one for the meta descriptor and one for header 3140 * (if the header is larger than tx_max_header_size). 3141 */ 3142 if (unlikely(!ena_com_sq_have_enough_space(tx_ring->ena_com_io_sq, 3143 tx_ring->sgl_size + 2))) { 3144 netif_dbg(adapter, tx_queued, dev, "%s stop queue %d\n", 3145 __func__, qid); 3146 3147 netif_tx_stop_queue(txq); 3148 ena_increase_stat(&tx_ring->tx_stats.queue_stop, 1, 3149 &tx_ring->syncp); 3150 3151 /* There is a rare condition where this function decide to 3152 * stop the queue but meanwhile clean_tx_irq updates 3153 * next_to_completion and terminates. 3154 * The queue will remain stopped forever. 3155 * To solve this issue add a mb() to make sure that 3156 * netif_tx_stop_queue() write is vissible before checking if 3157 * there is additional space in the queue. 3158 */ 3159 smp_mb(); 3160 3161 if (ena_com_sq_have_enough_space(tx_ring->ena_com_io_sq, 3162 ENA_TX_WAKEUP_THRESH)) { 3163 netif_tx_wake_queue(txq); 3164 ena_increase_stat(&tx_ring->tx_stats.queue_wakeup, 1, 3165 &tx_ring->syncp); 3166 } 3167 } 3168 3169 if (netif_xmit_stopped(txq) || !netdev_xmit_more()) 3170 /* trigger the dma engine. ena_ring_tx_doorbell() 3171 * calls a memory barrier inside it. 3172 */ 3173 ena_ring_tx_doorbell(tx_ring); 3174 3175 return NETDEV_TX_OK; 3176 3177 error_unmap_dma: 3178 ena_unmap_tx_buff(tx_ring, tx_info); 3179 tx_info->skb = NULL; 3180 3181 error_drop_packet: 3182 dev_kfree_skb(skb); 3183 return NETDEV_TX_OK; 3184 } 3185 3186 static u16 ena_select_queue(struct net_device *dev, struct sk_buff *skb, 3187 struct net_device *sb_dev) 3188 { 3189 u16 qid; 3190 /* we suspect that this is good for in--kernel network services that 3191 * want to loop incoming skb rx to tx in normal user generated traffic, 3192 * most probably we will not get to this 3193 */ 3194 if (skb_rx_queue_recorded(skb)) 3195 qid = skb_get_rx_queue(skb); 3196 else 3197 qid = netdev_pick_tx(dev, skb, NULL); 3198 3199 return qid; 3200 } 3201 3202 static void ena_config_host_info(struct ena_com_dev *ena_dev, struct pci_dev *pdev) 3203 { 3204 struct device *dev = &pdev->dev; 3205 struct ena_admin_host_info *host_info; 3206 int rc; 3207 3208 /* Allocate only the host info */ 3209 rc = ena_com_allocate_host_info(ena_dev); 3210 if (rc) { 3211 dev_err(dev, "Cannot allocate host info\n"); 3212 return; 3213 } 3214 3215 host_info = ena_dev->host_attr.host_info; 3216 3217 host_info->bdf = (pdev->bus->number << 8) | pdev->devfn; 3218 host_info->os_type = ENA_ADMIN_OS_LINUX; 3219 host_info->kernel_ver = LINUX_VERSION_CODE; 3220 strscpy(host_info->kernel_ver_str, utsname()->version, 3221 sizeof(host_info->kernel_ver_str) - 1); 3222 host_info->os_dist = 0; 3223 strncpy(host_info->os_dist_str, utsname()->release, 3224 sizeof(host_info->os_dist_str) - 1); 3225 host_info->driver_version = 3226 (DRV_MODULE_GEN_MAJOR) | 3227 (DRV_MODULE_GEN_MINOR << ENA_ADMIN_HOST_INFO_MINOR_SHIFT) | 3228 (DRV_MODULE_GEN_SUBMINOR << ENA_ADMIN_HOST_INFO_SUB_MINOR_SHIFT) | 3229 ("K"[0] << ENA_ADMIN_HOST_INFO_MODULE_TYPE_SHIFT); 3230 host_info->num_cpus = num_online_cpus(); 3231 3232 host_info->driver_supported_features = 3233 ENA_ADMIN_HOST_INFO_RX_OFFSET_MASK | 3234 ENA_ADMIN_HOST_INFO_INTERRUPT_MODERATION_MASK | 3235 ENA_ADMIN_HOST_INFO_RX_BUF_MIRRORING_MASK | 3236 ENA_ADMIN_HOST_INFO_RSS_CONFIGURABLE_FUNCTION_KEY_MASK; 3237 3238 rc = ena_com_set_host_attributes(ena_dev); 3239 if (rc) { 3240 if (rc == -EOPNOTSUPP) 3241 dev_warn(dev, "Cannot set host attributes\n"); 3242 else 3243 dev_err(dev, "Cannot set host attributes\n"); 3244 3245 goto err; 3246 } 3247 3248 return; 3249 3250 err: 3251 ena_com_delete_host_info(ena_dev); 3252 } 3253 3254 static void ena_config_debug_area(struct ena_adapter *adapter) 3255 { 3256 u32 debug_area_size; 3257 int rc, ss_count; 3258 3259 ss_count = ena_get_sset_count(adapter->netdev, ETH_SS_STATS); 3260 if (ss_count <= 0) { 3261 netif_err(adapter, drv, adapter->netdev, 3262 "SS count is negative\n"); 3263 return; 3264 } 3265 3266 /* allocate 32 bytes for each string and 64bit for the value */ 3267 debug_area_size = ss_count * ETH_GSTRING_LEN + sizeof(u64) * ss_count; 3268 3269 rc = ena_com_allocate_debug_area(adapter->ena_dev, debug_area_size); 3270 if (rc) { 3271 netif_err(adapter, drv, adapter->netdev, 3272 "Cannot allocate debug area\n"); 3273 return; 3274 } 3275 3276 rc = ena_com_set_host_attributes(adapter->ena_dev); 3277 if (rc) { 3278 if (rc == -EOPNOTSUPP) 3279 netif_warn(adapter, drv, adapter->netdev, 3280 "Cannot set host attributes\n"); 3281 else 3282 netif_err(adapter, drv, adapter->netdev, 3283 "Cannot set host attributes\n"); 3284 goto err; 3285 } 3286 3287 return; 3288 err: 3289 ena_com_delete_debug_area(adapter->ena_dev); 3290 } 3291 3292 int ena_update_hw_stats(struct ena_adapter *adapter) 3293 { 3294 int rc; 3295 3296 rc = ena_com_get_eni_stats(adapter->ena_dev, &adapter->eni_stats); 3297 if (rc) { 3298 netdev_err(adapter->netdev, "Failed to get ENI stats\n"); 3299 return rc; 3300 } 3301 3302 return 0; 3303 } 3304 3305 static void ena_get_stats64(struct net_device *netdev, 3306 struct rtnl_link_stats64 *stats) 3307 { 3308 struct ena_adapter *adapter = netdev_priv(netdev); 3309 struct ena_ring *rx_ring, *tx_ring; 3310 unsigned int start; 3311 u64 rx_drops; 3312 u64 tx_drops; 3313 int i; 3314 3315 if (!test_bit(ENA_FLAG_DEV_UP, &adapter->flags)) 3316 return; 3317 3318 for (i = 0; i < adapter->num_io_queues; i++) { 3319 u64 bytes, packets; 3320 3321 tx_ring = &adapter->tx_ring[i]; 3322 3323 do { 3324 start = u64_stats_fetch_begin(&tx_ring->syncp); 3325 packets = tx_ring->tx_stats.cnt; 3326 bytes = tx_ring->tx_stats.bytes; 3327 } while (u64_stats_fetch_retry(&tx_ring->syncp, start)); 3328 3329 stats->tx_packets += packets; 3330 stats->tx_bytes += bytes; 3331 3332 rx_ring = &adapter->rx_ring[i]; 3333 3334 do { 3335 start = u64_stats_fetch_begin(&rx_ring->syncp); 3336 packets = rx_ring->rx_stats.cnt; 3337 bytes = rx_ring->rx_stats.bytes; 3338 } while (u64_stats_fetch_retry(&rx_ring->syncp, start)); 3339 3340 stats->rx_packets += packets; 3341 stats->rx_bytes += bytes; 3342 } 3343 3344 do { 3345 start = u64_stats_fetch_begin(&adapter->syncp); 3346 rx_drops = adapter->dev_stats.rx_drops; 3347 tx_drops = adapter->dev_stats.tx_drops; 3348 } while (u64_stats_fetch_retry(&adapter->syncp, start)); 3349 3350 stats->rx_dropped = rx_drops; 3351 stats->tx_dropped = tx_drops; 3352 3353 stats->multicast = 0; 3354 stats->collisions = 0; 3355 3356 stats->rx_length_errors = 0; 3357 stats->rx_crc_errors = 0; 3358 stats->rx_frame_errors = 0; 3359 stats->rx_fifo_errors = 0; 3360 stats->rx_missed_errors = 0; 3361 stats->tx_window_errors = 0; 3362 3363 stats->rx_errors = 0; 3364 stats->tx_errors = 0; 3365 } 3366 3367 static const struct net_device_ops ena_netdev_ops = { 3368 .ndo_open = ena_open, 3369 .ndo_stop = ena_close, 3370 .ndo_start_xmit = ena_start_xmit, 3371 .ndo_select_queue = ena_select_queue, 3372 .ndo_get_stats64 = ena_get_stats64, 3373 .ndo_tx_timeout = ena_tx_timeout, 3374 .ndo_change_mtu = ena_change_mtu, 3375 .ndo_set_mac_address = NULL, 3376 .ndo_validate_addr = eth_validate_addr, 3377 .ndo_bpf = ena_xdp, 3378 .ndo_xdp_xmit = ena_xdp_xmit, 3379 }; 3380 3381 static void ena_calc_io_queue_size(struct ena_adapter *adapter, 3382 struct ena_com_dev_get_features_ctx *get_feat_ctx) 3383 { 3384 struct ena_admin_feature_llq_desc *llq = &get_feat_ctx->llq; 3385 struct ena_com_dev *ena_dev = adapter->ena_dev; 3386 u32 tx_queue_size = ENA_DEFAULT_RING_SIZE; 3387 u32 rx_queue_size = ENA_DEFAULT_RING_SIZE; 3388 u32 max_tx_queue_size; 3389 u32 max_rx_queue_size; 3390 3391 /* If this function is called after driver load, the ring sizes have already 3392 * been configured. Take it into account when recalculating ring size. 3393 */ 3394 if (adapter->tx_ring->ring_size) 3395 tx_queue_size = adapter->tx_ring->ring_size; 3396 3397 if (adapter->rx_ring->ring_size) 3398 rx_queue_size = adapter->rx_ring->ring_size; 3399 3400 if (ena_dev->supported_features & BIT(ENA_ADMIN_MAX_QUEUES_EXT)) { 3401 struct ena_admin_queue_ext_feature_fields *max_queue_ext = 3402 &get_feat_ctx->max_queue_ext.max_queue_ext; 3403 max_rx_queue_size = min_t(u32, max_queue_ext->max_rx_cq_depth, 3404 max_queue_ext->max_rx_sq_depth); 3405 max_tx_queue_size = max_queue_ext->max_tx_cq_depth; 3406 3407 if (ena_dev->tx_mem_queue_type == ENA_ADMIN_PLACEMENT_POLICY_DEV) 3408 max_tx_queue_size = min_t(u32, max_tx_queue_size, 3409 llq->max_llq_depth); 3410 else 3411 max_tx_queue_size = min_t(u32, max_tx_queue_size, 3412 max_queue_ext->max_tx_sq_depth); 3413 3414 adapter->max_tx_sgl_size = min_t(u16, ENA_PKT_MAX_BUFS, 3415 max_queue_ext->max_per_packet_tx_descs); 3416 adapter->max_rx_sgl_size = min_t(u16, ENA_PKT_MAX_BUFS, 3417 max_queue_ext->max_per_packet_rx_descs); 3418 } else { 3419 struct ena_admin_queue_feature_desc *max_queues = 3420 &get_feat_ctx->max_queues; 3421 max_rx_queue_size = min_t(u32, max_queues->max_cq_depth, 3422 max_queues->max_sq_depth); 3423 max_tx_queue_size = max_queues->max_cq_depth; 3424 3425 if (ena_dev->tx_mem_queue_type == ENA_ADMIN_PLACEMENT_POLICY_DEV) 3426 max_tx_queue_size = min_t(u32, max_tx_queue_size, 3427 llq->max_llq_depth); 3428 else 3429 max_tx_queue_size = min_t(u32, max_tx_queue_size, 3430 max_queues->max_sq_depth); 3431 3432 adapter->max_tx_sgl_size = min_t(u16, ENA_PKT_MAX_BUFS, 3433 max_queues->max_packet_tx_descs); 3434 adapter->max_rx_sgl_size = min_t(u16, ENA_PKT_MAX_BUFS, 3435 max_queues->max_packet_rx_descs); 3436 } 3437 3438 max_tx_queue_size = rounddown_pow_of_two(max_tx_queue_size); 3439 max_rx_queue_size = rounddown_pow_of_two(max_rx_queue_size); 3440 3441 /* When forcing large headers, we multiply the entry size by 2, and therefore divide 3442 * the queue size by 2, leaving the amount of memory used by the queues unchanged. 3443 */ 3444 if (adapter->large_llq_header_enabled) { 3445 if ((llq->entry_size_ctrl_supported & ENA_ADMIN_LIST_ENTRY_SIZE_256B) && 3446 ena_dev->tx_mem_queue_type == ENA_ADMIN_PLACEMENT_POLICY_DEV) { 3447 max_tx_queue_size /= 2; 3448 dev_info(&adapter->pdev->dev, 3449 "Forcing large headers and decreasing maximum TX queue size to %d\n", 3450 max_tx_queue_size); 3451 } else { 3452 dev_err(&adapter->pdev->dev, 3453 "Forcing large headers failed: LLQ is disabled or device does not support large headers\n"); 3454 3455 adapter->large_llq_header_enabled = false; 3456 } 3457 } 3458 3459 tx_queue_size = clamp_val(tx_queue_size, ENA_MIN_RING_SIZE, 3460 max_tx_queue_size); 3461 rx_queue_size = clamp_val(rx_queue_size, ENA_MIN_RING_SIZE, 3462 max_rx_queue_size); 3463 3464 tx_queue_size = rounddown_pow_of_two(tx_queue_size); 3465 rx_queue_size = rounddown_pow_of_two(rx_queue_size); 3466 3467 adapter->max_tx_ring_size = max_tx_queue_size; 3468 adapter->max_rx_ring_size = max_rx_queue_size; 3469 adapter->requested_tx_ring_size = tx_queue_size; 3470 adapter->requested_rx_ring_size = rx_queue_size; 3471 } 3472 3473 static int ena_device_validate_params(struct ena_adapter *adapter, 3474 struct ena_com_dev_get_features_ctx *get_feat_ctx) 3475 { 3476 struct net_device *netdev = adapter->netdev; 3477 int rc; 3478 3479 rc = ether_addr_equal(get_feat_ctx->dev_attr.mac_addr, 3480 adapter->mac_addr); 3481 if (!rc) { 3482 netif_err(adapter, drv, netdev, 3483 "Error, mac address are different\n"); 3484 return -EINVAL; 3485 } 3486 3487 if (get_feat_ctx->dev_attr.max_mtu < netdev->mtu) { 3488 netif_err(adapter, drv, netdev, 3489 "Error, device max mtu is smaller than netdev MTU\n"); 3490 return -EINVAL; 3491 } 3492 3493 return 0; 3494 } 3495 3496 static void set_default_llq_configurations(struct ena_adapter *adapter, 3497 struct ena_llq_configurations *llq_config, 3498 struct ena_admin_feature_llq_desc *llq) 3499 { 3500 struct ena_com_dev *ena_dev = adapter->ena_dev; 3501 3502 llq_config->llq_header_location = ENA_ADMIN_INLINE_HEADER; 3503 llq_config->llq_stride_ctrl = ENA_ADMIN_MULTIPLE_DESCS_PER_ENTRY; 3504 llq_config->llq_num_decs_before_header = ENA_ADMIN_LLQ_NUM_DESCS_BEFORE_HEADER_2; 3505 3506 adapter->large_llq_header_supported = 3507 !!(ena_dev->supported_features & BIT(ENA_ADMIN_LLQ)); 3508 adapter->large_llq_header_supported &= 3509 !!(llq->entry_size_ctrl_supported & 3510 ENA_ADMIN_LIST_ENTRY_SIZE_256B); 3511 3512 if ((llq->entry_size_ctrl_supported & ENA_ADMIN_LIST_ENTRY_SIZE_256B) && 3513 adapter->large_llq_header_enabled) { 3514 llq_config->llq_ring_entry_size = ENA_ADMIN_LIST_ENTRY_SIZE_256B; 3515 llq_config->llq_ring_entry_size_value = 256; 3516 } else { 3517 llq_config->llq_ring_entry_size = ENA_ADMIN_LIST_ENTRY_SIZE_128B; 3518 llq_config->llq_ring_entry_size_value = 128; 3519 } 3520 } 3521 3522 static int ena_set_queues_placement_policy(struct pci_dev *pdev, 3523 struct ena_com_dev *ena_dev, 3524 struct ena_admin_feature_llq_desc *llq, 3525 struct ena_llq_configurations *llq_default_configurations) 3526 { 3527 int rc; 3528 u32 llq_feature_mask; 3529 3530 llq_feature_mask = 1 << ENA_ADMIN_LLQ; 3531 if (!(ena_dev->supported_features & llq_feature_mask)) { 3532 dev_warn(&pdev->dev, 3533 "LLQ is not supported Fallback to host mode policy.\n"); 3534 ena_dev->tx_mem_queue_type = ENA_ADMIN_PLACEMENT_POLICY_HOST; 3535 return 0; 3536 } 3537 3538 if (!ena_dev->mem_bar) { 3539 netdev_err(ena_dev->net_device, 3540 "LLQ is advertised as supported but device doesn't expose mem bar\n"); 3541 ena_dev->tx_mem_queue_type = ENA_ADMIN_PLACEMENT_POLICY_HOST; 3542 return 0; 3543 } 3544 3545 rc = ena_com_config_dev_mode(ena_dev, llq, llq_default_configurations); 3546 if (unlikely(rc)) { 3547 dev_err(&pdev->dev, 3548 "Failed to configure the device mode. Fallback to host mode policy.\n"); 3549 ena_dev->tx_mem_queue_type = ENA_ADMIN_PLACEMENT_POLICY_HOST; 3550 } 3551 3552 return 0; 3553 } 3554 3555 static int ena_map_llq_mem_bar(struct pci_dev *pdev, struct ena_com_dev *ena_dev, 3556 int bars) 3557 { 3558 bool has_mem_bar = !!(bars & BIT(ENA_MEM_BAR)); 3559 3560 if (!has_mem_bar) 3561 return 0; 3562 3563 ena_dev->mem_bar = devm_ioremap_wc(&pdev->dev, 3564 pci_resource_start(pdev, ENA_MEM_BAR), 3565 pci_resource_len(pdev, ENA_MEM_BAR)); 3566 3567 if (!ena_dev->mem_bar) 3568 return -EFAULT; 3569 3570 return 0; 3571 } 3572 3573 static int ena_device_init(struct ena_adapter *adapter, struct pci_dev *pdev, 3574 struct ena_com_dev_get_features_ctx *get_feat_ctx, 3575 bool *wd_state) 3576 { 3577 struct ena_com_dev *ena_dev = adapter->ena_dev; 3578 struct ena_llq_configurations llq_config; 3579 struct device *dev = &pdev->dev; 3580 bool readless_supported; 3581 u32 aenq_groups; 3582 int dma_width; 3583 int rc; 3584 3585 rc = ena_com_mmio_reg_read_request_init(ena_dev); 3586 if (rc) { 3587 dev_err(dev, "Failed to init mmio read less\n"); 3588 return rc; 3589 } 3590 3591 /* The PCIe configuration space revision id indicate if mmio reg 3592 * read is disabled 3593 */ 3594 readless_supported = !(pdev->revision & ENA_MMIO_DISABLE_REG_READ); 3595 ena_com_set_mmio_read_mode(ena_dev, readless_supported); 3596 3597 rc = ena_com_dev_reset(ena_dev, ENA_REGS_RESET_NORMAL); 3598 if (rc) { 3599 dev_err(dev, "Can not reset device\n"); 3600 goto err_mmio_read_less; 3601 } 3602 3603 rc = ena_com_validate_version(ena_dev); 3604 if (rc) { 3605 dev_err(dev, "Device version is too low\n"); 3606 goto err_mmio_read_less; 3607 } 3608 3609 dma_width = ena_com_get_dma_width(ena_dev); 3610 if (dma_width < 0) { 3611 dev_err(dev, "Invalid dma width value %d", dma_width); 3612 rc = dma_width; 3613 goto err_mmio_read_less; 3614 } 3615 3616 rc = dma_set_mask_and_coherent(dev, DMA_BIT_MASK(dma_width)); 3617 if (rc) { 3618 dev_err(dev, "dma_set_mask_and_coherent failed %d\n", rc); 3619 goto err_mmio_read_less; 3620 } 3621 3622 /* ENA admin level init */ 3623 rc = ena_com_admin_init(ena_dev, &aenq_handlers); 3624 if (rc) { 3625 dev_err(dev, 3626 "Can not initialize ena admin queue with device\n"); 3627 goto err_mmio_read_less; 3628 } 3629 3630 /* To enable the msix interrupts the driver needs to know the number 3631 * of queues. So the driver uses polling mode to retrieve this 3632 * information 3633 */ 3634 ena_com_set_admin_polling_mode(ena_dev, true); 3635 3636 ena_config_host_info(ena_dev, pdev); 3637 3638 /* Get Device Attributes*/ 3639 rc = ena_com_get_dev_attr_feat(ena_dev, get_feat_ctx); 3640 if (rc) { 3641 dev_err(dev, "Cannot get attribute for ena device rc=%d\n", rc); 3642 goto err_admin_init; 3643 } 3644 3645 /* Try to turn all the available aenq groups */ 3646 aenq_groups = BIT(ENA_ADMIN_LINK_CHANGE) | 3647 BIT(ENA_ADMIN_FATAL_ERROR) | 3648 BIT(ENA_ADMIN_WARNING) | 3649 BIT(ENA_ADMIN_NOTIFICATION) | 3650 BIT(ENA_ADMIN_KEEP_ALIVE); 3651 3652 aenq_groups &= get_feat_ctx->aenq.supported_groups; 3653 3654 rc = ena_com_set_aenq_config(ena_dev, aenq_groups); 3655 if (rc) { 3656 dev_err(dev, "Cannot configure aenq groups rc= %d\n", rc); 3657 goto err_admin_init; 3658 } 3659 3660 *wd_state = !!(aenq_groups & BIT(ENA_ADMIN_KEEP_ALIVE)); 3661 3662 set_default_llq_configurations(adapter, &llq_config, &get_feat_ctx->llq); 3663 3664 rc = ena_set_queues_placement_policy(pdev, ena_dev, &get_feat_ctx->llq, 3665 &llq_config); 3666 if (rc) { 3667 dev_err(dev, "ENA device init failed\n"); 3668 goto err_admin_init; 3669 } 3670 3671 ena_calc_io_queue_size(adapter, get_feat_ctx); 3672 3673 return 0; 3674 3675 err_admin_init: 3676 ena_com_delete_host_info(ena_dev); 3677 ena_com_admin_destroy(ena_dev); 3678 err_mmio_read_less: 3679 ena_com_mmio_reg_read_request_destroy(ena_dev); 3680 3681 return rc; 3682 } 3683 3684 static int ena_enable_msix_and_set_admin_interrupts(struct ena_adapter *adapter) 3685 { 3686 struct ena_com_dev *ena_dev = adapter->ena_dev; 3687 struct device *dev = &adapter->pdev->dev; 3688 int rc; 3689 3690 rc = ena_enable_msix(adapter); 3691 if (rc) { 3692 dev_err(dev, "Can not reserve msix vectors\n"); 3693 return rc; 3694 } 3695 3696 ena_setup_mgmnt_intr(adapter); 3697 3698 rc = ena_request_mgmnt_irq(adapter); 3699 if (rc) { 3700 dev_err(dev, "Can not setup management interrupts\n"); 3701 goto err_disable_msix; 3702 } 3703 3704 ena_com_set_admin_polling_mode(ena_dev, false); 3705 3706 ena_com_admin_aenq_enable(ena_dev); 3707 3708 return 0; 3709 3710 err_disable_msix: 3711 ena_disable_msix(adapter); 3712 3713 return rc; 3714 } 3715 3716 static void ena_destroy_device(struct ena_adapter *adapter, bool graceful) 3717 { 3718 struct net_device *netdev = adapter->netdev; 3719 struct ena_com_dev *ena_dev = adapter->ena_dev; 3720 bool dev_up; 3721 3722 if (!test_bit(ENA_FLAG_DEVICE_RUNNING, &adapter->flags)) 3723 return; 3724 3725 netif_carrier_off(netdev); 3726 3727 del_timer_sync(&adapter->timer_service); 3728 3729 dev_up = test_bit(ENA_FLAG_DEV_UP, &adapter->flags); 3730 adapter->dev_up_before_reset = dev_up; 3731 if (!graceful) 3732 ena_com_set_admin_running_state(ena_dev, false); 3733 3734 if (test_bit(ENA_FLAG_DEV_UP, &adapter->flags)) 3735 ena_down(adapter); 3736 3737 /* Stop the device from sending AENQ events (in case reset flag is set 3738 * and device is up, ena_down() already reset the device. 3739 */ 3740 if (!(test_bit(ENA_FLAG_TRIGGER_RESET, &adapter->flags) && dev_up)) 3741 ena_com_dev_reset(adapter->ena_dev, adapter->reset_reason); 3742 3743 ena_free_mgmnt_irq(adapter); 3744 3745 ena_disable_msix(adapter); 3746 3747 ena_com_abort_admin_commands(ena_dev); 3748 3749 ena_com_wait_for_abort_completion(ena_dev); 3750 3751 ena_com_admin_destroy(ena_dev); 3752 3753 ena_com_mmio_reg_read_request_destroy(ena_dev); 3754 3755 /* return reset reason to default value */ 3756 adapter->reset_reason = ENA_REGS_RESET_NORMAL; 3757 3758 clear_bit(ENA_FLAG_TRIGGER_RESET, &adapter->flags); 3759 clear_bit(ENA_FLAG_DEVICE_RUNNING, &adapter->flags); 3760 } 3761 3762 static int ena_restore_device(struct ena_adapter *adapter) 3763 { 3764 struct ena_com_dev_get_features_ctx get_feat_ctx; 3765 struct ena_com_dev *ena_dev = adapter->ena_dev; 3766 struct pci_dev *pdev = adapter->pdev; 3767 struct ena_ring *txr; 3768 int rc, count, i; 3769 bool wd_state; 3770 3771 set_bit(ENA_FLAG_ONGOING_RESET, &adapter->flags); 3772 rc = ena_device_init(adapter, adapter->pdev, &get_feat_ctx, &wd_state); 3773 if (rc) { 3774 dev_err(&pdev->dev, "Can not initialize device\n"); 3775 goto err; 3776 } 3777 adapter->wd_state = wd_state; 3778 3779 count = adapter->xdp_num_queues + adapter->num_io_queues; 3780 for (i = 0 ; i < count; i++) { 3781 txr = &adapter->tx_ring[i]; 3782 txr->tx_mem_queue_type = ena_dev->tx_mem_queue_type; 3783 txr->tx_max_header_size = ena_dev->tx_max_header_size; 3784 } 3785 3786 rc = ena_device_validate_params(adapter, &get_feat_ctx); 3787 if (rc) { 3788 dev_err(&pdev->dev, "Validation of device parameters failed\n"); 3789 goto err_device_destroy; 3790 } 3791 3792 rc = ena_enable_msix_and_set_admin_interrupts(adapter); 3793 if (rc) { 3794 dev_err(&pdev->dev, "Enable MSI-X failed\n"); 3795 goto err_device_destroy; 3796 } 3797 /* If the interface was up before the reset bring it up */ 3798 if (adapter->dev_up_before_reset) { 3799 rc = ena_up(adapter); 3800 if (rc) { 3801 dev_err(&pdev->dev, "Failed to create I/O queues\n"); 3802 goto err_disable_msix; 3803 } 3804 } 3805 3806 set_bit(ENA_FLAG_DEVICE_RUNNING, &adapter->flags); 3807 3808 clear_bit(ENA_FLAG_ONGOING_RESET, &adapter->flags); 3809 if (test_bit(ENA_FLAG_LINK_UP, &adapter->flags)) 3810 netif_carrier_on(adapter->netdev); 3811 3812 mod_timer(&adapter->timer_service, round_jiffies(jiffies + HZ)); 3813 adapter->last_keep_alive_jiffies = jiffies; 3814 3815 return rc; 3816 err_disable_msix: 3817 ena_free_mgmnt_irq(adapter); 3818 ena_disable_msix(adapter); 3819 err_device_destroy: 3820 ena_com_abort_admin_commands(ena_dev); 3821 ena_com_wait_for_abort_completion(ena_dev); 3822 ena_com_admin_destroy(ena_dev); 3823 ena_com_dev_reset(ena_dev, ENA_REGS_RESET_DRIVER_INVALID_STATE); 3824 ena_com_mmio_reg_read_request_destroy(ena_dev); 3825 err: 3826 clear_bit(ENA_FLAG_DEVICE_RUNNING, &adapter->flags); 3827 clear_bit(ENA_FLAG_ONGOING_RESET, &adapter->flags); 3828 dev_err(&pdev->dev, 3829 "Reset attempt failed. Can not reset the device\n"); 3830 3831 return rc; 3832 } 3833 3834 static void ena_fw_reset_device(struct work_struct *work) 3835 { 3836 struct ena_adapter *adapter = 3837 container_of(work, struct ena_adapter, reset_task); 3838 3839 rtnl_lock(); 3840 3841 if (likely(test_bit(ENA_FLAG_TRIGGER_RESET, &adapter->flags))) { 3842 ena_destroy_device(adapter, false); 3843 ena_restore_device(adapter); 3844 3845 dev_err(&adapter->pdev->dev, "Device reset completed successfully\n"); 3846 } 3847 3848 rtnl_unlock(); 3849 } 3850 3851 static int check_for_rx_interrupt_queue(struct ena_adapter *adapter, 3852 struct ena_ring *rx_ring) 3853 { 3854 struct ena_napi *ena_napi = container_of(rx_ring->napi, struct ena_napi, napi); 3855 3856 if (likely(READ_ONCE(ena_napi->first_interrupt))) 3857 return 0; 3858 3859 if (ena_com_cq_empty(rx_ring->ena_com_io_cq)) 3860 return 0; 3861 3862 rx_ring->no_interrupt_event_cnt++; 3863 3864 if (rx_ring->no_interrupt_event_cnt == ENA_MAX_NO_INTERRUPT_ITERATIONS) { 3865 netif_err(adapter, rx_err, adapter->netdev, 3866 "Potential MSIX issue on Rx side Queue = %d. Reset the device\n", 3867 rx_ring->qid); 3868 3869 ena_reset_device(adapter, ENA_REGS_RESET_MISS_INTERRUPT); 3870 return -EIO; 3871 } 3872 3873 return 0; 3874 } 3875 3876 static int check_missing_comp_in_tx_queue(struct ena_adapter *adapter, 3877 struct ena_ring *tx_ring) 3878 { 3879 struct ena_napi *ena_napi = container_of(tx_ring->napi, struct ena_napi, napi); 3880 unsigned int time_since_last_napi; 3881 unsigned int missing_tx_comp_to; 3882 bool is_tx_comp_time_expired; 3883 struct ena_tx_buffer *tx_buf; 3884 unsigned long last_jiffies; 3885 u32 missed_tx = 0; 3886 int i, rc = 0; 3887 3888 for (i = 0; i < tx_ring->ring_size; i++) { 3889 tx_buf = &tx_ring->tx_buffer_info[i]; 3890 last_jiffies = tx_buf->last_jiffies; 3891 3892 if (last_jiffies == 0) 3893 /* no pending Tx at this location */ 3894 continue; 3895 3896 is_tx_comp_time_expired = time_is_before_jiffies(last_jiffies + 3897 2 * adapter->missing_tx_completion_to); 3898 3899 if (unlikely(!READ_ONCE(ena_napi->first_interrupt) && is_tx_comp_time_expired)) { 3900 /* If after graceful period interrupt is still not 3901 * received, we schedule a reset 3902 */ 3903 netif_err(adapter, tx_err, adapter->netdev, 3904 "Potential MSIX issue on Tx side Queue = %d. Reset the device\n", 3905 tx_ring->qid); 3906 ena_reset_device(adapter, ENA_REGS_RESET_MISS_INTERRUPT); 3907 return -EIO; 3908 } 3909 3910 is_tx_comp_time_expired = time_is_before_jiffies(last_jiffies + 3911 adapter->missing_tx_completion_to); 3912 3913 if (unlikely(is_tx_comp_time_expired)) { 3914 if (!tx_buf->print_once) { 3915 time_since_last_napi = jiffies_to_usecs(jiffies - tx_ring->tx_stats.last_napi_jiffies); 3916 missing_tx_comp_to = jiffies_to_msecs(adapter->missing_tx_completion_to); 3917 netif_notice(adapter, tx_err, adapter->netdev, 3918 "Found a Tx that wasn't completed on time, qid %d, index %d. %u usecs have passed since last napi execution. Missing Tx timeout value %u msecs\n", 3919 tx_ring->qid, i, time_since_last_napi, missing_tx_comp_to); 3920 } 3921 3922 tx_buf->print_once = 1; 3923 missed_tx++; 3924 } 3925 } 3926 3927 if (unlikely(missed_tx > adapter->missing_tx_completion_threshold)) { 3928 netif_err(adapter, tx_err, adapter->netdev, 3929 "The number of lost tx completions is above the threshold (%d > %d). Reset the device\n", 3930 missed_tx, 3931 adapter->missing_tx_completion_threshold); 3932 ena_reset_device(adapter, ENA_REGS_RESET_MISS_TX_CMPL); 3933 rc = -EIO; 3934 } 3935 3936 ena_increase_stat(&tx_ring->tx_stats.missed_tx, missed_tx, 3937 &tx_ring->syncp); 3938 3939 return rc; 3940 } 3941 3942 static void check_for_missing_completions(struct ena_adapter *adapter) 3943 { 3944 struct ena_ring *tx_ring; 3945 struct ena_ring *rx_ring; 3946 int i, budget, rc; 3947 int io_queue_count; 3948 3949 io_queue_count = adapter->xdp_num_queues + adapter->num_io_queues; 3950 /* Make sure the driver doesn't turn the device in other process */ 3951 smp_rmb(); 3952 3953 if (!test_bit(ENA_FLAG_DEV_UP, &adapter->flags)) 3954 return; 3955 3956 if (test_bit(ENA_FLAG_TRIGGER_RESET, &adapter->flags)) 3957 return; 3958 3959 if (adapter->missing_tx_completion_to == ENA_HW_HINTS_NO_TIMEOUT) 3960 return; 3961 3962 budget = ENA_MONITORED_TX_QUEUES; 3963 3964 for (i = adapter->last_monitored_tx_qid; i < io_queue_count; i++) { 3965 tx_ring = &adapter->tx_ring[i]; 3966 rx_ring = &adapter->rx_ring[i]; 3967 3968 rc = check_missing_comp_in_tx_queue(adapter, tx_ring); 3969 if (unlikely(rc)) 3970 return; 3971 3972 rc = !ENA_IS_XDP_INDEX(adapter, i) ? 3973 check_for_rx_interrupt_queue(adapter, rx_ring) : 0; 3974 if (unlikely(rc)) 3975 return; 3976 3977 budget--; 3978 if (!budget) 3979 break; 3980 } 3981 3982 adapter->last_monitored_tx_qid = i % io_queue_count; 3983 } 3984 3985 /* trigger napi schedule after 2 consecutive detections */ 3986 #define EMPTY_RX_REFILL 2 3987 /* For the rare case where the device runs out of Rx descriptors and the 3988 * napi handler failed to refill new Rx descriptors (due to a lack of memory 3989 * for example). 3990 * This case will lead to a deadlock: 3991 * The device won't send interrupts since all the new Rx packets will be dropped 3992 * The napi handler won't allocate new Rx descriptors so the device will be 3993 * able to send new packets. 3994 * 3995 * This scenario can happen when the kernel's vm.min_free_kbytes is too small. 3996 * It is recommended to have at least 512MB, with a minimum of 128MB for 3997 * constrained environment). 3998 * 3999 * When such a situation is detected - Reschedule napi 4000 */ 4001 static void check_for_empty_rx_ring(struct ena_adapter *adapter) 4002 { 4003 struct ena_ring *rx_ring; 4004 int i, refill_required; 4005 4006 if (!test_bit(ENA_FLAG_DEV_UP, &adapter->flags)) 4007 return; 4008 4009 if (test_bit(ENA_FLAG_TRIGGER_RESET, &adapter->flags)) 4010 return; 4011 4012 for (i = 0; i < adapter->num_io_queues; i++) { 4013 rx_ring = &adapter->rx_ring[i]; 4014 4015 refill_required = ena_com_free_q_entries(rx_ring->ena_com_io_sq); 4016 if (unlikely(refill_required == (rx_ring->ring_size - 1))) { 4017 rx_ring->empty_rx_queue++; 4018 4019 if (rx_ring->empty_rx_queue >= EMPTY_RX_REFILL) { 4020 ena_increase_stat(&rx_ring->rx_stats.empty_rx_ring, 1, 4021 &rx_ring->syncp); 4022 4023 netif_err(adapter, drv, adapter->netdev, 4024 "Trigger refill for ring %d\n", i); 4025 4026 napi_schedule(rx_ring->napi); 4027 rx_ring->empty_rx_queue = 0; 4028 } 4029 } else { 4030 rx_ring->empty_rx_queue = 0; 4031 } 4032 } 4033 } 4034 4035 /* Check for keep alive expiration */ 4036 static void check_for_missing_keep_alive(struct ena_adapter *adapter) 4037 { 4038 unsigned long keep_alive_expired; 4039 4040 if (!adapter->wd_state) 4041 return; 4042 4043 if (adapter->keep_alive_timeout == ENA_HW_HINTS_NO_TIMEOUT) 4044 return; 4045 4046 keep_alive_expired = adapter->last_keep_alive_jiffies + 4047 adapter->keep_alive_timeout; 4048 if (unlikely(time_is_before_jiffies(keep_alive_expired))) { 4049 netif_err(adapter, drv, adapter->netdev, 4050 "Keep alive watchdog timeout.\n"); 4051 ena_increase_stat(&adapter->dev_stats.wd_expired, 1, 4052 &adapter->syncp); 4053 ena_reset_device(adapter, ENA_REGS_RESET_KEEP_ALIVE_TO); 4054 } 4055 } 4056 4057 static void check_for_admin_com_state(struct ena_adapter *adapter) 4058 { 4059 if (unlikely(!ena_com_get_admin_running_state(adapter->ena_dev))) { 4060 netif_err(adapter, drv, adapter->netdev, 4061 "ENA admin queue is not in running state!\n"); 4062 ena_increase_stat(&adapter->dev_stats.admin_q_pause, 1, 4063 &adapter->syncp); 4064 ena_reset_device(adapter, ENA_REGS_RESET_ADMIN_TO); 4065 } 4066 } 4067 4068 static void ena_update_hints(struct ena_adapter *adapter, 4069 struct ena_admin_ena_hw_hints *hints) 4070 { 4071 struct net_device *netdev = adapter->netdev; 4072 4073 if (hints->admin_completion_tx_timeout) 4074 adapter->ena_dev->admin_queue.completion_timeout = 4075 hints->admin_completion_tx_timeout * 1000; 4076 4077 if (hints->mmio_read_timeout) 4078 /* convert to usec */ 4079 adapter->ena_dev->mmio_read.reg_read_to = 4080 hints->mmio_read_timeout * 1000; 4081 4082 if (hints->missed_tx_completion_count_threshold_to_reset) 4083 adapter->missing_tx_completion_threshold = 4084 hints->missed_tx_completion_count_threshold_to_reset; 4085 4086 if (hints->missing_tx_completion_timeout) { 4087 if (hints->missing_tx_completion_timeout == ENA_HW_HINTS_NO_TIMEOUT) 4088 adapter->missing_tx_completion_to = ENA_HW_HINTS_NO_TIMEOUT; 4089 else 4090 adapter->missing_tx_completion_to = 4091 msecs_to_jiffies(hints->missing_tx_completion_timeout); 4092 } 4093 4094 if (hints->netdev_wd_timeout) 4095 netdev->watchdog_timeo = msecs_to_jiffies(hints->netdev_wd_timeout); 4096 4097 if (hints->driver_watchdog_timeout) { 4098 if (hints->driver_watchdog_timeout == ENA_HW_HINTS_NO_TIMEOUT) 4099 adapter->keep_alive_timeout = ENA_HW_HINTS_NO_TIMEOUT; 4100 else 4101 adapter->keep_alive_timeout = 4102 msecs_to_jiffies(hints->driver_watchdog_timeout); 4103 } 4104 } 4105 4106 static void ena_update_host_info(struct ena_admin_host_info *host_info, 4107 struct net_device *netdev) 4108 { 4109 host_info->supported_network_features[0] = 4110 netdev->features & GENMASK_ULL(31, 0); 4111 host_info->supported_network_features[1] = 4112 (netdev->features & GENMASK_ULL(63, 32)) >> 32; 4113 } 4114 4115 static void ena_timer_service(struct timer_list *t) 4116 { 4117 struct ena_adapter *adapter = from_timer(adapter, t, timer_service); 4118 u8 *debug_area = adapter->ena_dev->host_attr.debug_area_virt_addr; 4119 struct ena_admin_host_info *host_info = 4120 adapter->ena_dev->host_attr.host_info; 4121 4122 check_for_missing_keep_alive(adapter); 4123 4124 check_for_admin_com_state(adapter); 4125 4126 check_for_missing_completions(adapter); 4127 4128 check_for_empty_rx_ring(adapter); 4129 4130 if (debug_area) 4131 ena_dump_stats_to_buf(adapter, debug_area); 4132 4133 if (host_info) 4134 ena_update_host_info(host_info, adapter->netdev); 4135 4136 if (unlikely(test_bit(ENA_FLAG_TRIGGER_RESET, &adapter->flags))) { 4137 netif_err(adapter, drv, adapter->netdev, 4138 "Trigger reset is on\n"); 4139 ena_dump_stats_to_dmesg(adapter); 4140 queue_work(ena_wq, &adapter->reset_task); 4141 return; 4142 } 4143 4144 /* Reset the timer */ 4145 mod_timer(&adapter->timer_service, round_jiffies(jiffies + HZ)); 4146 } 4147 4148 static u32 ena_calc_max_io_queue_num(struct pci_dev *pdev, 4149 struct ena_com_dev *ena_dev, 4150 struct ena_com_dev_get_features_ctx *get_feat_ctx) 4151 { 4152 u32 io_tx_sq_num, io_tx_cq_num, io_rx_num, max_num_io_queues; 4153 4154 if (ena_dev->supported_features & BIT(ENA_ADMIN_MAX_QUEUES_EXT)) { 4155 struct ena_admin_queue_ext_feature_fields *max_queue_ext = 4156 &get_feat_ctx->max_queue_ext.max_queue_ext; 4157 io_rx_num = min_t(u32, max_queue_ext->max_rx_sq_num, 4158 max_queue_ext->max_rx_cq_num); 4159 4160 io_tx_sq_num = max_queue_ext->max_tx_sq_num; 4161 io_tx_cq_num = max_queue_ext->max_tx_cq_num; 4162 } else { 4163 struct ena_admin_queue_feature_desc *max_queues = 4164 &get_feat_ctx->max_queues; 4165 io_tx_sq_num = max_queues->max_sq_num; 4166 io_tx_cq_num = max_queues->max_cq_num; 4167 io_rx_num = min_t(u32, io_tx_sq_num, io_tx_cq_num); 4168 } 4169 4170 /* In case of LLQ use the llq fields for the tx SQ/CQ */ 4171 if (ena_dev->tx_mem_queue_type == ENA_ADMIN_PLACEMENT_POLICY_DEV) 4172 io_tx_sq_num = get_feat_ctx->llq.max_llq_num; 4173 4174 max_num_io_queues = min_t(u32, num_online_cpus(), ENA_MAX_NUM_IO_QUEUES); 4175 max_num_io_queues = min_t(u32, max_num_io_queues, io_rx_num); 4176 max_num_io_queues = min_t(u32, max_num_io_queues, io_tx_sq_num); 4177 max_num_io_queues = min_t(u32, max_num_io_queues, io_tx_cq_num); 4178 /* 1 IRQ for mgmnt and 1 IRQs for each IO direction */ 4179 max_num_io_queues = min_t(u32, max_num_io_queues, pci_msix_vec_count(pdev) - 1); 4180 4181 return max_num_io_queues; 4182 } 4183 4184 static void ena_set_dev_offloads(struct ena_com_dev_get_features_ctx *feat, 4185 struct net_device *netdev) 4186 { 4187 netdev_features_t dev_features = 0; 4188 4189 /* Set offload features */ 4190 if (feat->offload.tx & 4191 ENA_ADMIN_FEATURE_OFFLOAD_DESC_TX_L4_IPV4_CSUM_PART_MASK) 4192 dev_features |= NETIF_F_IP_CSUM; 4193 4194 if (feat->offload.tx & 4195 ENA_ADMIN_FEATURE_OFFLOAD_DESC_TX_L4_IPV6_CSUM_PART_MASK) 4196 dev_features |= NETIF_F_IPV6_CSUM; 4197 4198 if (feat->offload.tx & ENA_ADMIN_FEATURE_OFFLOAD_DESC_TSO_IPV4_MASK) 4199 dev_features |= NETIF_F_TSO; 4200 4201 if (feat->offload.tx & ENA_ADMIN_FEATURE_OFFLOAD_DESC_TSO_IPV6_MASK) 4202 dev_features |= NETIF_F_TSO6; 4203 4204 if (feat->offload.tx & ENA_ADMIN_FEATURE_OFFLOAD_DESC_TSO_ECN_MASK) 4205 dev_features |= NETIF_F_TSO_ECN; 4206 4207 if (feat->offload.rx_supported & 4208 ENA_ADMIN_FEATURE_OFFLOAD_DESC_RX_L4_IPV4_CSUM_MASK) 4209 dev_features |= NETIF_F_RXCSUM; 4210 4211 if (feat->offload.rx_supported & 4212 ENA_ADMIN_FEATURE_OFFLOAD_DESC_RX_L4_IPV6_CSUM_MASK) 4213 dev_features |= NETIF_F_RXCSUM; 4214 4215 netdev->features = 4216 dev_features | 4217 NETIF_F_SG | 4218 NETIF_F_RXHASH | 4219 NETIF_F_HIGHDMA; 4220 4221 netdev->hw_features |= netdev->features; 4222 netdev->vlan_features |= netdev->features; 4223 } 4224 4225 static void ena_set_conf_feat_params(struct ena_adapter *adapter, 4226 struct ena_com_dev_get_features_ctx *feat) 4227 { 4228 struct net_device *netdev = adapter->netdev; 4229 4230 /* Copy mac address */ 4231 if (!is_valid_ether_addr(feat->dev_attr.mac_addr)) { 4232 eth_hw_addr_random(netdev); 4233 ether_addr_copy(adapter->mac_addr, netdev->dev_addr); 4234 } else { 4235 ether_addr_copy(adapter->mac_addr, feat->dev_attr.mac_addr); 4236 eth_hw_addr_set(netdev, adapter->mac_addr); 4237 } 4238 4239 /* Set offload features */ 4240 ena_set_dev_offloads(feat, netdev); 4241 4242 adapter->max_mtu = feat->dev_attr.max_mtu; 4243 netdev->max_mtu = adapter->max_mtu; 4244 netdev->min_mtu = ENA_MIN_MTU; 4245 } 4246 4247 static int ena_rss_init_default(struct ena_adapter *adapter) 4248 { 4249 struct ena_com_dev *ena_dev = adapter->ena_dev; 4250 struct device *dev = &adapter->pdev->dev; 4251 int rc, i; 4252 u32 val; 4253 4254 rc = ena_com_rss_init(ena_dev, ENA_RX_RSS_TABLE_LOG_SIZE); 4255 if (unlikely(rc)) { 4256 dev_err(dev, "Cannot init indirect table\n"); 4257 goto err_rss_init; 4258 } 4259 4260 for (i = 0; i < ENA_RX_RSS_TABLE_SIZE; i++) { 4261 val = ethtool_rxfh_indir_default(i, adapter->num_io_queues); 4262 rc = ena_com_indirect_table_fill_entry(ena_dev, i, 4263 ENA_IO_RXQ_IDX(val)); 4264 if (unlikely(rc)) { 4265 dev_err(dev, "Cannot fill indirect table\n"); 4266 goto err_fill_indir; 4267 } 4268 } 4269 4270 rc = ena_com_fill_hash_function(ena_dev, ENA_ADMIN_TOEPLITZ, NULL, 4271 ENA_HASH_KEY_SIZE, 0xFFFFFFFF); 4272 if (unlikely(rc && (rc != -EOPNOTSUPP))) { 4273 dev_err(dev, "Cannot fill hash function\n"); 4274 goto err_fill_indir; 4275 } 4276 4277 rc = ena_com_set_default_hash_ctrl(ena_dev); 4278 if (unlikely(rc && (rc != -EOPNOTSUPP))) { 4279 dev_err(dev, "Cannot fill hash control\n"); 4280 goto err_fill_indir; 4281 } 4282 4283 return 0; 4284 4285 err_fill_indir: 4286 ena_com_rss_destroy(ena_dev); 4287 err_rss_init: 4288 4289 return rc; 4290 } 4291 4292 static void ena_release_bars(struct ena_com_dev *ena_dev, struct pci_dev *pdev) 4293 { 4294 int release_bars = pci_select_bars(pdev, IORESOURCE_MEM) & ENA_BAR_MASK; 4295 4296 pci_release_selected_regions(pdev, release_bars); 4297 } 4298 4299 /* ena_probe - Device Initialization Routine 4300 * @pdev: PCI device information struct 4301 * @ent: entry in ena_pci_tbl 4302 * 4303 * Returns 0 on success, negative on failure 4304 * 4305 * ena_probe initializes an adapter identified by a pci_dev structure. 4306 * The OS initialization, configuring of the adapter private structure, 4307 * and a hardware reset occur. 4308 */ 4309 static int ena_probe(struct pci_dev *pdev, const struct pci_device_id *ent) 4310 { 4311 struct ena_com_dev_get_features_ctx get_feat_ctx; 4312 struct ena_com_dev *ena_dev = NULL; 4313 struct ena_adapter *adapter; 4314 struct net_device *netdev; 4315 static int adapters_found; 4316 u32 max_num_io_queues; 4317 bool wd_state; 4318 int bars, rc; 4319 4320 dev_dbg(&pdev->dev, "%s\n", __func__); 4321 4322 rc = pci_enable_device_mem(pdev); 4323 if (rc) { 4324 dev_err(&pdev->dev, "pci_enable_device_mem() failed!\n"); 4325 return rc; 4326 } 4327 4328 rc = dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(ENA_MAX_PHYS_ADDR_SIZE_BITS)); 4329 if (rc) { 4330 dev_err(&pdev->dev, "dma_set_mask_and_coherent failed %d\n", rc); 4331 goto err_disable_device; 4332 } 4333 4334 pci_set_master(pdev); 4335 4336 ena_dev = vzalloc(sizeof(*ena_dev)); 4337 if (!ena_dev) { 4338 rc = -ENOMEM; 4339 goto err_disable_device; 4340 } 4341 4342 bars = pci_select_bars(pdev, IORESOURCE_MEM) & ENA_BAR_MASK; 4343 rc = pci_request_selected_regions(pdev, bars, DRV_MODULE_NAME); 4344 if (rc) { 4345 dev_err(&pdev->dev, "pci_request_selected_regions failed %d\n", 4346 rc); 4347 goto err_free_ena_dev; 4348 } 4349 4350 ena_dev->reg_bar = devm_ioremap(&pdev->dev, 4351 pci_resource_start(pdev, ENA_REG_BAR), 4352 pci_resource_len(pdev, ENA_REG_BAR)); 4353 if (!ena_dev->reg_bar) { 4354 dev_err(&pdev->dev, "Failed to remap regs bar\n"); 4355 rc = -EFAULT; 4356 goto err_free_region; 4357 } 4358 4359 ena_dev->ena_min_poll_delay_us = ENA_ADMIN_POLL_DELAY_US; 4360 4361 ena_dev->dmadev = &pdev->dev; 4362 4363 netdev = alloc_etherdev_mq(sizeof(struct ena_adapter), ENA_MAX_RINGS); 4364 if (!netdev) { 4365 dev_err(&pdev->dev, "alloc_etherdev_mq failed\n"); 4366 rc = -ENOMEM; 4367 goto err_free_region; 4368 } 4369 4370 SET_NETDEV_DEV(netdev, &pdev->dev); 4371 adapter = netdev_priv(netdev); 4372 adapter->ena_dev = ena_dev; 4373 adapter->netdev = netdev; 4374 adapter->pdev = pdev; 4375 adapter->msg_enable = DEFAULT_MSG_ENABLE; 4376 4377 ena_dev->net_device = netdev; 4378 4379 pci_set_drvdata(pdev, adapter); 4380 4381 rc = ena_map_llq_mem_bar(pdev, ena_dev, bars); 4382 if (rc) { 4383 dev_err(&pdev->dev, "ENA LLQ bar mapping failed\n"); 4384 goto err_netdev_destroy; 4385 } 4386 4387 rc = ena_device_init(adapter, pdev, &get_feat_ctx, &wd_state); 4388 if (rc) { 4389 dev_err(&pdev->dev, "ENA device init failed\n"); 4390 if (rc == -ETIME) 4391 rc = -EPROBE_DEFER; 4392 goto err_netdev_destroy; 4393 } 4394 4395 /* Initial TX and RX interrupt delay. Assumes 1 usec granularity. 4396 * Updated during device initialization with the real granularity 4397 */ 4398 ena_dev->intr_moder_tx_interval = ENA_INTR_INITIAL_TX_INTERVAL_USECS; 4399 ena_dev->intr_moder_rx_interval = ENA_INTR_INITIAL_RX_INTERVAL_USECS; 4400 ena_dev->intr_delay_resolution = ENA_DEFAULT_INTR_DELAY_RESOLUTION; 4401 max_num_io_queues = ena_calc_max_io_queue_num(pdev, ena_dev, &get_feat_ctx); 4402 if (unlikely(!max_num_io_queues)) { 4403 rc = -EFAULT; 4404 goto err_device_destroy; 4405 } 4406 4407 ena_set_conf_feat_params(adapter, &get_feat_ctx); 4408 4409 adapter->reset_reason = ENA_REGS_RESET_NORMAL; 4410 4411 adapter->num_io_queues = max_num_io_queues; 4412 adapter->max_num_io_queues = max_num_io_queues; 4413 adapter->last_monitored_tx_qid = 0; 4414 4415 adapter->xdp_first_ring = 0; 4416 adapter->xdp_num_queues = 0; 4417 4418 adapter->rx_copybreak = ENA_DEFAULT_RX_COPYBREAK; 4419 if (ena_dev->tx_mem_queue_type == ENA_ADMIN_PLACEMENT_POLICY_DEV) 4420 adapter->disable_meta_caching = 4421 !!(get_feat_ctx.llq.accel_mode.u.get.supported_flags & 4422 BIT(ENA_ADMIN_DISABLE_META_CACHING)); 4423 4424 adapter->wd_state = wd_state; 4425 4426 snprintf(adapter->name, ENA_NAME_MAX_LEN, "ena_%d", adapters_found); 4427 4428 rc = ena_com_init_interrupt_moderation(adapter->ena_dev); 4429 if (rc) { 4430 dev_err(&pdev->dev, 4431 "Failed to query interrupt moderation feature\n"); 4432 goto err_device_destroy; 4433 } 4434 4435 ena_init_io_rings(adapter, 4436 0, 4437 adapter->xdp_num_queues + 4438 adapter->num_io_queues); 4439 4440 netdev->netdev_ops = &ena_netdev_ops; 4441 netdev->watchdog_timeo = TX_TIMEOUT; 4442 ena_set_ethtool_ops(netdev); 4443 4444 netdev->priv_flags |= IFF_UNICAST_FLT; 4445 4446 u64_stats_init(&adapter->syncp); 4447 4448 rc = ena_enable_msix_and_set_admin_interrupts(adapter); 4449 if (rc) { 4450 dev_err(&pdev->dev, 4451 "Failed to enable and set the admin interrupts\n"); 4452 goto err_worker_destroy; 4453 } 4454 rc = ena_rss_init_default(adapter); 4455 if (rc && (rc != -EOPNOTSUPP)) { 4456 dev_err(&pdev->dev, "Cannot init RSS rc: %d\n", rc); 4457 goto err_free_msix; 4458 } 4459 4460 ena_config_debug_area(adapter); 4461 4462 if (ena_xdp_legal_queue_count(adapter, adapter->num_io_queues)) 4463 netdev->xdp_features = NETDEV_XDP_ACT_BASIC | 4464 NETDEV_XDP_ACT_REDIRECT; 4465 4466 memcpy(adapter->netdev->perm_addr, adapter->mac_addr, netdev->addr_len); 4467 4468 netif_carrier_off(netdev); 4469 4470 rc = register_netdev(netdev); 4471 if (rc) { 4472 dev_err(&pdev->dev, "Cannot register net device\n"); 4473 goto err_rss; 4474 } 4475 4476 INIT_WORK(&adapter->reset_task, ena_fw_reset_device); 4477 4478 adapter->last_keep_alive_jiffies = jiffies; 4479 adapter->keep_alive_timeout = ENA_DEVICE_KALIVE_TIMEOUT; 4480 adapter->missing_tx_completion_to = TX_TIMEOUT; 4481 adapter->missing_tx_completion_threshold = MAX_NUM_OF_TIMEOUTED_PACKETS; 4482 4483 ena_update_hints(adapter, &get_feat_ctx.hw_hints); 4484 4485 timer_setup(&adapter->timer_service, ena_timer_service, 0); 4486 mod_timer(&adapter->timer_service, round_jiffies(jiffies + HZ)); 4487 4488 dev_info(&pdev->dev, 4489 "%s found at mem %lx, mac addr %pM\n", 4490 DEVICE_NAME, (long)pci_resource_start(pdev, 0), 4491 netdev->dev_addr); 4492 4493 set_bit(ENA_FLAG_DEVICE_RUNNING, &adapter->flags); 4494 4495 adapters_found++; 4496 4497 return 0; 4498 4499 err_rss: 4500 ena_com_delete_debug_area(ena_dev); 4501 ena_com_rss_destroy(ena_dev); 4502 err_free_msix: 4503 ena_com_dev_reset(ena_dev, ENA_REGS_RESET_INIT_ERR); 4504 /* stop submitting admin commands on a device that was reset */ 4505 ena_com_set_admin_running_state(ena_dev, false); 4506 ena_free_mgmnt_irq(adapter); 4507 ena_disable_msix(adapter); 4508 err_worker_destroy: 4509 del_timer(&adapter->timer_service); 4510 err_device_destroy: 4511 ena_com_delete_host_info(ena_dev); 4512 ena_com_admin_destroy(ena_dev); 4513 err_netdev_destroy: 4514 free_netdev(netdev); 4515 err_free_region: 4516 ena_release_bars(ena_dev, pdev); 4517 err_free_ena_dev: 4518 vfree(ena_dev); 4519 err_disable_device: 4520 pci_disable_device(pdev); 4521 return rc; 4522 } 4523 4524 /*****************************************************************************/ 4525 4526 /* __ena_shutoff - Helper used in both PCI remove/shutdown routines 4527 * @pdev: PCI device information struct 4528 * @shutdown: Is it a shutdown operation? If false, means it is a removal 4529 * 4530 * __ena_shutoff is a helper routine that does the real work on shutdown and 4531 * removal paths; the difference between those paths is with regards to whether 4532 * dettach or unregister the netdevice. 4533 */ 4534 static void __ena_shutoff(struct pci_dev *pdev, bool shutdown) 4535 { 4536 struct ena_adapter *adapter = pci_get_drvdata(pdev); 4537 struct ena_com_dev *ena_dev; 4538 struct net_device *netdev; 4539 4540 ena_dev = adapter->ena_dev; 4541 netdev = adapter->netdev; 4542 4543 #ifdef CONFIG_RFS_ACCEL 4544 if ((adapter->msix_vecs >= 1) && (netdev->rx_cpu_rmap)) { 4545 free_irq_cpu_rmap(netdev->rx_cpu_rmap); 4546 netdev->rx_cpu_rmap = NULL; 4547 } 4548 #endif /* CONFIG_RFS_ACCEL */ 4549 4550 /* Make sure timer and reset routine won't be called after 4551 * freeing device resources. 4552 */ 4553 del_timer_sync(&adapter->timer_service); 4554 cancel_work_sync(&adapter->reset_task); 4555 4556 rtnl_lock(); /* lock released inside the below if-else block */ 4557 adapter->reset_reason = ENA_REGS_RESET_SHUTDOWN; 4558 ena_destroy_device(adapter, true); 4559 4560 if (shutdown) { 4561 netif_device_detach(netdev); 4562 dev_close(netdev); 4563 rtnl_unlock(); 4564 } else { 4565 rtnl_unlock(); 4566 unregister_netdev(netdev); 4567 free_netdev(netdev); 4568 } 4569 4570 ena_com_rss_destroy(ena_dev); 4571 4572 ena_com_delete_debug_area(ena_dev); 4573 4574 ena_com_delete_host_info(ena_dev); 4575 4576 ena_release_bars(ena_dev, pdev); 4577 4578 pci_disable_device(pdev); 4579 4580 vfree(ena_dev); 4581 } 4582 4583 /* ena_remove - Device Removal Routine 4584 * @pdev: PCI device information struct 4585 * 4586 * ena_remove is called by the PCI subsystem to alert the driver 4587 * that it should release a PCI device. 4588 */ 4589 4590 static void ena_remove(struct pci_dev *pdev) 4591 { 4592 __ena_shutoff(pdev, false); 4593 } 4594 4595 /* ena_shutdown - Device Shutdown Routine 4596 * @pdev: PCI device information struct 4597 * 4598 * ena_shutdown is called by the PCI subsystem to alert the driver that 4599 * a shutdown/reboot (or kexec) is happening and device must be disabled. 4600 */ 4601 4602 static void ena_shutdown(struct pci_dev *pdev) 4603 { 4604 __ena_shutoff(pdev, true); 4605 } 4606 4607 /* ena_suspend - PM suspend callback 4608 * @dev_d: Device information struct 4609 */ 4610 static int __maybe_unused ena_suspend(struct device *dev_d) 4611 { 4612 struct pci_dev *pdev = to_pci_dev(dev_d); 4613 struct ena_adapter *adapter = pci_get_drvdata(pdev); 4614 4615 ena_increase_stat(&adapter->dev_stats.suspend, 1, &adapter->syncp); 4616 4617 rtnl_lock(); 4618 if (unlikely(test_bit(ENA_FLAG_TRIGGER_RESET, &adapter->flags))) { 4619 dev_err(&pdev->dev, 4620 "Ignoring device reset request as the device is being suspended\n"); 4621 clear_bit(ENA_FLAG_TRIGGER_RESET, &adapter->flags); 4622 } 4623 ena_destroy_device(adapter, true); 4624 rtnl_unlock(); 4625 return 0; 4626 } 4627 4628 /* ena_resume - PM resume callback 4629 * @dev_d: Device information struct 4630 */ 4631 static int __maybe_unused ena_resume(struct device *dev_d) 4632 { 4633 struct ena_adapter *adapter = dev_get_drvdata(dev_d); 4634 int rc; 4635 4636 ena_increase_stat(&adapter->dev_stats.resume, 1, &adapter->syncp); 4637 4638 rtnl_lock(); 4639 rc = ena_restore_device(adapter); 4640 rtnl_unlock(); 4641 return rc; 4642 } 4643 4644 static SIMPLE_DEV_PM_OPS(ena_pm_ops, ena_suspend, ena_resume); 4645 4646 static struct pci_driver ena_pci_driver = { 4647 .name = DRV_MODULE_NAME, 4648 .id_table = ena_pci_tbl, 4649 .probe = ena_probe, 4650 .remove = ena_remove, 4651 .shutdown = ena_shutdown, 4652 .driver.pm = &ena_pm_ops, 4653 .sriov_configure = pci_sriov_configure_simple, 4654 }; 4655 4656 static int __init ena_init(void) 4657 { 4658 int ret; 4659 4660 ena_wq = create_singlethread_workqueue(DRV_MODULE_NAME); 4661 if (!ena_wq) { 4662 pr_err("Failed to create workqueue\n"); 4663 return -ENOMEM; 4664 } 4665 4666 ret = pci_register_driver(&ena_pci_driver); 4667 if (ret) 4668 destroy_workqueue(ena_wq); 4669 4670 return ret; 4671 } 4672 4673 static void __exit ena_cleanup(void) 4674 { 4675 pci_unregister_driver(&ena_pci_driver); 4676 4677 if (ena_wq) { 4678 destroy_workqueue(ena_wq); 4679 ena_wq = NULL; 4680 } 4681 } 4682 4683 /****************************************************************************** 4684 ******************************** AENQ Handlers ******************************* 4685 *****************************************************************************/ 4686 /* ena_update_on_link_change: 4687 * Notify the network interface about the change in link status 4688 */ 4689 static void ena_update_on_link_change(void *adapter_data, 4690 struct ena_admin_aenq_entry *aenq_e) 4691 { 4692 struct ena_adapter *adapter = (struct ena_adapter *)adapter_data; 4693 struct ena_admin_aenq_link_change_desc *aenq_desc = 4694 (struct ena_admin_aenq_link_change_desc *)aenq_e; 4695 int status = aenq_desc->flags & 4696 ENA_ADMIN_AENQ_LINK_CHANGE_DESC_LINK_STATUS_MASK; 4697 4698 if (status) { 4699 netif_dbg(adapter, ifup, adapter->netdev, "%s\n", __func__); 4700 set_bit(ENA_FLAG_LINK_UP, &adapter->flags); 4701 if (!test_bit(ENA_FLAG_ONGOING_RESET, &adapter->flags)) 4702 netif_carrier_on(adapter->netdev); 4703 } else { 4704 clear_bit(ENA_FLAG_LINK_UP, &adapter->flags); 4705 netif_carrier_off(adapter->netdev); 4706 } 4707 } 4708 4709 static void ena_keep_alive_wd(void *adapter_data, 4710 struct ena_admin_aenq_entry *aenq_e) 4711 { 4712 struct ena_adapter *adapter = (struct ena_adapter *)adapter_data; 4713 struct ena_admin_aenq_keep_alive_desc *desc; 4714 u64 rx_drops; 4715 u64 tx_drops; 4716 4717 desc = (struct ena_admin_aenq_keep_alive_desc *)aenq_e; 4718 adapter->last_keep_alive_jiffies = jiffies; 4719 4720 rx_drops = ((u64)desc->rx_drops_high << 32) | desc->rx_drops_low; 4721 tx_drops = ((u64)desc->tx_drops_high << 32) | desc->tx_drops_low; 4722 4723 u64_stats_update_begin(&adapter->syncp); 4724 /* These stats are accumulated by the device, so the counters indicate 4725 * all drops since last reset. 4726 */ 4727 adapter->dev_stats.rx_drops = rx_drops; 4728 adapter->dev_stats.tx_drops = tx_drops; 4729 u64_stats_update_end(&adapter->syncp); 4730 } 4731 4732 static void ena_notification(void *adapter_data, 4733 struct ena_admin_aenq_entry *aenq_e) 4734 { 4735 struct ena_adapter *adapter = (struct ena_adapter *)adapter_data; 4736 struct ena_admin_ena_hw_hints *hints; 4737 4738 WARN(aenq_e->aenq_common_desc.group != ENA_ADMIN_NOTIFICATION, 4739 "Invalid group(%x) expected %x\n", 4740 aenq_e->aenq_common_desc.group, 4741 ENA_ADMIN_NOTIFICATION); 4742 4743 switch (aenq_e->aenq_common_desc.syndrome) { 4744 case ENA_ADMIN_UPDATE_HINTS: 4745 hints = (struct ena_admin_ena_hw_hints *) 4746 (&aenq_e->inline_data_w4); 4747 ena_update_hints(adapter, hints); 4748 break; 4749 default: 4750 netif_err(adapter, drv, adapter->netdev, 4751 "Invalid aenq notification link state %d\n", 4752 aenq_e->aenq_common_desc.syndrome); 4753 } 4754 } 4755 4756 /* This handler will called for unknown event group or unimplemented handlers*/ 4757 static void unimplemented_aenq_handler(void *data, 4758 struct ena_admin_aenq_entry *aenq_e) 4759 { 4760 struct ena_adapter *adapter = (struct ena_adapter *)data; 4761 4762 netif_err(adapter, drv, adapter->netdev, 4763 "Unknown event was received or event with unimplemented handler\n"); 4764 } 4765 4766 static struct ena_aenq_handlers aenq_handlers = { 4767 .handlers = { 4768 [ENA_ADMIN_LINK_CHANGE] = ena_update_on_link_change, 4769 [ENA_ADMIN_NOTIFICATION] = ena_notification, 4770 [ENA_ADMIN_KEEP_ALIVE] = ena_keep_alive_wd, 4771 }, 4772 .unimplemented_handler = unimplemented_aenq_handler 4773 }; 4774 4775 module_init(ena_init); 4776 module_exit(ena_cleanup); 4777