1 /* 2 * Copyright 2015 Amazon.com, Inc. or its affiliates. 3 * 4 * This software is available to you under a choice of one of two 5 * licenses. You may choose to be licensed under the terms of the GNU 6 * General Public License (GPL) Version 2, available from the file 7 * COPYING in the main directory of this source tree, or the 8 * BSD license below: 9 * 10 * Redistribution and use in source and binary forms, with or 11 * without modification, are permitted provided that the following 12 * conditions are met: 13 * 14 * - Redistributions of source code must retain the above 15 * copyright notice, this list of conditions and the following 16 * disclaimer. 17 * 18 * - Redistributions in binary form must reproduce the above 19 * copyright notice, this list of conditions and the following 20 * disclaimer in the documentation and/or other materials 21 * provided with the distribution. 22 * 23 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, 24 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF 25 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND 26 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS 27 * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN 28 * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN 29 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE 30 * SOFTWARE. 31 */ 32 33 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt 34 35 #ifdef CONFIG_RFS_ACCEL 36 #include <linux/cpu_rmap.h> 37 #endif /* CONFIG_RFS_ACCEL */ 38 #include <linux/ethtool.h> 39 #include <linux/kernel.h> 40 #include <linux/module.h> 41 #include <linux/numa.h> 42 #include <linux/pci.h> 43 #include <linux/utsname.h> 44 #include <linux/version.h> 45 #include <linux/vmalloc.h> 46 #include <net/ip.h> 47 48 #include "ena_netdev.h" 49 #include <linux/bpf_trace.h> 50 #include "ena_pci_id_tbl.h" 51 52 MODULE_AUTHOR("Amazon.com, Inc. or its affiliates"); 53 MODULE_DESCRIPTION(DEVICE_NAME); 54 MODULE_LICENSE("GPL"); 55 56 /* Time in jiffies before concluding the transmitter is hung. */ 57 #define TX_TIMEOUT (5 * HZ) 58 59 #define ENA_NAPI_BUDGET 64 60 61 #define DEFAULT_MSG_ENABLE (NETIF_MSG_DRV | NETIF_MSG_PROBE | NETIF_MSG_IFUP | \ 62 NETIF_MSG_TX_DONE | NETIF_MSG_TX_ERR | NETIF_MSG_RX_ERR) 63 static int debug = -1; 64 module_param(debug, int, 0); 65 MODULE_PARM_DESC(debug, "Debug level (0=none,...,16=all)"); 66 67 static struct ena_aenq_handlers aenq_handlers; 68 69 static struct workqueue_struct *ena_wq; 70 71 MODULE_DEVICE_TABLE(pci, ena_pci_tbl); 72 73 static int ena_rss_init_default(struct ena_adapter *adapter); 74 static void check_for_admin_com_state(struct ena_adapter *adapter); 75 static void ena_destroy_device(struct ena_adapter *adapter, bool graceful); 76 static int ena_restore_device(struct ena_adapter *adapter); 77 78 static void ena_init_io_rings(struct ena_adapter *adapter, 79 int first_index, int count); 80 static void ena_init_napi_in_range(struct ena_adapter *adapter, int first_index, 81 int count); 82 static void ena_del_napi_in_range(struct ena_adapter *adapter, int first_index, 83 int count); 84 static int ena_setup_tx_resources(struct ena_adapter *adapter, int qid); 85 static int ena_setup_tx_resources_in_range(struct ena_adapter *adapter, 86 int first_index, 87 int count); 88 static int ena_create_io_tx_queue(struct ena_adapter *adapter, int qid); 89 static void ena_free_tx_resources(struct ena_adapter *adapter, int qid); 90 static int ena_clean_xdp_irq(struct ena_ring *xdp_ring, u32 budget); 91 static void ena_destroy_all_tx_queues(struct ena_adapter *adapter); 92 static void ena_free_all_io_tx_resources(struct ena_adapter *adapter); 93 static void ena_napi_disable_in_range(struct ena_adapter *adapter, 94 int first_index, int count); 95 static void ena_napi_enable_in_range(struct ena_adapter *adapter, 96 int first_index, int count); 97 static int ena_up(struct ena_adapter *adapter); 98 static void ena_down(struct ena_adapter *adapter); 99 static void ena_unmask_interrupt(struct ena_ring *tx_ring, 100 struct ena_ring *rx_ring); 101 static void ena_update_ring_numa_node(struct ena_ring *tx_ring, 102 struct ena_ring *rx_ring); 103 static void ena_unmap_tx_buff(struct ena_ring *tx_ring, 104 struct ena_tx_buffer *tx_info); 105 static int ena_create_io_tx_queues_in_range(struct ena_adapter *adapter, 106 int first_index, int count); 107 108 static void ena_tx_timeout(struct net_device *dev, unsigned int txqueue) 109 { 110 struct ena_adapter *adapter = netdev_priv(dev); 111 112 /* Change the state of the device to trigger reset 113 * Check that we are not in the middle or a trigger already 114 */ 115 116 if (test_and_set_bit(ENA_FLAG_TRIGGER_RESET, &adapter->flags)) 117 return; 118 119 adapter->reset_reason = ENA_REGS_RESET_OS_NETDEV_WD; 120 u64_stats_update_begin(&adapter->syncp); 121 adapter->dev_stats.tx_timeout++; 122 u64_stats_update_end(&adapter->syncp); 123 124 netif_err(adapter, tx_err, dev, "Transmit time out\n"); 125 } 126 127 static void update_rx_ring_mtu(struct ena_adapter *adapter, int mtu) 128 { 129 int i; 130 131 for (i = 0; i < adapter->num_io_queues; i++) 132 adapter->rx_ring[i].mtu = mtu; 133 } 134 135 static int ena_change_mtu(struct net_device *dev, int new_mtu) 136 { 137 struct ena_adapter *adapter = netdev_priv(dev); 138 int ret; 139 140 ret = ena_com_set_dev_mtu(adapter->ena_dev, new_mtu); 141 if (!ret) { 142 netif_dbg(adapter, drv, dev, "set MTU to %d\n", new_mtu); 143 update_rx_ring_mtu(adapter, new_mtu); 144 dev->mtu = new_mtu; 145 } else { 146 netif_err(adapter, drv, dev, "Failed to set MTU to %d\n", 147 new_mtu); 148 } 149 150 return ret; 151 } 152 153 static int ena_xmit_common(struct net_device *dev, 154 struct ena_ring *ring, 155 struct ena_tx_buffer *tx_info, 156 struct ena_com_tx_ctx *ena_tx_ctx, 157 u16 next_to_use, 158 u32 bytes) 159 { 160 struct ena_adapter *adapter = netdev_priv(dev); 161 int rc, nb_hw_desc; 162 163 if (unlikely(ena_com_is_doorbell_needed(ring->ena_com_io_sq, 164 ena_tx_ctx))) { 165 netif_dbg(adapter, tx_queued, dev, 166 "llq tx max burst size of queue %d achieved, writing doorbell to send burst\n", 167 ring->qid); 168 ena_com_write_sq_doorbell(ring->ena_com_io_sq); 169 } 170 171 /* prepare the packet's descriptors to dma engine */ 172 rc = ena_com_prepare_tx(ring->ena_com_io_sq, ena_tx_ctx, 173 &nb_hw_desc); 174 175 /* In case there isn't enough space in the queue for the packet, 176 * we simply drop it. All other failure reasons of 177 * ena_com_prepare_tx() are fatal and therefore require a device reset. 178 */ 179 if (unlikely(rc)) { 180 netif_err(adapter, tx_queued, dev, 181 "failed to prepare tx bufs\n"); 182 u64_stats_update_begin(&ring->syncp); 183 ring->tx_stats.prepare_ctx_err++; 184 u64_stats_update_end(&ring->syncp); 185 if (rc != -ENOMEM) { 186 adapter->reset_reason = 187 ENA_REGS_RESET_DRIVER_INVALID_STATE; 188 set_bit(ENA_FLAG_TRIGGER_RESET, &adapter->flags); 189 } 190 return rc; 191 } 192 193 u64_stats_update_begin(&ring->syncp); 194 ring->tx_stats.cnt++; 195 ring->tx_stats.bytes += bytes; 196 u64_stats_update_end(&ring->syncp); 197 198 tx_info->tx_descs = nb_hw_desc; 199 tx_info->last_jiffies = jiffies; 200 tx_info->print_once = 0; 201 202 ring->next_to_use = ENA_TX_RING_IDX_NEXT(next_to_use, 203 ring->ring_size); 204 return 0; 205 } 206 207 /* This is the XDP napi callback. XDP queues use a separate napi callback 208 * than Rx/Tx queues. 209 */ 210 static int ena_xdp_io_poll(struct napi_struct *napi, int budget) 211 { 212 struct ena_napi *ena_napi = container_of(napi, struct ena_napi, napi); 213 u32 xdp_work_done, xdp_budget; 214 struct ena_ring *xdp_ring; 215 int napi_comp_call = 0; 216 int ret; 217 218 xdp_ring = ena_napi->xdp_ring; 219 xdp_ring->first_interrupt = ena_napi->first_interrupt; 220 221 xdp_budget = budget; 222 223 if (!test_bit(ENA_FLAG_DEV_UP, &xdp_ring->adapter->flags) || 224 test_bit(ENA_FLAG_TRIGGER_RESET, &xdp_ring->adapter->flags)) { 225 napi_complete_done(napi, 0); 226 return 0; 227 } 228 229 xdp_work_done = ena_clean_xdp_irq(xdp_ring, xdp_budget); 230 231 /* If the device is about to reset or down, avoid unmask 232 * the interrupt and return 0 so NAPI won't reschedule 233 */ 234 if (unlikely(!test_bit(ENA_FLAG_DEV_UP, &xdp_ring->adapter->flags))) { 235 napi_complete_done(napi, 0); 236 ret = 0; 237 } else if (xdp_budget > xdp_work_done) { 238 napi_comp_call = 1; 239 if (napi_complete_done(napi, xdp_work_done)) 240 ena_unmask_interrupt(xdp_ring, NULL); 241 ena_update_ring_numa_node(xdp_ring, NULL); 242 ret = xdp_work_done; 243 } else { 244 ret = xdp_budget; 245 } 246 247 u64_stats_update_begin(&xdp_ring->syncp); 248 xdp_ring->tx_stats.napi_comp += napi_comp_call; 249 xdp_ring->tx_stats.tx_poll++; 250 u64_stats_update_end(&xdp_ring->syncp); 251 252 return ret; 253 } 254 255 static int ena_xdp_tx_map_buff(struct ena_ring *xdp_ring, 256 struct ena_tx_buffer *tx_info, 257 struct xdp_buff *xdp, 258 void **push_hdr, 259 u32 *push_len) 260 { 261 struct ena_adapter *adapter = xdp_ring->adapter; 262 struct ena_com_buf *ena_buf; 263 dma_addr_t dma = 0; 264 u32 size; 265 266 tx_info->xdpf = convert_to_xdp_frame(xdp); 267 size = tx_info->xdpf->len; 268 ena_buf = tx_info->bufs; 269 270 /* llq push buffer */ 271 *push_len = min_t(u32, size, xdp_ring->tx_max_header_size); 272 *push_hdr = tx_info->xdpf->data; 273 274 if (size - *push_len > 0) { 275 dma = dma_map_single(xdp_ring->dev, 276 *push_hdr + *push_len, 277 size - *push_len, 278 DMA_TO_DEVICE); 279 if (unlikely(dma_mapping_error(xdp_ring->dev, dma))) 280 goto error_report_dma_error; 281 282 tx_info->map_linear_data = 1; 283 tx_info->num_of_bufs = 1; 284 } 285 286 ena_buf->paddr = dma; 287 ena_buf->len = size; 288 289 return 0; 290 291 error_report_dma_error: 292 u64_stats_update_begin(&xdp_ring->syncp); 293 xdp_ring->tx_stats.dma_mapping_err++; 294 u64_stats_update_end(&xdp_ring->syncp); 295 netdev_warn(adapter->netdev, "failed to map xdp buff\n"); 296 297 xdp_return_frame_rx_napi(tx_info->xdpf); 298 tx_info->xdpf = NULL; 299 tx_info->num_of_bufs = 0; 300 301 return -EINVAL; 302 } 303 304 static int ena_xdp_xmit_buff(struct net_device *dev, 305 struct xdp_buff *xdp, 306 int qid, 307 struct ena_rx_buffer *rx_info) 308 { 309 struct ena_adapter *adapter = netdev_priv(dev); 310 struct ena_com_tx_ctx ena_tx_ctx = {0}; 311 struct ena_tx_buffer *tx_info; 312 struct ena_ring *xdp_ring; 313 u16 next_to_use, req_id; 314 int rc; 315 void *push_hdr; 316 u32 push_len; 317 318 xdp_ring = &adapter->tx_ring[qid]; 319 next_to_use = xdp_ring->next_to_use; 320 req_id = xdp_ring->free_ids[next_to_use]; 321 tx_info = &xdp_ring->tx_buffer_info[req_id]; 322 tx_info->num_of_bufs = 0; 323 page_ref_inc(rx_info->page); 324 tx_info->xdp_rx_page = rx_info->page; 325 326 rc = ena_xdp_tx_map_buff(xdp_ring, tx_info, xdp, &push_hdr, &push_len); 327 if (unlikely(rc)) 328 goto error_drop_packet; 329 330 ena_tx_ctx.ena_bufs = tx_info->bufs; 331 ena_tx_ctx.push_header = push_hdr; 332 ena_tx_ctx.num_bufs = tx_info->num_of_bufs; 333 ena_tx_ctx.req_id = req_id; 334 ena_tx_ctx.header_len = push_len; 335 336 rc = ena_xmit_common(dev, 337 xdp_ring, 338 tx_info, 339 &ena_tx_ctx, 340 next_to_use, 341 xdp->data_end - xdp->data); 342 if (rc) 343 goto error_unmap_dma; 344 /* trigger the dma engine. ena_com_write_sq_doorbell() 345 * has a mb 346 */ 347 ena_com_write_sq_doorbell(xdp_ring->ena_com_io_sq); 348 u64_stats_update_begin(&xdp_ring->syncp); 349 xdp_ring->tx_stats.doorbells++; 350 u64_stats_update_end(&xdp_ring->syncp); 351 352 return NETDEV_TX_OK; 353 354 error_unmap_dma: 355 ena_unmap_tx_buff(xdp_ring, tx_info); 356 tx_info->xdpf = NULL; 357 error_drop_packet: 358 359 return NETDEV_TX_OK; 360 } 361 362 static int ena_xdp_execute(struct ena_ring *rx_ring, 363 struct xdp_buff *xdp, 364 struct ena_rx_buffer *rx_info) 365 { 366 struct bpf_prog *xdp_prog; 367 u32 verdict = XDP_PASS; 368 369 rcu_read_lock(); 370 xdp_prog = READ_ONCE(rx_ring->xdp_bpf_prog); 371 372 if (!xdp_prog) 373 goto out; 374 375 verdict = bpf_prog_run_xdp(xdp_prog, xdp); 376 377 if (verdict == XDP_TX) 378 ena_xdp_xmit_buff(rx_ring->netdev, 379 xdp, 380 rx_ring->qid + rx_ring->adapter->num_io_queues, 381 rx_info); 382 else if (unlikely(verdict == XDP_ABORTED)) 383 trace_xdp_exception(rx_ring->netdev, xdp_prog, verdict); 384 else if (unlikely(verdict > XDP_TX)) 385 bpf_warn_invalid_xdp_action(verdict); 386 out: 387 rcu_read_unlock(); 388 return verdict; 389 } 390 391 static void ena_init_all_xdp_queues(struct ena_adapter *adapter) 392 { 393 adapter->xdp_first_ring = adapter->num_io_queues; 394 adapter->xdp_num_queues = adapter->num_io_queues; 395 396 ena_init_io_rings(adapter, 397 adapter->xdp_first_ring, 398 adapter->xdp_num_queues); 399 } 400 401 static int ena_setup_and_create_all_xdp_queues(struct ena_adapter *adapter) 402 { 403 int rc = 0; 404 405 rc = ena_setup_tx_resources_in_range(adapter, adapter->xdp_first_ring, 406 adapter->xdp_num_queues); 407 if (rc) 408 goto setup_err; 409 410 rc = ena_create_io_tx_queues_in_range(adapter, 411 adapter->xdp_first_ring, 412 adapter->xdp_num_queues); 413 if (rc) 414 goto create_err; 415 416 return 0; 417 418 create_err: 419 ena_free_all_io_tx_resources(adapter); 420 setup_err: 421 return rc; 422 } 423 424 /* Provides a way for both kernel and bpf-prog to know 425 * more about the RX-queue a given XDP frame arrived on. 426 */ 427 static int ena_xdp_register_rxq_info(struct ena_ring *rx_ring) 428 { 429 int rc; 430 431 rc = xdp_rxq_info_reg(&rx_ring->xdp_rxq, rx_ring->netdev, rx_ring->qid); 432 433 if (rc) { 434 netif_err(rx_ring->adapter, ifup, rx_ring->netdev, 435 "Failed to register xdp rx queue info. RX queue num %d rc: %d\n", 436 rx_ring->qid, rc); 437 goto err; 438 } 439 440 rc = xdp_rxq_info_reg_mem_model(&rx_ring->xdp_rxq, MEM_TYPE_PAGE_SHARED, 441 NULL); 442 443 if (rc) { 444 netif_err(rx_ring->adapter, ifup, rx_ring->netdev, 445 "Failed to register xdp rx queue info memory model. RX queue num %d rc: %d\n", 446 rx_ring->qid, rc); 447 xdp_rxq_info_unreg(&rx_ring->xdp_rxq); 448 } 449 450 err: 451 return rc; 452 } 453 454 static void ena_xdp_unregister_rxq_info(struct ena_ring *rx_ring) 455 { 456 xdp_rxq_info_unreg_mem_model(&rx_ring->xdp_rxq); 457 xdp_rxq_info_unreg(&rx_ring->xdp_rxq); 458 } 459 460 static void ena_xdp_exchange_program_rx_in_range(struct ena_adapter *adapter, 461 struct bpf_prog *prog, 462 int first, int count) 463 { 464 struct ena_ring *rx_ring; 465 int i = 0; 466 467 for (i = first; i < count; i++) { 468 rx_ring = &adapter->rx_ring[i]; 469 xchg(&rx_ring->xdp_bpf_prog, prog); 470 if (prog) { 471 ena_xdp_register_rxq_info(rx_ring); 472 rx_ring->rx_headroom = XDP_PACKET_HEADROOM; 473 } else { 474 ena_xdp_unregister_rxq_info(rx_ring); 475 rx_ring->rx_headroom = 0; 476 } 477 } 478 } 479 480 static void ena_xdp_exchange_program(struct ena_adapter *adapter, 481 struct bpf_prog *prog) 482 { 483 struct bpf_prog *old_bpf_prog = xchg(&adapter->xdp_bpf_prog, prog); 484 485 ena_xdp_exchange_program_rx_in_range(adapter, 486 prog, 487 0, 488 adapter->num_io_queues); 489 490 if (old_bpf_prog) 491 bpf_prog_put(old_bpf_prog); 492 } 493 494 static int ena_destroy_and_free_all_xdp_queues(struct ena_adapter *adapter) 495 { 496 bool was_up; 497 int rc; 498 499 was_up = test_bit(ENA_FLAG_DEV_UP, &adapter->flags); 500 501 if (was_up) 502 ena_down(adapter); 503 504 adapter->xdp_first_ring = 0; 505 adapter->xdp_num_queues = 0; 506 ena_xdp_exchange_program(adapter, NULL); 507 if (was_up) { 508 rc = ena_up(adapter); 509 if (rc) 510 return rc; 511 } 512 return 0; 513 } 514 515 static int ena_xdp_set(struct net_device *netdev, struct netdev_bpf *bpf) 516 { 517 struct ena_adapter *adapter = netdev_priv(netdev); 518 struct bpf_prog *prog = bpf->prog; 519 struct bpf_prog *old_bpf_prog; 520 int rc, prev_mtu; 521 bool is_up; 522 523 is_up = test_bit(ENA_FLAG_DEV_UP, &adapter->flags); 524 rc = ena_xdp_allowed(adapter); 525 if (rc == ENA_XDP_ALLOWED) { 526 old_bpf_prog = adapter->xdp_bpf_prog; 527 if (prog) { 528 if (!is_up) { 529 ena_init_all_xdp_queues(adapter); 530 } else if (!old_bpf_prog) { 531 ena_down(adapter); 532 ena_init_all_xdp_queues(adapter); 533 } 534 ena_xdp_exchange_program(adapter, prog); 535 536 if (is_up && !old_bpf_prog) { 537 rc = ena_up(adapter); 538 if (rc) 539 return rc; 540 } 541 } else if (old_bpf_prog) { 542 rc = ena_destroy_and_free_all_xdp_queues(adapter); 543 if (rc) 544 return rc; 545 } 546 547 prev_mtu = netdev->max_mtu; 548 netdev->max_mtu = prog ? ENA_XDP_MAX_MTU : adapter->max_mtu; 549 550 if (!old_bpf_prog) 551 netif_info(adapter, drv, adapter->netdev, 552 "xdp program set, changing the max_mtu from %d to %d", 553 prev_mtu, netdev->max_mtu); 554 555 } else if (rc == ENA_XDP_CURRENT_MTU_TOO_LARGE) { 556 netif_err(adapter, drv, adapter->netdev, 557 "Failed to set xdp program, the current MTU (%d) is larger than the maximum allowed MTU (%lu) while xdp is on", 558 netdev->mtu, ENA_XDP_MAX_MTU); 559 NL_SET_ERR_MSG_MOD(bpf->extack, 560 "Failed to set xdp program, the current MTU is larger than the maximum allowed MTU. Check the dmesg for more info"); 561 return -EINVAL; 562 } else if (rc == ENA_XDP_NO_ENOUGH_QUEUES) { 563 netif_err(adapter, drv, adapter->netdev, 564 "Failed to set xdp program, the Rx/Tx channel count should be at most half of the maximum allowed channel count. The current queue count (%d), the maximal queue count (%d)\n", 565 adapter->num_io_queues, adapter->max_num_io_queues); 566 NL_SET_ERR_MSG_MOD(bpf->extack, 567 "Failed to set xdp program, there is no enough space for allocating XDP queues, Check the dmesg for more info"); 568 return -EINVAL; 569 } 570 571 return 0; 572 } 573 574 /* This is the main xdp callback, it's used by the kernel to set/unset the xdp 575 * program as well as to query the current xdp program id. 576 */ 577 static int ena_xdp(struct net_device *netdev, struct netdev_bpf *bpf) 578 { 579 struct ena_adapter *adapter = netdev_priv(netdev); 580 581 switch (bpf->command) { 582 case XDP_SETUP_PROG: 583 return ena_xdp_set(netdev, bpf); 584 case XDP_QUERY_PROG: 585 bpf->prog_id = adapter->xdp_bpf_prog ? 586 adapter->xdp_bpf_prog->aux->id : 0; 587 break; 588 default: 589 return -EINVAL; 590 } 591 return 0; 592 } 593 594 static int ena_init_rx_cpu_rmap(struct ena_adapter *adapter) 595 { 596 #ifdef CONFIG_RFS_ACCEL 597 u32 i; 598 int rc; 599 600 adapter->netdev->rx_cpu_rmap = alloc_irq_cpu_rmap(adapter->num_io_queues); 601 if (!adapter->netdev->rx_cpu_rmap) 602 return -ENOMEM; 603 for (i = 0; i < adapter->num_io_queues; i++) { 604 int irq_idx = ENA_IO_IRQ_IDX(i); 605 606 rc = irq_cpu_rmap_add(adapter->netdev->rx_cpu_rmap, 607 pci_irq_vector(adapter->pdev, irq_idx)); 608 if (rc) { 609 free_irq_cpu_rmap(adapter->netdev->rx_cpu_rmap); 610 adapter->netdev->rx_cpu_rmap = NULL; 611 return rc; 612 } 613 } 614 #endif /* CONFIG_RFS_ACCEL */ 615 return 0; 616 } 617 618 static void ena_init_io_rings_common(struct ena_adapter *adapter, 619 struct ena_ring *ring, u16 qid) 620 { 621 ring->qid = qid; 622 ring->pdev = adapter->pdev; 623 ring->dev = &adapter->pdev->dev; 624 ring->netdev = adapter->netdev; 625 ring->napi = &adapter->ena_napi[qid].napi; 626 ring->adapter = adapter; 627 ring->ena_dev = adapter->ena_dev; 628 ring->per_napi_packets = 0; 629 ring->cpu = 0; 630 ring->first_interrupt = false; 631 ring->no_interrupt_event_cnt = 0; 632 u64_stats_init(&ring->syncp); 633 } 634 635 static void ena_init_io_rings(struct ena_adapter *adapter, 636 int first_index, int count) 637 { 638 struct ena_com_dev *ena_dev; 639 struct ena_ring *txr, *rxr; 640 int i; 641 642 ena_dev = adapter->ena_dev; 643 644 for (i = first_index; i < first_index + count; i++) { 645 txr = &adapter->tx_ring[i]; 646 rxr = &adapter->rx_ring[i]; 647 648 /* TX common ring state */ 649 ena_init_io_rings_common(adapter, txr, i); 650 651 /* TX specific ring state */ 652 txr->ring_size = adapter->requested_tx_ring_size; 653 txr->tx_max_header_size = ena_dev->tx_max_header_size; 654 txr->tx_mem_queue_type = ena_dev->tx_mem_queue_type; 655 txr->sgl_size = adapter->max_tx_sgl_size; 656 txr->smoothed_interval = 657 ena_com_get_nonadaptive_moderation_interval_tx(ena_dev); 658 659 /* Don't init RX queues for xdp queues */ 660 if (!ENA_IS_XDP_INDEX(adapter, i)) { 661 /* RX common ring state */ 662 ena_init_io_rings_common(adapter, rxr, i); 663 664 /* RX specific ring state */ 665 rxr->ring_size = adapter->requested_rx_ring_size; 666 rxr->rx_copybreak = adapter->rx_copybreak; 667 rxr->sgl_size = adapter->max_rx_sgl_size; 668 rxr->smoothed_interval = 669 ena_com_get_nonadaptive_moderation_interval_rx(ena_dev); 670 rxr->empty_rx_queue = 0; 671 adapter->ena_napi[i].dim.mode = DIM_CQ_PERIOD_MODE_START_FROM_EQE; 672 } 673 } 674 } 675 676 /* ena_setup_tx_resources - allocate I/O Tx resources (Descriptors) 677 * @adapter: network interface device structure 678 * @qid: queue index 679 * 680 * Return 0 on success, negative on failure 681 */ 682 static int ena_setup_tx_resources(struct ena_adapter *adapter, int qid) 683 { 684 struct ena_ring *tx_ring = &adapter->tx_ring[qid]; 685 struct ena_irq *ena_irq = &adapter->irq_tbl[ENA_IO_IRQ_IDX(qid)]; 686 int size, i, node; 687 688 if (tx_ring->tx_buffer_info) { 689 netif_err(adapter, ifup, 690 adapter->netdev, "tx_buffer_info info is not NULL"); 691 return -EEXIST; 692 } 693 694 size = sizeof(struct ena_tx_buffer) * tx_ring->ring_size; 695 node = cpu_to_node(ena_irq->cpu); 696 697 tx_ring->tx_buffer_info = vzalloc_node(size, node); 698 if (!tx_ring->tx_buffer_info) { 699 tx_ring->tx_buffer_info = vzalloc(size); 700 if (!tx_ring->tx_buffer_info) 701 goto err_tx_buffer_info; 702 } 703 704 size = sizeof(u16) * tx_ring->ring_size; 705 tx_ring->free_ids = vzalloc_node(size, node); 706 if (!tx_ring->free_ids) { 707 tx_ring->free_ids = vzalloc(size); 708 if (!tx_ring->free_ids) 709 goto err_tx_free_ids; 710 } 711 712 size = tx_ring->tx_max_header_size; 713 tx_ring->push_buf_intermediate_buf = vzalloc_node(size, node); 714 if (!tx_ring->push_buf_intermediate_buf) { 715 tx_ring->push_buf_intermediate_buf = vzalloc(size); 716 if (!tx_ring->push_buf_intermediate_buf) 717 goto err_push_buf_intermediate_buf; 718 } 719 720 /* Req id ring for TX out of order completions */ 721 for (i = 0; i < tx_ring->ring_size; i++) 722 tx_ring->free_ids[i] = i; 723 724 /* Reset tx statistics */ 725 memset(&tx_ring->tx_stats, 0x0, sizeof(tx_ring->tx_stats)); 726 727 tx_ring->next_to_use = 0; 728 tx_ring->next_to_clean = 0; 729 tx_ring->cpu = ena_irq->cpu; 730 return 0; 731 732 err_push_buf_intermediate_buf: 733 vfree(tx_ring->free_ids); 734 tx_ring->free_ids = NULL; 735 err_tx_free_ids: 736 vfree(tx_ring->tx_buffer_info); 737 tx_ring->tx_buffer_info = NULL; 738 err_tx_buffer_info: 739 return -ENOMEM; 740 } 741 742 /* ena_free_tx_resources - Free I/O Tx Resources per Queue 743 * @adapter: network interface device structure 744 * @qid: queue index 745 * 746 * Free all transmit software resources 747 */ 748 static void ena_free_tx_resources(struct ena_adapter *adapter, int qid) 749 { 750 struct ena_ring *tx_ring = &adapter->tx_ring[qid]; 751 752 vfree(tx_ring->tx_buffer_info); 753 tx_ring->tx_buffer_info = NULL; 754 755 vfree(tx_ring->free_ids); 756 tx_ring->free_ids = NULL; 757 758 vfree(tx_ring->push_buf_intermediate_buf); 759 tx_ring->push_buf_intermediate_buf = NULL; 760 } 761 762 static int ena_setup_tx_resources_in_range(struct ena_adapter *adapter, 763 int first_index, 764 int count) 765 { 766 int i, rc = 0; 767 768 for (i = first_index; i < first_index + count; i++) { 769 rc = ena_setup_tx_resources(adapter, i); 770 if (rc) 771 goto err_setup_tx; 772 } 773 774 return 0; 775 776 err_setup_tx: 777 778 netif_err(adapter, ifup, adapter->netdev, 779 "Tx queue %d: allocation failed\n", i); 780 781 /* rewind the index freeing the rings as we go */ 782 while (first_index < i--) 783 ena_free_tx_resources(adapter, i); 784 return rc; 785 } 786 787 static void ena_free_all_io_tx_resources_in_range(struct ena_adapter *adapter, 788 int first_index, int count) 789 { 790 int i; 791 792 for (i = first_index; i < first_index + count; i++) 793 ena_free_tx_resources(adapter, i); 794 } 795 796 /* ena_free_all_io_tx_resources - Free I/O Tx Resources for All Queues 797 * @adapter: board private structure 798 * 799 * Free all transmit software resources 800 */ 801 static void ena_free_all_io_tx_resources(struct ena_adapter *adapter) 802 { 803 ena_free_all_io_tx_resources_in_range(adapter, 804 0, 805 adapter->xdp_num_queues + 806 adapter->num_io_queues); 807 } 808 809 static int validate_rx_req_id(struct ena_ring *rx_ring, u16 req_id) 810 { 811 if (likely(req_id < rx_ring->ring_size)) 812 return 0; 813 814 netif_err(rx_ring->adapter, rx_err, rx_ring->netdev, 815 "Invalid rx req_id: %hu\n", req_id); 816 817 u64_stats_update_begin(&rx_ring->syncp); 818 rx_ring->rx_stats.bad_req_id++; 819 u64_stats_update_end(&rx_ring->syncp); 820 821 /* Trigger device reset */ 822 rx_ring->adapter->reset_reason = ENA_REGS_RESET_INV_RX_REQ_ID; 823 set_bit(ENA_FLAG_TRIGGER_RESET, &rx_ring->adapter->flags); 824 return -EFAULT; 825 } 826 827 /* ena_setup_rx_resources - allocate I/O Rx resources (Descriptors) 828 * @adapter: network interface device structure 829 * @qid: queue index 830 * 831 * Returns 0 on success, negative on failure 832 */ 833 static int ena_setup_rx_resources(struct ena_adapter *adapter, 834 u32 qid) 835 { 836 struct ena_ring *rx_ring = &adapter->rx_ring[qid]; 837 struct ena_irq *ena_irq = &adapter->irq_tbl[ENA_IO_IRQ_IDX(qid)]; 838 int size, node, i; 839 840 if (rx_ring->rx_buffer_info) { 841 netif_err(adapter, ifup, adapter->netdev, 842 "rx_buffer_info is not NULL"); 843 return -EEXIST; 844 } 845 846 /* alloc extra element so in rx path 847 * we can always prefetch rx_info + 1 848 */ 849 size = sizeof(struct ena_rx_buffer) * (rx_ring->ring_size + 1); 850 node = cpu_to_node(ena_irq->cpu); 851 852 rx_ring->rx_buffer_info = vzalloc_node(size, node); 853 if (!rx_ring->rx_buffer_info) { 854 rx_ring->rx_buffer_info = vzalloc(size); 855 if (!rx_ring->rx_buffer_info) 856 return -ENOMEM; 857 } 858 859 size = sizeof(u16) * rx_ring->ring_size; 860 rx_ring->free_ids = vzalloc_node(size, node); 861 if (!rx_ring->free_ids) { 862 rx_ring->free_ids = vzalloc(size); 863 if (!rx_ring->free_ids) { 864 vfree(rx_ring->rx_buffer_info); 865 rx_ring->rx_buffer_info = NULL; 866 return -ENOMEM; 867 } 868 } 869 870 /* Req id ring for receiving RX pkts out of order */ 871 for (i = 0; i < rx_ring->ring_size; i++) 872 rx_ring->free_ids[i] = i; 873 874 /* Reset rx statistics */ 875 memset(&rx_ring->rx_stats, 0x0, sizeof(rx_ring->rx_stats)); 876 877 rx_ring->next_to_clean = 0; 878 rx_ring->next_to_use = 0; 879 rx_ring->cpu = ena_irq->cpu; 880 881 return 0; 882 } 883 884 /* ena_free_rx_resources - Free I/O Rx Resources 885 * @adapter: network interface device structure 886 * @qid: queue index 887 * 888 * Free all receive software resources 889 */ 890 static void ena_free_rx_resources(struct ena_adapter *adapter, 891 u32 qid) 892 { 893 struct ena_ring *rx_ring = &adapter->rx_ring[qid]; 894 895 vfree(rx_ring->rx_buffer_info); 896 rx_ring->rx_buffer_info = NULL; 897 898 vfree(rx_ring->free_ids); 899 rx_ring->free_ids = NULL; 900 } 901 902 /* ena_setup_all_rx_resources - allocate I/O Rx queues resources for all queues 903 * @adapter: board private structure 904 * 905 * Return 0 on success, negative on failure 906 */ 907 static int ena_setup_all_rx_resources(struct ena_adapter *adapter) 908 { 909 int i, rc = 0; 910 911 for (i = 0; i < adapter->num_io_queues; i++) { 912 rc = ena_setup_rx_resources(adapter, i); 913 if (rc) 914 goto err_setup_rx; 915 } 916 917 return 0; 918 919 err_setup_rx: 920 921 netif_err(adapter, ifup, adapter->netdev, 922 "Rx queue %d: allocation failed\n", i); 923 924 /* rewind the index freeing the rings as we go */ 925 while (i--) 926 ena_free_rx_resources(adapter, i); 927 return rc; 928 } 929 930 /* ena_free_all_io_rx_resources - Free I/O Rx Resources for All Queues 931 * @adapter: board private structure 932 * 933 * Free all receive software resources 934 */ 935 static void ena_free_all_io_rx_resources(struct ena_adapter *adapter) 936 { 937 int i; 938 939 for (i = 0; i < adapter->num_io_queues; i++) 940 ena_free_rx_resources(adapter, i); 941 } 942 943 static int ena_alloc_rx_page(struct ena_ring *rx_ring, 944 struct ena_rx_buffer *rx_info, gfp_t gfp) 945 { 946 struct ena_com_buf *ena_buf; 947 struct page *page; 948 dma_addr_t dma; 949 950 /* if previous allocated page is not used */ 951 if (unlikely(rx_info->page)) 952 return 0; 953 954 page = alloc_page(gfp); 955 if (unlikely(!page)) { 956 u64_stats_update_begin(&rx_ring->syncp); 957 rx_ring->rx_stats.page_alloc_fail++; 958 u64_stats_update_end(&rx_ring->syncp); 959 return -ENOMEM; 960 } 961 962 dma = dma_map_page(rx_ring->dev, page, 0, ENA_PAGE_SIZE, 963 DMA_FROM_DEVICE); 964 if (unlikely(dma_mapping_error(rx_ring->dev, dma))) { 965 u64_stats_update_begin(&rx_ring->syncp); 966 rx_ring->rx_stats.dma_mapping_err++; 967 u64_stats_update_end(&rx_ring->syncp); 968 969 __free_page(page); 970 return -EIO; 971 } 972 netif_dbg(rx_ring->adapter, rx_status, rx_ring->netdev, 973 "alloc page %p, rx_info %p\n", page, rx_info); 974 975 rx_info->page = page; 976 rx_info->page_offset = 0; 977 ena_buf = &rx_info->ena_buf; 978 ena_buf->paddr = dma + rx_ring->rx_headroom; 979 ena_buf->len = ENA_PAGE_SIZE - rx_ring->rx_headroom; 980 981 return 0; 982 } 983 984 static void ena_free_rx_page(struct ena_ring *rx_ring, 985 struct ena_rx_buffer *rx_info) 986 { 987 struct page *page = rx_info->page; 988 struct ena_com_buf *ena_buf = &rx_info->ena_buf; 989 990 if (unlikely(!page)) { 991 netif_warn(rx_ring->adapter, rx_err, rx_ring->netdev, 992 "Trying to free unallocated buffer\n"); 993 return; 994 } 995 996 dma_unmap_page(rx_ring->dev, 997 ena_buf->paddr - rx_ring->rx_headroom, 998 ENA_PAGE_SIZE, 999 DMA_FROM_DEVICE); 1000 1001 __free_page(page); 1002 rx_info->page = NULL; 1003 } 1004 1005 static int ena_refill_rx_bufs(struct ena_ring *rx_ring, u32 num) 1006 { 1007 u16 next_to_use, req_id; 1008 u32 i; 1009 int rc; 1010 1011 next_to_use = rx_ring->next_to_use; 1012 1013 for (i = 0; i < num; i++) { 1014 struct ena_rx_buffer *rx_info; 1015 1016 req_id = rx_ring->free_ids[next_to_use]; 1017 1018 rx_info = &rx_ring->rx_buffer_info[req_id]; 1019 1020 rc = ena_alloc_rx_page(rx_ring, rx_info, 1021 GFP_ATOMIC | __GFP_COMP); 1022 if (unlikely(rc < 0)) { 1023 netif_warn(rx_ring->adapter, rx_err, rx_ring->netdev, 1024 "failed to alloc buffer for rx queue %d\n", 1025 rx_ring->qid); 1026 break; 1027 } 1028 rc = ena_com_add_single_rx_desc(rx_ring->ena_com_io_sq, 1029 &rx_info->ena_buf, 1030 req_id); 1031 if (unlikely(rc)) { 1032 netif_warn(rx_ring->adapter, rx_status, rx_ring->netdev, 1033 "failed to add buffer for rx queue %d\n", 1034 rx_ring->qid); 1035 break; 1036 } 1037 next_to_use = ENA_RX_RING_IDX_NEXT(next_to_use, 1038 rx_ring->ring_size); 1039 } 1040 1041 if (unlikely(i < num)) { 1042 u64_stats_update_begin(&rx_ring->syncp); 1043 rx_ring->rx_stats.refil_partial++; 1044 u64_stats_update_end(&rx_ring->syncp); 1045 netdev_warn(rx_ring->netdev, 1046 "refilled rx qid %d with only %d buffers (from %d)\n", 1047 rx_ring->qid, i, num); 1048 } 1049 1050 /* ena_com_write_sq_doorbell issues a wmb() */ 1051 if (likely(i)) 1052 ena_com_write_sq_doorbell(rx_ring->ena_com_io_sq); 1053 1054 rx_ring->next_to_use = next_to_use; 1055 1056 return i; 1057 } 1058 1059 static void ena_free_rx_bufs(struct ena_adapter *adapter, 1060 u32 qid) 1061 { 1062 struct ena_ring *rx_ring = &adapter->rx_ring[qid]; 1063 u32 i; 1064 1065 for (i = 0; i < rx_ring->ring_size; i++) { 1066 struct ena_rx_buffer *rx_info = &rx_ring->rx_buffer_info[i]; 1067 1068 if (rx_info->page) 1069 ena_free_rx_page(rx_ring, rx_info); 1070 } 1071 } 1072 1073 /* ena_refill_all_rx_bufs - allocate all queues Rx buffers 1074 * @adapter: board private structure 1075 */ 1076 static void ena_refill_all_rx_bufs(struct ena_adapter *adapter) 1077 { 1078 struct ena_ring *rx_ring; 1079 int i, rc, bufs_num; 1080 1081 for (i = 0; i < adapter->num_io_queues; i++) { 1082 rx_ring = &adapter->rx_ring[i]; 1083 bufs_num = rx_ring->ring_size - 1; 1084 rc = ena_refill_rx_bufs(rx_ring, bufs_num); 1085 1086 if (unlikely(rc != bufs_num)) 1087 netif_warn(rx_ring->adapter, rx_status, rx_ring->netdev, 1088 "refilling Queue %d failed. allocated %d buffers from: %d\n", 1089 i, rc, bufs_num); 1090 } 1091 } 1092 1093 static void ena_free_all_rx_bufs(struct ena_adapter *adapter) 1094 { 1095 int i; 1096 1097 for (i = 0; i < adapter->num_io_queues; i++) 1098 ena_free_rx_bufs(adapter, i); 1099 } 1100 1101 static void ena_unmap_tx_buff(struct ena_ring *tx_ring, 1102 struct ena_tx_buffer *tx_info) 1103 { 1104 struct ena_com_buf *ena_buf; 1105 u32 cnt; 1106 int i; 1107 1108 ena_buf = tx_info->bufs; 1109 cnt = tx_info->num_of_bufs; 1110 1111 if (unlikely(!cnt)) 1112 return; 1113 1114 if (tx_info->map_linear_data) { 1115 dma_unmap_single(tx_ring->dev, 1116 dma_unmap_addr(ena_buf, paddr), 1117 dma_unmap_len(ena_buf, len), 1118 DMA_TO_DEVICE); 1119 ena_buf++; 1120 cnt--; 1121 } 1122 1123 /* unmap remaining mapped pages */ 1124 for (i = 0; i < cnt; i++) { 1125 dma_unmap_page(tx_ring->dev, dma_unmap_addr(ena_buf, paddr), 1126 dma_unmap_len(ena_buf, len), DMA_TO_DEVICE); 1127 ena_buf++; 1128 } 1129 } 1130 1131 /* ena_free_tx_bufs - Free Tx Buffers per Queue 1132 * @tx_ring: TX ring for which buffers be freed 1133 */ 1134 static void ena_free_tx_bufs(struct ena_ring *tx_ring) 1135 { 1136 bool print_once = true; 1137 u32 i; 1138 1139 for (i = 0; i < tx_ring->ring_size; i++) { 1140 struct ena_tx_buffer *tx_info = &tx_ring->tx_buffer_info[i]; 1141 1142 if (!tx_info->skb) 1143 continue; 1144 1145 if (print_once) { 1146 netdev_notice(tx_ring->netdev, 1147 "free uncompleted tx skb qid %d idx 0x%x\n", 1148 tx_ring->qid, i); 1149 print_once = false; 1150 } else { 1151 netdev_dbg(tx_ring->netdev, 1152 "free uncompleted tx skb qid %d idx 0x%x\n", 1153 tx_ring->qid, i); 1154 } 1155 1156 ena_unmap_tx_buff(tx_ring, tx_info); 1157 1158 dev_kfree_skb_any(tx_info->skb); 1159 } 1160 netdev_tx_reset_queue(netdev_get_tx_queue(tx_ring->netdev, 1161 tx_ring->qid)); 1162 } 1163 1164 static void ena_free_all_tx_bufs(struct ena_adapter *adapter) 1165 { 1166 struct ena_ring *tx_ring; 1167 int i; 1168 1169 for (i = 0; i < adapter->num_io_queues + adapter->xdp_num_queues; i++) { 1170 tx_ring = &adapter->tx_ring[i]; 1171 ena_free_tx_bufs(tx_ring); 1172 } 1173 } 1174 1175 static void ena_destroy_all_tx_queues(struct ena_adapter *adapter) 1176 { 1177 u16 ena_qid; 1178 int i; 1179 1180 for (i = 0; i < adapter->num_io_queues + adapter->xdp_num_queues; i++) { 1181 ena_qid = ENA_IO_TXQ_IDX(i); 1182 ena_com_destroy_io_queue(adapter->ena_dev, ena_qid); 1183 } 1184 } 1185 1186 static void ena_destroy_all_rx_queues(struct ena_adapter *adapter) 1187 { 1188 u16 ena_qid; 1189 int i; 1190 1191 for (i = 0; i < adapter->num_io_queues; i++) { 1192 ena_qid = ENA_IO_RXQ_IDX(i); 1193 cancel_work_sync(&adapter->ena_napi[i].dim.work); 1194 ena_com_destroy_io_queue(adapter->ena_dev, ena_qid); 1195 } 1196 } 1197 1198 static void ena_destroy_all_io_queues(struct ena_adapter *adapter) 1199 { 1200 ena_destroy_all_tx_queues(adapter); 1201 ena_destroy_all_rx_queues(adapter); 1202 } 1203 1204 static int handle_invalid_req_id(struct ena_ring *ring, u16 req_id, 1205 struct ena_tx_buffer *tx_info, bool is_xdp) 1206 { 1207 if (tx_info) 1208 netif_err(ring->adapter, 1209 tx_done, 1210 ring->netdev, 1211 "tx_info doesn't have valid %s", 1212 is_xdp ? "xdp frame" : "skb"); 1213 else 1214 netif_err(ring->adapter, 1215 tx_done, 1216 ring->netdev, 1217 "Invalid req_id: %hu\n", 1218 req_id); 1219 1220 u64_stats_update_begin(&ring->syncp); 1221 ring->tx_stats.bad_req_id++; 1222 u64_stats_update_end(&ring->syncp); 1223 1224 /* Trigger device reset */ 1225 ring->adapter->reset_reason = ENA_REGS_RESET_INV_TX_REQ_ID; 1226 set_bit(ENA_FLAG_TRIGGER_RESET, &ring->adapter->flags); 1227 return -EFAULT; 1228 } 1229 1230 static int validate_tx_req_id(struct ena_ring *tx_ring, u16 req_id) 1231 { 1232 struct ena_tx_buffer *tx_info = NULL; 1233 1234 if (likely(req_id < tx_ring->ring_size)) { 1235 tx_info = &tx_ring->tx_buffer_info[req_id]; 1236 if (likely(tx_info->skb)) 1237 return 0; 1238 } 1239 1240 return handle_invalid_req_id(tx_ring, req_id, tx_info, false); 1241 } 1242 1243 static int validate_xdp_req_id(struct ena_ring *xdp_ring, u16 req_id) 1244 { 1245 struct ena_tx_buffer *tx_info = NULL; 1246 1247 if (likely(req_id < xdp_ring->ring_size)) { 1248 tx_info = &xdp_ring->tx_buffer_info[req_id]; 1249 if (likely(tx_info->xdpf)) 1250 return 0; 1251 } 1252 1253 return handle_invalid_req_id(xdp_ring, req_id, tx_info, true); 1254 } 1255 1256 static int ena_clean_tx_irq(struct ena_ring *tx_ring, u32 budget) 1257 { 1258 struct netdev_queue *txq; 1259 bool above_thresh; 1260 u32 tx_bytes = 0; 1261 u32 total_done = 0; 1262 u16 next_to_clean; 1263 u16 req_id; 1264 int tx_pkts = 0; 1265 int rc; 1266 1267 next_to_clean = tx_ring->next_to_clean; 1268 txq = netdev_get_tx_queue(tx_ring->netdev, tx_ring->qid); 1269 1270 while (tx_pkts < budget) { 1271 struct ena_tx_buffer *tx_info; 1272 struct sk_buff *skb; 1273 1274 rc = ena_com_tx_comp_req_id_get(tx_ring->ena_com_io_cq, 1275 &req_id); 1276 if (rc) 1277 break; 1278 1279 rc = validate_tx_req_id(tx_ring, req_id); 1280 if (rc) 1281 break; 1282 1283 tx_info = &tx_ring->tx_buffer_info[req_id]; 1284 skb = tx_info->skb; 1285 1286 /* prefetch skb_end_pointer() to speedup skb_shinfo(skb) */ 1287 prefetch(&skb->end); 1288 1289 tx_info->skb = NULL; 1290 tx_info->last_jiffies = 0; 1291 1292 ena_unmap_tx_buff(tx_ring, tx_info); 1293 1294 netif_dbg(tx_ring->adapter, tx_done, tx_ring->netdev, 1295 "tx_poll: q %d skb %p completed\n", tx_ring->qid, 1296 skb); 1297 1298 tx_bytes += skb->len; 1299 dev_kfree_skb(skb); 1300 tx_pkts++; 1301 total_done += tx_info->tx_descs; 1302 1303 tx_ring->free_ids[next_to_clean] = req_id; 1304 next_to_clean = ENA_TX_RING_IDX_NEXT(next_to_clean, 1305 tx_ring->ring_size); 1306 } 1307 1308 tx_ring->next_to_clean = next_to_clean; 1309 ena_com_comp_ack(tx_ring->ena_com_io_sq, total_done); 1310 ena_com_update_dev_comp_head(tx_ring->ena_com_io_cq); 1311 1312 netdev_tx_completed_queue(txq, tx_pkts, tx_bytes); 1313 1314 netif_dbg(tx_ring->adapter, tx_done, tx_ring->netdev, 1315 "tx_poll: q %d done. total pkts: %d\n", 1316 tx_ring->qid, tx_pkts); 1317 1318 /* need to make the rings circular update visible to 1319 * ena_start_xmit() before checking for netif_queue_stopped(). 1320 */ 1321 smp_mb(); 1322 1323 above_thresh = ena_com_sq_have_enough_space(tx_ring->ena_com_io_sq, 1324 ENA_TX_WAKEUP_THRESH); 1325 if (unlikely(netif_tx_queue_stopped(txq) && above_thresh)) { 1326 __netif_tx_lock(txq, smp_processor_id()); 1327 above_thresh = 1328 ena_com_sq_have_enough_space(tx_ring->ena_com_io_sq, 1329 ENA_TX_WAKEUP_THRESH); 1330 if (netif_tx_queue_stopped(txq) && above_thresh && 1331 test_bit(ENA_FLAG_DEV_UP, &tx_ring->adapter->flags)) { 1332 netif_tx_wake_queue(txq); 1333 u64_stats_update_begin(&tx_ring->syncp); 1334 tx_ring->tx_stats.queue_wakeup++; 1335 u64_stats_update_end(&tx_ring->syncp); 1336 } 1337 __netif_tx_unlock(txq); 1338 } 1339 1340 return tx_pkts; 1341 } 1342 1343 static struct sk_buff *ena_alloc_skb(struct ena_ring *rx_ring, bool frags) 1344 { 1345 struct sk_buff *skb; 1346 1347 if (frags) 1348 skb = napi_get_frags(rx_ring->napi); 1349 else 1350 skb = netdev_alloc_skb_ip_align(rx_ring->netdev, 1351 rx_ring->rx_copybreak); 1352 1353 if (unlikely(!skb)) { 1354 u64_stats_update_begin(&rx_ring->syncp); 1355 rx_ring->rx_stats.skb_alloc_fail++; 1356 u64_stats_update_end(&rx_ring->syncp); 1357 netif_dbg(rx_ring->adapter, rx_err, rx_ring->netdev, 1358 "Failed to allocate skb. frags: %d\n", frags); 1359 return NULL; 1360 } 1361 1362 return skb; 1363 } 1364 1365 static struct sk_buff *ena_rx_skb(struct ena_ring *rx_ring, 1366 struct ena_com_rx_buf_info *ena_bufs, 1367 u32 descs, 1368 u16 *next_to_clean) 1369 { 1370 struct sk_buff *skb; 1371 struct ena_rx_buffer *rx_info; 1372 u16 len, req_id, buf = 0; 1373 void *va; 1374 int rc; 1375 1376 len = ena_bufs[buf].len; 1377 req_id = ena_bufs[buf].req_id; 1378 1379 rc = validate_rx_req_id(rx_ring, req_id); 1380 if (unlikely(rc < 0)) 1381 return NULL; 1382 1383 rx_info = &rx_ring->rx_buffer_info[req_id]; 1384 1385 if (unlikely(!rx_info->page)) { 1386 netif_err(rx_ring->adapter, rx_err, rx_ring->netdev, 1387 "Page is NULL\n"); 1388 return NULL; 1389 } 1390 1391 netif_dbg(rx_ring->adapter, rx_status, rx_ring->netdev, 1392 "rx_info %p page %p\n", 1393 rx_info, rx_info->page); 1394 1395 /* save virt address of first buffer */ 1396 va = page_address(rx_info->page) + rx_info->page_offset; 1397 prefetch(va + NET_IP_ALIGN); 1398 1399 if (len <= rx_ring->rx_copybreak) { 1400 skb = ena_alloc_skb(rx_ring, false); 1401 if (unlikely(!skb)) 1402 return NULL; 1403 1404 netif_dbg(rx_ring->adapter, rx_status, rx_ring->netdev, 1405 "rx allocated small packet. len %d. data_len %d\n", 1406 skb->len, skb->data_len); 1407 1408 /* sync this buffer for CPU use */ 1409 dma_sync_single_for_cpu(rx_ring->dev, 1410 dma_unmap_addr(&rx_info->ena_buf, paddr), 1411 len, 1412 DMA_FROM_DEVICE); 1413 skb_copy_to_linear_data(skb, va, len); 1414 dma_sync_single_for_device(rx_ring->dev, 1415 dma_unmap_addr(&rx_info->ena_buf, paddr), 1416 len, 1417 DMA_FROM_DEVICE); 1418 1419 skb_put(skb, len); 1420 skb->protocol = eth_type_trans(skb, rx_ring->netdev); 1421 rx_ring->free_ids[*next_to_clean] = req_id; 1422 *next_to_clean = ENA_RX_RING_IDX_ADD(*next_to_clean, descs, 1423 rx_ring->ring_size); 1424 return skb; 1425 } 1426 1427 skb = ena_alloc_skb(rx_ring, true); 1428 if (unlikely(!skb)) 1429 return NULL; 1430 1431 do { 1432 dma_unmap_page(rx_ring->dev, 1433 dma_unmap_addr(&rx_info->ena_buf, paddr), 1434 ENA_PAGE_SIZE, DMA_FROM_DEVICE); 1435 1436 skb_add_rx_frag(skb, skb_shinfo(skb)->nr_frags, rx_info->page, 1437 rx_info->page_offset, len, ENA_PAGE_SIZE); 1438 1439 netif_dbg(rx_ring->adapter, rx_status, rx_ring->netdev, 1440 "rx skb updated. len %d. data_len %d\n", 1441 skb->len, skb->data_len); 1442 1443 rx_info->page = NULL; 1444 1445 rx_ring->free_ids[*next_to_clean] = req_id; 1446 *next_to_clean = 1447 ENA_RX_RING_IDX_NEXT(*next_to_clean, 1448 rx_ring->ring_size); 1449 if (likely(--descs == 0)) 1450 break; 1451 1452 buf++; 1453 len = ena_bufs[buf].len; 1454 req_id = ena_bufs[buf].req_id; 1455 1456 rc = validate_rx_req_id(rx_ring, req_id); 1457 if (unlikely(rc < 0)) 1458 return NULL; 1459 1460 rx_info = &rx_ring->rx_buffer_info[req_id]; 1461 } while (1); 1462 1463 return skb; 1464 } 1465 1466 /* ena_rx_checksum - indicate in skb if hw indicated a good cksum 1467 * @adapter: structure containing adapter specific data 1468 * @ena_rx_ctx: received packet context/metadata 1469 * @skb: skb currently being received and modified 1470 */ 1471 static void ena_rx_checksum(struct ena_ring *rx_ring, 1472 struct ena_com_rx_ctx *ena_rx_ctx, 1473 struct sk_buff *skb) 1474 { 1475 /* Rx csum disabled */ 1476 if (unlikely(!(rx_ring->netdev->features & NETIF_F_RXCSUM))) { 1477 skb->ip_summed = CHECKSUM_NONE; 1478 return; 1479 } 1480 1481 /* For fragmented packets the checksum isn't valid */ 1482 if (ena_rx_ctx->frag) { 1483 skb->ip_summed = CHECKSUM_NONE; 1484 return; 1485 } 1486 1487 /* if IP and error */ 1488 if (unlikely((ena_rx_ctx->l3_proto == ENA_ETH_IO_L3_PROTO_IPV4) && 1489 (ena_rx_ctx->l3_csum_err))) { 1490 /* ipv4 checksum error */ 1491 skb->ip_summed = CHECKSUM_NONE; 1492 u64_stats_update_begin(&rx_ring->syncp); 1493 rx_ring->rx_stats.bad_csum++; 1494 u64_stats_update_end(&rx_ring->syncp); 1495 netif_dbg(rx_ring->adapter, rx_err, rx_ring->netdev, 1496 "RX IPv4 header checksum error\n"); 1497 return; 1498 } 1499 1500 /* if TCP/UDP */ 1501 if (likely((ena_rx_ctx->l4_proto == ENA_ETH_IO_L4_PROTO_TCP) || 1502 (ena_rx_ctx->l4_proto == ENA_ETH_IO_L4_PROTO_UDP))) { 1503 if (unlikely(ena_rx_ctx->l4_csum_err)) { 1504 /* TCP/UDP checksum error */ 1505 u64_stats_update_begin(&rx_ring->syncp); 1506 rx_ring->rx_stats.bad_csum++; 1507 u64_stats_update_end(&rx_ring->syncp); 1508 netif_dbg(rx_ring->adapter, rx_err, rx_ring->netdev, 1509 "RX L4 checksum error\n"); 1510 skb->ip_summed = CHECKSUM_NONE; 1511 return; 1512 } 1513 1514 if (likely(ena_rx_ctx->l4_csum_checked)) { 1515 skb->ip_summed = CHECKSUM_UNNECESSARY; 1516 u64_stats_update_begin(&rx_ring->syncp); 1517 rx_ring->rx_stats.csum_good++; 1518 u64_stats_update_end(&rx_ring->syncp); 1519 } else { 1520 u64_stats_update_begin(&rx_ring->syncp); 1521 rx_ring->rx_stats.csum_unchecked++; 1522 u64_stats_update_end(&rx_ring->syncp); 1523 skb->ip_summed = CHECKSUM_NONE; 1524 } 1525 } else { 1526 skb->ip_summed = CHECKSUM_NONE; 1527 return; 1528 } 1529 1530 } 1531 1532 static void ena_set_rx_hash(struct ena_ring *rx_ring, 1533 struct ena_com_rx_ctx *ena_rx_ctx, 1534 struct sk_buff *skb) 1535 { 1536 enum pkt_hash_types hash_type; 1537 1538 if (likely(rx_ring->netdev->features & NETIF_F_RXHASH)) { 1539 if (likely((ena_rx_ctx->l4_proto == ENA_ETH_IO_L4_PROTO_TCP) || 1540 (ena_rx_ctx->l4_proto == ENA_ETH_IO_L4_PROTO_UDP))) 1541 1542 hash_type = PKT_HASH_TYPE_L4; 1543 else 1544 hash_type = PKT_HASH_TYPE_NONE; 1545 1546 /* Override hash type if the packet is fragmented */ 1547 if (ena_rx_ctx->frag) 1548 hash_type = PKT_HASH_TYPE_NONE; 1549 1550 skb_set_hash(skb, ena_rx_ctx->hash, hash_type); 1551 } 1552 } 1553 1554 static int ena_xdp_handle_buff(struct ena_ring *rx_ring, struct xdp_buff *xdp) 1555 { 1556 struct ena_rx_buffer *rx_info; 1557 int ret; 1558 1559 rx_info = &rx_ring->rx_buffer_info[rx_ring->ena_bufs[0].req_id]; 1560 xdp->data = page_address(rx_info->page) + 1561 rx_info->page_offset + rx_ring->rx_headroom; 1562 xdp_set_data_meta_invalid(xdp); 1563 xdp->data_hard_start = page_address(rx_info->page); 1564 xdp->data_end = xdp->data + rx_ring->ena_bufs[0].len; 1565 /* If for some reason we received a bigger packet than 1566 * we expect, then we simply drop it 1567 */ 1568 if (unlikely(rx_ring->ena_bufs[0].len > ENA_XDP_MAX_MTU)) 1569 return XDP_DROP; 1570 1571 ret = ena_xdp_execute(rx_ring, xdp, rx_info); 1572 1573 /* The xdp program might expand the headers */ 1574 if (ret == XDP_PASS) { 1575 rx_info->page_offset = xdp->data - xdp->data_hard_start; 1576 rx_ring->ena_bufs[0].len = xdp->data_end - xdp->data; 1577 } 1578 1579 return ret; 1580 } 1581 /* ena_clean_rx_irq - Cleanup RX irq 1582 * @rx_ring: RX ring to clean 1583 * @napi: napi handler 1584 * @budget: how many packets driver is allowed to clean 1585 * 1586 * Returns the number of cleaned buffers. 1587 */ 1588 static int ena_clean_rx_irq(struct ena_ring *rx_ring, struct napi_struct *napi, 1589 u32 budget) 1590 { 1591 u16 next_to_clean = rx_ring->next_to_clean; 1592 struct ena_com_rx_ctx ena_rx_ctx; 1593 struct ena_adapter *adapter; 1594 u32 res_budget, work_done; 1595 int rx_copybreak_pkt = 0; 1596 int refill_threshold; 1597 struct sk_buff *skb; 1598 int refill_required; 1599 struct xdp_buff xdp; 1600 int total_len = 0; 1601 int xdp_verdict; 1602 int rc = 0; 1603 int i; 1604 1605 netif_dbg(rx_ring->adapter, rx_status, rx_ring->netdev, 1606 "%s qid %d\n", __func__, rx_ring->qid); 1607 res_budget = budget; 1608 xdp.rxq = &rx_ring->xdp_rxq; 1609 1610 do { 1611 xdp_verdict = XDP_PASS; 1612 skb = NULL; 1613 ena_rx_ctx.ena_bufs = rx_ring->ena_bufs; 1614 ena_rx_ctx.max_bufs = rx_ring->sgl_size; 1615 ena_rx_ctx.descs = 0; 1616 rc = ena_com_rx_pkt(rx_ring->ena_com_io_cq, 1617 rx_ring->ena_com_io_sq, 1618 &ena_rx_ctx); 1619 if (unlikely(rc)) 1620 goto error; 1621 1622 if (unlikely(ena_rx_ctx.descs == 0)) 1623 break; 1624 1625 netif_dbg(rx_ring->adapter, rx_status, rx_ring->netdev, 1626 "rx_poll: q %d got packet from ena. descs #: %d l3 proto %d l4 proto %d hash: %x\n", 1627 rx_ring->qid, ena_rx_ctx.descs, ena_rx_ctx.l3_proto, 1628 ena_rx_ctx.l4_proto, ena_rx_ctx.hash); 1629 1630 if (ena_xdp_present_ring(rx_ring)) 1631 xdp_verdict = ena_xdp_handle_buff(rx_ring, &xdp); 1632 1633 /* allocate skb and fill it */ 1634 if (xdp_verdict == XDP_PASS) 1635 skb = ena_rx_skb(rx_ring, 1636 rx_ring->ena_bufs, 1637 ena_rx_ctx.descs, 1638 &next_to_clean); 1639 1640 if (unlikely(!skb)) { 1641 if (xdp_verdict == XDP_TX) { 1642 ena_free_rx_page(rx_ring, 1643 &rx_ring->rx_buffer_info[rx_ring->ena_bufs[0].req_id]); 1644 res_budget--; 1645 } 1646 for (i = 0; i < ena_rx_ctx.descs; i++) { 1647 rx_ring->free_ids[next_to_clean] = 1648 rx_ring->ena_bufs[i].req_id; 1649 next_to_clean = 1650 ENA_RX_RING_IDX_NEXT(next_to_clean, 1651 rx_ring->ring_size); 1652 } 1653 if (xdp_verdict == XDP_TX || xdp_verdict == XDP_DROP) 1654 continue; 1655 break; 1656 } 1657 1658 ena_rx_checksum(rx_ring, &ena_rx_ctx, skb); 1659 1660 ena_set_rx_hash(rx_ring, &ena_rx_ctx, skb); 1661 1662 skb_record_rx_queue(skb, rx_ring->qid); 1663 1664 if (rx_ring->ena_bufs[0].len <= rx_ring->rx_copybreak) { 1665 total_len += rx_ring->ena_bufs[0].len; 1666 rx_copybreak_pkt++; 1667 napi_gro_receive(napi, skb); 1668 } else { 1669 total_len += skb->len; 1670 napi_gro_frags(napi); 1671 } 1672 1673 res_budget--; 1674 } while (likely(res_budget)); 1675 1676 work_done = budget - res_budget; 1677 rx_ring->per_napi_packets += work_done; 1678 u64_stats_update_begin(&rx_ring->syncp); 1679 rx_ring->rx_stats.bytes += total_len; 1680 rx_ring->rx_stats.cnt += work_done; 1681 rx_ring->rx_stats.rx_copybreak_pkt += rx_copybreak_pkt; 1682 u64_stats_update_end(&rx_ring->syncp); 1683 1684 rx_ring->next_to_clean = next_to_clean; 1685 1686 refill_required = ena_com_free_desc(rx_ring->ena_com_io_sq); 1687 refill_threshold = 1688 min_t(int, rx_ring->ring_size / ENA_RX_REFILL_THRESH_DIVIDER, 1689 ENA_RX_REFILL_THRESH_PACKET); 1690 1691 /* Optimization, try to batch new rx buffers */ 1692 if (refill_required > refill_threshold) { 1693 ena_com_update_dev_comp_head(rx_ring->ena_com_io_cq); 1694 ena_refill_rx_bufs(rx_ring, refill_required); 1695 } 1696 1697 return work_done; 1698 1699 error: 1700 adapter = netdev_priv(rx_ring->netdev); 1701 1702 u64_stats_update_begin(&rx_ring->syncp); 1703 rx_ring->rx_stats.bad_desc_num++; 1704 u64_stats_update_end(&rx_ring->syncp); 1705 1706 /* Too many desc from the device. Trigger reset */ 1707 adapter->reset_reason = ENA_REGS_RESET_TOO_MANY_RX_DESCS; 1708 set_bit(ENA_FLAG_TRIGGER_RESET, &adapter->flags); 1709 1710 return 0; 1711 } 1712 1713 static void ena_dim_work(struct work_struct *w) 1714 { 1715 struct dim *dim = container_of(w, struct dim, work); 1716 struct dim_cq_moder cur_moder = 1717 net_dim_get_rx_moderation(dim->mode, dim->profile_ix); 1718 struct ena_napi *ena_napi = container_of(dim, struct ena_napi, dim); 1719 1720 ena_napi->rx_ring->smoothed_interval = cur_moder.usec; 1721 dim->state = DIM_START_MEASURE; 1722 } 1723 1724 static void ena_adjust_adaptive_rx_intr_moderation(struct ena_napi *ena_napi) 1725 { 1726 struct dim_sample dim_sample; 1727 struct ena_ring *rx_ring = ena_napi->rx_ring; 1728 1729 if (!rx_ring->per_napi_packets) 1730 return; 1731 1732 rx_ring->non_empty_napi_events++; 1733 1734 dim_update_sample(rx_ring->non_empty_napi_events, 1735 rx_ring->rx_stats.cnt, 1736 rx_ring->rx_stats.bytes, 1737 &dim_sample); 1738 1739 net_dim(&ena_napi->dim, dim_sample); 1740 1741 rx_ring->per_napi_packets = 0; 1742 } 1743 1744 static void ena_unmask_interrupt(struct ena_ring *tx_ring, 1745 struct ena_ring *rx_ring) 1746 { 1747 struct ena_eth_io_intr_reg intr_reg; 1748 u32 rx_interval = 0; 1749 /* Rx ring can be NULL when for XDP tx queues which don't have an 1750 * accompanying rx_ring pair. 1751 */ 1752 if (rx_ring) 1753 rx_interval = ena_com_get_adaptive_moderation_enabled(rx_ring->ena_dev) ? 1754 rx_ring->smoothed_interval : 1755 ena_com_get_nonadaptive_moderation_interval_rx(rx_ring->ena_dev); 1756 1757 /* Update intr register: rx intr delay, 1758 * tx intr delay and interrupt unmask 1759 */ 1760 ena_com_update_intr_reg(&intr_reg, 1761 rx_interval, 1762 tx_ring->smoothed_interval, 1763 true); 1764 1765 u64_stats_update_begin(&tx_ring->syncp); 1766 tx_ring->tx_stats.unmask_interrupt++; 1767 u64_stats_update_end(&tx_ring->syncp); 1768 /* It is a shared MSI-X. 1769 * Tx and Rx CQ have pointer to it. 1770 * So we use one of them to reach the intr reg 1771 * The Tx ring is used because the rx_ring is NULL for XDP queues 1772 */ 1773 ena_com_unmask_intr(tx_ring->ena_com_io_cq, &intr_reg); 1774 } 1775 1776 static void ena_update_ring_numa_node(struct ena_ring *tx_ring, 1777 struct ena_ring *rx_ring) 1778 { 1779 int cpu = get_cpu(); 1780 int numa_node; 1781 1782 /* Check only one ring since the 2 rings are running on the same cpu */ 1783 if (likely(tx_ring->cpu == cpu)) 1784 goto out; 1785 1786 numa_node = cpu_to_node(cpu); 1787 put_cpu(); 1788 1789 if (numa_node != NUMA_NO_NODE) { 1790 ena_com_update_numa_node(tx_ring->ena_com_io_cq, numa_node); 1791 if (rx_ring) 1792 ena_com_update_numa_node(rx_ring->ena_com_io_cq, 1793 numa_node); 1794 } 1795 1796 tx_ring->cpu = cpu; 1797 if (rx_ring) 1798 rx_ring->cpu = cpu; 1799 1800 return; 1801 out: 1802 put_cpu(); 1803 } 1804 1805 static int ena_clean_xdp_irq(struct ena_ring *xdp_ring, u32 budget) 1806 { 1807 u32 total_done = 0; 1808 u16 next_to_clean; 1809 u32 tx_bytes = 0; 1810 int tx_pkts = 0; 1811 u16 req_id; 1812 int rc; 1813 1814 if (unlikely(!xdp_ring)) 1815 return 0; 1816 next_to_clean = xdp_ring->next_to_clean; 1817 1818 while (tx_pkts < budget) { 1819 struct ena_tx_buffer *tx_info; 1820 struct xdp_frame *xdpf; 1821 1822 rc = ena_com_tx_comp_req_id_get(xdp_ring->ena_com_io_cq, 1823 &req_id); 1824 if (rc) 1825 break; 1826 1827 rc = validate_xdp_req_id(xdp_ring, req_id); 1828 if (rc) 1829 break; 1830 1831 tx_info = &xdp_ring->tx_buffer_info[req_id]; 1832 xdpf = tx_info->xdpf; 1833 1834 tx_info->xdpf = NULL; 1835 tx_info->last_jiffies = 0; 1836 ena_unmap_tx_buff(xdp_ring, tx_info); 1837 1838 netif_dbg(xdp_ring->adapter, tx_done, xdp_ring->netdev, 1839 "tx_poll: q %d skb %p completed\n", xdp_ring->qid, 1840 xdpf); 1841 1842 tx_bytes += xdpf->len; 1843 tx_pkts++; 1844 total_done += tx_info->tx_descs; 1845 1846 __free_page(tx_info->xdp_rx_page); 1847 xdp_ring->free_ids[next_to_clean] = req_id; 1848 next_to_clean = ENA_TX_RING_IDX_NEXT(next_to_clean, 1849 xdp_ring->ring_size); 1850 } 1851 1852 xdp_ring->next_to_clean = next_to_clean; 1853 ena_com_comp_ack(xdp_ring->ena_com_io_sq, total_done); 1854 ena_com_update_dev_comp_head(xdp_ring->ena_com_io_cq); 1855 1856 netif_dbg(xdp_ring->adapter, tx_done, xdp_ring->netdev, 1857 "tx_poll: q %d done. total pkts: %d\n", 1858 xdp_ring->qid, tx_pkts); 1859 1860 return tx_pkts; 1861 } 1862 1863 static int ena_io_poll(struct napi_struct *napi, int budget) 1864 { 1865 struct ena_napi *ena_napi = container_of(napi, struct ena_napi, napi); 1866 struct ena_ring *tx_ring, *rx_ring; 1867 int tx_work_done; 1868 int rx_work_done = 0; 1869 int tx_budget; 1870 int napi_comp_call = 0; 1871 int ret; 1872 1873 tx_ring = ena_napi->tx_ring; 1874 rx_ring = ena_napi->rx_ring; 1875 1876 tx_ring->first_interrupt = ena_napi->first_interrupt; 1877 rx_ring->first_interrupt = ena_napi->first_interrupt; 1878 1879 tx_budget = tx_ring->ring_size / ENA_TX_POLL_BUDGET_DIVIDER; 1880 1881 if (!test_bit(ENA_FLAG_DEV_UP, &tx_ring->adapter->flags) || 1882 test_bit(ENA_FLAG_TRIGGER_RESET, &tx_ring->adapter->flags)) { 1883 napi_complete_done(napi, 0); 1884 return 0; 1885 } 1886 1887 tx_work_done = ena_clean_tx_irq(tx_ring, tx_budget); 1888 /* On netpoll the budget is zero and the handler should only clean the 1889 * tx completions. 1890 */ 1891 if (likely(budget)) 1892 rx_work_done = ena_clean_rx_irq(rx_ring, napi, budget); 1893 1894 /* If the device is about to reset or down, avoid unmask 1895 * the interrupt and return 0 so NAPI won't reschedule 1896 */ 1897 if (unlikely(!test_bit(ENA_FLAG_DEV_UP, &tx_ring->adapter->flags) || 1898 test_bit(ENA_FLAG_TRIGGER_RESET, &tx_ring->adapter->flags))) { 1899 napi_complete_done(napi, 0); 1900 ret = 0; 1901 1902 } else if ((budget > rx_work_done) && (tx_budget > tx_work_done)) { 1903 napi_comp_call = 1; 1904 1905 /* Update numa and unmask the interrupt only when schedule 1906 * from the interrupt context (vs from sk_busy_loop) 1907 */ 1908 if (napi_complete_done(napi, rx_work_done)) { 1909 /* We apply adaptive moderation on Rx path only. 1910 * Tx uses static interrupt moderation. 1911 */ 1912 if (ena_com_get_adaptive_moderation_enabled(rx_ring->ena_dev)) 1913 ena_adjust_adaptive_rx_intr_moderation(ena_napi); 1914 1915 ena_unmask_interrupt(tx_ring, rx_ring); 1916 } 1917 1918 ena_update_ring_numa_node(tx_ring, rx_ring); 1919 1920 ret = rx_work_done; 1921 } else { 1922 ret = budget; 1923 } 1924 1925 u64_stats_update_begin(&tx_ring->syncp); 1926 tx_ring->tx_stats.napi_comp += napi_comp_call; 1927 tx_ring->tx_stats.tx_poll++; 1928 u64_stats_update_end(&tx_ring->syncp); 1929 1930 return ret; 1931 } 1932 1933 static irqreturn_t ena_intr_msix_mgmnt(int irq, void *data) 1934 { 1935 struct ena_adapter *adapter = (struct ena_adapter *)data; 1936 1937 ena_com_admin_q_comp_intr_handler(adapter->ena_dev); 1938 1939 /* Don't call the aenq handler before probe is done */ 1940 if (likely(test_bit(ENA_FLAG_DEVICE_RUNNING, &adapter->flags))) 1941 ena_com_aenq_intr_handler(adapter->ena_dev, data); 1942 1943 return IRQ_HANDLED; 1944 } 1945 1946 /* ena_intr_msix_io - MSI-X Interrupt Handler for Tx/Rx 1947 * @irq: interrupt number 1948 * @data: pointer to a network interface private napi device structure 1949 */ 1950 static irqreturn_t ena_intr_msix_io(int irq, void *data) 1951 { 1952 struct ena_napi *ena_napi = data; 1953 1954 ena_napi->first_interrupt = true; 1955 1956 napi_schedule_irqoff(&ena_napi->napi); 1957 1958 return IRQ_HANDLED; 1959 } 1960 1961 /* Reserve a single MSI-X vector for management (admin + aenq). 1962 * plus reserve one vector for each potential io queue. 1963 * the number of potential io queues is the minimum of what the device 1964 * supports and the number of vCPUs. 1965 */ 1966 static int ena_enable_msix(struct ena_adapter *adapter) 1967 { 1968 int msix_vecs, irq_cnt; 1969 1970 if (test_bit(ENA_FLAG_MSIX_ENABLED, &adapter->flags)) { 1971 netif_err(adapter, probe, adapter->netdev, 1972 "Error, MSI-X is already enabled\n"); 1973 return -EPERM; 1974 } 1975 1976 /* Reserved the max msix vectors we might need */ 1977 msix_vecs = ENA_MAX_MSIX_VEC(adapter->max_num_io_queues); 1978 netif_dbg(adapter, probe, adapter->netdev, 1979 "trying to enable MSI-X, vectors %d\n", msix_vecs); 1980 1981 irq_cnt = pci_alloc_irq_vectors(adapter->pdev, ENA_MIN_MSIX_VEC, 1982 msix_vecs, PCI_IRQ_MSIX); 1983 1984 if (irq_cnt < 0) { 1985 netif_err(adapter, probe, adapter->netdev, 1986 "Failed to enable MSI-X. irq_cnt %d\n", irq_cnt); 1987 return -ENOSPC; 1988 } 1989 1990 if (irq_cnt != msix_vecs) { 1991 netif_notice(adapter, probe, adapter->netdev, 1992 "enable only %d MSI-X (out of %d), reduce the number of queues\n", 1993 irq_cnt, msix_vecs); 1994 adapter->num_io_queues = irq_cnt - ENA_ADMIN_MSIX_VEC; 1995 } 1996 1997 if (ena_init_rx_cpu_rmap(adapter)) 1998 netif_warn(adapter, probe, adapter->netdev, 1999 "Failed to map IRQs to CPUs\n"); 2000 2001 adapter->msix_vecs = irq_cnt; 2002 set_bit(ENA_FLAG_MSIX_ENABLED, &adapter->flags); 2003 2004 return 0; 2005 } 2006 2007 static void ena_setup_mgmnt_intr(struct ena_adapter *adapter) 2008 { 2009 u32 cpu; 2010 2011 snprintf(adapter->irq_tbl[ENA_MGMNT_IRQ_IDX].name, 2012 ENA_IRQNAME_SIZE, "ena-mgmnt@pci:%s", 2013 pci_name(adapter->pdev)); 2014 adapter->irq_tbl[ENA_MGMNT_IRQ_IDX].handler = 2015 ena_intr_msix_mgmnt; 2016 adapter->irq_tbl[ENA_MGMNT_IRQ_IDX].data = adapter; 2017 adapter->irq_tbl[ENA_MGMNT_IRQ_IDX].vector = 2018 pci_irq_vector(adapter->pdev, ENA_MGMNT_IRQ_IDX); 2019 cpu = cpumask_first(cpu_online_mask); 2020 adapter->irq_tbl[ENA_MGMNT_IRQ_IDX].cpu = cpu; 2021 cpumask_set_cpu(cpu, 2022 &adapter->irq_tbl[ENA_MGMNT_IRQ_IDX].affinity_hint_mask); 2023 } 2024 2025 static void ena_setup_io_intr(struct ena_adapter *adapter) 2026 { 2027 struct net_device *netdev; 2028 int irq_idx, i, cpu; 2029 int io_queue_count; 2030 2031 netdev = adapter->netdev; 2032 io_queue_count = adapter->num_io_queues + adapter->xdp_num_queues; 2033 2034 for (i = 0; i < io_queue_count; i++) { 2035 irq_idx = ENA_IO_IRQ_IDX(i); 2036 cpu = i % num_online_cpus(); 2037 2038 snprintf(adapter->irq_tbl[irq_idx].name, ENA_IRQNAME_SIZE, 2039 "%s-Tx-Rx-%d", netdev->name, i); 2040 adapter->irq_tbl[irq_idx].handler = ena_intr_msix_io; 2041 adapter->irq_tbl[irq_idx].data = &adapter->ena_napi[i]; 2042 adapter->irq_tbl[irq_idx].vector = 2043 pci_irq_vector(adapter->pdev, irq_idx); 2044 adapter->irq_tbl[irq_idx].cpu = cpu; 2045 2046 cpumask_set_cpu(cpu, 2047 &adapter->irq_tbl[irq_idx].affinity_hint_mask); 2048 } 2049 } 2050 2051 static int ena_request_mgmnt_irq(struct ena_adapter *adapter) 2052 { 2053 unsigned long flags = 0; 2054 struct ena_irq *irq; 2055 int rc; 2056 2057 irq = &adapter->irq_tbl[ENA_MGMNT_IRQ_IDX]; 2058 rc = request_irq(irq->vector, irq->handler, flags, irq->name, 2059 irq->data); 2060 if (rc) { 2061 netif_err(adapter, probe, adapter->netdev, 2062 "failed to request admin irq\n"); 2063 return rc; 2064 } 2065 2066 netif_dbg(adapter, probe, adapter->netdev, 2067 "set affinity hint of mgmnt irq.to 0x%lx (irq vector: %d)\n", 2068 irq->affinity_hint_mask.bits[0], irq->vector); 2069 2070 irq_set_affinity_hint(irq->vector, &irq->affinity_hint_mask); 2071 2072 return rc; 2073 } 2074 2075 static int ena_request_io_irq(struct ena_adapter *adapter) 2076 { 2077 u32 io_queue_count = adapter->num_io_queues + adapter->xdp_num_queues; 2078 unsigned long flags = 0; 2079 struct ena_irq *irq; 2080 int rc = 0, i, k; 2081 2082 if (!test_bit(ENA_FLAG_MSIX_ENABLED, &adapter->flags)) { 2083 netif_err(adapter, ifup, adapter->netdev, 2084 "Failed to request I/O IRQ: MSI-X is not enabled\n"); 2085 return -EINVAL; 2086 } 2087 2088 for (i = ENA_IO_IRQ_FIRST_IDX; i < ENA_MAX_MSIX_VEC(io_queue_count); i++) { 2089 irq = &adapter->irq_tbl[i]; 2090 rc = request_irq(irq->vector, irq->handler, flags, irq->name, 2091 irq->data); 2092 if (rc) { 2093 netif_err(adapter, ifup, adapter->netdev, 2094 "Failed to request I/O IRQ. index %d rc %d\n", 2095 i, rc); 2096 goto err; 2097 } 2098 2099 netif_dbg(adapter, ifup, adapter->netdev, 2100 "set affinity hint of irq. index %d to 0x%lx (irq vector: %d)\n", 2101 i, irq->affinity_hint_mask.bits[0], irq->vector); 2102 2103 irq_set_affinity_hint(irq->vector, &irq->affinity_hint_mask); 2104 } 2105 2106 return rc; 2107 2108 err: 2109 for (k = ENA_IO_IRQ_FIRST_IDX; k < i; k++) { 2110 irq = &adapter->irq_tbl[k]; 2111 free_irq(irq->vector, irq->data); 2112 } 2113 2114 return rc; 2115 } 2116 2117 static void ena_free_mgmnt_irq(struct ena_adapter *adapter) 2118 { 2119 struct ena_irq *irq; 2120 2121 irq = &adapter->irq_tbl[ENA_MGMNT_IRQ_IDX]; 2122 synchronize_irq(irq->vector); 2123 irq_set_affinity_hint(irq->vector, NULL); 2124 free_irq(irq->vector, irq->data); 2125 } 2126 2127 static void ena_free_io_irq(struct ena_adapter *adapter) 2128 { 2129 u32 io_queue_count = adapter->num_io_queues + adapter->xdp_num_queues; 2130 struct ena_irq *irq; 2131 int i; 2132 2133 #ifdef CONFIG_RFS_ACCEL 2134 if (adapter->msix_vecs >= 1) { 2135 free_irq_cpu_rmap(adapter->netdev->rx_cpu_rmap); 2136 adapter->netdev->rx_cpu_rmap = NULL; 2137 } 2138 #endif /* CONFIG_RFS_ACCEL */ 2139 2140 for (i = ENA_IO_IRQ_FIRST_IDX; i < ENA_MAX_MSIX_VEC(io_queue_count); i++) { 2141 irq = &adapter->irq_tbl[i]; 2142 irq_set_affinity_hint(irq->vector, NULL); 2143 free_irq(irq->vector, irq->data); 2144 } 2145 } 2146 2147 static void ena_disable_msix(struct ena_adapter *adapter) 2148 { 2149 if (test_and_clear_bit(ENA_FLAG_MSIX_ENABLED, &adapter->flags)) 2150 pci_free_irq_vectors(adapter->pdev); 2151 } 2152 2153 static void ena_disable_io_intr_sync(struct ena_adapter *adapter) 2154 { 2155 u32 io_queue_count = adapter->num_io_queues + adapter->xdp_num_queues; 2156 int i; 2157 2158 if (!netif_running(adapter->netdev)) 2159 return; 2160 2161 for (i = ENA_IO_IRQ_FIRST_IDX; i < ENA_MAX_MSIX_VEC(io_queue_count); i++) 2162 synchronize_irq(adapter->irq_tbl[i].vector); 2163 } 2164 2165 static void ena_del_napi_in_range(struct ena_adapter *adapter, 2166 int first_index, 2167 int count) 2168 { 2169 int i; 2170 2171 for (i = first_index; i < first_index + count; i++) { 2172 /* Check if napi was initialized before */ 2173 if (!ENA_IS_XDP_INDEX(adapter, i) || 2174 adapter->ena_napi[i].xdp_ring) 2175 netif_napi_del(&adapter->ena_napi[i].napi); 2176 else 2177 WARN_ON(ENA_IS_XDP_INDEX(adapter, i) && 2178 adapter->ena_napi[i].xdp_ring); 2179 } 2180 } 2181 2182 static void ena_init_napi_in_range(struct ena_adapter *adapter, 2183 int first_index, int count) 2184 { 2185 struct ena_napi *napi = {0}; 2186 int i; 2187 2188 for (i = first_index; i < first_index + count; i++) { 2189 napi = &adapter->ena_napi[i]; 2190 2191 netif_napi_add(adapter->netdev, 2192 &adapter->ena_napi[i].napi, 2193 ENA_IS_XDP_INDEX(adapter, i) ? ena_xdp_io_poll : ena_io_poll, 2194 ENA_NAPI_BUDGET); 2195 2196 if (!ENA_IS_XDP_INDEX(adapter, i)) { 2197 napi->rx_ring = &adapter->rx_ring[i]; 2198 napi->tx_ring = &adapter->tx_ring[i]; 2199 } else { 2200 napi->xdp_ring = &adapter->tx_ring[i]; 2201 } 2202 napi->qid = i; 2203 } 2204 } 2205 2206 static void ena_napi_disable_in_range(struct ena_adapter *adapter, 2207 int first_index, 2208 int count) 2209 { 2210 int i; 2211 2212 for (i = first_index; i < first_index + count; i++) 2213 napi_disable(&adapter->ena_napi[i].napi); 2214 } 2215 2216 static void ena_napi_enable_in_range(struct ena_adapter *adapter, 2217 int first_index, 2218 int count) 2219 { 2220 int i; 2221 2222 for (i = first_index; i < first_index + count; i++) 2223 napi_enable(&adapter->ena_napi[i].napi); 2224 } 2225 2226 /* Configure the Rx forwarding */ 2227 static int ena_rss_configure(struct ena_adapter *adapter) 2228 { 2229 struct ena_com_dev *ena_dev = adapter->ena_dev; 2230 int rc; 2231 2232 /* In case the RSS table wasn't initialized by probe */ 2233 if (!ena_dev->rss.tbl_log_size) { 2234 rc = ena_rss_init_default(adapter); 2235 if (rc && (rc != -EOPNOTSUPP)) { 2236 netif_err(adapter, ifup, adapter->netdev, 2237 "Failed to init RSS rc: %d\n", rc); 2238 return rc; 2239 } 2240 } 2241 2242 /* Set indirect table */ 2243 rc = ena_com_indirect_table_set(ena_dev); 2244 if (unlikely(rc && rc != -EOPNOTSUPP)) 2245 return rc; 2246 2247 /* Configure hash function (if supported) */ 2248 rc = ena_com_set_hash_function(ena_dev); 2249 if (unlikely(rc && (rc != -EOPNOTSUPP))) 2250 return rc; 2251 2252 /* Configure hash inputs (if supported) */ 2253 rc = ena_com_set_hash_ctrl(ena_dev); 2254 if (unlikely(rc && (rc != -EOPNOTSUPP))) 2255 return rc; 2256 2257 return 0; 2258 } 2259 2260 static int ena_up_complete(struct ena_adapter *adapter) 2261 { 2262 int rc; 2263 2264 rc = ena_rss_configure(adapter); 2265 if (rc) 2266 return rc; 2267 2268 ena_change_mtu(adapter->netdev, adapter->netdev->mtu); 2269 2270 ena_refill_all_rx_bufs(adapter); 2271 2272 /* enable transmits */ 2273 netif_tx_start_all_queues(adapter->netdev); 2274 2275 ena_napi_enable_in_range(adapter, 2276 0, 2277 adapter->xdp_num_queues + adapter->num_io_queues); 2278 2279 return 0; 2280 } 2281 2282 static int ena_create_io_tx_queue(struct ena_adapter *adapter, int qid) 2283 { 2284 struct ena_com_create_io_ctx ctx; 2285 struct ena_com_dev *ena_dev; 2286 struct ena_ring *tx_ring; 2287 u32 msix_vector; 2288 u16 ena_qid; 2289 int rc; 2290 2291 ena_dev = adapter->ena_dev; 2292 2293 tx_ring = &adapter->tx_ring[qid]; 2294 msix_vector = ENA_IO_IRQ_IDX(qid); 2295 ena_qid = ENA_IO_TXQ_IDX(qid); 2296 2297 memset(&ctx, 0x0, sizeof(ctx)); 2298 2299 ctx.direction = ENA_COM_IO_QUEUE_DIRECTION_TX; 2300 ctx.qid = ena_qid; 2301 ctx.mem_queue_type = ena_dev->tx_mem_queue_type; 2302 ctx.msix_vector = msix_vector; 2303 ctx.queue_size = tx_ring->ring_size; 2304 ctx.numa_node = cpu_to_node(tx_ring->cpu); 2305 2306 rc = ena_com_create_io_queue(ena_dev, &ctx); 2307 if (rc) { 2308 netif_err(adapter, ifup, adapter->netdev, 2309 "Failed to create I/O TX queue num %d rc: %d\n", 2310 qid, rc); 2311 return rc; 2312 } 2313 2314 rc = ena_com_get_io_handlers(ena_dev, ena_qid, 2315 &tx_ring->ena_com_io_sq, 2316 &tx_ring->ena_com_io_cq); 2317 if (rc) { 2318 netif_err(adapter, ifup, adapter->netdev, 2319 "Failed to get TX queue handlers. TX queue num %d rc: %d\n", 2320 qid, rc); 2321 ena_com_destroy_io_queue(ena_dev, ena_qid); 2322 return rc; 2323 } 2324 2325 ena_com_update_numa_node(tx_ring->ena_com_io_cq, ctx.numa_node); 2326 return rc; 2327 } 2328 2329 static int ena_create_io_tx_queues_in_range(struct ena_adapter *adapter, 2330 int first_index, int count) 2331 { 2332 struct ena_com_dev *ena_dev = adapter->ena_dev; 2333 int rc, i; 2334 2335 for (i = first_index; i < first_index + count; i++) { 2336 rc = ena_create_io_tx_queue(adapter, i); 2337 if (rc) 2338 goto create_err; 2339 } 2340 2341 return 0; 2342 2343 create_err: 2344 while (i-- > first_index) 2345 ena_com_destroy_io_queue(ena_dev, ENA_IO_TXQ_IDX(i)); 2346 2347 return rc; 2348 } 2349 2350 static int ena_create_io_rx_queue(struct ena_adapter *adapter, int qid) 2351 { 2352 struct ena_com_dev *ena_dev; 2353 struct ena_com_create_io_ctx ctx; 2354 struct ena_ring *rx_ring; 2355 u32 msix_vector; 2356 u16 ena_qid; 2357 int rc; 2358 2359 ena_dev = adapter->ena_dev; 2360 2361 rx_ring = &adapter->rx_ring[qid]; 2362 msix_vector = ENA_IO_IRQ_IDX(qid); 2363 ena_qid = ENA_IO_RXQ_IDX(qid); 2364 2365 memset(&ctx, 0x0, sizeof(ctx)); 2366 2367 ctx.qid = ena_qid; 2368 ctx.direction = ENA_COM_IO_QUEUE_DIRECTION_RX; 2369 ctx.mem_queue_type = ENA_ADMIN_PLACEMENT_POLICY_HOST; 2370 ctx.msix_vector = msix_vector; 2371 ctx.queue_size = rx_ring->ring_size; 2372 ctx.numa_node = cpu_to_node(rx_ring->cpu); 2373 2374 rc = ena_com_create_io_queue(ena_dev, &ctx); 2375 if (rc) { 2376 netif_err(adapter, ifup, adapter->netdev, 2377 "Failed to create I/O RX queue num %d rc: %d\n", 2378 qid, rc); 2379 return rc; 2380 } 2381 2382 rc = ena_com_get_io_handlers(ena_dev, ena_qid, 2383 &rx_ring->ena_com_io_sq, 2384 &rx_ring->ena_com_io_cq); 2385 if (rc) { 2386 netif_err(adapter, ifup, adapter->netdev, 2387 "Failed to get RX queue handlers. RX queue num %d rc: %d\n", 2388 qid, rc); 2389 goto err; 2390 } 2391 2392 ena_com_update_numa_node(rx_ring->ena_com_io_cq, ctx.numa_node); 2393 2394 return rc; 2395 err: 2396 ena_com_destroy_io_queue(ena_dev, ena_qid); 2397 return rc; 2398 } 2399 2400 static int ena_create_all_io_rx_queues(struct ena_adapter *adapter) 2401 { 2402 struct ena_com_dev *ena_dev = adapter->ena_dev; 2403 int rc, i; 2404 2405 for (i = 0; i < adapter->num_io_queues; i++) { 2406 rc = ena_create_io_rx_queue(adapter, i); 2407 if (rc) 2408 goto create_err; 2409 INIT_WORK(&adapter->ena_napi[i].dim.work, ena_dim_work); 2410 } 2411 2412 return 0; 2413 2414 create_err: 2415 while (i--) { 2416 cancel_work_sync(&adapter->ena_napi[i].dim.work); 2417 ena_com_destroy_io_queue(ena_dev, ENA_IO_RXQ_IDX(i)); 2418 } 2419 2420 return rc; 2421 } 2422 2423 static void set_io_rings_size(struct ena_adapter *adapter, 2424 int new_tx_size, 2425 int new_rx_size) 2426 { 2427 int i; 2428 2429 for (i = 0; i < adapter->num_io_queues; i++) { 2430 adapter->tx_ring[i].ring_size = new_tx_size; 2431 adapter->rx_ring[i].ring_size = new_rx_size; 2432 } 2433 } 2434 2435 /* This function allows queue allocation to backoff when the system is 2436 * low on memory. If there is not enough memory to allocate io queues 2437 * the driver will try to allocate smaller queues. 2438 * 2439 * The backoff algorithm is as follows: 2440 * 1. Try to allocate TX and RX and if successful. 2441 * 1.1. return success 2442 * 2443 * 2. Divide by 2 the size of the larger of RX and TX queues (or both if their size is the same). 2444 * 2445 * 3. If TX or RX is smaller than 256 2446 * 3.1. return failure. 2447 * 4. else 2448 * 4.1. go back to 1. 2449 */ 2450 static int create_queues_with_size_backoff(struct ena_adapter *adapter) 2451 { 2452 int rc, cur_rx_ring_size, cur_tx_ring_size; 2453 int new_rx_ring_size, new_tx_ring_size; 2454 2455 /* current queue sizes might be set to smaller than the requested 2456 * ones due to past queue allocation failures. 2457 */ 2458 set_io_rings_size(adapter, adapter->requested_tx_ring_size, 2459 adapter->requested_rx_ring_size); 2460 2461 while (1) { 2462 if (ena_xdp_present(adapter)) { 2463 rc = ena_setup_and_create_all_xdp_queues(adapter); 2464 2465 if (rc) 2466 goto err_setup_tx; 2467 } 2468 rc = ena_setup_tx_resources_in_range(adapter, 2469 0, 2470 adapter->num_io_queues); 2471 if (rc) 2472 goto err_setup_tx; 2473 2474 rc = ena_create_io_tx_queues_in_range(adapter, 2475 0, 2476 adapter->num_io_queues); 2477 if (rc) 2478 goto err_create_tx_queues; 2479 2480 rc = ena_setup_all_rx_resources(adapter); 2481 if (rc) 2482 goto err_setup_rx; 2483 2484 rc = ena_create_all_io_rx_queues(adapter); 2485 if (rc) 2486 goto err_create_rx_queues; 2487 2488 return 0; 2489 2490 err_create_rx_queues: 2491 ena_free_all_io_rx_resources(adapter); 2492 err_setup_rx: 2493 ena_destroy_all_tx_queues(adapter); 2494 err_create_tx_queues: 2495 ena_free_all_io_tx_resources(adapter); 2496 err_setup_tx: 2497 if (rc != -ENOMEM) { 2498 netif_err(adapter, ifup, adapter->netdev, 2499 "Queue creation failed with error code %d\n", 2500 rc); 2501 return rc; 2502 } 2503 2504 cur_tx_ring_size = adapter->tx_ring[0].ring_size; 2505 cur_rx_ring_size = adapter->rx_ring[0].ring_size; 2506 2507 netif_err(adapter, ifup, adapter->netdev, 2508 "Not enough memory to create queues with sizes TX=%d, RX=%d\n", 2509 cur_tx_ring_size, cur_rx_ring_size); 2510 2511 new_tx_ring_size = cur_tx_ring_size; 2512 new_rx_ring_size = cur_rx_ring_size; 2513 2514 /* Decrease the size of the larger queue, or 2515 * decrease both if they are the same size. 2516 */ 2517 if (cur_rx_ring_size <= cur_tx_ring_size) 2518 new_tx_ring_size = cur_tx_ring_size / 2; 2519 if (cur_rx_ring_size >= cur_tx_ring_size) 2520 new_rx_ring_size = cur_rx_ring_size / 2; 2521 2522 if (new_tx_ring_size < ENA_MIN_RING_SIZE || 2523 new_rx_ring_size < ENA_MIN_RING_SIZE) { 2524 netif_err(adapter, ifup, adapter->netdev, 2525 "Queue creation failed with the smallest possible queue size of %d for both queues. Not retrying with smaller queues\n", 2526 ENA_MIN_RING_SIZE); 2527 return rc; 2528 } 2529 2530 netif_err(adapter, ifup, adapter->netdev, 2531 "Retrying queue creation with sizes TX=%d, RX=%d\n", 2532 new_tx_ring_size, 2533 new_rx_ring_size); 2534 2535 set_io_rings_size(adapter, new_tx_ring_size, 2536 new_rx_ring_size); 2537 } 2538 } 2539 2540 static int ena_up(struct ena_adapter *adapter) 2541 { 2542 int io_queue_count, rc, i; 2543 2544 netdev_dbg(adapter->netdev, "%s\n", __func__); 2545 2546 io_queue_count = adapter->num_io_queues + adapter->xdp_num_queues; 2547 ena_setup_io_intr(adapter); 2548 2549 /* napi poll functions should be initialized before running 2550 * request_irq(), to handle a rare condition where there is a pending 2551 * interrupt, causing the ISR to fire immediately while the poll 2552 * function wasn't set yet, causing a null dereference 2553 */ 2554 ena_init_napi_in_range(adapter, 0, io_queue_count); 2555 2556 rc = ena_request_io_irq(adapter); 2557 if (rc) 2558 goto err_req_irq; 2559 2560 rc = create_queues_with_size_backoff(adapter); 2561 if (rc) 2562 goto err_create_queues_with_backoff; 2563 2564 rc = ena_up_complete(adapter); 2565 if (rc) 2566 goto err_up; 2567 2568 if (test_bit(ENA_FLAG_LINK_UP, &adapter->flags)) 2569 netif_carrier_on(adapter->netdev); 2570 2571 u64_stats_update_begin(&adapter->syncp); 2572 adapter->dev_stats.interface_up++; 2573 u64_stats_update_end(&adapter->syncp); 2574 2575 set_bit(ENA_FLAG_DEV_UP, &adapter->flags); 2576 2577 /* Enable completion queues interrupt */ 2578 for (i = 0; i < adapter->num_io_queues; i++) 2579 ena_unmask_interrupt(&adapter->tx_ring[i], 2580 &adapter->rx_ring[i]); 2581 2582 /* schedule napi in case we had pending packets 2583 * from the last time we disable napi 2584 */ 2585 for (i = 0; i < io_queue_count; i++) 2586 napi_schedule(&adapter->ena_napi[i].napi); 2587 2588 return rc; 2589 2590 err_up: 2591 ena_destroy_all_tx_queues(adapter); 2592 ena_free_all_io_tx_resources(adapter); 2593 ena_destroy_all_rx_queues(adapter); 2594 ena_free_all_io_rx_resources(adapter); 2595 err_create_queues_with_backoff: 2596 ena_free_io_irq(adapter); 2597 err_req_irq: 2598 ena_del_napi_in_range(adapter, 0, io_queue_count); 2599 2600 return rc; 2601 } 2602 2603 static void ena_down(struct ena_adapter *adapter) 2604 { 2605 int io_queue_count = adapter->num_io_queues + adapter->xdp_num_queues; 2606 2607 netif_info(adapter, ifdown, adapter->netdev, "%s\n", __func__); 2608 2609 clear_bit(ENA_FLAG_DEV_UP, &adapter->flags); 2610 2611 u64_stats_update_begin(&adapter->syncp); 2612 adapter->dev_stats.interface_down++; 2613 u64_stats_update_end(&adapter->syncp); 2614 2615 netif_carrier_off(adapter->netdev); 2616 netif_tx_disable(adapter->netdev); 2617 2618 /* After this point the napi handler won't enable the tx queue */ 2619 ena_napi_disable_in_range(adapter, 0, io_queue_count); 2620 2621 /* After destroy the queue there won't be any new interrupts */ 2622 2623 if (test_bit(ENA_FLAG_TRIGGER_RESET, &adapter->flags)) { 2624 int rc; 2625 2626 rc = ena_com_dev_reset(adapter->ena_dev, adapter->reset_reason); 2627 if (rc) 2628 dev_err(&adapter->pdev->dev, "Device reset failed\n"); 2629 /* stop submitting admin commands on a device that was reset */ 2630 ena_com_set_admin_running_state(adapter->ena_dev, false); 2631 } 2632 2633 ena_destroy_all_io_queues(adapter); 2634 2635 ena_disable_io_intr_sync(adapter); 2636 ena_free_io_irq(adapter); 2637 ena_del_napi_in_range(adapter, 0, io_queue_count); 2638 2639 ena_free_all_tx_bufs(adapter); 2640 ena_free_all_rx_bufs(adapter); 2641 ena_free_all_io_tx_resources(adapter); 2642 ena_free_all_io_rx_resources(adapter); 2643 } 2644 2645 /* ena_open - Called when a network interface is made active 2646 * @netdev: network interface device structure 2647 * 2648 * Returns 0 on success, negative value on failure 2649 * 2650 * The open entry point is called when a network interface is made 2651 * active by the system (IFF_UP). At this point all resources needed 2652 * for transmit and receive operations are allocated, the interrupt 2653 * handler is registered with the OS, the watchdog timer is started, 2654 * and the stack is notified that the interface is ready. 2655 */ 2656 static int ena_open(struct net_device *netdev) 2657 { 2658 struct ena_adapter *adapter = netdev_priv(netdev); 2659 int rc; 2660 2661 /* Notify the stack of the actual queue counts. */ 2662 rc = netif_set_real_num_tx_queues(netdev, adapter->num_io_queues); 2663 if (rc) { 2664 netif_err(adapter, ifup, netdev, "Can't set num tx queues\n"); 2665 return rc; 2666 } 2667 2668 rc = netif_set_real_num_rx_queues(netdev, adapter->num_io_queues); 2669 if (rc) { 2670 netif_err(adapter, ifup, netdev, "Can't set num rx queues\n"); 2671 return rc; 2672 } 2673 2674 rc = ena_up(adapter); 2675 if (rc) 2676 return rc; 2677 2678 return rc; 2679 } 2680 2681 /* ena_close - Disables a network interface 2682 * @netdev: network interface device structure 2683 * 2684 * Returns 0, this is not allowed to fail 2685 * 2686 * The close entry point is called when an interface is de-activated 2687 * by the OS. The hardware is still under the drivers control, but 2688 * needs to be disabled. A global MAC reset is issued to stop the 2689 * hardware, and all transmit and receive resources are freed. 2690 */ 2691 static int ena_close(struct net_device *netdev) 2692 { 2693 struct ena_adapter *adapter = netdev_priv(netdev); 2694 2695 netif_dbg(adapter, ifdown, netdev, "%s\n", __func__); 2696 2697 if (!test_bit(ENA_FLAG_DEVICE_RUNNING, &adapter->flags)) 2698 return 0; 2699 2700 if (test_bit(ENA_FLAG_DEV_UP, &adapter->flags)) 2701 ena_down(adapter); 2702 2703 /* Check for device status and issue reset if needed*/ 2704 check_for_admin_com_state(adapter); 2705 if (unlikely(test_bit(ENA_FLAG_TRIGGER_RESET, &adapter->flags))) { 2706 netif_err(adapter, ifdown, adapter->netdev, 2707 "Destroy failure, restarting device\n"); 2708 ena_dump_stats_to_dmesg(adapter); 2709 /* rtnl lock already obtained in dev_ioctl() layer */ 2710 ena_destroy_device(adapter, false); 2711 ena_restore_device(adapter); 2712 } 2713 2714 return 0; 2715 } 2716 2717 int ena_update_queue_sizes(struct ena_adapter *adapter, 2718 u32 new_tx_size, 2719 u32 new_rx_size) 2720 { 2721 bool dev_was_up; 2722 2723 dev_was_up = test_bit(ENA_FLAG_DEV_UP, &adapter->flags); 2724 ena_close(adapter->netdev); 2725 adapter->requested_tx_ring_size = new_tx_size; 2726 adapter->requested_rx_ring_size = new_rx_size; 2727 ena_init_io_rings(adapter, 2728 0, 2729 adapter->xdp_num_queues + 2730 adapter->num_io_queues); 2731 return dev_was_up ? ena_up(adapter) : 0; 2732 } 2733 2734 int ena_update_queue_count(struct ena_adapter *adapter, u32 new_channel_count) 2735 { 2736 struct ena_com_dev *ena_dev = adapter->ena_dev; 2737 int prev_channel_count; 2738 bool dev_was_up; 2739 2740 dev_was_up = test_bit(ENA_FLAG_DEV_UP, &adapter->flags); 2741 ena_close(adapter->netdev); 2742 prev_channel_count = adapter->num_io_queues; 2743 adapter->num_io_queues = new_channel_count; 2744 if (ena_xdp_present(adapter) && 2745 ena_xdp_allowed(adapter) == ENA_XDP_ALLOWED) { 2746 adapter->xdp_first_ring = new_channel_count; 2747 adapter->xdp_num_queues = new_channel_count; 2748 if (prev_channel_count > new_channel_count) 2749 ena_xdp_exchange_program_rx_in_range(adapter, 2750 NULL, 2751 new_channel_count, 2752 prev_channel_count); 2753 else 2754 ena_xdp_exchange_program_rx_in_range(adapter, 2755 adapter->xdp_bpf_prog, 2756 prev_channel_count, 2757 new_channel_count); 2758 } 2759 2760 /* We need to destroy the rss table so that the indirection 2761 * table will be reinitialized by ena_up() 2762 */ 2763 ena_com_rss_destroy(ena_dev); 2764 ena_init_io_rings(adapter, 2765 0, 2766 adapter->xdp_num_queues + 2767 adapter->num_io_queues); 2768 return dev_was_up ? ena_open(adapter->netdev) : 0; 2769 } 2770 2771 static void ena_tx_csum(struct ena_com_tx_ctx *ena_tx_ctx, struct sk_buff *skb) 2772 { 2773 u32 mss = skb_shinfo(skb)->gso_size; 2774 struct ena_com_tx_meta *ena_meta = &ena_tx_ctx->ena_meta; 2775 u8 l4_protocol = 0; 2776 2777 if ((skb->ip_summed == CHECKSUM_PARTIAL) || mss) { 2778 ena_tx_ctx->l4_csum_enable = 1; 2779 if (mss) { 2780 ena_tx_ctx->tso_enable = 1; 2781 ena_meta->l4_hdr_len = tcp_hdr(skb)->doff; 2782 ena_tx_ctx->l4_csum_partial = 0; 2783 } else { 2784 ena_tx_ctx->tso_enable = 0; 2785 ena_meta->l4_hdr_len = 0; 2786 ena_tx_ctx->l4_csum_partial = 1; 2787 } 2788 2789 switch (ip_hdr(skb)->version) { 2790 case IPVERSION: 2791 ena_tx_ctx->l3_proto = ENA_ETH_IO_L3_PROTO_IPV4; 2792 if (ip_hdr(skb)->frag_off & htons(IP_DF)) 2793 ena_tx_ctx->df = 1; 2794 if (mss) 2795 ena_tx_ctx->l3_csum_enable = 1; 2796 l4_protocol = ip_hdr(skb)->protocol; 2797 break; 2798 case 6: 2799 ena_tx_ctx->l3_proto = ENA_ETH_IO_L3_PROTO_IPV6; 2800 l4_protocol = ipv6_hdr(skb)->nexthdr; 2801 break; 2802 default: 2803 break; 2804 } 2805 2806 if (l4_protocol == IPPROTO_TCP) 2807 ena_tx_ctx->l4_proto = ENA_ETH_IO_L4_PROTO_TCP; 2808 else 2809 ena_tx_ctx->l4_proto = ENA_ETH_IO_L4_PROTO_UDP; 2810 2811 ena_meta->mss = mss; 2812 ena_meta->l3_hdr_len = skb_network_header_len(skb); 2813 ena_meta->l3_hdr_offset = skb_network_offset(skb); 2814 ena_tx_ctx->meta_valid = 1; 2815 2816 } else { 2817 ena_tx_ctx->meta_valid = 0; 2818 } 2819 } 2820 2821 static int ena_check_and_linearize_skb(struct ena_ring *tx_ring, 2822 struct sk_buff *skb) 2823 { 2824 int num_frags, header_len, rc; 2825 2826 num_frags = skb_shinfo(skb)->nr_frags; 2827 header_len = skb_headlen(skb); 2828 2829 if (num_frags < tx_ring->sgl_size) 2830 return 0; 2831 2832 if ((num_frags == tx_ring->sgl_size) && 2833 (header_len < tx_ring->tx_max_header_size)) 2834 return 0; 2835 2836 u64_stats_update_begin(&tx_ring->syncp); 2837 tx_ring->tx_stats.linearize++; 2838 u64_stats_update_end(&tx_ring->syncp); 2839 2840 rc = skb_linearize(skb); 2841 if (unlikely(rc)) { 2842 u64_stats_update_begin(&tx_ring->syncp); 2843 tx_ring->tx_stats.linearize_failed++; 2844 u64_stats_update_end(&tx_ring->syncp); 2845 } 2846 2847 return rc; 2848 } 2849 2850 static int ena_tx_map_skb(struct ena_ring *tx_ring, 2851 struct ena_tx_buffer *tx_info, 2852 struct sk_buff *skb, 2853 void **push_hdr, 2854 u16 *header_len) 2855 { 2856 struct ena_adapter *adapter = tx_ring->adapter; 2857 struct ena_com_buf *ena_buf; 2858 dma_addr_t dma; 2859 u32 skb_head_len, frag_len, last_frag; 2860 u16 push_len = 0; 2861 u16 delta = 0; 2862 int i = 0; 2863 2864 skb_head_len = skb_headlen(skb); 2865 tx_info->skb = skb; 2866 ena_buf = tx_info->bufs; 2867 2868 if (tx_ring->tx_mem_queue_type == ENA_ADMIN_PLACEMENT_POLICY_DEV) { 2869 /* When the device is LLQ mode, the driver will copy 2870 * the header into the device memory space. 2871 * the ena_com layer assume the header is in a linear 2872 * memory space. 2873 * This assumption might be wrong since part of the header 2874 * can be in the fragmented buffers. 2875 * Use skb_header_pointer to make sure the header is in a 2876 * linear memory space. 2877 */ 2878 2879 push_len = min_t(u32, skb->len, tx_ring->tx_max_header_size); 2880 *push_hdr = skb_header_pointer(skb, 0, push_len, 2881 tx_ring->push_buf_intermediate_buf); 2882 *header_len = push_len; 2883 if (unlikely(skb->data != *push_hdr)) { 2884 u64_stats_update_begin(&tx_ring->syncp); 2885 tx_ring->tx_stats.llq_buffer_copy++; 2886 u64_stats_update_end(&tx_ring->syncp); 2887 2888 delta = push_len - skb_head_len; 2889 } 2890 } else { 2891 *push_hdr = NULL; 2892 *header_len = min_t(u32, skb_head_len, 2893 tx_ring->tx_max_header_size); 2894 } 2895 2896 netif_dbg(adapter, tx_queued, adapter->netdev, 2897 "skb: %p header_buf->vaddr: %p push_len: %d\n", skb, 2898 *push_hdr, push_len); 2899 2900 if (skb_head_len > push_len) { 2901 dma = dma_map_single(tx_ring->dev, skb->data + push_len, 2902 skb_head_len - push_len, DMA_TO_DEVICE); 2903 if (unlikely(dma_mapping_error(tx_ring->dev, dma))) 2904 goto error_report_dma_error; 2905 2906 ena_buf->paddr = dma; 2907 ena_buf->len = skb_head_len - push_len; 2908 2909 ena_buf++; 2910 tx_info->num_of_bufs++; 2911 tx_info->map_linear_data = 1; 2912 } else { 2913 tx_info->map_linear_data = 0; 2914 } 2915 2916 last_frag = skb_shinfo(skb)->nr_frags; 2917 2918 for (i = 0; i < last_frag; i++) { 2919 const skb_frag_t *frag = &skb_shinfo(skb)->frags[i]; 2920 2921 frag_len = skb_frag_size(frag); 2922 2923 if (unlikely(delta >= frag_len)) { 2924 delta -= frag_len; 2925 continue; 2926 } 2927 2928 dma = skb_frag_dma_map(tx_ring->dev, frag, delta, 2929 frag_len - delta, DMA_TO_DEVICE); 2930 if (unlikely(dma_mapping_error(tx_ring->dev, dma))) 2931 goto error_report_dma_error; 2932 2933 ena_buf->paddr = dma; 2934 ena_buf->len = frag_len - delta; 2935 ena_buf++; 2936 tx_info->num_of_bufs++; 2937 delta = 0; 2938 } 2939 2940 return 0; 2941 2942 error_report_dma_error: 2943 u64_stats_update_begin(&tx_ring->syncp); 2944 tx_ring->tx_stats.dma_mapping_err++; 2945 u64_stats_update_end(&tx_ring->syncp); 2946 netdev_warn(adapter->netdev, "failed to map skb\n"); 2947 2948 tx_info->skb = NULL; 2949 2950 tx_info->num_of_bufs += i; 2951 ena_unmap_tx_buff(tx_ring, tx_info); 2952 2953 return -EINVAL; 2954 } 2955 2956 /* Called with netif_tx_lock. */ 2957 static netdev_tx_t ena_start_xmit(struct sk_buff *skb, struct net_device *dev) 2958 { 2959 struct ena_adapter *adapter = netdev_priv(dev); 2960 struct ena_tx_buffer *tx_info; 2961 struct ena_com_tx_ctx ena_tx_ctx; 2962 struct ena_ring *tx_ring; 2963 struct netdev_queue *txq; 2964 void *push_hdr; 2965 u16 next_to_use, req_id, header_len; 2966 int qid, rc; 2967 2968 netif_dbg(adapter, tx_queued, dev, "%s skb %p\n", __func__, skb); 2969 /* Determine which tx ring we will be placed on */ 2970 qid = skb_get_queue_mapping(skb); 2971 tx_ring = &adapter->tx_ring[qid]; 2972 txq = netdev_get_tx_queue(dev, qid); 2973 2974 rc = ena_check_and_linearize_skb(tx_ring, skb); 2975 if (unlikely(rc)) 2976 goto error_drop_packet; 2977 2978 skb_tx_timestamp(skb); 2979 2980 next_to_use = tx_ring->next_to_use; 2981 req_id = tx_ring->free_ids[next_to_use]; 2982 tx_info = &tx_ring->tx_buffer_info[req_id]; 2983 tx_info->num_of_bufs = 0; 2984 2985 WARN(tx_info->skb, "SKB isn't NULL req_id %d\n", req_id); 2986 2987 rc = ena_tx_map_skb(tx_ring, tx_info, skb, &push_hdr, &header_len); 2988 if (unlikely(rc)) 2989 goto error_drop_packet; 2990 2991 memset(&ena_tx_ctx, 0x0, sizeof(struct ena_com_tx_ctx)); 2992 ena_tx_ctx.ena_bufs = tx_info->bufs; 2993 ena_tx_ctx.push_header = push_hdr; 2994 ena_tx_ctx.num_bufs = tx_info->num_of_bufs; 2995 ena_tx_ctx.req_id = req_id; 2996 ena_tx_ctx.header_len = header_len; 2997 2998 /* set flags and meta data */ 2999 ena_tx_csum(&ena_tx_ctx, skb); 3000 3001 rc = ena_xmit_common(dev, 3002 tx_ring, 3003 tx_info, 3004 &ena_tx_ctx, 3005 next_to_use, 3006 skb->len); 3007 if (rc) 3008 goto error_unmap_dma; 3009 3010 netdev_tx_sent_queue(txq, skb->len); 3011 3012 /* stop the queue when no more space available, the packet can have up 3013 * to sgl_size + 2. one for the meta descriptor and one for header 3014 * (if the header is larger than tx_max_header_size). 3015 */ 3016 if (unlikely(!ena_com_sq_have_enough_space(tx_ring->ena_com_io_sq, 3017 tx_ring->sgl_size + 2))) { 3018 netif_dbg(adapter, tx_queued, dev, "%s stop queue %d\n", 3019 __func__, qid); 3020 3021 netif_tx_stop_queue(txq); 3022 u64_stats_update_begin(&tx_ring->syncp); 3023 tx_ring->tx_stats.queue_stop++; 3024 u64_stats_update_end(&tx_ring->syncp); 3025 3026 /* There is a rare condition where this function decide to 3027 * stop the queue but meanwhile clean_tx_irq updates 3028 * next_to_completion and terminates. 3029 * The queue will remain stopped forever. 3030 * To solve this issue add a mb() to make sure that 3031 * netif_tx_stop_queue() write is vissible before checking if 3032 * there is additional space in the queue. 3033 */ 3034 smp_mb(); 3035 3036 if (ena_com_sq_have_enough_space(tx_ring->ena_com_io_sq, 3037 ENA_TX_WAKEUP_THRESH)) { 3038 netif_tx_wake_queue(txq); 3039 u64_stats_update_begin(&tx_ring->syncp); 3040 tx_ring->tx_stats.queue_wakeup++; 3041 u64_stats_update_end(&tx_ring->syncp); 3042 } 3043 } 3044 3045 if (netif_xmit_stopped(txq) || !netdev_xmit_more()) { 3046 /* trigger the dma engine. ena_com_write_sq_doorbell() 3047 * has a mb 3048 */ 3049 ena_com_write_sq_doorbell(tx_ring->ena_com_io_sq); 3050 u64_stats_update_begin(&tx_ring->syncp); 3051 tx_ring->tx_stats.doorbells++; 3052 u64_stats_update_end(&tx_ring->syncp); 3053 } 3054 3055 return NETDEV_TX_OK; 3056 3057 error_unmap_dma: 3058 ena_unmap_tx_buff(tx_ring, tx_info); 3059 tx_info->skb = NULL; 3060 3061 error_drop_packet: 3062 dev_kfree_skb(skb); 3063 return NETDEV_TX_OK; 3064 } 3065 3066 static u16 ena_select_queue(struct net_device *dev, struct sk_buff *skb, 3067 struct net_device *sb_dev) 3068 { 3069 u16 qid; 3070 /* we suspect that this is good for in--kernel network services that 3071 * want to loop incoming skb rx to tx in normal user generated traffic, 3072 * most probably we will not get to this 3073 */ 3074 if (skb_rx_queue_recorded(skb)) 3075 qid = skb_get_rx_queue(skb); 3076 else 3077 qid = netdev_pick_tx(dev, skb, NULL); 3078 3079 return qid; 3080 } 3081 3082 static void ena_config_host_info(struct ena_com_dev *ena_dev, 3083 struct pci_dev *pdev) 3084 { 3085 struct ena_admin_host_info *host_info; 3086 int rc; 3087 3088 /* Allocate only the host info */ 3089 rc = ena_com_allocate_host_info(ena_dev); 3090 if (rc) { 3091 pr_err("Cannot allocate host info\n"); 3092 return; 3093 } 3094 3095 host_info = ena_dev->host_attr.host_info; 3096 3097 host_info->bdf = (pdev->bus->number << 8) | pdev->devfn; 3098 host_info->os_type = ENA_ADMIN_OS_LINUX; 3099 host_info->kernel_ver = LINUX_VERSION_CODE; 3100 strlcpy(host_info->kernel_ver_str, utsname()->version, 3101 sizeof(host_info->kernel_ver_str) - 1); 3102 host_info->os_dist = 0; 3103 strncpy(host_info->os_dist_str, utsname()->release, 3104 sizeof(host_info->os_dist_str) - 1); 3105 host_info->driver_version = 3106 (DRV_MODULE_GEN_MAJOR) | 3107 (DRV_MODULE_GEN_MINOR << ENA_ADMIN_HOST_INFO_MINOR_SHIFT) | 3108 (DRV_MODULE_GEN_SUBMINOR << ENA_ADMIN_HOST_INFO_SUB_MINOR_SHIFT) | 3109 ("K"[0] << ENA_ADMIN_HOST_INFO_MODULE_TYPE_SHIFT); 3110 host_info->num_cpus = num_online_cpus(); 3111 3112 host_info->driver_supported_features = 3113 ENA_ADMIN_HOST_INFO_INTERRUPT_MODERATION_MASK; 3114 3115 rc = ena_com_set_host_attributes(ena_dev); 3116 if (rc) { 3117 if (rc == -EOPNOTSUPP) 3118 pr_warn("Cannot set host attributes\n"); 3119 else 3120 pr_err("Cannot set host attributes\n"); 3121 3122 goto err; 3123 } 3124 3125 return; 3126 3127 err: 3128 ena_com_delete_host_info(ena_dev); 3129 } 3130 3131 static void ena_config_debug_area(struct ena_adapter *adapter) 3132 { 3133 u32 debug_area_size; 3134 int rc, ss_count; 3135 3136 ss_count = ena_get_sset_count(adapter->netdev, ETH_SS_STATS); 3137 if (ss_count <= 0) { 3138 netif_err(adapter, drv, adapter->netdev, 3139 "SS count is negative\n"); 3140 return; 3141 } 3142 3143 /* allocate 32 bytes for each string and 64bit for the value */ 3144 debug_area_size = ss_count * ETH_GSTRING_LEN + sizeof(u64) * ss_count; 3145 3146 rc = ena_com_allocate_debug_area(adapter->ena_dev, debug_area_size); 3147 if (rc) { 3148 pr_err("Cannot allocate debug area\n"); 3149 return; 3150 } 3151 3152 rc = ena_com_set_host_attributes(adapter->ena_dev); 3153 if (rc) { 3154 if (rc == -EOPNOTSUPP) 3155 netif_warn(adapter, drv, adapter->netdev, 3156 "Cannot set host attributes\n"); 3157 else 3158 netif_err(adapter, drv, adapter->netdev, 3159 "Cannot set host attributes\n"); 3160 goto err; 3161 } 3162 3163 return; 3164 err: 3165 ena_com_delete_debug_area(adapter->ena_dev); 3166 } 3167 3168 static void ena_get_stats64(struct net_device *netdev, 3169 struct rtnl_link_stats64 *stats) 3170 { 3171 struct ena_adapter *adapter = netdev_priv(netdev); 3172 struct ena_ring *rx_ring, *tx_ring; 3173 unsigned int start; 3174 u64 rx_drops; 3175 u64 tx_drops; 3176 int i; 3177 3178 if (!test_bit(ENA_FLAG_DEV_UP, &adapter->flags)) 3179 return; 3180 3181 for (i = 0; i < adapter->num_io_queues; i++) { 3182 u64 bytes, packets; 3183 3184 tx_ring = &adapter->tx_ring[i]; 3185 3186 do { 3187 start = u64_stats_fetch_begin_irq(&tx_ring->syncp); 3188 packets = tx_ring->tx_stats.cnt; 3189 bytes = tx_ring->tx_stats.bytes; 3190 } while (u64_stats_fetch_retry_irq(&tx_ring->syncp, start)); 3191 3192 stats->tx_packets += packets; 3193 stats->tx_bytes += bytes; 3194 3195 rx_ring = &adapter->rx_ring[i]; 3196 3197 do { 3198 start = u64_stats_fetch_begin_irq(&rx_ring->syncp); 3199 packets = rx_ring->rx_stats.cnt; 3200 bytes = rx_ring->rx_stats.bytes; 3201 } while (u64_stats_fetch_retry_irq(&rx_ring->syncp, start)); 3202 3203 stats->rx_packets += packets; 3204 stats->rx_bytes += bytes; 3205 } 3206 3207 do { 3208 start = u64_stats_fetch_begin_irq(&adapter->syncp); 3209 rx_drops = adapter->dev_stats.rx_drops; 3210 tx_drops = adapter->dev_stats.tx_drops; 3211 } while (u64_stats_fetch_retry_irq(&adapter->syncp, start)); 3212 3213 stats->rx_dropped = rx_drops; 3214 stats->tx_dropped = tx_drops; 3215 3216 stats->multicast = 0; 3217 stats->collisions = 0; 3218 3219 stats->rx_length_errors = 0; 3220 stats->rx_crc_errors = 0; 3221 stats->rx_frame_errors = 0; 3222 stats->rx_fifo_errors = 0; 3223 stats->rx_missed_errors = 0; 3224 stats->tx_window_errors = 0; 3225 3226 stats->rx_errors = 0; 3227 stats->tx_errors = 0; 3228 } 3229 3230 static const struct net_device_ops ena_netdev_ops = { 3231 .ndo_open = ena_open, 3232 .ndo_stop = ena_close, 3233 .ndo_start_xmit = ena_start_xmit, 3234 .ndo_select_queue = ena_select_queue, 3235 .ndo_get_stats64 = ena_get_stats64, 3236 .ndo_tx_timeout = ena_tx_timeout, 3237 .ndo_change_mtu = ena_change_mtu, 3238 .ndo_set_mac_address = NULL, 3239 .ndo_validate_addr = eth_validate_addr, 3240 .ndo_bpf = ena_xdp, 3241 }; 3242 3243 static int ena_device_validate_params(struct ena_adapter *adapter, 3244 struct ena_com_dev_get_features_ctx *get_feat_ctx) 3245 { 3246 struct net_device *netdev = adapter->netdev; 3247 int rc; 3248 3249 rc = ether_addr_equal(get_feat_ctx->dev_attr.mac_addr, 3250 adapter->mac_addr); 3251 if (!rc) { 3252 netif_err(adapter, drv, netdev, 3253 "Error, mac address are different\n"); 3254 return -EINVAL; 3255 } 3256 3257 if (get_feat_ctx->dev_attr.max_mtu < netdev->mtu) { 3258 netif_err(adapter, drv, netdev, 3259 "Error, device max mtu is smaller than netdev MTU\n"); 3260 return -EINVAL; 3261 } 3262 3263 return 0; 3264 } 3265 3266 static int ena_device_init(struct ena_com_dev *ena_dev, struct pci_dev *pdev, 3267 struct ena_com_dev_get_features_ctx *get_feat_ctx, 3268 bool *wd_state) 3269 { 3270 struct device *dev = &pdev->dev; 3271 bool readless_supported; 3272 u32 aenq_groups; 3273 int dma_width; 3274 int rc; 3275 3276 rc = ena_com_mmio_reg_read_request_init(ena_dev); 3277 if (rc) { 3278 dev_err(dev, "failed to init mmio read less\n"); 3279 return rc; 3280 } 3281 3282 /* The PCIe configuration space revision id indicate if mmio reg 3283 * read is disabled 3284 */ 3285 readless_supported = !(pdev->revision & ENA_MMIO_DISABLE_REG_READ); 3286 ena_com_set_mmio_read_mode(ena_dev, readless_supported); 3287 3288 rc = ena_com_dev_reset(ena_dev, ENA_REGS_RESET_NORMAL); 3289 if (rc) { 3290 dev_err(dev, "Can not reset device\n"); 3291 goto err_mmio_read_less; 3292 } 3293 3294 rc = ena_com_validate_version(ena_dev); 3295 if (rc) { 3296 dev_err(dev, "device version is too low\n"); 3297 goto err_mmio_read_less; 3298 } 3299 3300 dma_width = ena_com_get_dma_width(ena_dev); 3301 if (dma_width < 0) { 3302 dev_err(dev, "Invalid dma width value %d", dma_width); 3303 rc = dma_width; 3304 goto err_mmio_read_less; 3305 } 3306 3307 rc = pci_set_dma_mask(pdev, DMA_BIT_MASK(dma_width)); 3308 if (rc) { 3309 dev_err(dev, "pci_set_dma_mask failed 0x%x\n", rc); 3310 goto err_mmio_read_less; 3311 } 3312 3313 rc = pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(dma_width)); 3314 if (rc) { 3315 dev_err(dev, "err_pci_set_consistent_dma_mask failed 0x%x\n", 3316 rc); 3317 goto err_mmio_read_less; 3318 } 3319 3320 /* ENA admin level init */ 3321 rc = ena_com_admin_init(ena_dev, &aenq_handlers); 3322 if (rc) { 3323 dev_err(dev, 3324 "Can not initialize ena admin queue with device\n"); 3325 goto err_mmio_read_less; 3326 } 3327 3328 /* To enable the msix interrupts the driver needs to know the number 3329 * of queues. So the driver uses polling mode to retrieve this 3330 * information 3331 */ 3332 ena_com_set_admin_polling_mode(ena_dev, true); 3333 3334 ena_config_host_info(ena_dev, pdev); 3335 3336 /* Get Device Attributes*/ 3337 rc = ena_com_get_dev_attr_feat(ena_dev, get_feat_ctx); 3338 if (rc) { 3339 dev_err(dev, "Cannot get attribute for ena device rc=%d\n", rc); 3340 goto err_admin_init; 3341 } 3342 3343 /* Try to turn all the available aenq groups */ 3344 aenq_groups = BIT(ENA_ADMIN_LINK_CHANGE) | 3345 BIT(ENA_ADMIN_FATAL_ERROR) | 3346 BIT(ENA_ADMIN_WARNING) | 3347 BIT(ENA_ADMIN_NOTIFICATION) | 3348 BIT(ENA_ADMIN_KEEP_ALIVE); 3349 3350 aenq_groups &= get_feat_ctx->aenq.supported_groups; 3351 3352 rc = ena_com_set_aenq_config(ena_dev, aenq_groups); 3353 if (rc) { 3354 dev_err(dev, "Cannot configure aenq groups rc= %d\n", rc); 3355 goto err_admin_init; 3356 } 3357 3358 *wd_state = !!(aenq_groups & BIT(ENA_ADMIN_KEEP_ALIVE)); 3359 3360 return 0; 3361 3362 err_admin_init: 3363 ena_com_delete_host_info(ena_dev); 3364 ena_com_admin_destroy(ena_dev); 3365 err_mmio_read_less: 3366 ena_com_mmio_reg_read_request_destroy(ena_dev); 3367 3368 return rc; 3369 } 3370 3371 static int ena_enable_msix_and_set_admin_interrupts(struct ena_adapter *adapter) 3372 { 3373 struct ena_com_dev *ena_dev = adapter->ena_dev; 3374 struct device *dev = &adapter->pdev->dev; 3375 int rc; 3376 3377 rc = ena_enable_msix(adapter); 3378 if (rc) { 3379 dev_err(dev, "Can not reserve msix vectors\n"); 3380 return rc; 3381 } 3382 3383 ena_setup_mgmnt_intr(adapter); 3384 3385 rc = ena_request_mgmnt_irq(adapter); 3386 if (rc) { 3387 dev_err(dev, "Can not setup management interrupts\n"); 3388 goto err_disable_msix; 3389 } 3390 3391 ena_com_set_admin_polling_mode(ena_dev, false); 3392 3393 ena_com_admin_aenq_enable(ena_dev); 3394 3395 return 0; 3396 3397 err_disable_msix: 3398 ena_disable_msix(adapter); 3399 3400 return rc; 3401 } 3402 3403 static void ena_destroy_device(struct ena_adapter *adapter, bool graceful) 3404 { 3405 struct net_device *netdev = adapter->netdev; 3406 struct ena_com_dev *ena_dev = adapter->ena_dev; 3407 bool dev_up; 3408 3409 if (!test_bit(ENA_FLAG_DEVICE_RUNNING, &adapter->flags)) 3410 return; 3411 3412 netif_carrier_off(netdev); 3413 3414 del_timer_sync(&adapter->timer_service); 3415 3416 dev_up = test_bit(ENA_FLAG_DEV_UP, &adapter->flags); 3417 adapter->dev_up_before_reset = dev_up; 3418 if (!graceful) 3419 ena_com_set_admin_running_state(ena_dev, false); 3420 3421 if (test_bit(ENA_FLAG_DEV_UP, &adapter->flags)) 3422 ena_down(adapter); 3423 3424 /* Stop the device from sending AENQ events (in case reset flag is set 3425 * and device is up, ena_down() already reset the device. 3426 */ 3427 if (!(test_bit(ENA_FLAG_TRIGGER_RESET, &adapter->flags) && dev_up)) 3428 ena_com_dev_reset(adapter->ena_dev, adapter->reset_reason); 3429 3430 ena_free_mgmnt_irq(adapter); 3431 3432 ena_disable_msix(adapter); 3433 3434 ena_com_abort_admin_commands(ena_dev); 3435 3436 ena_com_wait_for_abort_completion(ena_dev); 3437 3438 ena_com_admin_destroy(ena_dev); 3439 3440 ena_com_mmio_reg_read_request_destroy(ena_dev); 3441 3442 /* return reset reason to default value */ 3443 adapter->reset_reason = ENA_REGS_RESET_NORMAL; 3444 3445 clear_bit(ENA_FLAG_TRIGGER_RESET, &adapter->flags); 3446 clear_bit(ENA_FLAG_DEVICE_RUNNING, &adapter->flags); 3447 } 3448 3449 static int ena_restore_device(struct ena_adapter *adapter) 3450 { 3451 struct ena_com_dev_get_features_ctx get_feat_ctx; 3452 struct ena_com_dev *ena_dev = adapter->ena_dev; 3453 struct pci_dev *pdev = adapter->pdev; 3454 bool wd_state; 3455 int rc; 3456 3457 set_bit(ENA_FLAG_ONGOING_RESET, &adapter->flags); 3458 rc = ena_device_init(ena_dev, adapter->pdev, &get_feat_ctx, &wd_state); 3459 if (rc) { 3460 dev_err(&pdev->dev, "Can not initialize device\n"); 3461 goto err; 3462 } 3463 adapter->wd_state = wd_state; 3464 3465 rc = ena_device_validate_params(adapter, &get_feat_ctx); 3466 if (rc) { 3467 dev_err(&pdev->dev, "Validation of device parameters failed\n"); 3468 goto err_device_destroy; 3469 } 3470 3471 rc = ena_enable_msix_and_set_admin_interrupts(adapter); 3472 if (rc) { 3473 dev_err(&pdev->dev, "Enable MSI-X failed\n"); 3474 goto err_device_destroy; 3475 } 3476 /* If the interface was up before the reset bring it up */ 3477 if (adapter->dev_up_before_reset) { 3478 rc = ena_up(adapter); 3479 if (rc) { 3480 dev_err(&pdev->dev, "Failed to create I/O queues\n"); 3481 goto err_disable_msix; 3482 } 3483 } 3484 3485 set_bit(ENA_FLAG_DEVICE_RUNNING, &adapter->flags); 3486 3487 clear_bit(ENA_FLAG_ONGOING_RESET, &adapter->flags); 3488 if (test_bit(ENA_FLAG_LINK_UP, &adapter->flags)) 3489 netif_carrier_on(adapter->netdev); 3490 3491 mod_timer(&adapter->timer_service, round_jiffies(jiffies + HZ)); 3492 dev_err(&pdev->dev, "Device reset completed successfully\n"); 3493 adapter->last_keep_alive_jiffies = jiffies; 3494 3495 return rc; 3496 err_disable_msix: 3497 ena_free_mgmnt_irq(adapter); 3498 ena_disable_msix(adapter); 3499 err_device_destroy: 3500 ena_com_abort_admin_commands(ena_dev); 3501 ena_com_wait_for_abort_completion(ena_dev); 3502 ena_com_admin_destroy(ena_dev); 3503 ena_com_dev_reset(ena_dev, ENA_REGS_RESET_DRIVER_INVALID_STATE); 3504 ena_com_mmio_reg_read_request_destroy(ena_dev); 3505 err: 3506 clear_bit(ENA_FLAG_DEVICE_RUNNING, &adapter->flags); 3507 clear_bit(ENA_FLAG_ONGOING_RESET, &adapter->flags); 3508 dev_err(&pdev->dev, 3509 "Reset attempt failed. Can not reset the device\n"); 3510 3511 return rc; 3512 } 3513 3514 static void ena_fw_reset_device(struct work_struct *work) 3515 { 3516 struct ena_adapter *adapter = 3517 container_of(work, struct ena_adapter, reset_task); 3518 struct pci_dev *pdev = adapter->pdev; 3519 3520 if (unlikely(!test_bit(ENA_FLAG_TRIGGER_RESET, &adapter->flags))) { 3521 dev_err(&pdev->dev, 3522 "device reset schedule while reset bit is off\n"); 3523 return; 3524 } 3525 rtnl_lock(); 3526 ena_destroy_device(adapter, false); 3527 ena_restore_device(adapter); 3528 rtnl_unlock(); 3529 } 3530 3531 static int check_for_rx_interrupt_queue(struct ena_adapter *adapter, 3532 struct ena_ring *rx_ring) 3533 { 3534 if (likely(rx_ring->first_interrupt)) 3535 return 0; 3536 3537 if (ena_com_cq_empty(rx_ring->ena_com_io_cq)) 3538 return 0; 3539 3540 rx_ring->no_interrupt_event_cnt++; 3541 3542 if (rx_ring->no_interrupt_event_cnt == ENA_MAX_NO_INTERRUPT_ITERATIONS) { 3543 netif_err(adapter, rx_err, adapter->netdev, 3544 "Potential MSIX issue on Rx side Queue = %d. Reset the device\n", 3545 rx_ring->qid); 3546 adapter->reset_reason = ENA_REGS_RESET_MISS_INTERRUPT; 3547 smp_mb__before_atomic(); 3548 set_bit(ENA_FLAG_TRIGGER_RESET, &adapter->flags); 3549 return -EIO; 3550 } 3551 3552 return 0; 3553 } 3554 3555 static int check_missing_comp_in_tx_queue(struct ena_adapter *adapter, 3556 struct ena_ring *tx_ring) 3557 { 3558 struct ena_tx_buffer *tx_buf; 3559 unsigned long last_jiffies; 3560 u32 missed_tx = 0; 3561 int i, rc = 0; 3562 3563 for (i = 0; i < tx_ring->ring_size; i++) { 3564 tx_buf = &tx_ring->tx_buffer_info[i]; 3565 last_jiffies = tx_buf->last_jiffies; 3566 3567 if (last_jiffies == 0) 3568 /* no pending Tx at this location */ 3569 continue; 3570 3571 if (unlikely(!tx_ring->first_interrupt && time_is_before_jiffies(last_jiffies + 3572 2 * adapter->missing_tx_completion_to))) { 3573 /* If after graceful period interrupt is still not 3574 * received, we schedule a reset 3575 */ 3576 netif_err(adapter, tx_err, adapter->netdev, 3577 "Potential MSIX issue on Tx side Queue = %d. Reset the device\n", 3578 tx_ring->qid); 3579 adapter->reset_reason = ENA_REGS_RESET_MISS_INTERRUPT; 3580 smp_mb__before_atomic(); 3581 set_bit(ENA_FLAG_TRIGGER_RESET, &adapter->flags); 3582 return -EIO; 3583 } 3584 3585 if (unlikely(time_is_before_jiffies(last_jiffies + 3586 adapter->missing_tx_completion_to))) { 3587 if (!tx_buf->print_once) 3588 netif_notice(adapter, tx_err, adapter->netdev, 3589 "Found a Tx that wasn't completed on time, qid %d, index %d.\n", 3590 tx_ring->qid, i); 3591 3592 tx_buf->print_once = 1; 3593 missed_tx++; 3594 } 3595 } 3596 3597 if (unlikely(missed_tx > adapter->missing_tx_completion_threshold)) { 3598 netif_err(adapter, tx_err, adapter->netdev, 3599 "The number of lost tx completions is above the threshold (%d > %d). Reset the device\n", 3600 missed_tx, 3601 adapter->missing_tx_completion_threshold); 3602 adapter->reset_reason = 3603 ENA_REGS_RESET_MISS_TX_CMPL; 3604 set_bit(ENA_FLAG_TRIGGER_RESET, &adapter->flags); 3605 rc = -EIO; 3606 } 3607 3608 u64_stats_update_begin(&tx_ring->syncp); 3609 tx_ring->tx_stats.missed_tx = missed_tx; 3610 u64_stats_update_end(&tx_ring->syncp); 3611 3612 return rc; 3613 } 3614 3615 static void check_for_missing_completions(struct ena_adapter *adapter) 3616 { 3617 struct ena_ring *tx_ring; 3618 struct ena_ring *rx_ring; 3619 int i, budget, rc; 3620 int io_queue_count; 3621 3622 io_queue_count = adapter->xdp_num_queues + adapter->num_io_queues; 3623 /* Make sure the driver doesn't turn the device in other process */ 3624 smp_rmb(); 3625 3626 if (!test_bit(ENA_FLAG_DEV_UP, &adapter->flags)) 3627 return; 3628 3629 if (test_bit(ENA_FLAG_TRIGGER_RESET, &adapter->flags)) 3630 return; 3631 3632 if (adapter->missing_tx_completion_to == ENA_HW_HINTS_NO_TIMEOUT) 3633 return; 3634 3635 budget = ENA_MONITORED_TX_QUEUES; 3636 3637 for (i = adapter->last_monitored_tx_qid; i < io_queue_count; i++) { 3638 tx_ring = &adapter->tx_ring[i]; 3639 rx_ring = &adapter->rx_ring[i]; 3640 3641 rc = check_missing_comp_in_tx_queue(adapter, tx_ring); 3642 if (unlikely(rc)) 3643 return; 3644 3645 rc = !ENA_IS_XDP_INDEX(adapter, i) ? 3646 check_for_rx_interrupt_queue(adapter, rx_ring) : 0; 3647 if (unlikely(rc)) 3648 return; 3649 3650 budget--; 3651 if (!budget) 3652 break; 3653 } 3654 3655 adapter->last_monitored_tx_qid = i % io_queue_count; 3656 } 3657 3658 /* trigger napi schedule after 2 consecutive detections */ 3659 #define EMPTY_RX_REFILL 2 3660 /* For the rare case where the device runs out of Rx descriptors and the 3661 * napi handler failed to refill new Rx descriptors (due to a lack of memory 3662 * for example). 3663 * This case will lead to a deadlock: 3664 * The device won't send interrupts since all the new Rx packets will be dropped 3665 * The napi handler won't allocate new Rx descriptors so the device will be 3666 * able to send new packets. 3667 * 3668 * This scenario can happen when the kernel's vm.min_free_kbytes is too small. 3669 * It is recommended to have at least 512MB, with a minimum of 128MB for 3670 * constrained environment). 3671 * 3672 * When such a situation is detected - Reschedule napi 3673 */ 3674 static void check_for_empty_rx_ring(struct ena_adapter *adapter) 3675 { 3676 struct ena_ring *rx_ring; 3677 int i, refill_required; 3678 3679 if (!test_bit(ENA_FLAG_DEV_UP, &adapter->flags)) 3680 return; 3681 3682 if (test_bit(ENA_FLAG_TRIGGER_RESET, &adapter->flags)) 3683 return; 3684 3685 for (i = 0; i < adapter->num_io_queues; i++) { 3686 rx_ring = &adapter->rx_ring[i]; 3687 3688 refill_required = 3689 ena_com_free_desc(rx_ring->ena_com_io_sq); 3690 if (unlikely(refill_required == (rx_ring->ring_size - 1))) { 3691 rx_ring->empty_rx_queue++; 3692 3693 if (rx_ring->empty_rx_queue >= EMPTY_RX_REFILL) { 3694 u64_stats_update_begin(&rx_ring->syncp); 3695 rx_ring->rx_stats.empty_rx_ring++; 3696 u64_stats_update_end(&rx_ring->syncp); 3697 3698 netif_err(adapter, drv, adapter->netdev, 3699 "trigger refill for ring %d\n", i); 3700 3701 napi_schedule(rx_ring->napi); 3702 rx_ring->empty_rx_queue = 0; 3703 } 3704 } else { 3705 rx_ring->empty_rx_queue = 0; 3706 } 3707 } 3708 } 3709 3710 /* Check for keep alive expiration */ 3711 static void check_for_missing_keep_alive(struct ena_adapter *adapter) 3712 { 3713 unsigned long keep_alive_expired; 3714 3715 if (!adapter->wd_state) 3716 return; 3717 3718 if (adapter->keep_alive_timeout == ENA_HW_HINTS_NO_TIMEOUT) 3719 return; 3720 3721 keep_alive_expired = adapter->last_keep_alive_jiffies + 3722 adapter->keep_alive_timeout; 3723 if (unlikely(time_is_before_jiffies(keep_alive_expired))) { 3724 netif_err(adapter, drv, adapter->netdev, 3725 "Keep alive watchdog timeout.\n"); 3726 u64_stats_update_begin(&adapter->syncp); 3727 adapter->dev_stats.wd_expired++; 3728 u64_stats_update_end(&adapter->syncp); 3729 adapter->reset_reason = ENA_REGS_RESET_KEEP_ALIVE_TO; 3730 set_bit(ENA_FLAG_TRIGGER_RESET, &adapter->flags); 3731 } 3732 } 3733 3734 static void check_for_admin_com_state(struct ena_adapter *adapter) 3735 { 3736 if (unlikely(!ena_com_get_admin_running_state(adapter->ena_dev))) { 3737 netif_err(adapter, drv, adapter->netdev, 3738 "ENA admin queue is not in running state!\n"); 3739 u64_stats_update_begin(&adapter->syncp); 3740 adapter->dev_stats.admin_q_pause++; 3741 u64_stats_update_end(&adapter->syncp); 3742 adapter->reset_reason = ENA_REGS_RESET_ADMIN_TO; 3743 set_bit(ENA_FLAG_TRIGGER_RESET, &adapter->flags); 3744 } 3745 } 3746 3747 static void ena_update_hints(struct ena_adapter *adapter, 3748 struct ena_admin_ena_hw_hints *hints) 3749 { 3750 struct net_device *netdev = adapter->netdev; 3751 3752 if (hints->admin_completion_tx_timeout) 3753 adapter->ena_dev->admin_queue.completion_timeout = 3754 hints->admin_completion_tx_timeout * 1000; 3755 3756 if (hints->mmio_read_timeout) 3757 /* convert to usec */ 3758 adapter->ena_dev->mmio_read.reg_read_to = 3759 hints->mmio_read_timeout * 1000; 3760 3761 if (hints->missed_tx_completion_count_threshold_to_reset) 3762 adapter->missing_tx_completion_threshold = 3763 hints->missed_tx_completion_count_threshold_to_reset; 3764 3765 if (hints->missing_tx_completion_timeout) { 3766 if (hints->missing_tx_completion_timeout == ENA_HW_HINTS_NO_TIMEOUT) 3767 adapter->missing_tx_completion_to = ENA_HW_HINTS_NO_TIMEOUT; 3768 else 3769 adapter->missing_tx_completion_to = 3770 msecs_to_jiffies(hints->missing_tx_completion_timeout); 3771 } 3772 3773 if (hints->netdev_wd_timeout) 3774 netdev->watchdog_timeo = msecs_to_jiffies(hints->netdev_wd_timeout); 3775 3776 if (hints->driver_watchdog_timeout) { 3777 if (hints->driver_watchdog_timeout == ENA_HW_HINTS_NO_TIMEOUT) 3778 adapter->keep_alive_timeout = ENA_HW_HINTS_NO_TIMEOUT; 3779 else 3780 adapter->keep_alive_timeout = 3781 msecs_to_jiffies(hints->driver_watchdog_timeout); 3782 } 3783 } 3784 3785 static void ena_update_host_info(struct ena_admin_host_info *host_info, 3786 struct net_device *netdev) 3787 { 3788 host_info->supported_network_features[0] = 3789 netdev->features & GENMASK_ULL(31, 0); 3790 host_info->supported_network_features[1] = 3791 (netdev->features & GENMASK_ULL(63, 32)) >> 32; 3792 } 3793 3794 static void ena_timer_service(struct timer_list *t) 3795 { 3796 struct ena_adapter *adapter = from_timer(adapter, t, timer_service); 3797 u8 *debug_area = adapter->ena_dev->host_attr.debug_area_virt_addr; 3798 struct ena_admin_host_info *host_info = 3799 adapter->ena_dev->host_attr.host_info; 3800 3801 check_for_missing_keep_alive(adapter); 3802 3803 check_for_admin_com_state(adapter); 3804 3805 check_for_missing_completions(adapter); 3806 3807 check_for_empty_rx_ring(adapter); 3808 3809 if (debug_area) 3810 ena_dump_stats_to_buf(adapter, debug_area); 3811 3812 if (host_info) 3813 ena_update_host_info(host_info, adapter->netdev); 3814 3815 if (unlikely(test_bit(ENA_FLAG_TRIGGER_RESET, &adapter->flags))) { 3816 netif_err(adapter, drv, adapter->netdev, 3817 "Trigger reset is on\n"); 3818 ena_dump_stats_to_dmesg(adapter); 3819 queue_work(ena_wq, &adapter->reset_task); 3820 return; 3821 } 3822 3823 /* Reset the timer */ 3824 mod_timer(&adapter->timer_service, round_jiffies(jiffies + HZ)); 3825 } 3826 3827 static int ena_calc_max_io_queue_num(struct pci_dev *pdev, 3828 struct ena_com_dev *ena_dev, 3829 struct ena_com_dev_get_features_ctx *get_feat_ctx) 3830 { 3831 int io_tx_sq_num, io_tx_cq_num, io_rx_num, max_num_io_queues; 3832 3833 if (ena_dev->supported_features & BIT(ENA_ADMIN_MAX_QUEUES_EXT)) { 3834 struct ena_admin_queue_ext_feature_fields *max_queue_ext = 3835 &get_feat_ctx->max_queue_ext.max_queue_ext; 3836 io_rx_num = min_t(u32, max_queue_ext->max_rx_sq_num, 3837 max_queue_ext->max_rx_cq_num); 3838 3839 io_tx_sq_num = max_queue_ext->max_tx_sq_num; 3840 io_tx_cq_num = max_queue_ext->max_tx_cq_num; 3841 } else { 3842 struct ena_admin_queue_feature_desc *max_queues = 3843 &get_feat_ctx->max_queues; 3844 io_tx_sq_num = max_queues->max_sq_num; 3845 io_tx_cq_num = max_queues->max_cq_num; 3846 io_rx_num = min_t(u32, io_tx_sq_num, io_tx_cq_num); 3847 } 3848 3849 /* In case of LLQ use the llq fields for the tx SQ/CQ */ 3850 if (ena_dev->tx_mem_queue_type == ENA_ADMIN_PLACEMENT_POLICY_DEV) 3851 io_tx_sq_num = get_feat_ctx->llq.max_llq_num; 3852 3853 max_num_io_queues = min_t(u32, num_online_cpus(), ENA_MAX_NUM_IO_QUEUES); 3854 max_num_io_queues = min_t(u32, max_num_io_queues, io_rx_num); 3855 max_num_io_queues = min_t(u32, max_num_io_queues, io_tx_sq_num); 3856 max_num_io_queues = min_t(u32, max_num_io_queues, io_tx_cq_num); 3857 /* 1 IRQ for for mgmnt and 1 IRQs for each IO direction */ 3858 max_num_io_queues = min_t(u32, max_num_io_queues, pci_msix_vec_count(pdev) - 1); 3859 if (unlikely(!max_num_io_queues)) { 3860 dev_err(&pdev->dev, "The device doesn't have io queues\n"); 3861 return -EFAULT; 3862 } 3863 3864 return max_num_io_queues; 3865 } 3866 3867 static int ena_set_queues_placement_policy(struct pci_dev *pdev, 3868 struct ena_com_dev *ena_dev, 3869 struct ena_admin_feature_llq_desc *llq, 3870 struct ena_llq_configurations *llq_default_configurations) 3871 { 3872 bool has_mem_bar; 3873 int rc; 3874 u32 llq_feature_mask; 3875 3876 llq_feature_mask = 1 << ENA_ADMIN_LLQ; 3877 if (!(ena_dev->supported_features & llq_feature_mask)) { 3878 dev_err(&pdev->dev, 3879 "LLQ is not supported Fallback to host mode policy.\n"); 3880 ena_dev->tx_mem_queue_type = ENA_ADMIN_PLACEMENT_POLICY_HOST; 3881 return 0; 3882 } 3883 3884 has_mem_bar = pci_select_bars(pdev, IORESOURCE_MEM) & BIT(ENA_MEM_BAR); 3885 3886 rc = ena_com_config_dev_mode(ena_dev, llq, llq_default_configurations); 3887 if (unlikely(rc)) { 3888 dev_err(&pdev->dev, 3889 "Failed to configure the device mode. Fallback to host mode policy.\n"); 3890 ena_dev->tx_mem_queue_type = ENA_ADMIN_PLACEMENT_POLICY_HOST; 3891 return 0; 3892 } 3893 3894 /* Nothing to config, exit */ 3895 if (ena_dev->tx_mem_queue_type == ENA_ADMIN_PLACEMENT_POLICY_HOST) 3896 return 0; 3897 3898 if (!has_mem_bar) { 3899 dev_err(&pdev->dev, 3900 "ENA device does not expose LLQ bar. Fallback to host mode policy.\n"); 3901 ena_dev->tx_mem_queue_type = ENA_ADMIN_PLACEMENT_POLICY_HOST; 3902 return 0; 3903 } 3904 3905 ena_dev->mem_bar = devm_ioremap_wc(&pdev->dev, 3906 pci_resource_start(pdev, ENA_MEM_BAR), 3907 pci_resource_len(pdev, ENA_MEM_BAR)); 3908 3909 if (!ena_dev->mem_bar) 3910 return -EFAULT; 3911 3912 return 0; 3913 } 3914 3915 static void ena_set_dev_offloads(struct ena_com_dev_get_features_ctx *feat, 3916 struct net_device *netdev) 3917 { 3918 netdev_features_t dev_features = 0; 3919 3920 /* Set offload features */ 3921 if (feat->offload.tx & 3922 ENA_ADMIN_FEATURE_OFFLOAD_DESC_TX_L4_IPV4_CSUM_PART_MASK) 3923 dev_features |= NETIF_F_IP_CSUM; 3924 3925 if (feat->offload.tx & 3926 ENA_ADMIN_FEATURE_OFFLOAD_DESC_TX_L4_IPV6_CSUM_PART_MASK) 3927 dev_features |= NETIF_F_IPV6_CSUM; 3928 3929 if (feat->offload.tx & ENA_ADMIN_FEATURE_OFFLOAD_DESC_TSO_IPV4_MASK) 3930 dev_features |= NETIF_F_TSO; 3931 3932 if (feat->offload.tx & ENA_ADMIN_FEATURE_OFFLOAD_DESC_TSO_IPV6_MASK) 3933 dev_features |= NETIF_F_TSO6; 3934 3935 if (feat->offload.tx & ENA_ADMIN_FEATURE_OFFLOAD_DESC_TSO_ECN_MASK) 3936 dev_features |= NETIF_F_TSO_ECN; 3937 3938 if (feat->offload.rx_supported & 3939 ENA_ADMIN_FEATURE_OFFLOAD_DESC_RX_L4_IPV4_CSUM_MASK) 3940 dev_features |= NETIF_F_RXCSUM; 3941 3942 if (feat->offload.rx_supported & 3943 ENA_ADMIN_FEATURE_OFFLOAD_DESC_RX_L4_IPV6_CSUM_MASK) 3944 dev_features |= NETIF_F_RXCSUM; 3945 3946 netdev->features = 3947 dev_features | 3948 NETIF_F_SG | 3949 NETIF_F_RXHASH | 3950 NETIF_F_HIGHDMA; 3951 3952 netdev->hw_features |= netdev->features; 3953 netdev->vlan_features |= netdev->features; 3954 } 3955 3956 static void ena_set_conf_feat_params(struct ena_adapter *adapter, 3957 struct ena_com_dev_get_features_ctx *feat) 3958 { 3959 struct net_device *netdev = adapter->netdev; 3960 3961 /* Copy mac address */ 3962 if (!is_valid_ether_addr(feat->dev_attr.mac_addr)) { 3963 eth_hw_addr_random(netdev); 3964 ether_addr_copy(adapter->mac_addr, netdev->dev_addr); 3965 } else { 3966 ether_addr_copy(adapter->mac_addr, feat->dev_attr.mac_addr); 3967 ether_addr_copy(netdev->dev_addr, adapter->mac_addr); 3968 } 3969 3970 /* Set offload features */ 3971 ena_set_dev_offloads(feat, netdev); 3972 3973 adapter->max_mtu = feat->dev_attr.max_mtu; 3974 netdev->max_mtu = adapter->max_mtu; 3975 netdev->min_mtu = ENA_MIN_MTU; 3976 } 3977 3978 static int ena_rss_init_default(struct ena_adapter *adapter) 3979 { 3980 struct ena_com_dev *ena_dev = adapter->ena_dev; 3981 struct device *dev = &adapter->pdev->dev; 3982 int rc, i; 3983 u32 val; 3984 3985 rc = ena_com_rss_init(ena_dev, ENA_RX_RSS_TABLE_LOG_SIZE); 3986 if (unlikely(rc)) { 3987 dev_err(dev, "Cannot init indirect table\n"); 3988 goto err_rss_init; 3989 } 3990 3991 for (i = 0; i < ENA_RX_RSS_TABLE_SIZE; i++) { 3992 val = ethtool_rxfh_indir_default(i, adapter->num_io_queues); 3993 rc = ena_com_indirect_table_fill_entry(ena_dev, i, 3994 ENA_IO_RXQ_IDX(val)); 3995 if (unlikely(rc && (rc != -EOPNOTSUPP))) { 3996 dev_err(dev, "Cannot fill indirect table\n"); 3997 goto err_fill_indir; 3998 } 3999 } 4000 4001 rc = ena_com_fill_hash_function(ena_dev, ENA_ADMIN_TOEPLITZ, NULL, 4002 ENA_HASH_KEY_SIZE, 0xFFFFFFFF); 4003 if (unlikely(rc && (rc != -EOPNOTSUPP))) { 4004 dev_err(dev, "Cannot fill hash function\n"); 4005 goto err_fill_indir; 4006 } 4007 4008 rc = ena_com_set_default_hash_ctrl(ena_dev); 4009 if (unlikely(rc && (rc != -EOPNOTSUPP))) { 4010 dev_err(dev, "Cannot fill hash control\n"); 4011 goto err_fill_indir; 4012 } 4013 4014 return 0; 4015 4016 err_fill_indir: 4017 ena_com_rss_destroy(ena_dev); 4018 err_rss_init: 4019 4020 return rc; 4021 } 4022 4023 static void ena_release_bars(struct ena_com_dev *ena_dev, struct pci_dev *pdev) 4024 { 4025 int release_bars = pci_select_bars(pdev, IORESOURCE_MEM) & ENA_BAR_MASK; 4026 4027 pci_release_selected_regions(pdev, release_bars); 4028 } 4029 4030 static void set_default_llq_configurations(struct ena_llq_configurations *llq_config) 4031 { 4032 llq_config->llq_header_location = ENA_ADMIN_INLINE_HEADER; 4033 llq_config->llq_ring_entry_size = ENA_ADMIN_LIST_ENTRY_SIZE_128B; 4034 llq_config->llq_stride_ctrl = ENA_ADMIN_MULTIPLE_DESCS_PER_ENTRY; 4035 llq_config->llq_num_decs_before_header = ENA_ADMIN_LLQ_NUM_DESCS_BEFORE_HEADER_2; 4036 llq_config->llq_ring_entry_size_value = 128; 4037 } 4038 4039 static int ena_calc_io_queue_size(struct ena_calc_queue_size_ctx *ctx) 4040 { 4041 struct ena_admin_feature_llq_desc *llq = &ctx->get_feat_ctx->llq; 4042 struct ena_com_dev *ena_dev = ctx->ena_dev; 4043 u32 tx_queue_size = ENA_DEFAULT_RING_SIZE; 4044 u32 rx_queue_size = ENA_DEFAULT_RING_SIZE; 4045 u32 max_tx_queue_size; 4046 u32 max_rx_queue_size; 4047 4048 if (ena_dev->supported_features & BIT(ENA_ADMIN_MAX_QUEUES_EXT)) { 4049 struct ena_admin_queue_ext_feature_fields *max_queue_ext = 4050 &ctx->get_feat_ctx->max_queue_ext.max_queue_ext; 4051 max_rx_queue_size = min_t(u32, max_queue_ext->max_rx_cq_depth, 4052 max_queue_ext->max_rx_sq_depth); 4053 max_tx_queue_size = max_queue_ext->max_tx_cq_depth; 4054 4055 if (ena_dev->tx_mem_queue_type == ENA_ADMIN_PLACEMENT_POLICY_DEV) 4056 max_tx_queue_size = min_t(u32, max_tx_queue_size, 4057 llq->max_llq_depth); 4058 else 4059 max_tx_queue_size = min_t(u32, max_tx_queue_size, 4060 max_queue_ext->max_tx_sq_depth); 4061 4062 ctx->max_tx_sgl_size = min_t(u16, ENA_PKT_MAX_BUFS, 4063 max_queue_ext->max_per_packet_tx_descs); 4064 ctx->max_rx_sgl_size = min_t(u16, ENA_PKT_MAX_BUFS, 4065 max_queue_ext->max_per_packet_rx_descs); 4066 } else { 4067 struct ena_admin_queue_feature_desc *max_queues = 4068 &ctx->get_feat_ctx->max_queues; 4069 max_rx_queue_size = min_t(u32, max_queues->max_cq_depth, 4070 max_queues->max_sq_depth); 4071 max_tx_queue_size = max_queues->max_cq_depth; 4072 4073 if (ena_dev->tx_mem_queue_type == ENA_ADMIN_PLACEMENT_POLICY_DEV) 4074 max_tx_queue_size = min_t(u32, max_tx_queue_size, 4075 llq->max_llq_depth); 4076 else 4077 max_tx_queue_size = min_t(u32, max_tx_queue_size, 4078 max_queues->max_sq_depth); 4079 4080 ctx->max_tx_sgl_size = min_t(u16, ENA_PKT_MAX_BUFS, 4081 max_queues->max_packet_tx_descs); 4082 ctx->max_rx_sgl_size = min_t(u16, ENA_PKT_MAX_BUFS, 4083 max_queues->max_packet_rx_descs); 4084 } 4085 4086 max_tx_queue_size = rounddown_pow_of_two(max_tx_queue_size); 4087 max_rx_queue_size = rounddown_pow_of_two(max_rx_queue_size); 4088 4089 tx_queue_size = clamp_val(tx_queue_size, ENA_MIN_RING_SIZE, 4090 max_tx_queue_size); 4091 rx_queue_size = clamp_val(rx_queue_size, ENA_MIN_RING_SIZE, 4092 max_rx_queue_size); 4093 4094 tx_queue_size = rounddown_pow_of_two(tx_queue_size); 4095 rx_queue_size = rounddown_pow_of_two(rx_queue_size); 4096 4097 ctx->max_tx_queue_size = max_tx_queue_size; 4098 ctx->max_rx_queue_size = max_rx_queue_size; 4099 ctx->tx_queue_size = tx_queue_size; 4100 ctx->rx_queue_size = rx_queue_size; 4101 4102 return 0; 4103 } 4104 4105 /* ena_probe - Device Initialization Routine 4106 * @pdev: PCI device information struct 4107 * @ent: entry in ena_pci_tbl 4108 * 4109 * Returns 0 on success, negative on failure 4110 * 4111 * ena_probe initializes an adapter identified by a pci_dev structure. 4112 * The OS initialization, configuring of the adapter private structure, 4113 * and a hardware reset occur. 4114 */ 4115 static int ena_probe(struct pci_dev *pdev, const struct pci_device_id *ent) 4116 { 4117 struct ena_com_dev_get_features_ctx get_feat_ctx; 4118 struct ena_calc_queue_size_ctx calc_queue_ctx = { 0 }; 4119 struct ena_llq_configurations llq_config; 4120 struct ena_com_dev *ena_dev = NULL; 4121 struct ena_adapter *adapter; 4122 struct net_device *netdev; 4123 static int adapters_found; 4124 u32 max_num_io_queues; 4125 char *queue_type_str; 4126 bool wd_state; 4127 int bars, rc; 4128 4129 dev_dbg(&pdev->dev, "%s\n", __func__); 4130 4131 rc = pci_enable_device_mem(pdev); 4132 if (rc) { 4133 dev_err(&pdev->dev, "pci_enable_device_mem() failed!\n"); 4134 return rc; 4135 } 4136 4137 pci_set_master(pdev); 4138 4139 ena_dev = vzalloc(sizeof(*ena_dev)); 4140 if (!ena_dev) { 4141 rc = -ENOMEM; 4142 goto err_disable_device; 4143 } 4144 4145 bars = pci_select_bars(pdev, IORESOURCE_MEM) & ENA_BAR_MASK; 4146 rc = pci_request_selected_regions(pdev, bars, DRV_MODULE_NAME); 4147 if (rc) { 4148 dev_err(&pdev->dev, "pci_request_selected_regions failed %d\n", 4149 rc); 4150 goto err_free_ena_dev; 4151 } 4152 4153 ena_dev->reg_bar = devm_ioremap(&pdev->dev, 4154 pci_resource_start(pdev, ENA_REG_BAR), 4155 pci_resource_len(pdev, ENA_REG_BAR)); 4156 if (!ena_dev->reg_bar) { 4157 dev_err(&pdev->dev, "failed to remap regs bar\n"); 4158 rc = -EFAULT; 4159 goto err_free_region; 4160 } 4161 4162 ena_dev->dmadev = &pdev->dev; 4163 4164 rc = ena_device_init(ena_dev, pdev, &get_feat_ctx, &wd_state); 4165 if (rc) { 4166 dev_err(&pdev->dev, "ena device init failed\n"); 4167 if (rc == -ETIME) 4168 rc = -EPROBE_DEFER; 4169 goto err_free_region; 4170 } 4171 4172 set_default_llq_configurations(&llq_config); 4173 4174 rc = ena_set_queues_placement_policy(pdev, ena_dev, &get_feat_ctx.llq, 4175 &llq_config); 4176 if (rc) { 4177 dev_err(&pdev->dev, "ena device init failed\n"); 4178 goto err_device_destroy; 4179 } 4180 4181 calc_queue_ctx.ena_dev = ena_dev; 4182 calc_queue_ctx.get_feat_ctx = &get_feat_ctx; 4183 calc_queue_ctx.pdev = pdev; 4184 4185 /* Initial Tx and RX interrupt delay. Assumes 1 usec granularity. 4186 * Updated during device initialization with the real granularity 4187 */ 4188 ena_dev->intr_moder_tx_interval = ENA_INTR_INITIAL_TX_INTERVAL_USECS; 4189 ena_dev->intr_moder_rx_interval = ENA_INTR_INITIAL_RX_INTERVAL_USECS; 4190 ena_dev->intr_delay_resolution = ENA_DEFAULT_INTR_DELAY_RESOLUTION; 4191 max_num_io_queues = ena_calc_max_io_queue_num(pdev, ena_dev, &get_feat_ctx); 4192 rc = ena_calc_io_queue_size(&calc_queue_ctx); 4193 if (rc || !max_num_io_queues) { 4194 rc = -EFAULT; 4195 goto err_device_destroy; 4196 } 4197 4198 /* dev zeroed in init_etherdev */ 4199 netdev = alloc_etherdev_mq(sizeof(struct ena_adapter), max_num_io_queues); 4200 if (!netdev) { 4201 dev_err(&pdev->dev, "alloc_etherdev_mq failed\n"); 4202 rc = -ENOMEM; 4203 goto err_device_destroy; 4204 } 4205 4206 SET_NETDEV_DEV(netdev, &pdev->dev); 4207 4208 adapter = netdev_priv(netdev); 4209 pci_set_drvdata(pdev, adapter); 4210 4211 adapter->ena_dev = ena_dev; 4212 adapter->netdev = netdev; 4213 adapter->pdev = pdev; 4214 4215 ena_set_conf_feat_params(adapter, &get_feat_ctx); 4216 4217 adapter->msg_enable = netif_msg_init(debug, DEFAULT_MSG_ENABLE); 4218 adapter->reset_reason = ENA_REGS_RESET_NORMAL; 4219 4220 adapter->requested_tx_ring_size = calc_queue_ctx.tx_queue_size; 4221 adapter->requested_rx_ring_size = calc_queue_ctx.rx_queue_size; 4222 adapter->max_tx_ring_size = calc_queue_ctx.max_tx_queue_size; 4223 adapter->max_rx_ring_size = calc_queue_ctx.max_rx_queue_size; 4224 adapter->max_tx_sgl_size = calc_queue_ctx.max_tx_sgl_size; 4225 adapter->max_rx_sgl_size = calc_queue_ctx.max_rx_sgl_size; 4226 4227 adapter->num_io_queues = max_num_io_queues; 4228 adapter->max_num_io_queues = max_num_io_queues; 4229 4230 adapter->xdp_first_ring = 0; 4231 adapter->xdp_num_queues = 0; 4232 4233 adapter->last_monitored_tx_qid = 0; 4234 4235 adapter->rx_copybreak = ENA_DEFAULT_RX_COPYBREAK; 4236 adapter->wd_state = wd_state; 4237 4238 snprintf(adapter->name, ENA_NAME_MAX_LEN, "ena_%d", adapters_found); 4239 4240 rc = ena_com_init_interrupt_moderation(adapter->ena_dev); 4241 if (rc) { 4242 dev_err(&pdev->dev, 4243 "Failed to query interrupt moderation feature\n"); 4244 goto err_netdev_destroy; 4245 } 4246 ena_init_io_rings(adapter, 4247 0, 4248 adapter->xdp_num_queues + 4249 adapter->num_io_queues); 4250 4251 netdev->netdev_ops = &ena_netdev_ops; 4252 netdev->watchdog_timeo = TX_TIMEOUT; 4253 ena_set_ethtool_ops(netdev); 4254 4255 netdev->priv_flags |= IFF_UNICAST_FLT; 4256 4257 u64_stats_init(&adapter->syncp); 4258 4259 rc = ena_enable_msix_and_set_admin_interrupts(adapter); 4260 if (rc) { 4261 dev_err(&pdev->dev, 4262 "Failed to enable and set the admin interrupts\n"); 4263 goto err_worker_destroy; 4264 } 4265 rc = ena_rss_init_default(adapter); 4266 if (rc && (rc != -EOPNOTSUPP)) { 4267 dev_err(&pdev->dev, "Cannot init RSS rc: %d\n", rc); 4268 goto err_free_msix; 4269 } 4270 4271 ena_config_debug_area(adapter); 4272 4273 memcpy(adapter->netdev->perm_addr, adapter->mac_addr, netdev->addr_len); 4274 4275 netif_carrier_off(netdev); 4276 4277 rc = register_netdev(netdev); 4278 if (rc) { 4279 dev_err(&pdev->dev, "Cannot register net device\n"); 4280 goto err_rss; 4281 } 4282 4283 INIT_WORK(&adapter->reset_task, ena_fw_reset_device); 4284 4285 adapter->last_keep_alive_jiffies = jiffies; 4286 adapter->keep_alive_timeout = ENA_DEVICE_KALIVE_TIMEOUT; 4287 adapter->missing_tx_completion_to = TX_TIMEOUT; 4288 adapter->missing_tx_completion_threshold = MAX_NUM_OF_TIMEOUTED_PACKETS; 4289 4290 ena_update_hints(adapter, &get_feat_ctx.hw_hints); 4291 4292 timer_setup(&adapter->timer_service, ena_timer_service, 0); 4293 mod_timer(&adapter->timer_service, round_jiffies(jiffies + HZ)); 4294 4295 if (ena_dev->tx_mem_queue_type == ENA_ADMIN_PLACEMENT_POLICY_HOST) 4296 queue_type_str = "Regular"; 4297 else 4298 queue_type_str = "Low Latency"; 4299 4300 dev_info(&pdev->dev, 4301 "%s found at mem %lx, mac addr %pM, Placement policy: %s\n", 4302 DEVICE_NAME, (long)pci_resource_start(pdev, 0), 4303 netdev->dev_addr, queue_type_str); 4304 4305 set_bit(ENA_FLAG_DEVICE_RUNNING, &adapter->flags); 4306 4307 adapters_found++; 4308 4309 return 0; 4310 4311 err_rss: 4312 ena_com_delete_debug_area(ena_dev); 4313 ena_com_rss_destroy(ena_dev); 4314 err_free_msix: 4315 ena_com_dev_reset(ena_dev, ENA_REGS_RESET_INIT_ERR); 4316 /* stop submitting admin commands on a device that was reset */ 4317 ena_com_set_admin_running_state(ena_dev, false); 4318 ena_free_mgmnt_irq(adapter); 4319 ena_disable_msix(adapter); 4320 err_worker_destroy: 4321 del_timer(&adapter->timer_service); 4322 err_netdev_destroy: 4323 free_netdev(netdev); 4324 err_device_destroy: 4325 ena_com_delete_host_info(ena_dev); 4326 ena_com_admin_destroy(ena_dev); 4327 err_free_region: 4328 ena_release_bars(ena_dev, pdev); 4329 err_free_ena_dev: 4330 vfree(ena_dev); 4331 err_disable_device: 4332 pci_disable_device(pdev); 4333 return rc; 4334 } 4335 4336 /*****************************************************************************/ 4337 4338 /* __ena_shutoff - Helper used in both PCI remove/shutdown routines 4339 * @pdev: PCI device information struct 4340 * @shutdown: Is it a shutdown operation? If false, means it is a removal 4341 * 4342 * __ena_shutoff is a helper routine that does the real work on shutdown and 4343 * removal paths; the difference between those paths is with regards to whether 4344 * dettach or unregister the netdevice. 4345 */ 4346 static void __ena_shutoff(struct pci_dev *pdev, bool shutdown) 4347 { 4348 struct ena_adapter *adapter = pci_get_drvdata(pdev); 4349 struct ena_com_dev *ena_dev; 4350 struct net_device *netdev; 4351 4352 ena_dev = adapter->ena_dev; 4353 netdev = adapter->netdev; 4354 4355 #ifdef CONFIG_RFS_ACCEL 4356 if ((adapter->msix_vecs >= 1) && (netdev->rx_cpu_rmap)) { 4357 free_irq_cpu_rmap(netdev->rx_cpu_rmap); 4358 netdev->rx_cpu_rmap = NULL; 4359 } 4360 #endif /* CONFIG_RFS_ACCEL */ 4361 del_timer_sync(&adapter->timer_service); 4362 4363 cancel_work_sync(&adapter->reset_task); 4364 4365 rtnl_lock(); /* lock released inside the below if-else block */ 4366 adapter->reset_reason = ENA_REGS_RESET_SHUTDOWN; 4367 ena_destroy_device(adapter, true); 4368 if (shutdown) { 4369 netif_device_detach(netdev); 4370 dev_close(netdev); 4371 rtnl_unlock(); 4372 } else { 4373 rtnl_unlock(); 4374 unregister_netdev(netdev); 4375 free_netdev(netdev); 4376 } 4377 4378 ena_com_rss_destroy(ena_dev); 4379 4380 ena_com_delete_debug_area(ena_dev); 4381 4382 ena_com_delete_host_info(ena_dev); 4383 4384 ena_release_bars(ena_dev, pdev); 4385 4386 pci_disable_device(pdev); 4387 4388 vfree(ena_dev); 4389 } 4390 4391 /* ena_remove - Device Removal Routine 4392 * @pdev: PCI device information struct 4393 * 4394 * ena_remove is called by the PCI subsystem to alert the driver 4395 * that it should release a PCI device. 4396 */ 4397 4398 static void ena_remove(struct pci_dev *pdev) 4399 { 4400 __ena_shutoff(pdev, false); 4401 } 4402 4403 /* ena_shutdown - Device Shutdown Routine 4404 * @pdev: PCI device information struct 4405 * 4406 * ena_shutdown is called by the PCI subsystem to alert the driver that 4407 * a shutdown/reboot (or kexec) is happening and device must be disabled. 4408 */ 4409 4410 static void ena_shutdown(struct pci_dev *pdev) 4411 { 4412 __ena_shutoff(pdev, true); 4413 } 4414 4415 #ifdef CONFIG_PM 4416 /* ena_suspend - PM suspend callback 4417 * @pdev: PCI device information struct 4418 * @state:power state 4419 */ 4420 static int ena_suspend(struct pci_dev *pdev, pm_message_t state) 4421 { 4422 struct ena_adapter *adapter = pci_get_drvdata(pdev); 4423 4424 u64_stats_update_begin(&adapter->syncp); 4425 adapter->dev_stats.suspend++; 4426 u64_stats_update_end(&adapter->syncp); 4427 4428 rtnl_lock(); 4429 if (unlikely(test_bit(ENA_FLAG_TRIGGER_RESET, &adapter->flags))) { 4430 dev_err(&pdev->dev, 4431 "ignoring device reset request as the device is being suspended\n"); 4432 clear_bit(ENA_FLAG_TRIGGER_RESET, &adapter->flags); 4433 } 4434 ena_destroy_device(adapter, true); 4435 rtnl_unlock(); 4436 return 0; 4437 } 4438 4439 /* ena_resume - PM resume callback 4440 * @pdev: PCI device information struct 4441 * 4442 */ 4443 static int ena_resume(struct pci_dev *pdev) 4444 { 4445 struct ena_adapter *adapter = pci_get_drvdata(pdev); 4446 int rc; 4447 4448 u64_stats_update_begin(&adapter->syncp); 4449 adapter->dev_stats.resume++; 4450 u64_stats_update_end(&adapter->syncp); 4451 4452 rtnl_lock(); 4453 rc = ena_restore_device(adapter); 4454 rtnl_unlock(); 4455 return rc; 4456 } 4457 #endif 4458 4459 static struct pci_driver ena_pci_driver = { 4460 .name = DRV_MODULE_NAME, 4461 .id_table = ena_pci_tbl, 4462 .probe = ena_probe, 4463 .remove = ena_remove, 4464 .shutdown = ena_shutdown, 4465 #ifdef CONFIG_PM 4466 .suspend = ena_suspend, 4467 .resume = ena_resume, 4468 #endif 4469 .sriov_configure = pci_sriov_configure_simple, 4470 }; 4471 4472 static int __init ena_init(void) 4473 { 4474 ena_wq = create_singlethread_workqueue(DRV_MODULE_NAME); 4475 if (!ena_wq) { 4476 pr_err("Failed to create workqueue\n"); 4477 return -ENOMEM; 4478 } 4479 4480 return pci_register_driver(&ena_pci_driver); 4481 } 4482 4483 static void __exit ena_cleanup(void) 4484 { 4485 pci_unregister_driver(&ena_pci_driver); 4486 4487 if (ena_wq) { 4488 destroy_workqueue(ena_wq); 4489 ena_wq = NULL; 4490 } 4491 } 4492 4493 /****************************************************************************** 4494 ******************************** AENQ Handlers ******************************* 4495 *****************************************************************************/ 4496 /* ena_update_on_link_change: 4497 * Notify the network interface about the change in link status 4498 */ 4499 static void ena_update_on_link_change(void *adapter_data, 4500 struct ena_admin_aenq_entry *aenq_e) 4501 { 4502 struct ena_adapter *adapter = (struct ena_adapter *)adapter_data; 4503 struct ena_admin_aenq_link_change_desc *aenq_desc = 4504 (struct ena_admin_aenq_link_change_desc *)aenq_e; 4505 int status = aenq_desc->flags & 4506 ENA_ADMIN_AENQ_LINK_CHANGE_DESC_LINK_STATUS_MASK; 4507 4508 if (status) { 4509 netdev_dbg(adapter->netdev, "%s\n", __func__); 4510 set_bit(ENA_FLAG_LINK_UP, &adapter->flags); 4511 if (!test_bit(ENA_FLAG_ONGOING_RESET, &adapter->flags)) 4512 netif_carrier_on(adapter->netdev); 4513 } else { 4514 clear_bit(ENA_FLAG_LINK_UP, &adapter->flags); 4515 netif_carrier_off(adapter->netdev); 4516 } 4517 } 4518 4519 static void ena_keep_alive_wd(void *adapter_data, 4520 struct ena_admin_aenq_entry *aenq_e) 4521 { 4522 struct ena_adapter *adapter = (struct ena_adapter *)adapter_data; 4523 struct ena_admin_aenq_keep_alive_desc *desc; 4524 u64 rx_drops; 4525 u64 tx_drops; 4526 4527 desc = (struct ena_admin_aenq_keep_alive_desc *)aenq_e; 4528 adapter->last_keep_alive_jiffies = jiffies; 4529 4530 rx_drops = ((u64)desc->rx_drops_high << 32) | desc->rx_drops_low; 4531 tx_drops = ((u64)desc->tx_drops_high << 32) | desc->tx_drops_low; 4532 4533 u64_stats_update_begin(&adapter->syncp); 4534 adapter->dev_stats.rx_drops = rx_drops; 4535 adapter->dev_stats.tx_drops = tx_drops; 4536 u64_stats_update_end(&adapter->syncp); 4537 } 4538 4539 static void ena_notification(void *adapter_data, 4540 struct ena_admin_aenq_entry *aenq_e) 4541 { 4542 struct ena_adapter *adapter = (struct ena_adapter *)adapter_data; 4543 struct ena_admin_ena_hw_hints *hints; 4544 4545 WARN(aenq_e->aenq_common_desc.group != ENA_ADMIN_NOTIFICATION, 4546 "Invalid group(%x) expected %x\n", 4547 aenq_e->aenq_common_desc.group, 4548 ENA_ADMIN_NOTIFICATION); 4549 4550 switch (aenq_e->aenq_common_desc.syndrom) { 4551 case ENA_ADMIN_UPDATE_HINTS: 4552 hints = (struct ena_admin_ena_hw_hints *) 4553 (&aenq_e->inline_data_w4); 4554 ena_update_hints(adapter, hints); 4555 break; 4556 default: 4557 netif_err(adapter, drv, adapter->netdev, 4558 "Invalid aenq notification link state %d\n", 4559 aenq_e->aenq_common_desc.syndrom); 4560 } 4561 } 4562 4563 /* This handler will called for unknown event group or unimplemented handlers*/ 4564 static void unimplemented_aenq_handler(void *data, 4565 struct ena_admin_aenq_entry *aenq_e) 4566 { 4567 struct ena_adapter *adapter = (struct ena_adapter *)data; 4568 4569 netif_err(adapter, drv, adapter->netdev, 4570 "Unknown event was received or event with unimplemented handler\n"); 4571 } 4572 4573 static struct ena_aenq_handlers aenq_handlers = { 4574 .handlers = { 4575 [ENA_ADMIN_LINK_CHANGE] = ena_update_on_link_change, 4576 [ENA_ADMIN_NOTIFICATION] = ena_notification, 4577 [ENA_ADMIN_KEEP_ALIVE] = ena_keep_alive_wd, 4578 }, 4579 .unimplemented_handler = unimplemented_aenq_handler 4580 }; 4581 4582 module_init(ena_init); 4583 module_exit(ena_cleanup); 4584