1 /* 2 * Copyright 2015 Amazon.com, Inc. or its affiliates. 3 * 4 * This software is available to you under a choice of one of two 5 * licenses. You may choose to be licensed under the terms of the GNU 6 * General Public License (GPL) Version 2, available from the file 7 * COPYING in the main directory of this source tree, or the 8 * BSD license below: 9 * 10 * Redistribution and use in source and binary forms, with or 11 * without modification, are permitted provided that the following 12 * conditions are met: 13 * 14 * - Redistributions of source code must retain the above 15 * copyright notice, this list of conditions and the following 16 * disclaimer. 17 * 18 * - Redistributions in binary form must reproduce the above 19 * copyright notice, this list of conditions and the following 20 * disclaimer in the documentation and/or other materials 21 * provided with the distribution. 22 * 23 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, 24 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF 25 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND 26 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS 27 * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN 28 * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN 29 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE 30 * SOFTWARE. 31 */ 32 33 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt 34 35 #ifdef CONFIG_RFS_ACCEL 36 #include <linux/cpu_rmap.h> 37 #endif /* CONFIG_RFS_ACCEL */ 38 #include <linux/ethtool.h> 39 #include <linux/kernel.h> 40 #include <linux/module.h> 41 #include <linux/numa.h> 42 #include <linux/pci.h> 43 #include <linux/utsname.h> 44 #include <linux/version.h> 45 #include <linux/vmalloc.h> 46 #include <net/ip.h> 47 48 #include "ena_netdev.h" 49 #include <linux/bpf_trace.h> 50 #include "ena_pci_id_tbl.h" 51 52 MODULE_AUTHOR("Amazon.com, Inc. or its affiliates"); 53 MODULE_DESCRIPTION(DEVICE_NAME); 54 MODULE_LICENSE("GPL"); 55 56 /* Time in jiffies before concluding the transmitter is hung. */ 57 #define TX_TIMEOUT (5 * HZ) 58 59 #define ENA_NAPI_BUDGET 64 60 61 #define DEFAULT_MSG_ENABLE (NETIF_MSG_DRV | NETIF_MSG_PROBE | NETIF_MSG_IFUP | \ 62 NETIF_MSG_TX_DONE | NETIF_MSG_TX_ERR | NETIF_MSG_RX_ERR) 63 static int debug = -1; 64 module_param(debug, int, 0); 65 MODULE_PARM_DESC(debug, "Debug level (0=none,...,16=all)"); 66 67 static struct ena_aenq_handlers aenq_handlers; 68 69 static struct workqueue_struct *ena_wq; 70 71 MODULE_DEVICE_TABLE(pci, ena_pci_tbl); 72 73 static int ena_rss_init_default(struct ena_adapter *adapter); 74 static void check_for_admin_com_state(struct ena_adapter *adapter); 75 static void ena_destroy_device(struct ena_adapter *adapter, bool graceful); 76 static int ena_restore_device(struct ena_adapter *adapter); 77 78 static void ena_init_io_rings(struct ena_adapter *adapter, 79 int first_index, int count); 80 static void ena_init_napi_in_range(struct ena_adapter *adapter, int first_index, 81 int count); 82 static void ena_del_napi_in_range(struct ena_adapter *adapter, int first_index, 83 int count); 84 static int ena_setup_tx_resources(struct ena_adapter *adapter, int qid); 85 static int ena_setup_tx_resources_in_range(struct ena_adapter *adapter, 86 int first_index, 87 int count); 88 static int ena_create_io_tx_queue(struct ena_adapter *adapter, int qid); 89 static void ena_free_tx_resources(struct ena_adapter *adapter, int qid); 90 static int ena_clean_xdp_irq(struct ena_ring *xdp_ring, u32 budget); 91 static void ena_destroy_all_tx_queues(struct ena_adapter *adapter); 92 static void ena_free_all_io_tx_resources(struct ena_adapter *adapter); 93 static void ena_napi_disable_in_range(struct ena_adapter *adapter, 94 int first_index, int count); 95 static void ena_napi_enable_in_range(struct ena_adapter *adapter, 96 int first_index, int count); 97 static int ena_up(struct ena_adapter *adapter); 98 static void ena_down(struct ena_adapter *adapter); 99 static void ena_unmask_interrupt(struct ena_ring *tx_ring, 100 struct ena_ring *rx_ring); 101 static void ena_update_ring_numa_node(struct ena_ring *tx_ring, 102 struct ena_ring *rx_ring); 103 static void ena_unmap_tx_buff(struct ena_ring *tx_ring, 104 struct ena_tx_buffer *tx_info); 105 static int ena_create_io_tx_queues_in_range(struct ena_adapter *adapter, 106 int first_index, int count); 107 108 static void ena_tx_timeout(struct net_device *dev, unsigned int txqueue) 109 { 110 struct ena_adapter *adapter = netdev_priv(dev); 111 112 /* Change the state of the device to trigger reset 113 * Check that we are not in the middle or a trigger already 114 */ 115 116 if (test_and_set_bit(ENA_FLAG_TRIGGER_RESET, &adapter->flags)) 117 return; 118 119 adapter->reset_reason = ENA_REGS_RESET_OS_NETDEV_WD; 120 u64_stats_update_begin(&adapter->syncp); 121 adapter->dev_stats.tx_timeout++; 122 u64_stats_update_end(&adapter->syncp); 123 124 netif_err(adapter, tx_err, dev, "Transmit time out\n"); 125 } 126 127 static void update_rx_ring_mtu(struct ena_adapter *adapter, int mtu) 128 { 129 int i; 130 131 for (i = 0; i < adapter->num_io_queues; i++) 132 adapter->rx_ring[i].mtu = mtu; 133 } 134 135 static int ena_change_mtu(struct net_device *dev, int new_mtu) 136 { 137 struct ena_adapter *adapter = netdev_priv(dev); 138 int ret; 139 140 ret = ena_com_set_dev_mtu(adapter->ena_dev, new_mtu); 141 if (!ret) { 142 netif_dbg(adapter, drv, dev, "set MTU to %d\n", new_mtu); 143 update_rx_ring_mtu(adapter, new_mtu); 144 dev->mtu = new_mtu; 145 } else { 146 netif_err(adapter, drv, dev, "Failed to set MTU to %d\n", 147 new_mtu); 148 } 149 150 return ret; 151 } 152 153 static int ena_xmit_common(struct net_device *dev, 154 struct ena_ring *ring, 155 struct ena_tx_buffer *tx_info, 156 struct ena_com_tx_ctx *ena_tx_ctx, 157 u16 next_to_use, 158 u32 bytes) 159 { 160 struct ena_adapter *adapter = netdev_priv(dev); 161 int rc, nb_hw_desc; 162 163 if (unlikely(ena_com_is_doorbell_needed(ring->ena_com_io_sq, 164 ena_tx_ctx))) { 165 netif_dbg(adapter, tx_queued, dev, 166 "llq tx max burst size of queue %d achieved, writing doorbell to send burst\n", 167 ring->qid); 168 ena_com_write_sq_doorbell(ring->ena_com_io_sq); 169 } 170 171 /* prepare the packet's descriptors to dma engine */ 172 rc = ena_com_prepare_tx(ring->ena_com_io_sq, ena_tx_ctx, 173 &nb_hw_desc); 174 175 /* In case there isn't enough space in the queue for the packet, 176 * we simply drop it. All other failure reasons of 177 * ena_com_prepare_tx() are fatal and therefore require a device reset. 178 */ 179 if (unlikely(rc)) { 180 netif_err(adapter, tx_queued, dev, 181 "failed to prepare tx bufs\n"); 182 u64_stats_update_begin(&ring->syncp); 183 ring->tx_stats.prepare_ctx_err++; 184 u64_stats_update_end(&ring->syncp); 185 if (rc != -ENOMEM) { 186 adapter->reset_reason = 187 ENA_REGS_RESET_DRIVER_INVALID_STATE; 188 set_bit(ENA_FLAG_TRIGGER_RESET, &adapter->flags); 189 } 190 return rc; 191 } 192 193 u64_stats_update_begin(&ring->syncp); 194 ring->tx_stats.cnt++; 195 ring->tx_stats.bytes += bytes; 196 u64_stats_update_end(&ring->syncp); 197 198 tx_info->tx_descs = nb_hw_desc; 199 tx_info->last_jiffies = jiffies; 200 tx_info->print_once = 0; 201 202 ring->next_to_use = ENA_TX_RING_IDX_NEXT(next_to_use, 203 ring->ring_size); 204 return 0; 205 } 206 207 /* This is the XDP napi callback. XDP queues use a separate napi callback 208 * than Rx/Tx queues. 209 */ 210 static int ena_xdp_io_poll(struct napi_struct *napi, int budget) 211 { 212 struct ena_napi *ena_napi = container_of(napi, struct ena_napi, napi); 213 u32 xdp_work_done, xdp_budget; 214 struct ena_ring *xdp_ring; 215 int napi_comp_call = 0; 216 int ret; 217 218 xdp_ring = ena_napi->xdp_ring; 219 xdp_ring->first_interrupt = ena_napi->first_interrupt; 220 221 xdp_budget = budget; 222 223 if (!test_bit(ENA_FLAG_DEV_UP, &xdp_ring->adapter->flags) || 224 test_bit(ENA_FLAG_TRIGGER_RESET, &xdp_ring->adapter->flags)) { 225 napi_complete_done(napi, 0); 226 return 0; 227 } 228 229 xdp_work_done = ena_clean_xdp_irq(xdp_ring, xdp_budget); 230 231 /* If the device is about to reset or down, avoid unmask 232 * the interrupt and return 0 so NAPI won't reschedule 233 */ 234 if (unlikely(!test_bit(ENA_FLAG_DEV_UP, &xdp_ring->adapter->flags))) { 235 napi_complete_done(napi, 0); 236 ret = 0; 237 } else if (xdp_budget > xdp_work_done) { 238 napi_comp_call = 1; 239 if (napi_complete_done(napi, xdp_work_done)) 240 ena_unmask_interrupt(xdp_ring, NULL); 241 ena_update_ring_numa_node(xdp_ring, NULL); 242 ret = xdp_work_done; 243 } else { 244 ret = xdp_budget; 245 } 246 247 u64_stats_update_begin(&xdp_ring->syncp); 248 xdp_ring->tx_stats.napi_comp += napi_comp_call; 249 xdp_ring->tx_stats.tx_poll++; 250 u64_stats_update_end(&xdp_ring->syncp); 251 252 return ret; 253 } 254 255 static int ena_xdp_tx_map_buff(struct ena_ring *xdp_ring, 256 struct ena_tx_buffer *tx_info, 257 struct xdp_buff *xdp, 258 void **push_hdr, 259 u32 *push_len) 260 { 261 struct ena_adapter *adapter = xdp_ring->adapter; 262 struct ena_com_buf *ena_buf; 263 dma_addr_t dma = 0; 264 u32 size; 265 266 tx_info->xdpf = convert_to_xdp_frame(xdp); 267 size = tx_info->xdpf->len; 268 ena_buf = tx_info->bufs; 269 270 /* llq push buffer */ 271 *push_len = min_t(u32, size, xdp_ring->tx_max_header_size); 272 *push_hdr = tx_info->xdpf->data; 273 274 if (size - *push_len > 0) { 275 dma = dma_map_single(xdp_ring->dev, 276 *push_hdr + *push_len, 277 size - *push_len, 278 DMA_TO_DEVICE); 279 if (unlikely(dma_mapping_error(xdp_ring->dev, dma))) 280 goto error_report_dma_error; 281 282 tx_info->map_linear_data = 1; 283 tx_info->num_of_bufs = 1; 284 } 285 286 ena_buf->paddr = dma; 287 ena_buf->len = size; 288 289 return 0; 290 291 error_report_dma_error: 292 u64_stats_update_begin(&xdp_ring->syncp); 293 xdp_ring->tx_stats.dma_mapping_err++; 294 u64_stats_update_end(&xdp_ring->syncp); 295 netdev_warn(adapter->netdev, "failed to map xdp buff\n"); 296 297 xdp_return_frame_rx_napi(tx_info->xdpf); 298 tx_info->xdpf = NULL; 299 tx_info->num_of_bufs = 0; 300 301 return -EINVAL; 302 } 303 304 static int ena_xdp_xmit_buff(struct net_device *dev, 305 struct xdp_buff *xdp, 306 int qid, 307 struct ena_rx_buffer *rx_info) 308 { 309 struct ena_adapter *adapter = netdev_priv(dev); 310 struct ena_com_tx_ctx ena_tx_ctx = {0}; 311 struct ena_tx_buffer *tx_info; 312 struct ena_ring *xdp_ring; 313 u16 next_to_use, req_id; 314 int rc; 315 void *push_hdr; 316 u32 push_len; 317 318 xdp_ring = &adapter->tx_ring[qid]; 319 next_to_use = xdp_ring->next_to_use; 320 req_id = xdp_ring->free_ids[next_to_use]; 321 tx_info = &xdp_ring->tx_buffer_info[req_id]; 322 tx_info->num_of_bufs = 0; 323 page_ref_inc(rx_info->page); 324 tx_info->xdp_rx_page = rx_info->page; 325 326 rc = ena_xdp_tx_map_buff(xdp_ring, tx_info, xdp, &push_hdr, &push_len); 327 if (unlikely(rc)) 328 goto error_drop_packet; 329 330 ena_tx_ctx.ena_bufs = tx_info->bufs; 331 ena_tx_ctx.push_header = push_hdr; 332 ena_tx_ctx.num_bufs = tx_info->num_of_bufs; 333 ena_tx_ctx.req_id = req_id; 334 ena_tx_ctx.header_len = push_len; 335 336 rc = ena_xmit_common(dev, 337 xdp_ring, 338 tx_info, 339 &ena_tx_ctx, 340 next_to_use, 341 xdp->data_end - xdp->data); 342 if (rc) 343 goto error_unmap_dma; 344 /* trigger the dma engine. ena_com_write_sq_doorbell() 345 * has a mb 346 */ 347 ena_com_write_sq_doorbell(xdp_ring->ena_com_io_sq); 348 u64_stats_update_begin(&xdp_ring->syncp); 349 xdp_ring->tx_stats.doorbells++; 350 u64_stats_update_end(&xdp_ring->syncp); 351 352 return NETDEV_TX_OK; 353 354 error_unmap_dma: 355 ena_unmap_tx_buff(xdp_ring, tx_info); 356 tx_info->xdpf = NULL; 357 error_drop_packet: 358 359 return NETDEV_TX_OK; 360 } 361 362 static int ena_xdp_execute(struct ena_ring *rx_ring, 363 struct xdp_buff *xdp, 364 struct ena_rx_buffer *rx_info) 365 { 366 struct bpf_prog *xdp_prog; 367 u32 verdict = XDP_PASS; 368 369 rcu_read_lock(); 370 xdp_prog = READ_ONCE(rx_ring->xdp_bpf_prog); 371 372 if (!xdp_prog) 373 goto out; 374 375 verdict = bpf_prog_run_xdp(xdp_prog, xdp); 376 377 if (verdict == XDP_TX) 378 ena_xdp_xmit_buff(rx_ring->netdev, 379 xdp, 380 rx_ring->qid + rx_ring->adapter->num_io_queues, 381 rx_info); 382 else if (unlikely(verdict == XDP_ABORTED)) 383 trace_xdp_exception(rx_ring->netdev, xdp_prog, verdict); 384 else if (unlikely(verdict > XDP_TX)) 385 bpf_warn_invalid_xdp_action(verdict); 386 out: 387 rcu_read_unlock(); 388 return verdict; 389 } 390 391 static void ena_init_all_xdp_queues(struct ena_adapter *adapter) 392 { 393 adapter->xdp_first_ring = adapter->num_io_queues; 394 adapter->xdp_num_queues = adapter->num_io_queues; 395 396 ena_init_io_rings(adapter, 397 adapter->xdp_first_ring, 398 adapter->xdp_num_queues); 399 } 400 401 static int ena_setup_and_create_all_xdp_queues(struct ena_adapter *adapter) 402 { 403 int rc = 0; 404 405 rc = ena_setup_tx_resources_in_range(adapter, adapter->xdp_first_ring, 406 adapter->xdp_num_queues); 407 if (rc) 408 goto setup_err; 409 410 rc = ena_create_io_tx_queues_in_range(adapter, 411 adapter->xdp_first_ring, 412 adapter->xdp_num_queues); 413 if (rc) 414 goto create_err; 415 416 return 0; 417 418 create_err: 419 ena_free_all_io_tx_resources(adapter); 420 setup_err: 421 return rc; 422 } 423 424 /* Provides a way for both kernel and bpf-prog to know 425 * more about the RX-queue a given XDP frame arrived on. 426 */ 427 static int ena_xdp_register_rxq_info(struct ena_ring *rx_ring) 428 { 429 int rc; 430 431 rc = xdp_rxq_info_reg(&rx_ring->xdp_rxq, rx_ring->netdev, rx_ring->qid); 432 433 if (rc) { 434 netif_err(rx_ring->adapter, ifup, rx_ring->netdev, 435 "Failed to register xdp rx queue info. RX queue num %d rc: %d\n", 436 rx_ring->qid, rc); 437 goto err; 438 } 439 440 rc = xdp_rxq_info_reg_mem_model(&rx_ring->xdp_rxq, MEM_TYPE_PAGE_SHARED, 441 NULL); 442 443 if (rc) { 444 netif_err(rx_ring->adapter, ifup, rx_ring->netdev, 445 "Failed to register xdp rx queue info memory model. RX queue num %d rc: %d\n", 446 rx_ring->qid, rc); 447 xdp_rxq_info_unreg(&rx_ring->xdp_rxq); 448 } 449 450 err: 451 return rc; 452 } 453 454 static void ena_xdp_unregister_rxq_info(struct ena_ring *rx_ring) 455 { 456 xdp_rxq_info_unreg_mem_model(&rx_ring->xdp_rxq); 457 xdp_rxq_info_unreg(&rx_ring->xdp_rxq); 458 } 459 460 static void ena_xdp_exchange_program_rx_in_range(struct ena_adapter *adapter, 461 struct bpf_prog *prog, 462 int first, int count) 463 { 464 struct ena_ring *rx_ring; 465 int i = 0; 466 467 for (i = first; i < count; i++) { 468 rx_ring = &adapter->rx_ring[i]; 469 xchg(&rx_ring->xdp_bpf_prog, prog); 470 if (prog) { 471 ena_xdp_register_rxq_info(rx_ring); 472 rx_ring->rx_headroom = XDP_PACKET_HEADROOM; 473 } else { 474 ena_xdp_unregister_rxq_info(rx_ring); 475 rx_ring->rx_headroom = 0; 476 } 477 } 478 } 479 480 static void ena_xdp_exchange_program(struct ena_adapter *adapter, 481 struct bpf_prog *prog) 482 { 483 struct bpf_prog *old_bpf_prog = xchg(&adapter->xdp_bpf_prog, prog); 484 485 ena_xdp_exchange_program_rx_in_range(adapter, 486 prog, 487 0, 488 adapter->num_io_queues); 489 490 if (old_bpf_prog) 491 bpf_prog_put(old_bpf_prog); 492 } 493 494 static int ena_destroy_and_free_all_xdp_queues(struct ena_adapter *adapter) 495 { 496 bool was_up; 497 int rc; 498 499 was_up = test_bit(ENA_FLAG_DEV_UP, &adapter->flags); 500 501 if (was_up) 502 ena_down(adapter); 503 504 adapter->xdp_first_ring = 0; 505 adapter->xdp_num_queues = 0; 506 ena_xdp_exchange_program(adapter, NULL); 507 if (was_up) { 508 rc = ena_up(adapter); 509 if (rc) 510 return rc; 511 } 512 return 0; 513 } 514 515 static int ena_xdp_set(struct net_device *netdev, struct netdev_bpf *bpf) 516 { 517 struct ena_adapter *adapter = netdev_priv(netdev); 518 struct bpf_prog *prog = bpf->prog; 519 struct bpf_prog *old_bpf_prog; 520 int rc, prev_mtu; 521 bool is_up; 522 523 is_up = test_bit(ENA_FLAG_DEV_UP, &adapter->flags); 524 rc = ena_xdp_allowed(adapter); 525 if (rc == ENA_XDP_ALLOWED) { 526 old_bpf_prog = adapter->xdp_bpf_prog; 527 if (prog) { 528 if (!is_up) { 529 ena_init_all_xdp_queues(adapter); 530 } else if (!old_bpf_prog) { 531 ena_down(adapter); 532 ena_init_all_xdp_queues(adapter); 533 } 534 ena_xdp_exchange_program(adapter, prog); 535 536 if (is_up && !old_bpf_prog) { 537 rc = ena_up(adapter); 538 if (rc) 539 return rc; 540 } 541 } else if (old_bpf_prog) { 542 rc = ena_destroy_and_free_all_xdp_queues(adapter); 543 if (rc) 544 return rc; 545 } 546 547 prev_mtu = netdev->max_mtu; 548 netdev->max_mtu = prog ? ENA_XDP_MAX_MTU : adapter->max_mtu; 549 550 if (!old_bpf_prog) 551 netif_info(adapter, drv, adapter->netdev, 552 "xdp program set, changing the max_mtu from %d to %d", 553 prev_mtu, netdev->max_mtu); 554 555 } else if (rc == ENA_XDP_CURRENT_MTU_TOO_LARGE) { 556 netif_err(adapter, drv, adapter->netdev, 557 "Failed to set xdp program, the current MTU (%d) is larger than the maximum allowed MTU (%lu) while xdp is on", 558 netdev->mtu, ENA_XDP_MAX_MTU); 559 NL_SET_ERR_MSG_MOD(bpf->extack, 560 "Failed to set xdp program, the current MTU is larger than the maximum allowed MTU. Check the dmesg for more info"); 561 return -EINVAL; 562 } else if (rc == ENA_XDP_NO_ENOUGH_QUEUES) { 563 netif_err(adapter, drv, adapter->netdev, 564 "Failed to set xdp program, the Rx/Tx channel count should be at most half of the maximum allowed channel count. The current queue count (%d), the maximal queue count (%d)\n", 565 adapter->num_io_queues, adapter->max_num_io_queues); 566 NL_SET_ERR_MSG_MOD(bpf->extack, 567 "Failed to set xdp program, there is no enough space for allocating XDP queues, Check the dmesg for more info"); 568 return -EINVAL; 569 } 570 571 return 0; 572 } 573 574 /* This is the main xdp callback, it's used by the kernel to set/unset the xdp 575 * program as well as to query the current xdp program id. 576 */ 577 static int ena_xdp(struct net_device *netdev, struct netdev_bpf *bpf) 578 { 579 struct ena_adapter *adapter = netdev_priv(netdev); 580 581 switch (bpf->command) { 582 case XDP_SETUP_PROG: 583 return ena_xdp_set(netdev, bpf); 584 case XDP_QUERY_PROG: 585 bpf->prog_id = adapter->xdp_bpf_prog ? 586 adapter->xdp_bpf_prog->aux->id : 0; 587 break; 588 default: 589 return -EINVAL; 590 } 591 return 0; 592 } 593 594 static int ena_init_rx_cpu_rmap(struct ena_adapter *adapter) 595 { 596 #ifdef CONFIG_RFS_ACCEL 597 u32 i; 598 int rc; 599 600 adapter->netdev->rx_cpu_rmap = alloc_irq_cpu_rmap(adapter->num_io_queues); 601 if (!adapter->netdev->rx_cpu_rmap) 602 return -ENOMEM; 603 for (i = 0; i < adapter->num_io_queues; i++) { 604 int irq_idx = ENA_IO_IRQ_IDX(i); 605 606 rc = irq_cpu_rmap_add(adapter->netdev->rx_cpu_rmap, 607 pci_irq_vector(adapter->pdev, irq_idx)); 608 if (rc) { 609 free_irq_cpu_rmap(adapter->netdev->rx_cpu_rmap); 610 adapter->netdev->rx_cpu_rmap = NULL; 611 return rc; 612 } 613 } 614 #endif /* CONFIG_RFS_ACCEL */ 615 return 0; 616 } 617 618 static void ena_init_io_rings_common(struct ena_adapter *adapter, 619 struct ena_ring *ring, u16 qid) 620 { 621 ring->qid = qid; 622 ring->pdev = adapter->pdev; 623 ring->dev = &adapter->pdev->dev; 624 ring->netdev = adapter->netdev; 625 ring->napi = &adapter->ena_napi[qid].napi; 626 ring->adapter = adapter; 627 ring->ena_dev = adapter->ena_dev; 628 ring->per_napi_packets = 0; 629 ring->cpu = 0; 630 ring->first_interrupt = false; 631 ring->no_interrupt_event_cnt = 0; 632 u64_stats_init(&ring->syncp); 633 } 634 635 static void ena_init_io_rings(struct ena_adapter *adapter, 636 int first_index, int count) 637 { 638 struct ena_com_dev *ena_dev; 639 struct ena_ring *txr, *rxr; 640 int i; 641 642 ena_dev = adapter->ena_dev; 643 644 for (i = first_index; i < first_index + count; i++) { 645 txr = &adapter->tx_ring[i]; 646 rxr = &adapter->rx_ring[i]; 647 648 /* TX common ring state */ 649 ena_init_io_rings_common(adapter, txr, i); 650 651 /* TX specific ring state */ 652 txr->ring_size = adapter->requested_tx_ring_size; 653 txr->tx_max_header_size = ena_dev->tx_max_header_size; 654 txr->tx_mem_queue_type = ena_dev->tx_mem_queue_type; 655 txr->sgl_size = adapter->max_tx_sgl_size; 656 txr->smoothed_interval = 657 ena_com_get_nonadaptive_moderation_interval_tx(ena_dev); 658 659 /* Don't init RX queues for xdp queues */ 660 if (!ENA_IS_XDP_INDEX(adapter, i)) { 661 /* RX common ring state */ 662 ena_init_io_rings_common(adapter, rxr, i); 663 664 /* RX specific ring state */ 665 rxr->ring_size = adapter->requested_rx_ring_size; 666 rxr->rx_copybreak = adapter->rx_copybreak; 667 rxr->sgl_size = adapter->max_rx_sgl_size; 668 rxr->smoothed_interval = 669 ena_com_get_nonadaptive_moderation_interval_rx(ena_dev); 670 rxr->empty_rx_queue = 0; 671 adapter->ena_napi[i].dim.mode = DIM_CQ_PERIOD_MODE_START_FROM_EQE; 672 } 673 } 674 } 675 676 /* ena_setup_tx_resources - allocate I/O Tx resources (Descriptors) 677 * @adapter: network interface device structure 678 * @qid: queue index 679 * 680 * Return 0 on success, negative on failure 681 */ 682 static int ena_setup_tx_resources(struct ena_adapter *adapter, int qid) 683 { 684 struct ena_ring *tx_ring = &adapter->tx_ring[qid]; 685 struct ena_irq *ena_irq = &adapter->irq_tbl[ENA_IO_IRQ_IDX(qid)]; 686 int size, i, node; 687 688 if (tx_ring->tx_buffer_info) { 689 netif_err(adapter, ifup, 690 adapter->netdev, "tx_buffer_info info is not NULL"); 691 return -EEXIST; 692 } 693 694 size = sizeof(struct ena_tx_buffer) * tx_ring->ring_size; 695 node = cpu_to_node(ena_irq->cpu); 696 697 tx_ring->tx_buffer_info = vzalloc_node(size, node); 698 if (!tx_ring->tx_buffer_info) { 699 tx_ring->tx_buffer_info = vzalloc(size); 700 if (!tx_ring->tx_buffer_info) 701 goto err_tx_buffer_info; 702 } 703 704 size = sizeof(u16) * tx_ring->ring_size; 705 tx_ring->free_ids = vzalloc_node(size, node); 706 if (!tx_ring->free_ids) { 707 tx_ring->free_ids = vzalloc(size); 708 if (!tx_ring->free_ids) 709 goto err_tx_free_ids; 710 } 711 712 size = tx_ring->tx_max_header_size; 713 tx_ring->push_buf_intermediate_buf = vzalloc_node(size, node); 714 if (!tx_ring->push_buf_intermediate_buf) { 715 tx_ring->push_buf_intermediate_buf = vzalloc(size); 716 if (!tx_ring->push_buf_intermediate_buf) 717 goto err_push_buf_intermediate_buf; 718 } 719 720 /* Req id ring for TX out of order completions */ 721 for (i = 0; i < tx_ring->ring_size; i++) 722 tx_ring->free_ids[i] = i; 723 724 /* Reset tx statistics */ 725 memset(&tx_ring->tx_stats, 0x0, sizeof(tx_ring->tx_stats)); 726 727 tx_ring->next_to_use = 0; 728 tx_ring->next_to_clean = 0; 729 tx_ring->cpu = ena_irq->cpu; 730 return 0; 731 732 err_push_buf_intermediate_buf: 733 vfree(tx_ring->free_ids); 734 tx_ring->free_ids = NULL; 735 err_tx_free_ids: 736 vfree(tx_ring->tx_buffer_info); 737 tx_ring->tx_buffer_info = NULL; 738 err_tx_buffer_info: 739 return -ENOMEM; 740 } 741 742 /* ena_free_tx_resources - Free I/O Tx Resources per Queue 743 * @adapter: network interface device structure 744 * @qid: queue index 745 * 746 * Free all transmit software resources 747 */ 748 static void ena_free_tx_resources(struct ena_adapter *adapter, int qid) 749 { 750 struct ena_ring *tx_ring = &adapter->tx_ring[qid]; 751 752 vfree(tx_ring->tx_buffer_info); 753 tx_ring->tx_buffer_info = NULL; 754 755 vfree(tx_ring->free_ids); 756 tx_ring->free_ids = NULL; 757 758 vfree(tx_ring->push_buf_intermediate_buf); 759 tx_ring->push_buf_intermediate_buf = NULL; 760 } 761 762 static int ena_setup_tx_resources_in_range(struct ena_adapter *adapter, 763 int first_index, 764 int count) 765 { 766 int i, rc = 0; 767 768 for (i = first_index; i < first_index + count; i++) { 769 rc = ena_setup_tx_resources(adapter, i); 770 if (rc) 771 goto err_setup_tx; 772 } 773 774 return 0; 775 776 err_setup_tx: 777 778 netif_err(adapter, ifup, adapter->netdev, 779 "Tx queue %d: allocation failed\n", i); 780 781 /* rewind the index freeing the rings as we go */ 782 while (first_index < i--) 783 ena_free_tx_resources(adapter, i); 784 return rc; 785 } 786 787 static void ena_free_all_io_tx_resources_in_range(struct ena_adapter *adapter, 788 int first_index, int count) 789 { 790 int i; 791 792 for (i = first_index; i < first_index + count; i++) 793 ena_free_tx_resources(adapter, i); 794 } 795 796 /* ena_free_all_io_tx_resources - Free I/O Tx Resources for All Queues 797 * @adapter: board private structure 798 * 799 * Free all transmit software resources 800 */ 801 static void ena_free_all_io_tx_resources(struct ena_adapter *adapter) 802 { 803 ena_free_all_io_tx_resources_in_range(adapter, 804 0, 805 adapter->xdp_num_queues + 806 adapter->num_io_queues); 807 } 808 809 static int validate_rx_req_id(struct ena_ring *rx_ring, u16 req_id) 810 { 811 if (likely(req_id < rx_ring->ring_size)) 812 return 0; 813 814 netif_err(rx_ring->adapter, rx_err, rx_ring->netdev, 815 "Invalid rx req_id: %hu\n", req_id); 816 817 u64_stats_update_begin(&rx_ring->syncp); 818 rx_ring->rx_stats.bad_req_id++; 819 u64_stats_update_end(&rx_ring->syncp); 820 821 /* Trigger device reset */ 822 rx_ring->adapter->reset_reason = ENA_REGS_RESET_INV_RX_REQ_ID; 823 set_bit(ENA_FLAG_TRIGGER_RESET, &rx_ring->adapter->flags); 824 return -EFAULT; 825 } 826 827 /* ena_setup_rx_resources - allocate I/O Rx resources (Descriptors) 828 * @adapter: network interface device structure 829 * @qid: queue index 830 * 831 * Returns 0 on success, negative on failure 832 */ 833 static int ena_setup_rx_resources(struct ena_adapter *adapter, 834 u32 qid) 835 { 836 struct ena_ring *rx_ring = &adapter->rx_ring[qid]; 837 struct ena_irq *ena_irq = &adapter->irq_tbl[ENA_IO_IRQ_IDX(qid)]; 838 int size, node, i; 839 840 if (rx_ring->rx_buffer_info) { 841 netif_err(adapter, ifup, adapter->netdev, 842 "rx_buffer_info is not NULL"); 843 return -EEXIST; 844 } 845 846 /* alloc extra element so in rx path 847 * we can always prefetch rx_info + 1 848 */ 849 size = sizeof(struct ena_rx_buffer) * (rx_ring->ring_size + 1); 850 node = cpu_to_node(ena_irq->cpu); 851 852 rx_ring->rx_buffer_info = vzalloc_node(size, node); 853 if (!rx_ring->rx_buffer_info) { 854 rx_ring->rx_buffer_info = vzalloc(size); 855 if (!rx_ring->rx_buffer_info) 856 return -ENOMEM; 857 } 858 859 size = sizeof(u16) * rx_ring->ring_size; 860 rx_ring->free_ids = vzalloc_node(size, node); 861 if (!rx_ring->free_ids) { 862 rx_ring->free_ids = vzalloc(size); 863 if (!rx_ring->free_ids) { 864 vfree(rx_ring->rx_buffer_info); 865 rx_ring->rx_buffer_info = NULL; 866 return -ENOMEM; 867 } 868 } 869 870 /* Req id ring for receiving RX pkts out of order */ 871 for (i = 0; i < rx_ring->ring_size; i++) 872 rx_ring->free_ids[i] = i; 873 874 /* Reset rx statistics */ 875 memset(&rx_ring->rx_stats, 0x0, sizeof(rx_ring->rx_stats)); 876 877 rx_ring->next_to_clean = 0; 878 rx_ring->next_to_use = 0; 879 rx_ring->cpu = ena_irq->cpu; 880 881 return 0; 882 } 883 884 /* ena_free_rx_resources - Free I/O Rx Resources 885 * @adapter: network interface device structure 886 * @qid: queue index 887 * 888 * Free all receive software resources 889 */ 890 static void ena_free_rx_resources(struct ena_adapter *adapter, 891 u32 qid) 892 { 893 struct ena_ring *rx_ring = &adapter->rx_ring[qid]; 894 895 vfree(rx_ring->rx_buffer_info); 896 rx_ring->rx_buffer_info = NULL; 897 898 vfree(rx_ring->free_ids); 899 rx_ring->free_ids = NULL; 900 } 901 902 /* ena_setup_all_rx_resources - allocate I/O Rx queues resources for all queues 903 * @adapter: board private structure 904 * 905 * Return 0 on success, negative on failure 906 */ 907 static int ena_setup_all_rx_resources(struct ena_adapter *adapter) 908 { 909 int i, rc = 0; 910 911 for (i = 0; i < adapter->num_io_queues; i++) { 912 rc = ena_setup_rx_resources(adapter, i); 913 if (rc) 914 goto err_setup_rx; 915 } 916 917 return 0; 918 919 err_setup_rx: 920 921 netif_err(adapter, ifup, adapter->netdev, 922 "Rx queue %d: allocation failed\n", i); 923 924 /* rewind the index freeing the rings as we go */ 925 while (i--) 926 ena_free_rx_resources(adapter, i); 927 return rc; 928 } 929 930 /* ena_free_all_io_rx_resources - Free I/O Rx Resources for All Queues 931 * @adapter: board private structure 932 * 933 * Free all receive software resources 934 */ 935 static void ena_free_all_io_rx_resources(struct ena_adapter *adapter) 936 { 937 int i; 938 939 for (i = 0; i < adapter->num_io_queues; i++) 940 ena_free_rx_resources(adapter, i); 941 } 942 943 static int ena_alloc_rx_page(struct ena_ring *rx_ring, 944 struct ena_rx_buffer *rx_info, gfp_t gfp) 945 { 946 struct ena_com_buf *ena_buf; 947 struct page *page; 948 dma_addr_t dma; 949 950 /* if previous allocated page is not used */ 951 if (unlikely(rx_info->page)) 952 return 0; 953 954 page = alloc_page(gfp); 955 if (unlikely(!page)) { 956 u64_stats_update_begin(&rx_ring->syncp); 957 rx_ring->rx_stats.page_alloc_fail++; 958 u64_stats_update_end(&rx_ring->syncp); 959 return -ENOMEM; 960 } 961 962 dma = dma_map_page(rx_ring->dev, page, 0, ENA_PAGE_SIZE, 963 DMA_FROM_DEVICE); 964 if (unlikely(dma_mapping_error(rx_ring->dev, dma))) { 965 u64_stats_update_begin(&rx_ring->syncp); 966 rx_ring->rx_stats.dma_mapping_err++; 967 u64_stats_update_end(&rx_ring->syncp); 968 969 __free_page(page); 970 return -EIO; 971 } 972 netif_dbg(rx_ring->adapter, rx_status, rx_ring->netdev, 973 "alloc page %p, rx_info %p\n", page, rx_info); 974 975 rx_info->page = page; 976 rx_info->page_offset = 0; 977 ena_buf = &rx_info->ena_buf; 978 ena_buf->paddr = dma + rx_ring->rx_headroom; 979 ena_buf->len = ENA_PAGE_SIZE - rx_ring->rx_headroom; 980 981 return 0; 982 } 983 984 static void ena_free_rx_page(struct ena_ring *rx_ring, 985 struct ena_rx_buffer *rx_info) 986 { 987 struct page *page = rx_info->page; 988 struct ena_com_buf *ena_buf = &rx_info->ena_buf; 989 990 if (unlikely(!page)) { 991 netif_warn(rx_ring->adapter, rx_err, rx_ring->netdev, 992 "Trying to free unallocated buffer\n"); 993 return; 994 } 995 996 dma_unmap_page(rx_ring->dev, 997 ena_buf->paddr - rx_ring->rx_headroom, 998 ENA_PAGE_SIZE, 999 DMA_FROM_DEVICE); 1000 1001 __free_page(page); 1002 rx_info->page = NULL; 1003 } 1004 1005 static int ena_refill_rx_bufs(struct ena_ring *rx_ring, u32 num) 1006 { 1007 u16 next_to_use, req_id; 1008 u32 i; 1009 int rc; 1010 1011 next_to_use = rx_ring->next_to_use; 1012 1013 for (i = 0; i < num; i++) { 1014 struct ena_rx_buffer *rx_info; 1015 1016 req_id = rx_ring->free_ids[next_to_use]; 1017 1018 rx_info = &rx_ring->rx_buffer_info[req_id]; 1019 1020 rc = ena_alloc_rx_page(rx_ring, rx_info, 1021 GFP_ATOMIC | __GFP_COMP); 1022 if (unlikely(rc < 0)) { 1023 netif_warn(rx_ring->adapter, rx_err, rx_ring->netdev, 1024 "failed to alloc buffer for rx queue %d\n", 1025 rx_ring->qid); 1026 break; 1027 } 1028 rc = ena_com_add_single_rx_desc(rx_ring->ena_com_io_sq, 1029 &rx_info->ena_buf, 1030 req_id); 1031 if (unlikely(rc)) { 1032 netif_warn(rx_ring->adapter, rx_status, rx_ring->netdev, 1033 "failed to add buffer for rx queue %d\n", 1034 rx_ring->qid); 1035 break; 1036 } 1037 next_to_use = ENA_RX_RING_IDX_NEXT(next_to_use, 1038 rx_ring->ring_size); 1039 } 1040 1041 if (unlikely(i < num)) { 1042 u64_stats_update_begin(&rx_ring->syncp); 1043 rx_ring->rx_stats.refil_partial++; 1044 u64_stats_update_end(&rx_ring->syncp); 1045 netdev_warn(rx_ring->netdev, 1046 "refilled rx qid %d with only %d buffers (from %d)\n", 1047 rx_ring->qid, i, num); 1048 } 1049 1050 /* ena_com_write_sq_doorbell issues a wmb() */ 1051 if (likely(i)) 1052 ena_com_write_sq_doorbell(rx_ring->ena_com_io_sq); 1053 1054 rx_ring->next_to_use = next_to_use; 1055 1056 return i; 1057 } 1058 1059 static void ena_free_rx_bufs(struct ena_adapter *adapter, 1060 u32 qid) 1061 { 1062 struct ena_ring *rx_ring = &adapter->rx_ring[qid]; 1063 u32 i; 1064 1065 for (i = 0; i < rx_ring->ring_size; i++) { 1066 struct ena_rx_buffer *rx_info = &rx_ring->rx_buffer_info[i]; 1067 1068 if (rx_info->page) 1069 ena_free_rx_page(rx_ring, rx_info); 1070 } 1071 } 1072 1073 /* ena_refill_all_rx_bufs - allocate all queues Rx buffers 1074 * @adapter: board private structure 1075 */ 1076 static void ena_refill_all_rx_bufs(struct ena_adapter *adapter) 1077 { 1078 struct ena_ring *rx_ring; 1079 int i, rc, bufs_num; 1080 1081 for (i = 0; i < adapter->num_io_queues; i++) { 1082 rx_ring = &adapter->rx_ring[i]; 1083 bufs_num = rx_ring->ring_size - 1; 1084 rc = ena_refill_rx_bufs(rx_ring, bufs_num); 1085 1086 if (unlikely(rc != bufs_num)) 1087 netif_warn(rx_ring->adapter, rx_status, rx_ring->netdev, 1088 "refilling Queue %d failed. allocated %d buffers from: %d\n", 1089 i, rc, bufs_num); 1090 } 1091 } 1092 1093 static void ena_free_all_rx_bufs(struct ena_adapter *adapter) 1094 { 1095 int i; 1096 1097 for (i = 0; i < adapter->num_io_queues; i++) 1098 ena_free_rx_bufs(adapter, i); 1099 } 1100 1101 static void ena_unmap_tx_buff(struct ena_ring *tx_ring, 1102 struct ena_tx_buffer *tx_info) 1103 { 1104 struct ena_com_buf *ena_buf; 1105 u32 cnt; 1106 int i; 1107 1108 ena_buf = tx_info->bufs; 1109 cnt = tx_info->num_of_bufs; 1110 1111 if (unlikely(!cnt)) 1112 return; 1113 1114 if (tx_info->map_linear_data) { 1115 dma_unmap_single(tx_ring->dev, 1116 dma_unmap_addr(ena_buf, paddr), 1117 dma_unmap_len(ena_buf, len), 1118 DMA_TO_DEVICE); 1119 ena_buf++; 1120 cnt--; 1121 } 1122 1123 /* unmap remaining mapped pages */ 1124 for (i = 0; i < cnt; i++) { 1125 dma_unmap_page(tx_ring->dev, dma_unmap_addr(ena_buf, paddr), 1126 dma_unmap_len(ena_buf, len), DMA_TO_DEVICE); 1127 ena_buf++; 1128 } 1129 } 1130 1131 /* ena_free_tx_bufs - Free Tx Buffers per Queue 1132 * @tx_ring: TX ring for which buffers be freed 1133 */ 1134 static void ena_free_tx_bufs(struct ena_ring *tx_ring) 1135 { 1136 bool print_once = true; 1137 u32 i; 1138 1139 for (i = 0; i < tx_ring->ring_size; i++) { 1140 struct ena_tx_buffer *tx_info = &tx_ring->tx_buffer_info[i]; 1141 1142 if (!tx_info->skb) 1143 continue; 1144 1145 if (print_once) { 1146 netdev_notice(tx_ring->netdev, 1147 "free uncompleted tx skb qid %d idx 0x%x\n", 1148 tx_ring->qid, i); 1149 print_once = false; 1150 } else { 1151 netdev_dbg(tx_ring->netdev, 1152 "free uncompleted tx skb qid %d idx 0x%x\n", 1153 tx_ring->qid, i); 1154 } 1155 1156 ena_unmap_tx_buff(tx_ring, tx_info); 1157 1158 dev_kfree_skb_any(tx_info->skb); 1159 } 1160 netdev_tx_reset_queue(netdev_get_tx_queue(tx_ring->netdev, 1161 tx_ring->qid)); 1162 } 1163 1164 static void ena_free_all_tx_bufs(struct ena_adapter *adapter) 1165 { 1166 struct ena_ring *tx_ring; 1167 int i; 1168 1169 for (i = 0; i < adapter->num_io_queues + adapter->xdp_num_queues; i++) { 1170 tx_ring = &adapter->tx_ring[i]; 1171 ena_free_tx_bufs(tx_ring); 1172 } 1173 } 1174 1175 static void ena_destroy_all_tx_queues(struct ena_adapter *adapter) 1176 { 1177 u16 ena_qid; 1178 int i; 1179 1180 for (i = 0; i < adapter->num_io_queues + adapter->xdp_num_queues; i++) { 1181 ena_qid = ENA_IO_TXQ_IDX(i); 1182 ena_com_destroy_io_queue(adapter->ena_dev, ena_qid); 1183 } 1184 } 1185 1186 static void ena_destroy_all_rx_queues(struct ena_adapter *adapter) 1187 { 1188 u16 ena_qid; 1189 int i; 1190 1191 for (i = 0; i < adapter->num_io_queues; i++) { 1192 ena_qid = ENA_IO_RXQ_IDX(i); 1193 cancel_work_sync(&adapter->ena_napi[i].dim.work); 1194 ena_com_destroy_io_queue(adapter->ena_dev, ena_qid); 1195 } 1196 } 1197 1198 static void ena_destroy_all_io_queues(struct ena_adapter *adapter) 1199 { 1200 ena_destroy_all_tx_queues(adapter); 1201 ena_destroy_all_rx_queues(adapter); 1202 } 1203 1204 static int handle_invalid_req_id(struct ena_ring *ring, u16 req_id, 1205 struct ena_tx_buffer *tx_info, bool is_xdp) 1206 { 1207 if (tx_info) 1208 netif_err(ring->adapter, 1209 tx_done, 1210 ring->netdev, 1211 "tx_info doesn't have valid %s", 1212 is_xdp ? "xdp frame" : "skb"); 1213 else 1214 netif_err(ring->adapter, 1215 tx_done, 1216 ring->netdev, 1217 "Invalid req_id: %hu\n", 1218 req_id); 1219 1220 u64_stats_update_begin(&ring->syncp); 1221 ring->tx_stats.bad_req_id++; 1222 u64_stats_update_end(&ring->syncp); 1223 1224 /* Trigger device reset */ 1225 ring->adapter->reset_reason = ENA_REGS_RESET_INV_TX_REQ_ID; 1226 set_bit(ENA_FLAG_TRIGGER_RESET, &ring->adapter->flags); 1227 return -EFAULT; 1228 } 1229 1230 static int validate_tx_req_id(struct ena_ring *tx_ring, u16 req_id) 1231 { 1232 struct ena_tx_buffer *tx_info = NULL; 1233 1234 if (likely(req_id < tx_ring->ring_size)) { 1235 tx_info = &tx_ring->tx_buffer_info[req_id]; 1236 if (likely(tx_info->skb)) 1237 return 0; 1238 } 1239 1240 return handle_invalid_req_id(tx_ring, req_id, tx_info, false); 1241 } 1242 1243 static int validate_xdp_req_id(struct ena_ring *xdp_ring, u16 req_id) 1244 { 1245 struct ena_tx_buffer *tx_info = NULL; 1246 1247 if (likely(req_id < xdp_ring->ring_size)) { 1248 tx_info = &xdp_ring->tx_buffer_info[req_id]; 1249 if (likely(tx_info->xdpf)) 1250 return 0; 1251 } 1252 1253 return handle_invalid_req_id(xdp_ring, req_id, tx_info, true); 1254 } 1255 1256 static int ena_clean_tx_irq(struct ena_ring *tx_ring, u32 budget) 1257 { 1258 struct netdev_queue *txq; 1259 bool above_thresh; 1260 u32 tx_bytes = 0; 1261 u32 total_done = 0; 1262 u16 next_to_clean; 1263 u16 req_id; 1264 int tx_pkts = 0; 1265 int rc; 1266 1267 next_to_clean = tx_ring->next_to_clean; 1268 txq = netdev_get_tx_queue(tx_ring->netdev, tx_ring->qid); 1269 1270 while (tx_pkts < budget) { 1271 struct ena_tx_buffer *tx_info; 1272 struct sk_buff *skb; 1273 1274 rc = ena_com_tx_comp_req_id_get(tx_ring->ena_com_io_cq, 1275 &req_id); 1276 if (rc) 1277 break; 1278 1279 rc = validate_tx_req_id(tx_ring, req_id); 1280 if (rc) 1281 break; 1282 1283 tx_info = &tx_ring->tx_buffer_info[req_id]; 1284 skb = tx_info->skb; 1285 1286 /* prefetch skb_end_pointer() to speedup skb_shinfo(skb) */ 1287 prefetch(&skb->end); 1288 1289 tx_info->skb = NULL; 1290 tx_info->last_jiffies = 0; 1291 1292 ena_unmap_tx_buff(tx_ring, tx_info); 1293 1294 netif_dbg(tx_ring->adapter, tx_done, tx_ring->netdev, 1295 "tx_poll: q %d skb %p completed\n", tx_ring->qid, 1296 skb); 1297 1298 tx_bytes += skb->len; 1299 dev_kfree_skb(skb); 1300 tx_pkts++; 1301 total_done += tx_info->tx_descs; 1302 1303 tx_ring->free_ids[next_to_clean] = req_id; 1304 next_to_clean = ENA_TX_RING_IDX_NEXT(next_to_clean, 1305 tx_ring->ring_size); 1306 } 1307 1308 tx_ring->next_to_clean = next_to_clean; 1309 ena_com_comp_ack(tx_ring->ena_com_io_sq, total_done); 1310 ena_com_update_dev_comp_head(tx_ring->ena_com_io_cq); 1311 1312 netdev_tx_completed_queue(txq, tx_pkts, tx_bytes); 1313 1314 netif_dbg(tx_ring->adapter, tx_done, tx_ring->netdev, 1315 "tx_poll: q %d done. total pkts: %d\n", 1316 tx_ring->qid, tx_pkts); 1317 1318 /* need to make the rings circular update visible to 1319 * ena_start_xmit() before checking for netif_queue_stopped(). 1320 */ 1321 smp_mb(); 1322 1323 above_thresh = ena_com_sq_have_enough_space(tx_ring->ena_com_io_sq, 1324 ENA_TX_WAKEUP_THRESH); 1325 if (unlikely(netif_tx_queue_stopped(txq) && above_thresh)) { 1326 __netif_tx_lock(txq, smp_processor_id()); 1327 above_thresh = 1328 ena_com_sq_have_enough_space(tx_ring->ena_com_io_sq, 1329 ENA_TX_WAKEUP_THRESH); 1330 if (netif_tx_queue_stopped(txq) && above_thresh && 1331 test_bit(ENA_FLAG_DEV_UP, &tx_ring->adapter->flags)) { 1332 netif_tx_wake_queue(txq); 1333 u64_stats_update_begin(&tx_ring->syncp); 1334 tx_ring->tx_stats.queue_wakeup++; 1335 u64_stats_update_end(&tx_ring->syncp); 1336 } 1337 __netif_tx_unlock(txq); 1338 } 1339 1340 return tx_pkts; 1341 } 1342 1343 static struct sk_buff *ena_alloc_skb(struct ena_ring *rx_ring, bool frags) 1344 { 1345 struct sk_buff *skb; 1346 1347 if (frags) 1348 skb = napi_get_frags(rx_ring->napi); 1349 else 1350 skb = netdev_alloc_skb_ip_align(rx_ring->netdev, 1351 rx_ring->rx_copybreak); 1352 1353 if (unlikely(!skb)) { 1354 u64_stats_update_begin(&rx_ring->syncp); 1355 rx_ring->rx_stats.skb_alloc_fail++; 1356 u64_stats_update_end(&rx_ring->syncp); 1357 netif_dbg(rx_ring->adapter, rx_err, rx_ring->netdev, 1358 "Failed to allocate skb. frags: %d\n", frags); 1359 return NULL; 1360 } 1361 1362 return skb; 1363 } 1364 1365 static struct sk_buff *ena_rx_skb(struct ena_ring *rx_ring, 1366 struct ena_com_rx_buf_info *ena_bufs, 1367 u32 descs, 1368 u16 *next_to_clean) 1369 { 1370 struct sk_buff *skb; 1371 struct ena_rx_buffer *rx_info; 1372 u16 len, req_id, buf = 0; 1373 void *va; 1374 int rc; 1375 1376 len = ena_bufs[buf].len; 1377 req_id = ena_bufs[buf].req_id; 1378 1379 rc = validate_rx_req_id(rx_ring, req_id); 1380 if (unlikely(rc < 0)) 1381 return NULL; 1382 1383 rx_info = &rx_ring->rx_buffer_info[req_id]; 1384 1385 if (unlikely(!rx_info->page)) { 1386 netif_err(rx_ring->adapter, rx_err, rx_ring->netdev, 1387 "Page is NULL\n"); 1388 return NULL; 1389 } 1390 1391 netif_dbg(rx_ring->adapter, rx_status, rx_ring->netdev, 1392 "rx_info %p page %p\n", 1393 rx_info, rx_info->page); 1394 1395 /* save virt address of first buffer */ 1396 va = page_address(rx_info->page) + rx_info->page_offset; 1397 prefetch(va + NET_IP_ALIGN); 1398 1399 if (len <= rx_ring->rx_copybreak) { 1400 skb = ena_alloc_skb(rx_ring, false); 1401 if (unlikely(!skb)) 1402 return NULL; 1403 1404 netif_dbg(rx_ring->adapter, rx_status, rx_ring->netdev, 1405 "rx allocated small packet. len %d. data_len %d\n", 1406 skb->len, skb->data_len); 1407 1408 /* sync this buffer for CPU use */ 1409 dma_sync_single_for_cpu(rx_ring->dev, 1410 dma_unmap_addr(&rx_info->ena_buf, paddr), 1411 len, 1412 DMA_FROM_DEVICE); 1413 skb_copy_to_linear_data(skb, va, len); 1414 dma_sync_single_for_device(rx_ring->dev, 1415 dma_unmap_addr(&rx_info->ena_buf, paddr), 1416 len, 1417 DMA_FROM_DEVICE); 1418 1419 skb_put(skb, len); 1420 skb->protocol = eth_type_trans(skb, rx_ring->netdev); 1421 rx_ring->free_ids[*next_to_clean] = req_id; 1422 *next_to_clean = ENA_RX_RING_IDX_ADD(*next_to_clean, descs, 1423 rx_ring->ring_size); 1424 return skb; 1425 } 1426 1427 skb = ena_alloc_skb(rx_ring, true); 1428 if (unlikely(!skb)) 1429 return NULL; 1430 1431 do { 1432 dma_unmap_page(rx_ring->dev, 1433 dma_unmap_addr(&rx_info->ena_buf, paddr), 1434 ENA_PAGE_SIZE, DMA_FROM_DEVICE); 1435 1436 skb_add_rx_frag(skb, skb_shinfo(skb)->nr_frags, rx_info->page, 1437 rx_info->page_offset, len, ENA_PAGE_SIZE); 1438 1439 netif_dbg(rx_ring->adapter, rx_status, rx_ring->netdev, 1440 "rx skb updated. len %d. data_len %d\n", 1441 skb->len, skb->data_len); 1442 1443 rx_info->page = NULL; 1444 1445 rx_ring->free_ids[*next_to_clean] = req_id; 1446 *next_to_clean = 1447 ENA_RX_RING_IDX_NEXT(*next_to_clean, 1448 rx_ring->ring_size); 1449 if (likely(--descs == 0)) 1450 break; 1451 1452 buf++; 1453 len = ena_bufs[buf].len; 1454 req_id = ena_bufs[buf].req_id; 1455 1456 rc = validate_rx_req_id(rx_ring, req_id); 1457 if (unlikely(rc < 0)) 1458 return NULL; 1459 1460 rx_info = &rx_ring->rx_buffer_info[req_id]; 1461 } while (1); 1462 1463 return skb; 1464 } 1465 1466 /* ena_rx_checksum - indicate in skb if hw indicated a good cksum 1467 * @adapter: structure containing adapter specific data 1468 * @ena_rx_ctx: received packet context/metadata 1469 * @skb: skb currently being received and modified 1470 */ 1471 static void ena_rx_checksum(struct ena_ring *rx_ring, 1472 struct ena_com_rx_ctx *ena_rx_ctx, 1473 struct sk_buff *skb) 1474 { 1475 /* Rx csum disabled */ 1476 if (unlikely(!(rx_ring->netdev->features & NETIF_F_RXCSUM))) { 1477 skb->ip_summed = CHECKSUM_NONE; 1478 return; 1479 } 1480 1481 /* For fragmented packets the checksum isn't valid */ 1482 if (ena_rx_ctx->frag) { 1483 skb->ip_summed = CHECKSUM_NONE; 1484 return; 1485 } 1486 1487 /* if IP and error */ 1488 if (unlikely((ena_rx_ctx->l3_proto == ENA_ETH_IO_L3_PROTO_IPV4) && 1489 (ena_rx_ctx->l3_csum_err))) { 1490 /* ipv4 checksum error */ 1491 skb->ip_summed = CHECKSUM_NONE; 1492 u64_stats_update_begin(&rx_ring->syncp); 1493 rx_ring->rx_stats.bad_csum++; 1494 u64_stats_update_end(&rx_ring->syncp); 1495 netif_dbg(rx_ring->adapter, rx_err, rx_ring->netdev, 1496 "RX IPv4 header checksum error\n"); 1497 return; 1498 } 1499 1500 /* if TCP/UDP */ 1501 if (likely((ena_rx_ctx->l4_proto == ENA_ETH_IO_L4_PROTO_TCP) || 1502 (ena_rx_ctx->l4_proto == ENA_ETH_IO_L4_PROTO_UDP))) { 1503 if (unlikely(ena_rx_ctx->l4_csum_err)) { 1504 /* TCP/UDP checksum error */ 1505 u64_stats_update_begin(&rx_ring->syncp); 1506 rx_ring->rx_stats.bad_csum++; 1507 u64_stats_update_end(&rx_ring->syncp); 1508 netif_dbg(rx_ring->adapter, rx_err, rx_ring->netdev, 1509 "RX L4 checksum error\n"); 1510 skb->ip_summed = CHECKSUM_NONE; 1511 return; 1512 } 1513 1514 if (likely(ena_rx_ctx->l4_csum_checked)) { 1515 skb->ip_summed = CHECKSUM_UNNECESSARY; 1516 u64_stats_update_begin(&rx_ring->syncp); 1517 rx_ring->rx_stats.csum_good++; 1518 u64_stats_update_end(&rx_ring->syncp); 1519 } else { 1520 u64_stats_update_begin(&rx_ring->syncp); 1521 rx_ring->rx_stats.csum_unchecked++; 1522 u64_stats_update_end(&rx_ring->syncp); 1523 skb->ip_summed = CHECKSUM_NONE; 1524 } 1525 } else { 1526 skb->ip_summed = CHECKSUM_NONE; 1527 return; 1528 } 1529 1530 } 1531 1532 static void ena_set_rx_hash(struct ena_ring *rx_ring, 1533 struct ena_com_rx_ctx *ena_rx_ctx, 1534 struct sk_buff *skb) 1535 { 1536 enum pkt_hash_types hash_type; 1537 1538 if (likely(rx_ring->netdev->features & NETIF_F_RXHASH)) { 1539 if (likely((ena_rx_ctx->l4_proto == ENA_ETH_IO_L4_PROTO_TCP) || 1540 (ena_rx_ctx->l4_proto == ENA_ETH_IO_L4_PROTO_UDP))) 1541 1542 hash_type = PKT_HASH_TYPE_L4; 1543 else 1544 hash_type = PKT_HASH_TYPE_NONE; 1545 1546 /* Override hash type if the packet is fragmented */ 1547 if (ena_rx_ctx->frag) 1548 hash_type = PKT_HASH_TYPE_NONE; 1549 1550 skb_set_hash(skb, ena_rx_ctx->hash, hash_type); 1551 } 1552 } 1553 1554 static int ena_xdp_handle_buff(struct ena_ring *rx_ring, struct xdp_buff *xdp) 1555 { 1556 struct ena_rx_buffer *rx_info; 1557 int ret; 1558 1559 rx_info = &rx_ring->rx_buffer_info[rx_ring->ena_bufs[0].req_id]; 1560 xdp->data = page_address(rx_info->page) + 1561 rx_info->page_offset + rx_ring->rx_headroom; 1562 xdp_set_data_meta_invalid(xdp); 1563 xdp->data_hard_start = page_address(rx_info->page); 1564 xdp->data_end = xdp->data + rx_ring->ena_bufs[0].len; 1565 /* If for some reason we received a bigger packet than 1566 * we expect, then we simply drop it 1567 */ 1568 if (unlikely(rx_ring->ena_bufs[0].len > ENA_XDP_MAX_MTU)) 1569 return XDP_DROP; 1570 1571 ret = ena_xdp_execute(rx_ring, xdp, rx_info); 1572 1573 /* The xdp program might expand the headers */ 1574 if (ret == XDP_PASS) { 1575 rx_info->page_offset = xdp->data - xdp->data_hard_start; 1576 rx_ring->ena_bufs[0].len = xdp->data_end - xdp->data; 1577 } 1578 1579 return ret; 1580 } 1581 /* ena_clean_rx_irq - Cleanup RX irq 1582 * @rx_ring: RX ring to clean 1583 * @napi: napi handler 1584 * @budget: how many packets driver is allowed to clean 1585 * 1586 * Returns the number of cleaned buffers. 1587 */ 1588 static int ena_clean_rx_irq(struct ena_ring *rx_ring, struct napi_struct *napi, 1589 u32 budget) 1590 { 1591 u16 next_to_clean = rx_ring->next_to_clean; 1592 struct ena_com_rx_ctx ena_rx_ctx; 1593 struct ena_adapter *adapter; 1594 u32 res_budget, work_done; 1595 int rx_copybreak_pkt = 0; 1596 int refill_threshold; 1597 struct sk_buff *skb; 1598 int refill_required; 1599 struct xdp_buff xdp; 1600 int total_len = 0; 1601 int xdp_verdict; 1602 int rc = 0; 1603 int i; 1604 1605 netif_dbg(rx_ring->adapter, rx_status, rx_ring->netdev, 1606 "%s qid %d\n", __func__, rx_ring->qid); 1607 res_budget = budget; 1608 xdp.rxq = &rx_ring->xdp_rxq; 1609 xdp.frame_sz = ENA_PAGE_SIZE; 1610 1611 do { 1612 xdp_verdict = XDP_PASS; 1613 skb = NULL; 1614 ena_rx_ctx.ena_bufs = rx_ring->ena_bufs; 1615 ena_rx_ctx.max_bufs = rx_ring->sgl_size; 1616 ena_rx_ctx.descs = 0; 1617 rc = ena_com_rx_pkt(rx_ring->ena_com_io_cq, 1618 rx_ring->ena_com_io_sq, 1619 &ena_rx_ctx); 1620 if (unlikely(rc)) 1621 goto error; 1622 1623 if (unlikely(ena_rx_ctx.descs == 0)) 1624 break; 1625 1626 netif_dbg(rx_ring->adapter, rx_status, rx_ring->netdev, 1627 "rx_poll: q %d got packet from ena. descs #: %d l3 proto %d l4 proto %d hash: %x\n", 1628 rx_ring->qid, ena_rx_ctx.descs, ena_rx_ctx.l3_proto, 1629 ena_rx_ctx.l4_proto, ena_rx_ctx.hash); 1630 1631 if (ena_xdp_present_ring(rx_ring)) 1632 xdp_verdict = ena_xdp_handle_buff(rx_ring, &xdp); 1633 1634 /* allocate skb and fill it */ 1635 if (xdp_verdict == XDP_PASS) 1636 skb = ena_rx_skb(rx_ring, 1637 rx_ring->ena_bufs, 1638 ena_rx_ctx.descs, 1639 &next_to_clean); 1640 1641 if (unlikely(!skb)) { 1642 if (xdp_verdict == XDP_TX) { 1643 ena_free_rx_page(rx_ring, 1644 &rx_ring->rx_buffer_info[rx_ring->ena_bufs[0].req_id]); 1645 res_budget--; 1646 } 1647 for (i = 0; i < ena_rx_ctx.descs; i++) { 1648 rx_ring->free_ids[next_to_clean] = 1649 rx_ring->ena_bufs[i].req_id; 1650 next_to_clean = 1651 ENA_RX_RING_IDX_NEXT(next_to_clean, 1652 rx_ring->ring_size); 1653 } 1654 if (xdp_verdict == XDP_TX || xdp_verdict == XDP_DROP) 1655 continue; 1656 break; 1657 } 1658 1659 ena_rx_checksum(rx_ring, &ena_rx_ctx, skb); 1660 1661 ena_set_rx_hash(rx_ring, &ena_rx_ctx, skb); 1662 1663 skb_record_rx_queue(skb, rx_ring->qid); 1664 1665 if (rx_ring->ena_bufs[0].len <= rx_ring->rx_copybreak) { 1666 total_len += rx_ring->ena_bufs[0].len; 1667 rx_copybreak_pkt++; 1668 napi_gro_receive(napi, skb); 1669 } else { 1670 total_len += skb->len; 1671 napi_gro_frags(napi); 1672 } 1673 1674 res_budget--; 1675 } while (likely(res_budget)); 1676 1677 work_done = budget - res_budget; 1678 rx_ring->per_napi_packets += work_done; 1679 u64_stats_update_begin(&rx_ring->syncp); 1680 rx_ring->rx_stats.bytes += total_len; 1681 rx_ring->rx_stats.cnt += work_done; 1682 rx_ring->rx_stats.rx_copybreak_pkt += rx_copybreak_pkt; 1683 u64_stats_update_end(&rx_ring->syncp); 1684 1685 rx_ring->next_to_clean = next_to_clean; 1686 1687 refill_required = ena_com_free_desc(rx_ring->ena_com_io_sq); 1688 refill_threshold = 1689 min_t(int, rx_ring->ring_size / ENA_RX_REFILL_THRESH_DIVIDER, 1690 ENA_RX_REFILL_THRESH_PACKET); 1691 1692 /* Optimization, try to batch new rx buffers */ 1693 if (refill_required > refill_threshold) { 1694 ena_com_update_dev_comp_head(rx_ring->ena_com_io_cq); 1695 ena_refill_rx_bufs(rx_ring, refill_required); 1696 } 1697 1698 return work_done; 1699 1700 error: 1701 adapter = netdev_priv(rx_ring->netdev); 1702 1703 u64_stats_update_begin(&rx_ring->syncp); 1704 rx_ring->rx_stats.bad_desc_num++; 1705 u64_stats_update_end(&rx_ring->syncp); 1706 1707 /* Too many desc from the device. Trigger reset */ 1708 adapter->reset_reason = ENA_REGS_RESET_TOO_MANY_RX_DESCS; 1709 set_bit(ENA_FLAG_TRIGGER_RESET, &adapter->flags); 1710 1711 return 0; 1712 } 1713 1714 static void ena_dim_work(struct work_struct *w) 1715 { 1716 struct dim *dim = container_of(w, struct dim, work); 1717 struct dim_cq_moder cur_moder = 1718 net_dim_get_rx_moderation(dim->mode, dim->profile_ix); 1719 struct ena_napi *ena_napi = container_of(dim, struct ena_napi, dim); 1720 1721 ena_napi->rx_ring->smoothed_interval = cur_moder.usec; 1722 dim->state = DIM_START_MEASURE; 1723 } 1724 1725 static void ena_adjust_adaptive_rx_intr_moderation(struct ena_napi *ena_napi) 1726 { 1727 struct dim_sample dim_sample; 1728 struct ena_ring *rx_ring = ena_napi->rx_ring; 1729 1730 if (!rx_ring->per_napi_packets) 1731 return; 1732 1733 rx_ring->non_empty_napi_events++; 1734 1735 dim_update_sample(rx_ring->non_empty_napi_events, 1736 rx_ring->rx_stats.cnt, 1737 rx_ring->rx_stats.bytes, 1738 &dim_sample); 1739 1740 net_dim(&ena_napi->dim, dim_sample); 1741 1742 rx_ring->per_napi_packets = 0; 1743 } 1744 1745 static void ena_unmask_interrupt(struct ena_ring *tx_ring, 1746 struct ena_ring *rx_ring) 1747 { 1748 struct ena_eth_io_intr_reg intr_reg; 1749 u32 rx_interval = 0; 1750 /* Rx ring can be NULL when for XDP tx queues which don't have an 1751 * accompanying rx_ring pair. 1752 */ 1753 if (rx_ring) 1754 rx_interval = ena_com_get_adaptive_moderation_enabled(rx_ring->ena_dev) ? 1755 rx_ring->smoothed_interval : 1756 ena_com_get_nonadaptive_moderation_interval_rx(rx_ring->ena_dev); 1757 1758 /* Update intr register: rx intr delay, 1759 * tx intr delay and interrupt unmask 1760 */ 1761 ena_com_update_intr_reg(&intr_reg, 1762 rx_interval, 1763 tx_ring->smoothed_interval, 1764 true); 1765 1766 u64_stats_update_begin(&tx_ring->syncp); 1767 tx_ring->tx_stats.unmask_interrupt++; 1768 u64_stats_update_end(&tx_ring->syncp); 1769 /* It is a shared MSI-X. 1770 * Tx and Rx CQ have pointer to it. 1771 * So we use one of them to reach the intr reg 1772 * The Tx ring is used because the rx_ring is NULL for XDP queues 1773 */ 1774 ena_com_unmask_intr(tx_ring->ena_com_io_cq, &intr_reg); 1775 } 1776 1777 static void ena_update_ring_numa_node(struct ena_ring *tx_ring, 1778 struct ena_ring *rx_ring) 1779 { 1780 int cpu = get_cpu(); 1781 int numa_node; 1782 1783 /* Check only one ring since the 2 rings are running on the same cpu */ 1784 if (likely(tx_ring->cpu == cpu)) 1785 goto out; 1786 1787 numa_node = cpu_to_node(cpu); 1788 put_cpu(); 1789 1790 if (numa_node != NUMA_NO_NODE) { 1791 ena_com_update_numa_node(tx_ring->ena_com_io_cq, numa_node); 1792 if (rx_ring) 1793 ena_com_update_numa_node(rx_ring->ena_com_io_cq, 1794 numa_node); 1795 } 1796 1797 tx_ring->cpu = cpu; 1798 if (rx_ring) 1799 rx_ring->cpu = cpu; 1800 1801 return; 1802 out: 1803 put_cpu(); 1804 } 1805 1806 static int ena_clean_xdp_irq(struct ena_ring *xdp_ring, u32 budget) 1807 { 1808 u32 total_done = 0; 1809 u16 next_to_clean; 1810 u32 tx_bytes = 0; 1811 int tx_pkts = 0; 1812 u16 req_id; 1813 int rc; 1814 1815 if (unlikely(!xdp_ring)) 1816 return 0; 1817 next_to_clean = xdp_ring->next_to_clean; 1818 1819 while (tx_pkts < budget) { 1820 struct ena_tx_buffer *tx_info; 1821 struct xdp_frame *xdpf; 1822 1823 rc = ena_com_tx_comp_req_id_get(xdp_ring->ena_com_io_cq, 1824 &req_id); 1825 if (rc) 1826 break; 1827 1828 rc = validate_xdp_req_id(xdp_ring, req_id); 1829 if (rc) 1830 break; 1831 1832 tx_info = &xdp_ring->tx_buffer_info[req_id]; 1833 xdpf = tx_info->xdpf; 1834 1835 tx_info->xdpf = NULL; 1836 tx_info->last_jiffies = 0; 1837 ena_unmap_tx_buff(xdp_ring, tx_info); 1838 1839 netif_dbg(xdp_ring->adapter, tx_done, xdp_ring->netdev, 1840 "tx_poll: q %d skb %p completed\n", xdp_ring->qid, 1841 xdpf); 1842 1843 tx_bytes += xdpf->len; 1844 tx_pkts++; 1845 total_done += tx_info->tx_descs; 1846 1847 __free_page(tx_info->xdp_rx_page); 1848 xdp_ring->free_ids[next_to_clean] = req_id; 1849 next_to_clean = ENA_TX_RING_IDX_NEXT(next_to_clean, 1850 xdp_ring->ring_size); 1851 } 1852 1853 xdp_ring->next_to_clean = next_to_clean; 1854 ena_com_comp_ack(xdp_ring->ena_com_io_sq, total_done); 1855 ena_com_update_dev_comp_head(xdp_ring->ena_com_io_cq); 1856 1857 netif_dbg(xdp_ring->adapter, tx_done, xdp_ring->netdev, 1858 "tx_poll: q %d done. total pkts: %d\n", 1859 xdp_ring->qid, tx_pkts); 1860 1861 return tx_pkts; 1862 } 1863 1864 static int ena_io_poll(struct napi_struct *napi, int budget) 1865 { 1866 struct ena_napi *ena_napi = container_of(napi, struct ena_napi, napi); 1867 struct ena_ring *tx_ring, *rx_ring; 1868 int tx_work_done; 1869 int rx_work_done = 0; 1870 int tx_budget; 1871 int napi_comp_call = 0; 1872 int ret; 1873 1874 tx_ring = ena_napi->tx_ring; 1875 rx_ring = ena_napi->rx_ring; 1876 1877 tx_ring->first_interrupt = ena_napi->first_interrupt; 1878 rx_ring->first_interrupt = ena_napi->first_interrupt; 1879 1880 tx_budget = tx_ring->ring_size / ENA_TX_POLL_BUDGET_DIVIDER; 1881 1882 if (!test_bit(ENA_FLAG_DEV_UP, &tx_ring->adapter->flags) || 1883 test_bit(ENA_FLAG_TRIGGER_RESET, &tx_ring->adapter->flags)) { 1884 napi_complete_done(napi, 0); 1885 return 0; 1886 } 1887 1888 tx_work_done = ena_clean_tx_irq(tx_ring, tx_budget); 1889 /* On netpoll the budget is zero and the handler should only clean the 1890 * tx completions. 1891 */ 1892 if (likely(budget)) 1893 rx_work_done = ena_clean_rx_irq(rx_ring, napi, budget); 1894 1895 /* If the device is about to reset or down, avoid unmask 1896 * the interrupt and return 0 so NAPI won't reschedule 1897 */ 1898 if (unlikely(!test_bit(ENA_FLAG_DEV_UP, &tx_ring->adapter->flags) || 1899 test_bit(ENA_FLAG_TRIGGER_RESET, &tx_ring->adapter->flags))) { 1900 napi_complete_done(napi, 0); 1901 ret = 0; 1902 1903 } else if ((budget > rx_work_done) && (tx_budget > tx_work_done)) { 1904 napi_comp_call = 1; 1905 1906 /* Update numa and unmask the interrupt only when schedule 1907 * from the interrupt context (vs from sk_busy_loop) 1908 */ 1909 if (napi_complete_done(napi, rx_work_done)) { 1910 /* We apply adaptive moderation on Rx path only. 1911 * Tx uses static interrupt moderation. 1912 */ 1913 if (ena_com_get_adaptive_moderation_enabled(rx_ring->ena_dev)) 1914 ena_adjust_adaptive_rx_intr_moderation(ena_napi); 1915 1916 ena_unmask_interrupt(tx_ring, rx_ring); 1917 } 1918 1919 ena_update_ring_numa_node(tx_ring, rx_ring); 1920 1921 ret = rx_work_done; 1922 } else { 1923 ret = budget; 1924 } 1925 1926 u64_stats_update_begin(&tx_ring->syncp); 1927 tx_ring->tx_stats.napi_comp += napi_comp_call; 1928 tx_ring->tx_stats.tx_poll++; 1929 u64_stats_update_end(&tx_ring->syncp); 1930 1931 return ret; 1932 } 1933 1934 static irqreturn_t ena_intr_msix_mgmnt(int irq, void *data) 1935 { 1936 struct ena_adapter *adapter = (struct ena_adapter *)data; 1937 1938 ena_com_admin_q_comp_intr_handler(adapter->ena_dev); 1939 1940 /* Don't call the aenq handler before probe is done */ 1941 if (likely(test_bit(ENA_FLAG_DEVICE_RUNNING, &adapter->flags))) 1942 ena_com_aenq_intr_handler(adapter->ena_dev, data); 1943 1944 return IRQ_HANDLED; 1945 } 1946 1947 /* ena_intr_msix_io - MSI-X Interrupt Handler for Tx/Rx 1948 * @irq: interrupt number 1949 * @data: pointer to a network interface private napi device structure 1950 */ 1951 static irqreturn_t ena_intr_msix_io(int irq, void *data) 1952 { 1953 struct ena_napi *ena_napi = data; 1954 1955 ena_napi->first_interrupt = true; 1956 1957 napi_schedule_irqoff(&ena_napi->napi); 1958 1959 return IRQ_HANDLED; 1960 } 1961 1962 /* Reserve a single MSI-X vector for management (admin + aenq). 1963 * plus reserve one vector for each potential io queue. 1964 * the number of potential io queues is the minimum of what the device 1965 * supports and the number of vCPUs. 1966 */ 1967 static int ena_enable_msix(struct ena_adapter *adapter) 1968 { 1969 int msix_vecs, irq_cnt; 1970 1971 if (test_bit(ENA_FLAG_MSIX_ENABLED, &adapter->flags)) { 1972 netif_err(adapter, probe, adapter->netdev, 1973 "Error, MSI-X is already enabled\n"); 1974 return -EPERM; 1975 } 1976 1977 /* Reserved the max msix vectors we might need */ 1978 msix_vecs = ENA_MAX_MSIX_VEC(adapter->max_num_io_queues); 1979 netif_dbg(adapter, probe, adapter->netdev, 1980 "trying to enable MSI-X, vectors %d\n", msix_vecs); 1981 1982 irq_cnt = pci_alloc_irq_vectors(adapter->pdev, ENA_MIN_MSIX_VEC, 1983 msix_vecs, PCI_IRQ_MSIX); 1984 1985 if (irq_cnt < 0) { 1986 netif_err(adapter, probe, adapter->netdev, 1987 "Failed to enable MSI-X. irq_cnt %d\n", irq_cnt); 1988 return -ENOSPC; 1989 } 1990 1991 if (irq_cnt != msix_vecs) { 1992 netif_notice(adapter, probe, adapter->netdev, 1993 "enable only %d MSI-X (out of %d), reduce the number of queues\n", 1994 irq_cnt, msix_vecs); 1995 adapter->num_io_queues = irq_cnt - ENA_ADMIN_MSIX_VEC; 1996 } 1997 1998 if (ena_init_rx_cpu_rmap(adapter)) 1999 netif_warn(adapter, probe, adapter->netdev, 2000 "Failed to map IRQs to CPUs\n"); 2001 2002 adapter->msix_vecs = irq_cnt; 2003 set_bit(ENA_FLAG_MSIX_ENABLED, &adapter->flags); 2004 2005 return 0; 2006 } 2007 2008 static void ena_setup_mgmnt_intr(struct ena_adapter *adapter) 2009 { 2010 u32 cpu; 2011 2012 snprintf(adapter->irq_tbl[ENA_MGMNT_IRQ_IDX].name, 2013 ENA_IRQNAME_SIZE, "ena-mgmnt@pci:%s", 2014 pci_name(adapter->pdev)); 2015 adapter->irq_tbl[ENA_MGMNT_IRQ_IDX].handler = 2016 ena_intr_msix_mgmnt; 2017 adapter->irq_tbl[ENA_MGMNT_IRQ_IDX].data = adapter; 2018 adapter->irq_tbl[ENA_MGMNT_IRQ_IDX].vector = 2019 pci_irq_vector(adapter->pdev, ENA_MGMNT_IRQ_IDX); 2020 cpu = cpumask_first(cpu_online_mask); 2021 adapter->irq_tbl[ENA_MGMNT_IRQ_IDX].cpu = cpu; 2022 cpumask_set_cpu(cpu, 2023 &adapter->irq_tbl[ENA_MGMNT_IRQ_IDX].affinity_hint_mask); 2024 } 2025 2026 static void ena_setup_io_intr(struct ena_adapter *adapter) 2027 { 2028 struct net_device *netdev; 2029 int irq_idx, i, cpu; 2030 int io_queue_count; 2031 2032 netdev = adapter->netdev; 2033 io_queue_count = adapter->num_io_queues + adapter->xdp_num_queues; 2034 2035 for (i = 0; i < io_queue_count; i++) { 2036 irq_idx = ENA_IO_IRQ_IDX(i); 2037 cpu = i % num_online_cpus(); 2038 2039 snprintf(adapter->irq_tbl[irq_idx].name, ENA_IRQNAME_SIZE, 2040 "%s-Tx-Rx-%d", netdev->name, i); 2041 adapter->irq_tbl[irq_idx].handler = ena_intr_msix_io; 2042 adapter->irq_tbl[irq_idx].data = &adapter->ena_napi[i]; 2043 adapter->irq_tbl[irq_idx].vector = 2044 pci_irq_vector(adapter->pdev, irq_idx); 2045 adapter->irq_tbl[irq_idx].cpu = cpu; 2046 2047 cpumask_set_cpu(cpu, 2048 &adapter->irq_tbl[irq_idx].affinity_hint_mask); 2049 } 2050 } 2051 2052 static int ena_request_mgmnt_irq(struct ena_adapter *adapter) 2053 { 2054 unsigned long flags = 0; 2055 struct ena_irq *irq; 2056 int rc; 2057 2058 irq = &adapter->irq_tbl[ENA_MGMNT_IRQ_IDX]; 2059 rc = request_irq(irq->vector, irq->handler, flags, irq->name, 2060 irq->data); 2061 if (rc) { 2062 netif_err(adapter, probe, adapter->netdev, 2063 "failed to request admin irq\n"); 2064 return rc; 2065 } 2066 2067 netif_dbg(adapter, probe, adapter->netdev, 2068 "set affinity hint of mgmnt irq.to 0x%lx (irq vector: %d)\n", 2069 irq->affinity_hint_mask.bits[0], irq->vector); 2070 2071 irq_set_affinity_hint(irq->vector, &irq->affinity_hint_mask); 2072 2073 return rc; 2074 } 2075 2076 static int ena_request_io_irq(struct ena_adapter *adapter) 2077 { 2078 u32 io_queue_count = adapter->num_io_queues + adapter->xdp_num_queues; 2079 unsigned long flags = 0; 2080 struct ena_irq *irq; 2081 int rc = 0, i, k; 2082 2083 if (!test_bit(ENA_FLAG_MSIX_ENABLED, &adapter->flags)) { 2084 netif_err(adapter, ifup, adapter->netdev, 2085 "Failed to request I/O IRQ: MSI-X is not enabled\n"); 2086 return -EINVAL; 2087 } 2088 2089 for (i = ENA_IO_IRQ_FIRST_IDX; i < ENA_MAX_MSIX_VEC(io_queue_count); i++) { 2090 irq = &adapter->irq_tbl[i]; 2091 rc = request_irq(irq->vector, irq->handler, flags, irq->name, 2092 irq->data); 2093 if (rc) { 2094 netif_err(adapter, ifup, adapter->netdev, 2095 "Failed to request I/O IRQ. index %d rc %d\n", 2096 i, rc); 2097 goto err; 2098 } 2099 2100 netif_dbg(adapter, ifup, adapter->netdev, 2101 "set affinity hint of irq. index %d to 0x%lx (irq vector: %d)\n", 2102 i, irq->affinity_hint_mask.bits[0], irq->vector); 2103 2104 irq_set_affinity_hint(irq->vector, &irq->affinity_hint_mask); 2105 } 2106 2107 return rc; 2108 2109 err: 2110 for (k = ENA_IO_IRQ_FIRST_IDX; k < i; k++) { 2111 irq = &adapter->irq_tbl[k]; 2112 free_irq(irq->vector, irq->data); 2113 } 2114 2115 return rc; 2116 } 2117 2118 static void ena_free_mgmnt_irq(struct ena_adapter *adapter) 2119 { 2120 struct ena_irq *irq; 2121 2122 irq = &adapter->irq_tbl[ENA_MGMNT_IRQ_IDX]; 2123 synchronize_irq(irq->vector); 2124 irq_set_affinity_hint(irq->vector, NULL); 2125 free_irq(irq->vector, irq->data); 2126 } 2127 2128 static void ena_free_io_irq(struct ena_adapter *adapter) 2129 { 2130 u32 io_queue_count = adapter->num_io_queues + adapter->xdp_num_queues; 2131 struct ena_irq *irq; 2132 int i; 2133 2134 #ifdef CONFIG_RFS_ACCEL 2135 if (adapter->msix_vecs >= 1) { 2136 free_irq_cpu_rmap(adapter->netdev->rx_cpu_rmap); 2137 adapter->netdev->rx_cpu_rmap = NULL; 2138 } 2139 #endif /* CONFIG_RFS_ACCEL */ 2140 2141 for (i = ENA_IO_IRQ_FIRST_IDX; i < ENA_MAX_MSIX_VEC(io_queue_count); i++) { 2142 irq = &adapter->irq_tbl[i]; 2143 irq_set_affinity_hint(irq->vector, NULL); 2144 free_irq(irq->vector, irq->data); 2145 } 2146 } 2147 2148 static void ena_disable_msix(struct ena_adapter *adapter) 2149 { 2150 if (test_and_clear_bit(ENA_FLAG_MSIX_ENABLED, &adapter->flags)) 2151 pci_free_irq_vectors(adapter->pdev); 2152 } 2153 2154 static void ena_disable_io_intr_sync(struct ena_adapter *adapter) 2155 { 2156 u32 io_queue_count = adapter->num_io_queues + adapter->xdp_num_queues; 2157 int i; 2158 2159 if (!netif_running(adapter->netdev)) 2160 return; 2161 2162 for (i = ENA_IO_IRQ_FIRST_IDX; i < ENA_MAX_MSIX_VEC(io_queue_count); i++) 2163 synchronize_irq(adapter->irq_tbl[i].vector); 2164 } 2165 2166 static void ena_del_napi_in_range(struct ena_adapter *adapter, 2167 int first_index, 2168 int count) 2169 { 2170 int i; 2171 2172 for (i = first_index; i < first_index + count; i++) { 2173 /* Check if napi was initialized before */ 2174 if (!ENA_IS_XDP_INDEX(adapter, i) || 2175 adapter->ena_napi[i].xdp_ring) 2176 netif_napi_del(&adapter->ena_napi[i].napi); 2177 else 2178 WARN_ON(ENA_IS_XDP_INDEX(adapter, i) && 2179 adapter->ena_napi[i].xdp_ring); 2180 } 2181 } 2182 2183 static void ena_init_napi_in_range(struct ena_adapter *adapter, 2184 int first_index, int count) 2185 { 2186 struct ena_napi *napi = {0}; 2187 int i; 2188 2189 for (i = first_index; i < first_index + count; i++) { 2190 napi = &adapter->ena_napi[i]; 2191 2192 netif_napi_add(adapter->netdev, 2193 &adapter->ena_napi[i].napi, 2194 ENA_IS_XDP_INDEX(adapter, i) ? ena_xdp_io_poll : ena_io_poll, 2195 ENA_NAPI_BUDGET); 2196 2197 if (!ENA_IS_XDP_INDEX(adapter, i)) { 2198 napi->rx_ring = &adapter->rx_ring[i]; 2199 napi->tx_ring = &adapter->tx_ring[i]; 2200 } else { 2201 napi->xdp_ring = &adapter->tx_ring[i]; 2202 } 2203 napi->qid = i; 2204 } 2205 } 2206 2207 static void ena_napi_disable_in_range(struct ena_adapter *adapter, 2208 int first_index, 2209 int count) 2210 { 2211 int i; 2212 2213 for (i = first_index; i < first_index + count; i++) 2214 napi_disable(&adapter->ena_napi[i].napi); 2215 } 2216 2217 static void ena_napi_enable_in_range(struct ena_adapter *adapter, 2218 int first_index, 2219 int count) 2220 { 2221 int i; 2222 2223 for (i = first_index; i < first_index + count; i++) 2224 napi_enable(&adapter->ena_napi[i].napi); 2225 } 2226 2227 /* Configure the Rx forwarding */ 2228 static int ena_rss_configure(struct ena_adapter *adapter) 2229 { 2230 struct ena_com_dev *ena_dev = adapter->ena_dev; 2231 int rc; 2232 2233 /* In case the RSS table wasn't initialized by probe */ 2234 if (!ena_dev->rss.tbl_log_size) { 2235 rc = ena_rss_init_default(adapter); 2236 if (rc && (rc != -EOPNOTSUPP)) { 2237 netif_err(adapter, ifup, adapter->netdev, 2238 "Failed to init RSS rc: %d\n", rc); 2239 return rc; 2240 } 2241 } 2242 2243 /* Set indirect table */ 2244 rc = ena_com_indirect_table_set(ena_dev); 2245 if (unlikely(rc && rc != -EOPNOTSUPP)) 2246 return rc; 2247 2248 /* Configure hash function (if supported) */ 2249 rc = ena_com_set_hash_function(ena_dev); 2250 if (unlikely(rc && (rc != -EOPNOTSUPP))) 2251 return rc; 2252 2253 /* Configure hash inputs (if supported) */ 2254 rc = ena_com_set_hash_ctrl(ena_dev); 2255 if (unlikely(rc && (rc != -EOPNOTSUPP))) 2256 return rc; 2257 2258 return 0; 2259 } 2260 2261 static int ena_up_complete(struct ena_adapter *adapter) 2262 { 2263 int rc; 2264 2265 rc = ena_rss_configure(adapter); 2266 if (rc) 2267 return rc; 2268 2269 ena_change_mtu(adapter->netdev, adapter->netdev->mtu); 2270 2271 ena_refill_all_rx_bufs(adapter); 2272 2273 /* enable transmits */ 2274 netif_tx_start_all_queues(adapter->netdev); 2275 2276 ena_napi_enable_in_range(adapter, 2277 0, 2278 adapter->xdp_num_queues + adapter->num_io_queues); 2279 2280 return 0; 2281 } 2282 2283 static int ena_create_io_tx_queue(struct ena_adapter *adapter, int qid) 2284 { 2285 struct ena_com_create_io_ctx ctx; 2286 struct ena_com_dev *ena_dev; 2287 struct ena_ring *tx_ring; 2288 u32 msix_vector; 2289 u16 ena_qid; 2290 int rc; 2291 2292 ena_dev = adapter->ena_dev; 2293 2294 tx_ring = &adapter->tx_ring[qid]; 2295 msix_vector = ENA_IO_IRQ_IDX(qid); 2296 ena_qid = ENA_IO_TXQ_IDX(qid); 2297 2298 memset(&ctx, 0x0, sizeof(ctx)); 2299 2300 ctx.direction = ENA_COM_IO_QUEUE_DIRECTION_TX; 2301 ctx.qid = ena_qid; 2302 ctx.mem_queue_type = ena_dev->tx_mem_queue_type; 2303 ctx.msix_vector = msix_vector; 2304 ctx.queue_size = tx_ring->ring_size; 2305 ctx.numa_node = cpu_to_node(tx_ring->cpu); 2306 2307 rc = ena_com_create_io_queue(ena_dev, &ctx); 2308 if (rc) { 2309 netif_err(adapter, ifup, adapter->netdev, 2310 "Failed to create I/O TX queue num %d rc: %d\n", 2311 qid, rc); 2312 return rc; 2313 } 2314 2315 rc = ena_com_get_io_handlers(ena_dev, ena_qid, 2316 &tx_ring->ena_com_io_sq, 2317 &tx_ring->ena_com_io_cq); 2318 if (rc) { 2319 netif_err(adapter, ifup, adapter->netdev, 2320 "Failed to get TX queue handlers. TX queue num %d rc: %d\n", 2321 qid, rc); 2322 ena_com_destroy_io_queue(ena_dev, ena_qid); 2323 return rc; 2324 } 2325 2326 ena_com_update_numa_node(tx_ring->ena_com_io_cq, ctx.numa_node); 2327 return rc; 2328 } 2329 2330 static int ena_create_io_tx_queues_in_range(struct ena_adapter *adapter, 2331 int first_index, int count) 2332 { 2333 struct ena_com_dev *ena_dev = adapter->ena_dev; 2334 int rc, i; 2335 2336 for (i = first_index; i < first_index + count; i++) { 2337 rc = ena_create_io_tx_queue(adapter, i); 2338 if (rc) 2339 goto create_err; 2340 } 2341 2342 return 0; 2343 2344 create_err: 2345 while (i-- > first_index) 2346 ena_com_destroy_io_queue(ena_dev, ENA_IO_TXQ_IDX(i)); 2347 2348 return rc; 2349 } 2350 2351 static int ena_create_io_rx_queue(struct ena_adapter *adapter, int qid) 2352 { 2353 struct ena_com_dev *ena_dev; 2354 struct ena_com_create_io_ctx ctx; 2355 struct ena_ring *rx_ring; 2356 u32 msix_vector; 2357 u16 ena_qid; 2358 int rc; 2359 2360 ena_dev = adapter->ena_dev; 2361 2362 rx_ring = &adapter->rx_ring[qid]; 2363 msix_vector = ENA_IO_IRQ_IDX(qid); 2364 ena_qid = ENA_IO_RXQ_IDX(qid); 2365 2366 memset(&ctx, 0x0, sizeof(ctx)); 2367 2368 ctx.qid = ena_qid; 2369 ctx.direction = ENA_COM_IO_QUEUE_DIRECTION_RX; 2370 ctx.mem_queue_type = ENA_ADMIN_PLACEMENT_POLICY_HOST; 2371 ctx.msix_vector = msix_vector; 2372 ctx.queue_size = rx_ring->ring_size; 2373 ctx.numa_node = cpu_to_node(rx_ring->cpu); 2374 2375 rc = ena_com_create_io_queue(ena_dev, &ctx); 2376 if (rc) { 2377 netif_err(adapter, ifup, adapter->netdev, 2378 "Failed to create I/O RX queue num %d rc: %d\n", 2379 qid, rc); 2380 return rc; 2381 } 2382 2383 rc = ena_com_get_io_handlers(ena_dev, ena_qid, 2384 &rx_ring->ena_com_io_sq, 2385 &rx_ring->ena_com_io_cq); 2386 if (rc) { 2387 netif_err(adapter, ifup, adapter->netdev, 2388 "Failed to get RX queue handlers. RX queue num %d rc: %d\n", 2389 qid, rc); 2390 goto err; 2391 } 2392 2393 ena_com_update_numa_node(rx_ring->ena_com_io_cq, ctx.numa_node); 2394 2395 return rc; 2396 err: 2397 ena_com_destroy_io_queue(ena_dev, ena_qid); 2398 return rc; 2399 } 2400 2401 static int ena_create_all_io_rx_queues(struct ena_adapter *adapter) 2402 { 2403 struct ena_com_dev *ena_dev = adapter->ena_dev; 2404 int rc, i; 2405 2406 for (i = 0; i < adapter->num_io_queues; i++) { 2407 rc = ena_create_io_rx_queue(adapter, i); 2408 if (rc) 2409 goto create_err; 2410 INIT_WORK(&adapter->ena_napi[i].dim.work, ena_dim_work); 2411 } 2412 2413 return 0; 2414 2415 create_err: 2416 while (i--) { 2417 cancel_work_sync(&adapter->ena_napi[i].dim.work); 2418 ena_com_destroy_io_queue(ena_dev, ENA_IO_RXQ_IDX(i)); 2419 } 2420 2421 return rc; 2422 } 2423 2424 static void set_io_rings_size(struct ena_adapter *adapter, 2425 int new_tx_size, 2426 int new_rx_size) 2427 { 2428 int i; 2429 2430 for (i = 0; i < adapter->num_io_queues; i++) { 2431 adapter->tx_ring[i].ring_size = new_tx_size; 2432 adapter->rx_ring[i].ring_size = new_rx_size; 2433 } 2434 } 2435 2436 /* This function allows queue allocation to backoff when the system is 2437 * low on memory. If there is not enough memory to allocate io queues 2438 * the driver will try to allocate smaller queues. 2439 * 2440 * The backoff algorithm is as follows: 2441 * 1. Try to allocate TX and RX and if successful. 2442 * 1.1. return success 2443 * 2444 * 2. Divide by 2 the size of the larger of RX and TX queues (or both if their size is the same). 2445 * 2446 * 3. If TX or RX is smaller than 256 2447 * 3.1. return failure. 2448 * 4. else 2449 * 4.1. go back to 1. 2450 */ 2451 static int create_queues_with_size_backoff(struct ena_adapter *adapter) 2452 { 2453 int rc, cur_rx_ring_size, cur_tx_ring_size; 2454 int new_rx_ring_size, new_tx_ring_size; 2455 2456 /* current queue sizes might be set to smaller than the requested 2457 * ones due to past queue allocation failures. 2458 */ 2459 set_io_rings_size(adapter, adapter->requested_tx_ring_size, 2460 adapter->requested_rx_ring_size); 2461 2462 while (1) { 2463 if (ena_xdp_present(adapter)) { 2464 rc = ena_setup_and_create_all_xdp_queues(adapter); 2465 2466 if (rc) 2467 goto err_setup_tx; 2468 } 2469 rc = ena_setup_tx_resources_in_range(adapter, 2470 0, 2471 adapter->num_io_queues); 2472 if (rc) 2473 goto err_setup_tx; 2474 2475 rc = ena_create_io_tx_queues_in_range(adapter, 2476 0, 2477 adapter->num_io_queues); 2478 if (rc) 2479 goto err_create_tx_queues; 2480 2481 rc = ena_setup_all_rx_resources(adapter); 2482 if (rc) 2483 goto err_setup_rx; 2484 2485 rc = ena_create_all_io_rx_queues(adapter); 2486 if (rc) 2487 goto err_create_rx_queues; 2488 2489 return 0; 2490 2491 err_create_rx_queues: 2492 ena_free_all_io_rx_resources(adapter); 2493 err_setup_rx: 2494 ena_destroy_all_tx_queues(adapter); 2495 err_create_tx_queues: 2496 ena_free_all_io_tx_resources(adapter); 2497 err_setup_tx: 2498 if (rc != -ENOMEM) { 2499 netif_err(adapter, ifup, adapter->netdev, 2500 "Queue creation failed with error code %d\n", 2501 rc); 2502 return rc; 2503 } 2504 2505 cur_tx_ring_size = adapter->tx_ring[0].ring_size; 2506 cur_rx_ring_size = adapter->rx_ring[0].ring_size; 2507 2508 netif_err(adapter, ifup, adapter->netdev, 2509 "Not enough memory to create queues with sizes TX=%d, RX=%d\n", 2510 cur_tx_ring_size, cur_rx_ring_size); 2511 2512 new_tx_ring_size = cur_tx_ring_size; 2513 new_rx_ring_size = cur_rx_ring_size; 2514 2515 /* Decrease the size of the larger queue, or 2516 * decrease both if they are the same size. 2517 */ 2518 if (cur_rx_ring_size <= cur_tx_ring_size) 2519 new_tx_ring_size = cur_tx_ring_size / 2; 2520 if (cur_rx_ring_size >= cur_tx_ring_size) 2521 new_rx_ring_size = cur_rx_ring_size / 2; 2522 2523 if (new_tx_ring_size < ENA_MIN_RING_SIZE || 2524 new_rx_ring_size < ENA_MIN_RING_SIZE) { 2525 netif_err(adapter, ifup, adapter->netdev, 2526 "Queue creation failed with the smallest possible queue size of %d for both queues. Not retrying with smaller queues\n", 2527 ENA_MIN_RING_SIZE); 2528 return rc; 2529 } 2530 2531 netif_err(adapter, ifup, adapter->netdev, 2532 "Retrying queue creation with sizes TX=%d, RX=%d\n", 2533 new_tx_ring_size, 2534 new_rx_ring_size); 2535 2536 set_io_rings_size(adapter, new_tx_ring_size, 2537 new_rx_ring_size); 2538 } 2539 } 2540 2541 static int ena_up(struct ena_adapter *adapter) 2542 { 2543 int io_queue_count, rc, i; 2544 2545 netdev_dbg(adapter->netdev, "%s\n", __func__); 2546 2547 io_queue_count = adapter->num_io_queues + adapter->xdp_num_queues; 2548 ena_setup_io_intr(adapter); 2549 2550 /* napi poll functions should be initialized before running 2551 * request_irq(), to handle a rare condition where there is a pending 2552 * interrupt, causing the ISR to fire immediately while the poll 2553 * function wasn't set yet, causing a null dereference 2554 */ 2555 ena_init_napi_in_range(adapter, 0, io_queue_count); 2556 2557 rc = ena_request_io_irq(adapter); 2558 if (rc) 2559 goto err_req_irq; 2560 2561 rc = create_queues_with_size_backoff(adapter); 2562 if (rc) 2563 goto err_create_queues_with_backoff; 2564 2565 rc = ena_up_complete(adapter); 2566 if (rc) 2567 goto err_up; 2568 2569 if (test_bit(ENA_FLAG_LINK_UP, &adapter->flags)) 2570 netif_carrier_on(adapter->netdev); 2571 2572 u64_stats_update_begin(&adapter->syncp); 2573 adapter->dev_stats.interface_up++; 2574 u64_stats_update_end(&adapter->syncp); 2575 2576 set_bit(ENA_FLAG_DEV_UP, &adapter->flags); 2577 2578 /* Enable completion queues interrupt */ 2579 for (i = 0; i < adapter->num_io_queues; i++) 2580 ena_unmask_interrupt(&adapter->tx_ring[i], 2581 &adapter->rx_ring[i]); 2582 2583 /* schedule napi in case we had pending packets 2584 * from the last time we disable napi 2585 */ 2586 for (i = 0; i < io_queue_count; i++) 2587 napi_schedule(&adapter->ena_napi[i].napi); 2588 2589 return rc; 2590 2591 err_up: 2592 ena_destroy_all_tx_queues(adapter); 2593 ena_free_all_io_tx_resources(adapter); 2594 ena_destroy_all_rx_queues(adapter); 2595 ena_free_all_io_rx_resources(adapter); 2596 err_create_queues_with_backoff: 2597 ena_free_io_irq(adapter); 2598 err_req_irq: 2599 ena_del_napi_in_range(adapter, 0, io_queue_count); 2600 2601 return rc; 2602 } 2603 2604 static void ena_down(struct ena_adapter *adapter) 2605 { 2606 int io_queue_count = adapter->num_io_queues + adapter->xdp_num_queues; 2607 2608 netif_info(adapter, ifdown, adapter->netdev, "%s\n", __func__); 2609 2610 clear_bit(ENA_FLAG_DEV_UP, &adapter->flags); 2611 2612 u64_stats_update_begin(&adapter->syncp); 2613 adapter->dev_stats.interface_down++; 2614 u64_stats_update_end(&adapter->syncp); 2615 2616 netif_carrier_off(adapter->netdev); 2617 netif_tx_disable(adapter->netdev); 2618 2619 /* After this point the napi handler won't enable the tx queue */ 2620 ena_napi_disable_in_range(adapter, 0, io_queue_count); 2621 2622 /* After destroy the queue there won't be any new interrupts */ 2623 2624 if (test_bit(ENA_FLAG_TRIGGER_RESET, &adapter->flags)) { 2625 int rc; 2626 2627 rc = ena_com_dev_reset(adapter->ena_dev, adapter->reset_reason); 2628 if (rc) 2629 dev_err(&adapter->pdev->dev, "Device reset failed\n"); 2630 /* stop submitting admin commands on a device that was reset */ 2631 ena_com_set_admin_running_state(adapter->ena_dev, false); 2632 } 2633 2634 ena_destroy_all_io_queues(adapter); 2635 2636 ena_disable_io_intr_sync(adapter); 2637 ena_free_io_irq(adapter); 2638 ena_del_napi_in_range(adapter, 0, io_queue_count); 2639 2640 ena_free_all_tx_bufs(adapter); 2641 ena_free_all_rx_bufs(adapter); 2642 ena_free_all_io_tx_resources(adapter); 2643 ena_free_all_io_rx_resources(adapter); 2644 } 2645 2646 /* ena_open - Called when a network interface is made active 2647 * @netdev: network interface device structure 2648 * 2649 * Returns 0 on success, negative value on failure 2650 * 2651 * The open entry point is called when a network interface is made 2652 * active by the system (IFF_UP). At this point all resources needed 2653 * for transmit and receive operations are allocated, the interrupt 2654 * handler is registered with the OS, the watchdog timer is started, 2655 * and the stack is notified that the interface is ready. 2656 */ 2657 static int ena_open(struct net_device *netdev) 2658 { 2659 struct ena_adapter *adapter = netdev_priv(netdev); 2660 int rc; 2661 2662 /* Notify the stack of the actual queue counts. */ 2663 rc = netif_set_real_num_tx_queues(netdev, adapter->num_io_queues); 2664 if (rc) { 2665 netif_err(adapter, ifup, netdev, "Can't set num tx queues\n"); 2666 return rc; 2667 } 2668 2669 rc = netif_set_real_num_rx_queues(netdev, adapter->num_io_queues); 2670 if (rc) { 2671 netif_err(adapter, ifup, netdev, "Can't set num rx queues\n"); 2672 return rc; 2673 } 2674 2675 rc = ena_up(adapter); 2676 if (rc) 2677 return rc; 2678 2679 return rc; 2680 } 2681 2682 /* ena_close - Disables a network interface 2683 * @netdev: network interface device structure 2684 * 2685 * Returns 0, this is not allowed to fail 2686 * 2687 * The close entry point is called when an interface is de-activated 2688 * by the OS. The hardware is still under the drivers control, but 2689 * needs to be disabled. A global MAC reset is issued to stop the 2690 * hardware, and all transmit and receive resources are freed. 2691 */ 2692 static int ena_close(struct net_device *netdev) 2693 { 2694 struct ena_adapter *adapter = netdev_priv(netdev); 2695 2696 netif_dbg(adapter, ifdown, netdev, "%s\n", __func__); 2697 2698 if (!test_bit(ENA_FLAG_DEVICE_RUNNING, &adapter->flags)) 2699 return 0; 2700 2701 if (test_bit(ENA_FLAG_DEV_UP, &adapter->flags)) 2702 ena_down(adapter); 2703 2704 /* Check for device status and issue reset if needed*/ 2705 check_for_admin_com_state(adapter); 2706 if (unlikely(test_bit(ENA_FLAG_TRIGGER_RESET, &adapter->flags))) { 2707 netif_err(adapter, ifdown, adapter->netdev, 2708 "Destroy failure, restarting device\n"); 2709 ena_dump_stats_to_dmesg(adapter); 2710 /* rtnl lock already obtained in dev_ioctl() layer */ 2711 ena_destroy_device(adapter, false); 2712 ena_restore_device(adapter); 2713 } 2714 2715 return 0; 2716 } 2717 2718 int ena_update_queue_sizes(struct ena_adapter *adapter, 2719 u32 new_tx_size, 2720 u32 new_rx_size) 2721 { 2722 bool dev_was_up; 2723 2724 dev_was_up = test_bit(ENA_FLAG_DEV_UP, &adapter->flags); 2725 ena_close(adapter->netdev); 2726 adapter->requested_tx_ring_size = new_tx_size; 2727 adapter->requested_rx_ring_size = new_rx_size; 2728 ena_init_io_rings(adapter, 2729 0, 2730 adapter->xdp_num_queues + 2731 adapter->num_io_queues); 2732 return dev_was_up ? ena_up(adapter) : 0; 2733 } 2734 2735 int ena_update_queue_count(struct ena_adapter *adapter, u32 new_channel_count) 2736 { 2737 struct ena_com_dev *ena_dev = adapter->ena_dev; 2738 int prev_channel_count; 2739 bool dev_was_up; 2740 2741 dev_was_up = test_bit(ENA_FLAG_DEV_UP, &adapter->flags); 2742 ena_close(adapter->netdev); 2743 prev_channel_count = adapter->num_io_queues; 2744 adapter->num_io_queues = new_channel_count; 2745 if (ena_xdp_present(adapter) && 2746 ena_xdp_allowed(adapter) == ENA_XDP_ALLOWED) { 2747 adapter->xdp_first_ring = new_channel_count; 2748 adapter->xdp_num_queues = new_channel_count; 2749 if (prev_channel_count > new_channel_count) 2750 ena_xdp_exchange_program_rx_in_range(adapter, 2751 NULL, 2752 new_channel_count, 2753 prev_channel_count); 2754 else 2755 ena_xdp_exchange_program_rx_in_range(adapter, 2756 adapter->xdp_bpf_prog, 2757 prev_channel_count, 2758 new_channel_count); 2759 } 2760 2761 /* We need to destroy the rss table so that the indirection 2762 * table will be reinitialized by ena_up() 2763 */ 2764 ena_com_rss_destroy(ena_dev); 2765 ena_init_io_rings(adapter, 2766 0, 2767 adapter->xdp_num_queues + 2768 adapter->num_io_queues); 2769 return dev_was_up ? ena_open(adapter->netdev) : 0; 2770 } 2771 2772 static void ena_tx_csum(struct ena_com_tx_ctx *ena_tx_ctx, struct sk_buff *skb) 2773 { 2774 u32 mss = skb_shinfo(skb)->gso_size; 2775 struct ena_com_tx_meta *ena_meta = &ena_tx_ctx->ena_meta; 2776 u8 l4_protocol = 0; 2777 2778 if ((skb->ip_summed == CHECKSUM_PARTIAL) || mss) { 2779 ena_tx_ctx->l4_csum_enable = 1; 2780 if (mss) { 2781 ena_tx_ctx->tso_enable = 1; 2782 ena_meta->l4_hdr_len = tcp_hdr(skb)->doff; 2783 ena_tx_ctx->l4_csum_partial = 0; 2784 } else { 2785 ena_tx_ctx->tso_enable = 0; 2786 ena_meta->l4_hdr_len = 0; 2787 ena_tx_ctx->l4_csum_partial = 1; 2788 } 2789 2790 switch (ip_hdr(skb)->version) { 2791 case IPVERSION: 2792 ena_tx_ctx->l3_proto = ENA_ETH_IO_L3_PROTO_IPV4; 2793 if (ip_hdr(skb)->frag_off & htons(IP_DF)) 2794 ena_tx_ctx->df = 1; 2795 if (mss) 2796 ena_tx_ctx->l3_csum_enable = 1; 2797 l4_protocol = ip_hdr(skb)->protocol; 2798 break; 2799 case 6: 2800 ena_tx_ctx->l3_proto = ENA_ETH_IO_L3_PROTO_IPV6; 2801 l4_protocol = ipv6_hdr(skb)->nexthdr; 2802 break; 2803 default: 2804 break; 2805 } 2806 2807 if (l4_protocol == IPPROTO_TCP) 2808 ena_tx_ctx->l4_proto = ENA_ETH_IO_L4_PROTO_TCP; 2809 else 2810 ena_tx_ctx->l4_proto = ENA_ETH_IO_L4_PROTO_UDP; 2811 2812 ena_meta->mss = mss; 2813 ena_meta->l3_hdr_len = skb_network_header_len(skb); 2814 ena_meta->l3_hdr_offset = skb_network_offset(skb); 2815 ena_tx_ctx->meta_valid = 1; 2816 2817 } else { 2818 ena_tx_ctx->meta_valid = 0; 2819 } 2820 } 2821 2822 static int ena_check_and_linearize_skb(struct ena_ring *tx_ring, 2823 struct sk_buff *skb) 2824 { 2825 int num_frags, header_len, rc; 2826 2827 num_frags = skb_shinfo(skb)->nr_frags; 2828 header_len = skb_headlen(skb); 2829 2830 if (num_frags < tx_ring->sgl_size) 2831 return 0; 2832 2833 if ((num_frags == tx_ring->sgl_size) && 2834 (header_len < tx_ring->tx_max_header_size)) 2835 return 0; 2836 2837 u64_stats_update_begin(&tx_ring->syncp); 2838 tx_ring->tx_stats.linearize++; 2839 u64_stats_update_end(&tx_ring->syncp); 2840 2841 rc = skb_linearize(skb); 2842 if (unlikely(rc)) { 2843 u64_stats_update_begin(&tx_ring->syncp); 2844 tx_ring->tx_stats.linearize_failed++; 2845 u64_stats_update_end(&tx_ring->syncp); 2846 } 2847 2848 return rc; 2849 } 2850 2851 static int ena_tx_map_skb(struct ena_ring *tx_ring, 2852 struct ena_tx_buffer *tx_info, 2853 struct sk_buff *skb, 2854 void **push_hdr, 2855 u16 *header_len) 2856 { 2857 struct ena_adapter *adapter = tx_ring->adapter; 2858 struct ena_com_buf *ena_buf; 2859 dma_addr_t dma; 2860 u32 skb_head_len, frag_len, last_frag; 2861 u16 push_len = 0; 2862 u16 delta = 0; 2863 int i = 0; 2864 2865 skb_head_len = skb_headlen(skb); 2866 tx_info->skb = skb; 2867 ena_buf = tx_info->bufs; 2868 2869 if (tx_ring->tx_mem_queue_type == ENA_ADMIN_PLACEMENT_POLICY_DEV) { 2870 /* When the device is LLQ mode, the driver will copy 2871 * the header into the device memory space. 2872 * the ena_com layer assume the header is in a linear 2873 * memory space. 2874 * This assumption might be wrong since part of the header 2875 * can be in the fragmented buffers. 2876 * Use skb_header_pointer to make sure the header is in a 2877 * linear memory space. 2878 */ 2879 2880 push_len = min_t(u32, skb->len, tx_ring->tx_max_header_size); 2881 *push_hdr = skb_header_pointer(skb, 0, push_len, 2882 tx_ring->push_buf_intermediate_buf); 2883 *header_len = push_len; 2884 if (unlikely(skb->data != *push_hdr)) { 2885 u64_stats_update_begin(&tx_ring->syncp); 2886 tx_ring->tx_stats.llq_buffer_copy++; 2887 u64_stats_update_end(&tx_ring->syncp); 2888 2889 delta = push_len - skb_head_len; 2890 } 2891 } else { 2892 *push_hdr = NULL; 2893 *header_len = min_t(u32, skb_head_len, 2894 tx_ring->tx_max_header_size); 2895 } 2896 2897 netif_dbg(adapter, tx_queued, adapter->netdev, 2898 "skb: %p header_buf->vaddr: %p push_len: %d\n", skb, 2899 *push_hdr, push_len); 2900 2901 if (skb_head_len > push_len) { 2902 dma = dma_map_single(tx_ring->dev, skb->data + push_len, 2903 skb_head_len - push_len, DMA_TO_DEVICE); 2904 if (unlikely(dma_mapping_error(tx_ring->dev, dma))) 2905 goto error_report_dma_error; 2906 2907 ena_buf->paddr = dma; 2908 ena_buf->len = skb_head_len - push_len; 2909 2910 ena_buf++; 2911 tx_info->num_of_bufs++; 2912 tx_info->map_linear_data = 1; 2913 } else { 2914 tx_info->map_linear_data = 0; 2915 } 2916 2917 last_frag = skb_shinfo(skb)->nr_frags; 2918 2919 for (i = 0; i < last_frag; i++) { 2920 const skb_frag_t *frag = &skb_shinfo(skb)->frags[i]; 2921 2922 frag_len = skb_frag_size(frag); 2923 2924 if (unlikely(delta >= frag_len)) { 2925 delta -= frag_len; 2926 continue; 2927 } 2928 2929 dma = skb_frag_dma_map(tx_ring->dev, frag, delta, 2930 frag_len - delta, DMA_TO_DEVICE); 2931 if (unlikely(dma_mapping_error(tx_ring->dev, dma))) 2932 goto error_report_dma_error; 2933 2934 ena_buf->paddr = dma; 2935 ena_buf->len = frag_len - delta; 2936 ena_buf++; 2937 tx_info->num_of_bufs++; 2938 delta = 0; 2939 } 2940 2941 return 0; 2942 2943 error_report_dma_error: 2944 u64_stats_update_begin(&tx_ring->syncp); 2945 tx_ring->tx_stats.dma_mapping_err++; 2946 u64_stats_update_end(&tx_ring->syncp); 2947 netdev_warn(adapter->netdev, "failed to map skb\n"); 2948 2949 tx_info->skb = NULL; 2950 2951 tx_info->num_of_bufs += i; 2952 ena_unmap_tx_buff(tx_ring, tx_info); 2953 2954 return -EINVAL; 2955 } 2956 2957 /* Called with netif_tx_lock. */ 2958 static netdev_tx_t ena_start_xmit(struct sk_buff *skb, struct net_device *dev) 2959 { 2960 struct ena_adapter *adapter = netdev_priv(dev); 2961 struct ena_tx_buffer *tx_info; 2962 struct ena_com_tx_ctx ena_tx_ctx; 2963 struct ena_ring *tx_ring; 2964 struct netdev_queue *txq; 2965 void *push_hdr; 2966 u16 next_to_use, req_id, header_len; 2967 int qid, rc; 2968 2969 netif_dbg(adapter, tx_queued, dev, "%s skb %p\n", __func__, skb); 2970 /* Determine which tx ring we will be placed on */ 2971 qid = skb_get_queue_mapping(skb); 2972 tx_ring = &adapter->tx_ring[qid]; 2973 txq = netdev_get_tx_queue(dev, qid); 2974 2975 rc = ena_check_and_linearize_skb(tx_ring, skb); 2976 if (unlikely(rc)) 2977 goto error_drop_packet; 2978 2979 skb_tx_timestamp(skb); 2980 2981 next_to_use = tx_ring->next_to_use; 2982 req_id = tx_ring->free_ids[next_to_use]; 2983 tx_info = &tx_ring->tx_buffer_info[req_id]; 2984 tx_info->num_of_bufs = 0; 2985 2986 WARN(tx_info->skb, "SKB isn't NULL req_id %d\n", req_id); 2987 2988 rc = ena_tx_map_skb(tx_ring, tx_info, skb, &push_hdr, &header_len); 2989 if (unlikely(rc)) 2990 goto error_drop_packet; 2991 2992 memset(&ena_tx_ctx, 0x0, sizeof(struct ena_com_tx_ctx)); 2993 ena_tx_ctx.ena_bufs = tx_info->bufs; 2994 ena_tx_ctx.push_header = push_hdr; 2995 ena_tx_ctx.num_bufs = tx_info->num_of_bufs; 2996 ena_tx_ctx.req_id = req_id; 2997 ena_tx_ctx.header_len = header_len; 2998 2999 /* set flags and meta data */ 3000 ena_tx_csum(&ena_tx_ctx, skb); 3001 3002 rc = ena_xmit_common(dev, 3003 tx_ring, 3004 tx_info, 3005 &ena_tx_ctx, 3006 next_to_use, 3007 skb->len); 3008 if (rc) 3009 goto error_unmap_dma; 3010 3011 netdev_tx_sent_queue(txq, skb->len); 3012 3013 /* stop the queue when no more space available, the packet can have up 3014 * to sgl_size + 2. one for the meta descriptor and one for header 3015 * (if the header is larger than tx_max_header_size). 3016 */ 3017 if (unlikely(!ena_com_sq_have_enough_space(tx_ring->ena_com_io_sq, 3018 tx_ring->sgl_size + 2))) { 3019 netif_dbg(adapter, tx_queued, dev, "%s stop queue %d\n", 3020 __func__, qid); 3021 3022 netif_tx_stop_queue(txq); 3023 u64_stats_update_begin(&tx_ring->syncp); 3024 tx_ring->tx_stats.queue_stop++; 3025 u64_stats_update_end(&tx_ring->syncp); 3026 3027 /* There is a rare condition where this function decide to 3028 * stop the queue but meanwhile clean_tx_irq updates 3029 * next_to_completion and terminates. 3030 * The queue will remain stopped forever. 3031 * To solve this issue add a mb() to make sure that 3032 * netif_tx_stop_queue() write is vissible before checking if 3033 * there is additional space in the queue. 3034 */ 3035 smp_mb(); 3036 3037 if (ena_com_sq_have_enough_space(tx_ring->ena_com_io_sq, 3038 ENA_TX_WAKEUP_THRESH)) { 3039 netif_tx_wake_queue(txq); 3040 u64_stats_update_begin(&tx_ring->syncp); 3041 tx_ring->tx_stats.queue_wakeup++; 3042 u64_stats_update_end(&tx_ring->syncp); 3043 } 3044 } 3045 3046 if (netif_xmit_stopped(txq) || !netdev_xmit_more()) { 3047 /* trigger the dma engine. ena_com_write_sq_doorbell() 3048 * has a mb 3049 */ 3050 ena_com_write_sq_doorbell(tx_ring->ena_com_io_sq); 3051 u64_stats_update_begin(&tx_ring->syncp); 3052 tx_ring->tx_stats.doorbells++; 3053 u64_stats_update_end(&tx_ring->syncp); 3054 } 3055 3056 return NETDEV_TX_OK; 3057 3058 error_unmap_dma: 3059 ena_unmap_tx_buff(tx_ring, tx_info); 3060 tx_info->skb = NULL; 3061 3062 error_drop_packet: 3063 dev_kfree_skb(skb); 3064 return NETDEV_TX_OK; 3065 } 3066 3067 static u16 ena_select_queue(struct net_device *dev, struct sk_buff *skb, 3068 struct net_device *sb_dev) 3069 { 3070 u16 qid; 3071 /* we suspect that this is good for in--kernel network services that 3072 * want to loop incoming skb rx to tx in normal user generated traffic, 3073 * most probably we will not get to this 3074 */ 3075 if (skb_rx_queue_recorded(skb)) 3076 qid = skb_get_rx_queue(skb); 3077 else 3078 qid = netdev_pick_tx(dev, skb, NULL); 3079 3080 return qid; 3081 } 3082 3083 static void ena_config_host_info(struct ena_com_dev *ena_dev, 3084 struct pci_dev *pdev) 3085 { 3086 struct ena_admin_host_info *host_info; 3087 int rc; 3088 3089 /* Allocate only the host info */ 3090 rc = ena_com_allocate_host_info(ena_dev); 3091 if (rc) { 3092 pr_err("Cannot allocate host info\n"); 3093 return; 3094 } 3095 3096 host_info = ena_dev->host_attr.host_info; 3097 3098 host_info->bdf = (pdev->bus->number << 8) | pdev->devfn; 3099 host_info->os_type = ENA_ADMIN_OS_LINUX; 3100 host_info->kernel_ver = LINUX_VERSION_CODE; 3101 strlcpy(host_info->kernel_ver_str, utsname()->version, 3102 sizeof(host_info->kernel_ver_str) - 1); 3103 host_info->os_dist = 0; 3104 strncpy(host_info->os_dist_str, utsname()->release, 3105 sizeof(host_info->os_dist_str) - 1); 3106 host_info->driver_version = 3107 (DRV_MODULE_GEN_MAJOR) | 3108 (DRV_MODULE_GEN_MINOR << ENA_ADMIN_HOST_INFO_MINOR_SHIFT) | 3109 (DRV_MODULE_GEN_SUBMINOR << ENA_ADMIN_HOST_INFO_SUB_MINOR_SHIFT) | 3110 ("K"[0] << ENA_ADMIN_HOST_INFO_MODULE_TYPE_SHIFT); 3111 host_info->num_cpus = num_online_cpus(); 3112 3113 host_info->driver_supported_features = 3114 ENA_ADMIN_HOST_INFO_INTERRUPT_MODERATION_MASK; 3115 3116 rc = ena_com_set_host_attributes(ena_dev); 3117 if (rc) { 3118 if (rc == -EOPNOTSUPP) 3119 pr_warn("Cannot set host attributes\n"); 3120 else 3121 pr_err("Cannot set host attributes\n"); 3122 3123 goto err; 3124 } 3125 3126 return; 3127 3128 err: 3129 ena_com_delete_host_info(ena_dev); 3130 } 3131 3132 static void ena_config_debug_area(struct ena_adapter *adapter) 3133 { 3134 u32 debug_area_size; 3135 int rc, ss_count; 3136 3137 ss_count = ena_get_sset_count(adapter->netdev, ETH_SS_STATS); 3138 if (ss_count <= 0) { 3139 netif_err(adapter, drv, adapter->netdev, 3140 "SS count is negative\n"); 3141 return; 3142 } 3143 3144 /* allocate 32 bytes for each string and 64bit for the value */ 3145 debug_area_size = ss_count * ETH_GSTRING_LEN + sizeof(u64) * ss_count; 3146 3147 rc = ena_com_allocate_debug_area(adapter->ena_dev, debug_area_size); 3148 if (rc) { 3149 pr_err("Cannot allocate debug area\n"); 3150 return; 3151 } 3152 3153 rc = ena_com_set_host_attributes(adapter->ena_dev); 3154 if (rc) { 3155 if (rc == -EOPNOTSUPP) 3156 netif_warn(adapter, drv, adapter->netdev, 3157 "Cannot set host attributes\n"); 3158 else 3159 netif_err(adapter, drv, adapter->netdev, 3160 "Cannot set host attributes\n"); 3161 goto err; 3162 } 3163 3164 return; 3165 err: 3166 ena_com_delete_debug_area(adapter->ena_dev); 3167 } 3168 3169 static void ena_get_stats64(struct net_device *netdev, 3170 struct rtnl_link_stats64 *stats) 3171 { 3172 struct ena_adapter *adapter = netdev_priv(netdev); 3173 struct ena_ring *rx_ring, *tx_ring; 3174 unsigned int start; 3175 u64 rx_drops; 3176 u64 tx_drops; 3177 int i; 3178 3179 if (!test_bit(ENA_FLAG_DEV_UP, &adapter->flags)) 3180 return; 3181 3182 for (i = 0; i < adapter->num_io_queues; i++) { 3183 u64 bytes, packets; 3184 3185 tx_ring = &adapter->tx_ring[i]; 3186 3187 do { 3188 start = u64_stats_fetch_begin_irq(&tx_ring->syncp); 3189 packets = tx_ring->tx_stats.cnt; 3190 bytes = tx_ring->tx_stats.bytes; 3191 } while (u64_stats_fetch_retry_irq(&tx_ring->syncp, start)); 3192 3193 stats->tx_packets += packets; 3194 stats->tx_bytes += bytes; 3195 3196 rx_ring = &adapter->rx_ring[i]; 3197 3198 do { 3199 start = u64_stats_fetch_begin_irq(&rx_ring->syncp); 3200 packets = rx_ring->rx_stats.cnt; 3201 bytes = rx_ring->rx_stats.bytes; 3202 } while (u64_stats_fetch_retry_irq(&rx_ring->syncp, start)); 3203 3204 stats->rx_packets += packets; 3205 stats->rx_bytes += bytes; 3206 } 3207 3208 do { 3209 start = u64_stats_fetch_begin_irq(&adapter->syncp); 3210 rx_drops = adapter->dev_stats.rx_drops; 3211 tx_drops = adapter->dev_stats.tx_drops; 3212 } while (u64_stats_fetch_retry_irq(&adapter->syncp, start)); 3213 3214 stats->rx_dropped = rx_drops; 3215 stats->tx_dropped = tx_drops; 3216 3217 stats->multicast = 0; 3218 stats->collisions = 0; 3219 3220 stats->rx_length_errors = 0; 3221 stats->rx_crc_errors = 0; 3222 stats->rx_frame_errors = 0; 3223 stats->rx_fifo_errors = 0; 3224 stats->rx_missed_errors = 0; 3225 stats->tx_window_errors = 0; 3226 3227 stats->rx_errors = 0; 3228 stats->tx_errors = 0; 3229 } 3230 3231 static const struct net_device_ops ena_netdev_ops = { 3232 .ndo_open = ena_open, 3233 .ndo_stop = ena_close, 3234 .ndo_start_xmit = ena_start_xmit, 3235 .ndo_select_queue = ena_select_queue, 3236 .ndo_get_stats64 = ena_get_stats64, 3237 .ndo_tx_timeout = ena_tx_timeout, 3238 .ndo_change_mtu = ena_change_mtu, 3239 .ndo_set_mac_address = NULL, 3240 .ndo_validate_addr = eth_validate_addr, 3241 .ndo_bpf = ena_xdp, 3242 }; 3243 3244 static int ena_device_validate_params(struct ena_adapter *adapter, 3245 struct ena_com_dev_get_features_ctx *get_feat_ctx) 3246 { 3247 struct net_device *netdev = adapter->netdev; 3248 int rc; 3249 3250 rc = ether_addr_equal(get_feat_ctx->dev_attr.mac_addr, 3251 adapter->mac_addr); 3252 if (!rc) { 3253 netif_err(adapter, drv, netdev, 3254 "Error, mac address are different\n"); 3255 return -EINVAL; 3256 } 3257 3258 if (get_feat_ctx->dev_attr.max_mtu < netdev->mtu) { 3259 netif_err(adapter, drv, netdev, 3260 "Error, device max mtu is smaller than netdev MTU\n"); 3261 return -EINVAL; 3262 } 3263 3264 return 0; 3265 } 3266 3267 static int ena_device_init(struct ena_com_dev *ena_dev, struct pci_dev *pdev, 3268 struct ena_com_dev_get_features_ctx *get_feat_ctx, 3269 bool *wd_state) 3270 { 3271 struct device *dev = &pdev->dev; 3272 bool readless_supported; 3273 u32 aenq_groups; 3274 int dma_width; 3275 int rc; 3276 3277 rc = ena_com_mmio_reg_read_request_init(ena_dev); 3278 if (rc) { 3279 dev_err(dev, "failed to init mmio read less\n"); 3280 return rc; 3281 } 3282 3283 /* The PCIe configuration space revision id indicate if mmio reg 3284 * read is disabled 3285 */ 3286 readless_supported = !(pdev->revision & ENA_MMIO_DISABLE_REG_READ); 3287 ena_com_set_mmio_read_mode(ena_dev, readless_supported); 3288 3289 rc = ena_com_dev_reset(ena_dev, ENA_REGS_RESET_NORMAL); 3290 if (rc) { 3291 dev_err(dev, "Can not reset device\n"); 3292 goto err_mmio_read_less; 3293 } 3294 3295 rc = ena_com_validate_version(ena_dev); 3296 if (rc) { 3297 dev_err(dev, "device version is too low\n"); 3298 goto err_mmio_read_less; 3299 } 3300 3301 dma_width = ena_com_get_dma_width(ena_dev); 3302 if (dma_width < 0) { 3303 dev_err(dev, "Invalid dma width value %d", dma_width); 3304 rc = dma_width; 3305 goto err_mmio_read_less; 3306 } 3307 3308 rc = pci_set_dma_mask(pdev, DMA_BIT_MASK(dma_width)); 3309 if (rc) { 3310 dev_err(dev, "pci_set_dma_mask failed 0x%x\n", rc); 3311 goto err_mmio_read_less; 3312 } 3313 3314 rc = pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(dma_width)); 3315 if (rc) { 3316 dev_err(dev, "err_pci_set_consistent_dma_mask failed 0x%x\n", 3317 rc); 3318 goto err_mmio_read_less; 3319 } 3320 3321 /* ENA admin level init */ 3322 rc = ena_com_admin_init(ena_dev, &aenq_handlers); 3323 if (rc) { 3324 dev_err(dev, 3325 "Can not initialize ena admin queue with device\n"); 3326 goto err_mmio_read_less; 3327 } 3328 3329 /* To enable the msix interrupts the driver needs to know the number 3330 * of queues. So the driver uses polling mode to retrieve this 3331 * information 3332 */ 3333 ena_com_set_admin_polling_mode(ena_dev, true); 3334 3335 ena_config_host_info(ena_dev, pdev); 3336 3337 /* Get Device Attributes*/ 3338 rc = ena_com_get_dev_attr_feat(ena_dev, get_feat_ctx); 3339 if (rc) { 3340 dev_err(dev, "Cannot get attribute for ena device rc=%d\n", rc); 3341 goto err_admin_init; 3342 } 3343 3344 /* Try to turn all the available aenq groups */ 3345 aenq_groups = BIT(ENA_ADMIN_LINK_CHANGE) | 3346 BIT(ENA_ADMIN_FATAL_ERROR) | 3347 BIT(ENA_ADMIN_WARNING) | 3348 BIT(ENA_ADMIN_NOTIFICATION) | 3349 BIT(ENA_ADMIN_KEEP_ALIVE); 3350 3351 aenq_groups &= get_feat_ctx->aenq.supported_groups; 3352 3353 rc = ena_com_set_aenq_config(ena_dev, aenq_groups); 3354 if (rc) { 3355 dev_err(dev, "Cannot configure aenq groups rc= %d\n", rc); 3356 goto err_admin_init; 3357 } 3358 3359 *wd_state = !!(aenq_groups & BIT(ENA_ADMIN_KEEP_ALIVE)); 3360 3361 return 0; 3362 3363 err_admin_init: 3364 ena_com_delete_host_info(ena_dev); 3365 ena_com_admin_destroy(ena_dev); 3366 err_mmio_read_less: 3367 ena_com_mmio_reg_read_request_destroy(ena_dev); 3368 3369 return rc; 3370 } 3371 3372 static int ena_enable_msix_and_set_admin_interrupts(struct ena_adapter *adapter) 3373 { 3374 struct ena_com_dev *ena_dev = adapter->ena_dev; 3375 struct device *dev = &adapter->pdev->dev; 3376 int rc; 3377 3378 rc = ena_enable_msix(adapter); 3379 if (rc) { 3380 dev_err(dev, "Can not reserve msix vectors\n"); 3381 return rc; 3382 } 3383 3384 ena_setup_mgmnt_intr(adapter); 3385 3386 rc = ena_request_mgmnt_irq(adapter); 3387 if (rc) { 3388 dev_err(dev, "Can not setup management interrupts\n"); 3389 goto err_disable_msix; 3390 } 3391 3392 ena_com_set_admin_polling_mode(ena_dev, false); 3393 3394 ena_com_admin_aenq_enable(ena_dev); 3395 3396 return 0; 3397 3398 err_disable_msix: 3399 ena_disable_msix(adapter); 3400 3401 return rc; 3402 } 3403 3404 static void ena_destroy_device(struct ena_adapter *adapter, bool graceful) 3405 { 3406 struct net_device *netdev = adapter->netdev; 3407 struct ena_com_dev *ena_dev = adapter->ena_dev; 3408 bool dev_up; 3409 3410 if (!test_bit(ENA_FLAG_DEVICE_RUNNING, &adapter->flags)) 3411 return; 3412 3413 netif_carrier_off(netdev); 3414 3415 del_timer_sync(&adapter->timer_service); 3416 3417 dev_up = test_bit(ENA_FLAG_DEV_UP, &adapter->flags); 3418 adapter->dev_up_before_reset = dev_up; 3419 if (!graceful) 3420 ena_com_set_admin_running_state(ena_dev, false); 3421 3422 if (test_bit(ENA_FLAG_DEV_UP, &adapter->flags)) 3423 ena_down(adapter); 3424 3425 /* Stop the device from sending AENQ events (in case reset flag is set 3426 * and device is up, ena_down() already reset the device. 3427 */ 3428 if (!(test_bit(ENA_FLAG_TRIGGER_RESET, &adapter->flags) && dev_up)) 3429 ena_com_dev_reset(adapter->ena_dev, adapter->reset_reason); 3430 3431 ena_free_mgmnt_irq(adapter); 3432 3433 ena_disable_msix(adapter); 3434 3435 ena_com_abort_admin_commands(ena_dev); 3436 3437 ena_com_wait_for_abort_completion(ena_dev); 3438 3439 ena_com_admin_destroy(ena_dev); 3440 3441 ena_com_mmio_reg_read_request_destroy(ena_dev); 3442 3443 /* return reset reason to default value */ 3444 adapter->reset_reason = ENA_REGS_RESET_NORMAL; 3445 3446 clear_bit(ENA_FLAG_TRIGGER_RESET, &adapter->flags); 3447 clear_bit(ENA_FLAG_DEVICE_RUNNING, &adapter->flags); 3448 } 3449 3450 static int ena_restore_device(struct ena_adapter *adapter) 3451 { 3452 struct ena_com_dev_get_features_ctx get_feat_ctx; 3453 struct ena_com_dev *ena_dev = adapter->ena_dev; 3454 struct pci_dev *pdev = adapter->pdev; 3455 bool wd_state; 3456 int rc; 3457 3458 set_bit(ENA_FLAG_ONGOING_RESET, &adapter->flags); 3459 rc = ena_device_init(ena_dev, adapter->pdev, &get_feat_ctx, &wd_state); 3460 if (rc) { 3461 dev_err(&pdev->dev, "Can not initialize device\n"); 3462 goto err; 3463 } 3464 adapter->wd_state = wd_state; 3465 3466 rc = ena_device_validate_params(adapter, &get_feat_ctx); 3467 if (rc) { 3468 dev_err(&pdev->dev, "Validation of device parameters failed\n"); 3469 goto err_device_destroy; 3470 } 3471 3472 rc = ena_enable_msix_and_set_admin_interrupts(adapter); 3473 if (rc) { 3474 dev_err(&pdev->dev, "Enable MSI-X failed\n"); 3475 goto err_device_destroy; 3476 } 3477 /* If the interface was up before the reset bring it up */ 3478 if (adapter->dev_up_before_reset) { 3479 rc = ena_up(adapter); 3480 if (rc) { 3481 dev_err(&pdev->dev, "Failed to create I/O queues\n"); 3482 goto err_disable_msix; 3483 } 3484 } 3485 3486 set_bit(ENA_FLAG_DEVICE_RUNNING, &adapter->flags); 3487 3488 clear_bit(ENA_FLAG_ONGOING_RESET, &adapter->flags); 3489 if (test_bit(ENA_FLAG_LINK_UP, &adapter->flags)) 3490 netif_carrier_on(adapter->netdev); 3491 3492 mod_timer(&adapter->timer_service, round_jiffies(jiffies + HZ)); 3493 dev_err(&pdev->dev, "Device reset completed successfully\n"); 3494 adapter->last_keep_alive_jiffies = jiffies; 3495 3496 return rc; 3497 err_disable_msix: 3498 ena_free_mgmnt_irq(adapter); 3499 ena_disable_msix(adapter); 3500 err_device_destroy: 3501 ena_com_abort_admin_commands(ena_dev); 3502 ena_com_wait_for_abort_completion(ena_dev); 3503 ena_com_admin_destroy(ena_dev); 3504 ena_com_dev_reset(ena_dev, ENA_REGS_RESET_DRIVER_INVALID_STATE); 3505 ena_com_mmio_reg_read_request_destroy(ena_dev); 3506 err: 3507 clear_bit(ENA_FLAG_DEVICE_RUNNING, &adapter->flags); 3508 clear_bit(ENA_FLAG_ONGOING_RESET, &adapter->flags); 3509 dev_err(&pdev->dev, 3510 "Reset attempt failed. Can not reset the device\n"); 3511 3512 return rc; 3513 } 3514 3515 static void ena_fw_reset_device(struct work_struct *work) 3516 { 3517 struct ena_adapter *adapter = 3518 container_of(work, struct ena_adapter, reset_task); 3519 struct pci_dev *pdev = adapter->pdev; 3520 3521 if (unlikely(!test_bit(ENA_FLAG_TRIGGER_RESET, &adapter->flags))) { 3522 dev_err(&pdev->dev, 3523 "device reset schedule while reset bit is off\n"); 3524 return; 3525 } 3526 rtnl_lock(); 3527 ena_destroy_device(adapter, false); 3528 ena_restore_device(adapter); 3529 rtnl_unlock(); 3530 } 3531 3532 static int check_for_rx_interrupt_queue(struct ena_adapter *adapter, 3533 struct ena_ring *rx_ring) 3534 { 3535 if (likely(rx_ring->first_interrupt)) 3536 return 0; 3537 3538 if (ena_com_cq_empty(rx_ring->ena_com_io_cq)) 3539 return 0; 3540 3541 rx_ring->no_interrupt_event_cnt++; 3542 3543 if (rx_ring->no_interrupt_event_cnt == ENA_MAX_NO_INTERRUPT_ITERATIONS) { 3544 netif_err(adapter, rx_err, adapter->netdev, 3545 "Potential MSIX issue on Rx side Queue = %d. Reset the device\n", 3546 rx_ring->qid); 3547 adapter->reset_reason = ENA_REGS_RESET_MISS_INTERRUPT; 3548 smp_mb__before_atomic(); 3549 set_bit(ENA_FLAG_TRIGGER_RESET, &adapter->flags); 3550 return -EIO; 3551 } 3552 3553 return 0; 3554 } 3555 3556 static int check_missing_comp_in_tx_queue(struct ena_adapter *adapter, 3557 struct ena_ring *tx_ring) 3558 { 3559 struct ena_tx_buffer *tx_buf; 3560 unsigned long last_jiffies; 3561 u32 missed_tx = 0; 3562 int i, rc = 0; 3563 3564 for (i = 0; i < tx_ring->ring_size; i++) { 3565 tx_buf = &tx_ring->tx_buffer_info[i]; 3566 last_jiffies = tx_buf->last_jiffies; 3567 3568 if (last_jiffies == 0) 3569 /* no pending Tx at this location */ 3570 continue; 3571 3572 if (unlikely(!tx_ring->first_interrupt && time_is_before_jiffies(last_jiffies + 3573 2 * adapter->missing_tx_completion_to))) { 3574 /* If after graceful period interrupt is still not 3575 * received, we schedule a reset 3576 */ 3577 netif_err(adapter, tx_err, adapter->netdev, 3578 "Potential MSIX issue on Tx side Queue = %d. Reset the device\n", 3579 tx_ring->qid); 3580 adapter->reset_reason = ENA_REGS_RESET_MISS_INTERRUPT; 3581 smp_mb__before_atomic(); 3582 set_bit(ENA_FLAG_TRIGGER_RESET, &adapter->flags); 3583 return -EIO; 3584 } 3585 3586 if (unlikely(time_is_before_jiffies(last_jiffies + 3587 adapter->missing_tx_completion_to))) { 3588 if (!tx_buf->print_once) 3589 netif_notice(adapter, tx_err, adapter->netdev, 3590 "Found a Tx that wasn't completed on time, qid %d, index %d.\n", 3591 tx_ring->qid, i); 3592 3593 tx_buf->print_once = 1; 3594 missed_tx++; 3595 } 3596 } 3597 3598 if (unlikely(missed_tx > adapter->missing_tx_completion_threshold)) { 3599 netif_err(adapter, tx_err, adapter->netdev, 3600 "The number of lost tx completions is above the threshold (%d > %d). Reset the device\n", 3601 missed_tx, 3602 adapter->missing_tx_completion_threshold); 3603 adapter->reset_reason = 3604 ENA_REGS_RESET_MISS_TX_CMPL; 3605 set_bit(ENA_FLAG_TRIGGER_RESET, &adapter->flags); 3606 rc = -EIO; 3607 } 3608 3609 u64_stats_update_begin(&tx_ring->syncp); 3610 tx_ring->tx_stats.missed_tx = missed_tx; 3611 u64_stats_update_end(&tx_ring->syncp); 3612 3613 return rc; 3614 } 3615 3616 static void check_for_missing_completions(struct ena_adapter *adapter) 3617 { 3618 struct ena_ring *tx_ring; 3619 struct ena_ring *rx_ring; 3620 int i, budget, rc; 3621 int io_queue_count; 3622 3623 io_queue_count = adapter->xdp_num_queues + adapter->num_io_queues; 3624 /* Make sure the driver doesn't turn the device in other process */ 3625 smp_rmb(); 3626 3627 if (!test_bit(ENA_FLAG_DEV_UP, &adapter->flags)) 3628 return; 3629 3630 if (test_bit(ENA_FLAG_TRIGGER_RESET, &adapter->flags)) 3631 return; 3632 3633 if (adapter->missing_tx_completion_to == ENA_HW_HINTS_NO_TIMEOUT) 3634 return; 3635 3636 budget = ENA_MONITORED_TX_QUEUES; 3637 3638 for (i = adapter->last_monitored_tx_qid; i < io_queue_count; i++) { 3639 tx_ring = &adapter->tx_ring[i]; 3640 rx_ring = &adapter->rx_ring[i]; 3641 3642 rc = check_missing_comp_in_tx_queue(adapter, tx_ring); 3643 if (unlikely(rc)) 3644 return; 3645 3646 rc = !ENA_IS_XDP_INDEX(adapter, i) ? 3647 check_for_rx_interrupt_queue(adapter, rx_ring) : 0; 3648 if (unlikely(rc)) 3649 return; 3650 3651 budget--; 3652 if (!budget) 3653 break; 3654 } 3655 3656 adapter->last_monitored_tx_qid = i % io_queue_count; 3657 } 3658 3659 /* trigger napi schedule after 2 consecutive detections */ 3660 #define EMPTY_RX_REFILL 2 3661 /* For the rare case where the device runs out of Rx descriptors and the 3662 * napi handler failed to refill new Rx descriptors (due to a lack of memory 3663 * for example). 3664 * This case will lead to a deadlock: 3665 * The device won't send interrupts since all the new Rx packets will be dropped 3666 * The napi handler won't allocate new Rx descriptors so the device will be 3667 * able to send new packets. 3668 * 3669 * This scenario can happen when the kernel's vm.min_free_kbytes is too small. 3670 * It is recommended to have at least 512MB, with a minimum of 128MB for 3671 * constrained environment). 3672 * 3673 * When such a situation is detected - Reschedule napi 3674 */ 3675 static void check_for_empty_rx_ring(struct ena_adapter *adapter) 3676 { 3677 struct ena_ring *rx_ring; 3678 int i, refill_required; 3679 3680 if (!test_bit(ENA_FLAG_DEV_UP, &adapter->flags)) 3681 return; 3682 3683 if (test_bit(ENA_FLAG_TRIGGER_RESET, &adapter->flags)) 3684 return; 3685 3686 for (i = 0; i < adapter->num_io_queues; i++) { 3687 rx_ring = &adapter->rx_ring[i]; 3688 3689 refill_required = 3690 ena_com_free_desc(rx_ring->ena_com_io_sq); 3691 if (unlikely(refill_required == (rx_ring->ring_size - 1))) { 3692 rx_ring->empty_rx_queue++; 3693 3694 if (rx_ring->empty_rx_queue >= EMPTY_RX_REFILL) { 3695 u64_stats_update_begin(&rx_ring->syncp); 3696 rx_ring->rx_stats.empty_rx_ring++; 3697 u64_stats_update_end(&rx_ring->syncp); 3698 3699 netif_err(adapter, drv, adapter->netdev, 3700 "trigger refill for ring %d\n", i); 3701 3702 napi_schedule(rx_ring->napi); 3703 rx_ring->empty_rx_queue = 0; 3704 } 3705 } else { 3706 rx_ring->empty_rx_queue = 0; 3707 } 3708 } 3709 } 3710 3711 /* Check for keep alive expiration */ 3712 static void check_for_missing_keep_alive(struct ena_adapter *adapter) 3713 { 3714 unsigned long keep_alive_expired; 3715 3716 if (!adapter->wd_state) 3717 return; 3718 3719 if (adapter->keep_alive_timeout == ENA_HW_HINTS_NO_TIMEOUT) 3720 return; 3721 3722 keep_alive_expired = adapter->last_keep_alive_jiffies + 3723 adapter->keep_alive_timeout; 3724 if (unlikely(time_is_before_jiffies(keep_alive_expired))) { 3725 netif_err(adapter, drv, adapter->netdev, 3726 "Keep alive watchdog timeout.\n"); 3727 u64_stats_update_begin(&adapter->syncp); 3728 adapter->dev_stats.wd_expired++; 3729 u64_stats_update_end(&adapter->syncp); 3730 adapter->reset_reason = ENA_REGS_RESET_KEEP_ALIVE_TO; 3731 set_bit(ENA_FLAG_TRIGGER_RESET, &adapter->flags); 3732 } 3733 } 3734 3735 static void check_for_admin_com_state(struct ena_adapter *adapter) 3736 { 3737 if (unlikely(!ena_com_get_admin_running_state(adapter->ena_dev))) { 3738 netif_err(adapter, drv, adapter->netdev, 3739 "ENA admin queue is not in running state!\n"); 3740 u64_stats_update_begin(&adapter->syncp); 3741 adapter->dev_stats.admin_q_pause++; 3742 u64_stats_update_end(&adapter->syncp); 3743 adapter->reset_reason = ENA_REGS_RESET_ADMIN_TO; 3744 set_bit(ENA_FLAG_TRIGGER_RESET, &adapter->flags); 3745 } 3746 } 3747 3748 static void ena_update_hints(struct ena_adapter *adapter, 3749 struct ena_admin_ena_hw_hints *hints) 3750 { 3751 struct net_device *netdev = adapter->netdev; 3752 3753 if (hints->admin_completion_tx_timeout) 3754 adapter->ena_dev->admin_queue.completion_timeout = 3755 hints->admin_completion_tx_timeout * 1000; 3756 3757 if (hints->mmio_read_timeout) 3758 /* convert to usec */ 3759 adapter->ena_dev->mmio_read.reg_read_to = 3760 hints->mmio_read_timeout * 1000; 3761 3762 if (hints->missed_tx_completion_count_threshold_to_reset) 3763 adapter->missing_tx_completion_threshold = 3764 hints->missed_tx_completion_count_threshold_to_reset; 3765 3766 if (hints->missing_tx_completion_timeout) { 3767 if (hints->missing_tx_completion_timeout == ENA_HW_HINTS_NO_TIMEOUT) 3768 adapter->missing_tx_completion_to = ENA_HW_HINTS_NO_TIMEOUT; 3769 else 3770 adapter->missing_tx_completion_to = 3771 msecs_to_jiffies(hints->missing_tx_completion_timeout); 3772 } 3773 3774 if (hints->netdev_wd_timeout) 3775 netdev->watchdog_timeo = msecs_to_jiffies(hints->netdev_wd_timeout); 3776 3777 if (hints->driver_watchdog_timeout) { 3778 if (hints->driver_watchdog_timeout == ENA_HW_HINTS_NO_TIMEOUT) 3779 adapter->keep_alive_timeout = ENA_HW_HINTS_NO_TIMEOUT; 3780 else 3781 adapter->keep_alive_timeout = 3782 msecs_to_jiffies(hints->driver_watchdog_timeout); 3783 } 3784 } 3785 3786 static void ena_update_host_info(struct ena_admin_host_info *host_info, 3787 struct net_device *netdev) 3788 { 3789 host_info->supported_network_features[0] = 3790 netdev->features & GENMASK_ULL(31, 0); 3791 host_info->supported_network_features[1] = 3792 (netdev->features & GENMASK_ULL(63, 32)) >> 32; 3793 } 3794 3795 static void ena_timer_service(struct timer_list *t) 3796 { 3797 struct ena_adapter *adapter = from_timer(adapter, t, timer_service); 3798 u8 *debug_area = adapter->ena_dev->host_attr.debug_area_virt_addr; 3799 struct ena_admin_host_info *host_info = 3800 adapter->ena_dev->host_attr.host_info; 3801 3802 check_for_missing_keep_alive(adapter); 3803 3804 check_for_admin_com_state(adapter); 3805 3806 check_for_missing_completions(adapter); 3807 3808 check_for_empty_rx_ring(adapter); 3809 3810 if (debug_area) 3811 ena_dump_stats_to_buf(adapter, debug_area); 3812 3813 if (host_info) 3814 ena_update_host_info(host_info, adapter->netdev); 3815 3816 if (unlikely(test_bit(ENA_FLAG_TRIGGER_RESET, &adapter->flags))) { 3817 netif_err(adapter, drv, adapter->netdev, 3818 "Trigger reset is on\n"); 3819 ena_dump_stats_to_dmesg(adapter); 3820 queue_work(ena_wq, &adapter->reset_task); 3821 return; 3822 } 3823 3824 /* Reset the timer */ 3825 mod_timer(&adapter->timer_service, round_jiffies(jiffies + HZ)); 3826 } 3827 3828 static int ena_calc_max_io_queue_num(struct pci_dev *pdev, 3829 struct ena_com_dev *ena_dev, 3830 struct ena_com_dev_get_features_ctx *get_feat_ctx) 3831 { 3832 int io_tx_sq_num, io_tx_cq_num, io_rx_num, max_num_io_queues; 3833 3834 if (ena_dev->supported_features & BIT(ENA_ADMIN_MAX_QUEUES_EXT)) { 3835 struct ena_admin_queue_ext_feature_fields *max_queue_ext = 3836 &get_feat_ctx->max_queue_ext.max_queue_ext; 3837 io_rx_num = min_t(u32, max_queue_ext->max_rx_sq_num, 3838 max_queue_ext->max_rx_cq_num); 3839 3840 io_tx_sq_num = max_queue_ext->max_tx_sq_num; 3841 io_tx_cq_num = max_queue_ext->max_tx_cq_num; 3842 } else { 3843 struct ena_admin_queue_feature_desc *max_queues = 3844 &get_feat_ctx->max_queues; 3845 io_tx_sq_num = max_queues->max_sq_num; 3846 io_tx_cq_num = max_queues->max_cq_num; 3847 io_rx_num = min_t(u32, io_tx_sq_num, io_tx_cq_num); 3848 } 3849 3850 /* In case of LLQ use the llq fields for the tx SQ/CQ */ 3851 if (ena_dev->tx_mem_queue_type == ENA_ADMIN_PLACEMENT_POLICY_DEV) 3852 io_tx_sq_num = get_feat_ctx->llq.max_llq_num; 3853 3854 max_num_io_queues = min_t(u32, num_online_cpus(), ENA_MAX_NUM_IO_QUEUES); 3855 max_num_io_queues = min_t(u32, max_num_io_queues, io_rx_num); 3856 max_num_io_queues = min_t(u32, max_num_io_queues, io_tx_sq_num); 3857 max_num_io_queues = min_t(u32, max_num_io_queues, io_tx_cq_num); 3858 /* 1 IRQ for for mgmnt and 1 IRQs for each IO direction */ 3859 max_num_io_queues = min_t(u32, max_num_io_queues, pci_msix_vec_count(pdev) - 1); 3860 if (unlikely(!max_num_io_queues)) { 3861 dev_err(&pdev->dev, "The device doesn't have io queues\n"); 3862 return -EFAULT; 3863 } 3864 3865 return max_num_io_queues; 3866 } 3867 3868 static int ena_set_queues_placement_policy(struct pci_dev *pdev, 3869 struct ena_com_dev *ena_dev, 3870 struct ena_admin_feature_llq_desc *llq, 3871 struct ena_llq_configurations *llq_default_configurations) 3872 { 3873 bool has_mem_bar; 3874 int rc; 3875 u32 llq_feature_mask; 3876 3877 llq_feature_mask = 1 << ENA_ADMIN_LLQ; 3878 if (!(ena_dev->supported_features & llq_feature_mask)) { 3879 dev_err(&pdev->dev, 3880 "LLQ is not supported Fallback to host mode policy.\n"); 3881 ena_dev->tx_mem_queue_type = ENA_ADMIN_PLACEMENT_POLICY_HOST; 3882 return 0; 3883 } 3884 3885 has_mem_bar = pci_select_bars(pdev, IORESOURCE_MEM) & BIT(ENA_MEM_BAR); 3886 3887 rc = ena_com_config_dev_mode(ena_dev, llq, llq_default_configurations); 3888 if (unlikely(rc)) { 3889 dev_err(&pdev->dev, 3890 "Failed to configure the device mode. Fallback to host mode policy.\n"); 3891 ena_dev->tx_mem_queue_type = ENA_ADMIN_PLACEMENT_POLICY_HOST; 3892 return 0; 3893 } 3894 3895 /* Nothing to config, exit */ 3896 if (ena_dev->tx_mem_queue_type == ENA_ADMIN_PLACEMENT_POLICY_HOST) 3897 return 0; 3898 3899 if (!has_mem_bar) { 3900 dev_err(&pdev->dev, 3901 "ENA device does not expose LLQ bar. Fallback to host mode policy.\n"); 3902 ena_dev->tx_mem_queue_type = ENA_ADMIN_PLACEMENT_POLICY_HOST; 3903 return 0; 3904 } 3905 3906 ena_dev->mem_bar = devm_ioremap_wc(&pdev->dev, 3907 pci_resource_start(pdev, ENA_MEM_BAR), 3908 pci_resource_len(pdev, ENA_MEM_BAR)); 3909 3910 if (!ena_dev->mem_bar) 3911 return -EFAULT; 3912 3913 return 0; 3914 } 3915 3916 static void ena_set_dev_offloads(struct ena_com_dev_get_features_ctx *feat, 3917 struct net_device *netdev) 3918 { 3919 netdev_features_t dev_features = 0; 3920 3921 /* Set offload features */ 3922 if (feat->offload.tx & 3923 ENA_ADMIN_FEATURE_OFFLOAD_DESC_TX_L4_IPV4_CSUM_PART_MASK) 3924 dev_features |= NETIF_F_IP_CSUM; 3925 3926 if (feat->offload.tx & 3927 ENA_ADMIN_FEATURE_OFFLOAD_DESC_TX_L4_IPV6_CSUM_PART_MASK) 3928 dev_features |= NETIF_F_IPV6_CSUM; 3929 3930 if (feat->offload.tx & ENA_ADMIN_FEATURE_OFFLOAD_DESC_TSO_IPV4_MASK) 3931 dev_features |= NETIF_F_TSO; 3932 3933 if (feat->offload.tx & ENA_ADMIN_FEATURE_OFFLOAD_DESC_TSO_IPV6_MASK) 3934 dev_features |= NETIF_F_TSO6; 3935 3936 if (feat->offload.tx & ENA_ADMIN_FEATURE_OFFLOAD_DESC_TSO_ECN_MASK) 3937 dev_features |= NETIF_F_TSO_ECN; 3938 3939 if (feat->offload.rx_supported & 3940 ENA_ADMIN_FEATURE_OFFLOAD_DESC_RX_L4_IPV4_CSUM_MASK) 3941 dev_features |= NETIF_F_RXCSUM; 3942 3943 if (feat->offload.rx_supported & 3944 ENA_ADMIN_FEATURE_OFFLOAD_DESC_RX_L4_IPV6_CSUM_MASK) 3945 dev_features |= NETIF_F_RXCSUM; 3946 3947 netdev->features = 3948 dev_features | 3949 NETIF_F_SG | 3950 NETIF_F_RXHASH | 3951 NETIF_F_HIGHDMA; 3952 3953 netdev->hw_features |= netdev->features; 3954 netdev->vlan_features |= netdev->features; 3955 } 3956 3957 static void ena_set_conf_feat_params(struct ena_adapter *adapter, 3958 struct ena_com_dev_get_features_ctx *feat) 3959 { 3960 struct net_device *netdev = adapter->netdev; 3961 3962 /* Copy mac address */ 3963 if (!is_valid_ether_addr(feat->dev_attr.mac_addr)) { 3964 eth_hw_addr_random(netdev); 3965 ether_addr_copy(adapter->mac_addr, netdev->dev_addr); 3966 } else { 3967 ether_addr_copy(adapter->mac_addr, feat->dev_attr.mac_addr); 3968 ether_addr_copy(netdev->dev_addr, adapter->mac_addr); 3969 } 3970 3971 /* Set offload features */ 3972 ena_set_dev_offloads(feat, netdev); 3973 3974 adapter->max_mtu = feat->dev_attr.max_mtu; 3975 netdev->max_mtu = adapter->max_mtu; 3976 netdev->min_mtu = ENA_MIN_MTU; 3977 } 3978 3979 static int ena_rss_init_default(struct ena_adapter *adapter) 3980 { 3981 struct ena_com_dev *ena_dev = adapter->ena_dev; 3982 struct device *dev = &adapter->pdev->dev; 3983 int rc, i; 3984 u32 val; 3985 3986 rc = ena_com_rss_init(ena_dev, ENA_RX_RSS_TABLE_LOG_SIZE); 3987 if (unlikely(rc)) { 3988 dev_err(dev, "Cannot init indirect table\n"); 3989 goto err_rss_init; 3990 } 3991 3992 for (i = 0; i < ENA_RX_RSS_TABLE_SIZE; i++) { 3993 val = ethtool_rxfh_indir_default(i, adapter->num_io_queues); 3994 rc = ena_com_indirect_table_fill_entry(ena_dev, i, 3995 ENA_IO_RXQ_IDX(val)); 3996 if (unlikely(rc && (rc != -EOPNOTSUPP))) { 3997 dev_err(dev, "Cannot fill indirect table\n"); 3998 goto err_fill_indir; 3999 } 4000 } 4001 4002 rc = ena_com_fill_hash_function(ena_dev, ENA_ADMIN_TOEPLITZ, NULL, 4003 ENA_HASH_KEY_SIZE, 0xFFFFFFFF); 4004 if (unlikely(rc && (rc != -EOPNOTSUPP))) { 4005 dev_err(dev, "Cannot fill hash function\n"); 4006 goto err_fill_indir; 4007 } 4008 4009 rc = ena_com_set_default_hash_ctrl(ena_dev); 4010 if (unlikely(rc && (rc != -EOPNOTSUPP))) { 4011 dev_err(dev, "Cannot fill hash control\n"); 4012 goto err_fill_indir; 4013 } 4014 4015 return 0; 4016 4017 err_fill_indir: 4018 ena_com_rss_destroy(ena_dev); 4019 err_rss_init: 4020 4021 return rc; 4022 } 4023 4024 static void ena_release_bars(struct ena_com_dev *ena_dev, struct pci_dev *pdev) 4025 { 4026 int release_bars = pci_select_bars(pdev, IORESOURCE_MEM) & ENA_BAR_MASK; 4027 4028 pci_release_selected_regions(pdev, release_bars); 4029 } 4030 4031 static void set_default_llq_configurations(struct ena_llq_configurations *llq_config) 4032 { 4033 llq_config->llq_header_location = ENA_ADMIN_INLINE_HEADER; 4034 llq_config->llq_ring_entry_size = ENA_ADMIN_LIST_ENTRY_SIZE_128B; 4035 llq_config->llq_stride_ctrl = ENA_ADMIN_MULTIPLE_DESCS_PER_ENTRY; 4036 llq_config->llq_num_decs_before_header = ENA_ADMIN_LLQ_NUM_DESCS_BEFORE_HEADER_2; 4037 llq_config->llq_ring_entry_size_value = 128; 4038 } 4039 4040 static int ena_calc_io_queue_size(struct ena_calc_queue_size_ctx *ctx) 4041 { 4042 struct ena_admin_feature_llq_desc *llq = &ctx->get_feat_ctx->llq; 4043 struct ena_com_dev *ena_dev = ctx->ena_dev; 4044 u32 tx_queue_size = ENA_DEFAULT_RING_SIZE; 4045 u32 rx_queue_size = ENA_DEFAULT_RING_SIZE; 4046 u32 max_tx_queue_size; 4047 u32 max_rx_queue_size; 4048 4049 if (ena_dev->supported_features & BIT(ENA_ADMIN_MAX_QUEUES_EXT)) { 4050 struct ena_admin_queue_ext_feature_fields *max_queue_ext = 4051 &ctx->get_feat_ctx->max_queue_ext.max_queue_ext; 4052 max_rx_queue_size = min_t(u32, max_queue_ext->max_rx_cq_depth, 4053 max_queue_ext->max_rx_sq_depth); 4054 max_tx_queue_size = max_queue_ext->max_tx_cq_depth; 4055 4056 if (ena_dev->tx_mem_queue_type == ENA_ADMIN_PLACEMENT_POLICY_DEV) 4057 max_tx_queue_size = min_t(u32, max_tx_queue_size, 4058 llq->max_llq_depth); 4059 else 4060 max_tx_queue_size = min_t(u32, max_tx_queue_size, 4061 max_queue_ext->max_tx_sq_depth); 4062 4063 ctx->max_tx_sgl_size = min_t(u16, ENA_PKT_MAX_BUFS, 4064 max_queue_ext->max_per_packet_tx_descs); 4065 ctx->max_rx_sgl_size = min_t(u16, ENA_PKT_MAX_BUFS, 4066 max_queue_ext->max_per_packet_rx_descs); 4067 } else { 4068 struct ena_admin_queue_feature_desc *max_queues = 4069 &ctx->get_feat_ctx->max_queues; 4070 max_rx_queue_size = min_t(u32, max_queues->max_cq_depth, 4071 max_queues->max_sq_depth); 4072 max_tx_queue_size = max_queues->max_cq_depth; 4073 4074 if (ena_dev->tx_mem_queue_type == ENA_ADMIN_PLACEMENT_POLICY_DEV) 4075 max_tx_queue_size = min_t(u32, max_tx_queue_size, 4076 llq->max_llq_depth); 4077 else 4078 max_tx_queue_size = min_t(u32, max_tx_queue_size, 4079 max_queues->max_sq_depth); 4080 4081 ctx->max_tx_sgl_size = min_t(u16, ENA_PKT_MAX_BUFS, 4082 max_queues->max_packet_tx_descs); 4083 ctx->max_rx_sgl_size = min_t(u16, ENA_PKT_MAX_BUFS, 4084 max_queues->max_packet_rx_descs); 4085 } 4086 4087 max_tx_queue_size = rounddown_pow_of_two(max_tx_queue_size); 4088 max_rx_queue_size = rounddown_pow_of_two(max_rx_queue_size); 4089 4090 tx_queue_size = clamp_val(tx_queue_size, ENA_MIN_RING_SIZE, 4091 max_tx_queue_size); 4092 rx_queue_size = clamp_val(rx_queue_size, ENA_MIN_RING_SIZE, 4093 max_rx_queue_size); 4094 4095 tx_queue_size = rounddown_pow_of_two(tx_queue_size); 4096 rx_queue_size = rounddown_pow_of_two(rx_queue_size); 4097 4098 ctx->max_tx_queue_size = max_tx_queue_size; 4099 ctx->max_rx_queue_size = max_rx_queue_size; 4100 ctx->tx_queue_size = tx_queue_size; 4101 ctx->rx_queue_size = rx_queue_size; 4102 4103 return 0; 4104 } 4105 4106 /* ena_probe - Device Initialization Routine 4107 * @pdev: PCI device information struct 4108 * @ent: entry in ena_pci_tbl 4109 * 4110 * Returns 0 on success, negative on failure 4111 * 4112 * ena_probe initializes an adapter identified by a pci_dev structure. 4113 * The OS initialization, configuring of the adapter private structure, 4114 * and a hardware reset occur. 4115 */ 4116 static int ena_probe(struct pci_dev *pdev, const struct pci_device_id *ent) 4117 { 4118 struct ena_com_dev_get_features_ctx get_feat_ctx; 4119 struct ena_calc_queue_size_ctx calc_queue_ctx = { 0 }; 4120 struct ena_llq_configurations llq_config; 4121 struct ena_com_dev *ena_dev = NULL; 4122 struct ena_adapter *adapter; 4123 struct net_device *netdev; 4124 static int adapters_found; 4125 u32 max_num_io_queues; 4126 char *queue_type_str; 4127 bool wd_state; 4128 int bars, rc; 4129 4130 dev_dbg(&pdev->dev, "%s\n", __func__); 4131 4132 rc = pci_enable_device_mem(pdev); 4133 if (rc) { 4134 dev_err(&pdev->dev, "pci_enable_device_mem() failed!\n"); 4135 return rc; 4136 } 4137 4138 pci_set_master(pdev); 4139 4140 ena_dev = vzalloc(sizeof(*ena_dev)); 4141 if (!ena_dev) { 4142 rc = -ENOMEM; 4143 goto err_disable_device; 4144 } 4145 4146 bars = pci_select_bars(pdev, IORESOURCE_MEM) & ENA_BAR_MASK; 4147 rc = pci_request_selected_regions(pdev, bars, DRV_MODULE_NAME); 4148 if (rc) { 4149 dev_err(&pdev->dev, "pci_request_selected_regions failed %d\n", 4150 rc); 4151 goto err_free_ena_dev; 4152 } 4153 4154 ena_dev->reg_bar = devm_ioremap(&pdev->dev, 4155 pci_resource_start(pdev, ENA_REG_BAR), 4156 pci_resource_len(pdev, ENA_REG_BAR)); 4157 if (!ena_dev->reg_bar) { 4158 dev_err(&pdev->dev, "failed to remap regs bar\n"); 4159 rc = -EFAULT; 4160 goto err_free_region; 4161 } 4162 4163 ena_dev->dmadev = &pdev->dev; 4164 4165 rc = ena_device_init(ena_dev, pdev, &get_feat_ctx, &wd_state); 4166 if (rc) { 4167 dev_err(&pdev->dev, "ena device init failed\n"); 4168 if (rc == -ETIME) 4169 rc = -EPROBE_DEFER; 4170 goto err_free_region; 4171 } 4172 4173 set_default_llq_configurations(&llq_config); 4174 4175 rc = ena_set_queues_placement_policy(pdev, ena_dev, &get_feat_ctx.llq, 4176 &llq_config); 4177 if (rc) { 4178 dev_err(&pdev->dev, "ena device init failed\n"); 4179 goto err_device_destroy; 4180 } 4181 4182 calc_queue_ctx.ena_dev = ena_dev; 4183 calc_queue_ctx.get_feat_ctx = &get_feat_ctx; 4184 calc_queue_ctx.pdev = pdev; 4185 4186 /* Initial Tx and RX interrupt delay. Assumes 1 usec granularity. 4187 * Updated during device initialization with the real granularity 4188 */ 4189 ena_dev->intr_moder_tx_interval = ENA_INTR_INITIAL_TX_INTERVAL_USECS; 4190 ena_dev->intr_moder_rx_interval = ENA_INTR_INITIAL_RX_INTERVAL_USECS; 4191 ena_dev->intr_delay_resolution = ENA_DEFAULT_INTR_DELAY_RESOLUTION; 4192 max_num_io_queues = ena_calc_max_io_queue_num(pdev, ena_dev, &get_feat_ctx); 4193 rc = ena_calc_io_queue_size(&calc_queue_ctx); 4194 if (rc || !max_num_io_queues) { 4195 rc = -EFAULT; 4196 goto err_device_destroy; 4197 } 4198 4199 /* dev zeroed in init_etherdev */ 4200 netdev = alloc_etherdev_mq(sizeof(struct ena_adapter), max_num_io_queues); 4201 if (!netdev) { 4202 dev_err(&pdev->dev, "alloc_etherdev_mq failed\n"); 4203 rc = -ENOMEM; 4204 goto err_device_destroy; 4205 } 4206 4207 SET_NETDEV_DEV(netdev, &pdev->dev); 4208 4209 adapter = netdev_priv(netdev); 4210 pci_set_drvdata(pdev, adapter); 4211 4212 adapter->ena_dev = ena_dev; 4213 adapter->netdev = netdev; 4214 adapter->pdev = pdev; 4215 4216 ena_set_conf_feat_params(adapter, &get_feat_ctx); 4217 4218 adapter->msg_enable = netif_msg_init(debug, DEFAULT_MSG_ENABLE); 4219 adapter->reset_reason = ENA_REGS_RESET_NORMAL; 4220 4221 adapter->requested_tx_ring_size = calc_queue_ctx.tx_queue_size; 4222 adapter->requested_rx_ring_size = calc_queue_ctx.rx_queue_size; 4223 adapter->max_tx_ring_size = calc_queue_ctx.max_tx_queue_size; 4224 adapter->max_rx_ring_size = calc_queue_ctx.max_rx_queue_size; 4225 adapter->max_tx_sgl_size = calc_queue_ctx.max_tx_sgl_size; 4226 adapter->max_rx_sgl_size = calc_queue_ctx.max_rx_sgl_size; 4227 4228 adapter->num_io_queues = max_num_io_queues; 4229 adapter->max_num_io_queues = max_num_io_queues; 4230 4231 adapter->xdp_first_ring = 0; 4232 adapter->xdp_num_queues = 0; 4233 4234 adapter->last_monitored_tx_qid = 0; 4235 4236 adapter->rx_copybreak = ENA_DEFAULT_RX_COPYBREAK; 4237 adapter->wd_state = wd_state; 4238 4239 snprintf(adapter->name, ENA_NAME_MAX_LEN, "ena_%d", adapters_found); 4240 4241 rc = ena_com_init_interrupt_moderation(adapter->ena_dev); 4242 if (rc) { 4243 dev_err(&pdev->dev, 4244 "Failed to query interrupt moderation feature\n"); 4245 goto err_netdev_destroy; 4246 } 4247 ena_init_io_rings(adapter, 4248 0, 4249 adapter->xdp_num_queues + 4250 adapter->num_io_queues); 4251 4252 netdev->netdev_ops = &ena_netdev_ops; 4253 netdev->watchdog_timeo = TX_TIMEOUT; 4254 ena_set_ethtool_ops(netdev); 4255 4256 netdev->priv_flags |= IFF_UNICAST_FLT; 4257 4258 u64_stats_init(&adapter->syncp); 4259 4260 rc = ena_enable_msix_and_set_admin_interrupts(adapter); 4261 if (rc) { 4262 dev_err(&pdev->dev, 4263 "Failed to enable and set the admin interrupts\n"); 4264 goto err_worker_destroy; 4265 } 4266 rc = ena_rss_init_default(adapter); 4267 if (rc && (rc != -EOPNOTSUPP)) { 4268 dev_err(&pdev->dev, "Cannot init RSS rc: %d\n", rc); 4269 goto err_free_msix; 4270 } 4271 4272 ena_config_debug_area(adapter); 4273 4274 memcpy(adapter->netdev->perm_addr, adapter->mac_addr, netdev->addr_len); 4275 4276 netif_carrier_off(netdev); 4277 4278 rc = register_netdev(netdev); 4279 if (rc) { 4280 dev_err(&pdev->dev, "Cannot register net device\n"); 4281 goto err_rss; 4282 } 4283 4284 INIT_WORK(&adapter->reset_task, ena_fw_reset_device); 4285 4286 adapter->last_keep_alive_jiffies = jiffies; 4287 adapter->keep_alive_timeout = ENA_DEVICE_KALIVE_TIMEOUT; 4288 adapter->missing_tx_completion_to = TX_TIMEOUT; 4289 adapter->missing_tx_completion_threshold = MAX_NUM_OF_TIMEOUTED_PACKETS; 4290 4291 ena_update_hints(adapter, &get_feat_ctx.hw_hints); 4292 4293 timer_setup(&adapter->timer_service, ena_timer_service, 0); 4294 mod_timer(&adapter->timer_service, round_jiffies(jiffies + HZ)); 4295 4296 if (ena_dev->tx_mem_queue_type == ENA_ADMIN_PLACEMENT_POLICY_HOST) 4297 queue_type_str = "Regular"; 4298 else 4299 queue_type_str = "Low Latency"; 4300 4301 dev_info(&pdev->dev, 4302 "%s found at mem %lx, mac addr %pM, Placement policy: %s\n", 4303 DEVICE_NAME, (long)pci_resource_start(pdev, 0), 4304 netdev->dev_addr, queue_type_str); 4305 4306 set_bit(ENA_FLAG_DEVICE_RUNNING, &adapter->flags); 4307 4308 adapters_found++; 4309 4310 return 0; 4311 4312 err_rss: 4313 ena_com_delete_debug_area(ena_dev); 4314 ena_com_rss_destroy(ena_dev); 4315 err_free_msix: 4316 ena_com_dev_reset(ena_dev, ENA_REGS_RESET_INIT_ERR); 4317 /* stop submitting admin commands on a device that was reset */ 4318 ena_com_set_admin_running_state(ena_dev, false); 4319 ena_free_mgmnt_irq(adapter); 4320 ena_disable_msix(adapter); 4321 err_worker_destroy: 4322 del_timer(&adapter->timer_service); 4323 err_netdev_destroy: 4324 free_netdev(netdev); 4325 err_device_destroy: 4326 ena_com_delete_host_info(ena_dev); 4327 ena_com_admin_destroy(ena_dev); 4328 err_free_region: 4329 ena_release_bars(ena_dev, pdev); 4330 err_free_ena_dev: 4331 vfree(ena_dev); 4332 err_disable_device: 4333 pci_disable_device(pdev); 4334 return rc; 4335 } 4336 4337 /*****************************************************************************/ 4338 4339 /* __ena_shutoff - Helper used in both PCI remove/shutdown routines 4340 * @pdev: PCI device information struct 4341 * @shutdown: Is it a shutdown operation? If false, means it is a removal 4342 * 4343 * __ena_shutoff is a helper routine that does the real work on shutdown and 4344 * removal paths; the difference between those paths is with regards to whether 4345 * dettach or unregister the netdevice. 4346 */ 4347 static void __ena_shutoff(struct pci_dev *pdev, bool shutdown) 4348 { 4349 struct ena_adapter *adapter = pci_get_drvdata(pdev); 4350 struct ena_com_dev *ena_dev; 4351 struct net_device *netdev; 4352 4353 ena_dev = adapter->ena_dev; 4354 netdev = adapter->netdev; 4355 4356 #ifdef CONFIG_RFS_ACCEL 4357 if ((adapter->msix_vecs >= 1) && (netdev->rx_cpu_rmap)) { 4358 free_irq_cpu_rmap(netdev->rx_cpu_rmap); 4359 netdev->rx_cpu_rmap = NULL; 4360 } 4361 #endif /* CONFIG_RFS_ACCEL */ 4362 del_timer_sync(&adapter->timer_service); 4363 4364 cancel_work_sync(&adapter->reset_task); 4365 4366 rtnl_lock(); /* lock released inside the below if-else block */ 4367 adapter->reset_reason = ENA_REGS_RESET_SHUTDOWN; 4368 ena_destroy_device(adapter, true); 4369 if (shutdown) { 4370 netif_device_detach(netdev); 4371 dev_close(netdev); 4372 rtnl_unlock(); 4373 } else { 4374 rtnl_unlock(); 4375 unregister_netdev(netdev); 4376 free_netdev(netdev); 4377 } 4378 4379 ena_com_rss_destroy(ena_dev); 4380 4381 ena_com_delete_debug_area(ena_dev); 4382 4383 ena_com_delete_host_info(ena_dev); 4384 4385 ena_release_bars(ena_dev, pdev); 4386 4387 pci_disable_device(pdev); 4388 4389 vfree(ena_dev); 4390 } 4391 4392 /* ena_remove - Device Removal Routine 4393 * @pdev: PCI device information struct 4394 * 4395 * ena_remove is called by the PCI subsystem to alert the driver 4396 * that it should release a PCI device. 4397 */ 4398 4399 static void ena_remove(struct pci_dev *pdev) 4400 { 4401 __ena_shutoff(pdev, false); 4402 } 4403 4404 /* ena_shutdown - Device Shutdown Routine 4405 * @pdev: PCI device information struct 4406 * 4407 * ena_shutdown is called by the PCI subsystem to alert the driver that 4408 * a shutdown/reboot (or kexec) is happening and device must be disabled. 4409 */ 4410 4411 static void ena_shutdown(struct pci_dev *pdev) 4412 { 4413 __ena_shutoff(pdev, true); 4414 } 4415 4416 #ifdef CONFIG_PM 4417 /* ena_suspend - PM suspend callback 4418 * @pdev: PCI device information struct 4419 * @state:power state 4420 */ 4421 static int ena_suspend(struct pci_dev *pdev, pm_message_t state) 4422 { 4423 struct ena_adapter *adapter = pci_get_drvdata(pdev); 4424 4425 u64_stats_update_begin(&adapter->syncp); 4426 adapter->dev_stats.suspend++; 4427 u64_stats_update_end(&adapter->syncp); 4428 4429 rtnl_lock(); 4430 if (unlikely(test_bit(ENA_FLAG_TRIGGER_RESET, &adapter->flags))) { 4431 dev_err(&pdev->dev, 4432 "ignoring device reset request as the device is being suspended\n"); 4433 clear_bit(ENA_FLAG_TRIGGER_RESET, &adapter->flags); 4434 } 4435 ena_destroy_device(adapter, true); 4436 rtnl_unlock(); 4437 return 0; 4438 } 4439 4440 /* ena_resume - PM resume callback 4441 * @pdev: PCI device information struct 4442 * 4443 */ 4444 static int ena_resume(struct pci_dev *pdev) 4445 { 4446 struct ena_adapter *adapter = pci_get_drvdata(pdev); 4447 int rc; 4448 4449 u64_stats_update_begin(&adapter->syncp); 4450 adapter->dev_stats.resume++; 4451 u64_stats_update_end(&adapter->syncp); 4452 4453 rtnl_lock(); 4454 rc = ena_restore_device(adapter); 4455 rtnl_unlock(); 4456 return rc; 4457 } 4458 #endif 4459 4460 static struct pci_driver ena_pci_driver = { 4461 .name = DRV_MODULE_NAME, 4462 .id_table = ena_pci_tbl, 4463 .probe = ena_probe, 4464 .remove = ena_remove, 4465 .shutdown = ena_shutdown, 4466 #ifdef CONFIG_PM 4467 .suspend = ena_suspend, 4468 .resume = ena_resume, 4469 #endif 4470 .sriov_configure = pci_sriov_configure_simple, 4471 }; 4472 4473 static int __init ena_init(void) 4474 { 4475 ena_wq = create_singlethread_workqueue(DRV_MODULE_NAME); 4476 if (!ena_wq) { 4477 pr_err("Failed to create workqueue\n"); 4478 return -ENOMEM; 4479 } 4480 4481 return pci_register_driver(&ena_pci_driver); 4482 } 4483 4484 static void __exit ena_cleanup(void) 4485 { 4486 pci_unregister_driver(&ena_pci_driver); 4487 4488 if (ena_wq) { 4489 destroy_workqueue(ena_wq); 4490 ena_wq = NULL; 4491 } 4492 } 4493 4494 /****************************************************************************** 4495 ******************************** AENQ Handlers ******************************* 4496 *****************************************************************************/ 4497 /* ena_update_on_link_change: 4498 * Notify the network interface about the change in link status 4499 */ 4500 static void ena_update_on_link_change(void *adapter_data, 4501 struct ena_admin_aenq_entry *aenq_e) 4502 { 4503 struct ena_adapter *adapter = (struct ena_adapter *)adapter_data; 4504 struct ena_admin_aenq_link_change_desc *aenq_desc = 4505 (struct ena_admin_aenq_link_change_desc *)aenq_e; 4506 int status = aenq_desc->flags & 4507 ENA_ADMIN_AENQ_LINK_CHANGE_DESC_LINK_STATUS_MASK; 4508 4509 if (status) { 4510 netdev_dbg(adapter->netdev, "%s\n", __func__); 4511 set_bit(ENA_FLAG_LINK_UP, &adapter->flags); 4512 if (!test_bit(ENA_FLAG_ONGOING_RESET, &adapter->flags)) 4513 netif_carrier_on(adapter->netdev); 4514 } else { 4515 clear_bit(ENA_FLAG_LINK_UP, &adapter->flags); 4516 netif_carrier_off(adapter->netdev); 4517 } 4518 } 4519 4520 static void ena_keep_alive_wd(void *adapter_data, 4521 struct ena_admin_aenq_entry *aenq_e) 4522 { 4523 struct ena_adapter *adapter = (struct ena_adapter *)adapter_data; 4524 struct ena_admin_aenq_keep_alive_desc *desc; 4525 u64 rx_drops; 4526 u64 tx_drops; 4527 4528 desc = (struct ena_admin_aenq_keep_alive_desc *)aenq_e; 4529 adapter->last_keep_alive_jiffies = jiffies; 4530 4531 rx_drops = ((u64)desc->rx_drops_high << 32) | desc->rx_drops_low; 4532 tx_drops = ((u64)desc->tx_drops_high << 32) | desc->tx_drops_low; 4533 4534 u64_stats_update_begin(&adapter->syncp); 4535 adapter->dev_stats.rx_drops = rx_drops; 4536 adapter->dev_stats.tx_drops = tx_drops; 4537 u64_stats_update_end(&adapter->syncp); 4538 } 4539 4540 static void ena_notification(void *adapter_data, 4541 struct ena_admin_aenq_entry *aenq_e) 4542 { 4543 struct ena_adapter *adapter = (struct ena_adapter *)adapter_data; 4544 struct ena_admin_ena_hw_hints *hints; 4545 4546 WARN(aenq_e->aenq_common_desc.group != ENA_ADMIN_NOTIFICATION, 4547 "Invalid group(%x) expected %x\n", 4548 aenq_e->aenq_common_desc.group, 4549 ENA_ADMIN_NOTIFICATION); 4550 4551 switch (aenq_e->aenq_common_desc.syndrom) { 4552 case ENA_ADMIN_UPDATE_HINTS: 4553 hints = (struct ena_admin_ena_hw_hints *) 4554 (&aenq_e->inline_data_w4); 4555 ena_update_hints(adapter, hints); 4556 break; 4557 default: 4558 netif_err(adapter, drv, adapter->netdev, 4559 "Invalid aenq notification link state %d\n", 4560 aenq_e->aenq_common_desc.syndrom); 4561 } 4562 } 4563 4564 /* This handler will called for unknown event group or unimplemented handlers*/ 4565 static void unimplemented_aenq_handler(void *data, 4566 struct ena_admin_aenq_entry *aenq_e) 4567 { 4568 struct ena_adapter *adapter = (struct ena_adapter *)data; 4569 4570 netif_err(adapter, drv, adapter->netdev, 4571 "Unknown event was received or event with unimplemented handler\n"); 4572 } 4573 4574 static struct ena_aenq_handlers aenq_handlers = { 4575 .handlers = { 4576 [ENA_ADMIN_LINK_CHANGE] = ena_update_on_link_change, 4577 [ENA_ADMIN_NOTIFICATION] = ena_notification, 4578 [ENA_ADMIN_KEEP_ALIVE] = ena_keep_alive_wd, 4579 }, 4580 .unimplemented_handler = unimplemented_aenq_handler 4581 }; 4582 4583 module_init(ena_init); 4584 module_exit(ena_cleanup); 4585