1 /* SPDX-License-Identifier: GPL-2.0 */ 2 #include <linux/device.h> 3 #include <linux/etherdevice.h> 4 #include <linux/gpio/driver.h> 5 6 /* The VSC7395 switch chips have 5+1 ports which means 5 ordinary ports and 7 * a sixth CPU port facing the processor with an RGMII interface. These ports 8 * are numbered 0..4 and 6, so they leave a "hole" in the port map for port 5, 9 * which is invalid. 10 * 11 * The VSC7398 has 8 ports, port 7 is again the CPU port. 12 * 13 * We allocate 8 ports and avoid access to the nonexistent ports. 14 */ 15 #define VSC73XX_MAX_NUM_PORTS 8 16 17 /** 18 * struct vsc73xx - VSC73xx state container: main data structure 19 * @dev: The device pointer 20 * @reset: The descriptor for the GPIO line tied to the reset pin 21 * @ds: Pointer to the DSA core structure 22 * @gc: Main structure of the GPIO controller 23 * @chipid: Storage for the Chip ID value read from the CHIPID register of the 24 * switch 25 * @addr: MAC address used in flow control frames 26 * @ops: Structure with hardware-dependent operations 27 * @priv: Pointer to the configuration interface structure 28 */ 29 struct vsc73xx { 30 struct device *dev; 31 struct gpio_desc *reset; 32 struct dsa_switch *ds; 33 struct gpio_chip gc; 34 u16 chipid; 35 u8 addr[ETH_ALEN]; 36 const struct vsc73xx_ops *ops; 37 void *priv; 38 }; 39 40 /** 41 * struct vsc73xx_ops - VSC73xx methods container 42 * @read: Method for register reading over the hardware-dependent interface 43 * @write: Method for register writing over the hardware-dependent interface 44 */ 45 struct vsc73xx_ops { 46 int (*read)(struct vsc73xx *vsc, u8 block, u8 subblock, u8 reg, 47 u32 *val); 48 int (*write)(struct vsc73xx *vsc, u8 block, u8 subblock, u8 reg, 49 u32 val); 50 }; 51 52 int vsc73xx_is_addr_valid(u8 block, u8 subblock); 53 int vsc73xx_probe(struct vsc73xx *vsc); 54 void vsc73xx_remove(struct vsc73xx *vsc); 55 void vsc73xx_shutdown(struct vsc73xx *vsc); 56