1 /* SPDX-License-Identifier: BSD-3-Clause */ 2 /* Copyright (c) 2016-2018, NXP Semiconductors 3 * Copyright (c) 2018-2019, Vladimir Oltean <olteanv@gmail.com> 4 */ 5 #ifndef _SJA1105_STATIC_CONFIG_H 6 #define _SJA1105_STATIC_CONFIG_H 7 8 #include <linux/packing.h> 9 #include <linux/types.h> 10 #include <asm/types.h> 11 12 #define SJA1105_SIZE_DEVICE_ID 4 13 #define SJA1105_SIZE_TABLE_HEADER 12 14 #define SJA1105_SIZE_SCHEDULE_ENTRY 8 15 #define SJA1105_SIZE_SCHEDULE_ENTRY_POINTS_ENTRY 4 16 #define SJA1105_SIZE_VL_LOOKUP_ENTRY 12 17 #define SJA1105_SIZE_VL_POLICING_ENTRY 8 18 #define SJA1105_SIZE_VL_FORWARDING_ENTRY 4 19 #define SJA1105_SIZE_L2_POLICING_ENTRY 8 20 #define SJA1105_SIZE_VLAN_LOOKUP_ENTRY 8 21 #define SJA1105_SIZE_L2_FORWARDING_ENTRY 8 22 #define SJA1105_SIZE_L2_FORWARDING_PARAMS_ENTRY 12 23 #define SJA1105_SIZE_RETAGGING_ENTRY 8 24 #define SJA1105_SIZE_XMII_PARAMS_ENTRY 4 25 #define SJA1105_SIZE_SCHEDULE_PARAMS_ENTRY 12 26 #define SJA1105_SIZE_SCHEDULE_ENTRY_POINTS_PARAMS_ENTRY 4 27 #define SJA1105_SIZE_VL_FORWARDING_PARAMS_ENTRY 12 28 #define SJA1105ET_SIZE_L2_LOOKUP_ENTRY 12 29 #define SJA1105ET_SIZE_MAC_CONFIG_ENTRY 28 30 #define SJA1105ET_SIZE_L2_LOOKUP_PARAMS_ENTRY 4 31 #define SJA1105ET_SIZE_GENERAL_PARAMS_ENTRY 40 32 #define SJA1105ET_SIZE_AVB_PARAMS_ENTRY 12 33 #define SJA1105PQRS_SIZE_L2_LOOKUP_ENTRY 20 34 #define SJA1105PQRS_SIZE_MAC_CONFIG_ENTRY 32 35 #define SJA1105PQRS_SIZE_L2_LOOKUP_PARAMS_ENTRY 16 36 #define SJA1105PQRS_SIZE_GENERAL_PARAMS_ENTRY 44 37 #define SJA1105PQRS_SIZE_AVB_PARAMS_ENTRY 16 38 39 /* UM10944.pdf Page 11, Table 2. Configuration Blocks */ 40 enum { 41 BLKID_SCHEDULE = 0x00, 42 BLKID_SCHEDULE_ENTRY_POINTS = 0x01, 43 BLKID_VL_LOOKUP = 0x02, 44 BLKID_VL_POLICING = 0x03, 45 BLKID_VL_FORWARDING = 0x04, 46 BLKID_L2_LOOKUP = 0x05, 47 BLKID_L2_POLICING = 0x06, 48 BLKID_VLAN_LOOKUP = 0x07, 49 BLKID_L2_FORWARDING = 0x08, 50 BLKID_MAC_CONFIG = 0x09, 51 BLKID_SCHEDULE_PARAMS = 0x0A, 52 BLKID_SCHEDULE_ENTRY_POINTS_PARAMS = 0x0B, 53 BLKID_VL_FORWARDING_PARAMS = 0x0C, 54 BLKID_L2_LOOKUP_PARAMS = 0x0D, 55 BLKID_L2_FORWARDING_PARAMS = 0x0E, 56 BLKID_AVB_PARAMS = 0x10, 57 BLKID_GENERAL_PARAMS = 0x11, 58 BLKID_RETAGGING = 0x12, 59 BLKID_XMII_PARAMS = 0x4E, 60 }; 61 62 enum sja1105_blk_idx { 63 BLK_IDX_SCHEDULE = 0, 64 BLK_IDX_SCHEDULE_ENTRY_POINTS, 65 BLK_IDX_VL_LOOKUP, 66 BLK_IDX_VL_POLICING, 67 BLK_IDX_VL_FORWARDING, 68 BLK_IDX_L2_LOOKUP, 69 BLK_IDX_L2_POLICING, 70 BLK_IDX_VLAN_LOOKUP, 71 BLK_IDX_L2_FORWARDING, 72 BLK_IDX_MAC_CONFIG, 73 BLK_IDX_SCHEDULE_PARAMS, 74 BLK_IDX_SCHEDULE_ENTRY_POINTS_PARAMS, 75 BLK_IDX_VL_FORWARDING_PARAMS, 76 BLK_IDX_L2_LOOKUP_PARAMS, 77 BLK_IDX_L2_FORWARDING_PARAMS, 78 BLK_IDX_AVB_PARAMS, 79 BLK_IDX_GENERAL_PARAMS, 80 BLK_IDX_RETAGGING, 81 BLK_IDX_XMII_PARAMS, 82 BLK_IDX_MAX, 83 /* Fake block indices that are only valid for dynamic access */ 84 BLK_IDX_MGMT_ROUTE, 85 BLK_IDX_MAX_DYN, 86 BLK_IDX_INVAL = -1, 87 }; 88 89 #define SJA1105_MAX_SCHEDULE_COUNT 1024 90 #define SJA1105_MAX_SCHEDULE_ENTRY_POINTS_COUNT 2048 91 #define SJA1105_MAX_VL_LOOKUP_COUNT 1024 92 #define SJA1105_MAX_VL_POLICING_COUNT 1024 93 #define SJA1105_MAX_VL_FORWARDING_COUNT 1024 94 #define SJA1105_MAX_L2_LOOKUP_COUNT 1024 95 #define SJA1105_MAX_L2_POLICING_COUNT 45 96 #define SJA1105_MAX_VLAN_LOOKUP_COUNT 4096 97 #define SJA1105_MAX_L2_FORWARDING_COUNT 13 98 #define SJA1105_MAX_MAC_CONFIG_COUNT 5 99 #define SJA1105_MAX_SCHEDULE_PARAMS_COUNT 1 100 #define SJA1105_MAX_SCHEDULE_ENTRY_POINTS_PARAMS_COUNT 1 101 #define SJA1105_MAX_VL_FORWARDING_PARAMS_COUNT 1 102 #define SJA1105_MAX_L2_LOOKUP_PARAMS_COUNT 1 103 #define SJA1105_MAX_L2_FORWARDING_PARAMS_COUNT 1 104 #define SJA1105_MAX_GENERAL_PARAMS_COUNT 1 105 #define SJA1105_MAX_RETAGGING_COUNT 32 106 #define SJA1105_MAX_XMII_PARAMS_COUNT 1 107 #define SJA1105_MAX_AVB_PARAMS_COUNT 1 108 109 #define SJA1105_MAX_FRAME_MEMORY 929 110 #define SJA1105_MAX_FRAME_MEMORY_RETAGGING 910 111 #define SJA1105_VL_FRAME_MEMORY 100 112 113 #define SJA1105E_DEVICE_ID 0x9C00000Cull 114 #define SJA1105T_DEVICE_ID 0x9E00030Eull 115 #define SJA1105PR_DEVICE_ID 0xAF00030Eull 116 #define SJA1105QS_DEVICE_ID 0xAE00030Eull 117 118 #define SJA1105ET_PART_NO 0x9A83 119 #define SJA1105P_PART_NO 0x9A84 120 #define SJA1105Q_PART_NO 0x9A85 121 #define SJA1105R_PART_NO 0x9A86 122 #define SJA1105S_PART_NO 0x9A87 123 124 struct sja1105_schedule_entry { 125 u64 winstindex; 126 u64 winend; 127 u64 winst; 128 u64 destports; 129 u64 setvalid; 130 u64 txen; 131 u64 resmedia_en; 132 u64 resmedia; 133 u64 vlindex; 134 u64 delta; 135 }; 136 137 struct sja1105_schedule_params_entry { 138 u64 subscheind[8]; 139 }; 140 141 struct sja1105_general_params_entry { 142 u64 vllupformat; 143 u64 mirr_ptacu; 144 u64 switchid; 145 u64 hostprio; 146 u64 mac_fltres1; 147 u64 mac_fltres0; 148 u64 mac_flt1; 149 u64 mac_flt0; 150 u64 incl_srcpt1; 151 u64 incl_srcpt0; 152 u64 send_meta1; 153 u64 send_meta0; 154 u64 casc_port; 155 u64 host_port; 156 u64 mirr_port; 157 u64 vlmarker; 158 u64 vlmask; 159 u64 tpid; 160 u64 ignore2stf; 161 u64 tpid2; 162 /* P/Q/R/S only */ 163 u64 queue_ts; 164 u64 egrmirrvid; 165 u64 egrmirrpcp; 166 u64 egrmirrdei; 167 u64 replay_port; 168 }; 169 170 struct sja1105_schedule_entry_points_entry { 171 u64 subschindx; 172 u64 delta; 173 u64 address; 174 }; 175 176 struct sja1105_schedule_entry_points_params_entry { 177 u64 clksrc; 178 u64 actsubsch; 179 }; 180 181 struct sja1105_vlan_lookup_entry { 182 u64 ving_mirr; 183 u64 vegr_mirr; 184 u64 vmemb_port; 185 u64 vlan_bc; 186 u64 tag_port; 187 u64 vlanid; 188 }; 189 190 struct sja1105_l2_lookup_entry { 191 u64 vlanid; 192 u64 macaddr; 193 u64 destports; 194 u64 enfport; 195 u64 index; 196 /* P/Q/R/S only */ 197 u64 mask_iotag; 198 u64 mask_vlanid; 199 u64 mask_macaddr; 200 u64 iotag; 201 u64 lockeds; 202 union { 203 /* LOCKEDS=1: Static FDB entries */ 204 struct { 205 u64 tsreg; 206 u64 mirrvlan; 207 u64 takets; 208 u64 mirr; 209 u64 retag; 210 }; 211 /* LOCKEDS=0: Dynamically learned FDB entries */ 212 struct { 213 u64 touched; 214 u64 age; 215 }; 216 }; 217 }; 218 219 struct sja1105_l2_lookup_params_entry { 220 u64 maxaddrp[5]; /* P/Q/R/S only */ 221 u64 start_dynspc; /* P/Q/R/S only */ 222 u64 drpnolearn; /* P/Q/R/S only */ 223 u64 use_static; /* P/Q/R/S only */ 224 u64 owr_dyn; /* P/Q/R/S only */ 225 u64 learn_once; /* P/Q/R/S only */ 226 u64 maxage; /* Shared */ 227 u64 dyn_tbsz; /* E/T only */ 228 u64 poly; /* E/T only */ 229 u64 shared_learn; /* Shared */ 230 u64 no_enf_hostprt; /* Shared */ 231 u64 no_mgmt_learn; /* Shared */ 232 }; 233 234 struct sja1105_l2_forwarding_entry { 235 u64 bc_domain; 236 u64 reach_port; 237 u64 fl_domain; 238 u64 vlan_pmap[8]; 239 }; 240 241 struct sja1105_l2_forwarding_params_entry { 242 u64 max_dynp; 243 u64 part_spc[8]; 244 }; 245 246 struct sja1105_l2_policing_entry { 247 u64 sharindx; 248 u64 smax; 249 u64 rate; 250 u64 maxlen; 251 u64 partition; 252 }; 253 254 struct sja1105_avb_params_entry { 255 u64 cas_master; 256 u64 destmeta; 257 u64 srcmeta; 258 }; 259 260 struct sja1105_mac_config_entry { 261 u64 top[8]; 262 u64 base[8]; 263 u64 enabled[8]; 264 u64 ifg; 265 u64 speed; 266 u64 tp_delin; 267 u64 tp_delout; 268 u64 maxage; 269 u64 vlanprio; 270 u64 vlanid; 271 u64 ing_mirr; 272 u64 egr_mirr; 273 u64 drpnona664; 274 u64 drpdtag; 275 u64 drpuntag; 276 u64 retag; 277 u64 dyn_learn; 278 u64 egress; 279 u64 ingress; 280 }; 281 282 struct sja1105_retagging_entry { 283 u64 egr_port; 284 u64 ing_port; 285 u64 vlan_ing; 286 u64 vlan_egr; 287 u64 do_not_learn; 288 u64 use_dest_ports; 289 u64 destports; 290 }; 291 292 struct sja1105_xmii_params_entry { 293 u64 phy_mac[5]; 294 u64 xmii_mode[5]; 295 }; 296 297 enum { 298 SJA1105_VL_FORMAT_PSFP = 0, 299 SJA1105_VL_FORMAT_ARINC664 = 1, 300 }; 301 302 struct sja1105_vl_lookup_entry { 303 u64 format; 304 u64 port; 305 union { 306 /* SJA1105_VL_FORMAT_PSFP */ 307 struct { 308 u64 destports; 309 u64 iscritical; 310 u64 macaddr; 311 u64 vlanid; 312 u64 vlanprior; 313 }; 314 /* SJA1105_VL_FORMAT_ARINC664 */ 315 struct { 316 u64 egrmirr; 317 u64 ingrmirr; 318 u64 vlid; 319 }; 320 }; 321 /* Not part of hardware structure */ 322 unsigned long flow_cookie; 323 }; 324 325 struct sja1105_vl_policing_entry { 326 u64 type; 327 u64 maxlen; 328 u64 sharindx; 329 u64 bag; 330 u64 jitter; 331 }; 332 333 struct sja1105_vl_forwarding_entry { 334 u64 type; 335 u64 priority; 336 u64 partition; 337 u64 destports; 338 }; 339 340 struct sja1105_vl_forwarding_params_entry { 341 u64 partspc[8]; 342 u64 debugen; 343 }; 344 345 struct sja1105_table_header { 346 u64 block_id; 347 u64 len; 348 u64 crc; 349 }; 350 351 struct sja1105_table_ops { 352 size_t (*packing)(void *buf, void *entry_ptr, enum packing_op op); 353 size_t unpacked_entry_size; 354 size_t packed_entry_size; 355 size_t max_entry_count; 356 }; 357 358 struct sja1105_table { 359 const struct sja1105_table_ops *ops; 360 size_t entry_count; 361 void *entries; 362 }; 363 364 struct sja1105_static_config { 365 u64 device_id; 366 struct sja1105_table tables[BLK_IDX_MAX]; 367 }; 368 369 extern struct sja1105_table_ops sja1105e_table_ops[BLK_IDX_MAX]; 370 extern struct sja1105_table_ops sja1105t_table_ops[BLK_IDX_MAX]; 371 extern struct sja1105_table_ops sja1105p_table_ops[BLK_IDX_MAX]; 372 extern struct sja1105_table_ops sja1105q_table_ops[BLK_IDX_MAX]; 373 extern struct sja1105_table_ops sja1105r_table_ops[BLK_IDX_MAX]; 374 extern struct sja1105_table_ops sja1105s_table_ops[BLK_IDX_MAX]; 375 376 size_t sja1105_table_header_packing(void *buf, void *hdr, enum packing_op op); 377 void 378 sja1105_table_header_pack_with_crc(void *buf, struct sja1105_table_header *hdr); 379 size_t 380 sja1105_static_config_get_length(const struct sja1105_static_config *config); 381 382 typedef enum { 383 SJA1105_CONFIG_OK = 0, 384 SJA1105_TTETHERNET_NOT_SUPPORTED, 385 SJA1105_INCORRECT_TTETHERNET_CONFIGURATION, 386 SJA1105_INCORRECT_VIRTUAL_LINK_CONFIGURATION, 387 SJA1105_MISSING_L2_POLICING_TABLE, 388 SJA1105_MISSING_L2_FORWARDING_TABLE, 389 SJA1105_MISSING_L2_FORWARDING_PARAMS_TABLE, 390 SJA1105_MISSING_GENERAL_PARAMS_TABLE, 391 SJA1105_MISSING_VLAN_TABLE, 392 SJA1105_MISSING_XMII_TABLE, 393 SJA1105_MISSING_MAC_TABLE, 394 SJA1105_OVERCOMMITTED_FRAME_MEMORY, 395 } sja1105_config_valid_t; 396 397 extern const char *sja1105_static_config_error_msg[]; 398 399 sja1105_config_valid_t 400 sja1105_static_config_check_valid(const struct sja1105_static_config *config); 401 void 402 sja1105_static_config_pack(void *buf, struct sja1105_static_config *config); 403 int sja1105_static_config_init(struct sja1105_static_config *config, 404 const struct sja1105_table_ops *static_ops, 405 u64 device_id); 406 void sja1105_static_config_free(struct sja1105_static_config *config); 407 408 int sja1105_table_delete_entry(struct sja1105_table *table, int i); 409 int sja1105_table_resize(struct sja1105_table *table, size_t new_count); 410 411 u32 sja1105_crc32(const void *buf, size_t len); 412 413 void sja1105_pack(void *buf, const u64 *val, int start, int end, size_t len); 414 void sja1105_unpack(const void *buf, u64 *val, int start, int end, size_t len); 415 void sja1105_packing(void *buf, u64 *val, int start, int end, 416 size_t len, enum packing_op op); 417 418 #endif 419