1 // SPDX-License-Identifier: GPL-2.0 2 /* Copyright (c) 2019, Vladimir Oltean <olteanv@gmail.com> 3 */ 4 #include "sja1105.h" 5 6 /* The adjfine API clamps ppb between [-32,768,000, 32,768,000], and 7 * therefore scaled_ppm between [-2,147,483,648, 2,147,483,647]. 8 * Set the maximum supported ppb to a round value smaller than the maximum. 9 * 10 * Percentually speaking, this is a +/- 0.032x adjustment of the 11 * free-running counter (0.968x to 1.032x). 12 */ 13 #define SJA1105_MAX_ADJ_PPB 32000000 14 #define SJA1105_SIZE_PTP_CMD 4 15 16 /* Timestamps are in units of 8 ns clock ticks (equivalent to a fixed 17 * 125 MHz clock) so the scale factor (MULT / SHIFT) needs to be 8. 18 * Furthermore, wisely pick SHIFT as 28 bits, which translates 19 * MULT into 2^31 (0x80000000). This is the same value around which 20 * the hardware PTPCLKRATE is centered, so the same ppb conversion 21 * arithmetic can be reused. 22 */ 23 #define SJA1105_CC_SHIFT 28 24 #define SJA1105_CC_MULT (8 << SJA1105_CC_SHIFT) 25 26 /* Having 33 bits of cycle counter left until a 64-bit overflow during delta 27 * conversion, we multiply this by the 8 ns counter resolution and arrive at 28 * a comfortable 68.71 second refresh interval until the delta would cause 29 * an integer overflow, in absence of any other readout. 30 * Approximate to 1 minute. 31 */ 32 #define SJA1105_REFRESH_INTERVAL (HZ * 60) 33 34 /* This range is actually +/- SJA1105_MAX_ADJ_PPB 35 * divided by 1000 (ppb -> ppm) and with a 16-bit 36 * "fractional" part (actually fixed point). 37 * | 38 * v 39 * Convert scaled_ppm from the +/- ((10^6) << 16) range 40 * into the +/- (1 << 31) range. 41 * 42 * This forgoes a "ppb" numeric representation (up to NSEC_PER_SEC) 43 * and defines the scaling factor between scaled_ppm and the actual 44 * frequency adjustments (both cycle counter and hardware). 45 * 46 * ptpclkrate = scaled_ppm * 2^31 / (10^6 * 2^16) 47 * simplifies to 48 * ptpclkrate = scaled_ppm * 2^9 / 5^6 49 */ 50 #define SJA1105_CC_MULT_NUM (1 << 9) 51 #define SJA1105_CC_MULT_DEM 15625 52 53 #define ptp_to_sja1105(d) container_of((d), struct sja1105_private, ptp_caps) 54 #define cc_to_sja1105(d) container_of((d), struct sja1105_private, tstamp_cc) 55 #define dw_to_sja1105(d) container_of((d), struct sja1105_private, refresh_work) 56 57 struct sja1105_ptp_cmd { 58 u64 resptp; /* reset */ 59 }; 60 61 int sja1105_get_ts_info(struct dsa_switch *ds, int port, 62 struct ethtool_ts_info *info) 63 { 64 struct sja1105_private *priv = ds->priv; 65 66 /* Called during cleanup */ 67 if (!priv->clock) 68 return -ENODEV; 69 70 info->so_timestamping = SOF_TIMESTAMPING_TX_HARDWARE | 71 SOF_TIMESTAMPING_RX_HARDWARE | 72 SOF_TIMESTAMPING_RAW_HARDWARE; 73 info->tx_types = (1 << HWTSTAMP_TX_OFF) | 74 (1 << HWTSTAMP_TX_ON); 75 info->rx_filters = (1 << HWTSTAMP_FILTER_NONE) | 76 (1 << HWTSTAMP_FILTER_PTP_V2_L2_EVENT); 77 info->phc_index = ptp_clock_index(priv->clock); 78 return 0; 79 } 80 EXPORT_SYMBOL_GPL(sja1105_get_ts_info); 81 82 int sja1105et_ptp_cmd(const void *ctx, const void *data) 83 { 84 const struct sja1105_ptp_cmd *cmd = data; 85 const struct sja1105_private *priv = ctx; 86 const struct sja1105_regs *regs = priv->info->regs; 87 const int size = SJA1105_SIZE_PTP_CMD; 88 u8 buf[SJA1105_SIZE_PTP_CMD] = {0}; 89 /* No need to keep this as part of the structure */ 90 u64 valid = 1; 91 92 sja1105_pack(buf, &valid, 31, 31, size); 93 sja1105_pack(buf, &cmd->resptp, 2, 2, size); 94 95 return sja1105_spi_send_packed_buf(priv, SPI_WRITE, regs->ptp_control, 96 buf, SJA1105_SIZE_PTP_CMD); 97 } 98 EXPORT_SYMBOL_GPL(sja1105et_ptp_cmd); 99 100 int sja1105pqrs_ptp_cmd(const void *ctx, const void *data) 101 { 102 const struct sja1105_ptp_cmd *cmd = data; 103 const struct sja1105_private *priv = ctx; 104 const struct sja1105_regs *regs = priv->info->regs; 105 const int size = SJA1105_SIZE_PTP_CMD; 106 u8 buf[SJA1105_SIZE_PTP_CMD] = {0}; 107 /* No need to keep this as part of the structure */ 108 u64 valid = 1; 109 110 sja1105_pack(buf, &valid, 31, 31, size); 111 sja1105_pack(buf, &cmd->resptp, 3, 3, size); 112 113 return sja1105_spi_send_packed_buf(priv, SPI_WRITE, regs->ptp_control, 114 buf, SJA1105_SIZE_PTP_CMD); 115 } 116 EXPORT_SYMBOL_GPL(sja1105pqrs_ptp_cmd); 117 118 /* The switch returns partial timestamps (24 bits for SJA1105 E/T, which wrap 119 * around in 0.135 seconds, and 32 bits for P/Q/R/S, wrapping around in 34.35 120 * seconds). 121 * 122 * This receives the RX or TX MAC timestamps, provided by hardware as 123 * the lower bits of the cycle counter, sampled at the time the timestamp was 124 * collected. 125 * 126 * To reconstruct into a full 64-bit-wide timestamp, the cycle counter is 127 * read and the high-order bits are filled in. 128 * 129 * Must be called within one wraparound period of the partial timestamp since 130 * it was generated by the MAC. 131 */ 132 u64 sja1105_tstamp_reconstruct(struct sja1105_private *priv, u64 now, 133 u64 ts_partial) 134 { 135 u64 partial_tstamp_mask = CYCLECOUNTER_MASK(priv->info->ptp_ts_bits); 136 u64 ts_reconstructed; 137 138 ts_reconstructed = (now & ~partial_tstamp_mask) | ts_partial; 139 140 /* Check lower bits of current cycle counter against the timestamp. 141 * If the current cycle counter is lower than the partial timestamp, 142 * then wraparound surely occurred and must be accounted for. 143 */ 144 if ((now & partial_tstamp_mask) <= ts_partial) 145 ts_reconstructed -= (partial_tstamp_mask + 1); 146 147 return ts_reconstructed; 148 } 149 EXPORT_SYMBOL_GPL(sja1105_tstamp_reconstruct); 150 151 /* Reads the SPI interface for an egress timestamp generated by the switch 152 * for frames sent using management routes. 153 * 154 * SJA1105 E/T layout of the 4-byte SPI payload: 155 * 156 * 31 23 15 7 0 157 * | | | | | 158 * +-----+-----+-----+ ^ 159 * ^ | 160 * | | 161 * 24-bit timestamp Update bit 162 * 163 * 164 * SJA1105 P/Q/R/S layout of the 8-byte SPI payload: 165 * 166 * 31 23 15 7 0 63 55 47 39 32 167 * | | | | | | | | | | 168 * ^ +-----+-----+-----+-----+ 169 * | ^ 170 * | | 171 * Update bit 32-bit timestamp 172 * 173 * Notice that the update bit is in the same place. 174 * To have common code for E/T and P/Q/R/S for reading the timestamp, 175 * we need to juggle with the offset and the bit indices. 176 */ 177 int sja1105_ptpegr_ts_poll(struct sja1105_private *priv, int port, u64 *ts) 178 { 179 const struct sja1105_regs *regs = priv->info->regs; 180 int tstamp_bit_start, tstamp_bit_end; 181 int timeout = 10; 182 u8 packed_buf[8]; 183 u64 update; 184 int rc; 185 186 do { 187 rc = sja1105_spi_send_packed_buf(priv, SPI_READ, 188 regs->ptpegr_ts[port], 189 packed_buf, 190 priv->info->ptpegr_ts_bytes); 191 if (rc < 0) 192 return rc; 193 194 sja1105_unpack(packed_buf, &update, 0, 0, 195 priv->info->ptpegr_ts_bytes); 196 if (update) 197 break; 198 199 usleep_range(10, 50); 200 } while (--timeout); 201 202 if (!timeout) 203 return -ETIMEDOUT; 204 205 /* Point the end bit to the second 32-bit word on P/Q/R/S, 206 * no-op on E/T. 207 */ 208 tstamp_bit_end = (priv->info->ptpegr_ts_bytes - 4) * 8; 209 /* Shift the 24-bit timestamp on E/T to be collected from 31:8. 210 * No-op on P/Q/R/S. 211 */ 212 tstamp_bit_end += 32 - priv->info->ptp_ts_bits; 213 tstamp_bit_start = tstamp_bit_end + priv->info->ptp_ts_bits - 1; 214 215 *ts = 0; 216 217 sja1105_unpack(packed_buf, ts, tstamp_bit_start, tstamp_bit_end, 218 priv->info->ptpegr_ts_bytes); 219 220 return 0; 221 } 222 EXPORT_SYMBOL_GPL(sja1105_ptpegr_ts_poll); 223 224 int sja1105_ptp_reset(struct sja1105_private *priv) 225 { 226 struct dsa_switch *ds = priv->ds; 227 struct sja1105_ptp_cmd cmd = {0}; 228 int rc; 229 230 mutex_lock(&priv->ptp_lock); 231 232 cmd.resptp = 1; 233 dev_dbg(ds->dev, "Resetting PTP clock\n"); 234 rc = priv->info->ptp_cmd(priv, &cmd); 235 236 timecounter_init(&priv->tstamp_tc, &priv->tstamp_cc, 237 ktime_to_ns(ktime_get_real())); 238 239 mutex_unlock(&priv->ptp_lock); 240 241 return rc; 242 } 243 EXPORT_SYMBOL_GPL(sja1105_ptp_reset); 244 245 static int sja1105_ptp_gettime(struct ptp_clock_info *ptp, 246 struct timespec64 *ts) 247 { 248 struct sja1105_private *priv = ptp_to_sja1105(ptp); 249 u64 ns; 250 251 mutex_lock(&priv->ptp_lock); 252 ns = timecounter_read(&priv->tstamp_tc); 253 mutex_unlock(&priv->ptp_lock); 254 255 *ts = ns_to_timespec64(ns); 256 257 return 0; 258 } 259 260 static int sja1105_ptp_settime(struct ptp_clock_info *ptp, 261 const struct timespec64 *ts) 262 { 263 struct sja1105_private *priv = ptp_to_sja1105(ptp); 264 u64 ns = timespec64_to_ns(ts); 265 266 mutex_lock(&priv->ptp_lock); 267 timecounter_init(&priv->tstamp_tc, &priv->tstamp_cc, ns); 268 mutex_unlock(&priv->ptp_lock); 269 270 return 0; 271 } 272 273 static int sja1105_ptp_adjfine(struct ptp_clock_info *ptp, long scaled_ppm) 274 { 275 struct sja1105_private *priv = ptp_to_sja1105(ptp); 276 s64 clkrate; 277 278 clkrate = (s64)scaled_ppm * SJA1105_CC_MULT_NUM; 279 clkrate = div_s64(clkrate, SJA1105_CC_MULT_DEM); 280 281 mutex_lock(&priv->ptp_lock); 282 283 /* Force a readout to update the timer *before* changing its frequency. 284 * 285 * This way, its corrected time curve can at all times be modeled 286 * as a linear "A * x + B" function, where: 287 * 288 * - B are past frequency adjustments and offset shifts, all 289 * accumulated into the cycle_last variable. 290 * 291 * - A is the new frequency adjustments we're just about to set. 292 * 293 * Reading now makes B accumulate the correct amount of time, 294 * corrected at the old rate, before changing it. 295 * 296 * Hardware timestamps then become simple points on the curve and 297 * are approximated using the above function. This is still better 298 * than letting the switch take the timestamps using the hardware 299 * rate-corrected clock (PTPCLKVAL) - the comparison in this case would 300 * be that we're shifting the ruler at the same time as we're taking 301 * measurements with it. 302 * 303 * The disadvantage is that it's possible to receive timestamps when 304 * a frequency adjustment took place in the near past. 305 * In this case they will be approximated using the new ppb value 306 * instead of a compound function made of two segments (one at the old 307 * and the other at the new rate) - introducing some inaccuracy. 308 */ 309 timecounter_read(&priv->tstamp_tc); 310 311 priv->tstamp_cc.mult = SJA1105_CC_MULT + clkrate; 312 313 mutex_unlock(&priv->ptp_lock); 314 315 return 0; 316 } 317 318 static int sja1105_ptp_adjtime(struct ptp_clock_info *ptp, s64 delta) 319 { 320 struct sja1105_private *priv = ptp_to_sja1105(ptp); 321 322 mutex_lock(&priv->ptp_lock); 323 timecounter_adjtime(&priv->tstamp_tc, delta); 324 mutex_unlock(&priv->ptp_lock); 325 326 return 0; 327 } 328 329 static u64 sja1105_ptptsclk_read(const struct cyclecounter *cc) 330 { 331 struct sja1105_private *priv = cc_to_sja1105(cc); 332 const struct sja1105_regs *regs = priv->info->regs; 333 u64 ptptsclk = 0; 334 int rc; 335 336 rc = sja1105_spi_send_int(priv, SPI_READ, regs->ptptsclk, 337 &ptptsclk, 8); 338 if (rc < 0) 339 dev_err_ratelimited(priv->ds->dev, 340 "failed to read ptp cycle counter: %d\n", 341 rc); 342 return ptptsclk; 343 } 344 345 static void sja1105_ptp_overflow_check(struct work_struct *work) 346 { 347 struct delayed_work *dw = to_delayed_work(work); 348 struct sja1105_private *priv = dw_to_sja1105(dw); 349 struct timespec64 ts; 350 351 sja1105_ptp_gettime(&priv->ptp_caps, &ts); 352 353 schedule_delayed_work(&priv->refresh_work, SJA1105_REFRESH_INTERVAL); 354 } 355 356 static const struct ptp_clock_info sja1105_ptp_caps = { 357 .owner = THIS_MODULE, 358 .name = "SJA1105 PHC", 359 .adjfine = sja1105_ptp_adjfine, 360 .adjtime = sja1105_ptp_adjtime, 361 .gettime64 = sja1105_ptp_gettime, 362 .settime64 = sja1105_ptp_settime, 363 .max_adj = SJA1105_MAX_ADJ_PPB, 364 }; 365 366 int sja1105_ptp_clock_register(struct sja1105_private *priv) 367 { 368 struct dsa_switch *ds = priv->ds; 369 370 /* Set up the cycle counter */ 371 priv->tstamp_cc = (struct cyclecounter) { 372 .read = sja1105_ptptsclk_read, 373 .mask = CYCLECOUNTER_MASK(64), 374 .shift = SJA1105_CC_SHIFT, 375 .mult = SJA1105_CC_MULT, 376 }; 377 mutex_init(&priv->ptp_lock); 378 INIT_DELAYED_WORK(&priv->refresh_work, sja1105_ptp_overflow_check); 379 380 schedule_delayed_work(&priv->refresh_work, SJA1105_REFRESH_INTERVAL); 381 382 priv->ptp_caps = sja1105_ptp_caps; 383 384 priv->clock = ptp_clock_register(&priv->ptp_caps, ds->dev); 385 if (IS_ERR_OR_NULL(priv->clock)) 386 return PTR_ERR(priv->clock); 387 388 return sja1105_ptp_reset(priv); 389 } 390 EXPORT_SYMBOL_GPL(sja1105_ptp_clock_register); 391 392 void sja1105_ptp_clock_unregister(struct sja1105_private *priv) 393 { 394 if (IS_ERR_OR_NULL(priv->clock)) 395 return; 396 397 ptp_clock_unregister(priv->clock); 398 priv->clock = NULL; 399 } 400 EXPORT_SYMBOL_GPL(sja1105_ptp_clock_unregister); 401 402 MODULE_AUTHOR("Vladimir Oltean <olteanv@gmail.com>"); 403 MODULE_DESCRIPTION("SJA1105 PHC Driver"); 404 MODULE_LICENSE("GPL v2"); 405