1 // SPDX-License-Identifier: GPL-2.0 2 /* Copyright 2019 NXP Semiconductors 3 */ 4 #include <uapi/linux/if_bridge.h> 5 #include <soc/mscc/ocelot_vcap.h> 6 #include <soc/mscc/ocelot_qsys.h> 7 #include <soc/mscc/ocelot_sys.h> 8 #include <soc/mscc/ocelot_dev.h> 9 #include <soc/mscc/ocelot_ana.h> 10 #include <soc/mscc/ocelot.h> 11 #include <linux/packing.h> 12 #include <linux/module.h> 13 #include <linux/of_net.h> 14 #include <linux/pci.h> 15 #include <linux/of.h> 16 #include <net/pkt_sched.h> 17 #include <net/dsa.h> 18 #include "felix.h" 19 20 static enum dsa_tag_protocol felix_get_tag_protocol(struct dsa_switch *ds, 21 int port, 22 enum dsa_tag_protocol mp) 23 { 24 return DSA_TAG_PROTO_OCELOT; 25 } 26 27 static int felix_set_ageing_time(struct dsa_switch *ds, 28 unsigned int ageing_time) 29 { 30 struct ocelot *ocelot = ds->priv; 31 32 ocelot_set_ageing_time(ocelot, ageing_time); 33 34 return 0; 35 } 36 37 static int felix_fdb_dump(struct dsa_switch *ds, int port, 38 dsa_fdb_dump_cb_t *cb, void *data) 39 { 40 struct ocelot *ocelot = ds->priv; 41 42 return ocelot_fdb_dump(ocelot, port, cb, data); 43 } 44 45 static int felix_fdb_add(struct dsa_switch *ds, int port, 46 const unsigned char *addr, u16 vid) 47 { 48 struct ocelot *ocelot = ds->priv; 49 50 return ocelot_fdb_add(ocelot, port, addr, vid); 51 } 52 53 static int felix_fdb_del(struct dsa_switch *ds, int port, 54 const unsigned char *addr, u16 vid) 55 { 56 struct ocelot *ocelot = ds->priv; 57 58 return ocelot_fdb_del(ocelot, port, addr, vid); 59 } 60 61 static void felix_bridge_stp_state_set(struct dsa_switch *ds, int port, 62 u8 state) 63 { 64 struct ocelot *ocelot = ds->priv; 65 66 return ocelot_bridge_stp_state_set(ocelot, port, state); 67 } 68 69 static int felix_bridge_join(struct dsa_switch *ds, int port, 70 struct net_device *br) 71 { 72 struct ocelot *ocelot = ds->priv; 73 74 return ocelot_port_bridge_join(ocelot, port, br); 75 } 76 77 static void felix_bridge_leave(struct dsa_switch *ds, int port, 78 struct net_device *br) 79 { 80 struct ocelot *ocelot = ds->priv; 81 82 ocelot_port_bridge_leave(ocelot, port, br); 83 } 84 85 /* This callback needs to be present */ 86 static int felix_vlan_prepare(struct dsa_switch *ds, int port, 87 const struct switchdev_obj_port_vlan *vlan) 88 { 89 return 0; 90 } 91 92 static int felix_vlan_filtering(struct dsa_switch *ds, int port, bool enabled) 93 { 94 struct ocelot *ocelot = ds->priv; 95 96 ocelot_port_vlan_filtering(ocelot, port, enabled); 97 98 return 0; 99 } 100 101 static void felix_vlan_add(struct dsa_switch *ds, int port, 102 const struct switchdev_obj_port_vlan *vlan) 103 { 104 struct ocelot *ocelot = ds->priv; 105 u16 flags = vlan->flags; 106 u16 vid; 107 int err; 108 109 if (dsa_is_cpu_port(ds, port)) 110 flags &= ~BRIDGE_VLAN_INFO_UNTAGGED; 111 112 for (vid = vlan->vid_begin; vid <= vlan->vid_end; vid++) { 113 err = ocelot_vlan_add(ocelot, port, vid, 114 flags & BRIDGE_VLAN_INFO_PVID, 115 flags & BRIDGE_VLAN_INFO_UNTAGGED); 116 if (err) { 117 dev_err(ds->dev, "Failed to add VLAN %d to port %d: %d\n", 118 vid, port, err); 119 return; 120 } 121 } 122 } 123 124 static int felix_vlan_del(struct dsa_switch *ds, int port, 125 const struct switchdev_obj_port_vlan *vlan) 126 { 127 struct ocelot *ocelot = ds->priv; 128 u16 vid; 129 int err; 130 131 for (vid = vlan->vid_begin; vid <= vlan->vid_end; vid++) { 132 err = ocelot_vlan_del(ocelot, port, vid); 133 if (err) { 134 dev_err(ds->dev, "Failed to remove VLAN %d from port %d: %d\n", 135 vid, port, err); 136 return err; 137 } 138 } 139 return 0; 140 } 141 142 static int felix_port_enable(struct dsa_switch *ds, int port, 143 struct phy_device *phy) 144 { 145 struct ocelot *ocelot = ds->priv; 146 147 ocelot_port_enable(ocelot, port, phy); 148 149 return 0; 150 } 151 152 static void felix_port_disable(struct dsa_switch *ds, int port) 153 { 154 struct ocelot *ocelot = ds->priv; 155 156 return ocelot_port_disable(ocelot, port); 157 } 158 159 static void felix_phylink_validate(struct dsa_switch *ds, int port, 160 unsigned long *supported, 161 struct phylink_link_state *state) 162 { 163 struct ocelot *ocelot = ds->priv; 164 struct ocelot_port *ocelot_port = ocelot->ports[port]; 165 __ETHTOOL_DECLARE_LINK_MODE_MASK(mask) = { 0, }; 166 167 if (state->interface != PHY_INTERFACE_MODE_NA && 168 state->interface != ocelot_port->phy_mode) { 169 bitmap_zero(supported, __ETHTOOL_LINK_MODE_MASK_NBITS); 170 return; 171 } 172 173 /* No half-duplex. */ 174 phylink_set_port_modes(mask); 175 phylink_set(mask, Autoneg); 176 phylink_set(mask, Pause); 177 phylink_set(mask, Asym_Pause); 178 phylink_set(mask, 10baseT_Full); 179 phylink_set(mask, 100baseT_Full); 180 phylink_set(mask, 1000baseT_Full); 181 182 if (state->interface == PHY_INTERFACE_MODE_INTERNAL || 183 state->interface == PHY_INTERFACE_MODE_2500BASEX || 184 state->interface == PHY_INTERFACE_MODE_USXGMII) { 185 phylink_set(mask, 2500baseT_Full); 186 phylink_set(mask, 2500baseX_Full); 187 } 188 189 bitmap_and(supported, supported, mask, 190 __ETHTOOL_LINK_MODE_MASK_NBITS); 191 bitmap_and(state->advertising, state->advertising, mask, 192 __ETHTOOL_LINK_MODE_MASK_NBITS); 193 } 194 195 static int felix_phylink_mac_pcs_get_state(struct dsa_switch *ds, int port, 196 struct phylink_link_state *state) 197 { 198 struct ocelot *ocelot = ds->priv; 199 struct felix *felix = ocelot_to_felix(ocelot); 200 201 if (felix->info->pcs_link_state) 202 felix->info->pcs_link_state(ocelot, port, state); 203 204 return 0; 205 } 206 207 static void felix_phylink_mac_config(struct dsa_switch *ds, int port, 208 unsigned int link_an_mode, 209 const struct phylink_link_state *state) 210 { 211 struct ocelot *ocelot = ds->priv; 212 struct ocelot_port *ocelot_port = ocelot->ports[port]; 213 struct felix *felix = ocelot_to_felix(ocelot); 214 u32 mac_fc_cfg; 215 216 /* Take port out of reset by clearing the MAC_TX_RST, MAC_RX_RST and 217 * PORT_RST bits in CLOCK_CFG 218 */ 219 ocelot_port_writel(ocelot_port, DEV_CLOCK_CFG_LINK_SPEED(state->speed), 220 DEV_CLOCK_CFG); 221 222 /* Flow control. Link speed is only used here to evaluate the time 223 * specification in incoming pause frames. 224 */ 225 mac_fc_cfg = SYS_MAC_FC_CFG_FC_LINK_SPEED(state->speed); 226 227 /* handle Rx pause in all cases, with 2500base-X this is used for rate 228 * adaptation. 229 */ 230 mac_fc_cfg |= SYS_MAC_FC_CFG_RX_FC_ENA; 231 232 if (state->pause & MLO_PAUSE_TX) 233 mac_fc_cfg |= SYS_MAC_FC_CFG_TX_FC_ENA | 234 SYS_MAC_FC_CFG_PAUSE_VAL_CFG(0xffff) | 235 SYS_MAC_FC_CFG_FC_LATENCY_CFG(0x7) | 236 SYS_MAC_FC_CFG_ZERO_PAUSE_ENA; 237 ocelot_write_rix(ocelot, mac_fc_cfg, SYS_MAC_FC_CFG, port); 238 239 ocelot_write_rix(ocelot, 0, ANA_POL_FLOWC, port); 240 241 if (felix->info->pcs_init) 242 felix->info->pcs_init(ocelot, port, link_an_mode, state); 243 } 244 245 static void felix_phylink_mac_an_restart(struct dsa_switch *ds, int port) 246 { 247 struct ocelot *ocelot = ds->priv; 248 struct felix *felix = ocelot_to_felix(ocelot); 249 250 if (felix->info->pcs_an_restart) 251 felix->info->pcs_an_restart(ocelot, port); 252 } 253 254 static void felix_phylink_mac_link_down(struct dsa_switch *ds, int port, 255 unsigned int link_an_mode, 256 phy_interface_t interface) 257 { 258 struct ocelot *ocelot = ds->priv; 259 struct ocelot_port *ocelot_port = ocelot->ports[port]; 260 261 ocelot_port_writel(ocelot_port, 0, DEV_MAC_ENA_CFG); 262 ocelot_rmw_rix(ocelot, 0, QSYS_SWITCH_PORT_MODE_PORT_ENA, 263 QSYS_SWITCH_PORT_MODE, port); 264 } 265 266 static void felix_phylink_mac_link_up(struct dsa_switch *ds, int port, 267 unsigned int link_an_mode, 268 phy_interface_t interface, 269 struct phy_device *phydev, 270 int speed, int duplex, 271 bool tx_pause, bool rx_pause) 272 { 273 struct ocelot *ocelot = ds->priv; 274 struct ocelot_port *ocelot_port = ocelot->ports[port]; 275 276 /* Enable MAC module */ 277 ocelot_port_writel(ocelot_port, DEV_MAC_ENA_CFG_RX_ENA | 278 DEV_MAC_ENA_CFG_TX_ENA, DEV_MAC_ENA_CFG); 279 280 /* Enable receiving frames on the port, and activate auto-learning of 281 * MAC addresses. 282 */ 283 ocelot_write_gix(ocelot, ANA_PORT_PORT_CFG_LEARNAUTO | 284 ANA_PORT_PORT_CFG_RECV_ENA | 285 ANA_PORT_PORT_CFG_PORTID_VAL(port), 286 ANA_PORT_PORT_CFG, port); 287 288 /* Core: Enable port for frame transfer */ 289 ocelot_write_rix(ocelot, QSYS_SWITCH_PORT_MODE_INGRESS_DROP_MODE | 290 QSYS_SWITCH_PORT_MODE_SCH_NEXT_CFG(1) | 291 QSYS_SWITCH_PORT_MODE_PORT_ENA, 292 QSYS_SWITCH_PORT_MODE, port); 293 } 294 295 static void felix_get_strings(struct dsa_switch *ds, int port, 296 u32 stringset, u8 *data) 297 { 298 struct ocelot *ocelot = ds->priv; 299 300 return ocelot_get_strings(ocelot, port, stringset, data); 301 } 302 303 static void felix_get_ethtool_stats(struct dsa_switch *ds, int port, u64 *data) 304 { 305 struct ocelot *ocelot = ds->priv; 306 307 ocelot_get_ethtool_stats(ocelot, port, data); 308 } 309 310 static int felix_get_sset_count(struct dsa_switch *ds, int port, int sset) 311 { 312 struct ocelot *ocelot = ds->priv; 313 314 return ocelot_get_sset_count(ocelot, port, sset); 315 } 316 317 static int felix_get_ts_info(struct dsa_switch *ds, int port, 318 struct ethtool_ts_info *info) 319 { 320 struct ocelot *ocelot = ds->priv; 321 322 return ocelot_get_ts_info(ocelot, port, info); 323 } 324 325 static int felix_parse_ports_node(struct felix *felix, 326 struct device_node *ports_node, 327 phy_interface_t *port_phy_modes) 328 { 329 struct ocelot *ocelot = &felix->ocelot; 330 struct device *dev = felix->ocelot.dev; 331 struct device_node *child; 332 333 for_each_available_child_of_node(ports_node, child) { 334 phy_interface_t phy_mode; 335 u32 port; 336 int err; 337 338 /* Get switch port number from DT */ 339 if (of_property_read_u32(child, "reg", &port) < 0) { 340 dev_err(dev, "Port number not defined in device tree " 341 "(property \"reg\")\n"); 342 of_node_put(child); 343 return -ENODEV; 344 } 345 346 /* Get PHY mode from DT */ 347 err = of_get_phy_mode(child, &phy_mode); 348 if (err) { 349 dev_err(dev, "Failed to read phy-mode or " 350 "phy-interface-type property for port %d\n", 351 port); 352 of_node_put(child); 353 return -ENODEV; 354 } 355 356 err = felix->info->prevalidate_phy_mode(ocelot, port, phy_mode); 357 if (err < 0) { 358 dev_err(dev, "Unsupported PHY mode %s on port %d\n", 359 phy_modes(phy_mode), port); 360 return err; 361 } 362 363 port_phy_modes[port] = phy_mode; 364 } 365 366 return 0; 367 } 368 369 static int felix_parse_dt(struct felix *felix, phy_interface_t *port_phy_modes) 370 { 371 struct device *dev = felix->ocelot.dev; 372 struct device_node *switch_node; 373 struct device_node *ports_node; 374 int err; 375 376 switch_node = dev->of_node; 377 378 ports_node = of_get_child_by_name(switch_node, "ports"); 379 if (!ports_node) { 380 dev_err(dev, "Incorrect bindings: absent \"ports\" node\n"); 381 return -ENODEV; 382 } 383 384 err = felix_parse_ports_node(felix, ports_node, port_phy_modes); 385 of_node_put(ports_node); 386 387 return err; 388 } 389 390 static int felix_init_structs(struct felix *felix, int num_phys_ports) 391 { 392 struct ocelot *ocelot = &felix->ocelot; 393 phy_interface_t *port_phy_modes; 394 resource_size_t switch_base; 395 struct resource res; 396 int port, i, err; 397 398 ocelot->num_phys_ports = num_phys_ports; 399 ocelot->ports = devm_kcalloc(ocelot->dev, num_phys_ports, 400 sizeof(struct ocelot_port *), GFP_KERNEL); 401 if (!ocelot->ports) 402 return -ENOMEM; 403 404 ocelot->map = felix->info->map; 405 ocelot->stats_layout = felix->info->stats_layout; 406 ocelot->num_stats = felix->info->num_stats; 407 ocelot->shared_queue_sz = felix->info->shared_queue_sz; 408 ocelot->num_mact_rows = felix->info->num_mact_rows; 409 ocelot->vcap_is2_keys = felix->info->vcap_is2_keys; 410 ocelot->vcap_is2_actions= felix->info->vcap_is2_actions; 411 ocelot->vcap = felix->info->vcap; 412 ocelot->ops = felix->info->ops; 413 414 port_phy_modes = kcalloc(num_phys_ports, sizeof(phy_interface_t), 415 GFP_KERNEL); 416 if (!port_phy_modes) 417 return -ENOMEM; 418 419 err = felix_parse_dt(felix, port_phy_modes); 420 if (err) { 421 kfree(port_phy_modes); 422 return err; 423 } 424 425 switch_base = pci_resource_start(felix->pdev, 426 felix->info->switch_pci_bar); 427 428 for (i = 0; i < TARGET_MAX; i++) { 429 struct regmap *target; 430 431 if (!felix->info->target_io_res[i].name) 432 continue; 433 434 memcpy(&res, &felix->info->target_io_res[i], sizeof(res)); 435 res.flags = IORESOURCE_MEM; 436 res.start += switch_base; 437 res.end += switch_base; 438 439 target = ocelot_regmap_init(ocelot, &res); 440 if (IS_ERR(target)) { 441 dev_err(ocelot->dev, 442 "Failed to map device memory space\n"); 443 kfree(port_phy_modes); 444 return PTR_ERR(target); 445 } 446 447 ocelot->targets[i] = target; 448 } 449 450 err = ocelot_regfields_init(ocelot, felix->info->regfields); 451 if (err) { 452 dev_err(ocelot->dev, "failed to init reg fields map\n"); 453 kfree(port_phy_modes); 454 return err; 455 } 456 457 for (port = 0; port < num_phys_ports; port++) { 458 struct ocelot_port *ocelot_port; 459 void __iomem *port_regs; 460 461 ocelot_port = devm_kzalloc(ocelot->dev, 462 sizeof(struct ocelot_port), 463 GFP_KERNEL); 464 if (!ocelot_port) { 465 dev_err(ocelot->dev, 466 "failed to allocate port memory\n"); 467 kfree(port_phy_modes); 468 return -ENOMEM; 469 } 470 471 memcpy(&res, &felix->info->port_io_res[port], sizeof(res)); 472 res.flags = IORESOURCE_MEM; 473 res.start += switch_base; 474 res.end += switch_base; 475 476 port_regs = devm_ioremap_resource(ocelot->dev, &res); 477 if (IS_ERR(port_regs)) { 478 dev_err(ocelot->dev, 479 "failed to map registers for port %d\n", port); 480 kfree(port_phy_modes); 481 return PTR_ERR(port_regs); 482 } 483 484 ocelot_port->phy_mode = port_phy_modes[port]; 485 ocelot_port->ocelot = ocelot; 486 ocelot_port->regs = port_regs; 487 ocelot->ports[port] = ocelot_port; 488 } 489 490 kfree(port_phy_modes); 491 492 if (felix->info->mdio_bus_alloc) { 493 err = felix->info->mdio_bus_alloc(ocelot); 494 if (err < 0) 495 return err; 496 } 497 498 return 0; 499 } 500 501 /* Hardware initialization done here so that we can allocate structures with 502 * devm without fear of dsa_register_switch returning -EPROBE_DEFER and causing 503 * us to allocate structures twice (leak memory) and map PCI memory twice 504 * (which will not work). 505 */ 506 static int felix_setup(struct dsa_switch *ds) 507 { 508 struct ocelot *ocelot = ds->priv; 509 struct felix *felix = ocelot_to_felix(ocelot); 510 int port, err; 511 512 err = felix_init_structs(felix, ds->num_ports); 513 if (err) 514 return err; 515 516 ocelot_init(ocelot); 517 518 for (port = 0; port < ds->num_ports; port++) { 519 ocelot_init_port(ocelot, port); 520 521 /* Bring up the CPU port module and configure the NPI port */ 522 if (dsa_is_cpu_port(ds, port)) 523 ocelot_configure_cpu(ocelot, port, 524 OCELOT_TAG_PREFIX_NONE, 525 OCELOT_TAG_PREFIX_LONG); 526 } 527 528 /* Include the CPU port module in the forwarding mask for unknown 529 * unicast - the hardware default value for ANA_FLOODING_FLD_UNICAST 530 * excludes BIT(ocelot->num_phys_ports), and so does ocelot_init, since 531 * Ocelot relies on whitelisting MAC addresses towards PGID_CPU. 532 */ 533 ocelot_write_rix(ocelot, 534 ANA_PGID_PGID_PGID(GENMASK(ocelot->num_phys_ports, 0)), 535 ANA_PGID_PGID, PGID_UC); 536 537 ds->mtu_enforcement_ingress = true; 538 /* It looks like the MAC/PCS interrupt register - PM0_IEVENT (0x8040) 539 * isn't instantiated for the Felix PF. 540 * In-band AN may take a few ms to complete, so we need to poll. 541 */ 542 ds->pcs_poll = true; 543 544 return 0; 545 } 546 547 static void felix_teardown(struct dsa_switch *ds) 548 { 549 struct ocelot *ocelot = ds->priv; 550 struct felix *felix = ocelot_to_felix(ocelot); 551 552 if (felix->info->mdio_bus_free) 553 felix->info->mdio_bus_free(ocelot); 554 555 /* stop workqueue thread */ 556 ocelot_deinit(ocelot); 557 } 558 559 static int felix_hwtstamp_get(struct dsa_switch *ds, int port, 560 struct ifreq *ifr) 561 { 562 struct ocelot *ocelot = ds->priv; 563 564 return ocelot_hwstamp_get(ocelot, port, ifr); 565 } 566 567 static int felix_hwtstamp_set(struct dsa_switch *ds, int port, 568 struct ifreq *ifr) 569 { 570 struct ocelot *ocelot = ds->priv; 571 572 return ocelot_hwstamp_set(ocelot, port, ifr); 573 } 574 575 static bool felix_rxtstamp(struct dsa_switch *ds, int port, 576 struct sk_buff *skb, unsigned int type) 577 { 578 struct skb_shared_hwtstamps *shhwtstamps; 579 struct ocelot *ocelot = ds->priv; 580 u8 *extraction = skb->data - ETH_HLEN - OCELOT_TAG_LEN; 581 u32 tstamp_lo, tstamp_hi; 582 struct timespec64 ts; 583 u64 tstamp, val; 584 585 ocelot_ptp_gettime64(&ocelot->ptp_info, &ts); 586 tstamp = ktime_set(ts.tv_sec, ts.tv_nsec); 587 588 packing(extraction, &val, 116, 85, OCELOT_TAG_LEN, UNPACK, 0); 589 tstamp_lo = (u32)val; 590 591 tstamp_hi = tstamp >> 32; 592 if ((tstamp & 0xffffffff) < tstamp_lo) 593 tstamp_hi--; 594 595 tstamp = ((u64)tstamp_hi << 32) | tstamp_lo; 596 597 shhwtstamps = skb_hwtstamps(skb); 598 memset(shhwtstamps, 0, sizeof(struct skb_shared_hwtstamps)); 599 shhwtstamps->hwtstamp = tstamp; 600 return false; 601 } 602 603 static bool felix_txtstamp(struct dsa_switch *ds, int port, 604 struct sk_buff *clone, unsigned int type) 605 { 606 struct ocelot *ocelot = ds->priv; 607 struct ocelot_port *ocelot_port = ocelot->ports[port]; 608 609 if (!ocelot_port_add_txtstamp_skb(ocelot_port, clone)) 610 return true; 611 612 return false; 613 } 614 615 static int felix_change_mtu(struct dsa_switch *ds, int port, int new_mtu) 616 { 617 struct ocelot *ocelot = ds->priv; 618 619 ocelot_port_set_maxlen(ocelot, port, new_mtu); 620 621 return 0; 622 } 623 624 static int felix_get_max_mtu(struct dsa_switch *ds, int port) 625 { 626 struct ocelot *ocelot = ds->priv; 627 628 return ocelot_get_max_mtu(ocelot, port); 629 } 630 631 static int felix_cls_flower_add(struct dsa_switch *ds, int port, 632 struct flow_cls_offload *cls, bool ingress) 633 { 634 struct ocelot *ocelot = ds->priv; 635 636 return ocelot_cls_flower_replace(ocelot, port, cls, ingress); 637 } 638 639 static int felix_cls_flower_del(struct dsa_switch *ds, int port, 640 struct flow_cls_offload *cls, bool ingress) 641 { 642 struct ocelot *ocelot = ds->priv; 643 644 return ocelot_cls_flower_destroy(ocelot, port, cls, ingress); 645 } 646 647 static int felix_cls_flower_stats(struct dsa_switch *ds, int port, 648 struct flow_cls_offload *cls, bool ingress) 649 { 650 struct ocelot *ocelot = ds->priv; 651 652 return ocelot_cls_flower_stats(ocelot, port, cls, ingress); 653 } 654 655 static int felix_port_policer_add(struct dsa_switch *ds, int port, 656 struct dsa_mall_policer_tc_entry *policer) 657 { 658 struct ocelot *ocelot = ds->priv; 659 struct ocelot_policer pol = { 660 .rate = div_u64(policer->rate_bytes_per_sec, 1000) * 8, 661 .burst = div_u64(policer->rate_bytes_per_sec * 662 PSCHED_NS2TICKS(policer->burst), 663 PSCHED_TICKS_PER_SEC), 664 }; 665 666 return ocelot_port_policer_add(ocelot, port, &pol); 667 } 668 669 static void felix_port_policer_del(struct dsa_switch *ds, int port) 670 { 671 struct ocelot *ocelot = ds->priv; 672 673 ocelot_port_policer_del(ocelot, port); 674 } 675 676 static const struct dsa_switch_ops felix_switch_ops = { 677 .get_tag_protocol = felix_get_tag_protocol, 678 .setup = felix_setup, 679 .teardown = felix_teardown, 680 .set_ageing_time = felix_set_ageing_time, 681 .get_strings = felix_get_strings, 682 .get_ethtool_stats = felix_get_ethtool_stats, 683 .get_sset_count = felix_get_sset_count, 684 .get_ts_info = felix_get_ts_info, 685 .phylink_validate = felix_phylink_validate, 686 .phylink_mac_link_state = felix_phylink_mac_pcs_get_state, 687 .phylink_mac_config = felix_phylink_mac_config, 688 .phylink_mac_an_restart = felix_phylink_mac_an_restart, 689 .phylink_mac_link_down = felix_phylink_mac_link_down, 690 .phylink_mac_link_up = felix_phylink_mac_link_up, 691 .port_enable = felix_port_enable, 692 .port_disable = felix_port_disable, 693 .port_fdb_dump = felix_fdb_dump, 694 .port_fdb_add = felix_fdb_add, 695 .port_fdb_del = felix_fdb_del, 696 .port_bridge_join = felix_bridge_join, 697 .port_bridge_leave = felix_bridge_leave, 698 .port_stp_state_set = felix_bridge_stp_state_set, 699 .port_vlan_prepare = felix_vlan_prepare, 700 .port_vlan_filtering = felix_vlan_filtering, 701 .port_vlan_add = felix_vlan_add, 702 .port_vlan_del = felix_vlan_del, 703 .port_hwtstamp_get = felix_hwtstamp_get, 704 .port_hwtstamp_set = felix_hwtstamp_set, 705 .port_rxtstamp = felix_rxtstamp, 706 .port_txtstamp = felix_txtstamp, 707 .port_change_mtu = felix_change_mtu, 708 .port_max_mtu = felix_get_max_mtu, 709 .port_policer_add = felix_port_policer_add, 710 .port_policer_del = felix_port_policer_del, 711 .cls_flower_add = felix_cls_flower_add, 712 .cls_flower_del = felix_cls_flower_del, 713 .cls_flower_stats = felix_cls_flower_stats, 714 }; 715 716 static struct felix_info *felix_instance_tbl[] = { 717 [FELIX_INSTANCE_VSC9959] = &felix_info_vsc9959, 718 }; 719 720 static irqreturn_t felix_irq_handler(int irq, void *data) 721 { 722 struct ocelot *ocelot = (struct ocelot *)data; 723 724 /* The INTB interrupt is used for both PTP TX timestamp interrupt 725 * and preemption status change interrupt on each port. 726 * 727 * - Get txtstamp if have 728 * - TODO: handle preemption. Without handling it, driver may get 729 * interrupt storm. 730 */ 731 732 ocelot_get_txtstamp(ocelot); 733 734 return IRQ_HANDLED; 735 } 736 737 static int felix_pci_probe(struct pci_dev *pdev, 738 const struct pci_device_id *id) 739 { 740 enum felix_instance instance = id->driver_data; 741 struct dsa_switch *ds; 742 struct ocelot *ocelot; 743 struct felix *felix; 744 int err; 745 746 err = pci_enable_device(pdev); 747 if (err) { 748 dev_err(&pdev->dev, "device enable failed\n"); 749 goto err_pci_enable; 750 } 751 752 /* set up for high or low dma */ 753 err = dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(64)); 754 if (err) { 755 err = dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(32)); 756 if (err) { 757 dev_err(&pdev->dev, 758 "DMA configuration failed: 0x%x\n", err); 759 goto err_dma; 760 } 761 } 762 763 felix = kzalloc(sizeof(struct felix), GFP_KERNEL); 764 if (!felix) { 765 err = -ENOMEM; 766 dev_err(&pdev->dev, "Failed to allocate driver memory\n"); 767 goto err_alloc_felix; 768 } 769 770 pci_set_drvdata(pdev, felix); 771 ocelot = &felix->ocelot; 772 ocelot->dev = &pdev->dev; 773 felix->pdev = pdev; 774 felix->info = felix_instance_tbl[instance]; 775 776 pci_set_master(pdev); 777 778 err = devm_request_threaded_irq(&pdev->dev, pdev->irq, NULL, 779 &felix_irq_handler, IRQF_ONESHOT, 780 "felix-intb", ocelot); 781 if (err) { 782 dev_err(&pdev->dev, "Failed to request irq\n"); 783 goto err_alloc_irq; 784 } 785 786 ocelot->ptp = 1; 787 788 ds = kzalloc(sizeof(struct dsa_switch), GFP_KERNEL); 789 if (!ds) { 790 err = -ENOMEM; 791 dev_err(&pdev->dev, "Failed to allocate DSA switch\n"); 792 goto err_alloc_ds; 793 } 794 795 ds->dev = &pdev->dev; 796 ds->num_ports = felix->info->num_ports; 797 ds->ops = &felix_switch_ops; 798 ds->priv = ocelot; 799 felix->ds = ds; 800 801 err = dsa_register_switch(ds); 802 if (err) { 803 dev_err(&pdev->dev, "Failed to register DSA switch: %d\n", err); 804 goto err_register_ds; 805 } 806 807 return 0; 808 809 err_register_ds: 810 kfree(ds); 811 err_alloc_ds: 812 err_alloc_irq: 813 err_alloc_felix: 814 kfree(felix); 815 err_dma: 816 pci_disable_device(pdev); 817 err_pci_enable: 818 return err; 819 } 820 821 static void felix_pci_remove(struct pci_dev *pdev) 822 { 823 struct felix *felix; 824 825 felix = pci_get_drvdata(pdev); 826 827 dsa_unregister_switch(felix->ds); 828 829 kfree(felix->ds); 830 kfree(felix); 831 832 pci_disable_device(pdev); 833 } 834 835 static struct pci_device_id felix_ids[] = { 836 { 837 /* NXP LS1028A */ 838 PCI_DEVICE(PCI_VENDOR_ID_FREESCALE, 0xEEF0), 839 .driver_data = FELIX_INSTANCE_VSC9959, 840 }, 841 { 0, } 842 }; 843 MODULE_DEVICE_TABLE(pci, felix_ids); 844 845 static struct pci_driver felix_pci_driver = { 846 .name = KBUILD_MODNAME, 847 .id_table = felix_ids, 848 .probe = felix_pci_probe, 849 .remove = felix_pci_remove, 850 }; 851 852 module_pci_driver(felix_pci_driver); 853 854 MODULE_DESCRIPTION("Felix Switch driver"); 855 MODULE_LICENSE("GPL v2"); 856