1 // SPDX-License-Identifier: GPL-2.0 2 /* Copyright 2019 NXP Semiconductors 3 * 4 * This is an umbrella module for all network switches that are 5 * register-compatible with Ocelot and that perform I/O to their host CPU 6 * through an NPI (Node Processor Interface) Ethernet port. 7 */ 8 #include <uapi/linux/if_bridge.h> 9 #include <soc/mscc/ocelot_vcap.h> 10 #include <soc/mscc/ocelot_qsys.h> 11 #include <soc/mscc/ocelot_sys.h> 12 #include <soc/mscc/ocelot_dev.h> 13 #include <soc/mscc/ocelot_ana.h> 14 #include <soc/mscc/ocelot_ptp.h> 15 #include <soc/mscc/ocelot.h> 16 #include <linux/platform_device.h> 17 #include <linux/packing.h> 18 #include <linux/module.h> 19 #include <linux/of_net.h> 20 #include <linux/pci.h> 21 #include <linux/of.h> 22 #include <linux/pcs-lynx.h> 23 #include <net/pkt_sched.h> 24 #include <net/dsa.h> 25 #include "felix.h" 26 27 static enum dsa_tag_protocol felix_get_tag_protocol(struct dsa_switch *ds, 28 int port, 29 enum dsa_tag_protocol mp) 30 { 31 return DSA_TAG_PROTO_OCELOT; 32 } 33 34 static int felix_set_ageing_time(struct dsa_switch *ds, 35 unsigned int ageing_time) 36 { 37 struct ocelot *ocelot = ds->priv; 38 39 ocelot_set_ageing_time(ocelot, ageing_time); 40 41 return 0; 42 } 43 44 static int felix_fdb_dump(struct dsa_switch *ds, int port, 45 dsa_fdb_dump_cb_t *cb, void *data) 46 { 47 struct ocelot *ocelot = ds->priv; 48 49 return ocelot_fdb_dump(ocelot, port, cb, data); 50 } 51 52 static int felix_fdb_add(struct dsa_switch *ds, int port, 53 const unsigned char *addr, u16 vid) 54 { 55 struct ocelot *ocelot = ds->priv; 56 57 return ocelot_fdb_add(ocelot, port, addr, vid); 58 } 59 60 static int felix_fdb_del(struct dsa_switch *ds, int port, 61 const unsigned char *addr, u16 vid) 62 { 63 struct ocelot *ocelot = ds->priv; 64 65 return ocelot_fdb_del(ocelot, port, addr, vid); 66 } 67 68 /* This callback needs to be present */ 69 static int felix_mdb_prepare(struct dsa_switch *ds, int port, 70 const struct switchdev_obj_port_mdb *mdb) 71 { 72 return 0; 73 } 74 75 static void felix_mdb_add(struct dsa_switch *ds, int port, 76 const struct switchdev_obj_port_mdb *mdb) 77 { 78 struct ocelot *ocelot = ds->priv; 79 80 ocelot_port_mdb_add(ocelot, port, mdb); 81 } 82 83 static int felix_mdb_del(struct dsa_switch *ds, int port, 84 const struct switchdev_obj_port_mdb *mdb) 85 { 86 struct ocelot *ocelot = ds->priv; 87 88 return ocelot_port_mdb_del(ocelot, port, mdb); 89 } 90 91 static void felix_bridge_stp_state_set(struct dsa_switch *ds, int port, 92 u8 state) 93 { 94 struct ocelot *ocelot = ds->priv; 95 96 return ocelot_bridge_stp_state_set(ocelot, port, state); 97 } 98 99 static int felix_bridge_join(struct dsa_switch *ds, int port, 100 struct net_device *br) 101 { 102 struct ocelot *ocelot = ds->priv; 103 104 return ocelot_port_bridge_join(ocelot, port, br); 105 } 106 107 static void felix_bridge_leave(struct dsa_switch *ds, int port, 108 struct net_device *br) 109 { 110 struct ocelot *ocelot = ds->priv; 111 112 ocelot_port_bridge_leave(ocelot, port, br); 113 } 114 115 static int felix_vlan_prepare(struct dsa_switch *ds, int port, 116 const struct switchdev_obj_port_vlan *vlan) 117 { 118 struct ocelot *ocelot = ds->priv; 119 u16 vid, flags = vlan->flags; 120 int err; 121 122 /* Ocelot switches copy frames as-is to the CPU, so the flags: 123 * egress-untagged or not, pvid or not, make no difference. This 124 * behavior is already better than what DSA just tries to approximate 125 * when it installs the VLAN with the same flags on the CPU port. 126 * Just accept any configuration, and don't let ocelot deny installing 127 * multiple native VLANs on the NPI port, because the switch doesn't 128 * look at the port tag settings towards the NPI interface anyway. 129 */ 130 if (port == ocelot->npi) 131 return 0; 132 133 for (vid = vlan->vid_begin; vid <= vlan->vid_end; vid++) { 134 err = ocelot_vlan_prepare(ocelot, port, vid, 135 flags & BRIDGE_VLAN_INFO_PVID, 136 flags & BRIDGE_VLAN_INFO_UNTAGGED); 137 if (err) 138 return err; 139 } 140 141 return 0; 142 } 143 144 static int felix_vlan_filtering(struct dsa_switch *ds, int port, bool enabled, 145 struct switchdev_trans *trans) 146 { 147 struct ocelot *ocelot = ds->priv; 148 149 return ocelot_port_vlan_filtering(ocelot, port, enabled, trans); 150 } 151 152 static void felix_vlan_add(struct dsa_switch *ds, int port, 153 const struct switchdev_obj_port_vlan *vlan) 154 { 155 struct ocelot *ocelot = ds->priv; 156 u16 flags = vlan->flags; 157 u16 vid; 158 int err; 159 160 for (vid = vlan->vid_begin; vid <= vlan->vid_end; vid++) { 161 err = ocelot_vlan_add(ocelot, port, vid, 162 flags & BRIDGE_VLAN_INFO_PVID, 163 flags & BRIDGE_VLAN_INFO_UNTAGGED); 164 if (err) { 165 dev_err(ds->dev, "Failed to add VLAN %d to port %d: %d\n", 166 vid, port, err); 167 return; 168 } 169 } 170 } 171 172 static int felix_vlan_del(struct dsa_switch *ds, int port, 173 const struct switchdev_obj_port_vlan *vlan) 174 { 175 struct ocelot *ocelot = ds->priv; 176 u16 vid; 177 int err; 178 179 for (vid = vlan->vid_begin; vid <= vlan->vid_end; vid++) { 180 err = ocelot_vlan_del(ocelot, port, vid); 181 if (err) { 182 dev_err(ds->dev, "Failed to remove VLAN %d from port %d: %d\n", 183 vid, port, err); 184 return err; 185 } 186 } 187 return 0; 188 } 189 190 static int felix_port_enable(struct dsa_switch *ds, int port, 191 struct phy_device *phy) 192 { 193 struct ocelot *ocelot = ds->priv; 194 195 ocelot_port_enable(ocelot, port, phy); 196 197 return 0; 198 } 199 200 static void felix_port_disable(struct dsa_switch *ds, int port) 201 { 202 struct ocelot *ocelot = ds->priv; 203 204 return ocelot_port_disable(ocelot, port); 205 } 206 207 static void felix_phylink_validate(struct dsa_switch *ds, int port, 208 unsigned long *supported, 209 struct phylink_link_state *state) 210 { 211 struct ocelot *ocelot = ds->priv; 212 struct felix *felix = ocelot_to_felix(ocelot); 213 214 if (felix->info->phylink_validate) 215 felix->info->phylink_validate(ocelot, port, supported, state); 216 } 217 218 static void felix_phylink_mac_config(struct dsa_switch *ds, int port, 219 unsigned int link_an_mode, 220 const struct phylink_link_state *state) 221 { 222 struct ocelot *ocelot = ds->priv; 223 struct felix *felix = ocelot_to_felix(ocelot); 224 struct dsa_port *dp = dsa_to_port(ds, port); 225 226 if (felix->pcs[port]) 227 phylink_set_pcs(dp->pl, &felix->pcs[port]->pcs); 228 } 229 230 static void felix_phylink_mac_link_down(struct dsa_switch *ds, int port, 231 unsigned int link_an_mode, 232 phy_interface_t interface) 233 { 234 struct ocelot *ocelot = ds->priv; 235 struct ocelot_port *ocelot_port = ocelot->ports[port]; 236 int err; 237 238 ocelot_port_rmwl(ocelot_port, 0, DEV_MAC_ENA_CFG_RX_ENA, 239 DEV_MAC_ENA_CFG); 240 241 ocelot_fields_write(ocelot, port, QSYS_SWITCH_PORT_MODE_PORT_ENA, 0); 242 243 err = ocelot_port_flush(ocelot, port); 244 if (err) 245 dev_err(ocelot->dev, "failed to flush port %d: %d\n", 246 port, err); 247 248 /* Put the port in reset. */ 249 ocelot_port_writel(ocelot_port, 250 DEV_CLOCK_CFG_MAC_TX_RST | 251 DEV_CLOCK_CFG_MAC_RX_RST | 252 DEV_CLOCK_CFG_LINK_SPEED(OCELOT_SPEED_1000), 253 DEV_CLOCK_CFG); 254 } 255 256 static void felix_phylink_mac_link_up(struct dsa_switch *ds, int port, 257 unsigned int link_an_mode, 258 phy_interface_t interface, 259 struct phy_device *phydev, 260 int speed, int duplex, 261 bool tx_pause, bool rx_pause) 262 { 263 struct ocelot *ocelot = ds->priv; 264 struct ocelot_port *ocelot_port = ocelot->ports[port]; 265 struct felix *felix = ocelot_to_felix(ocelot); 266 u32 mac_fc_cfg; 267 268 /* Take port out of reset by clearing the MAC_TX_RST, MAC_RX_RST and 269 * PORT_RST bits in DEV_CLOCK_CFG. Note that the way this system is 270 * integrated is that the MAC speed is fixed and it's the PCS who is 271 * performing the rate adaptation, so we have to write "1000Mbps" into 272 * the LINK_SPEED field of DEV_CLOCK_CFG (which is also its default 273 * value). 274 */ 275 ocelot_port_writel(ocelot_port, 276 DEV_CLOCK_CFG_LINK_SPEED(OCELOT_SPEED_1000), 277 DEV_CLOCK_CFG); 278 279 switch (speed) { 280 case SPEED_10: 281 mac_fc_cfg = SYS_MAC_FC_CFG_FC_LINK_SPEED(3); 282 break; 283 case SPEED_100: 284 mac_fc_cfg = SYS_MAC_FC_CFG_FC_LINK_SPEED(2); 285 break; 286 case SPEED_1000: 287 case SPEED_2500: 288 mac_fc_cfg = SYS_MAC_FC_CFG_FC_LINK_SPEED(1); 289 break; 290 default: 291 dev_err(ocelot->dev, "Unsupported speed on port %d: %d\n", 292 port, speed); 293 return; 294 } 295 296 /* handle Rx pause in all cases, with 2500base-X this is used for rate 297 * adaptation. 298 */ 299 mac_fc_cfg |= SYS_MAC_FC_CFG_RX_FC_ENA; 300 301 if (tx_pause) 302 mac_fc_cfg |= SYS_MAC_FC_CFG_TX_FC_ENA | 303 SYS_MAC_FC_CFG_PAUSE_VAL_CFG(0xffff) | 304 SYS_MAC_FC_CFG_FC_LATENCY_CFG(0x7) | 305 SYS_MAC_FC_CFG_ZERO_PAUSE_ENA; 306 307 /* Flow control. Link speed is only used here to evaluate the time 308 * specification in incoming pause frames. 309 */ 310 ocelot_write_rix(ocelot, mac_fc_cfg, SYS_MAC_FC_CFG, port); 311 312 ocelot_write_rix(ocelot, 0, ANA_POL_FLOWC, port); 313 314 /* Undo the effects of felix_phylink_mac_link_down: 315 * enable MAC module 316 */ 317 ocelot_port_writel(ocelot_port, DEV_MAC_ENA_CFG_RX_ENA | 318 DEV_MAC_ENA_CFG_TX_ENA, DEV_MAC_ENA_CFG); 319 320 /* Enable receiving frames on the port, and activate auto-learning of 321 * MAC addresses. 322 */ 323 ocelot_write_gix(ocelot, ANA_PORT_PORT_CFG_LEARNAUTO | 324 ANA_PORT_PORT_CFG_RECV_ENA | 325 ANA_PORT_PORT_CFG_PORTID_VAL(port), 326 ANA_PORT_PORT_CFG, port); 327 328 /* Core: Enable port for frame transfer */ 329 ocelot_fields_write(ocelot, port, 330 QSYS_SWITCH_PORT_MODE_PORT_ENA, 1); 331 332 if (felix->info->port_sched_speed_set) 333 felix->info->port_sched_speed_set(ocelot, port, speed); 334 } 335 336 static void felix_port_qos_map_init(struct ocelot *ocelot, int port) 337 { 338 int i; 339 340 ocelot_rmw_gix(ocelot, 341 ANA_PORT_QOS_CFG_QOS_PCP_ENA, 342 ANA_PORT_QOS_CFG_QOS_PCP_ENA, 343 ANA_PORT_QOS_CFG, 344 port); 345 346 for (i = 0; i < FELIX_NUM_TC * 2; i++) { 347 ocelot_rmw_ix(ocelot, 348 (ANA_PORT_PCP_DEI_MAP_DP_PCP_DEI_VAL & i) | 349 ANA_PORT_PCP_DEI_MAP_QOS_PCP_DEI_VAL(i), 350 ANA_PORT_PCP_DEI_MAP_DP_PCP_DEI_VAL | 351 ANA_PORT_PCP_DEI_MAP_QOS_PCP_DEI_VAL_M, 352 ANA_PORT_PCP_DEI_MAP, 353 port, i); 354 } 355 } 356 357 static void felix_get_strings(struct dsa_switch *ds, int port, 358 u32 stringset, u8 *data) 359 { 360 struct ocelot *ocelot = ds->priv; 361 362 return ocelot_get_strings(ocelot, port, stringset, data); 363 } 364 365 static void felix_get_ethtool_stats(struct dsa_switch *ds, int port, u64 *data) 366 { 367 struct ocelot *ocelot = ds->priv; 368 369 ocelot_get_ethtool_stats(ocelot, port, data); 370 } 371 372 static int felix_get_sset_count(struct dsa_switch *ds, int port, int sset) 373 { 374 struct ocelot *ocelot = ds->priv; 375 376 return ocelot_get_sset_count(ocelot, port, sset); 377 } 378 379 static int felix_get_ts_info(struct dsa_switch *ds, int port, 380 struct ethtool_ts_info *info) 381 { 382 struct ocelot *ocelot = ds->priv; 383 384 return ocelot_get_ts_info(ocelot, port, info); 385 } 386 387 static int felix_parse_ports_node(struct felix *felix, 388 struct device_node *ports_node, 389 phy_interface_t *port_phy_modes) 390 { 391 struct ocelot *ocelot = &felix->ocelot; 392 struct device *dev = felix->ocelot.dev; 393 struct device_node *child; 394 395 for_each_available_child_of_node(ports_node, child) { 396 phy_interface_t phy_mode; 397 u32 port; 398 int err; 399 400 /* Get switch port number from DT */ 401 if (of_property_read_u32(child, "reg", &port) < 0) { 402 dev_err(dev, "Port number not defined in device tree " 403 "(property \"reg\")\n"); 404 of_node_put(child); 405 return -ENODEV; 406 } 407 408 /* Get PHY mode from DT */ 409 err = of_get_phy_mode(child, &phy_mode); 410 if (err) { 411 dev_err(dev, "Failed to read phy-mode or " 412 "phy-interface-type property for port %d\n", 413 port); 414 of_node_put(child); 415 return -ENODEV; 416 } 417 418 err = felix->info->prevalidate_phy_mode(ocelot, port, phy_mode); 419 if (err < 0) { 420 dev_err(dev, "Unsupported PHY mode %s on port %d\n", 421 phy_modes(phy_mode), port); 422 of_node_put(child); 423 return err; 424 } 425 426 port_phy_modes[port] = phy_mode; 427 } 428 429 return 0; 430 } 431 432 static int felix_parse_dt(struct felix *felix, phy_interface_t *port_phy_modes) 433 { 434 struct device *dev = felix->ocelot.dev; 435 struct device_node *switch_node; 436 struct device_node *ports_node; 437 int err; 438 439 switch_node = dev->of_node; 440 441 ports_node = of_get_child_by_name(switch_node, "ports"); 442 if (!ports_node) { 443 dev_err(dev, "Incorrect bindings: absent \"ports\" node\n"); 444 return -ENODEV; 445 } 446 447 err = felix_parse_ports_node(felix, ports_node, port_phy_modes); 448 of_node_put(ports_node); 449 450 return err; 451 } 452 453 static int felix_init_structs(struct felix *felix, int num_phys_ports) 454 { 455 struct ocelot *ocelot = &felix->ocelot; 456 phy_interface_t *port_phy_modes; 457 struct resource res; 458 int port, i, err; 459 460 ocelot->num_phys_ports = num_phys_ports; 461 ocelot->ports = devm_kcalloc(ocelot->dev, num_phys_ports, 462 sizeof(struct ocelot_port *), GFP_KERNEL); 463 if (!ocelot->ports) 464 return -ENOMEM; 465 466 ocelot->map = felix->info->map; 467 ocelot->stats_layout = felix->info->stats_layout; 468 ocelot->num_stats = felix->info->num_stats; 469 ocelot->shared_queue_sz = felix->info->shared_queue_sz; 470 ocelot->num_mact_rows = felix->info->num_mact_rows; 471 ocelot->vcap = felix->info->vcap; 472 ocelot->ops = felix->info->ops; 473 ocelot->inj_prefix = OCELOT_TAG_PREFIX_SHORT; 474 ocelot->xtr_prefix = OCELOT_TAG_PREFIX_SHORT; 475 476 port_phy_modes = kcalloc(num_phys_ports, sizeof(phy_interface_t), 477 GFP_KERNEL); 478 if (!port_phy_modes) 479 return -ENOMEM; 480 481 err = felix_parse_dt(felix, port_phy_modes); 482 if (err) { 483 kfree(port_phy_modes); 484 return err; 485 } 486 487 for (i = 0; i < TARGET_MAX; i++) { 488 struct regmap *target; 489 490 if (!felix->info->target_io_res[i].name) 491 continue; 492 493 memcpy(&res, &felix->info->target_io_res[i], sizeof(res)); 494 res.flags = IORESOURCE_MEM; 495 res.start += felix->switch_base; 496 res.end += felix->switch_base; 497 498 target = ocelot_regmap_init(ocelot, &res); 499 if (IS_ERR(target)) { 500 dev_err(ocelot->dev, 501 "Failed to map device memory space\n"); 502 kfree(port_phy_modes); 503 return PTR_ERR(target); 504 } 505 506 ocelot->targets[i] = target; 507 } 508 509 err = ocelot_regfields_init(ocelot, felix->info->regfields); 510 if (err) { 511 dev_err(ocelot->dev, "failed to init reg fields map\n"); 512 kfree(port_phy_modes); 513 return err; 514 } 515 516 for (port = 0; port < num_phys_ports; port++) { 517 struct ocelot_port *ocelot_port; 518 struct regmap *target; 519 u8 *template; 520 521 ocelot_port = devm_kzalloc(ocelot->dev, 522 sizeof(struct ocelot_port), 523 GFP_KERNEL); 524 if (!ocelot_port) { 525 dev_err(ocelot->dev, 526 "failed to allocate port memory\n"); 527 kfree(port_phy_modes); 528 return -ENOMEM; 529 } 530 531 memcpy(&res, &felix->info->port_io_res[port], sizeof(res)); 532 res.flags = IORESOURCE_MEM; 533 res.start += felix->switch_base; 534 res.end += felix->switch_base; 535 536 target = ocelot_regmap_init(ocelot, &res); 537 if (IS_ERR(target)) { 538 dev_err(ocelot->dev, 539 "Failed to map memory space for port %d\n", 540 port); 541 kfree(port_phy_modes); 542 return PTR_ERR(target); 543 } 544 545 template = devm_kzalloc(ocelot->dev, OCELOT_TOTAL_TAG_LEN, 546 GFP_KERNEL); 547 if (!template) { 548 dev_err(ocelot->dev, 549 "Failed to allocate memory for DSA tag\n"); 550 kfree(port_phy_modes); 551 return -ENOMEM; 552 } 553 554 ocelot_port->phy_mode = port_phy_modes[port]; 555 ocelot_port->ocelot = ocelot; 556 ocelot_port->target = target; 557 ocelot_port->xmit_template = template; 558 ocelot->ports[port] = ocelot_port; 559 560 felix->info->xmit_template_populate(ocelot, port); 561 } 562 563 kfree(port_phy_modes); 564 565 if (felix->info->mdio_bus_alloc) { 566 err = felix->info->mdio_bus_alloc(ocelot); 567 if (err < 0) 568 return err; 569 } 570 571 return 0; 572 } 573 574 /* The CPU port module is connected to the Node Processor Interface (NPI). This 575 * is the mode through which frames can be injected from and extracted to an 576 * external CPU, over Ethernet. 577 */ 578 static void felix_npi_port_init(struct ocelot *ocelot, int port) 579 { 580 ocelot->npi = port; 581 582 ocelot_write(ocelot, QSYS_EXT_CPU_CFG_EXT_CPUQ_MSK_M | 583 QSYS_EXT_CPU_CFG_EXT_CPU_PORT(port), 584 QSYS_EXT_CPU_CFG); 585 586 /* NPI port Injection/Extraction configuration */ 587 ocelot_fields_write(ocelot, port, SYS_PORT_MODE_INCL_XTR_HDR, 588 ocelot->xtr_prefix); 589 ocelot_fields_write(ocelot, port, SYS_PORT_MODE_INCL_INJ_HDR, 590 ocelot->inj_prefix); 591 592 /* Disable transmission of pause frames */ 593 ocelot_fields_write(ocelot, port, SYS_PAUSE_CFG_PAUSE_ENA, 0); 594 } 595 596 /* Hardware initialization done here so that we can allocate structures with 597 * devm without fear of dsa_register_switch returning -EPROBE_DEFER and causing 598 * us to allocate structures twice (leak memory) and map PCI memory twice 599 * (which will not work). 600 */ 601 static int felix_setup(struct dsa_switch *ds) 602 { 603 struct ocelot *ocelot = ds->priv; 604 struct felix *felix = ocelot_to_felix(ocelot); 605 int port, err; 606 607 err = felix_init_structs(felix, ds->num_ports); 608 if (err) 609 return err; 610 611 err = ocelot_init(ocelot); 612 if (err) 613 return err; 614 615 if (ocelot->ptp) { 616 err = ocelot_init_timestamp(ocelot, felix->info->ptp_caps); 617 if (err) { 618 dev_err(ocelot->dev, 619 "Timestamp initialization failed\n"); 620 ocelot->ptp = 0; 621 } 622 } 623 624 for (port = 0; port < ds->num_ports; port++) { 625 ocelot_init_port(ocelot, port); 626 627 if (dsa_is_cpu_port(ds, port)) 628 felix_npi_port_init(ocelot, port); 629 630 /* Set the default QoS Classification based on PCP and DEI 631 * bits of vlan tag. 632 */ 633 felix_port_qos_map_init(ocelot, port); 634 } 635 636 /* Include the CPU port module in the forwarding mask for unknown 637 * unicast - the hardware default value for ANA_FLOODING_FLD_UNICAST 638 * excludes BIT(ocelot->num_phys_ports), and so does ocelot_init, since 639 * Ocelot relies on whitelisting MAC addresses towards PGID_CPU. 640 */ 641 ocelot_write_rix(ocelot, 642 ANA_PGID_PGID_PGID(GENMASK(ocelot->num_phys_ports, 0)), 643 ANA_PGID_PGID, PGID_UC); 644 645 ds->mtu_enforcement_ingress = true; 646 ds->configure_vlan_while_not_filtering = true; 647 648 return 0; 649 } 650 651 static void felix_teardown(struct dsa_switch *ds) 652 { 653 struct ocelot *ocelot = ds->priv; 654 struct felix *felix = ocelot_to_felix(ocelot); 655 int port; 656 657 if (felix->info->mdio_bus_free) 658 felix->info->mdio_bus_free(ocelot); 659 660 for (port = 0; port < ocelot->num_phys_ports; port++) 661 ocelot_deinit_port(ocelot, port); 662 ocelot_deinit_timestamp(ocelot); 663 /* stop workqueue thread */ 664 ocelot_deinit(ocelot); 665 } 666 667 static int felix_hwtstamp_get(struct dsa_switch *ds, int port, 668 struct ifreq *ifr) 669 { 670 struct ocelot *ocelot = ds->priv; 671 672 return ocelot_hwstamp_get(ocelot, port, ifr); 673 } 674 675 static int felix_hwtstamp_set(struct dsa_switch *ds, int port, 676 struct ifreq *ifr) 677 { 678 struct ocelot *ocelot = ds->priv; 679 680 return ocelot_hwstamp_set(ocelot, port, ifr); 681 } 682 683 static bool felix_rxtstamp(struct dsa_switch *ds, int port, 684 struct sk_buff *skb, unsigned int type) 685 { 686 struct skb_shared_hwtstamps *shhwtstamps; 687 struct ocelot *ocelot = ds->priv; 688 u8 *extraction = skb->data - ETH_HLEN - OCELOT_TAG_LEN; 689 u32 tstamp_lo, tstamp_hi; 690 struct timespec64 ts; 691 u64 tstamp, val; 692 693 ocelot_ptp_gettime64(&ocelot->ptp_info, &ts); 694 tstamp = ktime_set(ts.tv_sec, ts.tv_nsec); 695 696 packing(extraction, &val, 116, 85, OCELOT_TAG_LEN, UNPACK, 0); 697 tstamp_lo = (u32)val; 698 699 tstamp_hi = tstamp >> 32; 700 if ((tstamp & 0xffffffff) < tstamp_lo) 701 tstamp_hi--; 702 703 tstamp = ((u64)tstamp_hi << 32) | tstamp_lo; 704 705 shhwtstamps = skb_hwtstamps(skb); 706 memset(shhwtstamps, 0, sizeof(struct skb_shared_hwtstamps)); 707 shhwtstamps->hwtstamp = tstamp; 708 return false; 709 } 710 711 static bool felix_txtstamp(struct dsa_switch *ds, int port, 712 struct sk_buff *clone, unsigned int type) 713 { 714 struct ocelot *ocelot = ds->priv; 715 struct ocelot_port *ocelot_port = ocelot->ports[port]; 716 717 if (ocelot->ptp && (skb_shinfo(clone)->tx_flags & SKBTX_HW_TSTAMP) && 718 ocelot_port->ptp_cmd == IFH_REW_OP_TWO_STEP_PTP) { 719 ocelot_port_add_txtstamp_skb(ocelot, port, clone); 720 return true; 721 } 722 723 return false; 724 } 725 726 static int felix_change_mtu(struct dsa_switch *ds, int port, int new_mtu) 727 { 728 struct ocelot *ocelot = ds->priv; 729 730 ocelot_port_set_maxlen(ocelot, port, new_mtu); 731 732 return 0; 733 } 734 735 static int felix_get_max_mtu(struct dsa_switch *ds, int port) 736 { 737 struct ocelot *ocelot = ds->priv; 738 739 return ocelot_get_max_mtu(ocelot, port); 740 } 741 742 static int felix_cls_flower_add(struct dsa_switch *ds, int port, 743 struct flow_cls_offload *cls, bool ingress) 744 { 745 struct ocelot *ocelot = ds->priv; 746 747 return ocelot_cls_flower_replace(ocelot, port, cls, ingress); 748 } 749 750 static int felix_cls_flower_del(struct dsa_switch *ds, int port, 751 struct flow_cls_offload *cls, bool ingress) 752 { 753 struct ocelot *ocelot = ds->priv; 754 755 return ocelot_cls_flower_destroy(ocelot, port, cls, ingress); 756 } 757 758 static int felix_cls_flower_stats(struct dsa_switch *ds, int port, 759 struct flow_cls_offload *cls, bool ingress) 760 { 761 struct ocelot *ocelot = ds->priv; 762 763 return ocelot_cls_flower_stats(ocelot, port, cls, ingress); 764 } 765 766 static int felix_port_policer_add(struct dsa_switch *ds, int port, 767 struct dsa_mall_policer_tc_entry *policer) 768 { 769 struct ocelot *ocelot = ds->priv; 770 struct ocelot_policer pol = { 771 .rate = div_u64(policer->rate_bytes_per_sec, 1000) * 8, 772 .burst = policer->burst, 773 }; 774 775 return ocelot_port_policer_add(ocelot, port, &pol); 776 } 777 778 static void felix_port_policer_del(struct dsa_switch *ds, int port) 779 { 780 struct ocelot *ocelot = ds->priv; 781 782 ocelot_port_policer_del(ocelot, port); 783 } 784 785 static int felix_port_setup_tc(struct dsa_switch *ds, int port, 786 enum tc_setup_type type, 787 void *type_data) 788 { 789 struct ocelot *ocelot = ds->priv; 790 struct felix *felix = ocelot_to_felix(ocelot); 791 792 if (felix->info->port_setup_tc) 793 return felix->info->port_setup_tc(ds, port, type, type_data); 794 else 795 return -EOPNOTSUPP; 796 } 797 798 const struct dsa_switch_ops felix_switch_ops = { 799 .get_tag_protocol = felix_get_tag_protocol, 800 .setup = felix_setup, 801 .teardown = felix_teardown, 802 .set_ageing_time = felix_set_ageing_time, 803 .get_strings = felix_get_strings, 804 .get_ethtool_stats = felix_get_ethtool_stats, 805 .get_sset_count = felix_get_sset_count, 806 .get_ts_info = felix_get_ts_info, 807 .phylink_validate = felix_phylink_validate, 808 .phylink_mac_config = felix_phylink_mac_config, 809 .phylink_mac_link_down = felix_phylink_mac_link_down, 810 .phylink_mac_link_up = felix_phylink_mac_link_up, 811 .port_enable = felix_port_enable, 812 .port_disable = felix_port_disable, 813 .port_fdb_dump = felix_fdb_dump, 814 .port_fdb_add = felix_fdb_add, 815 .port_fdb_del = felix_fdb_del, 816 .port_mdb_prepare = felix_mdb_prepare, 817 .port_mdb_add = felix_mdb_add, 818 .port_mdb_del = felix_mdb_del, 819 .port_bridge_join = felix_bridge_join, 820 .port_bridge_leave = felix_bridge_leave, 821 .port_stp_state_set = felix_bridge_stp_state_set, 822 .port_vlan_prepare = felix_vlan_prepare, 823 .port_vlan_filtering = felix_vlan_filtering, 824 .port_vlan_add = felix_vlan_add, 825 .port_vlan_del = felix_vlan_del, 826 .port_hwtstamp_get = felix_hwtstamp_get, 827 .port_hwtstamp_set = felix_hwtstamp_set, 828 .port_rxtstamp = felix_rxtstamp, 829 .port_txtstamp = felix_txtstamp, 830 .port_change_mtu = felix_change_mtu, 831 .port_max_mtu = felix_get_max_mtu, 832 .port_policer_add = felix_port_policer_add, 833 .port_policer_del = felix_port_policer_del, 834 .cls_flower_add = felix_cls_flower_add, 835 .cls_flower_del = felix_cls_flower_del, 836 .cls_flower_stats = felix_cls_flower_stats, 837 .port_setup_tc = felix_port_setup_tc, 838 }; 839 840 struct net_device *felix_port_to_netdev(struct ocelot *ocelot, int port) 841 { 842 struct felix *felix = ocelot_to_felix(ocelot); 843 struct dsa_switch *ds = felix->ds; 844 845 if (!dsa_is_user_port(ds, port)) 846 return NULL; 847 848 return dsa_to_port(ds, port)->slave; 849 } 850 851 int felix_netdev_to_port(struct net_device *dev) 852 { 853 struct dsa_port *dp; 854 855 dp = dsa_port_from_netdev(dev); 856 if (IS_ERR(dp)) 857 return -EINVAL; 858 859 return dp->index; 860 } 861