1 // SPDX-License-Identifier: GPL-2.0 2 /* Copyright 2019 NXP Semiconductors 3 */ 4 #include <uapi/linux/if_bridge.h> 5 #include <soc/mscc/ocelot_vcap.h> 6 #include <soc/mscc/ocelot_qsys.h> 7 #include <soc/mscc/ocelot_sys.h> 8 #include <soc/mscc/ocelot_dev.h> 9 #include <soc/mscc/ocelot_ana.h> 10 #include <soc/mscc/ocelot_ptp.h> 11 #include <soc/mscc/ocelot.h> 12 #include <linux/packing.h> 13 #include <linux/module.h> 14 #include <linux/of_net.h> 15 #include <linux/pci.h> 16 #include <linux/of.h> 17 #include <net/pkt_sched.h> 18 #include <net/dsa.h> 19 #include "felix.h" 20 21 static enum dsa_tag_protocol felix_get_tag_protocol(struct dsa_switch *ds, 22 int port, 23 enum dsa_tag_protocol mp) 24 { 25 return DSA_TAG_PROTO_OCELOT; 26 } 27 28 static int felix_set_ageing_time(struct dsa_switch *ds, 29 unsigned int ageing_time) 30 { 31 struct ocelot *ocelot = ds->priv; 32 33 ocelot_set_ageing_time(ocelot, ageing_time); 34 35 return 0; 36 } 37 38 static int felix_fdb_dump(struct dsa_switch *ds, int port, 39 dsa_fdb_dump_cb_t *cb, void *data) 40 { 41 struct ocelot *ocelot = ds->priv; 42 43 return ocelot_fdb_dump(ocelot, port, cb, data); 44 } 45 46 static int felix_fdb_add(struct dsa_switch *ds, int port, 47 const unsigned char *addr, u16 vid) 48 { 49 struct ocelot *ocelot = ds->priv; 50 51 return ocelot_fdb_add(ocelot, port, addr, vid); 52 } 53 54 static int felix_fdb_del(struct dsa_switch *ds, int port, 55 const unsigned char *addr, u16 vid) 56 { 57 struct ocelot *ocelot = ds->priv; 58 59 return ocelot_fdb_del(ocelot, port, addr, vid); 60 } 61 62 static void felix_bridge_stp_state_set(struct dsa_switch *ds, int port, 63 u8 state) 64 { 65 struct ocelot *ocelot = ds->priv; 66 67 return ocelot_bridge_stp_state_set(ocelot, port, state); 68 } 69 70 static int felix_bridge_join(struct dsa_switch *ds, int port, 71 struct net_device *br) 72 { 73 struct ocelot *ocelot = ds->priv; 74 75 return ocelot_port_bridge_join(ocelot, port, br); 76 } 77 78 static void felix_bridge_leave(struct dsa_switch *ds, int port, 79 struct net_device *br) 80 { 81 struct ocelot *ocelot = ds->priv; 82 83 ocelot_port_bridge_leave(ocelot, port, br); 84 } 85 86 /* This callback needs to be present */ 87 static int felix_vlan_prepare(struct dsa_switch *ds, int port, 88 const struct switchdev_obj_port_vlan *vlan) 89 { 90 return 0; 91 } 92 93 static int felix_vlan_filtering(struct dsa_switch *ds, int port, bool enabled) 94 { 95 struct ocelot *ocelot = ds->priv; 96 97 ocelot_port_vlan_filtering(ocelot, port, enabled); 98 99 return 0; 100 } 101 102 static void felix_vlan_add(struct dsa_switch *ds, int port, 103 const struct switchdev_obj_port_vlan *vlan) 104 { 105 struct ocelot *ocelot = ds->priv; 106 u16 vid; 107 int err; 108 109 for (vid = vlan->vid_begin; vid <= vlan->vid_end; vid++) { 110 err = ocelot_vlan_add(ocelot, port, vid, 111 vlan->flags & BRIDGE_VLAN_INFO_PVID, 112 vlan->flags & BRIDGE_VLAN_INFO_UNTAGGED); 113 if (err) { 114 dev_err(ds->dev, "Failed to add VLAN %d to port %d: %d\n", 115 vid, port, err); 116 return; 117 } 118 } 119 } 120 121 static int felix_vlan_del(struct dsa_switch *ds, int port, 122 const struct switchdev_obj_port_vlan *vlan) 123 { 124 struct ocelot *ocelot = ds->priv; 125 u16 vid; 126 int err; 127 128 for (vid = vlan->vid_begin; vid <= vlan->vid_end; vid++) { 129 err = ocelot_vlan_del(ocelot, port, vid); 130 if (err) { 131 dev_err(ds->dev, "Failed to remove VLAN %d from port %d: %d\n", 132 vid, port, err); 133 return err; 134 } 135 } 136 return 0; 137 } 138 139 static int felix_port_enable(struct dsa_switch *ds, int port, 140 struct phy_device *phy) 141 { 142 struct ocelot *ocelot = ds->priv; 143 144 ocelot_port_enable(ocelot, port, phy); 145 146 return 0; 147 } 148 149 static void felix_port_disable(struct dsa_switch *ds, int port) 150 { 151 struct ocelot *ocelot = ds->priv; 152 153 return ocelot_port_disable(ocelot, port); 154 } 155 156 static void felix_phylink_validate(struct dsa_switch *ds, int port, 157 unsigned long *supported, 158 struct phylink_link_state *state) 159 { 160 struct ocelot *ocelot = ds->priv; 161 struct ocelot_port *ocelot_port = ocelot->ports[port]; 162 __ETHTOOL_DECLARE_LINK_MODE_MASK(mask) = { 0, }; 163 164 if (state->interface != PHY_INTERFACE_MODE_NA && 165 state->interface != ocelot_port->phy_mode) { 166 bitmap_zero(supported, __ETHTOOL_LINK_MODE_MASK_NBITS); 167 return; 168 } 169 170 /* No half-duplex. */ 171 phylink_set_port_modes(mask); 172 phylink_set(mask, Autoneg); 173 phylink_set(mask, Pause); 174 phylink_set(mask, Asym_Pause); 175 phylink_set(mask, 10baseT_Full); 176 phylink_set(mask, 100baseT_Full); 177 phylink_set(mask, 1000baseT_Full); 178 179 if (state->interface == PHY_INTERFACE_MODE_INTERNAL || 180 state->interface == PHY_INTERFACE_MODE_2500BASEX || 181 state->interface == PHY_INTERFACE_MODE_USXGMII) { 182 phylink_set(mask, 2500baseT_Full); 183 phylink_set(mask, 2500baseX_Full); 184 } 185 186 bitmap_and(supported, supported, mask, 187 __ETHTOOL_LINK_MODE_MASK_NBITS); 188 bitmap_and(state->advertising, state->advertising, mask, 189 __ETHTOOL_LINK_MODE_MASK_NBITS); 190 } 191 192 static int felix_phylink_mac_pcs_get_state(struct dsa_switch *ds, int port, 193 struct phylink_link_state *state) 194 { 195 struct ocelot *ocelot = ds->priv; 196 struct felix *felix = ocelot_to_felix(ocelot); 197 198 if (felix->info->pcs_link_state) 199 felix->info->pcs_link_state(ocelot, port, state); 200 201 return 0; 202 } 203 204 static void felix_phylink_mac_config(struct dsa_switch *ds, int port, 205 unsigned int link_an_mode, 206 const struct phylink_link_state *state) 207 { 208 struct ocelot *ocelot = ds->priv; 209 struct ocelot_port *ocelot_port = ocelot->ports[port]; 210 struct felix *felix = ocelot_to_felix(ocelot); 211 u32 mac_fc_cfg; 212 213 /* Take port out of reset by clearing the MAC_TX_RST, MAC_RX_RST and 214 * PORT_RST bits in CLOCK_CFG 215 */ 216 ocelot_port_writel(ocelot_port, DEV_CLOCK_CFG_LINK_SPEED(state->speed), 217 DEV_CLOCK_CFG); 218 219 /* Flow control. Link speed is only used here to evaluate the time 220 * specification in incoming pause frames. 221 */ 222 mac_fc_cfg = SYS_MAC_FC_CFG_FC_LINK_SPEED(state->speed); 223 224 /* handle Rx pause in all cases, with 2500base-X this is used for rate 225 * adaptation. 226 */ 227 mac_fc_cfg |= SYS_MAC_FC_CFG_RX_FC_ENA; 228 229 if (state->pause & MLO_PAUSE_TX) 230 mac_fc_cfg |= SYS_MAC_FC_CFG_TX_FC_ENA | 231 SYS_MAC_FC_CFG_PAUSE_VAL_CFG(0xffff) | 232 SYS_MAC_FC_CFG_FC_LATENCY_CFG(0x7) | 233 SYS_MAC_FC_CFG_ZERO_PAUSE_ENA; 234 ocelot_write_rix(ocelot, mac_fc_cfg, SYS_MAC_FC_CFG, port); 235 236 ocelot_write_rix(ocelot, 0, ANA_POL_FLOWC, port); 237 238 if (felix->info->pcs_init) 239 felix->info->pcs_init(ocelot, port, link_an_mode, state); 240 241 if (felix->info->port_sched_speed_set) 242 felix->info->port_sched_speed_set(ocelot, port, 243 state->speed); 244 } 245 246 static void felix_phylink_mac_an_restart(struct dsa_switch *ds, int port) 247 { 248 struct ocelot *ocelot = ds->priv; 249 struct felix *felix = ocelot_to_felix(ocelot); 250 251 if (felix->info->pcs_an_restart) 252 felix->info->pcs_an_restart(ocelot, port); 253 } 254 255 static void felix_phylink_mac_link_down(struct dsa_switch *ds, int port, 256 unsigned int link_an_mode, 257 phy_interface_t interface) 258 { 259 struct ocelot *ocelot = ds->priv; 260 struct ocelot_port *ocelot_port = ocelot->ports[port]; 261 262 ocelot_port_writel(ocelot_port, 0, DEV_MAC_ENA_CFG); 263 ocelot_rmw_rix(ocelot, 0, QSYS_SWITCH_PORT_MODE_PORT_ENA, 264 QSYS_SWITCH_PORT_MODE, port); 265 } 266 267 static void felix_phylink_mac_link_up(struct dsa_switch *ds, int port, 268 unsigned int link_an_mode, 269 phy_interface_t interface, 270 struct phy_device *phydev, 271 int speed, int duplex, 272 bool tx_pause, bool rx_pause) 273 { 274 struct ocelot *ocelot = ds->priv; 275 struct ocelot_port *ocelot_port = ocelot->ports[port]; 276 277 /* Enable MAC module */ 278 ocelot_port_writel(ocelot_port, DEV_MAC_ENA_CFG_RX_ENA | 279 DEV_MAC_ENA_CFG_TX_ENA, DEV_MAC_ENA_CFG); 280 281 /* Enable receiving frames on the port, and activate auto-learning of 282 * MAC addresses. 283 */ 284 ocelot_write_gix(ocelot, ANA_PORT_PORT_CFG_LEARNAUTO | 285 ANA_PORT_PORT_CFG_RECV_ENA | 286 ANA_PORT_PORT_CFG_PORTID_VAL(port), 287 ANA_PORT_PORT_CFG, port); 288 289 /* Core: Enable port for frame transfer */ 290 ocelot_write_rix(ocelot, QSYS_SWITCH_PORT_MODE_INGRESS_DROP_MODE | 291 QSYS_SWITCH_PORT_MODE_SCH_NEXT_CFG(1) | 292 QSYS_SWITCH_PORT_MODE_PORT_ENA, 293 QSYS_SWITCH_PORT_MODE, port); 294 } 295 296 static void felix_port_qos_map_init(struct ocelot *ocelot, int port) 297 { 298 int i; 299 300 ocelot_rmw_gix(ocelot, 301 ANA_PORT_QOS_CFG_QOS_PCP_ENA, 302 ANA_PORT_QOS_CFG_QOS_PCP_ENA, 303 ANA_PORT_QOS_CFG, 304 port); 305 306 for (i = 0; i < FELIX_NUM_TC * 2; i++) { 307 ocelot_rmw_ix(ocelot, 308 (ANA_PORT_PCP_DEI_MAP_DP_PCP_DEI_VAL & i) | 309 ANA_PORT_PCP_DEI_MAP_QOS_PCP_DEI_VAL(i), 310 ANA_PORT_PCP_DEI_MAP_DP_PCP_DEI_VAL | 311 ANA_PORT_PCP_DEI_MAP_QOS_PCP_DEI_VAL_M, 312 ANA_PORT_PCP_DEI_MAP, 313 port, i); 314 } 315 } 316 317 static void felix_get_strings(struct dsa_switch *ds, int port, 318 u32 stringset, u8 *data) 319 { 320 struct ocelot *ocelot = ds->priv; 321 322 return ocelot_get_strings(ocelot, port, stringset, data); 323 } 324 325 static void felix_get_ethtool_stats(struct dsa_switch *ds, int port, u64 *data) 326 { 327 struct ocelot *ocelot = ds->priv; 328 329 ocelot_get_ethtool_stats(ocelot, port, data); 330 } 331 332 static int felix_get_sset_count(struct dsa_switch *ds, int port, int sset) 333 { 334 struct ocelot *ocelot = ds->priv; 335 336 return ocelot_get_sset_count(ocelot, port, sset); 337 } 338 339 static int felix_get_ts_info(struct dsa_switch *ds, int port, 340 struct ethtool_ts_info *info) 341 { 342 struct ocelot *ocelot = ds->priv; 343 344 return ocelot_get_ts_info(ocelot, port, info); 345 } 346 347 static int felix_parse_ports_node(struct felix *felix, 348 struct device_node *ports_node, 349 phy_interface_t *port_phy_modes) 350 { 351 struct ocelot *ocelot = &felix->ocelot; 352 struct device *dev = felix->ocelot.dev; 353 struct device_node *child; 354 355 for_each_available_child_of_node(ports_node, child) { 356 phy_interface_t phy_mode; 357 u32 port; 358 int err; 359 360 /* Get switch port number from DT */ 361 if (of_property_read_u32(child, "reg", &port) < 0) { 362 dev_err(dev, "Port number not defined in device tree " 363 "(property \"reg\")\n"); 364 of_node_put(child); 365 return -ENODEV; 366 } 367 368 /* Get PHY mode from DT */ 369 err = of_get_phy_mode(child, &phy_mode); 370 if (err) { 371 dev_err(dev, "Failed to read phy-mode or " 372 "phy-interface-type property for port %d\n", 373 port); 374 of_node_put(child); 375 return -ENODEV; 376 } 377 378 err = felix->info->prevalidate_phy_mode(ocelot, port, phy_mode); 379 if (err < 0) { 380 dev_err(dev, "Unsupported PHY mode %s on port %d\n", 381 phy_modes(phy_mode), port); 382 return err; 383 } 384 385 port_phy_modes[port] = phy_mode; 386 } 387 388 return 0; 389 } 390 391 static int felix_parse_dt(struct felix *felix, phy_interface_t *port_phy_modes) 392 { 393 struct device *dev = felix->ocelot.dev; 394 struct device_node *switch_node; 395 struct device_node *ports_node; 396 int err; 397 398 switch_node = dev->of_node; 399 400 ports_node = of_get_child_by_name(switch_node, "ports"); 401 if (!ports_node) { 402 dev_err(dev, "Incorrect bindings: absent \"ports\" node\n"); 403 return -ENODEV; 404 } 405 406 err = felix_parse_ports_node(felix, ports_node, port_phy_modes); 407 of_node_put(ports_node); 408 409 return err; 410 } 411 412 static int felix_init_structs(struct felix *felix, int num_phys_ports) 413 { 414 struct ocelot *ocelot = &felix->ocelot; 415 phy_interface_t *port_phy_modes; 416 resource_size_t switch_base; 417 int port, i, err; 418 419 ocelot->num_phys_ports = num_phys_ports; 420 ocelot->ports = devm_kcalloc(ocelot->dev, num_phys_ports, 421 sizeof(struct ocelot_port *), GFP_KERNEL); 422 if (!ocelot->ports) 423 return -ENOMEM; 424 425 ocelot->map = felix->info->map; 426 ocelot->stats_layout = felix->info->stats_layout; 427 ocelot->num_stats = felix->info->num_stats; 428 ocelot->shared_queue_sz = felix->info->shared_queue_sz; 429 ocelot->num_mact_rows = felix->info->num_mact_rows; 430 ocelot->vcap_is2_keys = felix->info->vcap_is2_keys; 431 ocelot->vcap_is2_actions= felix->info->vcap_is2_actions; 432 ocelot->vcap = felix->info->vcap; 433 ocelot->ops = felix->info->ops; 434 435 port_phy_modes = kcalloc(num_phys_ports, sizeof(phy_interface_t), 436 GFP_KERNEL); 437 if (!port_phy_modes) 438 return -ENOMEM; 439 440 err = felix_parse_dt(felix, port_phy_modes); 441 if (err) { 442 kfree(port_phy_modes); 443 return err; 444 } 445 446 switch_base = pci_resource_start(felix->pdev, 447 felix->info->switch_pci_bar); 448 449 for (i = 0; i < TARGET_MAX; i++) { 450 struct regmap *target; 451 struct resource *res; 452 453 if (!felix->info->target_io_res[i].name) 454 continue; 455 456 res = &felix->info->target_io_res[i]; 457 res->flags = IORESOURCE_MEM; 458 res->start += switch_base; 459 res->end += switch_base; 460 461 target = ocelot_regmap_init(ocelot, res); 462 if (IS_ERR(target)) { 463 dev_err(ocelot->dev, 464 "Failed to map device memory space\n"); 465 kfree(port_phy_modes); 466 return PTR_ERR(target); 467 } 468 469 ocelot->targets[i] = target; 470 } 471 472 err = ocelot_regfields_init(ocelot, felix->info->regfields); 473 if (err) { 474 dev_err(ocelot->dev, "failed to init reg fields map\n"); 475 kfree(port_phy_modes); 476 return err; 477 } 478 479 for (port = 0; port < num_phys_ports; port++) { 480 struct ocelot_port *ocelot_port; 481 void __iomem *port_regs; 482 struct resource *res; 483 484 ocelot_port = devm_kzalloc(ocelot->dev, 485 sizeof(struct ocelot_port), 486 GFP_KERNEL); 487 if (!ocelot_port) { 488 dev_err(ocelot->dev, 489 "failed to allocate port memory\n"); 490 kfree(port_phy_modes); 491 return -ENOMEM; 492 } 493 494 res = &felix->info->port_io_res[port]; 495 res->flags = IORESOURCE_MEM; 496 res->start += switch_base; 497 res->end += switch_base; 498 499 port_regs = devm_ioremap_resource(ocelot->dev, res); 500 if (IS_ERR(port_regs)) { 501 dev_err(ocelot->dev, 502 "failed to map registers for port %d\n", port); 503 kfree(port_phy_modes); 504 return PTR_ERR(port_regs); 505 } 506 507 ocelot_port->phy_mode = port_phy_modes[port]; 508 ocelot_port->ocelot = ocelot; 509 ocelot_port->regs = port_regs; 510 ocelot->ports[port] = ocelot_port; 511 } 512 513 kfree(port_phy_modes); 514 515 if (felix->info->mdio_bus_alloc) { 516 err = felix->info->mdio_bus_alloc(ocelot); 517 if (err < 0) 518 return err; 519 } 520 521 return 0; 522 } 523 524 static struct ptp_clock_info ocelot_ptp_clock_info = { 525 .owner = THIS_MODULE, 526 .name = "felix ptp", 527 .max_adj = 0x7fffffff, 528 .n_alarm = 0, 529 .n_ext_ts = 0, 530 .n_per_out = OCELOT_PTP_PINS_NUM, 531 .n_pins = OCELOT_PTP_PINS_NUM, 532 .pps = 0, 533 .gettime64 = ocelot_ptp_gettime64, 534 .settime64 = ocelot_ptp_settime64, 535 .adjtime = ocelot_ptp_adjtime, 536 .adjfine = ocelot_ptp_adjfine, 537 .verify = ocelot_ptp_verify, 538 .enable = ocelot_ptp_enable, 539 }; 540 541 /* Hardware initialization done here so that we can allocate structures with 542 * devm without fear of dsa_register_switch returning -EPROBE_DEFER and causing 543 * us to allocate structures twice (leak memory) and map PCI memory twice 544 * (which will not work). 545 */ 546 static int felix_setup(struct dsa_switch *ds) 547 { 548 struct ocelot *ocelot = ds->priv; 549 struct felix *felix = ocelot_to_felix(ocelot); 550 int port, err; 551 int tc; 552 553 err = felix_init_structs(felix, ds->num_ports); 554 if (err) 555 return err; 556 557 ocelot_init(ocelot); 558 if (ocelot->ptp) { 559 err = ocelot_init_timestamp(ocelot, &ocelot_ptp_clock_info); 560 if (err) { 561 dev_err(ocelot->dev, 562 "Timestamp initialization failed\n"); 563 ocelot->ptp = 0; 564 } 565 } 566 567 for (port = 0; port < ds->num_ports; port++) { 568 ocelot_init_port(ocelot, port); 569 570 /* Bring up the CPU port module and configure the NPI port */ 571 if (dsa_is_cpu_port(ds, port)) 572 ocelot_configure_cpu(ocelot, port, 573 OCELOT_TAG_PREFIX_NONE, 574 OCELOT_TAG_PREFIX_LONG); 575 576 /* Set the default QoS Classification based on PCP and DEI 577 * bits of vlan tag. 578 */ 579 felix_port_qos_map_init(ocelot, port); 580 } 581 582 /* Include the CPU port module in the forwarding mask for unknown 583 * unicast - the hardware default value for ANA_FLOODING_FLD_UNICAST 584 * excludes BIT(ocelot->num_phys_ports), and so does ocelot_init, since 585 * Ocelot relies on whitelisting MAC addresses towards PGID_CPU. 586 */ 587 ocelot_write_rix(ocelot, 588 ANA_PGID_PGID_PGID(GENMASK(ocelot->num_phys_ports, 0)), 589 ANA_PGID_PGID, PGID_UC); 590 /* Setup the per-traffic class flooding PGIDs */ 591 for (tc = 0; tc < FELIX_NUM_TC; tc++) 592 ocelot_write_rix(ocelot, ANA_FLOODING_FLD_MULTICAST(PGID_MC) | 593 ANA_FLOODING_FLD_BROADCAST(PGID_MC) | 594 ANA_FLOODING_FLD_UNICAST(PGID_UC), 595 ANA_FLOODING, tc); 596 597 ds->mtu_enforcement_ingress = true; 598 /* It looks like the MAC/PCS interrupt register - PM0_IEVENT (0x8040) 599 * isn't instantiated for the Felix PF. 600 * In-band AN may take a few ms to complete, so we need to poll. 601 */ 602 ds->pcs_poll = true; 603 604 return 0; 605 } 606 607 static void felix_teardown(struct dsa_switch *ds) 608 { 609 struct ocelot *ocelot = ds->priv; 610 struct felix *felix = ocelot_to_felix(ocelot); 611 612 if (felix->info->mdio_bus_free) 613 felix->info->mdio_bus_free(ocelot); 614 615 ocelot_deinit_timestamp(ocelot); 616 /* stop workqueue thread */ 617 ocelot_deinit(ocelot); 618 } 619 620 static int felix_hwtstamp_get(struct dsa_switch *ds, int port, 621 struct ifreq *ifr) 622 { 623 struct ocelot *ocelot = ds->priv; 624 625 return ocelot_hwstamp_get(ocelot, port, ifr); 626 } 627 628 static int felix_hwtstamp_set(struct dsa_switch *ds, int port, 629 struct ifreq *ifr) 630 { 631 struct ocelot *ocelot = ds->priv; 632 633 return ocelot_hwstamp_set(ocelot, port, ifr); 634 } 635 636 static bool felix_rxtstamp(struct dsa_switch *ds, int port, 637 struct sk_buff *skb, unsigned int type) 638 { 639 struct skb_shared_hwtstamps *shhwtstamps; 640 struct ocelot *ocelot = ds->priv; 641 u8 *extraction = skb->data - ETH_HLEN - OCELOT_TAG_LEN; 642 u32 tstamp_lo, tstamp_hi; 643 struct timespec64 ts; 644 u64 tstamp, val; 645 646 ocelot_ptp_gettime64(&ocelot->ptp_info, &ts); 647 tstamp = ktime_set(ts.tv_sec, ts.tv_nsec); 648 649 packing(extraction, &val, 116, 85, OCELOT_TAG_LEN, UNPACK, 0); 650 tstamp_lo = (u32)val; 651 652 tstamp_hi = tstamp >> 32; 653 if ((tstamp & 0xffffffff) < tstamp_lo) 654 tstamp_hi--; 655 656 tstamp = ((u64)tstamp_hi << 32) | tstamp_lo; 657 658 shhwtstamps = skb_hwtstamps(skb); 659 memset(shhwtstamps, 0, sizeof(struct skb_shared_hwtstamps)); 660 shhwtstamps->hwtstamp = tstamp; 661 return false; 662 } 663 664 static bool felix_txtstamp(struct dsa_switch *ds, int port, 665 struct sk_buff *clone, unsigned int type) 666 { 667 struct ocelot *ocelot = ds->priv; 668 struct ocelot_port *ocelot_port = ocelot->ports[port]; 669 670 if (!ocelot_port_add_txtstamp_skb(ocelot_port, clone)) 671 return true; 672 673 return false; 674 } 675 676 static int felix_change_mtu(struct dsa_switch *ds, int port, int new_mtu) 677 { 678 struct ocelot *ocelot = ds->priv; 679 680 ocelot_port_set_maxlen(ocelot, port, new_mtu); 681 682 return 0; 683 } 684 685 static int felix_get_max_mtu(struct dsa_switch *ds, int port) 686 { 687 struct ocelot *ocelot = ds->priv; 688 689 return ocelot_get_max_mtu(ocelot, port); 690 } 691 692 static int felix_cls_flower_add(struct dsa_switch *ds, int port, 693 struct flow_cls_offload *cls, bool ingress) 694 { 695 struct ocelot *ocelot = ds->priv; 696 697 return ocelot_cls_flower_replace(ocelot, port, cls, ingress); 698 } 699 700 static int felix_cls_flower_del(struct dsa_switch *ds, int port, 701 struct flow_cls_offload *cls, bool ingress) 702 { 703 struct ocelot *ocelot = ds->priv; 704 705 return ocelot_cls_flower_destroy(ocelot, port, cls, ingress); 706 } 707 708 static int felix_cls_flower_stats(struct dsa_switch *ds, int port, 709 struct flow_cls_offload *cls, bool ingress) 710 { 711 struct ocelot *ocelot = ds->priv; 712 713 return ocelot_cls_flower_stats(ocelot, port, cls, ingress); 714 } 715 716 static int felix_port_policer_add(struct dsa_switch *ds, int port, 717 struct dsa_mall_policer_tc_entry *policer) 718 { 719 struct ocelot *ocelot = ds->priv; 720 struct ocelot_policer pol = { 721 .rate = div_u64(policer->rate_bytes_per_sec, 1000) * 8, 722 .burst = div_u64(policer->rate_bytes_per_sec * 723 PSCHED_NS2TICKS(policer->burst), 724 PSCHED_TICKS_PER_SEC), 725 }; 726 727 return ocelot_port_policer_add(ocelot, port, &pol); 728 } 729 730 static void felix_port_policer_del(struct dsa_switch *ds, int port) 731 { 732 struct ocelot *ocelot = ds->priv; 733 734 ocelot_port_policer_del(ocelot, port); 735 } 736 737 static int felix_port_setup_tc(struct dsa_switch *ds, int port, 738 enum tc_setup_type type, 739 void *type_data) 740 { 741 struct ocelot *ocelot = ds->priv; 742 struct felix *felix = ocelot_to_felix(ocelot); 743 744 if (felix->info->port_setup_tc) 745 return felix->info->port_setup_tc(ds, port, type, type_data); 746 else 747 return -EOPNOTSUPP; 748 } 749 750 static const struct dsa_switch_ops felix_switch_ops = { 751 .get_tag_protocol = felix_get_tag_protocol, 752 .setup = felix_setup, 753 .teardown = felix_teardown, 754 .set_ageing_time = felix_set_ageing_time, 755 .get_strings = felix_get_strings, 756 .get_ethtool_stats = felix_get_ethtool_stats, 757 .get_sset_count = felix_get_sset_count, 758 .get_ts_info = felix_get_ts_info, 759 .phylink_validate = felix_phylink_validate, 760 .phylink_mac_link_state = felix_phylink_mac_pcs_get_state, 761 .phylink_mac_config = felix_phylink_mac_config, 762 .phylink_mac_an_restart = felix_phylink_mac_an_restart, 763 .phylink_mac_link_down = felix_phylink_mac_link_down, 764 .phylink_mac_link_up = felix_phylink_mac_link_up, 765 .port_enable = felix_port_enable, 766 .port_disable = felix_port_disable, 767 .port_fdb_dump = felix_fdb_dump, 768 .port_fdb_add = felix_fdb_add, 769 .port_fdb_del = felix_fdb_del, 770 .port_bridge_join = felix_bridge_join, 771 .port_bridge_leave = felix_bridge_leave, 772 .port_stp_state_set = felix_bridge_stp_state_set, 773 .port_vlan_prepare = felix_vlan_prepare, 774 .port_vlan_filtering = felix_vlan_filtering, 775 .port_vlan_add = felix_vlan_add, 776 .port_vlan_del = felix_vlan_del, 777 .port_hwtstamp_get = felix_hwtstamp_get, 778 .port_hwtstamp_set = felix_hwtstamp_set, 779 .port_rxtstamp = felix_rxtstamp, 780 .port_txtstamp = felix_txtstamp, 781 .port_change_mtu = felix_change_mtu, 782 .port_max_mtu = felix_get_max_mtu, 783 .port_policer_add = felix_port_policer_add, 784 .port_policer_del = felix_port_policer_del, 785 .cls_flower_add = felix_cls_flower_add, 786 .cls_flower_del = felix_cls_flower_del, 787 .cls_flower_stats = felix_cls_flower_stats, 788 .port_setup_tc = felix_port_setup_tc, 789 }; 790 791 static struct felix_info *felix_instance_tbl[] = { 792 [FELIX_INSTANCE_VSC9959] = &felix_info_vsc9959, 793 }; 794 795 static irqreturn_t felix_irq_handler(int irq, void *data) 796 { 797 struct ocelot *ocelot = (struct ocelot *)data; 798 799 /* The INTB interrupt is used for both PTP TX timestamp interrupt 800 * and preemption status change interrupt on each port. 801 * 802 * - Get txtstamp if have 803 * - TODO: handle preemption. Without handling it, driver may get 804 * interrupt storm. 805 */ 806 807 ocelot_get_txtstamp(ocelot); 808 809 return IRQ_HANDLED; 810 } 811 812 static int felix_pci_probe(struct pci_dev *pdev, 813 const struct pci_device_id *id) 814 { 815 enum felix_instance instance = id->driver_data; 816 struct dsa_switch *ds; 817 struct ocelot *ocelot; 818 struct felix *felix; 819 int err; 820 821 if (pdev->dev.of_node && !of_device_is_available(pdev->dev.of_node)) { 822 dev_info(&pdev->dev, "device is disabled, skipping\n"); 823 return -ENODEV; 824 } 825 826 err = pci_enable_device(pdev); 827 if (err) { 828 dev_err(&pdev->dev, "device enable failed\n"); 829 goto err_pci_enable; 830 } 831 832 /* set up for high or low dma */ 833 err = dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(64)); 834 if (err) { 835 err = dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(32)); 836 if (err) { 837 dev_err(&pdev->dev, 838 "DMA configuration failed: 0x%x\n", err); 839 goto err_dma; 840 } 841 } 842 843 felix = kzalloc(sizeof(struct felix), GFP_KERNEL); 844 if (!felix) { 845 err = -ENOMEM; 846 dev_err(&pdev->dev, "Failed to allocate driver memory\n"); 847 goto err_alloc_felix; 848 } 849 850 pci_set_drvdata(pdev, felix); 851 ocelot = &felix->ocelot; 852 ocelot->dev = &pdev->dev; 853 felix->pdev = pdev; 854 felix->info = felix_instance_tbl[instance]; 855 856 pci_set_master(pdev); 857 858 err = devm_request_threaded_irq(&pdev->dev, pdev->irq, NULL, 859 &felix_irq_handler, IRQF_ONESHOT, 860 "felix-intb", ocelot); 861 if (err) { 862 dev_err(&pdev->dev, "Failed to request irq\n"); 863 goto err_alloc_irq; 864 } 865 866 ocelot->ptp = 1; 867 868 ds = kzalloc(sizeof(struct dsa_switch), GFP_KERNEL); 869 if (!ds) { 870 err = -ENOMEM; 871 dev_err(&pdev->dev, "Failed to allocate DSA switch\n"); 872 goto err_alloc_ds; 873 } 874 875 ds->dev = &pdev->dev; 876 ds->num_ports = felix->info->num_ports; 877 ds->num_tx_queues = felix->info->num_tx_queues; 878 ds->ops = &felix_switch_ops; 879 ds->priv = ocelot; 880 felix->ds = ds; 881 882 err = dsa_register_switch(ds); 883 if (err) { 884 dev_err(&pdev->dev, "Failed to register DSA switch: %d\n", err); 885 goto err_register_ds; 886 } 887 888 return 0; 889 890 err_register_ds: 891 kfree(ds); 892 err_alloc_ds: 893 err_alloc_irq: 894 err_alloc_felix: 895 kfree(felix); 896 err_dma: 897 pci_disable_device(pdev); 898 err_pci_enable: 899 return err; 900 } 901 902 static void felix_pci_remove(struct pci_dev *pdev) 903 { 904 struct felix *felix; 905 906 felix = pci_get_drvdata(pdev); 907 908 dsa_unregister_switch(felix->ds); 909 910 kfree(felix->ds); 911 kfree(felix); 912 913 pci_disable_device(pdev); 914 } 915 916 static struct pci_device_id felix_ids[] = { 917 { 918 /* NXP LS1028A */ 919 PCI_DEVICE(PCI_VENDOR_ID_FREESCALE, 0xEEF0), 920 .driver_data = FELIX_INSTANCE_VSC9959, 921 }, 922 { 0, } 923 }; 924 MODULE_DEVICE_TABLE(pci, felix_ids); 925 926 static struct pci_driver felix_pci_driver = { 927 .name = KBUILD_MODNAME, 928 .id_table = felix_ids, 929 .probe = felix_pci_probe, 930 .remove = felix_pci_remove, 931 }; 932 933 module_pci_driver(felix_pci_driver); 934 935 MODULE_DESCRIPTION("Felix Switch driver"); 936 MODULE_LICENSE("GPL v2"); 937