1*23794becSDaniel Golle /* SPDX-License-Identifier: GPL-2.0-or-later */ 2*23794becSDaniel Golle 3*23794becSDaniel Golle #ifndef __MXL862XX_CMD_H 4*23794becSDaniel Golle #define __MXL862XX_CMD_H 5*23794becSDaniel Golle 6*23794becSDaniel Golle #define MXL862XX_MMD_DEV 30 7*23794becSDaniel Golle #define MXL862XX_MMD_REG_CTRL 0 8*23794becSDaniel Golle #define MXL862XX_MMD_REG_LEN_RET 1 9*23794becSDaniel Golle #define MXL862XX_MMD_REG_DATA_FIRST 2 10*23794becSDaniel Golle #define MXL862XX_MMD_REG_DATA_LAST 95 11*23794becSDaniel Golle #define MXL862XX_MMD_REG_DATA_MAX_SIZE \ 12*23794becSDaniel Golle (MXL862XX_MMD_REG_DATA_LAST - MXL862XX_MMD_REG_DATA_FIRST + 1) 13*23794becSDaniel Golle 14*23794becSDaniel Golle #define MXL862XX_COMMON_MAGIC 0x100 15*23794becSDaniel Golle #define MXL862XX_BRDG_MAGIC 0x300 16*23794becSDaniel Golle #define MXL862XX_BRDGPORT_MAGIC 0x400 17*23794becSDaniel Golle #define MXL862XX_CTP_MAGIC 0x500 18*23794becSDaniel Golle #define MXL862XX_SWMAC_MAGIC 0xa00 19*23794becSDaniel Golle #define MXL862XX_SS_MAGIC 0x1600 20*23794becSDaniel Golle #define GPY_GPY2XX_MAGIC 0x1800 21*23794becSDaniel Golle #define SYS_MISC_MAGIC 0x1900 22*23794becSDaniel Golle 23*23794becSDaniel Golle #define MXL862XX_COMMON_CFGGET (MXL862XX_COMMON_MAGIC + 0x9) 24*23794becSDaniel Golle #define MXL862XX_COMMON_REGISTERMOD (MXL862XX_COMMON_MAGIC + 0x11) 25*23794becSDaniel Golle 26*23794becSDaniel Golle #define MXL862XX_BRIDGE_ALLOC (MXL862XX_BRDG_MAGIC + 0x1) 27*23794becSDaniel Golle #define MXL862XX_BRIDGE_CONFIGSET (MXL862XX_BRDG_MAGIC + 0x2) 28*23794becSDaniel Golle #define MXL862XX_BRIDGE_CONFIGGET (MXL862XX_BRDG_MAGIC + 0x3) 29*23794becSDaniel Golle #define MXL862XX_BRIDGE_FREE (MXL862XX_BRDG_MAGIC + 0x4) 30*23794becSDaniel Golle 31*23794becSDaniel Golle #define MXL862XX_BRIDGEPORT_ALLOC (MXL862XX_BRDGPORT_MAGIC + 0x1) 32*23794becSDaniel Golle #define MXL862XX_BRIDGEPORT_CONFIGSET (MXL862XX_BRDGPORT_MAGIC + 0x2) 33*23794becSDaniel Golle #define MXL862XX_BRIDGEPORT_CONFIGGET (MXL862XX_BRDGPORT_MAGIC + 0x3) 34*23794becSDaniel Golle #define MXL862XX_BRIDGEPORT_FREE (MXL862XX_BRDGPORT_MAGIC + 0x4) 35*23794becSDaniel Golle 36*23794becSDaniel Golle #define MXL862XX_CTP_PORTASSIGNMENTSET (MXL862XX_CTP_MAGIC + 0x3) 37*23794becSDaniel Golle 38*23794becSDaniel Golle #define MXL862XX_MAC_TABLECLEARCOND (MXL862XX_SWMAC_MAGIC + 0x8) 39*23794becSDaniel Golle 40*23794becSDaniel Golle #define MXL862XX_SS_SPTAG_SET (MXL862XX_SS_MAGIC + 0x02) 41*23794becSDaniel Golle 42*23794becSDaniel Golle #define INT_GPHY_READ (GPY_GPY2XX_MAGIC + 0x01) 43*23794becSDaniel Golle #define INT_GPHY_WRITE (GPY_GPY2XX_MAGIC + 0x02) 44*23794becSDaniel Golle 45*23794becSDaniel Golle #define SYS_MISC_FW_VERSION (SYS_MISC_MAGIC + 0x02) 46*23794becSDaniel Golle 47*23794becSDaniel Golle #define MMD_API_MAXIMUM_ID 0x7fff 48*23794becSDaniel Golle 49*23794becSDaniel Golle #endif /* __MXL862XX_CMD_H */ 50